summaryrefslogtreecommitdiff
path: root/src/mesa/drivers
AgeCommit message (Collapse)Author
2010-11-23i965: Use the new embedded compare in SEL on gen6 for VS MIN and MAX opcodes.Eric Anholt
Cuts the extra CMP instruction that used to precede SEL.
2010-11-23i965: Don't upload line smooth params unless we're line smoothing.Eric Anholt
2010-11-23i965: Don't upload line stipple pattern unless we're stippling.Eric Anholt
2010-11-23i965: Don't upload polygon stipple unless required.Eric Anholt
2010-11-23i965: Move gen4 blend constant color to the gen4 blending file.Eric Anholt
2010-11-23r300/compiler: Don't allow presubtract sources to be remapped twiceTom Stellard
https://bugs.freedesktop.org/show_bug.cgi?id=31193 NOTE: This is a candidate for the 7.9 branch.
2010-11-22r600c: fix VC flush on cedar and palmAlex Deucher
2010-11-22r600c: add Ontario Fusion APU supportAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-11-21r300/compiler: Add a more efficient version of rc_find_free_temporary()Tom Stellard
2010-11-21r300/compiler: Enable rename_reg pass for r500 cardsTom Stellard
In addition, the rename_reg pass has been rewritten to use rc_get_readers().
2010-11-21r300/compiler: Use presubtract operations as much as possibleTom Stellard
Previously, presubtract operations where only being used by instructions with less than three source source registers.
2010-11-21r300/compiler: Convert RGB to alpha in the schedulerTom Stellard
2010-11-21r300/compiler: Track readers through branches in rc_get_readers()Tom Stellard
2010-11-21r300/compiler: Handle BREAK and CONTINUE in rc_get_readers()Tom Stellard
2010-11-21r300/compiler: Add rc_get_readers()Tom Stellard
2010-11-21r300/compiler: Ignore alpha dest register when replicating the resultTom Stellard
When the result of the alpha instruction is being replicated to the RGB destination register, we do not need to use alpha's destination register. This fixes an invalid "Too many hardware temporaries used" error in the case where a transcendent operation writes to a temporary register greater than max_temp_regs. NOTE: This is a candidate for the 7.9 branch.
2010-11-21r300/compiler: Use zero as the register index for unused sourcesTom Stellard
This fixes an invalid "Too many hardware temporaries used" error in the case where a source reads from a temporary register with an index greater than max_temp_regs and then the source is marked as unused before the register allocation pass. NOTE: This is a candidate for the 7.9 branch.
2010-11-21r300/compiler: Fix instruction scheduling within IF blocksTom Stellard
Reads of registers that where not written to within the same block were not being tracked. So in a situations like this: 0: IF 1: ADD t0, t1, t2 2: MOV t2, t1 Instruction 2 didn't know that instruction 1 read from t2, so in some cases instruction 2 was being scheduled before instruction 1. NOTE: This is a candidate for the 7.9 branch.
2010-11-21r300/compiler: Fix register allocator's handling of loopsTom Stellard
NOTE: This is a candidate for the 7.9 branch.
2010-11-21r300/compiler: Make sure presubtract sources use supported swizzlesTom Stellard
NOTE: This is a candidate for the 7.9 branch.
2010-11-21r600: Remove unnecessary header.Vinson Lee
2010-11-20intel: Remove unnecessary header.Vinson Lee
2010-11-20r600: Remove unnecesary header.Vinson Lee
2010-11-20swrast: Remove unnecessary header.Vinson Lee
2010-11-19i965: Remove duplicate MRF writes in the FS backend.Eric Anholt
This is quite common for multitexture sampling, and not only cuts down on the second and later set of MOVs, but typically also allows compute-to-MRF on the first set. No statistically siginficant performance difference in nexuiz (n=3), but it reduces instruction count in one of its shaders and seems like a good idea.
2010-11-19i965: Improve compute-to-mrf.Eric Anholt
We were skipping it if the instruction producing the value we were going to compute-to-mrf used its result reg as a source reg. This meant that the typical "write interpolated color to fragment color" or "texture from interpolated texcoord" shader didn't compute-to-MRF. Just don't check for the interference cases until after we've checked if this is the instruction we wanted to compute-to-MRF. Improves nexuiz high-settings performance on my laptop 0.48% +- 0.08% (n=3).
2010-11-19i965: Recognize saturates and turn them into a saturated mov.Eric Anholt
On pre-gen6, this turns 4 instructions into 1. We could still do better by folding the saturate into the instruction generating the value if nobody else uses it, but that should be a separate pass.
2010-11-19i965: Fold constants into the second arg of BRW_SEL as well.Eric Anholt
This hits a common case with min/max operations.
2010-11-19i965: Remove extra \n at the end of every instruction in INTEL_DEBUG=wm.Eric Anholt
2010-11-19i965: Just use memset() to clear most members in FS constructors.Eric Anholt
This should make it a lot harder to forget to zero things.
2010-11-19i965: Fix compute_to_mrf to not move a MRF write up into another live range.Eric Anholt
Fixes glsl-fs-copy-propagation-texcoords-1.
2010-11-19mesa: Include C++ files in the makedepend of DRI drivers.Eric Anholt
2010-11-19glsl: Combine many instruction lowering passes into one.Kenneth Graunke
This should save on the overhead of tree-walking and provide a convenient place to add more instruction lowering in the future. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2010-11-19glsl: Add ir_quadop_vector expressionIan Romanick
The vector operator collects 2, 3, or 4 scalar components into a vector. Doing this has several advantages. First, it will make ud-chain tracking for components of vectors much easier. Second, a later optimization pass could collect scalars into vectors to allow generation of SWZ instructions (or similar as operands to other instructions on R200 and i915). It also enables an easy way to generate IR for SWZ instructions in the ARB_vertex_program assembler.
2010-11-19glsl: Eliminate assumptions about size of ir_expression::operandsIan Romanick
This may grow in the near future.
2010-11-19glsl: Add ir_unop_sin_reduced and ir_unop_cos_reducedIan Romanick
The operate just like ir_unop_sin and ir_unop_cos except that they expect their inputs to be limited to the range [-pi, pi]. Several GPUs require this limited range for their sine and cosine instructions, so having these as operations (along with a to-be-written lowering pass) helps this architectures. These new operations also matche the semantics of the GL_ARB_fragment_program SCS instruction. Having these as operations helps in generating GLSL IR directly from assembly fragment programs.
2010-11-19dri/nouveau: Clean up magic numbers in get_rt_formatViktor Novotný
Signed-off-by: Viktor Novotný <noviktor@seznam.cz> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2010-11-18mesa: pass gl_format to _mesa_init_teximage_fields()Brian Paul
This should prevent the field going unset in the future. See bug http://bugs.freedesktop.org/show_bug.cgi?id=31544 for background. Also remove unneeded calls to clear_teximage_fields(). Finally, call _mesa_set_fetch_functions() from the _mesa_init_teximage_fields() function so callers have one less thing to worry about.
2010-11-18i965: Eliminate dead code more aggressively.Eric Anholt
If an instruction writes reg but nothing later uses it, then we don't need to bother doing it. Before, we were just killing code that was never read after it was ever written. This removes many interpolation instructions for attributes with only a few comopnents used. Improves nexuiz high-settings performance .46% +/- .12% (n=3) on my Ironlake.
2010-11-18i965: Fail on loops on gen6 for now until we write the EU emit code for it.Eric Anholt
2010-11-18i965: Add dumping of the sampler default color.Eric Anholt
2010-11-18i965: Add state dumping for sampler state.Eric Anholt
2010-11-18i965: Shut up spurious gcc warning about GLSL_TYPE enums.Eric Anholt
2010-11-17glsl: Remove the ir_binop_cross opcode.Kenneth Graunke
2010-11-17r600c/evergreen: texture align is group_bytes just like 6xx/7xxAlex Deucher
Default group bytes to 512 on evergreen. Don't query tiling config yet for evergreen, the current info returned is not adequate for evergreen (no way to get bank info).
2010-11-15r600: Evergreen has two extra frac_bits for the sampler LOD state.Henri Verbeet
Note: this is a candidate for the 7.9 branch.
2010-11-15dri/nouveau: Kill a bunch of ternary operators.Francisco Jerez
2010-11-15dri/nouveau: Fix typo.Francisco Jerez
2010-11-15dri/nouveau: Remove nouveau_class.h, finishing switch to rules-ng-ng headersViktor Novotný
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2010-11-15dri/nouveau nv20: Use rules-ng-ng headersViktor Novotný
Signed-off-by: Francisco Jerez <currojerez@riseup.net>