Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-06-11 | r300: hw doesn't support saturation for tex instructions | Maciej Cencora | |
2009-06-11 | mesa: add default function for ctx->Driver.CheckQuery() hook | Brian Paul | |
2009-06-11 | r300: fix indexed primitive rendering when using memory manager | Jerome Glisse | |
2009-06-11 | Properly set aos_count | Alex Deucher | |
This is used by radeonReleaseArrays to free AOS. | |||
2009-06-11 | intel: intel_texture_drawpixels() can't handle GL_DEPTH_STENCIL. | Michel Dänzer | |
Fixes glean depthStencil test. | |||
2009-06-10 | move radeon_set_screen_flags() up so CHIP_FAMILY is set before using it | Alex Deucher | |
fixes last commit. | |||
2009-06-10 | Use correct scratch reg offset for r6xx/r7xx | Alex Deucher | |
2009-06-10 | r300: make sure indexed rendering doesn't try to use more than the num of ↵ | Jerome Glisse | |
vertices When with memory manager we need to make sure the GPU won't try to access beyond vertex buffer size, do so by enforcing that the maximun index is the last vertex of the buffer. | |||
2009-06-09 | Pull in additional state setup from the DDX | Alex Deucher | |
2009-06-09 | i915: Add an option for testing the effect of early Z in classic mode. | Eric Anholt | |
The early Z stuff is supposed to be unsafe without some more work in the enable/disable path (in particular, how do we want to get it disabled on the way out to the X Server?), but at the moment is 6% in OA. | |||
2009-06-09 | intel: Remove an unneeded hunk that slipped in with texture tiling. | Eric Anholt | |
intel_miptree_pitch_align does this later on. | |||
2009-06-09 | intel: Base tri clearing depth on Y tiling, not IS_I965(). | Eric Anholt | |
Y tiling is why the 965 check was there, but I wanted to experiment with Y on pre-965 as well. | |||
2009-06-09 | intel: Fix intel_region_unmap to do unmap, not map. | Eric Anholt | |
Thanks to Shuang He for catching this. | |||
2009-06-09 | i965: added intelFlush() call in intel_get_tex_image() | Brian Paul | |
Fixes the render-to-texture test in progs/tests/getteximage.c | |||
2009-06-09 | intel: use GLboolean, not int, for compressed parameter | Brian Paul | |
2009-06-09 | intel: make a bunch of glTexImage-related functions static | Brian Paul | |
2009-06-09 | intel: whitespace clean-ups | Brian Paul | |
2009-06-09 | intel: remove extra \n from warning string | Brian Paul | |
2009-06-09 | radeon: fix mipmap_limits crasher. | Dave Airlie | |
This gets the correct srclvl image map when uploading images to the new mipmap. | |||
2009-06-08 | mesa: implement GL_ARB_map_buffer_range | Brian Paul | |
Only enabled for software drivers at this point. Note that the gl_buffer_object::Access enum field has been replaced by a gl_buffer_object::AccessFlags bitfield. The new field is a mask of the GL_MAP_x_BIT flags which is a superset of the old GL_READ_ONLY, GL_WRITE_ONLY and GL_READ_WRITE modes. When we query GL_BUFFER_ACCESS_ARB we translate the bitfield into the conventional enum values. | |||
2009-06-08 | mesa: regenerated files for GL_ARB_map_buffer_range | Brian Paul | |
2009-06-08 | r300: fix regression caused by 056bc77547c304021a0faf204897ed238a5cf424 | Maciej Cencora | |
Fixes GPU hangs in software TCL path | |||
2009-06-07 | Merge remote branch 'origin/master' into radeon-rewrite | Dave Airlie | |
2009-06-07 | r300: Endianness fixes for recent vertex path changes. | Michel Dänzer | |
Signed-off-by: Maciej Cencora <m.cencora@gmail.com> | |||
2009-06-07 | r300: vertex array stride = 0 means that data are tightly packed in the array | Maciej Cencora | |
2009-06-07 | r300: GL_(U)SHORT and GL_(U)BYTE with < 4 components can also be HW accelerated | Maciej Cencora | |
Also when index format is GL_UBYTE, convert it to GL_USHORT not GL_UINT. Fix license header too. Reported by: Nicolai Hähnle <nhaehnle@gmail.com> | |||
2009-06-07 | r300: remove unused code | Maciej Cencora | |
2009-06-07 | r300: rewrite vertex setup for software T&L path using functions from ↵ | Maciej Cencora | |
software TCL path | |||
2009-06-07 | r300: prepare for some code duplication removal | Maciej Cencora | |
2009-06-07 | r300: enable EXT_vertex_array_bgra extensions | Maciej Cencora | |
2009-06-07 | r300: add hw accelerated support for different vertex data formats | Maciej Cencora | |
2009-06-07 | r300: prepare for different vertex data type support | Maciej Cencora | |
2009-06-07 | r300: fixup vertex attributes ordering | Maciej Cencora | |
Always allocate the vertex program input registers in the same order as the vertex attributes are passed in vertex arrays. | |||
2009-06-07 | r300: always pass 4 color components to RS unit | Maciej Cencora | |
Even if we don't pass all 4 color components to vertex shader unit, the vertex program can generate the missing components. | |||
2009-06-04 | osmesa: Allow building standalone in all three channel widths | Dan Nicholson | |
autoconf had been designating the 8 bit libOSMesa as the default standalone osmesa, but the Makefile expected it to be linked to libGL. Fix up the osmesa Makefile so that it allows any of the combinations of standalone and channel width to be built. Fixes bug #21980. (cherry picked from commit 7441dcd90b01df8351026af8bbb50e11bb86071a) | |||
2009-06-04 | osmesa: Allow building standalone in all three channel widths | Dan Nicholson | |
autoconf had been designating the 8 bit libOSMesa as the default standalone osmesa, but the Makefile expected it to be linked to libGL. Fix up the osmesa Makefile so that it allows any of the combinations of standalone and channel width to be built. Fixes bug #21980. | |||
2009-06-04 | re-arrange state structure | Alex Deucher | |
- split out renderbuffers - split out shaders - split our viewports Only send the state needed. | |||
2009-06-04 | Don't program VGT_OUT_DEALLOC_CNTL/VGT_VERTEX_REUSE_BLOCK_CNTL | Alex Deucher | |
These are chip specific and are programmed by the drm. This should fix hangs on some chips. | |||
2009-06-04 | use the float interface for viewport updates | Alex Deucher | |
2009-06-04 | intel: Add support for tiled textures. | Eric Anholt | |
This is about a 30% performance win in OA with high settings on my GM45, and experiments with 915GM indicate that it'll be around a 20% win there. Currently, 915-class hardware is seriously hurt by the fact that we use fence regs to control the tiling even for 3D instructions that could live without them, so we spend a bunch of time waiting on previous rendering in order to pull fences off. Thus, the texture_tiling driconf option defaults off there for now. | |||
2009-06-04 | i915: Don't rely on fence regs when we don't have to. | Eric Anholt | |
We're on the way to telling the kernel about when we need fence regs on our objects or not, and this will cut the number of places needing them. | |||
2009-06-04 | i915: Remove some long-dead i830 code. | Eric Anholt | |
2009-06-03 | fill in r700ColorMask, cleanup | Alex Deucher | |
2009-06-03 | start to fill in ShadeModel() | Alex Deucher | |
2009-06-03 | dump command buffer | Alex Deucher | |
2009-06-03 | Clean up scissor and viewport code | Alex Deucher | |
Switch to common functions where applicable | |||
2009-06-02 | mesa: plug in new _mesa_CopyBufferSubData() functions | Brian Paul | |
2009-06-02 | glapi: regenerated files for GL_ARB_copy_buffer | Brian Paul | |
2009-06-02 | Disable clear code for now | Alex Deucher | |
2009-06-02 | fix an overflow in SPI_VS_OUT_CONFIG | Alex Deucher | |
VS must always export at least 1 param. |