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path: root/src/mesa/shader/prog_optimize.c
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2010-01-08Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/mesa/drivers/dri/i965/brw_wm_emit.c
2010-01-06mesa: test index bounds before array elementRoel Kluin
Check whether the index is within bounds before accessing the array. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Brian Paul <brianp@vmware.com>
2009-12-28mesa: remove gratuitous stores I added in remove_instructions.Eric Anholt
2009-11-20mesa: Fix NULL deref in optimizer when NumInstructions == 0.Eric Anholt
Bug #24984.
2009-11-13mesa: Improve the eliminate-move-use to work across multiple instructions.Eric Anholt
This shaves more instructions off of the VS of my GL demo, but no performance difference this time at n=6. This also fixes a regression that was in this path, which is now piglit's glsl-vs-mov-after-deref.
2009-11-07mesa: move code after declbrian
Fixes bug 24967.
2009-11-06mesa: Reduce the source channels considered in optimization passes.Eric Anholt
Depending on the writemask or the opcode, we can often trim the source channels considered used for dead code elimination. This saves actual instructions on 965 in the non-GLSL path for glean glsl1, and cleans up the writemasks of programs even further.
2009-11-06mesa: Fix remove_instructions to successfully remove when removeFlags[0].Eric Anholt
This fixes the dead code elimination to work on the particular code mentioned in the previous commit.
2009-11-06mesa: Add an optimization path to remove use of pointless MOVs.Eric Anholt
GLSL code such as: vec4 result = {0, 1, 0, 0}; gl_FragColor = result; emits code like: 0: MOV TEMP[0], CONST[0]; 1: MOV OUTPUT[1], TEMP[0]; and this replaces it with: 0: MOV TEMP[0], CONST[0]; 1: MOV OUTPUT[1], CONST[0]; Even when the dead code eliminator fails to clean up a now-useless MOV instruction (since it doesn't do live/dead ranges), this should at reduce dependencies.
2009-11-06mesa: Fix up the remove_dead_code pass to operate on a channel basis.Eric Anholt
This cleans up a bunch of instructions in GLSL programs to have limited writemasks, which would translate to wins in shaders that hit the i965 brw_wm_glsl.c path by depending less on in-driver optimizations. It will also help hit other optimization passes I'm looking at.
2009-10-01mesa: fix mem leaksBrian Paul
2009-05-04mesa: remove some unfinished/devel codeBrian Paul
2009-04-24mesa: refactor code and make _mesa_find_temp_intervals() publicBrian Paul
2009-04-08mesa: minor datatype changes in optimization codeBrian Paul
2009-04-07glsl: enable the new linear scan register allocator codeBrian Paul
Seems to b working well enough to enable all the time. Optimizations can be disabled with "export MESA_GLSL=nopt" if needed.
2009-03-20mesa: linear scan register allocation for shader programsBrian Paul
This is a check-point commit; not turned on yet. Use the linear scan register allocation algorithm to re-allocate temporary registers. This is done by computing the live intervals for registers and reallocating temps with that information. For some shaders this dramatically reduces the number of temp registers needed. For the time being we give up on a few cases such as relative-indexed temps and subroutine calls (but we inline most GLSL functions anyway).
2009-03-06mesa: add new program optimizer codeBrian Paul
This is pretty simplistic for now, but helps with certain shaders.