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Signed-off-by: Brian Paul <brianp@vmware.com>
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Conditional write masks and the condition-code based KIL instruction
are all supported. The specific behavior of KIL in the following
shader may or may not match the behavior of other implementations:
!!ARBfp1.0
TEMP GT;
MOVC GT, fragment.texcoord[0];
KIL GT.x;
END
Should be it interpreted as 'KIL srcReg' or as 'KIL ccTest'? The
current parser will interpret it as 'KIL srcReg'.
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Adds support for declaring TEMP and OUTPUT variables as 'LONG' or
'SHORT' precision. The precision specifiers are parsed, but they are
currently ignored. Some support for this may be added in the future,
but neither Intel hardware nor, as far as I'm aware, Radeon hardware
support multiple precisions.
Also adds support for instruction precision ('X', 'H', and 'R')
suffixes and instruction condition code output ('C') suffix. This
results in a fairly major change to the lexer. Instructions are
matched with all the possible suffix strings. The suffix string are
then carved off by a context (i.e., which program mode and options are
set) aware parser that converts the suffixes to bits in
prog_instruction.
This could have been handled in the same way _SAT was originally
handled in the lexer, but it would have resulted in a very large lexer
with lots of opportunity for cut-and-paste errors.
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This isn't really tested yet as no drivers actually support this extension.
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This still needs quite a bit of work, but a bunch of the programs in progs/vp
produce correct results.
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