Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-11-14 | radeon: use radeon_bo_is_referenced_by_cs for query objects | Maciej Cencora | |
2009-11-14 | radeon/r300: don't flush cmdbuf if not necessary | Maciej Cencora | |
2009-11-14 | radeon/r300: no need to flush the cmdbuf when changing scissors state in KMM ↵ | Maciej Cencora | |
mode | |||
2009-11-14 | radeon: fix glBufferSubData | Maciej Cencora | |
2009-11-14 | radeon: add radeon_bo_is_referenced_by_cs function | Maciej Cencora | |
2009-11-14 | radeon: remove unnecessary call to radeonEmitState | Maciej Cencora | |
fixes bo space accounting errors | |||
2009-11-14 | r300: add missing texformat | Maciej Cencora | |
2009-11-14 | r300: remove unneeded includes | Maciej Cencora | |
2009-11-11 | swrast: handle additional Z24 formats in read_depth_pixels() | Brian Paul | |
2009-11-11 | r300, r300g: Add missing registers. | Corbin Simpson | |
2009-11-10 | swrast: update renderbuffer format assertions | brian | |
2009-11-10 | mesa: fix some begin/end render-to-texture logic | brian | |
Before, we weren't aggressive enough in checking for the start or end of render-to-texture. In particular, if only the ctx->ReadBuffer had texture attachments, we were treating that as a render-to-texture case. This fixes a regression from commit 75bdbdd90b15c8704d87ca195a364ff6a42edbb1 "intel: Don't validate in a texture image used as a render target." | |||
2009-11-10 | mesa: move check_begin/end_texture_render() calls | brian | |
2009-11-10 | mesa: new vars: oldDrawFb, oldReadFb in _mesa_BindFramebufferEXT() | brian | |
2009-11-10 | mesa: rename vars in _mesa_BindFramebufferEXT() | brian | |
2009-11-10 | mesa: added comment for check_begin_texture_render() | brian | |
2009-11-10 | Merge remote branch 'origin/mesa_7_6_branch' | Eric Anholt | |
2009-11-10 | i965: avoid memsetting all the BRW_WM_MAX_INSN arrays for every compile. | Eric Anholt | |
For an app that's blowing out the state cache, like sauerbraten, the memset of the giant arrays ended up taking 11% of the CPU even when only a "few" of the entries got used. With this, the WM program compile drops back down to 1% of CPU time. Bug #24981 (bisected to BRW_WM_MAX_INSN increase). | |||
2009-11-10 | i965: Add a note explaining the data cache domain. | Eric Anholt | |
2009-11-10 | i965: Fix VS constant buffer value loading. | Eric Anholt | |
Previously, we'd load linearly from ParameterValues[0] for the constants, though ParameterValues[1] may not equal ParameterValues[0] + 4. Additionally, the STATE_VAL type paramters didn't get updated. Fixes piglit vp-constant-array-huge.vpfp and ET:QW object locations. Bug #23226. | |||
2009-11-10 | i965: Unalias src/dst registers for SGE and friends. | Eric Anholt | |
Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/ Bug #22228 (cherry picked from commit 56ab92bad8f1d05bc22b8a8471d5aeb663f220de) | |||
2009-11-10 | i965: Allow use of PROGRAM_LOCAL constants in ARB_vp. | Eric Anholt | |
Fixes piglit arl.vp. (cherry picked from commit d52d78b4bcd6d4c0578f972c0b8ebac09e632196) | |||
2009-11-10 | i965: Unalias src/dst registers for SGE and friends. | Eric Anholt | |
Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/ Bug #22228 | |||
2009-11-10 | i965: Allow use of PROGRAM_LOCAL constants in ARB_vp. | Eric Anholt | |
Fixes piglit arl.vp. | |||
2009-11-10 | slang: Fix return value check. | Michal Krol | |
2009-11-10 | slang: Check OOM conditions for alloc_node_storage(). | Michal Krol | |
2009-11-10 | slang: Check return value from new_instruction(). | Michal Krol | |
2009-11-10 | slang: Fix signed/unsigned int handling in _slang_free_temp(). | Michal Krol | |
2009-11-10 | slang: Handle OOM condition in new_instruction(). | Michal Krol | |
2009-11-09 | r600/r700: typo, fix mask of DB_ALPHA_TO_MASK | Jerome Glisse | |
2009-11-09 | r600: don't emit htile regs | Alex Deucher | |
These are needed for HiZ which is not currently used and the _BASE reg requires a reloc which is not currently supported in the drm. | |||
2009-11-09 | r600: rework DB render setup | Alex Deucher | |
- consolidate DB render setup - only enable perfect ZPASS counts and cull disable when OQ is active - enable early Z | |||
2009-11-09 | r600: don't emit htile regs | Alex Deucher | |
These are needed for HiZ which is not currently used and the _BASE reg requires a reloc which is not currently supported in the drm. | |||
2009-11-09 | r600: add missing ZPASS setup bits for r7xx+ | Alex Deucher | |
2009-11-07 | prog parse: Handle GL_VERTEX_PROGRAM_ARB in glLoadProgramNV | Ian Romanick | |
2009-11-07 | prog parse: Handle GL_VERTEX_PROGRAM_NV in glProgramStringARB | Ian Romanick | |
Handle both NV vertex programs and NV vertex state programs passed to glProgramStringARB. | |||
2009-11-07 | prog parse: Handle GL_FRAGMENT_PROGRAM_ARB in glLoadProgramNV | Ian Romanick | |
2009-11-07 | prog parse: Handle GL_FRAGMENT_PROGRAM_NV in glProgramStringARB | Ian Romanick | |
2009-11-07 | mesa: move code after decl | brian | |
Fixes bug 24967. | |||
2009-11-06 | i965: Use Compr4 instruction compression mode on G4X and newer. | Eric Anholt | |
No statistically significant performance difference at n=3 with either openarena or my GL demo, but cutting program size seems like a good thing to be doing for the hypothetical app that has a working set near icache size. | |||
2009-11-06 | i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.c | Eric Anholt | |
2009-11-06 | i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.c | Eric Anholt | |
This should fix issues with antialiased lines in GLSL. | |||
2009-11-06 | i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.c | Eric Anholt | |
The PINTERP code should be faster for brw_wm_glsl.c now since brw_wm_emit.c's had been improved, and pixel_w should no longer stomp on a neighbor to dst. | |||
2009-11-06 | i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c. | Eric Anholt | |
2009-11-06 | i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c. | Eric Anholt | |
2009-11-06 | i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.c | Eric Anholt | |
2009-11-06 | i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.c | Eric Anholt | |
2009-11-06 | i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code. | Eric Anholt | |
2009-11-06 | i965: Use a normal alu1 emit for OPCODE_TRUNC. | Eric Anholt | |
2009-11-06 | i965: Share basic ALU ops between brw_wm_glsl and brw_wm_emit.c | Eric Anholt | |
This drops support for get_src_reg_imm in these, but the prospect of getting brw_wm_pass*.c onto our GLSL path is well worth some temporary pain. |