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2010-12-01i965: also using align1 mode for math2 on sandybridgeZhenyu Wang
Like Eric's workaround patch of commit 490c23ee6be2e8531b5a14d42f808de83d401130. This forces to align1 mode for math2 too.
2010-11-29i965: Fix type of gl_FragData[] dereference for FB write.Eric Anholt
Fixes glsl-fs-fragdata-1, and hopefully Eve Online where I noticed this bug in the generated shader. Bug #31952.
2010-11-29drivers/x11: unifdef XFree86ServerAdam Jackson
This code was for the old GLcore build of the software rasteriser. The X server switched to a DRI driver for software indirect GLX long ago. Signed-off-by: Adam Jackson <ajax@redhat.com>
2010-11-29st/mesa: fix texture border color for RED and RG base formatsMarek Olšák
The spec says the border color should be consistent with the internal format. Signed-off-by: Brian Paul <brianp@vmware.com>
2010-11-29mesa: check for posix_memalign() errorspontus lidman
Signed-off-by: Brian Paul <brianp@vmware.com>
2010-11-26st/mesa: Set PIPE_TRANSFER_DISCARD for GL_MAP_INVALIDATE_RANGE/BUFFFER_BITMathias Fröhlich
Signed-off-by: Brian Paul <brianp@vmware.com> Note: this is a candidate for the 7.9 branch.
2010-11-26st/mesa: fix mapping of zero-sized buffer objectsBrian Paul
Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31934
2010-11-26r300/compiler: move util functions to radeon_compiler_utilMarek Olšák
The compiler seriously needs a cleanup as far as the arrangement of functions is concerned. It's hard to know whether some function was implemented or not because there are so many places to search in and it can be anywhere and named anyhow.
2010-11-26r300/compiler: add a function for swizzling a maskMarek Olšák
2010-11-26r300/compiler: remove duplicate function rc_mask_to_swzMarek Olšák
2010-11-26r300/compiler: fix rc_rewrite_depth_out for it to work with any instructionMarek Olšák
It looks like the function was originally written for ARB_fragment_program. NOTE: This is a candidate for the 7.9 branch.
2010-11-24r300/compiler: Move declaration before code.Vinson Lee
Fixes this GCC warning with linux-x86 build. radeon_pair_regalloc.c: In function ‘compute_live_intervals’: radeon_pair_regalloc.c:222: warning: ISO C90 forbids mixed declarations and code
2010-11-24r300/compiler: Move declaration before code.Vinson Lee
Fixes this GCC warning with linux-x86 build. radeon_pair_regalloc.c: In function ‘compute_live_intervals’: radeon_pair_regalloc.c:221: warning: ISO C90 forbids mixed declarations and code
2010-11-24mesa: Fix glGet of ES2's GL_MAX_*_VECTORS properties.Kenneth Graunke
Previously, the get table listed all three as having custom locations, yet find_custom_value did not have cases to handle them. MAX_VARYING_VECTORS does not need a custom location since MaxVaryings is already stored as float[4] (or vec4). MaxUniformComponents is stored as the number of floats, however, so a custom implementation that divides by 4 is necessary. Fixes bugs.freedesktop.org #31495.
2010-11-24meta: Mask Stencil.Clear against stencilMax in _mesa_meta_ClearPeter Clifton
This fixes incorrect behaviour when the stencil clear value exceeds the size of the stencil buffer, for example, when set with: glClearStencil (~1); /* Set a bit pattern of 111...11111110 */ glClear (GL_STENCIL_BUFFER_BIT); The clear value needs to be masked by the value 2^m - 1, where m is the number of bits in the stencil buffer. Previously, we passed the value masked with 0x7fffffff to _mesa_StencilFuncSeparate which then clamps, NOT masks the value to the range 0 to 2^m - 1. The result would be clearing the stencil buffer to 0xff, rather than 0xfe. Signed-off-by: Peter Clifton <pcjc2@cam.ac.uk> Signed-off-by: Brian Paul <brianp@vmware.com>
2010-11-24x11: remove test_proxy_teximage() functionBrian Paul
This was really just for testing purposes.
2010-11-24mesa: added _mesa_format_image_size64()Brian Paul
2010-11-24mesa: add assertion and update comment in _mesa_format_image_size()Brian Paul
2010-11-24i965: Don't write mrf assignment for pointsize outputKristian Høgsberg
https://bugs.freedesktop.org/show_bug.cgi?id=31894
2010-11-23i915: Disallow alpha, red, RG, and sRGB as render targetsIan Romanick
Fixes bugzilla #31832 NOTE: This is a candidate for the 7.9 branch.
2010-11-23glsl: start restoring some geometry shader codeBrian Paul
2010-11-23glsl: better handling of linker failuresBrian Paul
Upon link error, exit translation loop, free program instructions. Check for null pointers in calling code.
2010-11-23mesa: use gl_shader_type enumBrian Paul
2010-11-23mesa: replace #defines with new gl_shader_type enumBrian Paul
2010-11-23mesa: _mesa_valid_register_index() to validate register indexesBrian Paul
2010-11-23mesa: rename, make _mesa_register_file_name() non-staticBrian Paul
Plus remove unused parameter.
2010-11-23glsl: use gl_register_file in a few placesBrian Paul
2010-11-23glsl: fix off by one in register index assertionBrian Paul
2010-11-23i965: Use the new embedded compare in SEL on gen6 for VS MIN and MAX opcodes.Eric Anholt
Cuts the extra CMP instruction that used to precede SEL.
2010-11-23i965: Don't upload line smooth params unless we're line smoothing.Eric Anholt
2010-11-23i965: Don't upload line stipple pattern unless we're stippling.Eric Anholt
2010-11-23i965: Don't upload polygon stipple unless required.Eric Anholt
2010-11-23i965: Move gen4 blend constant color to the gen4 blending file.Eric Anholt
2010-11-23r300/compiler: Don't allow presubtract sources to be remapped twiceTom Stellard
https://bugs.freedesktop.org/show_bug.cgi?id=31193 NOTE: This is a candidate for the 7.9 branch.
2010-11-22mesa: Clean up header file inclusion in syncobj.h.Vinson Lee
2010-11-23mesa: fix regression from b4bb6680200b5a898583392f4c831c02f41e63f7Xiang, Haihao
Pending commands to the previous context aren't flushed since commit b4bb668 Reported-by: Oleksiy Krivoshey <oleksiyk@gmail.com> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-22r600c: fix VC flush on cedar and palmAlex Deucher
2010-11-22r600c: add Ontario Fusion APU supportAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-11-22st/mesa: set MaxUniformComponentsMarek Olšák
Signed-off-by: Brian Paul <brianp@vmware.com>
2010-11-22swrast: init alpha value to 1.0 in opt_sample_rgb_2d()Brian Paul
2010-11-22gallium: add PIPE_SHADER_CAP_SUBROUTINESMarek Olšák
This fixes piglit/glsl-vs-main-return and glsl-fs-main-return for the drivers which don't support RET (i915g, r300g, r600g, svga). ir_to_mesa does not currently generate subroutines, but it's a matter of time till it's added. It would then break all the drivers which don't implement them, so this CAP makes sense. Signed-off-by: Marek Olšák <maraeo@gmail.com>
2010-11-21r300/compiler: Add a more efficient version of rc_find_free_temporary()Tom Stellard
2010-11-21r300/compiler: Enable rename_reg pass for r500 cardsTom Stellard
In addition, the rename_reg pass has been rewritten to use rc_get_readers().
2010-11-21r300/compiler: Use presubtract operations as much as possibleTom Stellard
Previously, presubtract operations where only being used by instructions with less than three source source registers.
2010-11-21r300/compiler: Convert RGB to alpha in the schedulerTom Stellard
2010-11-21r300/compiler: Track readers through branches in rc_get_readers()Tom Stellard
2010-11-21r300/compiler: Handle BREAK and CONTINUE in rc_get_readers()Tom Stellard
2010-11-21r300/compiler: Add rc_get_readers()Tom Stellard
2010-11-21r300/compiler: Ignore alpha dest register when replicating the resultTom Stellard
When the result of the alpha instruction is being replicated to the RGB destination register, we do not need to use alpha's destination register. This fixes an invalid "Too many hardware temporaries used" error in the case where a transcendent operation writes to a temporary register greater than max_temp_regs. NOTE: This is a candidate for the 7.9 branch.
2010-11-21r300/compiler: Use zero as the register index for unused sourcesTom Stellard
This fixes an invalid "Too many hardware temporaries used" error in the case where a source reads from a temporary register with an index greater than max_temp_regs and then the source is marked as unused before the register allocation pass. NOTE: This is a candidate for the 7.9 branch.
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