summaryrefslogtreecommitdiff
path: root/src/mesa
AgeCommit message (Collapse)Author
2009-03-31radeon/dri2: if the depth buffer is 16-bit force cpp == 2Dave Airlie
This is because the DDX always allocates using the drawable sizes. which gives me twice the depth buffer I asked for, dumb.
2009-03-31radeon: fix pixel readback for RGB8 testsDave Airlie
2009-03-31r200: fix glean pixelFormats regressionDave Airlie
2009-03-31r300: fix stencil clearsDave Airlie
2009-03-31r200: only set all dirty on kernel clearsDave Airlie
2009-03-31radeon/r200: fix glean failures on readPixSanity since EXT_DEPTH_STENCIL supportDave Airlie
2009-03-31r200: fix veclinear emissionDave Airlie
2009-03-30radeon: fix readback problem for piglit testsDave Airlie
2009-03-26radeon/r200/r300: set correct row stride for rbsDave Airlie
2009-03-26r300: check buffer sizes in non-tcl case + set correct VRAM limitsDave Airlie
2009-03-26radeon: fixup map/unmap texture to work with override BOsDave Airlie
if you hit this you've already failed but we shouldn't crash
2009-03-26r200: add fbo files to the compileDave Airlie
2009-03-24radeon/r200/r300: fix warningsDave Airlie
2009-03-24r300: remove lock.h linkDave Airlie
2009-03-24radeon: fixup some issue with fbos and sw fallbacksDave Airlie
2009-03-24radeon/r200/r300: set the texture depth correctly for DRI2Dave Airlie
2009-03-24radeon: actual format is rgba8Dave Airlie
2009-03-24radeon: fix typoDave Airlie
2009-03-24radeon: setup pipes for r300Dave Airlie
2009-03-24radeon: stupid mesa extension failDave Airlie
2009-03-23radeon: fixup wrapper bo nameDave Airlie
2009-03-23Merge branch 'radeon-fbo-hacking' into radeon-rewriteDave Airlie
2009-03-23raedon/r200/r300: mega-FBO commits.Dave Airlie
Re work depth issues. Do a lot more FBO abstactions fixup depth/stencil buffer interactions
2009-03-22radeon fbo: add draw offset calcsDave Airlie
2009-03-22radeon/r200/r300: add support for new tfp interfaceDave Airlie
also fixup old interface, gets rid of white boxes in compiz
2009-03-22Merge remote branch 'origin/master' into HEADDave Airlie
2009-03-22radeon: use mipmap fns in FBO codeDave Airlie
2009-03-22radeon: add miptree offset functionsDave Airlie
2009-03-21r200: fix for sureDave Airlie
2009-03-21radeon/r200: oops make correct fbo init callsDave Airlie
2009-03-21radeon: add xRGB span functionsDave Airlie
same as ARGB need to add a parameter to get ptr32
2009-03-21radeon: dri2 is hooked up elsewhere nowDave Airlie
2009-03-21radeon/r200: add fbo initDave Airlie
2009-03-21radeon/r200: add fbo state changesDave Airlie
2009-03-21r300: fix viewport inversion for FBOsDave Airlie
2009-03-21gallium: remove remaining references to origin_lower_leftKeith Whitwell
2009-03-21st: Silence compiler warnings.Michal Krol
2009-03-21radeon: align FBO pitchDave Airlie
2009-03-21radeon: fixup last missing x_off/y_offDave Airlie
2009-03-21radeon: add cpp/pitch to rrbDave Airlie
2009-03-21radeon/fbo: add x_off and y_off in correct placesDave Airlie
2009-03-21radeon: dPriv handling is now in cliprects codeDave Airlie
2009-03-21radeon: fixup span code for FBOsDave Airlie
2009-03-21r300: hw clear buffer 0 hopefullyDave Airlie
2009-03-21radeon: fix up span function settingDave Airlie
2009-03-20gallium: remove use of origin_lower_leftBrian Paul
This was used to indicate OpenGL's lower-left origin for fragment window coordinates for polygon stipple and gl_FragCoord. Now: - fragment coordinate origin is always upper-left corner - GL polygon stipple is inverted and shifted before given to gallium - GL fragment programs that use INPUT[WPOS] are modified to use an inverted window coord which is placed in a temp register. Note: the origin_lower_left field still exists in pipe_rasterizer_state. Remove it when all the drivers, etc. no longer reference it.
2009-03-20mesa: add new internal state var for window sizeBrian Paul
Actually, window width - 1, height - 1
2009-03-20mesa: linear scan register allocation for shader programsBrian Paul
This is a check-point commit; not turned on yet. Use the linear scan register allocation algorithm to re-allocate temporary registers. This is done by computing the live intervals for registers and reallocating temps with that information. For some shaders this dramatically reduces the number of temp registers needed. For the time being we give up on a few cases such as relative-indexed temps and subroutine calls (but we inline most GLSL functions anyway).
2009-03-20Fix DRI2 accelerated EXT_texture_from_pixmap with GL_RGB format.Eric Anholt
This requires upgrading the interface so that the argument to glXBindTexImageEXT isn't just dropped on the floor. Note that this only fixes the accelerated path on Intel, as Mesa's texture format support is missing x8r8g8b8 support (right now, GL_RGB textures get uploaded as a8r8gb8, but in this case we're not doing the upload so we can't really work around it that way). Fixes bugs with compositors trying to use shaders that use alpha channels, on windows without a valid alpha channel. Bug #19910 and likely others as well. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2009-03-20r300: init fbosDave Airlie