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2008-11-01mesa: additional debug flags for glsl debug/disassemblyBrian Paul
2008-11-01Fix for 58dc8b7: dest regions must not use HorzStride 0 in ExecSize 1Keith Packard
Quoting section 11.3.10, paragraph 10.2 of the 965PRM: 10.2. If ExecSize is 1, dst.HorzStride must not be 0. Note that this is relaxed from rule 10.1.2. Also note that this rule for destination horizontal stride is different from that for source as stated in rule #7. GM45 gets very angry when rule 10.2 is violated. Patch 58dc8b7 (i965: support destination horiz strides in align1 access mode) added support for additional horizontal strides in the ExecSize 1 case, but failed to notice that mesa occasionally re-purposes a register as a temporary destination, even though it was constructed as a repeating source with HorzStride = 0. While, ideally, we should probably fix the code using these register specifications, this patch simply rewrites them to use HorzStride 1 as the pre-58dc8b7 code did. Signed-off-by: Keith Packard <keithp@keithp.com>
2008-10-31mesa: fix some bugs with precision qualifier parsingBrian Paul
2008-10-31mesa: do scope replacement for variable initializers tooBrian Paul
2008-10-31mesa: fix copy/paste error in GLSL error msgBrian Paul
2008-10-31mesa: fix some bugs with precision qualifier parsingBrian Paul
2008-10-31mesa: do scope replacement for variable initializers tooBrian Paul
2008-10-31mesa: fix copy/paste error in GLSL error msgBrian Paul
2008-10-31intel: pixelzoom doesn't apply to glBitmap, so disable the fallback.Eric Anholt
2008-10-31intel: Remove fallback for glDrawPixels(GL_COLOR_INDEX)Eric Anholt
GL_COLOR_INDEX mode is just like other normal formats (that is, not depth/stencil) and is uploaded fine by TexImage.
2008-10-31intel: Add more fallback debugging for glDrawPixels.Eric Anholt
2008-10-31i965: implement the missing OPCODE_NOISE1 and OPCODE_NOISE2 instructions.Gary Wong
(Only in fragment shaders, so far. Support for NOISE3 and NOISE4 to come.)
2008-10-31i965: support destination horiz strides in align1 access mode.Gary Wong
This is required for scatter writes in destination regions to work.
2008-10-31mesa: fix a typo in the previous commitXiang, Haihao
2008-10-30mesa: fix an issue in _mesa_PointParameterfv().Xiang, Haihao
2008-10-28intel: Fix glDrawPixels with 4d RasterPos.Eric Anholt
2008-10-28i965: Fix check_aperture calls to cover everything needed for the prim at once.Eric Anholt
Previously, since my check_aperture API change, we would check each piece of state against the batchbuffer individually, but not all the state against the batchbuffer at once. In addition to not being terribly useful in assuring success, it probably also increased CPU load by calling check_aperture many times per primitive.
2008-10-28mesa: fix stand-alone glslcompiler buildBrian Paul
2008-10-28intel: Don't keep intel->pClipRects, and instead just calculate it when needed.Eric Anholt
This avoids issues with dereferencing stale cliprects around intel_draw_buffer time. Additionally, take advantage of cliprects staying constant for FBOs and DRI2, and emit cliprects in the batchbuffer instead of having to flush batch each time they change.
2008-10-28i965: Allocate temporaries contiguously with other regs in fragment shaders.Gary Wong
This is required for threads to be spawned with correctly sized GRF register blocks.
2008-10-27i965: Fix compiler warning from unused var.Eric Anholt
2008-10-27i965: Remove dead brw->wrap flag.Eric Anholt
2008-10-27intel: Use dri_bo_get_tiling to get tiling mode of buffers we get from names.Eric Anholt
Previously, we were trying to pass a name to the GEM GET_TILING_IOCTL, which needs a handle, and failing. None of our buffers were tiled yet, but they will be at some point with DRI2 and UXA.
2008-10-27Merge commit 'origin/master' into gallium-0.2Alan Hourihane
2008-10-27Merge remote branch 'origin/gallium-0.2' into gallium-0.2Ben Skeggs
2008-10-26intel: GL_FALSE on a BO if it won't be modified when mapping this BO. ↵Xiang, Haihao
(thanks Eric).
2008-10-24i965: don't emit state when dri_bufmgr_check_aperture_space fails.Xiang, Haihao
This ensures there is an unfilled batchbuffer used for emitting states again. Partial fix for #17964.
2008-10-24intel: fallback for intelEmitCopyBlit.Xiang, Haihao
Use _mesa_copy_rect instead of BLT operation if dri_bufmgr_check_aperture_space still fails after flushing batchbuffer. Partial fix for #17964.
2008-10-23mesa: remove calls to _mesa_adjust_image_for_convolution(), use texImage fieldsBrian Paul
The texImage->Width/Height fields will have the post-convolution width/height.
2008-10-23scons: ppc support.Michel Dänzer
2008-10-23gallium: Fix typo, PPC_FEATURE_HAS_ALTIVEC not PPC_FEATURES_...Michel Dänzer
2008-10-22mesa: move convolution image adjustment code for glCopyTexSubImage1/2/3D()Brian Paul
Do it after initial error checking, after we know the texture's internal format.
2008-10-22mesa: some re-org of glCopyTexSubImage1/2/3D() error checkingBrian Paul
2008-10-22mesa: in textore.c, only adjust image for convolution if image is a color formatBrian Paul
Makes things consistant with the code in teximage.c. We only want to apply convolution to color formats (not depth/index formats)
2008-10-21i915: fix carsh in i830_emit_state. (bug #17766)Xiang, Haihao
2008-10-20mesa: note that texcoords are generated by setup routines when pointsprite ↵Keith Whitwell
enabled
2008-10-18gallium: add some checks for null surface pointers in state trackerBrian Paul
Fixes some segfaults in low memory situations.
2008-10-17Merge commit 'origin/gallium-0.1' into gallium-0.2Brian Paul
Conflicts: progs/trivial/tri.c
2008-10-17gallium: fix mis-matched malloc/free vs. aligned malloc/freeBrian Paul
Use aligned malloc/free for teximage data everywhere to be consistant. The mismatch didn't make any difference when HAVE_POSIX_MEMALIGN was defined.
2008-10-16fix span issue with really old ddx and non-tcl r100 chipsRoland Scheidegger
2008-10-16mesa: fix error codes in _mesa_GetObjectParameterivARB(), bug 17861Brian Paul
2008-10-15Merge commit 'origin/gallium-0.1' into gallium-0.2Keith Whitwell
Conflicts: src/mesa/main/context.c
2008-10-15i915: Texture instructions use r/t/oC/oD register as texture coordinate.Xiang, Haihao
Fix http://bugs.freedesktop.org/show_bug.cgi?id=16287.
2008-10-15intel: Add acceleration for glDrawPixels(GL_STENCIL_INDEX).Eric Anholt
This is nasty because there's no way in GL to output data to the stencil buffer directly, so we have to do a dance to wrap the depth/stencil buffer in an ARGB renderbuffer. Improves performance of several oglconform testcases by better than a factor of 2.
2008-10-15Merge remote branch 'origin/gallium-0.2' into gallium-0.2Ben Skeggs
2008-10-14mesa: modify fixed function vertex programs not to reference constant attributesKeith Whitwell
2008-10-14dri: don't check the number of cliprects before swap, letAlan Hourihane
the swap handle the requirements.
2008-10-13mesa: when emitting an address load instruction, forAlan Hourihane
indexed elements ensure we write to a single register.
2008-10-13i915: Texture instructions use r/t/oC/oD register as texture coordinate.Xiang, Haihao
Fix http://bugs.freedesktop.org/show_bug.cgi?id=16287.
2008-10-11intel: Add acceleration for glDrawPixels(GL_STENCIL_INDEX).Eric Anholt
This is nasty because there's no way in GL to output data to the stencil buffer directly, so we have to do a dance to wrap the depth/stencil buffer in an ARGB renderbuffer. Improves performance of several oglconform testcases by better than a factor of 2.
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