| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-03-06 | i965: check if we run out of GRF/temp registers | Brian Paul | |
| Before this change we would up emitting instructions with invalid register numbers. This typically (but not always) hung the GPU. For now, just prevent emitting bad instructions to avoid hangs. Still need to do some kind of proper error recovery. | |||
| 2009-03-06 | mesa: added _mesa_read_shader() function to read shaders from files | Brian Paul | |
| Useful for debugging to override an application's shader. | |||
| 2009-03-06 | i965: bump up BRW_EU_MAX_INSN | Brian Paul | |
| This is the size of the intermediate instruction buffer. | |||
| 2009-03-06 | mesa: add new program optimizer code | Brian Paul | |
| This is pretty simplistic for now, but helps with certain shaders. | |||
| 2009-03-06 | i965: comments | Brian Paul | |
| 2009-03-06 | i965: comments and minor clean-ups | Brian Paul | |
| 2009-03-06 | i965: avoid unnecessary calls to brw_wm_is_glsl() | Brian Paul | |
| This function scans the shader to see if it has any GLSL features like conditionals and loops. Calling this during state validation is expensive. Just call it when the shader is given to the driver and save the result. There's some new/temporary assertions to be sure we don't get out of sync on this. | |||
| 2009-03-06 | r300: fix depth write regression (found by Nicolai Haehnle) | Maciej Cencora | |
| Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
| 2009-03-06 | r300: enable EXT_fog_coord extension | Maciej Cencora | |
| Remove fixed function fog setup. Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
| 2009-03-06 | r300: route fog coord and W pos correctly | Maciej Cencora | |
| Also cleanup sw tcl vertex buffer setup Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
| 2009-03-06 | r300: rewrite and hopefully simplify RS setup | Maciej Cencora | |
| Testing and regression fixes by Markus Amsler Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
| 2009-03-06 | r300: add few macros for RS setup | Maciej Cencora | |
| Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
| 2009-03-06 | r300: silence valgrind | Maciej Cencora | |
| Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
| 2009-03-06 | r300: Print reg address when debugging is enabled | Maciej Cencora | |
| Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com> | |||
| 2009-03-06 | r300: don't crash on sw tcl hw if point size vertex attrib is sent | Maciej Cencora | |
| 2009-03-06 | r300-gallium: GA enhancements. | Corbin Simpson | |
| Basically an errata fixup register. | |||
| 2009-03-06 | r300-gallium: Flat/smooth shading state. | Corbin Simpson | |
| 2009-03-06 | r300-gallium: Pick up a few more bits of rs_state. | Corbin Simpson | |
| Including two registers that already should have been covered...huh... | |||
| 2009-03-06 | wgl: Check support for all other depth/stencil formats. | José Fonseca | |
| 2009-03-06 | wgl: Choose a supported S8Z24/Z24S8/X8Z24/Z24X8. | José Fonseca | |
| 2009-03-06 | mesa: Reads must also be done with lock held. | José Fonseca | |
| Otherwise two threads might think each made the refcount go zero. | |||
| 2009-03-06 | mesa: Fix typo. | José Fonseca | |
| Windows threads block if one over-unlocks them. | |||
| 2009-03-05 | intel: Fix bpp setting of blits to 8bpp targets. | Eric Anholt | |
| This was causing hangs in cairogears, as we would blit to the 8bpp target (A8 texture) as 16bpp, and stomp over state objects. | |||
| 2009-03-05 | i965: fix 3DPRIMITIVE batch decode of the vertex count field. | Eric Anholt | |
| 2009-03-05 | i965: Stop dumping programs after the first all-zeroes entry. | Eric Anholt | |
| 2009-03-05 | intel: Add always_flush_batch driconf option for making small batchbuffers. | Eric Anholt | |
| This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller batchbuffers. | |||
| 2009-03-05 | intel: Add always_flush_cache driconf option for debugging cache flush failure. | Eric Anholt | |
| I keep wanting to hack this knob in as a one-time thing, so it seemed useful to have all the time. | |||
| 2009-03-05 | i965: Add a note about why the _NEW_STENCIL is required in draw_buffers. | Eric Anholt | |
| 2009-03-05 | intel: Remove a gratuitous MI_FLUSH after clearing with a blit. | Eric Anholt | |
| The 3D destination shares the same cache so we don't have any trouble with the later commands needing the writes flushed inside of the same batchbuffer. | |||
| 2009-03-05 | i965: Remove dead flushing code. | Eric Anholt | |
| 2009-03-06 | st/xorg: Install to XORG_DRIVER_INSTALL_DIR | Joel Bosveld | |
| 2009-03-05 | i965: comments and formatting fixes | Brian Paul | |
| 2009-03-05 | i965: fix emit_math1() function used for scalar instructions | Brian Paul | |
| Instructions such as RCP, RSQ, LOG must smear the result of the function across the dest register's X, Y, Z and W channels (subject to write masking). Before this change, only the X component was getting written. Among other things, this fixes cube map texture sampling in GLSL shaders (since cube lookups involve normalizing the texcoord). | |||
| 2009-03-05 | mesa: added some assertions | Brian Paul | |
| 2009-03-05 | mesa: when printing src regs, use |reg| for absolute value | Brian Paul | |
| And check opcode number to avoid crashing on driver-private opcodes. | |||
| 2009-03-05 | i965: fix screen depth test in intel_validate_framebuffer)_ | Brian Paul | |
| front_region may be null. | |||
| 2009-03-05 | i965: init dest reg CondMask = COND_TR (the proper default) | Brian Paul | |
| Plus fix up a debug printf. | |||
| 2009-03-05 | r300-gallium: Move RS block setup to CSO. | Corbin Simpson | |
| 2009-03-05 | r300-gallium: Move scissor state. | Corbin Simpson | |
| Keep it grouped with all the other parameterized state. | |||
| 2009-03-05 | r300-gallium: Fix up vertex count. | Corbin Simpson | |
| 2009-03-05 | r300-gallium: Use only one CS section for vertex_format. | Corbin Simpson | |
| 2009-03-05 | Revert "softpipe: added null ptr check for align_free() call in vbuf code" | Brian Paul | |
| This reverts commit 6db24f449de9cc81e1f7bb2dde55a9819463d5e5. With a null ptr check in align_free() this is no longer needed. | |||
| 2009-03-05 | gallium: added null ptr check in align_free() | Brian Paul | |
| 2009-03-05 | softpipe: added null ptr check for align_free() call in vbuf code | Brian Paul | |
| Fixes GALLIUM_NOCELL path. See bug 20475. | |||
| 2009-03-05 | r300-gallium: C++ compat fix. | Corbin Simpson | |
| Oops. :3 | |||
| 2009-03-05 | radeon-gallium: fix dri2 build | Joakim Sindholt | |
| 2009-03-04 | radeon-gallium: Add Xorg state tracker Radeon winsys stub. | Corbin Simpson | |
| 2009-03-04 | radeon-gallium: Only build drivers for state trackers that are enabled. | Corbin Simpson | |
| 2009-03-04 | i965: add software fallback for conformant 3D textures and GL_CLAMP | Robert Ellison | |
| The i965 hardware cannot do GL_CLAMP behavior on textures; an earlier commit forced a software fallback if strict conformance was required (i.e. the INTEL_STRICT_CONFORMANCE environment variable was set) and 2D textures were used, but it was somewhat flawed - it could trigger the software fallback even if 2D textures weren't enabled, as long as one texture unit was enabled. This fixes that, and adds software fallback for GL_CLAMP behavior with 1D and 3D textures. It also adds support for a particular setting of the INTEL_STRICT_CONFORMANCE environment variable, which forces software fallbacks to be taken *all* the time. This is helpful with debugging. The value is: export INTEL_STRICT_CONFORMANCE=2 | |||
| 2009-03-04 | radeon-gallium: Enable EGL and Xorg state trackers. | Corbin Simpson | |
| Compile-tested only, but I have high hopes. | |||
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index : android-x86-mesa.git | |
| Androïd/x86 port of Mesa drivers | Hugues Hiegel |
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