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x86_64 is also supported.
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Signed-off-by: Alan Coopersmith <alan.coopersmith@sun.com>
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Signed-off-by: Alan Coopersmith <alan.coopersmith@sun.com>
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Signed-off-by: Alan Coopersmith <alan.coopersmith@sun.com>
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This fixes rebuilding of the library every time we run make.
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buffers."
This scheme breaks when the display connection doesn't receive ConfigureNotify
events. This caused reporoducible problems (cropped / misplaced output) when
starting a 3D application in a guest operating system in VMware Workstation.
This reverts commit dd1c68f15123a889a3ce9d2afe724e272d163e32.
Conflicts:
src/glx/x11/dri2_glx.c
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progs/trivial/clear no longer is horrifically wrong, just kind of wrong.
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Fixes Sun cc error:
"r300_cmdbuf.c", line 142: invalid cast expression
Signed-off-by: Alan Coopersmith <alan.coopersmith@sun.com>
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Since core Mesa MAX_TEXTURE_LEVELS was bumped, we were incorrectly advertising
a maximum texture size of 4096 on older chips, causing corrupted menu text in
Extreme Tux Racer or Armagetron.
Also make sure our texture image array can actually hold all the mipmap levels
we support...
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To distinguish from the -0.2 version still being maintained on the
gallium-mesa-7.4 branch. There are already greater interface changes
between these two branches than there were between -0.2 and -0.1.
Also stop injecting Tungsten into the vendor string - the Gallium in
the renderer string should be sufficient.
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The FBO pixel coordinate system, with (0,0) as the
upper-left pixel, is inverted in Y compared to the
normal OpenGL pixel coordinate system, which has
(0,0) as its lower-left pixel.
Viewport and polygon stipple are sensitive to this
inversion; so is point rasterization. The basic
fix is simple: when rendering to an FBO, instead
of the normal RASTRULE_UPPER_RIGHT that's
appropriate for OpenGL windows, use the Y inversion
RASTRULE_LOWER_RIGHT.
Unfortunately, current Intel documentation has this
value listed as "Reserved, but not seen as useful".
It does work on at least some i965-class devices,
though; and the worst that could happen if an
older device didn't support it would be incorrect
point rasterization to FBOs, which is what happens
already, so this fix is at least no worse than what
happens presently, and is better for some (and possibly
all) i965-class devices.
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This also cuts instructions by just using the existing bit in the payload
rather than computing it from the determinant in the SF unit and passing it
as a varying down to the WM. Something still goes wrong with getting the
backface color right, but a simpler shader appears to get the right result.
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Previously, we would sample (f,glFrontFacing,undef,undef) instead of the
(f,0,0,1) that fragment.fogcoord is supposed to return. Due to
glFrontFacing's presence in FOGC.y, we'll still give bad results there when
glFrontFacing is used.
Bug #19122, piglit testcase fp-fog.
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Turns out that XXX comment was important. We weren't flagging the WM to
re-update with the statistics enable, so we got zeroes out of our query.
Bug #20740, fixes piglit occlusion_query test.
Signed-off-by: Eric Anholt <eric@anholt.net>
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This was used to indicate OpenGL's lower-left origin for fragment window
coordinates for polygon stipple and gl_FragCoord.
Now:
- fragment coordinate origin is always upper-left corner
- GL polygon stipple is inverted and shifted before given to gallium
- GL fragment programs that use INPUT[WPOS] are modified to use an
inverted window coord which is placed in a temp register.
Note: the origin_lower_left field still exists in pipe_rasterizer_state.
Remove it when all the drivers, etc. no longer reference it.
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Actually, window width - 1, height - 1
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This is a check-point commit; not turned on yet.
Use the linear scan register allocation algorithm to re-allocate temporary
registers. This is done by computing the live intervals for registers and
reallocating temps with that information.
For some shaders this dramatically reduces the number of temp registers
needed.
For the time being we give up on a few cases such as relative-indexed temps
and subroutine calls (but we inline most GLSL functions anyway).
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*pulls paper bag down over head*
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Guess it was a mistake in the first place. Oops.
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Deck chairs on the Hindenburg. :3
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As per r300_reg, classic Mesa, and xf86-video-ati.
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Some compile warnings, some statements without effect.
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Add a module that will manage uploading and coalescing multiple
user-buffers, malloc-buffers and other random data that doesn't
happen to be in a GPU buffer already. The module stuffs multiple
little uploads into larger GPU buffers to reduce create/destroy
overheads, etc.
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This requires upgrading the interface so that the argument to
glXBindTexImageEXT isn't just dropped on the floor. Note that this only
fixes the accelerated path on Intel, as Mesa's texture format support is
missing x8r8g8b8 support (right now, GL_RGB textures get uploaded as a8r8gb8,
but in this case we're not doing the upload so we can't really work around it
that way).
Fixes bugs with compositors trying to use shaders that use alpha channels, on
windows without a valid alpha channel. Bug #19910 and likely others as well.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
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