Age | Commit message (Collapse) | Author |
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Pending commands to the previous context aren't flushed since commit b4bb668
Reported-by: Oleksiy Krivoshey <oleksiyk@gmail.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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(Marek: added the initializion of "vec" in the default statement)
NOTE: This is a candidate for the 7.9 branch.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
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Are these functions actually used anywhere?
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Add explicit EVENT_TYPE field
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Signed-off-by: Brian Paul <brianp@vmware.com>
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This fixes piglit/glsl-vs-main-return and glsl-fs-main-return for the drivers
which don't support RET (i915g, r300g, r600g, svga).
ir_to_mesa does not currently generate subroutines, but it's a matter of time
till it's added. It would then break all the drivers which don't implement
them, so this CAP makes sense.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
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This fixes fdo bug 31810.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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In addition, the rename_reg pass has been rewritten to use
rc_get_readers().
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Previously, presubtract operations where only being used by instructions
with less than three source source registers.
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When the result of the alpha instruction is being replicated to the RGB
destination register, we do not need to use alpha's destination register.
This fixes an invalid "Too many hardware temporaries used" error in
the case where a transcendent operation writes to a temporary register
greater than max_temp_regs.
NOTE: This is a candidate for the 7.9 branch.
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This fixes an invalid "Too many hardware temporaries used" error in the
case where a source reads from a temporary register with an index greater
than max_temp_regs and then the source is marked as unused before the
register allocation pass.
NOTE: This is a candidate for the 7.9 branch.
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Reads of registers that where not written to within the same block were
not being tracked. So in a situations like this:
0: IF
1: ADD t0, t1, t2
2: MOV t2, t1
Instruction 2 didn't know that instruction 1 read from t2, so
in some cases instruction 2 was being scheduled before instruction 1.
NOTE: This is a candidate for the 7.9 branch.
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NOTE: This is a candidate for the 7.9 branch.
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NOTE: This is a candidate for the 7.9 branch.
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Gallium drivers pass all piglit tests for the two (there are 12 tests
for separate_shader_objects and 5 tests for explicit_attrib_location),
and I was told the extensions don't need any driver-specific code.
I made them dependent on PIPE_CAP_GLSL.
Signed-off-by: Brian Paul <brianp@vmware.com>
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Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31779
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Fix up some details in the xml files and regenerate dispatch files.
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The drm winsys only ever handles one gem memory manager. Rip out
the unnecessary complication.
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Not using the gtt is considered harmful for performance. And for
partial uploads there's always drm_intel_bo_subdata.
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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It's intel, so always little endian!
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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More in line with other intel drivers.
Change to use enum by Jakob Bornecrantz.
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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It looks like this was meant to facilitate unfenced access to textures/
color/renderbuffers. It's totally incomplete and fundamentally broken
on a few levels:
- broken: The kernel needs to about every tiled bo to fix up bit17
swizzling on swap-in.
- unflexible: fenced/unfenced relocs from execbuffer2 do the same, much
simpler.
- unneeded: with relaxed fencing tiled gem bos are as memory-efficient
as this trick.
Hence kill it.
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
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Somebody should find out what these are. It can be found on Windows
getting a D3DCAPS9 from IDirect3D9::GetCaps() and reading the
GuardBand* values.
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Fix a crash when the subrectangle is not inside the fb. Fix wrong
pipe transfer when sx > 0 or sy + height != fb->height.
This fixes "readpixels" demo.
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These two samplers use non-normalized texture coordinates. wrap_r
cannot be PIPE_TEX_WRAP_REPEAT (the default).
This fixes
sp_tex_sample.c:1790:get_linear_unorm_wrap: Assertion `0' failed
assertion failure.
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Fix "lookup" demo crash.
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Fix OpenVG "filter" demo
Program received signal SIGSEGV, Segmentation fault.
0xb7153dc9 in str_match_no_case (pcur=0xbfffe564, str=0x0) at
tgsi/tgsi_text.c:86
86 while (*str != '\0' && *str == uprcase( *cur )) {
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