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2011-02-24gallium/utils: Fix vertex element setupFabian Bieler
Check if element was translated per element instead of per buffer.
2011-02-24svga: Ensure rendertargets and textures are always rebound at every command ↵José Fonseca
buffer start. The svga_update_state() mechanism is inadequate as it will always end up flushing the primitives before processing the SVGA_NEW_COMMAND_BUFFER dirty state flag.
2011-02-24i965: Remember to pack the constant blend color as floats into the batchChris Wilson
Fixes regression from aac120977d1ead319141d48d65c9bba626ec03b8. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34597 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-24intel: Reset the buffer offset after releasing reference to packed uploadChris Wilson
Fixes oglc/vbo(basic.bufferdata) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34603 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-24i965: Unmap the correct pointer after discontiguous uploadChris Wilson
Fixes piglit/fbo-depth-sample-compare: ==14722== Invalid free() / delete / delete[] ==14722== at 0x4C240FD: free (vg_replace_malloc.c:366) ==14722== by 0x84FBBFD: intel_upload_unmap (intel_buffer_objects.c:695) ==14722== by 0x85205BC: brw_prepare_vertices (brw_draw_upload.c:457) ==14722== by 0x852F975: brw_validate_state (brw_state_upload.c:394) ==14722== by 0x851FA24: brw_draw_prims (brw_draw.c:365) ==14722== by 0x85F2221: vbo_exec_vtx_flush (vbo_exec_draw.c:389) ==14722== by 0x85EF443: vbo_exec_FlushVertices_internal (vbo_exec_api.c:543) ==14722== by 0x85EF49B: vbo_exec_FlushVertices (vbo_exec_api.c:973) ==14722== by 0x86D6A16: _mesa_set_enable (enable.c:351) ==14722== by 0x42CAD1: render_to_fbo (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) ==14722== by 0x42CEE3: piglit_display (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) ==14722== by 0x42F508: display (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) ==14722== Address 0xc606310 is 0 bytes after a block of size 18,720 alloc'd ==14722== at 0x4C244E8: malloc (vg_replace_malloc.c:236) ==14722== by 0x85202AB: copy_array_to_vbo_array (brw_draw_upload.c:256) ==14722== by 0x85205BC: brw_prepare_vertices (brw_draw_upload.c:457) ==14722== by 0x852F975: brw_validate_state (brw_state_upload.c:394) ==14722== by 0x851FA24: brw_draw_prims (brw_draw.c:365) ==14722== by 0x85F2221: vbo_exec_vtx_flush (vbo_exec_draw.c:389) ==14722== by 0x85EF443: vbo_exec_FlushVertices_internal (vbo_exec_api.c:543) ==14722== by 0x85EF49B: vbo_exec_FlushVertices (vbo_exec_api.c:973) ==14722== by 0x86D6A16: _mesa_set_enable (enable.c:351) ==14722== by 0x42CAD1: render_to_fbo (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) ==14722== by 0x42CEE3: piglit_display (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) ==14722== by 0x42F508: display (in /home/ickle/git/piglit/bin/fbo-depth-sample-compare) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34604 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-24intel: Protect against waiting on a NULL render target boChris Wilson
If we fall back to software rendering due to the render target being absent (GPU hang or other error in creating the named target), then we do not need to nor should we wait upon the results. Reported-by: Magnus Kessler <Magnus.Kessler@gmx.net> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34656 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-24r600g: EXT_texture_array support.Dave Airlie
This adds EXT_texture_array support to r600g, it passes the piglit array-texture test but I suspect may not be complete. It currently requires a kernel patch to fix the CS checker to allow these, so you need to use R600_ARRAY_TEXTURE=true for now to enable them. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-24st/mesa: treat 1D ARRAY upload like a depth or 2D array upload.Dave Airlie
This is because the HW doesn't always store a 1D array like a 2D texture, it more likely stores it like 2D texture (i.e. alignments etc). This means we upload each slice separately and let the driver work out where to put it. this might break nvc0 as I can't test it, I have only nv50 here. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-23scons: Fix Cygwin platform names.Vinson Lee
Fixes immediate Python exceptions with SCons on Cygwin.
2011-02-24i915g: Lazy emit dynamic stateJakob Bornecrantz
2011-02-24i915g: Lazy emit immediate stateJakob Bornecrantz
2011-02-24i915g: Disable LIS7 state updates for nowJakob Bornecrantz
2011-02-24i915g: Clean up in i915_state_immediateJakob Bornecrantz
2011-02-24i915g: Remove outdated commentJakob Bornecrantz
2011-02-24i915g: Use dump function in sw winsysJakob Bornecrantz
2011-02-24i915g: Enable mirror repeat wrap modeJakob Bornecrantz
2011-02-24i915g: Always set vbo to flush on flushesJakob Bornecrantz
Reported-by Chris Wilson <chris@chris-wilson.co.uk>
2011-02-23intel: gen3 is particular sensitive to batch sizeChris Wilson
... and prefers a small batch whereas gen4+ prefer a large batch to carry more state. Tuning using openarena/padman indicate that a batch size of just 4096 is best for those cases. Bugzilla: https://bugs.freedesktop.org/process_bug.cgi Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-23i915: And remember assign the new value to the state reg...Chris Wilson
Fixes regression from 298ebb78de8a6b6edf0aa0fe8d784d00bbc2930e. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34589 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-23r600g: Request DWORD aligned vertex buffers.Fabian Bieler
The spec says that the offsets in the vertex-fetch instructions need to be byte-aligned and makes no specification with regard to the required alignment of the offset and stride in the vertex resource constant register. However, testing indicates that all three values need to be DWORD aligned.
2011-02-23st/mesa: fix computing the lowest address for interleaved attribsWiktor Janas
Ptr can be very well NULL, so when there are two arrays, with one having offset 0 (and thus NULL Ptr), and the other having a non-zero offset, the non-zero value is taken as minimum (because of !low_addr ? start ...). On 32-bit systems, this somehow works. On 64-bit systems, it leads to crashes. Signed-off-by: Marek Olšák <maraeo@gmail.com>
2011-02-22vbo: added vbo_check_buffers_are_unmapped() debug functionBrian Paul
2011-02-22vbo: removed unused #defines, add commentsBrian Paul
2011-02-22mesa: move comment, change debug codeBrian Paul
2011-02-22vbo: simplify NeedFlush flag clearingBrian Paul
2011-02-22vbo: use ctx intstead of exec->ctxBrian Paul
2011-02-22r300g: fix missing initializers warningBrian Paul
2011-02-22i915g: remove extra semicolonsBrian Paul
2011-02-22xlib: pass Display pointer to XMesaGarbageCollect()Andy Skinner
Fixes an issue when different displays are used on different threads. Signed-off-by: Brian Paul <brianp@vmware.com>
2011-02-22i965: Increase Sandybridge point size clamp.Kenneth Graunke
255.875 matches the hardware documentation. Presumably this was a typo. Found by inspection. Not known to fix any issues. Reviewed-by: Eric Anholt <eric@anholt.net>
2011-02-22i965/fs: Correctly set up gl_FragCoord.w on Sandybridge.Kenneth Graunke
pixel_w is the final result; wpos_w is used on gen4 to compute it. NOTE: This is a candidate for the 7.10 branch. Reviewed-by: Eric Anholt <eric@anholt.net>
2011-02-22i965/fs: Refactor control flow stack handling.Kenneth Graunke
We can't safely use fixed size arrays since Gen6+ supports unlimited nesting of control flow. NOTE: This is a candidate for the 7.10 branch. Reviewed-by: Eric Anholt <eric@anholt.net>
2011-02-22i965/fs: Avoid register coalescing away gen6 MATH workarounds.Kenneth Graunke
The code that generates MATH instructions attempts to work around the hardware ignoring source modifiers (abs and negate) by emitting moves into temporaries. Unfortunately, this pass coalesced those registers, restoring the original problem. Avoid doing that. Fixes several OpenGL ES2 conformance failures on Sandybridge. NOTE: This is a candidate for the 7.10 branch. Reviewed-by: Eric Anholt <eric@anholt.net>
2011-02-22i965/fs: Apply source modifier workarounds to POW as well.Kenneth Graunke
Single-operand math already had these workarounds, but POW (the only two operand function) did not. It needs them too - otherwise we can hit assertion failures in brw_eu_emit.c when code is actually generated. NOTE: This is a candidate for the 7.10 branch. Reviewed-by: Eric Anholt <eric@anholt.net>
2011-02-22i965: Fix shaders that write to gl_PointSize on Sandybridge.Kenneth Graunke
gl_PointSize (VERT_RESULT_PSIZ) doesn't take up a message register, as it's part of the header. Without this fix, writing to gl_PointSize would cause the SF to read and use the wrong attributes, leading to all kinds of random looking failure. Reviewed-by: Eric Anholt <eric@anholt.net>
2011-02-22mesa: Avoid undeclared ffs function warning on mingw.José Fonseca
2011-02-22gallium: s/PIPE_TRANSFER_CPU_READ/PIPE_TRANSFER_READ/ in comments.José Fonseca
2011-02-22gallium/docs: Update PIPE_TRANSFER_xx docs. Reformat to use definitions.José Fonseca
2011-02-22gallium: new transfer flag: DISCARD_WHOLE_RESOURCEKeith Whitwell
2011-02-20st/mesa: fix crash when using both user and vbo buffers with the same strideMarek Olšák
If two buffers had the same stride where one buffer is a user one and the other is a vbo, it was considered to be one interleaved buffer, resulting in incorrect rendering and crashes. This patch makes sure that the interleaved buffer is either user or vbo, not both.
2011-02-20st/mesa: fix crash when DrawBuffer->_ColorDrawBuffers[0] is NULLMarek Olšák
This fixes the game Tiny and Big.
2011-02-22i965: Trim the interleaved upload to the minimum number of verticesChris Wilson
... should have no impact on a properly formatted draw operation. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-22i965: Reinstate max-index paranoiaChris Wilson
Don't trust the applications not to reference beyond the end of the vertex buffers. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-22i965: Zero the offset into the vbo when uploading non-interleavedChris Wilson
Fixes regression from 559435d9152acc7162e4e60aae6591c7c6c8274b. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-20st/dri: Track drawable context bindingsJakob Bornecrantz
Needs to track this ourself since because we get into a race condition with the dri_util.c code on make current when rendering to the front buffer. This is what happens: Old context is rendering to the front buffer. App calls MakeCurrent with a new context. dri_util.c sets drawable->driContextPriv to the new context and then calls the driver make current. st/dri make current flushes the old context, which calls back into st/dri via the flush frontbuffer hook. st/dri calls dri loader flush frontbuffer, which calls invalidate buffer on the drawable into st/dri. This is where things gets wrong. st/dri grabs the context from the dri drawable (which now points to the new context) and calls invalidate framebuffer to the new context which has not yet set the new drawable as its framebuffers since we have not called make current yet, it asserts.
2011-02-21i965: Fix VB packet reuse when offset for the new buffer isn't stride aligned.Eric Anholt
Fixes regression in scissor-stencil-clear and 5 other tests.
2011-02-21Revert "mesa: convert macros to inline functions"Brian Paul
This reverts commit e9ff76aa81d9bd973d46b7e46f1e4ece2112a5b7. Need to use macros so __FUNCTION__ reports the caller.
2011-02-21st/mesa: need to translate clear color according to surface's base formatBrian Paul
When clearing a GL_LUMINANCE_ALPHA buffer, for example, we need to convert the clear color (R,G,B,A) to (R,R,R,A). We were doing this for texture border colors but not renderbuffers. Move the translation function to st_format.c and share it. This fixes the piglit fbo-clear-formats test. NOTE: This is a candidate for the 7.9 and 7.10 branches.
2011-02-21st/mesa: fix the default case in st_format_datatype()Brian Paul
Part of the fix for piglit fbo-clear-formats NOTE: This is a candidate for the 7.9 and 7.10 branches.
2011-02-21i915g: add some throttlingDaniel Vetter
Intel classic drivers switched to this, too, so it must be good. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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