Age | Commit message (Collapse) | Author |
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Variadic functions can't be inlined which makes debugging to have quite large
function overead. Only aleternative method is to use variadic macros which are
inlined so compiler can optimize debugging to minimize overhead.
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Conflicts:
Makefile
configs/default
progs/glsl/Makefile
src/gallium/auxiliary/util/u_simple_shaders.c
src/gallium/state_trackers/glx/xlib/xm_api.c
src/mesa/drivers/dri/i965/brw_draw_upload.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/intel/intel_context.h
src/mesa/drivers/dri/intel/intel_pixel.c
src/mesa/drivers/dri/intel/intel_pixel_read.c
src/mesa/main/texenvprogram.c
src/mesa/main/version.h
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Works around a bug found on i965. See bug 23670.
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I'm not 100% sure there'll be a 7.5.2 release, but just in case.
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(cherry picked from commit c80ce5ac90b1e0ac7a72cd41c314aa2000bfecf5)
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(cherry picked from commit df70d3049a396af3601d2a1747770635a74120bb)
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We could have mapped the wrong set of draw buffers. Noticed while looking
into a DRI2 glean ReadPixels issue.
(cherry picked from commit afc981ee46791838f3cb83e11eb33938aa3efc83)
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(cherry picked from commit dcfe0d66bfff9a55741aee298b7ffb051a48f0d3)
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(cherry picked from commit 99174e7630676307f618c252755a20ba61ad9158)
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(cherry picked from commit a70e1315846cd5e8d6f2b622821ff8262fe7179d)
(cherry picked from commit 29e51c3872531366570d032147abad50f8a3c1af)
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This may or may not be required pre-965, but it doesn't seem unlikely, and
I'd rather be safe.
(cherry picked from commit b053474378633249be0e9f24010650ffb816229a)
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For some IZ setups, we'd forget to account for the source depth register
being present, so we'd both read the wrong reg, and write output depth to
the wrong reg.
Bug #22603.
(cherry picked from commit f44916414ecd2b888c8a680d56b7467ccdff6886)
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Fixes piglit glsl-vs-if-bool and progs/glsl/twoside, and will likely be
useful for the looping code.
Bug #18992
(cherry picked from commit 78c022acd0b37bf8b32f04313d76255255e769c1)
(cherry picked from commit 63d7a2f53fb38e170f4e55f2b599e918edf2c512)
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(cherry picked from commit fd7d764514c540987549c3ea88a2d669b0f0ea58)
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Previously, we'd be branching based on whatever condition code happened to be
laying around.
(cherry picked from commit 7007f8b352763af89805f287153cb7972bff0523)
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Bug #20821
(cherry picked from commit 191e028de20b2f954621b652aa77b06d0e93652a)
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This avoids sending a bad buffer address to the GPU due to programmer error,
and is permitted by the ARB_vbo spec. Note that we still have the opportunity
to dereference past the end of the GPU, because we aren't clipping to a
correct _MaxElement, but that appears to be harder than it should be. This
gets us the 90% solution.
Bug #19911.
(cherry picked from commit d7430d942f6c7950a92367aeb13b80cf76ccad78)
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See comment on Vertex URB Entry Read Length for VS_STATE.
This, combined with the previous three commits, fixes #22945.
(cherry picked from commit e340d4f9866db4bae391288e83a630a310b0dd2b)
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This fix is just from code and docs inspection, but it may fix hangs on
some applications.
(cherry picked from commit e93848e595176ae0bad3bfe64e0ca63fd089bb72)
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It appears that sometimes Mesa (and I suppose a VS could as well) emits
a program which references no vertex data, and thus we end up with
nr_enabled == 0 even though some VBs are enabled. We'd end up emitting
VB/VE packet headers of 0xffffffff in that case, leading to GPU hangs.
Bug #22945 (wine with an uncompiled VS)
(cherry picked from commit d1fbfd0f962347e4153db3852292d44de5aea863)
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The code duplication bothered me.
(cherry picked from commit 9b9cb30d128fc5f1ba77287696ecd508e640efde)
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It's the last addressable byte, not the byte after the end of the buffer.
(cherry picked from commit b72dea5441e8e9226dabf1826fa3bc129c7bc281)
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(cherry picked from commit 840c09fc71542fdfc71edd2a2802925d467567bb)
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Patch from taiu on IRC. fixes bug 23585
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Fixes compilation warnings with MSVC.
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Fixes symbol collisions with typedefs in Microsoft headers.
Perhaps we should prefix/suffix all the lexer tokens to avoid this.
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scons build complained about void pointer math
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If the renderbuffer orientation is Y=0=TOP we need to invert the dstY
position.
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State tracker currently backs GL_RGB textures with RGBA almost always.
This means we need to maintain A==1 in these textures to give correct GL_RGB
sampling results.
This change offloads the RGBA->RGB copy to hardware using the new writemask
version of u_blit_pixels.
More src/dstLogical/dstActual triples could be shifted to hardware by
this technique in future patches.
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Values outside the writemask are set in the destination to {0,0,0,1}
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Setup the regs when we emit rather than during state setup.
In certain cases a proper CB target was never emitted.
This fixes bug 23658.
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If the renderbuffer orientation is Y=0=TOP we need to invert the dstY
position.
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There's a symbol collision with X11/Xlib.h #define Status int
in the Mesa xlib code. This seems the simpliest way to work around this.
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