From dc8058c3370588bfcad49fadace1691da47d58cd Mon Sep 17 00:00:00 2001 From: Adam Jackson Date: Fri, 19 Sep 2008 17:16:53 -0400 Subject: Update to SGI FreeB 2.0. Under the terms of version 1.1, "once Covered Code has been published under a particular version of the License, Recipient may, for the duration of the License, continue to use it under the terms of that version, or choose to use such Covered Code under the terms of any subsequent version published by SGI." FreeB 2.0 license refers to "dates of first publication". They are here taken to be 1991-2000, as noted in the original license text: ** Original Code. The Original Code is: OpenGL Sample Implementation, ** Version 1.2.1, released January 26, 2000, developed by Silicon Graphics, ** Inc. The Original Code is Copyright (c) 1991-2000 Silicon Graphics, Inc. ** Copyright in any portions created by third parties is as indicated ** elsewhere herein. All Rights Reserved. Official FreeB 2.0 text: http://oss.sgi.com/projects/FreeB/SGIFreeSWLicB.2.0.pdf As always, this code has not been tested for conformance with the OpenGL specification. OpenGL conformance testing is available from http://khronos.org/ and is required for use of the OpenGL logo in product advertising and promotion. --- include/GLES/egl.h | 60 +++++++++++++++++++++++++----------------------------- 1 file changed, 28 insertions(+), 32 deletions(-) (limited to 'include/GLES') diff --git a/include/GLES/egl.h b/include/GLES/egl.h index f18c86ca62..61a2cc3c9b 100644 --- a/include/GLES/egl.h +++ b/include/GLES/egl.h @@ -2,38 +2,34 @@ #define _EGL_H /* -** License Applicability. Except to the extent portions of this file are -** made subject to an alternative license as permitted in the SGI Free -** Software License B, Version 1.0 (the "License"), the contents of this -** file are subject only to the provisions of the License. You may not use -** this file except in compliance with the License. You may obtain a copy -** of the License at Silicon Graphics, Inc., attn: Legal Services, 1600 -** Amphitheatre Parkway, Mountain View, CA 94043-1351, or at: -** -** http://oss.sgi.com/projects/FreeB -** -** Note that, as provided in the License, the Software is distributed on an -** "AS IS" basis, with ALL EXPRESS AND IMPLIED WARRANTIES AND CONDITIONS -** DISCLAIMED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES AND -** CONDITIONS OF MERCHANTABILITY, SATISFACTORY QUALITY, FITNESS FOR A -** PARTICULAR PURPOSE, AND NON-INFRINGEMENT. -** -** Original Code. The Original Code is: OpenGL Sample Implementation, -** Version 1.2.1, released January 26, 2000, developed by Silicon Graphics, -** Inc. The Original Code is Copyright (c) 1991-2004 Silicon Graphics, Inc. -** Copyright in any portions created by third parties is as indicated -** elsewhere herein. All Rights Reserved. -** -** Additional Notice Provisions: The application programming interfaces -** established by SGI in conjunction with the Original Code are The -** OpenGL(R) Graphics System: A Specification (Version 1.2.1), released -** April 1, 1999; The OpenGL(R) Graphics System Utility Library (Version -** 1.3), released November 4, 1998; and OpenGL(R) Graphics with the X -** Window System(R) (Version 1.3), released October 19, 1998. This software -** was created using the OpenGL(R) version 1.2.1 Sample Implementation -** published by SGI, but has not been independently verified as being -** compliant with the OpenGL(R) version 1.2.1 Specification. -*/ + * SGI FREE SOFTWARE LICENSE B (Version 2.0, Sept. 18, 2008) + * Copyright (C) 1991-2000 Silicon Graphics, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice including the dates of first publication and + * either this permission notice or a reference to + * http://oss.sgi.com/projects/FreeB/ + * shall be included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * SILICON GRAPHICS, INC. BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Except as contained in this notice, the name of Silicon Graphics, Inc. + * shall not be used in advertising or otherwise to promote the sale, use or + * other dealings in this Software without prior written authorization from + * Silicon Graphics, Inc. + */ #if 0/*XXX TEMPORARY HACK*/ #include -- cgit v1.2.3 From 5a46e176715b0eae7b8a715e8aec42f5a27214fc Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Sat, 20 Sep 2008 07:32:30 -0700 Subject: mesa: standardize on C99's uint*_t instead of u_int*_t --- include/GLES/egltypes.h | 14 +-- src/egl/main/eglconfig.c | 18 +-- src/egl/main/eglconfig.h | 2 +- src/mesa/drivers/dri/common/dri_util.h | 4 +- src/mesa/drivers/dri/common/mmio.h | 8 +- src/mesa/drivers/dri/common/utils.c | 18 +-- src/mesa/drivers/dri/common/utils.h | 2 +- src/mesa/drivers/dri/fb/fb_dri.c | 4 +- src/mesa/drivers/dri/fb/fb_egl.c | 4 +- src/mesa/drivers/dri/ffb/ffb_xmesa.c | 4 +- src/mesa/drivers/dri/gamma/gamma_context.h | 38 +++--- src/mesa/drivers/dri/gamma/gamma_render.c | 6 +- src/mesa/drivers/dri/gamma/gamma_span.c | 8 +- src/mesa/drivers/dri/gamma/gamma_state.c | 34 +++--- src/mesa/drivers/dri/gamma/gamma_tex.c | 8 +- src/mesa/drivers/dri/gamma/gamma_tritmp.h | 16 +-- src/mesa/drivers/dri/i810/i810screen.c | 4 +- src/mesa/drivers/dri/intel/intel_screen.c | 4 +- src/mesa/drivers/dri/mach64/mach64_screen.c | 4 +- src/mesa/drivers/dri/mga/mga_xmesa.c | 4 +- src/mesa/drivers/dri/mga/mga_xmesa.h | 2 +- src/mesa/drivers/dri/r128/r128_context.h | 6 +- src/mesa/drivers/dri/r128/r128_ioctl.c | 2 +- src/mesa/drivers/dri/r128/r128_ioctl.h | 6 +- src/mesa/drivers/dri/r128/r128_screen.c | 4 +- src/mesa/drivers/dri/r128/r128_tex.c | 6 +- src/mesa/drivers/dri/r128/r128_tex.h | 2 +- src/mesa/drivers/dri/r128/r128_texmem.c | 6 +- src/mesa/drivers/dri/r128/r128_texobj.h | 4 +- src/mesa/drivers/dri/r128/server/r128.h | 128 ++++++++++----------- src/mesa/drivers/dri/r128/server/r128_dri.c | 2 +- src/mesa/drivers/dri/r200/r200_ioctl.c | 4 +- src/mesa/drivers/dri/r200/r200_state.c | 2 +- src/mesa/drivers/dri/radeon/radeon_ioctl.c | 6 +- src/mesa/drivers/dri/radeon/radeon_screen.c | 6 +- src/mesa/drivers/dri/radeon/radeon_screen.h | 2 +- src/mesa/drivers/dri/radeon/radeon_state.c | 2 +- src/mesa/drivers/dri/radeon/server/radeon_egl.c | 4 +- src/mesa/drivers/dri/savage/savage_3d_reg.h | 70 +++++------ src/mesa/drivers/dri/savage/savage_xmesa.c | 6 +- src/mesa/drivers/dri/savage/savagecontext.h | 2 +- src/mesa/drivers/dri/savage/savageioctl.c | 52 ++++----- src/mesa/drivers/dri/savage/savageioctl.h | 14 +-- src/mesa/drivers/dri/savage/savagestate.c | 46 ++++---- src/mesa/drivers/dri/savage/savagetex.c | 6 +- src/mesa/drivers/dri/savage/savagetris.c | 14 +-- src/mesa/drivers/dri/sis/sis_screen.c | 4 +- src/mesa/drivers/dri/swrast/swrast.c | 4 +- src/mesa/drivers/dri/unichrome/server/via_dri.c | 34 +++--- src/mesa/drivers/dri/unichrome/server/via_driver.h | 26 ++--- src/mesa/drivers/dri/unichrome/via_screen.c | 4 +- src/mesa/drivers/dri/unichrome/via_state.c | 8 +- src/mesa/main/glheader.h | 9 -- 53 files changed, 344 insertions(+), 353 deletions(-) (limited to 'include/GLES') diff --git a/include/GLES/egltypes.h b/include/GLES/egltypes.h index 65cba8d579..6e98265043 100644 --- a/include/GLES/egltypes.h +++ b/include/GLES/egltypes.h @@ -13,20 +13,20 @@ /* ** These opaque EGL types are implemented as unsigned 32-bit integers: */ -typedef u_int32_t EGLDisplay; -typedef u_int32_t EGLConfig; -typedef u_int32_t EGLSurface; -typedef u_int32_t EGLContext; +typedef uint32_t EGLDisplay; +typedef uint32_t EGLConfig; +typedef uint32_t EGLSurface; +typedef uint32_t EGLContext; /* EGL_MESA_screen_surface */ -typedef u_int32_t EGLModeMESA; -typedef u_int32_t EGLScreenMESA; +typedef uint32_t EGLModeMESA; +typedef uint32_t EGLScreenMESA; /* ** Other basic EGL types: */ -typedef u_int8_t EGLBoolean; +typedef uint8_t EGLBoolean; typedef int32_t EGLint; typedef void * NativeDisplayType; diff --git a/src/egl/main/eglconfig.c b/src/egl/main/eglconfig.c index c180e30d7f..2a62f95b54 100644 --- a/src/egl/main/eglconfig.c +++ b/src/egl/main/eglconfig.c @@ -501,12 +501,12 @@ _eglGetConfigs(_EGLDriver *drv, EGLDisplay dpy, EGLConfig *configs, GLboolean _eglFillInConfigs(_EGLConfig * configs, GLenum fb_format, GLenum fb_type, - const u_int8_t * depth_bits, const u_int8_t * stencil_bits, + const uint8_t * depth_bits, const uint8_t * stencil_bits, unsigned num_depth_stencil_bits, const GLenum * db_modes, unsigned num_db_modes, int visType) { - static const u_int8_t bits_table[3][4] = { + static const uint8_t bits_table[3][4] = { /* R G B A */ { 5, 6, 5, 0 }, /* Any GL_UNSIGNED_SHORT_5_6_5 */ { 8, 8, 8, 0 }, /* Any RGB with any GL_UNSIGNED_INT_8_8_8_8 */ @@ -517,7 +517,7 @@ _eglFillInConfigs(_EGLConfig * configs, * Given the four supported fb_type values, this results in valid array * indices of 3, 4, 5, and 7. */ - static const u_int32_t masks_table_rgb[8][4] = { + static const uint32_t masks_table_rgb[8][4] = { {0x00000000, 0x00000000, 0x00000000, 0x00000000}, {0x00000000, 0x00000000, 0x00000000, 0x00000000}, {0x00000000, 0x00000000, 0x00000000, 0x00000000}, @@ -528,7 +528,7 @@ _eglFillInConfigs(_EGLConfig * configs, {0x000000FF, 0x0000FF00, 0x00FF0000, 0x00000000} /* 8_8_8_8_REV */ }; - static const u_int32_t masks_table_rgba[8][4] = { + static const uint32_t masks_table_rgba[8][4] = { {0x00000000, 0x00000000, 0x00000000, 0x00000000}, {0x00000000, 0x00000000, 0x00000000, 0x00000000}, {0x00000000, 0x00000000, 0x00000000, 0x00000000}, @@ -539,7 +539,7 @@ _eglFillInConfigs(_EGLConfig * configs, {0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000}, /* 8_8_8_8_REV */ }; - static const u_int32_t masks_table_bgr[8][4] = { + static const uint32_t masks_table_bgr[8][4] = { {0x00000000, 0x00000000, 0x00000000, 0x00000000}, {0x00000000, 0x00000000, 0x00000000, 0x00000000}, {0x00000000, 0x00000000, 0x00000000, 0x00000000}, @@ -550,7 +550,7 @@ _eglFillInConfigs(_EGLConfig * configs, {0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000}, /* 8_8_8_8_REV */ }; - static const u_int32_t masks_table_bgra[8][4] = { + static const uint32_t masks_table_bgra[8][4] = { {0x00000000, 0x00000000, 0x00000000, 0x00000000}, {0x00000000, 0x00000000, 0x00000000, 0x00000000}, {0x00000000, 0x00000000, 0x00000000, 0x00000000}, @@ -561,12 +561,12 @@ _eglFillInConfigs(_EGLConfig * configs, {0x00FF0000, 0x0000FF00, 0x000000FF, 0xFF000000}, /* 8_8_8_8_REV */ }; - static const u_int8_t bytes_per_pixel[8] = { + static const uint8_t bytes_per_pixel[8] = { 0, 0, 0, 2, 2, 4, 0, 4 }; - const u_int8_t * bits; - const u_int32_t * masks; + const uint8_t * bits; + const uint32_t * masks; const int index = fb_type & 0x07; _EGLConfig *config; unsigned i; diff --git a/src/egl/main/eglconfig.h b/src/egl/main/eglconfig.h index 1fb976e5b4..441b3f4d20 100644 --- a/src/egl/main/eglconfig.h +++ b/src/egl/main/eglconfig.h @@ -55,7 +55,7 @@ _eglSetConfigAttrib(_EGLConfig *config, EGLint attr, EGLint val); extern GLboolean _eglFillInConfigs( _EGLConfig *configs, GLenum fb_format, GLenum fb_type, - const u_int8_t * depth_bits, const u_int8_t * stencil_bits, + const uint8_t * depth_bits, const uint8_t * stencil_bits, unsigned num_depth_stencil_bits, const GLenum * db_modes, unsigned num_db_modes, int visType ); diff --git a/src/mesa/drivers/dri/common/dri_util.h b/src/mesa/drivers/dri/common/dri_util.h index 1d89a9a31c..c0e1bea5e0 100644 --- a/src/mesa/drivers/dri/common/dri_util.h +++ b/src/mesa/drivers/dri/common/dri_util.h @@ -214,7 +214,7 @@ struct __DRIswapInfoRec { /** * Number of swapBuffers operations that have been *completed*. */ - u_int64_t swap_count; + uint64_t swap_count; /** * Unadjusted system time of the last buffer swap. This is the time @@ -228,7 +228,7 @@ struct __DRIswapInfoRec { * swap, it has missed its deadline. If swap_interval is 0, then the * swap deadline is 1 frame after the previous swap. */ - u_int64_t swap_missed_count; + uint64_t swap_missed_count; /** * Amount of time used by the last swap that missed its deadline. This diff --git a/src/mesa/drivers/dri/common/mmio.h b/src/mesa/drivers/dri/common/mmio.h index 8485871bf5..ce95d8c907 100644 --- a/src/mesa/drivers/dri/common/mmio.h +++ b/src/mesa/drivers/dri/common/mmio.h @@ -37,10 +37,10 @@ #if defined( __powerpc__ ) -static INLINE u_int32_t +static INLINE uint32_t read_MMIO_LE32( volatile void * base, unsigned long offset ) { - u_int32_t val; + uint32_t val; __asm__ __volatile__( "lwbrx %0, %1, %2 ; eieio" : "=r" (val) @@ -50,10 +50,10 @@ read_MMIO_LE32( volatile void * base, unsigned long offset ) #else -static INLINE u_int32_t +static INLINE uint32_t read_MMIO_LE32( volatile void * base, unsigned long offset ) { - volatile u_int32_t * p = (volatile u_int32_t *) (((volatile char *) base) + offset); + volatile uint32_t * p = (volatile uint32_t *) (((volatile char *) base) + offset); return LE32_TO_CPU( p[0] ); } diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c index db6c5c389d..30c860b96c 100644 --- a/src/mesa/drivers/dri/common/utils.c +++ b/src/mesa/drivers/dri/common/utils.c @@ -521,11 +521,11 @@ GLboolean driClipRectToFramebuffer( const GLframebuffer *buffer, */ __DRIconfig ** driCreateConfigs(GLenum fb_format, GLenum fb_type, - const u_int8_t * depth_bits, const u_int8_t * stencil_bits, + const uint8_t * depth_bits, const uint8_t * stencil_bits, unsigned num_depth_stencil_bits, const GLenum * db_modes, unsigned num_db_modes) { - static const u_int8_t bits_table[4][4] = { + static const uint8_t bits_table[4][4] = { /* R G B A */ { 3, 3, 2, 0 }, /* Any GL_UNSIGNED_BYTE_3_3_2 */ { 5, 6, 5, 0 }, /* Any GL_UNSIGNED_SHORT_5_6_5 */ @@ -533,7 +533,7 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type, { 8, 8, 8, 8 } /* Any RGBA with any GL_UNSIGNED_INT_8_8_8_8 */ }; - static const u_int32_t masks_table_rgb[6][4] = { + static const uint32_t masks_table_rgb[6][4] = { { 0x000000E0, 0x0000001C, 0x00000003, 0x00000000 }, /* 3_3_2 */ { 0x00000007, 0x00000038, 0x000000C0, 0x00000000 }, /* 2_3_3_REV */ { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5 */ @@ -542,7 +542,7 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type, { 0x000000FF, 0x0000FF00, 0x00FF0000, 0x00000000 } /* 8_8_8_8_REV */ }; - static const u_int32_t masks_table_rgba[6][4] = { + static const uint32_t masks_table_rgba[6][4] = { { 0x000000E0, 0x0000001C, 0x00000003, 0x00000000 }, /* 3_3_2 */ { 0x00000007, 0x00000038, 0x000000C0, 0x00000000 }, /* 2_3_3_REV */ { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5 */ @@ -551,7 +551,7 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type, { 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000 }, /* 8_8_8_8_REV */ }; - static const u_int32_t masks_table_bgr[6][4] = { + static const uint32_t masks_table_bgr[6][4] = { { 0x00000007, 0x00000038, 0x000000C0, 0x00000000 }, /* 3_3_2 */ { 0x000000E0, 0x0000001C, 0x00000003, 0x00000000 }, /* 2_3_3_REV */ { 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5 */ @@ -560,7 +560,7 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type, { 0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000 }, /* 8_8_8_8_REV */ }; - static const u_int32_t masks_table_bgra[6][4] = { + static const uint32_t masks_table_bgra[6][4] = { { 0x00000007, 0x00000038, 0x000000C0, 0x00000000 }, /* 3_3_2 */ { 0x000000E0, 0x0000001C, 0x00000003, 0x00000000 }, /* 2_3_3_REV */ { 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5 */ @@ -569,7 +569,7 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type, { 0x00FF0000, 0x0000FF00, 0x000000FF, 0xFF000000 }, /* 8_8_8_8_REV */ }; - static const u_int8_t bytes_per_pixel[6] = { + static const uint8_t bytes_per_pixel[6] = { 1, /* 3_3_2 */ 1, /* 2_3_3_REV */ 2, /* 5_6_5 */ @@ -578,8 +578,8 @@ driCreateConfigs(GLenum fb_format, GLenum fb_type, 4 /* 8_8_8_8_REV */ }; - const u_int8_t * bits; - const u_int32_t * masks; + const uint8_t * bits; + const uint32_t * masks; int index; __DRIconfig **configs, **c; __GLcontextModes *modes; diff --git a/src/mesa/drivers/dri/common/utils.h b/src/mesa/drivers/dri/common/utils.h index 95d8e0176d..6a59f62bbb 100644 --- a/src/mesa/drivers/dri/common/utils.h +++ b/src/mesa/drivers/dri/common/utils.h @@ -130,7 +130,7 @@ struct __DRIconfigRec { extern __DRIconfig ** driCreateConfigs(GLenum fb_format, GLenum fb_type, - const u_int8_t * depth_bits, const u_int8_t * stencil_bits, + const uint8_t * depth_bits, const uint8_t * stencil_bits, unsigned num_depth_stencil_bits, const GLenum * db_modes, unsigned num_db_modes); diff --git a/src/mesa/drivers/dri/fb/fb_dri.c b/src/mesa/drivers/dri/fb/fb_dri.c index 5573bab24e..f1194d7ce8 100644 --- a/src/mesa/drivers/dri/fb/fb_dri.c +++ b/src/mesa/drivers/dri/fb/fb_dri.c @@ -678,8 +678,8 @@ fbFillInModes( __DRIscreenPrivate *psp, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - u_int8_t depth_bits_array[2]; - u_int8_t stencil_bits_array[2]; + uint8_t depth_bits_array[2]; + uint8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; diff --git a/src/mesa/drivers/dri/fb/fb_egl.c b/src/mesa/drivers/dri/fb/fb_egl.c index 15d3d20a2a..35c268441c 100644 --- a/src/mesa/drivers/dri/fb/fb_egl.c +++ b/src/mesa/drivers/dri/fb/fb_egl.c @@ -113,8 +113,8 @@ fbFillInConfigs(_EGLDisplay *disp, unsigned pixel_bits, unsigned depth_bits, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - u_int8_t depth_bits_array[2]; - u_int8_t stencil_bits_array[2]; + uint8_t depth_bits_array[2]; + uint8_t stencil_bits_array[2]; depth_bits_array[0] = 0; depth_bits_array[1] = depth_bits; diff --git a/src/mesa/drivers/dri/ffb/ffb_xmesa.c b/src/mesa/drivers/dri/ffb/ffb_xmesa.c index cf364c52ae..2a2cf5ec06 100644 --- a/src/mesa/drivers/dri/ffb/ffb_xmesa.c +++ b/src/mesa/drivers/dri/ffb/ffb_xmesa.c @@ -624,8 +624,8 @@ ffbFillInModes( __DRIscreenPrivate *psp, GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML }; - u_int8_t depth_bits_array[3]; - u_int8_t stencil_bits_array[3]; + uint8_t depth_bits_array[3]; + uint8_t stencil_bits_array[3]; depth_bits_array[0] = 0; depth_bits_array[1] = depth_bits; diff --git a/src/mesa/drivers/dri/gamma/gamma_context.h b/src/mesa/drivers/dri/gamma/gamma_context.h index 35b2386822..556a156cf3 100644 --- a/src/mesa/drivers/dri/gamma/gamma_context.h +++ b/src/mesa/drivers/dri/gamma/gamma_context.h @@ -160,13 +160,13 @@ struct gamma_texture_object_t { int internalFormat; } image[GAMMA_TEX_MAXLEVELS]; - u_int32_t TextureBaseAddr[GAMMA_TEX_MAXLEVELS]; - u_int32_t TextureAddressMode; - u_int32_t TextureColorMode; - u_int32_t TextureFilterMode; - u_int32_t TextureFormat; - u_int32_t TextureReadMode; - u_int32_t TextureBorderColor; + uint32_t TextureBaseAddr[GAMMA_TEX_MAXLEVELS]; + uint32_t TextureAddressMode; + uint32_t TextureColorMode; + uint32_t TextureFilterMode; + uint32_t TextureFormat; + uint32_t TextureReadMode; + uint32_t TextureBorderColor; }; #define GAMMA_NO_PALETTE 0x0 @@ -300,18 +300,18 @@ struct gamma_context { unsigned int lastStamp; - u_int32_t ClearColor; - u_int32_t Color; - u_int32_t DitherMode; - u_int32_t ClearDepth; - u_int32_t FogMode; - u_int32_t AreaStippleMode; - u_int32_t LBReadFormat; - u_int32_t LBWriteFormat; - u_int32_t LineMode; - u_int32_t PointMode; - u_int32_t TriangleMode; - u_int32_t AntialiasMode; + uint32_t ClearColor; + uint32_t Color; + uint32_t DitherMode; + uint32_t ClearDepth; + uint32_t FogMode; + uint32_t AreaStippleMode; + uint32_t LBReadFormat; + uint32_t LBWriteFormat; + uint32_t LineMode; + uint32_t PointMode; + uint32_t TriangleMode; + uint32_t AntialiasMode; GLfloat ViewportScaleX; GLfloat ViewportScaleY; GLfloat ViewportScaleZ; diff --git a/src/mesa/drivers/dri/gamma/gamma_render.c b/src/mesa/drivers/dri/gamma/gamma_render.c index 32adeb8db8..1b9fd169f4 100644 --- a/src/mesa/drivers/dri/gamma/gamma_render.c +++ b/src/mesa/drivers/dri/gamma/gamma_render.c @@ -74,7 +74,7 @@ static void gamma_emit( GLcontext *ctx, GLuint start, GLuint end) WRITEF(gmesa->buf, Tr4, tc0[i][2]); WRITEF(gmesa->buf, Tt4, tc0[i][0]); WRITEF(gmesa->buf, Ts4, tc0[i][1]); - WRITE(gmesa->buf, PackedColor4, *(u_int32_t*)col[i]); + WRITE(gmesa->buf, PackedColor4, *(uint32_t*)col[i]); WRITEF(gmesa->buf, Vw, coord[i][3]); WRITEF(gmesa->buf, Vz, coord[i][2]); WRITEF(gmesa->buf, Vy, coord[i][1]); @@ -85,7 +85,7 @@ static void gamma_emit( GLcontext *ctx, GLuint start, GLuint end) CHECK_DMA_BUFFER(gmesa, 7); WRITEF(gmesa->buf, Tt2, tc0[i][0]); WRITEF(gmesa->buf, Ts2, tc0[i][1]); - WRITE(gmesa->buf, PackedColor4, *(u_int32_t*)col[i]); + WRITE(gmesa->buf, PackedColor4, *(uint32_t*)col[i]); WRITEF(gmesa->buf, Vw, coord[i][3]); WRITEF(gmesa->buf, Vz, coord[i][2]); WRITEF(gmesa->buf, Vy, coord[i][1]); @@ -94,7 +94,7 @@ static void gamma_emit( GLcontext *ctx, GLuint start, GLuint end) } else { for (i=start; i < end; i++) { CHECK_DMA_BUFFER(gmesa, 4); - WRITE(gmesa->buf, PackedColor4, *(u_int32_t*)col[i]); + WRITE(gmesa->buf, PackedColor4, *(uint32_t*)col[i]); WRITEF(gmesa->buf, Vz, coord[i][2]); WRITEF(gmesa->buf, Vy, coord[i][1]); WRITEF(gmesa->buf, Vx3, coord[i][0]); diff --git a/src/mesa/drivers/dri/gamma/gamma_span.c b/src/mesa/drivers/dri/gamma/gamma_span.c index 4984016450..e49e254195 100644 --- a/src/mesa/drivers/dri/gamma/gamma_span.c +++ b/src/mesa/drivers/dri/gamma/gamma_span.c @@ -178,10 +178,10 @@ static void gammaReadRGBASpan8888( const GLcontext *ctx, { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); gammaScreenPtr gammascrn = gmesa->gammaScreen; - u_int32_t dwords1, dwords2, i = 0; + uint32_t dwords1, dwords2, i = 0; char *src = (char *)rgba[0]; GLuint read = n * gammascrn->cpp; /* Number of bytes we are expecting */ - u_int32_t data; + uint32_t data; FLUSH_DMA_BUFFER(gmesa); CHECK_DMA_BUFFER(gmesa, 16); @@ -203,8 +203,8 @@ static void gammaReadRGBASpan8888( const GLcontext *ctx, moredata: - dwords1 = *(volatile u_int32_t*)(void *)(((u_int8_t*)gammascrn->regions[0].map) + (GlintOutFIFOWords)); - dwords2 = *(volatile u_int32_t*)(void *)(((u_int8_t*)gammascrn->regions[2].map) + (GlintOutFIFOWords)); + dwords1 = *(volatile uint32_t*)(void *)(((uint8_t*)gammascrn->regions[0].map) + (GlintOutFIFOWords)); + dwords2 = *(volatile uint32_t*)(void *)(((uint8_t*)gammascrn->regions[2].map) + (GlintOutFIFOWords)); if (dwords1) { memcpy(src, (char*)gammascrn->regions[1].map + 0x1000, dwords1 << 2); diff --git a/src/mesa/drivers/dri/gamma/gamma_state.c b/src/mesa/drivers/dri/gamma/gamma_state.c index d156329ad5..8b813e5146 100644 --- a/src/mesa/drivers/dri/gamma/gamma_state.c +++ b/src/mesa/drivers/dri/gamma/gamma_state.c @@ -45,9 +45,9 @@ static void gammaUpdateAlphaMode( GLcontext *ctx ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - u_int32_t a = gmesa->AlphaTestMode; - u_int32_t b = gmesa->AlphaBlendMode; - u_int32_t f = gmesa->AB_FBReadMode_Save = 0; + uint32_t a = gmesa->AlphaTestMode; + uint32_t b = gmesa->AlphaBlendMode; + uint32_t f = gmesa->AB_FBReadMode_Save = 0; GLubyte refByte = (GLint) (ctx->Color.AlphaRef * 255.0); a &= ~(AT_CompareMask | AT_RefValueMask); @@ -419,10 +419,10 @@ static void gammaDDClear( GLcontext *ctx, GLbitfield mask ) static void gammaUpdateZMode( GLcontext *ctx ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - u_int32_t z = gmesa->DepthMode; - u_int32_t delta = gmesa->DeltaMode; - u_int32_t window = gmesa->Window; - u_int32_t lbread = gmesa->LBReadMode; + uint32_t z = gmesa->DepthMode; + uint32_t delta = gmesa->DeltaMode; + uint32_t window = gmesa->Window; + uint32_t lbread = gmesa->LBReadMode; z &= ~DM_CompareMask; @@ -538,9 +538,9 @@ static void gammaDDFlush( GLcontext *ctx ) static void gammaUpdateFogAttrib( GLcontext *ctx ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - u_int32_t f = gmesa->FogMode; - u_int32_t g = gmesa->GeometryMode; - u_int32_t d = gmesa->DeltaMode; + uint32_t f = gmesa->FogMode; + uint32_t g = gmesa->GeometryMode; + uint32_t d = gmesa->DeltaMode; if (ctx->Fog.Enabled) { f |= FogModeEnable; @@ -636,7 +636,7 @@ static void gammaDDPointSize( GLcontext *ctx, GLfloat size ) static void gammaUpdatePolygon( GLcontext *ctx ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - u_int32_t g = gmesa->GeometryMode; + uint32_t g = gmesa->GeometryMode; g &= ~(GM_PolyOffsetFillEnable | GM_PolyOffsetPointEnable | GM_PolyOffsetLineEnable); @@ -754,7 +754,7 @@ static void gammaDDScissor( GLcontext *ctx, static void gammaUpdateCull( GLcontext *ctx ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - u_int32_t g = gmesa->GeometryMode; + uint32_t g = gmesa->GeometryMode; g &= ~(GM_PolyCullMask | GM_FFMask); @@ -974,8 +974,8 @@ static void gammaDDLightModelfv( GLcontext *ctx, GLenum pname, static void gammaDDShadeModel( GLcontext *ctx, GLenum mode ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - u_int32_t g = gmesa->GeometryMode; - u_int32_t c = gmesa->ColorDDAMode; + uint32_t g = gmesa->GeometryMode; + uint32_t c = gmesa->ColorDDAMode; g &= ~GM_ShadingMask; c &= ~ColorDDAShadingMask; @@ -1242,7 +1242,7 @@ static void gammaDDEnable( GLcontext *ctx, GLenum cap, GLboolean state ) case GL_DITHER: do { - u_int32_t d = gmesa->DitherMode; + uint32_t d = gmesa->DitherMode; FLUSH_BATCH( gmesa ); if ( state ) { @@ -1274,7 +1274,7 @@ static void gammaDDEnable( GLcontext *ctx, GLenum cap, GLboolean state ) #if ENABLELIGHTING case GL_LIGHTING: do { - u_int32_t l = gmesa->LightingMode; + uint32_t l = gmesa->LightingMode; FLUSH_BATCH( gmesa ); if ( state ) { @@ -1292,7 +1292,7 @@ static void gammaDDEnable( GLcontext *ctx, GLenum cap, GLboolean state ) case GL_COLOR_MATERIAL: do { - u_int32_t m = gmesa->MaterialMode; + uint32_t m = gmesa->MaterialMode; FLUSH_BATCH( gmesa ); if ( state ) { diff --git a/src/mesa/drivers/dri/gamma/gamma_tex.c b/src/mesa/drivers/dri/gamma/gamma_tex.c index 57ab20088b..11ef38dddf 100644 --- a/src/mesa/drivers/dri/gamma/gamma_tex.c +++ b/src/mesa/drivers/dri/gamma/gamma_tex.c @@ -32,8 +32,8 @@ static GLuint gammaComputeLodBias(GLfloat bias) static void gammaSetTexWrapping(gammaTextureObjectPtr t, GLenum wraps, GLenum wrapt) { - u_int32_t t1 = t->TextureAddressMode; - u_int32_t t2 = t->TextureReadMode; + uint32_t t1 = t->TextureAddressMode; + uint32_t t2 = t->TextureReadMode; t1 &= ~(TAM_SWrap_Mask | TAM_TWrap_Mask); t2 &= ~(TRM_UWrap_Mask | TRM_VWrap_Mask); @@ -58,8 +58,8 @@ static void gammaSetTexFilter(gammaContextPtr gmesa, GLenum minf, GLenum magf, GLfloat bias) { - u_int32_t t1 = t->TextureAddressMode; - u_int32_t t2 = t->TextureReadMode; + uint32_t t1 = t->TextureAddressMode; + uint32_t t2 = t->TextureReadMode; t2 &= ~(TRM_Mag_Mask | TRM_Min_Mask); diff --git a/src/mesa/drivers/dri/gamma/gamma_tritmp.h b/src/mesa/drivers/dri/gamma/gamma_tritmp.h index 23459ff156..45936ac787 100644 --- a/src/mesa/drivers/dri/gamma/gamma_tritmp.h +++ b/src/mesa/drivers/dri/gamma/gamma_tritmp.h @@ -3,8 +3,8 @@ static void TAG(gamma_point)( gammaContextPtr gmesa, const gammaVertex *v0 ) { - u_int32_t vColor; - u_int32_t vBegin; + uint32_t vColor; + uint32_t vBegin; vBegin = gmesa->Begin | B_PrimType_Points; @@ -57,8 +57,8 @@ static void TAG(gamma_line)( gammaContextPtr gmesa, const gammaVertex *v0, const gammaVertex *v1 ) { - u_int32_t vColor; - u_int32_t vBegin; + uint32_t vColor; + uint32_t vBegin; vBegin = gmesa->Begin | B_PrimType_Lines; @@ -166,8 +166,8 @@ static void TAG(gamma_triangle)( gammaContextPtr gmesa, const gammaVertex *v1, const gammaVertex *v2 ) { - u_int32_t vColor; - u_int32_t vBegin; + uint32_t vColor; + uint32_t vBegin; vBegin = gmesa->Begin | B_PrimType_Triangles; @@ -311,8 +311,8 @@ static void TAG(gamma_quad)( gammaContextPtr gmesa, const gammaVertex *v2, const gammaVertex *v3 ) { - u_int32_t vColor; - u_int32_t vBegin; + uint32_t vColor; + uint32_t vBegin; vBegin = gmesa->Begin | B_PrimType_Quads; diff --git a/src/mesa/drivers/dri/i810/i810screen.c b/src/mesa/drivers/dri/i810/i810screen.c index 47284d694c..e88f38841e 100644 --- a/src/mesa/drivers/dri/i810/i810screen.c +++ b/src/mesa/drivers/dri/i810/i810screen.c @@ -76,8 +76,8 @@ i810FillInModes( __DRIscreenPrivate *psp, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - u_int8_t depth_bits_array[2]; - u_int8_t stencil_bits_array[2]; + uint8_t depth_bits_array[2]; + uint8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; depth_bits_array[1] = depth_bits; diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index c38b266eb7..cf09fad745 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -492,8 +492,8 @@ intelFillInModes(__DRIscreenPrivate *psp, GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML }; - u_int8_t depth_bits_array[3]; - u_int8_t stencil_bits_array[3]; + uint8_t depth_bits_array[3]; + uint8_t stencil_bits_array[3]; depth_bits_array[0] = 0; depth_bits_array[1] = depth_bits; diff --git a/src/mesa/drivers/dri/mach64/mach64_screen.c b/src/mesa/drivers/dri/mach64/mach64_screen.c index 19ff5ddb4c..eb5c549fd4 100644 --- a/src/mesa/drivers/dri/mach64/mach64_screen.c +++ b/src/mesa/drivers/dri/mach64/mach64_screen.c @@ -91,8 +91,8 @@ mach64FillInModes( __DRIscreenPrivate *psp, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - u_int8_t depth_bits_array[2]; - u_int8_t stencil_bits_array[2]; + uint8_t depth_bits_array[2]; + uint8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; depth_bits_array[1] = depth_bits; diff --git a/src/mesa/drivers/dri/mga/mga_xmesa.c b/src/mesa/drivers/dri/mga/mga_xmesa.c index 4ec28b00da..411adfa687 100644 --- a/src/mesa/drivers/dri/mga/mga_xmesa.c +++ b/src/mesa/drivers/dri/mga/mga_xmesa.c @@ -132,8 +132,8 @@ mgaFillInModes( __DRIscreenPrivate *psp, GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML }; - u_int8_t depth_bits_array[3]; - u_int8_t stencil_bits_array[3]; + uint8_t depth_bits_array[3]; + uint8_t stencil_bits_array[3]; depth_bits_array[0] = 0; diff --git a/src/mesa/drivers/dri/mga/mga_xmesa.h b/src/mesa/drivers/dri/mga/mga_xmesa.h index 08b4b965fd..fc71a44ca8 100644 --- a/src/mesa/drivers/dri/mga/mga_xmesa.h +++ b/src/mesa/drivers/dri/mga/mga_xmesa.h @@ -149,7 +149,7 @@ do { \ #define MGA_BASE( reg ) ((unsigned long)(mmesa->mgaScreen->mmio.map)) #define MGA_ADDR( reg ) (MGA_BASE(reg) + reg) -#define MGA_DEREF( reg ) *(volatile u_int32_t *)MGA_ADDR( reg ) +#define MGA_DEREF( reg ) *(volatile uint32_t *)MGA_ADDR( reg ) #define MGA_READ( reg ) MGA_DEREF( reg ) #endif diff --git a/src/mesa/drivers/dri/r128/r128_context.h b/src/mesa/drivers/dri/r128/r128_context.h index 676533b79d..4469ffad69 100644 --- a/src/mesa/drivers/dri/r128/r128_context.h +++ b/src/mesa/drivers/dri/r128/r128_context.h @@ -138,9 +138,9 @@ struct r128_context { GLfloat hw_viewport[16]; GLfloat depth_scale; - u_int32_t ClearColor; /* Color used to clear color buffer */ - u_int32_t ClearDepth; /* Value used to clear depth buffer */ - u_int32_t ClearStencil; /* Value used to clear stencil */ + uint32_t ClearColor; /* Color used to clear color buffer */ + uint32_t ClearDepth; /* Value used to clear depth buffer */ + uint32_t ClearStencil; /* Value used to clear stencil */ /* Map GL texture units onto hardware */ diff --git a/src/mesa/drivers/dri/r128/r128_ioctl.c b/src/mesa/drivers/dri/r128/r128_ioctl.c index a1bda75dcd..9aa22179fc 100644 --- a/src/mesa/drivers/dri/r128/r128_ioctl.c +++ b/src/mesa/drivers/dri/r128/r128_ioctl.c @@ -231,7 +231,7 @@ static int r128WaitForFrameCompletion( r128ContextPtr rmesa ) int wait = 0; while ( 1 ) { - u_int32_t frame = read_MMIO_LE32( R128MMIO, R128_LAST_FRAME_REG ); + uint32_t frame = read_MMIO_LE32( R128MMIO, R128_LAST_FRAME_REG ); if ( rmesa->sarea->last_frame - frame <= R128_MAX_OUTSTANDING ) { break; diff --git a/src/mesa/drivers/dri/r128/r128_ioctl.h b/src/mesa/drivers/dri/r128/r128_ioctl.h index 5ed44559a6..dd72267498 100644 --- a/src/mesa/drivers/dri/r128/r128_ioctl.h +++ b/src/mesa/drivers/dri/r128/r128_ioctl.h @@ -39,7 +39,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r128_reg.h" #include "r128_lock.h" -#define R128_BUFFER_MAX_DWORDS (R128_BUFFER_SIZE / sizeof(u_int32_t)) +#define R128_BUFFER_MAX_DWORDS (R128_BUFFER_SIZE / sizeof(uint32_t)) extern drmBufPtr r128GetBufferLocked( r128ContextPtr rmesa ); @@ -48,7 +48,7 @@ extern void r128FlushVerticesLocked( r128ContextPtr rmesa ); static INLINE void *r128AllocDmaLow( r128ContextPtr rmesa, int count, int vert_size ) { - u_int32_t *head; + uint32_t *head; int bytes = count * vert_size; if ( !rmesa->vert_buf ) { @@ -62,7 +62,7 @@ static INLINE void *r128AllocDmaLow( r128ContextPtr rmesa, int count, UNLOCK_HARDWARE( rmesa ); } - head = (u_int32_t *)((char *)rmesa->vert_buf->address + rmesa->vert_buf->used); + head = (uint32_t *)((char *)rmesa->vert_buf->address + rmesa->vert_buf->used); rmesa->vert_buf->used += bytes; rmesa->num_verts += count; diff --git a/src/mesa/drivers/dri/r128/r128_screen.c b/src/mesa/drivers/dri/r128/r128_screen.c index ab97ffd6ae..2c9b59b84a 100644 --- a/src/mesa/drivers/dri/r128/r128_screen.c +++ b/src/mesa/drivers/dri/r128/r128_screen.c @@ -421,8 +421,8 @@ r128FillInModes( __DRIscreenPrivate *psp, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - u_int8_t depth_bits_array[2]; - u_int8_t stencil_bits_array[2]; + uint8_t depth_bits_array[2]; + uint8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; diff --git a/src/mesa/drivers/dri/r128/r128_tex.c b/src/mesa/drivers/dri/r128/r128_tex.c index ee58bca358..c2f87a623e 100644 --- a/src/mesa/drivers/dri/r128/r128_tex.c +++ b/src/mesa/drivers/dri/r128/r128_tex.c @@ -462,9 +462,9 @@ static void r128TexEnv( GLcontext *ctx, GLenum target, case GL_TEXTURE_LOD_BIAS: { - u_int32_t t = rmesa->setup.tex_cntl_c; + uint32_t t = rmesa->setup.tex_cntl_c; GLint bias; - u_int32_t b; + uint32_t b; /* GTH: This isn't exactly correct, but gives good results up to a * certain point. It is better than completely ignoring the LOD @@ -484,7 +484,7 @@ static void r128TexEnv( GLcontext *ctx, GLenum target, bias = 127; } - b = (u_int32_t)bias & 0xff; + b = (uint32_t)bias & 0xff; t &= ~R128_LOD_BIAS_MASK; t |= (b << R128_LOD_BIAS_SHIFT); diff --git a/src/mesa/drivers/dri/r128/r128_tex.h b/src/mesa/drivers/dri/r128/r128_tex.h index 40168f83bc..ab7a765206 100644 --- a/src/mesa/drivers/dri/r128/r128_tex.h +++ b/src/mesa/drivers/dri/r128/r128_tex.h @@ -68,7 +68,7 @@ extern void r128InitTextureFuncs( struct dd_function_table *functions ); #define R128PACKCOLOR4444( r, g, b, a ) \ ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4)) -static INLINE u_int32_t r128PackColor( GLuint cpp, +static INLINE uint32_t r128PackColor( GLuint cpp, GLubyte r, GLubyte g, GLubyte b, GLubyte a ) { diff --git a/src/mesa/drivers/dri/r128/r128_texmem.c b/src/mesa/drivers/dri/r128/r128_texmem.c index 14022b6f2a..8e3079b13f 100644 --- a/src/mesa/drivers/dri/r128/r128_texmem.c +++ b/src/mesa/drivers/dri/r128/r128_texmem.c @@ -85,7 +85,7 @@ static void uploadSubImage( r128ContextPtr rmesa, r128TexObjPtr t, int imageWidth, imageHeight; int remaining, rows; int format, dwords; - u_int32_t pitch, offset; + uint32_t pitch, offset; int i; /* Ensure we have a valid texture to upload */ @@ -201,7 +201,7 @@ static void uploadSubImage( r128ContextPtr rmesa, r128TexObjPtr t, remaining > 0 ; remaining -= rows, y += rows, i++ ) { - u_int32_t *dst; + uint32_t *dst; drmBufPtr buffer; assert(image->Data); @@ -212,7 +212,7 @@ static void uploadSubImage( r128ContextPtr rmesa, r128TexObjPtr t, LOCK_HARDWARE( rmesa ); buffer = r128GetBufferLocked( rmesa ); - dst = (u_int32_t *)((char *)buffer->address + R128_HOSTDATA_BLIT_OFFSET); + dst = (uint32_t *)((char *)buffer->address + R128_HOSTDATA_BLIT_OFFSET); /* Copy the next chunck of the texture image into the blit buffer */ { diff --git a/src/mesa/drivers/dri/r128/r128_texobj.h b/src/mesa/drivers/dri/r128/r128_texobj.h index 6e68cd33ef..d968be3808 100644 --- a/src/mesa/drivers/dri/r128/r128_texobj.h +++ b/src/mesa/drivers/dri/r128/r128_texobj.h @@ -53,14 +53,14 @@ typedef struct r128_tex_obj r128TexObj, *r128TexObjPtr; struct r128_tex_obj { driTextureObject base; - u_int32_t bufAddr; /* Offset to start of locally + uint32_t bufAddr; /* Offset to start of locally shared texture block */ GLuint age; r128TexImage image[R128_MAX_TEXTURE_LEVELS]; /* Image data for all mipmap levels */ - u_int32_t textureFormat; /* Actual hardware format */ + uint32_t textureFormat; /* Actual hardware format */ drm_r128_texture_regs_t setup; /* Setup regs for texture */ }; diff --git a/src/mesa/drivers/dri/r128/server/r128.h b/src/mesa/drivers/dri/r128/server/r128.h index ce98b1b915..15e25285b6 100644 --- a/src/mesa/drivers/dri/r128/server/r128.h +++ b/src/mesa/drivers/dri/r128/server/r128.h @@ -87,74 +87,74 @@ typedef struct { /* All values in XCLKS */ typedef struct { /* Common registers */ - u_int32_t ovr_clr; - u_int32_t ovr_wid_left_right; - u_int32_t ovr_wid_top_bottom; - u_int32_t ov0_scale_cntl; - u_int32_t mpp_tb_config; - u_int32_t mpp_gp_config; - u_int32_t subpic_cntl; - u_int32_t viph_control; - u_int32_t i2c_cntl_1; - u_int32_t gen_int_cntl; - u_int32_t cap0_trig_cntl; - u_int32_t cap1_trig_cntl; - u_int32_t bus_cntl; - u_int32_t config_cntl; + uint32_t ovr_clr; + uint32_t ovr_wid_left_right; + uint32_t ovr_wid_top_bottom; + uint32_t ov0_scale_cntl; + uint32_t mpp_tb_config; + uint32_t mpp_gp_config; + uint32_t subpic_cntl; + uint32_t viph_control; + uint32_t i2c_cntl_1; + uint32_t gen_int_cntl; + uint32_t cap0_trig_cntl; + uint32_t cap1_trig_cntl; + uint32_t bus_cntl; + uint32_t config_cntl; /* Other registers to save for VT switches */ - u_int32_t dp_datatype; - u_int32_t gen_reset_cntl; - u_int32_t clock_cntl_index; - u_int32_t amcgpio_en_reg; - u_int32_t amcgpio_mask; + uint32_t dp_datatype; + uint32_t gen_reset_cntl; + uint32_t clock_cntl_index; + uint32_t amcgpio_en_reg; + uint32_t amcgpio_mask; /* CRTC registers */ - u_int32_t crtc_gen_cntl; - u_int32_t crtc_ext_cntl; - u_int32_t dac_cntl; - u_int32_t crtc_h_total_disp; - u_int32_t crtc_h_sync_strt_wid; - u_int32_t crtc_v_total_disp; - u_int32_t crtc_v_sync_strt_wid; - u_int32_t crtc_offset; - u_int32_t crtc_offset_cntl; - u_int32_t crtc_pitch; + uint32_t crtc_gen_cntl; + uint32_t crtc_ext_cntl; + uint32_t dac_cntl; + uint32_t crtc_h_total_disp; + uint32_t crtc_h_sync_strt_wid; + uint32_t crtc_v_total_disp; + uint32_t crtc_v_sync_strt_wid; + uint32_t crtc_offset; + uint32_t crtc_offset_cntl; + uint32_t crtc_pitch; /* CRTC2 registers */ - u_int32_t crtc2_gen_cntl; + uint32_t crtc2_gen_cntl; /* Flat panel registers */ - u_int32_t fp_crtc_h_total_disp; - u_int32_t fp_crtc_v_total_disp; - u_int32_t fp_gen_cntl; - u_int32_t fp_h_sync_strt_wid; - u_int32_t fp_horz_stretch; - u_int32_t fp_panel_cntl; - u_int32_t fp_v_sync_strt_wid; - u_int32_t fp_vert_stretch; - u_int32_t lvds_gen_cntl; - u_int32_t tmds_crc; - u_int32_t tmds_transmitter_cntl; + uint32_t fp_crtc_h_total_disp; + uint32_t fp_crtc_v_total_disp; + uint32_t fp_gen_cntl; + uint32_t fp_h_sync_strt_wid; + uint32_t fp_horz_stretch; + uint32_t fp_panel_cntl; + uint32_t fp_v_sync_strt_wid; + uint32_t fp_vert_stretch; + uint32_t lvds_gen_cntl; + uint32_t tmds_crc; + uint32_t tmds_transmitter_cntl; /* Computed values for PLL */ - u_int32_t dot_clock_freq; - u_int32_t pll_output_freq; + uint32_t dot_clock_freq; + uint32_t pll_output_freq; int feedback_div; int post_div; /* PLL registers */ - u_int32_t ppll_ref_div; - u_int32_t ppll_div_3; - u_int32_t htotal_cntl; + uint32_t ppll_ref_div; + uint32_t ppll_div_3; + uint32_t htotal_cntl; /* DDA register */ - u_int32_t dda_config; - u_int32_t dda_on_off; + uint32_t dda_config; + uint32_t dda_on_off; /* Pallet */ GLboolean palette_valid; - u_int32_t palette[256]; + uint32_t palette[256]; } R128SaveRec, *R128SavePtr; typedef struct { @@ -169,8 +169,8 @@ typedef struct { unsigned char *MMIO; /* Map of MMIO region */ unsigned char *FB; /* Map of frame buffer */ - u_int32_t MemCntl; - u_int32_t BusCntl; + uint32_t MemCntl; + uint32_t BusCntl; unsigned long FbMapSize; /* Size of frame buffer, in bytes */ int Flags; /* Saved copy of mode flags */ @@ -201,7 +201,7 @@ typedef struct { /* Computed values for Rage 128 */ int pitch; int datatype; - u_int32_t dp_gui_master_cntl; + uint32_t dp_gui_master_cntl; /* Saved values for ScreenToScreenCopy */ int xdir; @@ -306,18 +306,18 @@ typedef struct { int log2TexGran; /* Saved scissor values */ - u_int32_t sc_left; - u_int32_t sc_right; - u_int32_t sc_top; - u_int32_t sc_bottom; + uint32_t sc_left; + uint32_t sc_right; + uint32_t sc_top; + uint32_t sc_bottom; - u_int32_t re_top_left; - u_int32_t re_width_height; + uint32_t re_top_left; + uint32_t re_width_height; - u_int32_t aux_sc_cntl; + uint32_t aux_sc_cntl; int irq; - u_int32_t gen_int_cntl; + uint32_t gen_int_cntl; GLboolean DMAForXv; @@ -388,7 +388,7 @@ do { \ #define R128_VERBOSE 0 -#define RING_LOCALS u_int32_t *__head; int __count; +#define RING_LOCALS uint32_t *__head; int __count; #define R128CCE_REFRESH(pScrn, info) \ do { \ @@ -429,12 +429,12 @@ do { \ fprintf(stderr, \ "ADVANCE_RING() used: %d+%d=%d/%d\n", \ info->indirectBuffer->used - info->indirectStart, \ - __count * sizeof(u_int32_t), \ + __count * sizeof(uint32_t), \ info->indirectBuffer->used - info->indirectStart + \ - __count * sizeof(u_int32_t), \ + __count * sizeof(uint32_t), \ info->indirectBuffer->total - info->indirectStart ); \ } \ - info->indirectBuffer->used += __count * (int)sizeof(u_int32_t); \ + info->indirectBuffer->used += __count * (int)sizeof(uint32_t); \ } while (0) #define OUT_RING( x ) do { \ diff --git a/src/mesa/drivers/dri/r128/server/r128_dri.c b/src/mesa/drivers/dri/r128/server/r128_dri.c index 5edf1e1003..e3e139fcb3 100644 --- a/src/mesa/drivers/dri/r128/server/r128_dri.c +++ b/src/mesa/drivers/dri/r128/server/r128_dri.c @@ -272,7 +272,7 @@ static GLboolean R128DRIPciInit(const DRIDriverContext *ctx) { R128InfoPtr info = ctx->driverPrivate; unsigned char *R128MMIO = ctx->MMIOAddress; - u_int32_t chunk; + uint32_t chunk; int ret; int flags; diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c index ca2f96fa71..0741e57af7 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.c +++ b/src/mesa/drivers/dri/r200/r200_ioctl.c @@ -333,11 +333,11 @@ void r200AllocDmaRegion( r200ContextPtr rmesa, * SwapBuffers with client-side throttling */ -static u_int32_t r200GetLastFrame(r200ContextPtr rmesa) +static uint32_t r200GetLastFrame(r200ContextPtr rmesa) { drm_radeon_getparam_t gp; int ret; - u_int32_t frame; + uint32_t frame; gp.param = RADEON_PARAM_LAST_FRAME; gp.value = (int *)&frame; diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 7eaa1a1f9b..0eaaaf69ac 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -902,7 +902,7 @@ static void r200PolygonMode( GLcontext *ctx, GLenum face, GLenum mode ) static void r200UpdateSpecular( GLcontext *ctx ) { r200ContextPtr rmesa = R200_CONTEXT(ctx); - u_int32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL]; + uint32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL]; R200_STATECHANGE( rmesa, tcl ); R200_STATECHANGE( rmesa, vtx ); diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c index fed79eb6d5..bce5627d20 100644 --- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c +++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c @@ -778,11 +778,11 @@ void radeonAllocDmaRegion( radeonContextPtr rmesa, * SwapBuffers with client-side throttling */ -static u_int32_t radeonGetLastFrame (radeonContextPtr rmesa) +static uint32_t radeonGetLastFrame (radeonContextPtr rmesa) { drm_radeon_getparam_t gp; int ret; - u_int32_t frame; + uint32_t frame; gp.param = RADEON_PARAM_LAST_FRAME; gp.value = (int *)&frame; @@ -1032,7 +1032,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask ) radeonContextPtr rmesa = RADEON_CONTEXT(ctx); __DRIdrawablePrivate *dPriv = rmesa->dri.drawable; drm_radeon_sarea_t *sarea = rmesa->sarea; - u_int32_t clear; + uint32_t clear; GLuint flags = 0; GLuint color_mask = 0; GLint ret, i; diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 4a375cd7c9..3f42f8eb24 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -273,8 +273,8 @@ radeonFillInModes( __DRIscreenPrivate *psp, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - u_int8_t depth_bits_array[2]; - u_int8_t stencil_bits_array[2]; + uint8_t depth_bits_array[2]; + uint8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; @@ -445,7 +445,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv ) __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ ); return NULL; } - screen->scratch = (__volatile__ u_int32_t *) + screen->scratch = (__volatile__ uint32_t *) ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET); screen->buffers = drmMapBufs( sPriv->fd ); diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h index ab859d55bd..acd55d235d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.h +++ b/src/mesa/drivers/dri/radeon/radeon_screen.h @@ -84,7 +84,7 @@ typedef struct { drmBufMapPtr buffers; - __volatile__ u_int32_t *scratch; + __volatile__ uint32_t *scratch; __DRIscreenPrivate *driScreen; unsigned int sarea_priv_offset; diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 9c7e192b65..f62221b475 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -688,7 +688,7 @@ static void radeonPolygonMode( GLcontext *ctx, GLenum face, GLenum mode ) static void radeonUpdateSpecular( GLcontext *ctx ) { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - u_int32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL]; + uint32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL]; GLuint flag = 0; RADEON_STATECHANGE( rmesa, tcl ); diff --git a/src/mesa/drivers/dri/radeon/server/radeon_egl.c b/src/mesa/drivers/dri/radeon/server/radeon_egl.c index 2f6ea55903..c16d66e4ec 100644 --- a/src/mesa/drivers/dri/radeon/server/radeon_egl.c +++ b/src/mesa/drivers/dri/radeon/server/radeon_egl.c @@ -935,8 +935,8 @@ radeonFillInConfigs(_EGLDisplay *disp, unsigned pixel_bits, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - u_int8_t depth_bits_array[2]; - u_int8_t stencil_bits_array[2]; + uint8_t depth_bits_array[2]; + uint8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; depth_bits_array[1] = depth_bits; diff --git a/src/mesa/drivers/dri/savage/savage_3d_reg.h b/src/mesa/drivers/dri/savage/savage_3d_reg.h index bc81d73296..45733cdf92 100644 --- a/src/mesa/drivers/dri/savage/savage_3d_reg.h +++ b/src/mesa/drivers/dri/savage/savage_3d_reg.h @@ -43,7 +43,7 @@ typedef union unsigned reserved : 4; unsigned ofs : 28; }ni; - u_int32_t ui; + uint32_t ui; } savageRegZPixelOffset; /* This reg exists only on Savage4. */ @@ -60,7 +60,7 @@ typedef union unsigned passZpassOp : 3; unsigned reserved : 3; }ni; - u_int32_t ui; + uint32_t ui; } savageRegStencilCtrl; /************************** @@ -85,7 +85,7 @@ typedef union unsigned palSize : 2; unsigned newPal : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegTexDescr_s4; typedef union { @@ -102,7 +102,7 @@ typedef union unsigned reserved3 : 10; unsigned newPal : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegTexDescr_s3d; /* The layout of this reg is the same on Savage4 and Savage3D, @@ -116,7 +116,7 @@ typedef union unsigned reserved : 1; unsigned addr : 29; }ni; - u_int32_t ui; + uint32_t ui; } savageRegTexAddr; /* The layout of this reg is the same on Savage4 and Savage3D. */ @@ -127,7 +127,7 @@ typedef union unsigned reserved : 3; unsigned addr : 29; }ni; - u_int32_t ui; + uint32_t ui; } savageRegTexPalAddr; /* The layout of this reg on Savage4 and Savage3D are very similar. */ @@ -138,7 +138,7 @@ typedef union unsigned xprClr0 : 16; unsigned xprClr1 : 16; /* this is reserved on Savage3D */ }ni; - u_int32_t ui; + uint32_t ui; } savageRegTexXprClr; /* transparency color in RGB565 format*/ /* The layout of this reg differs between Savage4 and Savage3D. @@ -164,7 +164,7 @@ typedef union unsigned alphaArg1Invert : 1; unsigned alphaArg2Invert : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegTexCtrl_s4; typedef union { @@ -187,7 +187,7 @@ typedef union unsigned texXprEn : 1; unsigned reserved2 : 11; }ni; - u_int32_t ui; + uint32_t ui; } savageRegTexCtrl_s3d; /* This reg exists only on Savage4. */ @@ -218,7 +218,7 @@ typedef union unsigned colorDoDiffMul : 1; unsigned LeftShiftVal : 2; }ni; - u_int32_t ui; + uint32_t ui; } savageRegTexBlendCtrl; /* This reg exists only on Savage4. */ @@ -231,7 +231,7 @@ typedef union unsigned red : 8; unsigned alpha : 8; }ni; - u_int32_t ui; + uint32_t ui; } savageRegTexBlendColor; /******************************** @@ -247,7 +247,7 @@ typedef union unsigned widthInTile : 6; unsigned bitPerPixel : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegTiledSurface; /******************************** @@ -264,7 +264,7 @@ typedef union unsigned scissorYStart : 12; unsigned alphaRefVal : 8; }ni; - u_int32_t ui; + uint32_t ui; } savageRegDrawCtrl0; /* This reg exists only on Savage4. */ @@ -281,7 +281,7 @@ typedef union unsigned alphaTestCmpFunc : 3; unsigned alphaTestEn : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegDrawCtrl1; /* This reg exists only on Savage4. */ @@ -312,7 +312,7 @@ typedef union unsigned flushPdDestWrites : 1; unsigned flushPdZbufWrites : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegDrawLocalCtrl; /* This reg exists only on Savage3D. */ @@ -342,7 +342,7 @@ typedef union */ unsigned interpMode : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegDrawCtrl; #define SAVAGETBC_DECAL_S3D 0 @@ -364,7 +364,7 @@ typedef union unsigned scissorYStart : 11; unsigned reserved2 : 5; } ni; - u_int32_t ui; + uint32_t ui; } savageRegScissorsStart; /* This reg exists only on Savage3D. */ @@ -377,7 +377,7 @@ typedef union unsigned scissorYEnd : 11; unsigned reserved2 : 5; } ni; - u_int32_t ui; + uint32_t ui; } savageRegScissorsEnd; /******************************** @@ -396,7 +396,7 @@ typedef union unsigned reserved : 1; unsigned addr : 29; /*quad word aligned*/ }ni; - u_int32_t ui; + uint32_t ui; } savageRegVertBufAddr; /* I havn't found a Savage3D equivalent of this reg in the Utah-driver. @@ -411,7 +411,7 @@ typedef union unsigned reserved : 1; unsigned addr : 29; /*4-quad word aligned*/ }ni; - u_int32_t ui; + uint32_t ui; } savageRegDMABufAddr; /******************************** @@ -439,7 +439,7 @@ typedef union unsigned reserved : 17; unsigned kickOff : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegFlag; /******************************** @@ -464,7 +464,7 @@ typedef union unsigned floatZEn : 1; unsigned wToZEn : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegZBufCtrl_s4; typedef union { @@ -486,7 +486,7 @@ typedef union unsigned wrZafterAlphaTst : 1; unsigned reserved2 : 15; }ni; - u_int32_t ui; + uint32_t ui; } savageRegZBufCtrl_s3d; /* The layout of this reg on Savage4 and Savage3D is very similar. */ @@ -507,7 +507,7 @@ typedef union */ unsigned zDepthSelect : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegZBufOffset; /* The layout of this reg is the same on Savage4 and Savage3D. */ @@ -524,7 +524,7 @@ typedef union unsigned wHigh : 6; unsigned reserved4 : 2; }ni; - u_int32_t ui; + uint32_t ui; } savageRegZWatermarks; /******************************** @@ -542,7 +542,7 @@ typedef union unsigned fogMode : 1; unsigned fogEndShift : 2; }ni; - u_int32_t ui; + uint32_t ui; } savageRegFogCtrl; /*not in spec, but tempo for pp and driver*/ @@ -553,7 +553,7 @@ typedef union unsigned fogDensity : 16; unsigned fogStart : 16; }ni; - u_int32_t ui; + uint32_t ui; } savageRegFogParam; /************************************** @@ -577,7 +577,7 @@ typedef union unsigned antiAliasMode : 2; unsigned dstPixFmt : 1; }ni; - u_int32_t ui; + uint32_t ui; } savageRegDestCtrl; /* The layout of this reg on Savage4 and Savage3D are very similar. */ @@ -596,7 +596,7 @@ typedef union * However, it is not used in either driver. */ unsigned destFlush : 2; }ni; - u_int32_t ui; + uint32_t ui; } savageRegDestTexWatermarks; /* Savage4/Twister/ProSavage register BCI addresses */ @@ -641,7 +641,7 @@ typedef union #define SAVAGE_FIRST_REG 0x18 #define SAVAGE_NR_REGS 34 typedef struct savage_registers_s4_t { - u_int32_t unused1[6]; /* 0x18-0x1d */ + uint32_t unused1[6]; /* 0x18-0x1d */ savageRegDrawLocalCtrl drawLocalCtrl; /* 0x1e */ savageRegTexPalAddr texPalAddr; /* 0x1f */ savageRegTexCtrl_s4 texCtrl[2]; /* 0x20, 0x21 */ @@ -649,7 +649,7 @@ typedef struct savage_registers_s4_t { savageRegTexBlendCtrl texBlendCtrl[2]; /* 0x24, 0x25 */ savageRegTexXprClr texXprClr; /* 0x26 */ savageRegTexDescr_s4 texDescr; /* 0x27 */ - u_int8_t fogTable[32]; /* 0x28-0x2f (8dwords) */ + uint8_t fogTable[32]; /* 0x28-0x2f (8dwords) */ savageRegFogCtrl fogCtrl; /* 0x30 */ savageRegStencilCtrl stencilCtrl; /* 0x31 */ savageRegZBufCtrl_s4 zBufCtrl; /* 0x32 */ @@ -667,8 +667,8 @@ typedef struct savage_registers_s3d_t { savageRegTexAddr texAddr; /* 0x1a */ savageRegTexDescr_s3d texDescr; /* 0x1b */ savageRegTexCtrl_s3d texCtrl; /* 0x1c */ - u_int32_t unused1[3]; /* 0x1d-0x1f */ - u_int8_t fogTable[64]; /* 0x20-0x2f (16dwords) */ + uint32_t unused1[3]; /* 0x1d-0x1f */ + uint8_t fogTable[64]; /* 0x20-0x2f (16dwords) */ savageRegFogCtrl fogCtrl; /* 0x30 */ savageRegDrawCtrl drawCtrl; /* 0x31 */ savageRegZBufCtrl_s3d zBufCtrl; /* 0x32 */ @@ -678,12 +678,12 @@ typedef struct savage_registers_s3d_t { savageRegScissorsEnd scissorsEnd; /* 0x36 */ savageRegZWatermarks zWatermarks; /* 0x37 */ savageRegDestTexWatermarks destTexWatermarks; /* 0x38 */ - u_int32_t unused2; /* 0x39 */ + uint32_t unused2; /* 0x39 */ } savageRegistersS3D; typedef union savage_registers_t { savageRegistersS4 s4; savageRegistersS3D s3d; - u_int32_t ui[SAVAGE_NR_REGS]; + uint32_t ui[SAVAGE_NR_REGS]; } savageRegisters; diff --git a/src/mesa/drivers/dri/savage/savage_xmesa.c b/src/mesa/drivers/dri/savage/savage_xmesa.c index e62c956796..a344aab71b 100644 --- a/src/mesa/drivers/dri/savage/savage_xmesa.c +++ b/src/mesa/drivers/dri/savage/savage_xmesa.c @@ -457,7 +457,7 @@ savageCreateContext( const __GLcontextModes *mesaVis, imesa->clientVtxBuf.total = imesa->bufferSize / 4; imesa->clientVtxBuf.used = 0; imesa->clientVtxBuf.flushed = 0; - imesa->clientVtxBuf.buf = (u_int32_t *)malloc(imesa->bufferSize); + imesa->clientVtxBuf.buf = (uint32_t *)malloc(imesa->bufferSize); imesa->vtxBuf = &imesa->clientVtxBuf; @@ -912,8 +912,8 @@ savageFillInModes( __DRIscreenPrivate *psp, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - u_int8_t depth_bits_array[2]; - u_int8_t stencil_bits_array[2]; + uint8_t depth_bits_array[2]; + uint8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; diff --git a/src/mesa/drivers/dri/savage/savagecontext.h b/src/mesa/drivers/dri/savage/savagecontext.h index 068bc48424..fd6399d6a6 100644 --- a/src/mesa/drivers/dri/savage/savagecontext.h +++ b/src/mesa/drivers/dri/savage/savagecontext.h @@ -130,7 +130,7 @@ typedef void (*savage_point_func)( savageContextPtr, savageVertex * ); struct savage_vtxbuf_t { GLuint total, used, flushed; /* in 32 bit units */ GLuint idx; /* for DMA buffers */ - u_int32_t *buf; + uint32_t *buf; }; struct savage_cmdbuf_t { diff --git a/src/mesa/drivers/dri/savage/savageioctl.c b/src/mesa/drivers/dri/savage/savageioctl.c index 949423218b..948ed18419 100644 --- a/src/mesa/drivers/dri/savage/savageioctl.c +++ b/src/mesa/drivers/dri/savage/savageioctl.c @@ -112,7 +112,7 @@ void savageGetDMABuffer( savageContextPtr imesa ) imesa->dmaVtxBuf.used = 0; imesa->dmaVtxBuf.flushed = 0; imesa->dmaVtxBuf.idx = buf->idx; - imesa->dmaVtxBuf.buf = (u_int32_t *)buf->address; + imesa->dmaVtxBuf.buf = (uint32_t *)buf->address; if (SAVAGE_DEBUG & DEBUG_DMA) fprintf(stderr, "finished getbuffer\n"); @@ -137,7 +137,7 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear) unsigned int y = pbox->y1; unsigned int width = pbox->x2 - x; unsigned int height = pbox->y2 - y; - u_int32_t *bciptr; + uint32_t *bciptr; if (pbox->x1 > pbox->x2 || pbox->y1 > pbox->y2 || @@ -147,27 +147,27 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear) if ( pclear->flags & SAVAGE_FRONT ) { bciptr = savageDMAAlloc (imesa, 8); - WRITE_CMD((bciptr) , 0x4BCC8C00,u_int32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->frontOffset,u_int32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->frontBitmapDesc,u_int32_t); - WRITE_CMD((bciptr) , pclear->clear_color,u_int32_t); - WRITE_CMD((bciptr) , (y <<16) | x,u_int32_t); - WRITE_CMD((bciptr) , (height << 16) | width,u_int32_t); + WRITE_CMD((bciptr) , 0x4BCC8C00,uint32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->frontOffset,uint32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->frontBitmapDesc,uint32_t); + WRITE_CMD((bciptr) , pclear->clear_color,uint32_t); + WRITE_CMD((bciptr) , (y <<16) | x,uint32_t); + WRITE_CMD((bciptr) , (height << 16) | width,uint32_t); savageDMACommit (imesa, bciptr); } if ( pclear->flags & SAVAGE_BACK ) { bciptr = savageDMAAlloc (imesa, 8); - WRITE_CMD((bciptr) , 0x4BCC8C00,u_int32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->backOffset,u_int32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->backBitmapDesc,u_int32_t); - WRITE_CMD((bciptr) , pclear->clear_color,u_int32_t); - WRITE_CMD((bciptr) , (y <<16) | x,u_int32_t); - WRITE_CMD((bciptr) , (height << 16) | width,u_int32_t); + WRITE_CMD((bciptr) , 0x4BCC8C00,uint32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->backOffset,uint32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->backBitmapDesc,uint32_t); + WRITE_CMD((bciptr) , pclear->clear_color,uint32_t); + WRITE_CMD((bciptr) , (y <<16) | x,uint32_t); + WRITE_CMD((bciptr) , (height << 16) | width,uint32_t); savageDMACommit (imesa, bciptr); } if ( pclear->flags & (SAVAGE_DEPTH |SAVAGE_STENCIL) ) { - u_int32_t writeMask = 0x0; + uint32_t writeMask = 0x0; if(imesa->hw_stencil) { if(pclear->flags & SAVAGE_STENCIL) @@ -199,8 +199,8 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear) bciptr = savageDMAAlloc (imesa, 10); if(writeMask != 0xFFFFFFFF) { - WRITE_CMD((bciptr) , 0x960100D7,u_int32_t); - WRITE_CMD((bciptr) , writeMask,u_int32_t); + WRITE_CMD((bciptr) , 0x960100D7,uint32_t); + WRITE_CMD((bciptr) , writeMask,uint32_t); } } else @@ -208,18 +208,18 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear) bciptr = savageDMAAlloc (imesa, 6); } - WRITE_CMD((bciptr) , 0x4BCC8C00,u_int32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->depthOffset,u_int32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->depthBitmapDesc,u_int32_t); - WRITE_CMD((bciptr) , pclear->clear_depth,u_int32_t); - WRITE_CMD((bciptr) , (y <<16) | x,u_int32_t); - WRITE_CMD((bciptr) , (height << 16) | width,u_int32_t); + WRITE_CMD((bciptr) , 0x4BCC8C00,uint32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->depthOffset,uint32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->depthBitmapDesc,uint32_t); + WRITE_CMD((bciptr) , pclear->clear_depth,uint32_t); + WRITE_CMD((bciptr) , (y <<16) | x,uint32_t); + WRITE_CMD((bciptr) , (height << 16) | width,uint32_t); if(imesa->hw_stencil) { if(writeMask != 0xFFFFFFFF) { - WRITE_CMD((bciptr) , 0x960100D7,u_int32_t); - WRITE_CMD((bciptr) , 0xFFFFFFFF,u_int32_t); + WRITE_CMD((bciptr) , 0x960100D7,uint32_t); + WRITE_CMD((bciptr) , 0xFFFFFFFF,uint32_t); } } savageDMACommit (imesa, bciptr); @@ -236,7 +236,7 @@ static void savage_BCI_swap(savageContextPtr imesa) int nbox = imesa->sarea->nbox; drm_clip_rect_t *pbox = imesa->sarea->boxes; int i; - volatile u_int32_t *bciptr; + volatile uint32_t *bciptr; if (nbox > SAVAGE_NR_SAREA_CLIPRECTS) nbox = SAVAGE_NR_SAREA_CLIPRECTS; diff --git a/src/mesa/drivers/dri/savage/savageioctl.h b/src/mesa/drivers/dri/savage/savageioctl.h index 50dce848a2..639605cc51 100644 --- a/src/mesa/drivers/dri/savage/savageioctl.h +++ b/src/mesa/drivers/dri/savage/savageioctl.h @@ -77,10 +77,10 @@ GLboolean savageHaveIndexedVerts( savageContextPtr imesa ) } static INLINE -u_int32_t *savageAllocVtxBuf( savageContextPtr imesa, GLuint words ) +uint32_t *savageAllocVtxBuf( savageContextPtr imesa, GLuint words ) { struct savage_vtxbuf_t *buffer = imesa->vtxBuf; - u_int32_t *head; + uint32_t *head; if (buffer == &imesa->dmaVtxBuf) { if (!buffer->total) { @@ -116,9 +116,9 @@ u_int32_t *savageAllocVtxBuf( savageContextPtr imesa, GLuint words ) } static INLINE -u_int32_t *savageAllocIndexedVerts( savageContextPtr imesa, GLuint n ) +uint32_t *savageAllocIndexedVerts( savageContextPtr imesa, GLuint n ) { - u_int32_t *ret; + uint32_t *ret; savageFlushVertices(imesa); ret = savageAllocVtxBuf(imesa, n*imesa->HwVertexSize); imesa->firstElt = imesa->vtxBuf->flushed / imesa->HwVertexSize; @@ -172,9 +172,9 @@ drm_savage_cmd_header_t *savageAllocCmdBuf( savageContextPtr imesa, GLuint bytes * - increments the number of elts. Final allocation is done in savageFlushElts */ static INLINE -u_int16_t *savageAllocElts( savageContextPtr imesa, GLuint n ) +uint16_t *savageAllocElts( savageContextPtr imesa, GLuint n ) { - u_int16_t *ret; + uint16_t *ret; GLuint qwords; assert (savageHaveIndexedVerts(imesa)); @@ -195,7 +195,7 @@ u_int16_t *savageAllocElts( savageContextPtr imesa, GLuint n ) imesa->elts.n = 0; } - ret = (u_int16_t *)(imesa->elts.cmd+1) + imesa->elts.n; + ret = (uint16_t *)(imesa->elts.cmd+1) + imesa->elts.n; imesa->elts.n += n; return ret; } diff --git a/src/mesa/drivers/dri/savage/savagestate.c b/src/mesa/drivers/dri/savage/savagestate.c index 20e0310f9c..73d85ed57b 100644 --- a/src/mesa/drivers/dri/savage/savagestate.c +++ b/src/mesa/drivers/dri/savage/savagestate.c @@ -122,9 +122,9 @@ static void savageDDBlendEquationSeparate(GLcontext *ctx, static void savageBlendFunc_s4(GLcontext *ctx) { savageContextPtr imesa = SAVAGE_CONTEXT(ctx); - u_int32_t drawLocalCtrl = imesa->regs.s4.drawLocalCtrl.ui; - u_int32_t drawCtrl0 = imesa->regs.s4.drawCtrl0.ui; - u_int32_t drawCtrl1 = imesa->regs.s4.drawCtrl1.ui; + uint32_t drawLocalCtrl = imesa->regs.s4.drawLocalCtrl.ui; + uint32_t drawCtrl0 = imesa->regs.s4.drawCtrl0.ui; + uint32_t drawCtrl1 = imesa->regs.s4.drawCtrl1.ui; /* set up draw control register (including blending, alpha * test, and shading model) @@ -297,8 +297,8 @@ static void savageBlendFunc_s4(GLcontext *ctx) static void savageBlendFunc_s3d(GLcontext *ctx) { savageContextPtr imesa = SAVAGE_CONTEXT(ctx); - u_int32_t drawCtrl = imesa->regs.s3d.drawCtrl.ui; - u_int32_t zBufCtrl = imesa->regs.s3d.zBufCtrl.ui; + uint32_t drawCtrl = imesa->regs.s3d.drawCtrl.ui; + uint32_t zBufCtrl = imesa->regs.s3d.zBufCtrl.ui; /* set up draw control register (including blending, alpha * test, dithering, and shading model) @@ -486,9 +486,9 @@ static void savageDDDepthFunc_s4(GLcontext *ctx, GLenum func) { savageContextPtr imesa = SAVAGE_CONTEXT(ctx); ZCmpFunc zmode; - u_int32_t drawLocalCtrl = imesa->regs.s4.drawLocalCtrl.ui; - u_int32_t zBufCtrl = imesa->regs.s4.zBufCtrl.ui; - u_int32_t zWatermarks = imesa->regs.s4.zWatermarks.ui; /* FIXME: in DRM */ + uint32_t drawLocalCtrl = imesa->regs.s4.drawLocalCtrl.ui; + uint32_t zBufCtrl = imesa->regs.s4.zBufCtrl.ui; + uint32_t zWatermarks = imesa->regs.s4.zWatermarks.ui; /* FIXME: in DRM */ /* set up z-buffer control register (global) * set up z-buffer offset register (global) @@ -550,9 +550,9 @@ static void savageDDDepthFunc_s3d(GLcontext *ctx, GLenum func) { savageContextPtr imesa = SAVAGE_CONTEXT(ctx); ZCmpFunc zmode; - u_int32_t drawCtrl = imesa->regs.s3d.drawCtrl.ui; - u_int32_t zBufCtrl = imesa->regs.s3d.zBufCtrl.ui; - u_int32_t zWatermarks = imesa->regs.s3d.zWatermarks.ui; /* FIXME: in DRM */ + uint32_t drawCtrl = imesa->regs.s3d.drawCtrl.ui; + uint32_t zBufCtrl = imesa->regs.s3d.zBufCtrl.ui; + uint32_t zWatermarks = imesa->regs.s3d.zWatermarks.ui; /* FIXME: in DRM */ /* set up z-buffer control register (global) * set up z-buffer offset register (global) @@ -638,7 +638,7 @@ static void savageDDScissor( GLcontext *ctx, GLint x, GLint y, static void savageDDDrawBuffer(GLcontext *ctx, GLenum mode ) { savageContextPtr imesa = SAVAGE_CONTEXT(ctx); - u_int32_t destCtrl = imesa->regs.s4.destCtrl.ui; + uint32_t destCtrl = imesa->regs.s4.destCtrl.ui; if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) { FALLBACK( ctx, SAVAGE_FALLBACK_DRAW_BUFFER, GL_TRUE ); @@ -867,7 +867,7 @@ static void savageDDColorMask_s3d(GLcontext *ctx, static void savageUpdateSpecular_s4(GLcontext *ctx) { savageContextPtr imesa = SAVAGE_CONTEXT( ctx ); - u_int32_t drawLocalCtrl = imesa->regs.s4.drawLocalCtrl.ui; + uint32_t drawLocalCtrl = imesa->regs.s4.drawLocalCtrl.ui; if (NEED_SECONDARY_COLOR(ctx)) { imesa->regs.s4.drawLocalCtrl.ni.specShadeEn = GL_TRUE; @@ -881,7 +881,7 @@ static void savageUpdateSpecular_s4(GLcontext *ctx) { static void savageUpdateSpecular_s3d(GLcontext *ctx) { savageContextPtr imesa = SAVAGE_CONTEXT( ctx ); - u_int32_t drawCtrl = imesa->regs.s3d.drawCtrl.ui; + uint32_t drawCtrl = imesa->regs.s3d.drawCtrl.ui; if (NEED_SECONDARY_COLOR(ctx)) { imesa->regs.s3d.drawCtrl.ni.specShadeEn = GL_TRUE; @@ -907,7 +907,7 @@ static void savageDDLightModelfv_s3d(GLcontext *ctx, GLenum pname, static void savageDDShadeModel_s4(GLcontext *ctx, GLuint mod) { savageContextPtr imesa = SAVAGE_CONTEXT( ctx ); - u_int32_t drawLocalCtrl = imesa->regs.s4.drawLocalCtrl.ui; + uint32_t drawLocalCtrl = imesa->regs.s4.drawLocalCtrl.ui; if (mod == GL_SMOOTH) { @@ -924,7 +924,7 @@ static void savageDDShadeModel_s4(GLcontext *ctx, GLuint mod) static void savageDDShadeModel_s3d(GLcontext *ctx, GLuint mod) { savageContextPtr imesa = SAVAGE_CONTEXT( ctx ); - u_int32_t drawCtrl = imesa->regs.s3d.drawCtrl.ui; + uint32_t drawCtrl = imesa->regs.s3d.drawCtrl.ui; if (mod == GL_SMOOTH) { @@ -950,7 +950,7 @@ static void savageDDFogfv(GLcontext *ctx, GLenum pname, const GLfloat *param) { savageContextPtr imesa = SAVAGE_CONTEXT(ctx); GLuint fogClr; - u_int32_t fogCtrl = imesa->regs.s4.fogCtrl.ui; + uint32_t fogCtrl = imesa->regs.s4.fogCtrl.ui; /*if ((ctx->Fog.Enabled) &&(pname == GL_FOG_COLOR))*/ if (ctx->Fog.Enabled) @@ -982,8 +982,8 @@ savageDDStencilFuncSeparate(GLcontext *ctx, GLenum face, GLenum func, { savageContextPtr imesa = SAVAGE_CONTEXT(ctx); unsigned a=0; - const u_int32_t zBufCtrl = imesa->regs.s4.zBufCtrl.ui; - const u_int32_t stencilCtrl = imesa->regs.s4.stencilCtrl.ui; + const uint32_t zBufCtrl = imesa->regs.s4.zBufCtrl.ui; + const uint32_t stencilCtrl = imesa->regs.s4.stencilCtrl.ui; imesa->regs.s4.zBufCtrl.ni.stencilRefVal = ctx->Stencil.Ref[0] & 0xff; imesa->regs.s4.stencilCtrl.ni.readMask = ctx->Stencil.ValueMask[0] & 0xff; @@ -1043,7 +1043,7 @@ savageDDStencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail, GLenum zfail, GLenum zpass) { savageContextPtr imesa = SAVAGE_CONTEXT(ctx); - const u_int32_t stencilCtrl = imesa->regs.s4.stencilCtrl.ui; + const uint32_t stencilCtrl = imesa->regs.s4.stencilCtrl.ui; imesa->regs.s4.stencilCtrl.ni.failOp = get_stencil_op_value( ctx->Stencil.FailFunc[0] ); imesa->regs.s4.stencilCtrl.ni.passZfailOp = get_stencil_op_value( ctx->Stencil.ZFailFunc[0] ); @@ -1615,8 +1615,8 @@ static void savageDDInitState_s3d( savageContextPtr imesa ) imesa->globalRegMask.s3d.zBufCtrl.ni.zBufEn = 0x1; } void savageDDInitState( savageContextPtr imesa ) { - memset (imesa->regs.ui, 0, SAVAGE_NR_REGS*sizeof(u_int32_t)); - memset (imesa->globalRegMask.ui, 0xff, SAVAGE_NR_REGS*sizeof(u_int32_t)); + memset (imesa->regs.ui, 0, SAVAGE_NR_REGS*sizeof(uint32_t)); + memset (imesa->globalRegMask.ui, 0xff, SAVAGE_NR_REGS*sizeof(uint32_t)); if (imesa->savageScreen->chipset >= S3_SAVAGE4) savageDDInitState_s4 (imesa); else @@ -1658,7 +1658,7 @@ void savageDDInitState( savageContextPtr imesa ) { imesa->regs.s4.zBufOffset.ni.zDepthSelect = 1; } - memcpy (imesa->oldRegs.ui, imesa->regs.ui, SAVAGE_NR_REGS*sizeof(u_int32_t)); + memcpy (imesa->oldRegs.ui, imesa->regs.ui, SAVAGE_NR_REGS*sizeof(uint32_t)); /* Emit the initial state to the (empty) command buffer. */ assert (imesa->cmdBuf.write == imesa->cmdBuf.base); diff --git a/src/mesa/drivers/dri/savage/savagetex.c b/src/mesa/drivers/dri/savage/savagetex.c index 3334744655..a3bebfa8cf 100644 --- a/src/mesa/drivers/dri/savage/savagetex.c +++ b/src/mesa/drivers/dri/savage/savagetex.c @@ -1364,7 +1364,7 @@ static void savageUpdateTex0State_s4( GLcontext *ctx ) if (imesa->regs.s4.texDescr.ni.tex1En) imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE; - imesa->regs.s4.texAddr[0].ui = (u_int32_t) t->setup.physAddr | 0x2; + imesa->regs.s4.texAddr[0].ui = (uint32_t) t->setup.physAddr | 0x2; if(t->base.heap->heapId == SAVAGE_AGP_HEAP) imesa->regs.s4.texAddr[0].ui |= 0x1; @@ -1549,7 +1549,7 @@ static void savageUpdateTex1State_s4( GLcontext *ctx ) imesa->regs.s4.texCtrl[1].ni.dMax = t->base.lastLevel - t->base.firstLevel; imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE; - imesa->regs.s4.texAddr[1].ui = (u_int32_t) t->setup.physAddr | 2; + imesa->regs.s4.texAddr[1].ui = (uint32_t) t->setup.physAddr | 2; if(t->base.heap->heapId == SAVAGE_AGP_HEAP) imesa->regs.s4.texAddr[1].ui |= 0x1; } @@ -1700,7 +1700,7 @@ static void savageUpdateTexState_s3d( GLcontext *ctx ) assert (t->hwFormat <= 7); imesa->regs.s3d.texDescr.ni.texFmt = t->hwFormat; - imesa->regs.s3d.texAddr.ui = (u_int32_t) t->setup.physAddr | 2; + imesa->regs.s3d.texAddr.ui = (uint32_t) t->setup.physAddr | 2; if(t->base.heap->heapId == SAVAGE_AGP_HEAP) imesa->regs.s3d.texAddr.ui |= 0x1; } diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c index 93ea6882f2..1661234f62 100644 --- a/src/mesa/drivers/dri/savage/savagetris.c +++ b/src/mesa/drivers/dri/savage/savagetris.c @@ -100,7 +100,7 @@ static void INLINE savage_draw_triangle (savageContextPtr imesa, savageVertexPtr v1, savageVertexPtr v2) { GLuint vertsize = imesa->HwVertexSize; - u_int32_t *vb = savageAllocVtxBuf (imesa, 3*vertsize); + uint32_t *vb = savageAllocVtxBuf (imesa, 3*vertsize); GLuint j; EMIT_VERT (j, vb, vertsize, 0, v0); @@ -114,7 +114,7 @@ static void INLINE savage_draw_quad (savageContextPtr imesa, savageVertexPtr v2, savageVertexPtr v3) { GLuint vertsize = imesa->HwVertexSize; - u_int32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize); + uint32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize); GLuint j; EMIT_VERT (j, vb, vertsize, 0, v0); @@ -128,7 +128,7 @@ static void INLINE savage_draw_quad (savageContextPtr imesa, static INLINE void savage_draw_point (savageContextPtr imesa, savageVertexPtr tmp) { GLuint vertsize = imesa->HwVertexSize; - u_int32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize); + uint32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize); const GLfloat x = tmp->v.x; const GLfloat y = tmp->v.y; const GLfloat sz = 0.5 * CLAMP(imesa->glCtx->Point.Size, @@ -165,7 +165,7 @@ static INLINE void savage_draw_line (savageContextPtr imesa, savageVertexPtr v0, savageVertexPtr v1 ) { GLuint vertsize = imesa->HwVertexSize; - u_int32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize); + uint32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize); const GLfloat width = CLAMP(imesa->glCtx->Line.Width, imesa->glCtx->Const.MinLineWidth, imesa->glCtx->Const.MaxLineWidth); @@ -224,7 +224,7 @@ static void INLINE savage_ptex_tri (savageContextPtr imesa, savageVertexPtr v1, savageVertexPtr v2) { GLuint vertsize = imesa->HwVertexSize; - u_int32_t *vb = savageAllocVtxBuf (imesa, 3*vertsize); + uint32_t *vb = savageAllocVtxBuf (imesa, 3*vertsize); savageVertex tmp; GLuint j; @@ -237,7 +237,7 @@ static INLINE void savage_ptex_line (savageContextPtr imesa, savageVertexPtr v0, savageVertexPtr v1 ) { GLuint vertsize = imesa->HwVertexSize; - u_int32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize); + uint32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize); const GLfloat width = CLAMP(imesa->glCtx->Line.Width, imesa->glCtx->Const.MinLineWidth, imesa->glCtx->Const.MaxLineWidth); @@ -284,7 +284,7 @@ static INLINE void savage_ptex_line (savageContextPtr imesa, static INLINE void savage_ptex_point (savageContextPtr imesa, savageVertexPtr v0) { GLuint vertsize = imesa->HwVertexSize; - u_int32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize); + uint32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize); const GLfloat x = v0->v.x; const GLfloat y = v0->v.y; const GLfloat sz = 0.5 * CLAMP(imesa->glCtx->Point.Size, diff --git a/src/mesa/drivers/dri/sis/sis_screen.c b/src/mesa/drivers/dri/sis/sis_screen.c index f6c7feabb8..bbc2763624 100644 --- a/src/mesa/drivers/dri/sis/sis_screen.c +++ b/src/mesa/drivers/dri/sis/sis_screen.c @@ -76,8 +76,8 @@ sisFillInModes(__DRIscreenPrivate *psp, int bpp) static const GLenum back_buffer_modes[] = { GLX_NONE, GLX_SWAP_UNDEFINED_OML }; - u_int8_t depth_bits_array[4]; - u_int8_t stencil_bits_array[4]; + uint8_t depth_bits_array[4]; + uint8_t stencil_bits_array[4]; depth_bits_array[0] = 0; stencil_bits_array[0] = 0; diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c index 8ac44c46d4..49f1b8b9ee 100644 --- a/src/mesa/drivers/dri/swrast/swrast.c +++ b/src/mesa/drivers/dri/swrast/swrast.c @@ -143,8 +143,8 @@ swrastFillInModes(__DRIscreen *psp, GLX_NONE, GLX_SWAP_UNDEFINED_OML }; - u_int8_t depth_bits_array[4]; - u_int8_t stencil_bits_array[4]; + uint8_t depth_bits_array[4]; + uint8_t stencil_bits_array[4]; depth_bits_array[0] = 0; depth_bits_array[1] = 0; diff --git a/src/mesa/drivers/dri/unichrome/server/via_dri.c b/src/mesa/drivers/dri/unichrome/server/via_dri.c index 6944bd66f9..cae43a481d 100644 --- a/src/mesa/drivers/dri/unichrome/server/via_dri.c +++ b/src/mesa/drivers/dri/unichrome/server/via_dri.c @@ -53,9 +53,9 @@ static int VIADRIFinishScreenInit(DRIDriverContext * ctx); /* _SOLO : missing macros normally defined by X code */ #define xf86DrvMsg(a, b, ...) fprintf(stderr, __VA_ARGS__) -#define MMIO_IN8(base, addr) ((*(((volatile u_int8_t*)base)+(addr)))+0) -#define MMIO_OUT8(base, addr, val) ((*(((volatile u_int8_t*)base)+(addr)))=((u_int8_t)val)) -#define MMIO_OUT16(base, addr, val) ((*(volatile u_int16_t*)(((u_int8_t*)base)+(addr)))=((u_int16_t)val)) +#define MMIO_IN8(base, addr) ((*(((volatile uint8_t*)base)+(addr)))+0) +#define MMIO_OUT8(base, addr, val) ((*(((volatile uint8_t*)base)+(addr)))=((uint8_t)val)) +#define MMIO_OUT16(base, addr, val) ((*(volatile uint16_t*)(((uint8_t*)base)+(addr)))=((uint16_t)val)) #define VIDEO 0 #define AGP 1 @@ -524,9 +524,9 @@ static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia) drmInfo.fb_offset = pVia->FrameBufferBase; drmInfo.mmio_offset = pVia->registerHandle; if (pVia->IsPCI) - drmInfo.agpAddr = (u_int32_t)NULL; + drmInfo.agpAddr = (uint32_t)NULL; else - drmInfo.agpAddr = (u_int32_t)pVia->agpAddr; + drmInfo.agpAddr = (uint32_t)pVia->agpAddr; if ((drmCommandWrite(pVia->drmFD, DRM_VIA_MAP_INIT,&drmInfo, sizeof(drm_via_init_t))) < 0) @@ -632,7 +632,7 @@ static void VIADisableMMIO(DRIDriverContext * ctx) static void VIADisableExtendedFIFO(DRIDriverContext *ctx) { VIAPtr pVia = VIAPTR(ctx); - u_int32_t dwGE230, dwGE298; + uint32_t dwGE230, dwGE298; /* Cause of exit XWindow will dump back register value, others chipset no * need to set extended fifo value */ @@ -654,8 +654,8 @@ static void VIADisableExtendedFIFO(DRIDriverContext *ctx) static void VIAEnableExtendedFIFO(DRIDriverContext *ctx) { VIAPtr pVia = VIAPTR(ctx); - u_int8_t bRegTemp; - u_int32_t dwGE230, dwGE298; + uint8_t bRegTemp; + uint32_t dwGE230, dwGE298; switch (pVia->Chipset) { case VIA_CLE266: @@ -850,7 +850,7 @@ static void VIAEnableExtendedFIFO(DRIDriverContext *ctx) SR1C[7:0], SR1D[1:0] (10bits) *=*/ wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4; VGAOUT8(0x3c4, 0x1c); - VGAOUT8(0x3c5, (u_int8_t)(wRegTemp & 0xFF)); + VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF)); VGAOUT8(0x3c4, 0x1d); bRegTemp = VGAIN8(0x3c5) & ~0x03; VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8)); @@ -896,7 +896,7 @@ static void VIAEnableExtendedFIFO(DRIDriverContext *ctx) SR1C[7:0], SR1D[1:0] (10bits) *=*/ wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4; VGAOUT8(0x3c4, 0x1c); - VGAOUT8(0x3c5, (u_int8_t)(wRegTemp & 0xFF)); + VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF)); VGAOUT8(0x3c4, 0x1d); bRegTemp = VGAIN8(0x3c5) & ~0x03; VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8)); @@ -924,9 +924,9 @@ static void VIAEnableExtendedFIFO(DRIDriverContext *ctx) static void VIAInitialize2DEngine(DRIDriverContext *ctx) { VIAPtr pVia = VIAPTR(ctx); - u_int32_t dwVQStartAddr, dwVQEndAddr; - u_int32_t dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH; - u_int32_t dwGEMode; + uint32_t dwVQStartAddr, dwVQEndAddr; + uint32_t dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH; + uint32_t dwGEMode; /* init 2D engine regs to reset 2D engine */ VIASETREG(0x04, 0x0); @@ -1069,14 +1069,14 @@ static void VIAInitialize3DEngine(DRIDriverContext *ctx) for (i = 0; i <= 0x7D; i++) { - VIASETREG(0x440, (u_int32_t) i << 24); + VIASETREG(0x440, (uint32_t) i << 24); } VIASETREG(0x43C, 0x00020000); for (i = 0; i <= 0x94; i++) { - VIASETREG(0x440, (u_int32_t) i << 24); + VIASETREG(0x440, (uint32_t) i << 24); } VIASETREG(0x440, 0x82400000); @@ -1086,7 +1086,7 @@ static void VIAInitialize3DEngine(DRIDriverContext *ctx) for (i = 0; i <= 0x94; i++) { - VIASETREG(0x440, (u_int32_t) i << 24); + VIASETREG(0x440, (uint32_t) i << 24); } VIASETREG(0x440, 0x82400000); @@ -1094,7 +1094,7 @@ static void VIAInitialize3DEngine(DRIDriverContext *ctx) for (i = 0; i <= 0x03; i++) { - VIASETREG(0x440, (u_int32_t) i << 24); + VIASETREG(0x440, (uint32_t) i << 24); } VIASETREG(0x43C, 0x00030000); diff --git a/src/mesa/drivers/dri/unichrome/server/via_driver.h b/src/mesa/drivers/dri/unichrome/server/via_driver.h index 997b2e41a7..f6f2d58938 100644 --- a/src/mesa/drivers/dri/unichrome/server/via_driver.h +++ b/src/mesa/drivers/dri/unichrome/server/via_driver.h @@ -212,12 +212,12 @@ typedef struct _VIA { XAAInfoRecPtr AccelInfoRec; xRectangle Rect; #endif - u_int32_t SavedCmd; - u_int32_t SavedFgColor; - u_int32_t SavedBgColor; - u_int32_t SavedPattern0; - u_int32_t SavedPattern1; - u_int32_t SavedPatternAddr; + uint32_t SavedCmd; + uint32_t SavedFgColor; + uint32_t SavedBgColor; + uint32_t SavedPattern0; + uint32_t SavedPattern1; + uint32_t SavedPatternAddr; #if 0 /* Support for Int10 processing */ @@ -255,8 +255,8 @@ typedef struct _VIA { #endif /* - u_int32_t Cap0_Deinterlace; - u_int32_t Cap1_Deinterlace; + uint32_t Cap0_Deinterlace; + uint32_t Cap1_Deinterlace; int Cap0_FieldSwap; int NoCap0_HFilter; @@ -272,7 +272,7 @@ typedef struct _VIA { VIAConfigPrivPtr pVisualConfigsPriv; unsigned long agpHandle; unsigned long registerHandle; - u_int32_t agpAddr; + uint32_t agpAddr; unsigned char *agpBase; unsigned int agpSize; int IsPCI; @@ -288,11 +288,11 @@ typedef struct _VIA { #endif int V4LEnabled; - u_int16_t ActiveDevice; /* if SAMM, non-equal pBIOSInfo->ActiveDevice */ + uint16_t ActiveDevice; /* if SAMM, non-equal pBIOSInfo->ActiveDevice */ unsigned char *CursorImage; - u_int32_t CursorFG; - u_int32_t CursorBG; - u_int32_t CursorMC; + uint32_t CursorFG; + uint32_t CursorBG; + uint32_t CursorMC; unsigned char MemClk; int EnableExtendedFIFO; diff --git a/src/mesa/drivers/dri/unichrome/via_screen.c b/src/mesa/drivers/dri/unichrome/via_screen.c index a5c84d1dbf..988f9935ac 100644 --- a/src/mesa/drivers/dri/unichrome/via_screen.c +++ b/src/mesa/drivers/dri/unichrome/via_screen.c @@ -340,8 +340,8 @@ viaFillInModes( __DRIscreenPrivate *psp, /* The 32-bit depth-buffer mode isn't supported yet, so don't actually * enable it. */ - static const u_int8_t depth_bits_array[4] = { 0, 16, 24, 32 }; - static const u_int8_t stencil_bits_array[4] = { 0, 0, 8, 0 }; + static const uint8_t depth_bits_array[4] = { 0, 16, 24, 32 }; + static const uint8_t stencil_bits_array[4] = { 0, 0, 8, 0 }; const unsigned depth_buffer_factor = 3; if ( pixel_bits == 16 ) { diff --git a/src/mesa/drivers/dri/unichrome/via_state.c b/src/mesa/drivers/dri/unichrome/via_state.c index ede9609ed7..1cef01ab03 100644 --- a/src/mesa/drivers/dri/unichrome/via_state.c +++ b/src/mesa/drivers/dri/unichrome/via_state.c @@ -778,10 +778,10 @@ void viaInitState(GLcontext *ctx) /** * Convert S and T texture coordinate wrap modes to hardware bits. */ -static u_int32_t +static uint32_t get_wrap_mode( GLenum sWrap, GLenum tWrap ) { - u_int32_t v = 0; + uint32_t v = 0; switch( sWrap ) { @@ -813,10 +813,10 @@ get_wrap_mode( GLenum sWrap, GLenum tWrap ) return v; } -static u_int32_t +static uint32_t get_minmag_filter( GLenum min, GLenum mag ) { - u_int32_t v = 0; + uint32_t v = 0; switch (min) { case GL_NEAREST: diff --git a/src/mesa/main/glheader.h b/src/mesa/main/glheader.h index 6f3b2089c3..602d6f5694 100644 --- a/src/mesa/main/glheader.h +++ b/src/mesa/main/glheader.h @@ -82,15 +82,6 @@ # include #endif -/* For platforms that have the C99 standard uint*_t, - but not the commonly used u_int*_t */ -#if defined(__sun) -# define u_int8_t uint8_t -# define u_int16_t uint16_t -# define u_int32_t uint32_t -# define u_int64_t uint64_t -# define u_intptr_t uintptr_t -#endif /* Sun compilers define __i386 instead of the gcc-style __i386__ */ #ifdef __SUNPRO_C -- cgit v1.2.3