From 7d6c8f980d1e23ad6f557d650e89c715861a3b0c Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Tue, 24 Nov 2009 15:02:23 +0000 Subject: tgsi: rename fields of tgsi_full_instruction to avoid excessive verbosity InstructionPredicate -> Predicate InstructionLabel -> Label InstructionTexture -> Texture FullSrcRegisters -> Src FullDstRegisters -> Dst --- src/gallium/auxiliary/tgsi/tgsi_build.c | 34 +++++++++++------------ src/gallium/auxiliary/tgsi/tgsi_dump.c | 8 +++--- src/gallium/auxiliary/tgsi/tgsi_dump_c.c | 8 +++--- src/gallium/auxiliary/tgsi/tgsi_exec.c | 46 ++++++++++++++++---------------- src/gallium/auxiliary/tgsi/tgsi_parse.c | 42 ++++++++++++++--------------- src/gallium/auxiliary/tgsi/tgsi_parse.h | 10 +++---- src/gallium/auxiliary/tgsi/tgsi_ppc.c | 8 +++--- src/gallium/auxiliary/tgsi/tgsi_sanity.c | 24 ++++++++--------- src/gallium/auxiliary/tgsi/tgsi_scan.c | 6 ++--- src/gallium/auxiliary/tgsi/tgsi_sse2.c | 16 +++++------ src/gallium/auxiliary/tgsi/tgsi_text.c | 8 +++--- 11 files changed, 105 insertions(+), 105 deletions(-) (limited to 'src/gallium/auxiliary/tgsi') diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c b/src/gallium/auxiliary/tgsi/tgsi_build.c index 2e6c5b38b4..7ec832aad9 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_build.c +++ b/src/gallium/auxiliary/tgsi/tgsi_build.c @@ -473,14 +473,14 @@ tgsi_default_full_instruction( void ) unsigned i; full_instruction.Instruction = tgsi_default_instruction(); - full_instruction.InstructionPredicate = tgsi_default_instruction_predicate(); - full_instruction.InstructionLabel = tgsi_default_instruction_label(); - full_instruction.InstructionTexture = tgsi_default_instruction_texture(); + full_instruction.Predicate = tgsi_default_instruction_predicate(); + full_instruction.Label = tgsi_default_instruction_label(); + full_instruction.Texture = tgsi_default_instruction_texture(); for( i = 0; i < TGSI_FULL_MAX_DST_REGISTERS; i++ ) { - full_instruction.FullDstRegisters[i] = tgsi_default_full_dst_register(); + full_instruction.Dst[i] = tgsi_default_full_dst_register(); } for( i = 0; i < TGSI_FULL_MAX_SRC_REGISTERS; i++ ) { - full_instruction.FullSrcRegisters[i] = tgsi_default_full_src_register(); + full_instruction.Src[i] = tgsi_default_full_src_register(); } return full_instruction; @@ -521,18 +521,18 @@ tgsi_build_full_instruction( size++; *instruction_predicate = - tgsi_build_instruction_predicate(full_inst->InstructionPredicate.Index, - full_inst->InstructionPredicate.Negate, - full_inst->InstructionPredicate.SwizzleX, - full_inst->InstructionPredicate.SwizzleY, - full_inst->InstructionPredicate.SwizzleZ, - full_inst->InstructionPredicate.SwizzleW, + tgsi_build_instruction_predicate(full_inst->Predicate.Index, + full_inst->Predicate.Negate, + full_inst->Predicate.SwizzleX, + full_inst->Predicate.SwizzleY, + full_inst->Predicate.SwizzleZ, + full_inst->Predicate.SwizzleW, instruction, header); } if( tgsi_compare_instruction_label( - full_inst->InstructionLabel, + full_inst->Label, tgsi_default_instruction_label() ) ) { struct tgsi_instruction_label *instruction_label; @@ -543,7 +543,7 @@ tgsi_build_full_instruction( size++; *instruction_label = tgsi_build_instruction_label( - full_inst->InstructionLabel.Label, + full_inst->Label.Label, prev_token, instruction, header ); @@ -551,7 +551,7 @@ tgsi_build_full_instruction( } if( tgsi_compare_instruction_texture( - full_inst->InstructionTexture, + full_inst->Texture, tgsi_default_instruction_texture() ) ) { struct tgsi_instruction_texture *instruction_texture; @@ -562,7 +562,7 @@ tgsi_build_full_instruction( size++; *instruction_texture = tgsi_build_instruction_texture( - full_inst->InstructionTexture.Texture, + full_inst->Texture.Texture, prev_token, instruction, header ); @@ -570,7 +570,7 @@ tgsi_build_full_instruction( } for( i = 0; i < full_inst->Instruction.NumDstRegs; i++ ) { - const struct tgsi_full_dst_register *reg = &full_inst->FullDstRegisters[i]; + const struct tgsi_full_dst_register *reg = &full_inst->Dst[i]; struct tgsi_dst_register *dst_register; struct tgsi_token *prev_token; @@ -613,7 +613,7 @@ tgsi_build_full_instruction( } for( i = 0; i < full_inst->Instruction.NumSrcRegs; i++ ) { - const struct tgsi_full_src_register *reg = &full_inst->FullSrcRegisters[i]; + const struct tgsi_full_src_register *reg = &full_inst->Src[i]; struct tgsi_src_register *src_register; struct tgsi_token *prev_token; diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c b/src/gallium/auxiliary/tgsi/tgsi_dump.c index 8f26d5dae3..4ff7f4b11e 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_dump.c +++ b/src/gallium/auxiliary/tgsi/tgsi_dump.c @@ -352,7 +352,7 @@ iter_instruction( } for (i = 0; i < inst->Instruction.NumDstRegs; i++) { - const struct tgsi_full_dst_register *dst = &inst->FullDstRegisters[i]; + const struct tgsi_full_dst_register *dst = &inst->Dst[i]; if (!first_reg) CHR( ',' ); @@ -380,7 +380,7 @@ iter_instruction( } for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *src = &inst->FullSrcRegisters[i]; + const struct tgsi_full_src_register *src = &inst->Src[i]; if (!first_reg) CHR( ',' ); @@ -429,7 +429,7 @@ iter_instruction( if (inst->Instruction.Texture) { TXT( ", " ); - ENM( inst->InstructionTexture.Texture, texture_names ); + ENM( inst->Texture.Texture, texture_names ); } switch (inst->Instruction.Opcode) { @@ -439,7 +439,7 @@ iter_instruction( case TGSI_OPCODE_ENDLOOP: case TGSI_OPCODE_CAL: TXT( " :" ); - UID( inst->InstructionLabel.Label ); + UID( inst->Label.Label ); break; } diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump_c.c b/src/gallium/auxiliary/tgsi/tgsi_dump_c.c index 11d28b1653..194b2473bc 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_dump_c.c +++ b/src/gallium/auxiliary/tgsi/tgsi_dump_c.c @@ -334,8 +334,8 @@ dump_instruction_verbose( } for( i = 0; i < inst->Instruction.NumDstRegs; i++ ) { - struct tgsi_full_dst_register *dst = &inst->FullDstRegisters[i]; - struct tgsi_full_dst_register *fd = &fi->FullDstRegisters[i]; + struct tgsi_full_dst_register *dst = &inst->Dst[i]; + struct tgsi_full_dst_register *fd = &fi->Dst[i]; EOL(); TXT( "\nFile : " ); @@ -387,8 +387,8 @@ dump_instruction_verbose( } for( i = 0; i < inst->Instruction.NumSrcRegs; i++ ) { - struct tgsi_full_src_register *src = &inst->FullSrcRegisters[i]; - struct tgsi_full_src_register *fs = &fi->FullSrcRegisters[i]; + struct tgsi_full_src_register *src = &inst->Src[i]; + struct tgsi_full_src_register *fs = &fi->Src[i]; EOL(); TXT( "\nFile : "); diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c index c113f4a3bc..a9bfb0d6df 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_exec.c +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c @@ -107,10 +107,10 @@ #define TEMP_P0 TGSI_EXEC_TEMP_P0 #define IS_CHANNEL_ENABLED(INST, CHAN)\ - ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN))) + ((INST).Dst[0].DstRegister.WriteMask & (1 << (CHAN))) #define IS_CHANNEL_ENABLED2(INST, CHAN)\ - ((INST).FullDstRegisters[1].DstRegister.WriteMask & (1 << (CHAN))) + ((INST).Dst[1].DstRegister.WriteMask & (1 << (CHAN))) #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\ for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\ @@ -188,7 +188,7 @@ tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst) { uint i, chan; - uint writemask = inst->FullDstRegisters[0].DstRegister.WriteMask; + uint writemask = inst->Dst[0].DstRegister.WriteMask; if (writemask == TGSI_WRITEMASK_X || writemask == TGSI_WRITEMASK_Y || writemask == TGSI_WRITEMASK_Z || @@ -200,15 +200,15 @@ tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst) /* loop over src regs */ for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { - if ((inst->FullSrcRegisters[i].SrcRegister.File == - inst->FullDstRegisters[0].DstRegister.File) && - (inst->FullSrcRegisters[i].SrcRegister.Index == - inst->FullDstRegisters[0].DstRegister.Index)) { + if ((inst->Src[i].SrcRegister.File == + inst->Dst[0].DstRegister.File) && + (inst->Src[i].SrcRegister.Index == + inst->Dst[0].DstRegister.Index)) { /* loop over dest channels */ uint channelsWritten = 0x0; FOR_EACH_ENABLED_CHANNEL(*inst, chan) { /* check if we're reading a channel that's been written */ - uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->FullSrcRegisters[i], chan); + uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan); if (channelsWritten & (1 << swizzle)) { return TRUE; } @@ -1500,27 +1500,27 @@ store_dest( switch (chan_index) { case CHAN_X: - swizzle = inst->InstructionPredicate.SwizzleX; + swizzle = inst->Predicate.SwizzleX; break; case CHAN_Y: - swizzle = inst->InstructionPredicate.SwizzleY; + swizzle = inst->Predicate.SwizzleY; break; case CHAN_Z: - swizzle = inst->InstructionPredicate.SwizzleZ; + swizzle = inst->Predicate.SwizzleZ; break; case CHAN_W: - swizzle = inst->InstructionPredicate.SwizzleW; + swizzle = inst->Predicate.SwizzleW; break; default: assert(0); return; } - assert(inst->InstructionPredicate.Index == 0); + assert(inst->Predicate.Index == 0); - pred = &mach->Predicates[inst->InstructionPredicate.Index].xyzw[swizzle]; + pred = &mach->Predicates[inst->Predicate.Index].xyzw[swizzle]; - if (inst->InstructionPredicate.Negate) { + if (inst->Predicate.Negate) { for (i = 0; i < QUAD_SIZE; i++) { if (pred->u[i]) { execmask &= ~(1 << i); @@ -1572,10 +1572,10 @@ store_dest( } #define FETCH(VAL,INDEX,CHAN)\ - fetch_source (mach, VAL, &inst->FullSrcRegisters[INDEX], CHAN) + fetch_source (mach, VAL, &inst->Src[INDEX], CHAN) #define STORE(VAL,INDEX,CHAN)\ - store_dest (mach, VAL, &inst->FullDstRegisters[INDEX], inst, CHAN ) + store_dest (mach, VAL, &inst->Dst[INDEX], inst, CHAN ) /** @@ -1601,7 +1601,7 @@ exec_kil(struct tgsi_exec_machine *mach, /* unswizzle channel */ swizzle = tgsi_util_get_full_src_register_swizzle ( - &inst->FullSrcRegisters[0], + &inst->Src[0], chan_index); /* check if the component has not been already tested */ @@ -1668,14 +1668,14 @@ exec_tex(struct tgsi_exec_machine *mach, boolean biasLod, boolean projected) { - const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index; + const uint unit = inst->Src[1].SrcRegister.Index; union tgsi_exec_channel r[4]; uint chan_index; float lodBias; /* debug_printf("Sampler %u unit %u\n", sampler, unit); */ - switch (inst->InstructionTexture.Texture) { + switch (inst->Texture.Texture) { case TGSI_TEXTURE_1D: case TGSI_TEXTURE_SHADOW1D: @@ -1765,7 +1765,7 @@ static void exec_txd(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) { - const uint unit = inst->FullSrcRegisters[3].SrcRegister.Index; + const uint unit = inst->Src[3].SrcRegister.Index; union tgsi_exec_channel r[4]; uint chan_index; @@ -1773,7 +1773,7 @@ exec_txd(struct tgsi_exec_machine *mach, * XXX: This is fake TXD -- the derivatives are not taken into account, yet. */ - switch (inst->InstructionTexture.Texture) { + switch (inst->Texture.Texture) { case TGSI_TEXTURE_1D: case TGSI_TEXTURE_SHADOW1D: @@ -2740,7 +2740,7 @@ exec_instruction( mach->FuncStack[mach->FuncStackTop++] = mach->FuncMask; /* Finally, jump to the subroutine */ - *pc = inst->InstructionLabel.Label; + *pc = inst->Label.Label; } break; diff --git a/src/gallium/auxiliary/tgsi/tgsi_parse.c b/src/gallium/auxiliary/tgsi/tgsi_parse.c index d4f27499b8..ff593fdc32 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_parse.c +++ b/src/gallium/auxiliary/tgsi/tgsi_parse.c @@ -153,36 +153,36 @@ tgsi_parse_token( copy_token(&inst->Instruction, &token); if (inst->Instruction.Predicate) { - next_token(ctx, &inst->InstructionPredicate); + next_token(ctx, &inst->Predicate); } if (inst->Instruction.Label) { - next_token( ctx, &inst->InstructionLabel); + next_token( ctx, &inst->Label); } if (inst->Instruction.Texture) { - next_token( ctx, &inst->InstructionTexture); + next_token( ctx, &inst->Texture); } assert( inst->Instruction.NumDstRegs <= TGSI_FULL_MAX_DST_REGISTERS ); for( i = 0; i < inst->Instruction.NumDstRegs; i++ ) { - next_token( ctx, &inst->FullDstRegisters[i].DstRegister ); + next_token( ctx, &inst->Dst[i].DstRegister ); /* * No support for indirect or multi-dimensional addressing. */ - assert( !inst->FullDstRegisters[i].DstRegister.Dimension ); + assert( !inst->Dst[i].DstRegister.Dimension ); - if( inst->FullDstRegisters[i].DstRegister.Indirect ) { - next_token( ctx, &inst->FullDstRegisters[i].DstRegisterInd ); + if( inst->Dst[i].DstRegister.Indirect ) { + next_token( ctx, &inst->Dst[i].DstRegisterInd ); /* * No support for indirect or multi-dimensional addressing. */ - assert( !inst->FullDstRegisters[i].DstRegisterInd.Dimension ); - assert( !inst->FullDstRegisters[i].DstRegisterInd.Indirect ); + assert( !inst->Dst[i].DstRegisterInd.Dimension ); + assert( !inst->Dst[i].DstRegisterInd.Indirect ); } } @@ -190,34 +190,34 @@ tgsi_parse_token( for( i = 0; i < inst->Instruction.NumSrcRegs; i++ ) { - next_token( ctx, &inst->FullSrcRegisters[i].SrcRegister ); + next_token( ctx, &inst->Src[i].SrcRegister ); - if( inst->FullSrcRegisters[i].SrcRegister.Indirect ) { - next_token( ctx, &inst->FullSrcRegisters[i].SrcRegisterInd ); + if( inst->Src[i].SrcRegister.Indirect ) { + next_token( ctx, &inst->Src[i].SrcRegisterInd ); /* * No support for indirect or multi-dimensional addressing. */ - assert( !inst->FullSrcRegisters[i].SrcRegisterInd.Indirect ); - assert( !inst->FullSrcRegisters[i].SrcRegisterInd.Dimension ); + assert( !inst->Src[i].SrcRegisterInd.Indirect ); + assert( !inst->Src[i].SrcRegisterInd.Dimension ); } - if( inst->FullSrcRegisters[i].SrcRegister.Dimension ) { - next_token( ctx, &inst->FullSrcRegisters[i].SrcRegisterDim ); + if( inst->Src[i].SrcRegister.Dimension ) { + next_token( ctx, &inst->Src[i].SrcRegisterDim ); /* * No support for multi-dimensional addressing. */ - assert( !inst->FullSrcRegisters[i].SrcRegisterDim.Dimension ); + assert( !inst->Src[i].SrcRegisterDim.Dimension ); - if( inst->FullSrcRegisters[i].SrcRegisterDim.Indirect ) { - next_token( ctx, &inst->FullSrcRegisters[i].SrcRegisterDimInd ); + if( inst->Src[i].SrcRegisterDim.Indirect ) { + next_token( ctx, &inst->Src[i].SrcRegisterDimInd ); /* * No support for indirect or multi-dimensional addressing. */ - assert( !inst->FullSrcRegisters[i].SrcRegisterInd.Indirect ); - assert( !inst->FullSrcRegisters[i].SrcRegisterInd.Dimension ); + assert( !inst->Src[i].SrcRegisterInd.Indirect ); + assert( !inst->Src[i].SrcRegisterInd.Dimension ); } } } diff --git a/src/gallium/auxiliary/tgsi/tgsi_parse.h b/src/gallium/auxiliary/tgsi/tgsi_parse.h index 48e6987ab7..2f8f4d488b 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_parse.h +++ b/src/gallium/auxiliary/tgsi/tgsi_parse.h @@ -78,11 +78,11 @@ struct tgsi_full_immediate struct tgsi_full_instruction { struct tgsi_instruction Instruction; - struct tgsi_instruction_predicate InstructionPredicate; - struct tgsi_instruction_label InstructionLabel; - struct tgsi_instruction_texture InstructionTexture; - struct tgsi_full_dst_register FullDstRegisters[TGSI_FULL_MAX_DST_REGISTERS]; - struct tgsi_full_src_register FullSrcRegisters[TGSI_FULL_MAX_SRC_REGISTERS]; + struct tgsi_instruction_predicate Predicate; + struct tgsi_instruction_label Label; + struct tgsi_instruction_texture Texture; + struct tgsi_full_dst_register Dst[TGSI_FULL_MAX_DST_REGISTERS]; + struct tgsi_full_src_register Src[TGSI_FULL_MAX_SRC_REGISTERS]; }; union tgsi_full_token diff --git a/src/gallium/auxiliary/tgsi/tgsi_ppc.c b/src/gallium/auxiliary/tgsi/tgsi_ppc.c index 617fd7f6be..8397f432f9 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_ppc.c +++ b/src/gallium/auxiliary/tgsi/tgsi_ppc.c @@ -60,7 +60,7 @@ const float ppc_builtin_constants[] ALIGN16_ATTRIB = { for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++) #define IS_DST0_CHANNEL_ENABLED( INST, CHAN )\ - ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN))) + ((INST).Dst[0].DstRegister.WriteMask & (1 << (CHAN))) #define IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\ if (IS_DST0_CHANNEL_ENABLED( INST, CHAN )) @@ -431,7 +431,7 @@ get_src_vec(struct gen_context *gen, struct tgsi_full_instruction *inst, int src_reg, uint chan) { const const struct tgsi_full_src_register *src = - &inst->FullSrcRegisters[src_reg]; + &inst->Src[src_reg]; int vec; uint i; @@ -482,7 +482,7 @@ get_dst_vec(struct gen_context *gen, const struct tgsi_full_instruction *inst, unsigned chan_index) { - const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[0]; + const struct tgsi_full_dst_register *reg = &inst->Dst[0]; if (is_ppc_vec_temporary_dst(reg)) { int vec = gen->temps_map[reg->DstRegister.Index][chan_index]; @@ -505,7 +505,7 @@ emit_store(struct gen_context *gen, unsigned chan_index, boolean free_vec) { - const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[0]; + const struct tgsi_full_dst_register *reg = &inst->Dst[0]; switch (reg->DstRegister.File) { case TGSI_FILE_OUTPUT: diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c index 36e27ea52f..8422b91a30 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c +++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c @@ -212,24 +212,24 @@ iter_instruction( for (i = 0; i < inst->Instruction.NumDstRegs; i++) { check_register_usage( ctx, - inst->FullDstRegisters[i].DstRegister.File, - inst->FullDstRegisters[i].DstRegister.Index, + inst->Dst[i].DstRegister.File, + inst->Dst[i].DstRegister.Index, "destination", FALSE ); } for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { check_register_usage( ctx, - inst->FullSrcRegisters[i].SrcRegister.File, - inst->FullSrcRegisters[i].SrcRegister.Index, + inst->Src[i].SrcRegister.File, + inst->Src[i].SrcRegister.Index, "source", - (boolean)inst->FullSrcRegisters[i].SrcRegister.Indirect ); - if (inst->FullSrcRegisters[i].SrcRegister.Indirect) { + (boolean)inst->Src[i].SrcRegister.Indirect ); + if (inst->Src[i].SrcRegister.Indirect) { uint file; int index; - file = inst->FullSrcRegisters[i].SrcRegisterInd.File; - index = inst->FullSrcRegisters[i].SrcRegisterInd.Index; + file = inst->Src[i].SrcRegisterInd.File; + index = inst->Src[i].SrcRegisterInd.Index; check_register_usage( ctx, file, @@ -245,8 +245,8 @@ iter_instruction( switch (inst->Instruction.Opcode) { case TGSI_OPCODE_BGNFOR: case TGSI_OPCODE_ENDFOR: - if (inst->FullDstRegisters[0].DstRegister.File != TGSI_FILE_LOOP || - inst->FullDstRegisters[0].DstRegister.Index != 0) { + if (inst->Dst[0].DstRegister.File != TGSI_FILE_LOOP || + inst->Dst[0].DstRegister.Index != 0) { report_error(ctx, "Destination register must be LOOP[0]"); } break; @@ -254,8 +254,8 @@ iter_instruction( switch (inst->Instruction.Opcode) { case TGSI_OPCODE_BGNFOR: - if (inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_CONSTANT && - inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_IMMEDIATE) { + if (inst->Src[0].SrcRegister.File != TGSI_FILE_CONSTANT && + inst->Src[0].SrcRegister.File != TGSI_FILE_IMMEDIATE) { report_error(ctx, "Source register file must be either CONST or IMM"); } break; diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c b/src/gallium/auxiliary/tgsi/tgsi_scan.c index 69567130e3..be25b3dc5c 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_scan.c +++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c @@ -96,7 +96,7 @@ tgsi_scan_shader(const struct tgsi_token *tokens, uint i; for (i = 0; i < fullinst->Instruction.NumSrcRegs; i++) { const struct tgsi_full_src_register *src = - &fullinst->FullSrcRegisters[i]; + &fullinst->Src[i]; if (src->SrcRegister.File == TGSI_FILE_INPUT) { const int ind = src->SrcRegister.Index; if (info->input_semantic_name[ind] == TGSI_SEMANTIC_FOG) { @@ -205,9 +205,9 @@ tgsi_is_passthrough_shader(const struct tgsi_token *tokens) struct tgsi_full_instruction *fullinst = &parse.FullToken.FullInstruction; const struct tgsi_full_src_register *src = - &fullinst->FullSrcRegisters[0]; + &fullinst->Src[0]; const struct tgsi_full_dst_register *dst = - &fullinst->FullDstRegisters[0]; + &fullinst->Dst[0]; /* Do a whole bunch of checks for a simple move */ if (fullinst->Instruction.Opcode != TGSI_OPCODE_MOV || diff --git a/src/gallium/auxiliary/tgsi/tgsi_sse2.c b/src/gallium/auxiliary/tgsi/tgsi_sse2.c index a6cc3a5398..2d2ee321c9 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_sse2.c +++ b/src/gallium/auxiliary/tgsi/tgsi_sse2.c @@ -58,7 +58,7 @@ for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++) #define IS_DST0_CHANNEL_ENABLED( INST, CHAN )\ - ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN))) + ((INST).Dst[0].DstRegister.WriteMask & (1 << (CHAN))) #define IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\ if (IS_DST0_CHANNEL_ENABLED( INST, CHAN )) @@ -1331,7 +1331,7 @@ emit_fetch( } #define FETCH( FUNC, INST, XMM, INDEX, CHAN )\ - emit_fetch( FUNC, XMM, &(INST).FullSrcRegisters[INDEX], CHAN ) + emit_fetch( FUNC, XMM, &(INST).Src[INDEX], CHAN ) /** * Register store. @@ -1402,7 +1402,7 @@ emit_store( } #define STORE( FUNC, INST, XMM, INDEX, CHAN )\ - emit_store( FUNC, XMM, &(INST).FullDstRegisters[INDEX], &(INST), CHAN ) + emit_store( FUNC, XMM, &(INST).Dst[INDEX], &(INST), CHAN ) static void PIPE_CDECL @@ -1459,13 +1459,13 @@ emit_tex( struct x86_function *func, boolean lodbias, boolean projected) { - const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index; + const uint unit = inst->Src[1].SrcRegister.Index; struct x86_reg args[2]; unsigned count; unsigned i; assert(inst->Instruction.Texture); - switch (inst->InstructionTexture.Texture) { + switch (inst->Texture.Texture) { case TGSI_TEXTURE_1D: count = 1; break; @@ -1720,13 +1720,13 @@ indirect_temp_reference(const struct tgsi_full_instruction *inst) { uint i; for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *reg = &inst->FullSrcRegisters[i]; + const struct tgsi_full_src_register *reg = &inst->Src[i]; if (reg->SrcRegister.File == TGSI_FILE_TEMPORARY && reg->SrcRegister.Indirect) return TRUE; } for (i = 0; i < inst->Instruction.NumDstRegs; i++) { - const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[i]; + const struct tgsi_full_dst_register *reg = &inst->Dst[i]; if (reg->DstRegister.File == TGSI_FILE_TEMPORARY && reg->DstRegister.Indirect) return TRUE; @@ -2244,7 +2244,7 @@ emit_instruction( case TGSI_OPCODE_KIL: /* conditional kill */ - emit_kil( func, &inst->FullSrcRegisters[0] ); + emit_kil( func, &inst->Src[0] ); break; case TGSI_OPCODE_PK2H: diff --git a/src/gallium/auxiliary/tgsi/tgsi_text.c b/src/gallium/auxiliary/tgsi/tgsi_text.c index d25f590df7..e9b1a21fb4 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_text.c +++ b/src/gallium/auxiliary/tgsi/tgsi_text.c @@ -699,11 +699,11 @@ parse_instruction( } if (i < info->num_dst) { - if (!parse_dst_operand( ctx, &inst.FullDstRegisters[i] )) + if (!parse_dst_operand( ctx, &inst.Dst[i] )) return FALSE; } else if (i < info->num_dst + info->num_src) { - if (!parse_src_operand( ctx, &inst.FullSrcRegisters[i - info->num_dst] )) + if (!parse_src_operand( ctx, &inst.Src[i - info->num_dst] )) return FALSE; } else { @@ -713,7 +713,7 @@ parse_instruction( if (str_match_no_case( &ctx->cur, texture_names[j] )) { if (!is_digit_alpha_underscore( ctx->cur )) { inst.Instruction.Texture = 1; - inst.InstructionTexture.Texture = j; + inst.Texture.Texture = j; break; } } @@ -740,7 +740,7 @@ parse_instruction( return FALSE; } inst.Instruction.Label = 1; - inst.InstructionLabel.Label = target; + inst.Label.Label = target; } advance = tgsi_build_full_instruction( -- cgit v1.2.3