From 6fb364a1717858d8201b2caf234076ce5d4832ac Mon Sep 17 00:00:00 2001 From: Roland Scheidegger Date: Tue, 30 Mar 2010 01:35:49 +0200 Subject: gallium: adapt all code to the renamed depth/stencil formats --- src/gallium/drivers/cell/spu/spu_command.c | 4 ++-- src/gallium/drivers/cell/spu/spu_per_fragment_op.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/cell/spu') diff --git a/src/gallium/drivers/cell/spu/spu_command.c b/src/gallium/drivers/cell/spu/spu_command.c index 79f1fb7fb2..f16cabc027 100644 --- a/src/gallium/drivers/cell/spu/spu_command.c +++ b/src/gallium/drivers/cell/spu/spu_command.c @@ -337,8 +337,8 @@ cmd_state_framebuffer(const struct cell_command_framebuffer *cmd) spu.fb.zsize = 4; spu.fb.zscale = (float) 0xffffffffu; break; - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: case PIPE_FORMAT_X8Z24_UNORM: case PIPE_FORMAT_Z24X8_UNORM: spu.fb.zsize = 4; diff --git a/src/gallium/drivers/cell/spu/spu_per_fragment_op.c b/src/gallium/drivers/cell/spu/spu_per_fragment_op.c index 2c9e7458af..3b9566042a 100644 --- a/src/gallium/drivers/cell/spu/spu_per_fragment_op.c +++ b/src/gallium/drivers/cell/spu/spu_per_fragment_op.c @@ -138,13 +138,13 @@ spu_fallback_fragment_ops(uint x, uint y, if (spu.depth_stencil_alpha.stencil[0].enabled) { /* do stencil test */ - ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24S8_UNORM); + ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24_UNORM_S8_USCALED); } else if (spu.depth_stencil_alpha.depth.enabled) { /* do depth test */ - ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24S8_UNORM || + ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24_UNORM_S8_USCALED || spu.fb.depth_format == PIPE_FORMAT_Z24X8_UNORM); vector unsigned int ifragZ; -- cgit v1.2.3