From 1c608403383f3c31e19b70c578ac66443f259967 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Sun, 21 Nov 2010 20:36:01 +0100 Subject: i915g: switch to tiled allocations, kill set_fence This way relaxed fencing is handled by libdrm. And buffers _can't_ ever change their tiling. Signed-off-by: Daniel Vetter Reviewed-by: Jakob Bornecrantz Signed-off-by: Jakob Bornecrantz --- src/gallium/drivers/i915/i915_resource_texture.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) (limited to 'src/gallium/drivers/i915/i915_resource_texture.c') diff --git a/src/gallium/drivers/i915/i915_resource_texture.c b/src/gallium/drivers/i915/i915_resource_texture.c index 301d0fe497..ce95e26381 100644 --- a/src/gallium/drivers/i915/i915_resource_texture.c +++ b/src/gallium/drivers/i915/i915_resource_texture.c @@ -785,23 +785,11 @@ i915_texture_create(struct pipe_screen *screen, else buf_usage = I915_NEW_TEXTURE; - tex->buffer = iws->buffer_create(iws, tex_size, buf_usage); + tex->buffer = iws->buffer_create_tiled(iws, &tex->stride, tex->total_nblocksy, + &tex->tiling, buf_usage); if (!tex->buffer) goto fail; - /* setup any hw fences */ - if (tex->tiling) { - iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->tiling); - } - - -#if 0 - void *ptr = ws->buffer_map(ws, tex->buffer, - PIPE_BUFFER_USAGE_CPU_WRITE); - memset(ptr, 0x80, tex_size); - ws->buffer_unmap(ws, tex->buffer); -#endif - I915_DBG(DBG_TEXTURE, "%s: %p size %u, stride %u, blocks (%u, %u)\n", __func__, tex, (unsigned int)tex_size, tex->stride, tex->stride / util_format_get_blocksize(tex->b.b.format), -- cgit v1.2.3