From 39448a9aa061291f4253ee2a1a42e2488e14233c Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Sun, 1 Nov 2009 13:11:56 +0000 Subject: i965g: more files compiling --- src/gallium/drivers/i965/brw_pipe_blend.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'src/gallium/drivers/i965/brw_pipe_blend.c') diff --git a/src/gallium/drivers/i965/brw_pipe_blend.c b/src/gallium/drivers/i965/brw_pipe_blend.c index d3bb882b1a..cc9ee2e8db 100644 --- a/src/gallium/drivers/i965/brw_pipe_blend.c +++ b/src/gallium/drivers/i965/brw_pipe_blend.c @@ -130,6 +130,11 @@ static void *brw_create_blend_state( struct pipe_context *pipe, (blend->cc6.dest_blend_factor != blend->cc5.ia_dest_blend_factor || blend->cc6.src_blend_factor != blend->cc5.ia_src_blend_factor || blend->cc6.blend_function != blend->cc5.ia_blend_function); + + /* Per-surface blend enables, currently just follow global + * state: + */ + blend->ss0.color_blend = 1; } blend->cc5.dither_enable = templ->dither; @@ -137,6 +142,13 @@ static void *brw_create_blend_state( struct pipe_context *pipe, if (BRW_DEBUG & DEBUG_STATS) blend->cc5.statistics_enable = 1; + /* Per-surface color mask -- just follow global state: + */ + blend->ss0.writedisable_red = (templ->colormask & PIPE_MASK_R) ? 1 : 0; + blend->ss0.writedisable_green = (templ->colormask & PIPE_MASK_G) ? 1 : 0; + blend->ss0.writedisable_blue = (templ->colormask & PIPE_MASK_B) ? 1 : 0; + blend->ss0.writedisable_alpha = (templ->colormask & PIPE_MASK_A) ? 1 : 0; + return (void *)blend; } -- cgit v1.2.3