From 963728665aa0d48d4fdbba4276084528f221ee39 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Thu, 5 Nov 2009 20:34:27 +0000 Subject: i965g: make the winsys responsible for all buffer->offset handling The winsys now inserts the presumed offset into referring buffers from inside of bo_emit_reloc(). Remove the many locally coded places where this was happening in the driver and eliminate the worry of getting it wrong. No longer need to expose offset values to the driver at all, so no need to worry about what to do in the driver when they change. Just use zero values wherever we had offsets previously -- the relocations will fix it all up for us. --- src/gallium/drivers/i965/brw_screen_texture.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/i965/brw_screen_texture.c') diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c index 355abf0b89..8e684aa076 100644 --- a/src/gallium/drivers/i965/brw_screen_texture.c +++ b/src/gallium/drivers/i965/brw_screen_texture.c @@ -211,8 +211,10 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, /* && bscreen->use_texture_tiling */ /* && bscreen->kernel_exec_fencing */) { - if (bscreen->chipset.is_965 && - pf_is_depth_or_stencil(templ->format)) + if (1) + tex->tiling = BRW_TILING_NONE; + else if (bscreen->chipset.is_965 && + pf_is_depth_or_stencil(templ->format)) tex->tiling = BRW_TILING_Y; else tex->tiling = BRW_TILING_X; @@ -256,7 +258,7 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, /* XXX: what happens when tex->bo->offset changes??? */ - tex->ss.ss1.base_addr = tex->bo->offset[0]; /* reloc */ + tex->ss.ss1.base_addr = 0; /* reloc */ tex->ss.ss2.mip_count = tex->base.last_level; tex->ss.ss2.width = tex->base.width[0] - 1; tex->ss.ss2.height = tex->base.height[0] - 1; -- cgit v1.2.3