From 2f5f7c07732577f60666e3cee69c75c9b035c145 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Fri, 23 Oct 2009 16:55:02 +0100 Subject: i965g: re-starting from the dri driver --- src/gallium/drivers/i965/brw_vs_state.c | 185 ++++++++++++++++++++++++++++++++ 1 file changed, 185 insertions(+) create mode 100644 src/gallium/drivers/i965/brw_vs_state.c (limited to 'src/gallium/drivers/i965/brw_vs_state.c') diff --git a/src/gallium/drivers/i965/brw_vs_state.c b/src/gallium/drivers/i965/brw_vs_state.c new file mode 100644 index 0000000000..d790ab6555 --- /dev/null +++ b/src/gallium/drivers/i965/brw_vs_state.c @@ -0,0 +1,185 @@ +/* + Copyright (C) Intel Corp. 2006. All Rights Reserved. + Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to + develop this 3D driver. + + Permission is hereby granted, free of charge, to any person obtaining + a copy of this software and associated documentation files (the + "Software"), to deal in the Software without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sublicense, and/or sell copies of the Software, and to + permit persons to whom the Software is furnished to do so, subject to + the following conditions: + + The above copyright notice and this permission notice (including the + next paragraph) shall be included in all copies or substantial + portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + **********************************************************************/ + /* + * Authors: + * Keith Whitwell + */ + + + +#include "brw_context.h" +#include "brw_state.h" +#include "brw_defines.h" +#include "main/macros.h" + +struct brw_vs_unit_key { + unsigned int total_grf; + unsigned int urb_entry_read_length; + unsigned int curb_entry_read_length; + + unsigned int curbe_offset; + + unsigned int nr_urb_entries, urb_size; + + unsigned int nr_surfaces; +}; + +static void +vs_unit_populate_key(struct brw_context *brw, struct brw_vs_unit_key *key) +{ + GLcontext *ctx = &brw->intel.ctx; + + memset(key, 0, sizeof(*key)); + + /* CACHE_NEW_VS_PROG */ + key->total_grf = brw->vs.prog_data->total_grf; + key->urb_entry_read_length = brw->vs.prog_data->urb_read_length; + key->curb_entry_read_length = brw->vs.prog_data->curb_read_length; + + /* BRW_NEW_URB_FENCE */ + key->nr_urb_entries = brw->urb.nr_vs_entries; + key->urb_size = brw->urb.vsize; + + /* BRW_NEW_NR_VS_SURFACES */ + key->nr_surfaces = brw->vs.nr_surfaces; + + /* BRW_NEW_CURBE_OFFSETS, _NEW_TRANSFORM */ + if (ctx->Transform.ClipPlanesEnabled) { + /* Note that we read in the userclip planes as well, hence + * clip_start: + */ + key->curbe_offset = brw->curbe.clip_start; + } + else { + key->curbe_offset = brw->curbe.vs_start; + } +} + +static dri_bo * +vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) +{ + struct brw_vs_unit_state vs; + dri_bo *bo; + int chipset_max_threads; + + memset(&vs, 0, sizeof(vs)); + + vs.thread0.kernel_start_pointer = brw->vs.prog_bo->offset >> 6; /* reloc */ + vs.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1; + vs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; + /* Choosing multiple program flow means that we may get 2-vertex threads, + * which will have the channel mask for dwords 4-7 enabled in the thread, + * and those dwords will be written to the second URB handle when we + * brw_urb_WRITE() results. + */ + vs.thread1.single_program_flow = 0; + + if (BRW_IS_IGDNG(brw)) + vs.thread1.binding_table_entry_count = 0; /* hardware requirement */ + else + vs.thread1.binding_table_entry_count = key->nr_surfaces; + + vs.thread3.urb_entry_read_length = key->urb_entry_read_length; + vs.thread3.const_urb_entry_read_length = key->curb_entry_read_length; + vs.thread3.dispatch_grf_start_reg = 1; + vs.thread3.urb_entry_read_offset = 0; + vs.thread3.const_urb_entry_read_offset = key->curbe_offset * 2; + + if (BRW_IS_IGDNG(brw)) + vs.thread4.nr_urb_entries = key->nr_urb_entries >> 2; + else + vs.thread4.nr_urb_entries = key->nr_urb_entries; + + vs.thread4.urb_entry_allocation_size = key->urb_size - 1; + + if (BRW_IS_IGDNG(brw)) + chipset_max_threads = 72; + else if (BRW_IS_G4X(brw)) + chipset_max_threads = 32; + else + chipset_max_threads = 16; + vs.thread4.max_threads = CLAMP(key->nr_urb_entries / 2, + 1, chipset_max_threads) - 1; + + if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) + vs.thread4.max_threads = 0; + + /* No samplers for ARB_vp programs: + */ + /* It has to be set to 0 for IGDNG + */ + vs.vs5.sampler_count = 0; + + if (INTEL_DEBUG & DEBUG_STATS) + vs.thread4.stats_enable = 1; + + /* Vertex program always enabled: + */ + vs.vs6.vs_enable = 1; + + bo = brw_upload_cache(&brw->cache, BRW_VS_UNIT, + key, sizeof(*key), + &brw->vs.prog_bo, 1, + &vs, sizeof(vs), + NULL, NULL); + + /* Emit VS program relocation */ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + vs.thread0.grf_reg_count << 1, + offsetof(struct brw_vs_unit_state, thread0), + brw->vs.prog_bo); + + return bo; +} + +static void prepare_vs_unit(struct brw_context *brw) +{ + struct brw_vs_unit_key key; + + vs_unit_populate_key(brw, &key); + + dri_bo_unreference(brw->vs.state_bo); + brw->vs.state_bo = brw_search_cache(&brw->cache, BRW_VS_UNIT, + &key, sizeof(key), + &brw->vs.prog_bo, 1, + NULL); + if (brw->vs.state_bo == NULL) { + brw->vs.state_bo = vs_unit_create_from_key(brw, &key); + } +} + +const struct brw_tracked_state brw_vs_unit = { + .dirty = { + .mesa = _NEW_TRANSFORM, + .brw = (BRW_NEW_CURBE_OFFSETS | + BRW_NEW_NR_VS_SURFACES | + BRW_NEW_URB_FENCE), + .cache = CACHE_NEW_VS_PROG + }, + .prepare = prepare_vs_unit, +}; -- cgit v1.2.3 From 22906f730141a233341f3ec124bbb9dd2e8904e2 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Fri, 23 Oct 2009 23:27:43 +0100 Subject: i965g: wip on removing GL stuff, trying to get a few files compiling --- src/gallium/drivers/i965/Makefile | 73 ++----- src/gallium/drivers/i965/brw_cc.c | 18 +- src/gallium/drivers/i965/brw_clip.c | 4 +- src/gallium/drivers/i965/brw_clip_state.c | 7 +- src/gallium/drivers/i965/brw_context.c | 64 +++--- src/gallium/drivers/i965/brw_context.h | 199 ++++++++----------- src/gallium/drivers/i965/brw_curbe.c | 5 +- src/gallium/drivers/i965/brw_draw.c | 25 +-- src/gallium/drivers/i965/brw_draw.h | 7 +- src/gallium/drivers/i965/brw_draw_upload.c | 39 ++-- src/gallium/drivers/i965/brw_eu_debug.c | 2 - src/gallium/drivers/i965/brw_gs.c | 8 +- src/gallium/drivers/i965/brw_gs_emit.c | 5 - src/gallium/drivers/i965/brw_gs_state.c | 7 +- src/gallium/drivers/i965/brw_misc_state.c | 22 +- src/gallium/drivers/i965/brw_pipe_depth.c | 18 +- src/gallium/drivers/i965/brw_pipe_fb.c | 4 +- src/gallium/drivers/i965/brw_pipe_flush.c | 8 +- src/gallium/drivers/i965/brw_pipe_query.c | 246 +++++++++++++++++++++++ src/gallium/drivers/i965/brw_program.c | 166 ---------------- src/gallium/drivers/i965/brw_queryobj.c | 254 ------------------------ src/gallium/drivers/i965/brw_sf.c | 12 +- src/gallium/drivers/i965/brw_sf.h | 12 +- src/gallium/drivers/i965/brw_sf_emit.c | 26 +-- src/gallium/drivers/i965/brw_sf_state.c | 16 +- src/gallium/drivers/i965/brw_state.h | 30 +-- src/gallium/drivers/i965/brw_state_batch.c | 1 - src/gallium/drivers/i965/brw_state_cache.c | 59 +++--- src/gallium/drivers/i965/brw_state_dump.c | 12 +- src/gallium/drivers/i965/brw_state_upload.c | 4 +- src/gallium/drivers/i965/brw_structs.h | 1 + src/gallium/drivers/i965/brw_swtnl.c | 1 - src/gallium/drivers/i965/brw_tex.c | 7 - src/gallium/drivers/i965/brw_tex_layout.c | 12 +- src/gallium/drivers/i965/brw_types.h | 15 +- src/gallium/drivers/i965/brw_util.c | 2 - src/gallium/drivers/i965/brw_util.h | 2 +- src/gallium/drivers/i965/brw_vs.c | 5 +- src/gallium/drivers/i965/brw_vs_emit.c | 3 - src/gallium/drivers/i965/brw_vs_state.c | 9 +- src/gallium/drivers/i965/brw_vs_surface_state.c | 20 +- src/gallium/drivers/i965/brw_wm.c | 6 +- src/gallium/drivers/i965/brw_wm_emit.c | 1 - src/gallium/drivers/i965/brw_wm_glsl.c | 4 - src/gallium/drivers/i965/brw_wm_iz.c | 1 - src/gallium/drivers/i965/brw_wm_sampler_state.c | 15 +- src/gallium/drivers/i965/brw_wm_state.c | 19 +- src/gallium/drivers/i965/brw_wm_surface_state.c | 181 ++++++++--------- src/gallium/drivers/i965/intel_batchbuffer.h | 7 +- src/gallium/drivers/i965/intel_tex_format.c | 197 ------------------ src/gallium/drivers/i965/intel_tex_layout.c | 7 +- 51 files changed, 634 insertions(+), 1234 deletions(-) create mode 100644 src/gallium/drivers/i965/brw_pipe_query.c delete mode 100644 src/gallium/drivers/i965/brw_program.c delete mode 100644 src/gallium/drivers/i965/brw_queryobj.c (limited to 'src/gallium/drivers/i965/brw_vs_state.c') diff --git a/src/gallium/drivers/i965/Makefile b/src/gallium/drivers/i965/Makefile index 7a55333e89..480d2efbc5 100644 --- a/src/gallium/drivers/i965/Makefile +++ b/src/gallium/drivers/i965/Makefile @@ -1,38 +1,9 @@ - -TOP = ../../../../.. +TOP = ../../../.. include $(TOP)/configs/current -LIBNAME = i965_dri.so +LIBNAME = i965 -DRIVER_SOURCES = \ - intel_batchbuffer.c \ - intel_blit.c \ - intel_buffer_objects.c \ - intel_buffers.c \ - intel_clear.c \ - intel_context.c \ - intel_decode.c \ - intel_extensions.c \ - intel_fbo.c \ - intel_mipmap_tree.c \ - intel_regions.c \ - intel_screen.c \ - intel_span.c \ - intel_pixel.c \ - intel_pixel_bitmap.c \ - intel_pixel_copy.c \ - intel_pixel_draw.c \ - intel_pixel_read.c \ - intel_state.c \ - intel_swapbuffers.c \ - intel_syncobj.c \ - intel_tex.c \ - intel_tex_copy.c \ - intel_tex_format.c \ - intel_tex_image.c \ - intel_tex_layout.c \ - intel_tex_subimage.c \ - intel_tex_validate.c \ +C_SOURCES = \ brw_cc.c \ brw_clip.c \ brw_clip_line.c \ @@ -50,13 +21,18 @@ DRIVER_SOURCES = \ brw_eu_debug.c \ brw_eu_emit.c \ brw_eu_util.c \ - brw_fallback.c \ brw_gs.c \ brw_gs_emit.c \ brw_gs_state.c \ brw_misc_state.c \ - brw_program.c \ - brw_queryobj.c \ + brw_pipe_blend.c \ + brw_pipe_debug.c \ + brw_pipe_depth.c \ + brw_pipe_fb.c \ + brw_pipe_flush.c \ + brw_pipe_query.c \ + brw_pipe_shader.c \ + brw_screen_surface.c \ brw_sf.c \ brw_sf_emit.c \ brw_sf_state.c \ @@ -64,41 +40,30 @@ DRIVER_SOURCES = \ brw_state_cache.c \ brw_state_dump.c \ brw_state_upload.c \ + brw_swtnl.c \ brw_tex.c \ brw_tex_layout.c \ brw_urb.c \ brw_util.c \ brw_vs.c \ - brw_vs_constval.c \ brw_vs_emit.c \ brw_vs_state.c \ brw_vs_surface_state.c \ - brw_vtbl.c \ brw_wm.c \ brw_wm_debug.c \ brw_wm_emit.c \ brw_wm_fp.c \ - brw_wm_iz.c \ brw_wm_glsl.c \ + brw_wm_iz.c \ brw_wm_pass0.c \ brw_wm_pass1.c \ brw_wm_pass2.c \ brw_wm_sampler_state.c \ brw_wm_state.c \ - brw_wm_surface_state.c - -C_SOURCES = \ - $(COMMON_SOURCES) \ - $(MINIGLX_SOURCES) \ - $(DRIVER_SOURCES) - -ASM_SOURCES = - -DRIVER_DEFINES = -I../intel -I../intel/server - -DRI_LIB_DEPS += -ldrm_intel - -include ../Makefile.template + brw_wm_surface_state.c \ + brw_bo.c \ + intel_batchbuffer.c \ + intel_tex_format.c \ + intel_tex_layout.c -intel_decode.o: ../intel/intel_decode.c -intel_tex_layout.o: ../intel/intel_tex_layout.c +include ../../Makefile.template diff --git a/src/gallium/drivers/i965/brw_cc.c b/src/gallium/drivers/i965/brw_cc.c index 9ab5638137..af432b1f52 100644 --- a/src/gallium/drivers/i965/brw_cc.c +++ b/src/gallium/drivers/i965/brw_cc.c @@ -33,13 +33,9 @@ #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" -#include "brw_util.h" -#include "main/macros.h" -#include "main/enums.h" static void prepare_cc_vp( struct brw_context *brw ) { - GLcontext *ctx = &brw->intel.ctx; struct brw_cc_viewport ccv; memset(&ccv, 0, sizeof(ccv)); @@ -48,13 +44,13 @@ static void prepare_cc_vp( struct brw_context *brw ) ccv.min_depth = ctx->Viewport.Near; ccv.max_depth = ctx->Viewport.Far; - dri_bo_unreference(brw->cc.vp_bo); + brw->sws->bo_unreference(brw->cc.vp_bo); brw->cc.vp_bo = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0 ); } const struct brw_tracked_state brw_cc_vp = { .dirty = { - .mesa = _NEW_VIEWPORT, + .mesa = PIPE_NEW_VIEWPORT, .brw = BRW_NEW_CONTEXT, .cache = 0 }, @@ -71,8 +67,8 @@ cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key) { memset(key, 0, sizeof(*key)); - key->dsa = brw->curr.dsa.base; - key->blend = brw->curr.blend.base; + key->dsa = brw->dsa; + key->blend = brw->blend; /* Clear non-respected values: */ @@ -82,11 +78,11 @@ cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key) /** * Creates the state cache entry for the given CC unit key. */ -static dri_bo * +static struct brw_winsys_buffer * cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key) { struct brw_cc_unit_state cc; - dri_bo *bo; + struct brw_winsys_buffer *bo; memset(&cc, 0, sizeof(cc)); @@ -124,7 +120,7 @@ static void prepare_cc_unit( struct brw_context *brw ) cc_unit_populate_key(brw, &key); - dri_bo_unreference(brw->cc.state_bo); + brw->sws->bo_unreference(brw->cc.state_bo); brw->cc.state_bo = brw_search_cache(&brw->cache, BRW_CC_UNIT, &key, sizeof(key), &brw->cc.vp_bo, 1, diff --git a/src/gallium/drivers/i965/brw_clip.c b/src/gallium/drivers/i965/brw_clip.c index df1b3718d0..d82ebeb9a9 100644 --- a/src/gallium/drivers/i965/brw_clip.c +++ b/src/gallium/drivers/i965/brw_clip.c @@ -129,7 +129,7 @@ static void compile_clip_prog( struct brw_context *brw, /* Upload */ - dri_bo_unreference(brw->clip.prog_bo); + brw->sws->bo_unreference(brw->clip.prog_bo); brw->clip.prog_bo = brw_upload_cache( &brw->cache, BRW_CLIP_PROG, &c.key, sizeof(c.key), @@ -199,7 +199,7 @@ static void upload_clip_prog(struct brw_context *brw) } } - dri_bo_unreference(brw->clip.prog_bo); + brw->sws->bo_unreference(brw->clip.prog_bo); brw->clip.prog_bo = brw_search_cache(&brw->cache, BRW_CLIP_PROG, &key, sizeof(key), NULL, 0, diff --git a/src/gallium/drivers/i965/brw_clip_state.c b/src/gallium/drivers/i965/brw_clip_state.c index 72e27205e2..0ea7ce5734 100644 --- a/src/gallium/drivers/i965/brw_clip_state.c +++ b/src/gallium/drivers/i965/brw_clip_state.c @@ -49,7 +49,6 @@ struct brw_clip_unit_key { static void clip_unit_populate_key(struct brw_context *brw, struct brw_clip_unit_key *key) { - GLcontext *ctx = &brw->intel.ctx; memset(key, 0, sizeof(*key)); /* CACHE_NEW_CLIP_PROG */ @@ -69,12 +68,12 @@ clip_unit_populate_key(struct brw_context *brw, struct brw_clip_unit_key *key) key->depth_clamp = 0; // XXX: add this to gallium: ctx->Transform.DepthClamp; } -static dri_bo * +static struct brw_winsys_buffer * clip_unit_create_from_key(struct brw_context *brw, struct brw_clip_unit_key *key) { struct brw_clip_unit_state clip; - dri_bo *bo; + struct brw_winsys_buffer *bo; memset(&clip, 0, sizeof(clip)); @@ -162,7 +161,7 @@ static void upload_clip_unit( struct brw_context *brw ) clip_unit_populate_key(brw, &key); - dri_bo_unreference(brw->clip.state_bo); + brw->sws->bo_unreference(brw->clip.state_bo); brw->clip.state_bo = brw_search_cache(&brw->cache, BRW_CLIP_UNIT, &key, sizeof(key), &brw->clip.prog_bo, 1, diff --git a/src/gallium/drivers/i965/brw_context.c b/src/gallium/drivers/i965/brw_context.c index bf0ec89e13..063ada5772 100644 --- a/src/gallium/drivers/i965/brw_context.c +++ b/src/gallium/drivers/i965/brw_context.c @@ -30,32 +30,21 @@ */ -#include "main/imports.h" -#include "main/api_noop.h" -#include "main/macros.h" -#include "main/vtxfmt.h" -#include "main/simple_list.h" -#include "shader/shader_api.h" +#include "pipe/p_context.h" #include "brw_context.h" #include "brw_defines.h" #include "brw_draw.h" #include "brw_state.h" #include "brw_vs.h" -#include "intel_tex.h" -#include "intel_blit.h" +#include "brw_screen_tex.h" #include "intel_batchbuffer.h" -#include "intel_pixel.h" -#include "intel_span.h" -#include "tnl/t_pipeline.h" -#include "utils.h" -GLboolean brwCreateContext( const __GLcontextModes *mesaVis, - __DRIcontextPrivate *driContextPriv, - void *sharedContextPrivate) +struct pipe_context *brw_create_context( struct pipe_screen *screen, + void *priv ) { struct brw_context *brw = (struct brw_context *) CALLOC_STRUCT(brw_context); @@ -87,9 +76,8 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis, /** * called from intelDestroyContext() */ -static void brw_destroy_context( struct intel_context *intel ) +static void brw_destroy_context( struct brw_context *brw ) { - struct brw_context *brw = brw_context(&intel->ctx); int i; brw_destroy_state(brw); @@ -102,27 +90,27 @@ static void brw_destroy_context( struct intel_context *intel ) brw->state.nr_color_regions = 0; intel_region_release(&brw->state.depth_region); - dri_bo_unreference(brw->curbe.curbe_bo); - dri_bo_unreference(brw->vs.prog_bo); - dri_bo_unreference(brw->vs.state_bo); - dri_bo_unreference(brw->vs.bind_bo); - dri_bo_unreference(brw->gs.prog_bo); - dri_bo_unreference(brw->gs.state_bo); - dri_bo_unreference(brw->clip.prog_bo); - dri_bo_unreference(brw->clip.state_bo); - dri_bo_unreference(brw->clip.vp_bo); - dri_bo_unreference(brw->sf.prog_bo); - dri_bo_unreference(brw->sf.state_bo); - dri_bo_unreference(brw->sf.vp_bo); + brw->sws->bo_unreference(brw->curbe.curbe_bo); + brw->sws->bo_unreference(brw->vs.prog_bo); + brw->sws->bo_unreference(brw->vs.state_bo); + brw->sws->bo_unreference(brw->vs.bind_bo); + brw->sws->bo_unreference(brw->gs.prog_bo); + brw->sws->bo_unreference(brw->gs.state_bo); + brw->sws->bo_unreference(brw->clip.prog_bo); + brw->sws->bo_unreference(brw->clip.state_bo); + brw->sws->bo_unreference(brw->clip.vp_bo); + brw->sws->bo_unreference(brw->sf.prog_bo); + brw->sws->bo_unreference(brw->sf.state_bo); + brw->sws->bo_unreference(brw->sf.vp_bo); for (i = 0; i < BRW_MAX_TEX_UNIT; i++) - dri_bo_unreference(brw->wm.sdc_bo[i]); - dri_bo_unreference(brw->wm.bind_bo); + brw->sws->bo_unreference(brw->wm.sdc_bo[i]); + brw->sws->bo_unreference(brw->wm.bind_bo); for (i = 0; i < BRW_WM_MAX_SURF; i++) - dri_bo_unreference(brw->wm.surf_bo[i]); - dri_bo_unreference(brw->wm.sampler_bo); - dri_bo_unreference(brw->wm.prog_bo); - dri_bo_unreference(brw->wm.state_bo); - dri_bo_unreference(brw->cc.prog_bo); - dri_bo_unreference(brw->cc.state_bo); - dri_bo_unreference(brw->cc.vp_bo); + brw->sws->bo_unreference(brw->wm.surf_bo[i]); + brw->sws->bo_unreference(brw->wm.sampler_bo); + brw->sws->bo_unreference(brw->wm.prog_bo); + brw->sws->bo_unreference(brw->wm.state_bo); + brw->sws->bo_unreference(brw->cc.prog_bo); + brw->sws->bo_unreference(brw->cc.state_bo); + brw->sws->bo_unreference(brw->cc.vp_bo); } diff --git a/src/gallium/drivers/i965/brw_context.h b/src/gallium/drivers/i965/brw_context.h index 009e28b227..0fcb75a440 100644 --- a/src/gallium/drivers/i965/brw_context.h +++ b/src/gallium/drivers/i965/brw_context.h @@ -33,9 +33,9 @@ #ifndef BRWCONTEXT_INC #define BRWCONTEXT_INC -#include "intel_context.h" #include "brw_structs.h" -#include "main/imports.h" +#include "brw_winsys.h" +#include "pipe/p_state.h" /* Glossary: @@ -119,6 +119,19 @@ struct brw_context; +#define PIPE_NEW_DEPTH_STENCIL_ALPHA 0x1 +#define PIPE_NEW_RAST 0x2 +#define PIPE_NEW_BLEND 0x2 +#define PIPE_NEW_VIEWPORT 0x2 +#define PIPE_NEW_FRAMEBUFFER 0x2 +#define PIPE_NEW_VERTEX_BUFFER 0x2 +#define PIPE_NEW_VERTEX_ELEMENT 0x2 +#define PIPE_NEW_FRAGMENT_SHADER 0x2 +#define PIPE_NEW_VERTEX_SHADER 0x2 +#define PIPE_NEW_FRAGMENT_CONSTS 0x2 +#define PIPE_NEW_VERTEX_CONSTS 0x2 + + #define BRW_NEW_URB_FENCE 0x1 #define BRW_NEW_FRAGMENT_PROGRAM 0x2 #define BRW_NEW_VERTEX_PROGRAM 0x4 @@ -156,26 +169,23 @@ struct brw_state_flags { }; -/** Subclass of Mesa vertex program */ struct brw_vertex_program { - struct gl_vertex_program program; + const struct tgsi_token *tokens; GLuint id; - dri_bo *const_buffer; /** Program constant buffer/surface */ + struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */ GLboolean use_const_buffer; }; /** Subclass of Mesa fragment program */ struct brw_fragment_program { - struct gl_fragment_program program; + const struct tgsi_token *tokens; + GLuint id; /**< serial no. to identify frag progs, never re-used */ - GLboolean isGLSL; /**< really, any IF/LOOP/CONT/BREAK instructions */ + GLboolean isGLSL; /**< any IF/LOOP/CONT/BREAK instructions */ - dri_bo *const_buffer; /** Program constant buffer/surface */ + struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */ GLboolean use_const_buffer; - - /** for debugging, which texture units are referenced */ - GLbitfield tex_units_used; }; @@ -244,7 +254,7 @@ struct brw_vs_prog_data { /* Size == 0 if output either not written, or always [0,0,0,1] */ struct brw_vs_ouput_sizes { - GLubyte output_size[VERT_RESULT_MAX]; + GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS]; }; @@ -312,10 +322,10 @@ struct brw_cache_item { GLuint hash; GLuint key_size; /* for variable-sized keys */ const void *key; - dri_bo **reloc_bufs; + struct brw_winsys_buffer **reloc_bufs; GLuint nr_reloc_bufs; - dri_bo *bo; + struct brw_winsys_buffer *bo; GLuint data_size; struct brw_cache_item *next; @@ -336,7 +346,7 @@ struct brw_cache { /* Record of the last BOs chosen for each cache_id. Used to set * brw->state.dirty.cache when a new cache item is chosen. */ - dri_bo *last_bo[BRW_MAX_CACHE]; + struct brw_winsys_buffer *last_bo[BRW_MAX_CACHE]; }; @@ -384,56 +394,22 @@ struct brw_cached_batch_item { /* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life * be easier if C allowed arrays of packed elements? */ -#define ATTRIB_BIT_DWORDS ((VERT_ATTRIB_MAX+31)/32) - -struct brw_vertex_element { - const struct gl_client_array *glarray; - - /** The corresponding Mesa vertex attribute */ - gl_vert_attrib attrib; - /** Size of a complete element */ - GLuint element_size; - /** Number of uploaded elements for this input. */ - GLuint count; - /** Byte stride between elements in the uploaded array */ - GLuint stride; - /** Offset of the first element within the buffer object */ - unsigned int offset; - /** Buffer object containing the uploaded vertex data */ - dri_bo *bo; -}; - - - -struct brw_vertex_info { - GLuint sizes[ATTRIB_BIT_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */ -}; +#define VS_INPUT_BITMASK_DWORDS ((PIPE_MAX_SHADER_INPUTS+31)/32) -/* Cache for TNL programs. - */ -struct brw_tnl_cache_item { - GLuint hash; - void *key; - void *data; - struct brw_tnl_cache_item *next; +struct brw_vertex_info { + GLuint sizes[VS_INPUT_BITMASK_DWORDS * 2]; /* sizes:2[VERT_ATTRIB_MAX] */ }; -struct brw_tnl_cache { - struct brw_tnl_cache_item **items; - GLuint size, n_items; -}; struct brw_query_object { - struct gl_query_object Base; - /** Doubly linked list of active query objects in the context. */ struct brw_query_object *prev, *next; /** Last query BO associated with this query. */ - dri_bo *bo; + struct brw_winsys_buffer *bo; /** First index in bo with query data for this object. */ int first_index; /** Last index in bo with query data for this object. */ @@ -445,22 +421,29 @@ struct brw_query_object { /** - * brw_context is derived from intel_context. + * brw_context is derived from pipe_context */ struct brw_context { + struct pipe_context *pipe; + struct pipe_screen *screen; + + struct brw_winsys_screen *sws; + GLuint primitive; GLboolean emit_state_always; GLboolean no_batch_wrap; + /* Active vertex program: + */ + const struct gl_vertex_program *vertex_program; + const struct gl_fragment_program *fragment_program; + struct pipe_framebuffer_state fb; + struct { struct brw_state_flags dirty; - GLuint nr_color_regions; - struct intel_region *color_regions[MAX_DRAW_BUFFERS]; - struct intel_region *depth_region; - /** * List of buffers accumulated in brw_validate_state to receive * dri_bo_check_aperture treatment before exec, so we can know if we @@ -471,7 +454,7 @@ struct brw_context * consisting of the vertex buffers, pipelined state pointers, * the CURBE, the depth buffer, and a query BO. */ - dri_bo *validated_bos[VERT_ATTRIB_MAX + 16]; + struct brw_winsys_buffer *validated_bos[PIPE_MAX_SHADER_INPUTS + 16]; int validated_bo_count; } state; @@ -480,18 +463,14 @@ struct brw_context struct brw_cached_batch_item *cached_batch_items; struct { - struct brw_vertex_element inputs[VERT_ATTRIB_MAX]; + struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS]; + struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; + unsigned num_vertex_element; + unsigned num_vertex_buffer; - struct brw_vertex_element *enabled[VERT_ATTRIB_MAX]; - GLuint nr_enabled; - -#define BRW_NR_UPLOAD_BUFS 17 -#define BRW_UPLOAD_INIT_SIZE (128*1024) - - struct { - dri_bo *bo; - GLuint offset; - } upload; + struct u_upload_mgr *upload_vertex; + struct u_upload_mgr *upload_index; + /* Summary of size and varying of active arrays, so we can check * for changes to this state: @@ -509,7 +488,7 @@ struct brw_context const struct _mesa_index_buffer *ib; /* Updates to these fields are signaled by BRW_NEW_INDEX_BUFFER. */ - dri_bo *bo; + struct brw_winsys_buffer *bo; unsigned int offset; unsigned int size; /* Offset to index buffer index to use in CMD_3D_PRIM so that we can @@ -519,16 +498,6 @@ struct brw_context unsigned int start_vertex_offset; } ib; - /* Active vertex program: - */ - const struct gl_vertex_program *vertex_program; - const struct gl_fragment_program *fragment_program; - - - /* For populating the gtt: - */ - GLuint next_free_page; - /* BRW_NEW_URB_ALLOCATIONS: */ @@ -545,12 +514,6 @@ struct brw_context GLuint nr_sf_entries; GLuint nr_cs_entries; -/* GLuint vs_size; */ -/* GLuint gs_size; */ -/* GLuint clip_size; */ -/* GLuint sf_size; */ -/* GLuint cs_size; */ - GLuint vs_start; GLuint gs_start; GLuint clip_start; @@ -570,7 +533,7 @@ struct brw_context GLuint vs_size; GLuint total_size; - dri_bo *curbe_bo; + struct brw_winsys_buffer *curbe_bo; /** Offset within curbe_bo of space for current curbe entry */ GLuint curbe_offset; /** Offset within curbe_bo of space for next curbe entry */ @@ -588,12 +551,12 @@ struct brw_context struct { struct brw_vs_prog_data *prog_data; - dri_bo *prog_bo; - dri_bo *state_bo; + struct brw_winsys_buffer *prog_bo; + struct brw_winsys_buffer *state_bo; /** Binding table of pointers to surf_bo entries */ - dri_bo *bind_bo; - dri_bo *surf_bo[BRW_VS_MAX_SURF]; + struct brw_winsys_buffer *bind_bo; + struct brw_winsys_buffer *surf_bo[BRW_VS_MAX_SURF]; GLuint nr_surfaces; } vs; @@ -601,25 +564,25 @@ struct brw_context struct brw_gs_prog_data *prog_data; GLboolean prog_active; - dri_bo *prog_bo; - dri_bo *state_bo; + struct brw_winsys_buffer *prog_bo; + struct brw_winsys_buffer *state_bo; } gs; struct { struct brw_clip_prog_data *prog_data; - dri_bo *prog_bo; - dri_bo *state_bo; - dri_bo *vp_bo; + struct brw_winsys_buffer *prog_bo; + struct brw_winsys_buffer *state_bo; + struct brw_winsys_buffer *vp_bo; } clip; struct { struct brw_sf_prog_data *prog_data; - dri_bo *prog_bo; - dri_bo *state_bo; - dri_bo *vp_bo; + struct brw_winsys_buffer *prog_bo; + struct brw_winsys_buffer *state_bo; + struct brw_winsys_buffer *vp_bo; } sf; struct { @@ -629,38 +592,38 @@ struct brw_context /** Input sizes, calculated from active vertex program. * One bit per fragment program input attribute. */ - GLbitfield input_size_masks[4]; + //GLbitfield input_size_masks[4]; /** Array of surface default colors (texture border color) */ - dri_bo *sdc_bo[BRW_MAX_TEX_UNIT]; + struct brw_winsys_buffer *sdc_bo[BRW_MAX_TEX_UNIT]; GLuint render_surf; GLuint nr_surfaces; GLuint max_threads; - dri_bo *scratch_bo; + struct brw_winsys_buffer *scratch_bo; GLuint sampler_count; - dri_bo *sampler_bo; + struct brw_winsys_buffer *sampler_bo; /** Binding table of pointers to surf_bo entries */ - dri_bo *bind_bo; - dri_bo *surf_bo[BRW_WM_MAX_SURF]; + struct brw_winsys_buffer *bind_bo; + struct brw_winsys_buffer *surf_bo[PIPE_MAX_COLOR_BUFS]; - dri_bo *prog_bo; - dri_bo *state_bo; + struct brw_winsys_buffer *prog_bo; + struct brw_winsys_buffer *state_bo; } wm; struct { - dri_bo *prog_bo; - dri_bo *state_bo; - dri_bo *vp_bo; + struct brw_winsys_buffer *prog_bo; + struct brw_winsys_buffer *state_bo; + struct brw_winsys_buffer *vp_bo; } cc; struct { struct brw_query_object active_head; - dri_bo *bo; + struct brw_winsys_buffer *bo; int index; GLboolean active; } query; @@ -679,12 +642,6 @@ struct brw_context */ void brwInitVtbl( struct brw_context *brw ); -/*====================================================================== - * brw_context.c - */ -GLboolean brwCreateContext( const __GLcontextModes *mesaVis, - __DRIcontextPrivate *driContextPriv, - void *sharedContextPrivate); /*====================================================================== * brw_queryobj.c @@ -697,7 +654,7 @@ void brw_emit_query_end(struct brw_context *brw); /*====================================================================== * brw_state_dump.c */ -void brw_debug_batch(struct intel_context *intel); +void brw_debug_batch(struct brw_context *intel); /*====================================================================== * brw_tex.c @@ -706,9 +663,9 @@ void brw_validate_textures( struct brw_context *brw ); /*====================================================================== - * brw_program.c + * brw_pipe_shader.c */ -void brwInitFragProgFuncs( struct dd_function_table *functions ); +void brw_init_shader_funcs( struct brw_context *brw ); /* brw_urb.c diff --git a/src/gallium/drivers/i965/brw_curbe.c b/src/gallium/drivers/i965/brw_curbe.c index 3e32c4983d..33ea9a00f7 100644 --- a/src/gallium/drivers/i965/brw_curbe.c +++ b/src/gallium/drivers/i965/brw_curbe.c @@ -47,7 +47,6 @@ */ static void calculate_curbe_offsets( struct brw_context *brw ) { - GLcontext *ctx = &brw->intel.ctx; /* CACHE_NEW_WM_PROG */ const GLuint nr_fp_regs = (brw->wm.prog_data->nr_params + 15) / 16; @@ -157,7 +156,6 @@ static GLfloat fixed_plane[6][4] = { */ static void prepare_constant_buffer(struct brw_context *brw) { - GLcontext *ctx = &brw->intel.ctx; const struct brw_vertex_program *vp = brw_vertex_program_const(brw->vertex_program); const struct brw_fragment_program *fp = @@ -269,7 +267,7 @@ static void prepare_constant_buffer(struct brw_context *brw) (brw->curbe.need_new_bo || brw->curbe.curbe_next_offset + bufsz > brw->curbe.curbe_bo->size)) { - dri_bo_unreference(brw->curbe.curbe_bo); + brw->sws->bo_unreference(brw->curbe.curbe_bo); brw->curbe.curbe_bo = NULL; } @@ -310,7 +308,6 @@ static void prepare_constant_buffer(struct brw_context *brw) static void emit_constant_buffer(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; GLuint sz = brw->curbe.total_size; BEGIN_BATCH(2, IGNORE_CLIPRECTS); diff --git a/src/gallium/drivers/i965/brw_draw.c b/src/gallium/drivers/i965/brw_draw.c index 8cd117c24f..856999f3ef 100644 --- a/src/gallium/drivers/i965/brw_draw.c +++ b/src/gallium/drivers/i965/brw_draw.c @@ -26,15 +26,6 @@ **************************************************************************/ -#include "main/glheader.h" -#include "main/context.h" -#include "main/state.h" -#include "main/enums.h" -#include "tnl/tnl.h" -#include "vbo/vbo_context.h" -#include "swrast/swrast.h" -#include "swrast_setup/swrast_setup.h" - #include "brw_draw.h" #include "brw_defines.h" #include "brw_context.h" @@ -67,7 +58,6 @@ static uint32_t prim_to_hw_prim[PIPE_PRIM_POLYGON+1] = { */ static GLuint brw_set_prim(struct brw_context *brw, GLenum prim) { - GLcontext *ctx = &brw->intel.ctx; if (INTEL_DEBUG & DEBUG_PRIMS) _mesa_printf("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim)); @@ -110,7 +100,6 @@ static void brw_emit_prim(struct brw_context *brw, uint32_t hw_prim) { struct brw_3d_primitive prim_packet; - struct intel_context *intel = &brw->intel; if (INTEL_DEBUG & DEBUG_PRIMS) _mesa_printf("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode), @@ -163,7 +152,7 @@ static void brw_merge_inputs( struct brw_context *brw, GLuint i; for (i = 0; i < VERT_ATTRIB_MAX; i++) - dri_bo_unreference(brw->vb.inputs[i].bo); + brw->sws->bo_unreference(brw->vb.inputs[i].bo); memset(&brw->vb.inputs, 0, sizeof(brw->vb.inputs)); memset(&brw->vb.info, 0, sizeof(brw->vb.info)); @@ -185,7 +174,7 @@ static void brw_merge_inputs( struct brw_context *brw, /* May fail if out of video memory for texture or vbo upload, or on * fallback conditions. */ -static GLboolean brw_try_draw_prims( GLcontext *ctx, +static GLboolean brw_try_draw_prims( struct brw_context *brw, const struct gl_client_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, @@ -193,7 +182,6 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx, GLuint min_index, GLuint max_index ) { - struct intel_context *intel = intel_context(ctx); struct brw_context *brw = brw_context(ctx); GLboolean retval = GL_FALSE; GLboolean warn = GL_FALSE; @@ -241,7 +229,7 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx, return 0; } -void brw_draw_prims( GLcontext *ctx, +void brw_draw_prims( struct brw_context *brw, const struct gl_client_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, @@ -274,7 +262,6 @@ void brw_draw_prims( GLcontext *ctx, void brw_draw_init( struct brw_context *brw ) { - GLcontext *ctx = &brw->intel.ctx; struct vbo_context *vbo = vbo_context(ctx); /* Register our drawing function: @@ -287,15 +274,15 @@ void brw_draw_destroy( struct brw_context *brw ) int i; if (brw->vb.upload.bo != NULL) { - dri_bo_unreference(brw->vb.upload.bo); + brw->sws->bo_unreference(brw->vb.upload.bo); brw->vb.upload.bo = NULL; } for (i = 0; i < VERT_ATTRIB_MAX; i++) { - dri_bo_unreference(brw->vb.inputs[i].bo); + brw->sws->bo_unreference(brw->vb.inputs[i].bo); brw->vb.inputs[i].bo = NULL; } - dri_bo_unreference(brw->ib.bo); + brw->sws->bo_unreference(brw->ib.bo); brw->ib.bo = NULL; } diff --git a/src/gallium/drivers/i965/brw_draw.h b/src/gallium/drivers/i965/brw_draw.h index 2a14db217f..dc7ca8731d 100644 --- a/src/gallium/drivers/i965/brw_draw.h +++ b/src/gallium/drivers/i965/brw_draw.h @@ -28,13 +28,12 @@ #ifndef BRW_DRAW_H #define BRW_DRAW_H -#include "main/mtypes.h" /* for GLcontext... */ -#include "vbo/vbo.h" +#include "brw_types.h" struct brw_context; -void brw_draw_prims( GLcontext *ctx, +void brw_draw_prims( struct brw_context *brw, const struct gl_client_array *arrays[], const struct _mesa_prim *prims, GLuint nr_prims, @@ -48,7 +47,7 @@ void brw_draw_destroy( struct brw_context *brw ); /* brw_draw_current.c */ -void brw_init_current_values(GLcontext *ctx, +void brw_init_current_values(struct brw_context *brw, struct gl_client_array *arrays); #endif diff --git a/src/gallium/drivers/i965/brw_draw_upload.c b/src/gallium/drivers/i965/brw_draw_upload.c index ad3ef6b7dd..dce015d79f 100644 --- a/src/gallium/drivers/i965/brw_draw_upload.c +++ b/src/gallium/drivers/i965/brw_draw_upload.c @@ -191,8 +191,6 @@ static unsigned get_index_type(int type) static boolean brw_prepare_vertices(struct brw_context *brw) { - GLcontext *ctx = &brw->intel.ctx; - struct intel_context *intel = intel_context(ctx); GLbitfield vs_inputs = brw->vs.prog_data->inputs_read; GLuint i; const unsigned char *ptr = NULL; @@ -210,15 +208,17 @@ static boolean brw_prepare_vertices(struct brw_context *brw) - for (i = 0; i < brw->vb.nr_enabled; i++) { - struct brw_vertex_element *input = brw->vb.enabled[i]; + for (i = 0; i < brw->vb.num_vertex_buffer; i++) { + struct brw_vertex_buffer *vb = brw->vb.vertex_buffer[i]; + unsigned size = (vb->stride == 0 ? + vb->size : + vb->stride * (max_index + 1 - min_index)); - input->element_size = get_size(input->glarray->Type) * input->glarray->Size; if (brw_is_user_buffer(vb)) { - u_upload_buffer( brw->upload, + u_upload_buffer( brw->upload_vertex, min_index * vb->stride, - (max_index + 1 - min_index) * vb->stride, + size, &offset, &buffer ); } @@ -226,20 +226,20 @@ static boolean brw_prepare_vertices(struct brw_context *brw) { offset = 0; buffer = vb->buffer; - count = stride == 0 ? 1 : max_index + 1 - min_index; } - - /* Named buffer object: Just reference its contents directly. */ - dri_bo_unreference(input->bo); - input->bo = intel_bufferobj_buffer(intel, intel_buffer, - INTEL_READ); - dri_bo_reference(input->bo); - + + /* Set up post-upload info about this vertex buffer: + */ input->offset = (unsigned long)offset; input->stride = vb->stride; input->count = count; + brw->sws->bo_unreference(input->bo); + input->bo = intel_bufferobj_buffer(intel, intel_buffer, + INTEL_READ); + brw->sws->bo_reference(input->bo); assert(input->offset < input->bo->size); + assert(input->offset + size <= input->bo->size); } brw_prepare_query_begin(brw); @@ -253,8 +253,6 @@ static boolean brw_prepare_vertices(struct brw_context *brw) static void brw_emit_vertices(struct brw_context *brw) { - GLcontext *ctx = &brw->intel.ctx; - struct intel_context *intel = intel_context(ctx); GLuint i; brw_emit_query_begin(brw); @@ -370,11 +368,9 @@ const struct brw_tracked_state brw_vertices = { static void brw_prepare_indices(struct brw_context *brw) { - GLcontext *ctx = &brw->intel.ctx; - struct intel_context *intel = &brw->intel; const struct _mesa_index_buffer *index_buffer = brw->ib.ib; GLuint ib_size; - dri_bo *bo = NULL; + struct brw_winsys_buffer *bo = NULL; struct gl_buffer_object *bufferobj; GLuint offset; GLuint ib_type_size; @@ -421,7 +417,7 @@ static void brw_prepare_indices(struct brw_context *brw) } else { bo = intel_bufferobj_buffer(intel, intel_buffer_object(bufferobj), INTEL_READ); - dri_bo_reference(bo); + brw->sws->bo_reference(bo); /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading * the index buffer state when we're just moving the start index @@ -461,7 +457,6 @@ const struct brw_tracked_state brw_indices = { static void brw_emit_index_buffer(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; const struct _mesa_index_buffer *index_buffer = brw->ib.ib; if (index_buffer == NULL) diff --git a/src/gallium/drivers/i965/brw_eu_debug.c b/src/gallium/drivers/i965/brw_eu_debug.c index 29f3f6d02f..ad7ec36e86 100644 --- a/src/gallium/drivers/i965/brw_eu_debug.c +++ b/src/gallium/drivers/i965/brw_eu_debug.c @@ -30,8 +30,6 @@ */ -#include "main/mtypes.h" -#include "main/imports.h" #include "brw_eu.h" void brw_print_reg( struct brw_reg hwreg ) diff --git a/src/gallium/drivers/i965/brw_gs.c b/src/gallium/drivers/i965/brw_gs.c index 5ec0c585fe..58930e7964 100644 --- a/src/gallium/drivers/i965/brw_gs.c +++ b/src/gallium/drivers/i965/brw_gs.c @@ -29,10 +29,6 @@ * Keith Whitwell */ -#include "main/glheader.h" -#include "main/macros.h" -#include "main/enums.h" - #include "intel_batchbuffer.h" #include "brw_defines.h" @@ -124,7 +120,7 @@ static void compile_gs_prog( struct brw_context *brw, /* Upload */ - dri_bo_unreference(brw->gs.prog_bo); + brw->sws->bo_unreference(brw->gs.prog_bo); brw->gs.prog_bo = brw_upload_cache( &brw->cache, BRW_GS_PROG, &c.key, sizeof(c.key), NULL, 0, @@ -180,7 +176,7 @@ static void prepare_gs_prog(struct brw_context *brw) } if (brw->gs.prog_active) { - dri_bo_unreference(brw->gs.prog_bo); + brw->sws->bo_unreference(brw->gs.prog_bo); brw->gs.prog_bo = brw_search_cache(&brw->cache, BRW_GS_PROG, &key, sizeof(key), NULL, 0, diff --git a/src/gallium/drivers/i965/brw_gs_emit.c b/src/gallium/drivers/i965/brw_gs_emit.c index a9b2aa2eac..9ec206d7e8 100644 --- a/src/gallium/drivers/i965/brw_gs_emit.c +++ b/src/gallium/drivers/i965/brw_gs_emit.c @@ -30,11 +30,6 @@ */ -#include "main/glheader.h" -#include "main/macros.h" -#include "main/enums.h" - -#include "shader/program.h" #include "intel_batchbuffer.h" #include "brw_defines.h" diff --git a/src/gallium/drivers/i965/brw_gs_state.c b/src/gallium/drivers/i965/brw_gs_state.c index ed9d2ffe60..6d03d72d96 100644 --- a/src/gallium/drivers/i965/brw_gs_state.c +++ b/src/gallium/drivers/i965/brw_gs_state.c @@ -34,7 +34,6 @@ #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" -#include "main/macros.h" struct brw_gs_unit_key { unsigned int total_grf; @@ -69,11 +68,11 @@ gs_unit_populate_key(struct brw_context *brw, struct brw_gs_unit_key *key) key->urb_size = brw->urb.vsize; } -static dri_bo * +static struct brw_winsys_buffer * gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key) { struct brw_gs_unit_state gs; - dri_bo *bo; + struct brw_winsys_buffer *bo; memset(&gs, 0, sizeof(gs)); @@ -128,7 +127,7 @@ static void prepare_gs_unit(struct brw_context *brw) gs_unit_populate_key(brw, &key); - dri_bo_unreference(brw->gs.state_bo); + brw->sws->bo_unreference(brw->gs.state_bo); brw->gs.state_bo = brw_search_cache(&brw->cache, BRW_GS_UNIT, &key, sizeof(key), &brw->gs.prog_bo, 1, diff --git a/src/gallium/drivers/i965/brw_misc_state.c b/src/gallium/drivers/i965/brw_misc_state.c index ea71857548..d33bf40a01 100644 --- a/src/gallium/drivers/i965/brw_misc_state.c +++ b/src/gallium/drivers/i965/brw_misc_state.c @@ -48,7 +48,6 @@ static void upload_blend_constant_color(struct brw_context *brw) { - GLcontext *ctx = &brw->intel.ctx; struct brw_blend_constant_color bcc; memset(&bcc, 0, sizeof(bcc)); @@ -75,17 +74,11 @@ const struct brw_tracked_state brw_blend_constant_color = { /* Constant single cliprect for framebuffer object or DRI2 drawing */ static void upload_drawing_rect(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - GLcontext *ctx = &intel->ctx; - - if (!intel->constant_cliprect) - return; - BEGIN_BATCH(4, NO_LOOP_CLIPRECTS); OUT_BATCH(_3DSTATE_DRAWRECT_INFO_I965); - OUT_BATCH(0); /* xmin, ymin */ - OUT_BATCH(((ctx->DrawBuffer->Width - 1) & 0xffff) | - ((ctx->DrawBuffer->Height - 1) << 16)); + OUT_BATCH(0); + OUT_BATCH(((brw->fb.width - 1) & 0xffff) | + ((brw->fb.height - 1) << 16)); OUT_BATCH(0); ADVANCE_BATCH(); } @@ -114,8 +107,6 @@ static void prepare_binding_table_pointers(struct brw_context *brw) */ static void upload_binding_table_pointers(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - BEGIN_BATCH(6, IGNORE_CLIPRECTS); OUT_BATCH(CMD_BINDING_TABLE_PTRS << 16 | (6 - 2)); if (brw->vs.bind_bo != NULL) @@ -148,8 +139,6 @@ const struct brw_tracked_state brw_binding_table_pointers = { */ static void upload_pipelined_state_pointers(struct brw_context *brw ) { - struct intel_context *intel = &brw->intel; - BEGIN_BATCH(7, IGNORE_CLIPRECTS); OUT_BATCH(CMD_PIPELINED_STATE_POINTERS << 16 | (7 - 2)); OUT_RELOC(brw->vs.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); @@ -210,7 +199,6 @@ static void prepare_depthbuffer(struct brw_context *brw) static void emit_depthbuffer(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; struct intel_region *region = brw->state.depth_region; unsigned int len = (BRW_IS_G4X(brw) || BRW_IS_IGDNG(brw)) ? 6 : 5; @@ -287,7 +275,6 @@ const struct brw_tracked_state brw_depthbuffer = { static void upload_polygon_stipple(struct brw_context *brw) { - GLcontext *ctx = &brw->intel.ctx; struct brw_polygon_stipple bps; GLuint i; @@ -401,7 +388,6 @@ const struct brw_tracked_state brw_aa_line_parameters = { static void upload_line_stipple(struct brw_context *brw) { - GLcontext *ctx = &brw->intel.ctx; struct brw_line_stipple bls; GLfloat tmp; GLint tmpi; @@ -507,8 +493,6 @@ const struct brw_tracked_state brw_invarient_state = { */ static void upload_state_base_address( struct brw_context *brw ) { - struct intel_context *intel = &brw->intel; - /* Output the structure (brw_state_base_address) directly to the * batchbuffer, so we can emit relocations inline. */ diff --git a/src/gallium/drivers/i965/brw_pipe_depth.c b/src/gallium/drivers/i965/brw_pipe_depth.c index da29bc8bcb..29f135d37a 100644 --- a/src/gallium/drivers/i965/brw_pipe_depth.c +++ b/src/gallium/drivers/i965/brw_pipe_depth.c @@ -1,5 +1,9 @@ - /* _NEW_STENCIL */ - if (key->dsa.stencil[0].enable) { + +static void * +brw_create_depth_stencil( struct pipe_context *pipe, + const struct pipe_depth_stencil_alpha_state *tmpl ) +{ + if (tmpl->stencil[0].enable) { cc.cc0.stencil_enable = 1; cc.cc0.stencil_func = intel_translate_compare_func(key->stencil_func[0]); @@ -13,7 +17,7 @@ cc.cc1.stencil_write_mask = key->stencil_write_mask[0]; cc.cc1.stencil_test_mask = key->stencil_test_mask[0]; - if (key->stencil_two_side) { + if (tmpl->stencil[1].enable) { cc.cc0.bf_stencil_enable = 1; cc.cc0.bf_stencil_func = intel_translate_compare_func(key->stencil_func[1]); @@ -30,9 +34,8 @@ /* Not really sure about this: */ - if (key->stencil_write_mask[0] || - (key->stencil_two_side && key->stencil_write_mask[1])) - cc.cc0.stencil_write_enable = 1; + cc.cc0.stencil_write_enable = (cc.cc1.stencil_write_mask || + cc.cc2.bf_stencil_write_mask); } @@ -50,3 +53,6 @@ cc.cc2.depth_test_function = intel_translate_compare_func(key->depth_func); cc.cc2.depth_write_enable = key->depth_write; } + + +} diff --git a/src/gallium/drivers/i965/brw_pipe_fb.c b/src/gallium/drivers/i965/brw_pipe_fb.c index d4ae332f46..dbf97a0544 100644 --- a/src/gallium/drivers/i965/brw_pipe_fb.c +++ b/src/gallium/drivers/i965/brw_pipe_fb.c @@ -2,12 +2,12 @@ /** * called from intelDrawBuffer() */ -static void brw_set_draw_region( struct intel_context *intel, +static void brw_set_draw_region( struct pipe_context *pipe, struct intel_region *color_regions[], struct intel_region *depth_region, GLuint num_color_regions) { - struct brw_context *brw = brw_context(&intel->ctx); + struct brw_context *brw = brw_context(pipe); GLuint i; /* release old color/depth regions */ diff --git a/src/gallium/drivers/i965/brw_pipe_flush.c b/src/gallium/drivers/i965/brw_pipe_flush.c index 008f623151..d5b7bd3b83 100644 --- a/src/gallium/drivers/i965/brw_pipe_flush.c +++ b/src/gallium/drivers/i965/brw_pipe_flush.c @@ -13,10 +13,8 @@ static void brw_finish_batch(struct intel_context *intel) /** * called from intelFlushBatchLocked */ -static void brw_new_batch( struct intel_context *intel ) +static void brw_new_batch( struct brw_context *brw ) { - struct brw_context *brw = brw_context(&intel->ctx); - /* Check that we didn't just wrap our batchbuffer at a bad time. */ assert(!brw->no_batch_wrap); @@ -36,14 +34,14 @@ static void brw_new_batch( struct intel_context *intel ) * a new buffer next time. */ if (brw->vb.upload.bo != NULL) { - dri_bo_unreference(brw->vb.upload.bo); + brw->sws->bo_unreference(brw->vb.upload.bo); brw->vb.upload.bo = NULL; brw->vb.upload.offset = 0; } } -static void brw_note_fence( struct intel_context *intel, GLuint fence ) +static void brw_note_fence( struct brw_context *brw, GLuint fence ) { brw_context(&intel->ctx)->state.dirty.brw |= BRW_NEW_FENCE; } diff --git a/src/gallium/drivers/i965/brw_pipe_query.c b/src/gallium/drivers/i965/brw_pipe_query.c new file mode 100644 index 0000000000..0b9ba0c0ed --- /dev/null +++ b/src/gallium/drivers/i965/brw_pipe_query.c @@ -0,0 +1,246 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +/** @file support for ARB_query_object + * + * ARB_query_object is implemented by using the PIPE_CONTROL command to stall + * execution on the completion of previous depth tests, and write the + * current PS_DEPTH_COUNT to a buffer object. + * + * We use before and after counts when drawing during a query so that + * we don't pick up other clients' query data in ours. To reduce overhead, + * a single BO is used to record the query data for all active queries at + * once. This also gives us a simple bound on how much batchbuffer space is + * required for handling queries, so that we can be sure that we won't + * have to emit a batchbuffer without getting the ending PS_DEPTH_COUNT. + */ +#include "util/u_simple_list.h" + +#include "brw_context.h" +#include "brw_state.h" +#include "intel_batchbuffer.h" +#include "intel_reg.h" + +/** Waits on the query object's BO and totals the results for this query */ +static void +brw_queryobj_get_results(struct brw_query_object *query) +{ + int i; + uint64_t *results; + + if (query->bo == NULL) + return; + + /* Map and count the pixels from the current query BO */ + dri_bo_map(query->bo, GL_FALSE); + results = query->bo->virtual; + for (i = query->first_index; i <= query->last_index; i++) { + query->Base.Result += results[i * 2 + 1] - results[i * 2]; + } + dri_bo_unmap(query->bo); + + brw->sws->bo_unreference(query->bo); + query->bo = NULL; +} + +static struct pipe_query * +brw_query_create(struct pipe_context *pipe, unsigned type ) +{ + struct brw_query_object *query; + + switch (query->type) { + case PIPE_QUERY_OCCLUSION_COUNTER: + query = CALLOC_STRUCT( brw_query_object ); + if (query == NULL) + return NULL; + return &query->Base; + + default: + return NULL; + } +} + +static void +brw_query_destroy(struct pipe_context *pipe, struct pipe_query *q) +{ + struct brw_query_object *query = (struct brw_query_object *)q; + + brw->sws->bo_unreference(query->bo); + FREE(query); +} + +static void +brw_begin_query(struct pipe_context *pipe, struct pipe_query *q) +{ + struct brw_context *brw = brw_context(pipe); + struct brw_query_object *query = (struct brw_query_object *)q; + + /* Reset our driver's tracking of query state. */ + brw->sws->bo_unreference(query->bo); + query->bo = NULL; + query->first_index = -1; + query->last_index = -1; + + insert_at_head(&brw->query.active_head, query); + brw->stats_wm++; + brw->dirty.mesa |= PIPE_NEW_QUERY; +} + +static void +brw_end_query(struct pipe_context *pipe, struct pipe_query *q) +{ + struct brw_context *brw = brw_context(pipe); + struct brw_query_object *query = (struct brw_query_object *)q; + + /* Flush the batchbuffer in case it has writes to our query BO. + * Have later queries write to a new query BO so that further rendering + * doesn't delay the collection of our results. + */ + if (query->bo) { + brw_emit_query_end(brw); + intel_batchbuffer_flush(brw->batch); + + brw->sws->bo_unreference(brw->query.bo); + brw->query.bo = NULL; + } + + remove_from_list(query); + brw->stats_wm--; + brw->dirty.mesa |= PIPE_NEW_QUERY; +} + +static void brw_wait_query(struct pipe_context *pipe, struct pipe_query *q) +{ + struct brw_query_object *query = (struct brw_query_object *)q; + + brw_queryobj_get_results(query); + query->Base.Ready = GL_TRUE; +} + +static void brw_check_query(struct pipe_context *pipe, struct pipe_query *q) +{ + struct brw_query_object *query = (struct brw_query_object *)q; + + if (query->bo == NULL || !drm_intel_bo_busy(query->bo)) { + brw_queryobj_get_results(query); + query->Base.Ready = GL_TRUE; + } +} + +/** Called to set up the query BO and account for its aperture space */ +void +brw_prepare_query_begin(struct brw_context *brw) +{ + /* Skip if we're not doing any queries. */ + if (is_empty_list(&brw->query.active_head)) + return; + + /* Get a new query BO if we're going to need it. */ + if (brw->query.bo == NULL || + brw->query.index * 2 + 1 >= 4096 / sizeof(uint64_t)) { + brw->sws->bo_unreference(brw->query.bo); + brw->query.bo = NULL; + + brw->query.bo = dri_bo_alloc(brw->bufmgr, "query", 4096, 1); + brw->query.index = 0; + } + + brw_add_validated_bo(brw, brw->query.bo); +} + +/** Called just before primitive drawing to get a beginning PS_DEPTH_COUNT. */ +void +brw_emit_query_begin(struct brw_context *brw) +{ + struct brw_query_object *query; + + /* Skip if we're not doing any queries, or we've emitted the start. */ + if (brw->query.active || is_empty_list(&brw->query.active_head)) + return; + + BEGIN_BATCH(4, IGNORE_CLIPRECTS); + OUT_BATCH(_3DSTATE_PIPE_CONTROL | + PIPE_CONTROL_DEPTH_STALL | + PIPE_CONTROL_WRITE_DEPTH_COUNT); + /* This object could be mapped cacheable, but we don't have an exposed + * mechanism to support that. Since it's going uncached, tell GEM that + * we're writing to it. The usual clflush should be all that's required + * to pick up the results. + */ + OUT_RELOC(brw->query.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + PIPE_CONTROL_GLOBAL_GTT_WRITE | + ((brw->query.index * 2) * sizeof(uint64_t))); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + + foreach(query, &brw->query.active_head) { + if (query->bo != brw->query.bo) { + if (query->bo != NULL) + brw_queryobj_get_results(query); + brw->sws->bo_reference(brw->query.bo); + query->bo = brw->query.bo; + query->first_index = brw->query.index; + } + query->last_index = brw->query.index; + } + brw->query.active = GL_TRUE; +} + +/** Called at batchbuffer flush to get an ending PS_DEPTH_COUNT */ +void +brw_emit_query_end(struct brw_context *brw) +{ + if (!brw->query.active) + return; + + BEGIN_BATCH(4, IGNORE_CLIPRECTS); + OUT_BATCH(_3DSTATE_PIPE_CONTROL | + PIPE_CONTROL_DEPTH_STALL | + PIPE_CONTROL_WRITE_DEPTH_COUNT); + OUT_RELOC(brw->query.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + PIPE_CONTROL_GLOBAL_GTT_WRITE | + ((brw->query.index * 2 + 1) * sizeof(uint64_t))); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + + brw->query.active = GL_FALSE; + brw->query.index++; +} + +void brw_init_queryobj_functions(struct dd_function_table *functions) +{ + functions->NewQueryObject = brw_new_query_object; + functions->DeleteQuery = brw_delete_query; + functions->BeginQuery = brw_begin_query; + functions->EndQuery = brw_end_query; + functions->CheckQuery = brw_check_query; + functions->WaitQuery = brw_wait_query; +} diff --git a/src/gallium/drivers/i965/brw_program.c b/src/gallium/drivers/i965/brw_program.c deleted file mode 100644 index bac69187c1..0000000000 --- a/src/gallium/drivers/i965/brw_program.c +++ /dev/null @@ -1,166 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell - */ - -#include "main/imports.h" -#include "main/enums.h" -#include "shader/prog_parameter.h" -#include "shader/program.h" -#include "shader/programopt.h" -#include "tnl/tnl.h" - -#include "brw_context.h" -#include "brw_util.h" -#include "brw_wm.h" - -static void brwBindProgram( GLcontext *ctx, - GLenum target, - struct gl_program *prog ) -{ - struct brw_context *brw = brw_context(ctx); - - switch (target) { - case GL_VERTEX_PROGRAM_ARB: - brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM; - break; - case GL_FRAGMENT_PROGRAM_ARB: - brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM; - break; - } -} - -static struct gl_program *brwNewProgram( GLcontext *ctx, - GLenum target, - GLuint id ) -{ - struct brw_context *brw = brw_context(ctx); - - switch (target) { - case GL_VERTEX_PROGRAM_ARB: { - struct brw_vertex_program *prog = CALLOC_STRUCT(brw_vertex_program); - if (prog) { - prog->id = brw->program_id++; - - return _mesa_init_vertex_program( ctx, &prog->program, - target, id ); - } - else - return NULL; - } - - case GL_FRAGMENT_PROGRAM_ARB: { - struct brw_fragment_program *prog = CALLOC_STRUCT(brw_fragment_program); - if (prog) { - prog->id = brw->program_id++; - - return _mesa_init_fragment_program( ctx, &prog->program, - target, id ); - } - else - return NULL; - } - - default: - return _mesa_new_program(ctx, target, id); - } -} - -static void brwDeleteProgram( GLcontext *ctx, - struct gl_program *prog ) -{ - if (prog->Target == GL_FRAGMENT_PROGRAM_ARB) { - struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog; - struct brw_fragment_program *brw_fprog = brw_fragment_program(fprog); - dri_bo_unreference(brw_fprog->const_buffer); - } - - _mesa_delete_program( ctx, prog ); -} - - -static GLboolean brwIsProgramNative( GLcontext *ctx, - GLenum target, - struct gl_program *prog ) -{ - return GL_TRUE; -} - -static void brwProgramStringNotify( GLcontext *ctx, - GLenum target, - struct gl_program *prog ) -{ - struct brw_context *brw = brw_context(ctx); - - if (target == GL_FRAGMENT_PROGRAM_ARB) { - struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog; - struct brw_fragment_program *newFP = brw_fragment_program(fprog); - const struct brw_fragment_program *curFP = - brw_fragment_program_const(brw->fragment_program); - - if (fprog->FogOption) { - _mesa_append_fog_code(ctx, fprog); - fprog->FogOption = GL_NONE; - } - - if (newFP == curFP) - brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM; - newFP->id = brw->program_id++; - newFP->isGLSL = brw_wm_is_glsl(fprog); - } - else if (target == GL_VERTEX_PROGRAM_ARB) { - struct gl_vertex_program *vprog = (struct gl_vertex_program *) prog; - struct brw_vertex_program *newVP = brw_vertex_program(vprog); - const struct brw_vertex_program *curVP = - brw_vertex_program_const(brw->vertex_program); - - if (newVP == curVP) - brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM; - if (newVP->program.IsPositionInvariant) { - _mesa_insert_mvp_code(ctx, &newVP->program); - } - newVP->id = brw->program_id++; - - /* Also tell tnl about it: - */ - _tnl_program_string(ctx, target, prog); - } -} - -void brwInitFragProgFuncs( struct dd_function_table *functions ) -{ - assert(functions->ProgramStringNotify == _tnl_program_string); - - functions->BindProgram = brwBindProgram; - functions->NewProgram = brwNewProgram; - functions->DeleteProgram = brwDeleteProgram; - functions->IsProgramNative = brwIsProgramNative; - functions->ProgramStringNotify = brwProgramStringNotify; -} - diff --git a/src/gallium/drivers/i965/brw_queryobj.c b/src/gallium/drivers/i965/brw_queryobj.c deleted file mode 100644 index a195bc32b0..0000000000 --- a/src/gallium/drivers/i965/brw_queryobj.c +++ /dev/null @@ -1,254 +0,0 @@ -/* - * Copyright © 2008 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Eric Anholt - * - */ - -/** @file support for ARB_query_object - * - * ARB_query_object is implemented by using the PIPE_CONTROL command to stall - * execution on the completion of previous depth tests, and write the - * current PS_DEPTH_COUNT to a buffer object. - * - * We use before and after counts when drawing during a query so that - * we don't pick up other clients' query data in ours. To reduce overhead, - * a single BO is used to record the query data for all active queries at - * once. This also gives us a simple bound on how much batchbuffer space is - * required for handling queries, so that we can be sure that we won't - * have to emit a batchbuffer without getting the ending PS_DEPTH_COUNT. - */ -#include "main/simple_list.h" -#include "main/imports.h" - -#include "brw_context.h" -#include "brw_state.h" -#include "intel_batchbuffer.h" -#include "intel_reg.h" - -/** Waits on the query object's BO and totals the results for this query */ -static void -brw_queryobj_get_results(struct brw_query_object *query) -{ - int i; - uint64_t *results; - - if (query->bo == NULL) - return; - - /* Map and count the pixels from the current query BO */ - dri_bo_map(query->bo, GL_FALSE); - results = query->bo->virtual; - for (i = query->first_index; i <= query->last_index; i++) { - query->Base.Result += results[i * 2 + 1] - results[i * 2]; - } - dri_bo_unmap(query->bo); - - dri_bo_unreference(query->bo); - query->bo = NULL; -} - -static struct gl_query_object * -brw_new_query_object(GLcontext *ctx, GLuint id) -{ - struct brw_query_object *query; - - query = _mesa_calloc(sizeof(struct brw_query_object)); - - query->Base.Id = id; - query->Base.Result = 0; - query->Base.Active = GL_FALSE; - query->Base.Ready = GL_TRUE; - - return &query->Base; -} - -static void -brw_delete_query(GLcontext *ctx, struct gl_query_object *q) -{ - struct brw_query_object *query = (struct brw_query_object *)q; - - dri_bo_unreference(query->bo); - _mesa_free(query); -} - -static void -brw_begin_query(GLcontext *ctx, struct gl_query_object *q) -{ - struct brw_context *brw = brw_context(ctx); - struct intel_context *intel = intel_context(ctx); - struct brw_query_object *query = (struct brw_query_object *)q; - - /* Reset our driver's tracking of query state. */ - dri_bo_unreference(query->bo); - query->bo = NULL; - query->first_index = -1; - query->last_index = -1; - - insert_at_head(&brw->query.active_head, query); - intel->stats_wm++; -} - -/** - * Begin the ARB_occlusion_query query on a query object. - */ -static void -brw_end_query(GLcontext *ctx, struct gl_query_object *q) -{ - struct brw_context *brw = brw_context(ctx); - struct intel_context *intel = intel_context(ctx); - struct brw_query_object *query = (struct brw_query_object *)q; - - /* Flush the batchbuffer in case it has writes to our query BO. - * Have later queries write to a new query BO so that further rendering - * doesn't delay the collection of our results. - */ - if (query->bo) { - brw_emit_query_end(brw); - intel_batchbuffer_flush(intel->batch); - - dri_bo_unreference(brw->query.bo); - brw->query.bo = NULL; - } - - remove_from_list(query); - - intel->stats_wm--; -} - -static void brw_wait_query(GLcontext *ctx, struct gl_query_object *q) -{ - struct brw_query_object *query = (struct brw_query_object *)q; - - brw_queryobj_get_results(query); - query->Base.Ready = GL_TRUE; -} - -static void brw_check_query(GLcontext *ctx, struct gl_query_object *q) -{ - struct brw_query_object *query = (struct brw_query_object *)q; - - if (query->bo == NULL || !drm_intel_bo_busy(query->bo)) { - brw_queryobj_get_results(query); - query->Base.Ready = GL_TRUE; - } -} - -/** Called to set up the query BO and account for its aperture space */ -void -brw_prepare_query_begin(struct brw_context *brw) -{ - struct intel_context *intel = &brw->intel; - - /* Skip if we're not doing any queries. */ - if (is_empty_list(&brw->query.active_head)) - return; - - /* Get a new query BO if we're going to need it. */ - if (brw->query.bo == NULL || - brw->query.index * 2 + 1 >= 4096 / sizeof(uint64_t)) { - dri_bo_unreference(brw->query.bo); - brw->query.bo = NULL; - - brw->query.bo = dri_bo_alloc(intel->bufmgr, "query", 4096, 1); - brw->query.index = 0; - } - - brw_add_validated_bo(brw, brw->query.bo); -} - -/** Called just before primitive drawing to get a beginning PS_DEPTH_COUNT. */ -void -brw_emit_query_begin(struct brw_context *brw) -{ - struct intel_context *intel = &brw->intel; - struct brw_query_object *query; - - /* Skip if we're not doing any queries, or we've emitted the start. */ - if (brw->query.active || is_empty_list(&brw->query.active_head)) - return; - - BEGIN_BATCH(4, IGNORE_CLIPRECTS); - OUT_BATCH(_3DSTATE_PIPE_CONTROL | - PIPE_CONTROL_DEPTH_STALL | - PIPE_CONTROL_WRITE_DEPTH_COUNT); - /* This object could be mapped cacheable, but we don't have an exposed - * mechanism to support that. Since it's going uncached, tell GEM that - * we're writing to it. The usual clflush should be all that's required - * to pick up the results. - */ - OUT_RELOC(brw->query.bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - PIPE_CONTROL_GLOBAL_GTT_WRITE | - ((brw->query.index * 2) * sizeof(uint64_t))); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - foreach(query, &brw->query.active_head) { - if (query->bo != brw->query.bo) { - if (query->bo != NULL) - brw_queryobj_get_results(query); - dri_bo_reference(brw->query.bo); - query->bo = brw->query.bo; - query->first_index = brw->query.index; - } - query->last_index = brw->query.index; - } - brw->query.active = GL_TRUE; -} - -/** Called at batchbuffer flush to get an ending PS_DEPTH_COUNT */ -void -brw_emit_query_end(struct brw_context *brw) -{ - struct intel_context *intel = &brw->intel; - - if (!brw->query.active) - return; - - BEGIN_BATCH(4, IGNORE_CLIPRECTS); - OUT_BATCH(_3DSTATE_PIPE_CONTROL | - PIPE_CONTROL_DEPTH_STALL | - PIPE_CONTROL_WRITE_DEPTH_COUNT); - OUT_RELOC(brw->query.bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - PIPE_CONTROL_GLOBAL_GTT_WRITE | - ((brw->query.index * 2 + 1) * sizeof(uint64_t))); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - brw->query.active = GL_FALSE; - brw->query.index++; -} - -void brw_init_queryobj_functions(struct dd_function_table *functions) -{ - functions->NewQueryObject = brw_new_query_object; - functions->DeleteQuery = brw_delete_query; - functions->BeginQuery = brw_begin_query; - functions->EndQuery = brw_end_query; - functions->CheckQuery = brw_check_query; - functions->WaitQuery = brw_wait_query; -} diff --git a/src/gallium/drivers/i965/brw_sf.c b/src/gallium/drivers/i965/brw_sf.c index 90513245ee..0115f77c08 100644 --- a/src/gallium/drivers/i965/brw_sf.c +++ b/src/gallium/drivers/i965/brw_sf.c @@ -30,10 +30,6 @@ */ -#include "main/glheader.h" -#include "main/macros.h" -#include "main/enums.h" - #include "intel_batchbuffer.h" #include "brw_defines.h" @@ -46,7 +42,6 @@ static void compile_sf_prog( struct brw_context *brw, struct brw_sf_prog_key *key ) { - GLcontext *ctx = &brw->intel.ctx; struct brw_sf_compile c; const GLuint *program; GLuint program_size; @@ -116,7 +111,7 @@ static void compile_sf_prog( struct brw_context *brw, /* Upload */ - dri_bo_unreference(brw->sf.prog_bo); + brw->sws->bo_unreference(brw->sf.prog_bo); brw->sf.prog_bo = brw_upload_cache( &brw->cache, BRW_SF_PROG, &c.key, sizeof(c.key), NULL, 0, @@ -129,7 +124,6 @@ static void compile_sf_prog( struct brw_context *brw, */ static void upload_sf_prog(struct brw_context *brw) { - GLcontext *ctx = &brw->intel.ctx; struct brw_sf_prog_key key; memset(&key, 0, sizeof(key)); @@ -167,7 +161,7 @@ static void upload_sf_prog(struct brw_context *brw) key.do_twoside_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide); /* _NEW_HINT */ - key.linear_color = (ctx->Hint.PerspectiveCorrection == GL_FASTEST); + key.linear_color = 0; /* _NEW_POLYGON */ if (key.do_twoside_color) { @@ -179,7 +173,7 @@ static void upload_sf_prog(struct brw_context *brw) key.frontface_ccw = (ctx->Polygon.FrontFace == GL_CCW) ^ (ctx->DrawBuffer->Name != 0); } - dri_bo_unreference(brw->sf.prog_bo); + brw->sws->bo_unreference(brw->sf.prog_bo); brw->sf.prog_bo = brw_search_cache(&brw->cache, BRW_SF_PROG, &key, sizeof(key), NULL, 0, diff --git a/src/gallium/drivers/i965/brw_sf.h b/src/gallium/drivers/i965/brw_sf.h index 6426b6df9f..26c2e8891a 100644 --- a/src/gallium/drivers/i965/brw_sf.h +++ b/src/gallium/drivers/i965/brw_sf.h @@ -45,19 +45,23 @@ #define SF_UNFILLED_TRIS 3 struct brw_sf_prog_key { - GLuint attrs:32; + + /* Bitmask of linear and perspective interpolated inputs, 0..nr + */ + GLuint persp_attrs:32; + GLuint linear_attrs:32; + GLuint primitive:2; GLuint do_twoside_color:1; GLuint do_flat_shading:1; GLuint frontface_ccw:1; GLuint do_point_sprite:1; - GLuint linear_color:1; /**< linear interp vs. perspective interp */ + GLuint sprite_origin_lower_left:1; GLuint pad:25; - GLenum SpriteOrigin; }; struct brw_sf_point_tex { - GLboolean CoordReplace; + GLboolean CoordReplace; }; struct brw_sf_compile { diff --git a/src/gallium/drivers/i965/brw_sf_emit.c b/src/gallium/drivers/i965/brw_sf_emit.c index 4cc427a935..c98d7ec13a 100644 --- a/src/gallium/drivers/i965/brw_sf_emit.c +++ b/src/gallium/drivers/i965/brw_sf_emit.c @@ -30,10 +30,6 @@ */ -#include "main/glheader.h" -#include "main/macros.h" -#include "main/enums.h" - #include "intel_batchbuffer.h" #include "brw_defines.h" @@ -305,6 +301,10 @@ static void invert_det( struct brw_sf_compile *c) } +/* Two attributes packed into a wide register. Figure out if either + * or both of them need linear/perspective interpolation. Constant + * regs are left as-is. + */ static GLboolean calculate_masks( struct brw_sf_compile *c, GLuint reg, GLushort *pc, @@ -312,20 +312,8 @@ static GLboolean calculate_masks( struct brw_sf_compile *c, GLushort *pc_linear) { GLboolean is_last_attr = (reg == c->nr_setup_regs - 1); - GLuint persp_mask; - GLuint linear_mask; - - if (c->key.do_flat_shading || c->key.linear_color) - persp_mask = c->key.attrs & ~(FRAG_BIT_WPOS | - FRAG_BIT_COL0 | - FRAG_BIT_COL1); - else - persp_mask = c->key.attrs & ~(FRAG_BIT_WPOS); - - if (c->key.do_flat_shading) - linear_mask = c->key.attrs & ~(FRAG_BIT_COL0|FRAG_BIT_COL1); - else - linear_mask = c->key.attrs; + GLuint persp_mask = c->key.persp_attrs; + GLuint linear_mask = c->key.linear_attrs; *pc_persp = 0; *pc_linear = 0; @@ -570,7 +558,7 @@ void brw_emit_point_sprite_setup( struct brw_sf_compile *c, GLboolean allocate) { brw_set_predicate_control_flag_value(p, pc); if (tex->CoordReplace) { - if (c->key.SpriteOrigin == GL_LOWER_LEFT) { + if (c->key.sprite_origin_lower_left) { brw_MUL(p, c->m3C0, c->inv_w[0], brw_imm_f(1.0)); brw_MOV(p, vec1(suboffset(c->m3C0, 0)), brw_imm_f(0.0)); } diff --git a/src/gallium/drivers/i965/brw_sf_state.c b/src/gallium/drivers/i965/brw_sf_state.c index bc0f076073..5e1229d22f 100644 --- a/src/gallium/drivers/i965/brw_sf_state.c +++ b/src/gallium/drivers/i965/brw_sf_state.c @@ -34,12 +34,9 @@ #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" -#include "main/macros.h" -#include "intel_fbo.h" static void upload_sf_vp(struct brw_context *brw) { - GLcontext *ctx = &brw->intel.ctx; const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF; struct brw_sf_viewport sfv; GLfloat y_scale, y_bias; @@ -92,7 +89,7 @@ static void upload_sf_vp(struct brw_context *brw) sfv.scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1; } - dri_bo_unreference(brw->sf.vp_bo); + brw->sws->bo_unreference(brw->sf.vp_bo); brw->sf.vp_bo = brw_cache_data( &brw->cache, BRW_SF_VP, &sfv, NULL, 0 ); } @@ -126,7 +123,6 @@ struct brw_sf_unit_key { static void sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key) { - GLcontext *ctx = &brw->intel.ctx; memset(key, 0, sizeof(*key)); /* CACHE_NEW_SF_PROG */ @@ -159,12 +155,12 @@ sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key) key->render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0; } -static dri_bo * +static struct brw_winsys_buffer * sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, - dri_bo **reloc_bufs) + struct brw_winsys_buffer **reloc_bufs) { struct brw_sf_unit_state sf; - dri_bo *bo; + struct brw_winsys_buffer *bo; int chipset_max_threads; memset(&sf, 0, sizeof(sf)); @@ -332,14 +328,14 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, static void upload_sf_unit( struct brw_context *brw ) { struct brw_sf_unit_key key; - dri_bo *reloc_bufs[2]; + struct brw_winsys_buffer *reloc_bufs[2]; sf_unit_populate_key(brw, &key); reloc_bufs[0] = brw->sf.prog_bo; reloc_bufs[1] = brw->sf.vp_bo; - dri_bo_unreference(brw->sf.state_bo); + brw->sws->bo_unreference(brw->sf.state_bo); brw->sf.state_bo = brw_search_cache(&brw->cache, BRW_SF_UNIT, &key, sizeof(key), reloc_bufs, 2, diff --git a/src/gallium/drivers/i965/brw_state.h b/src/gallium/drivers/i965/brw_state.h index d639656b9d..a007d542d0 100644 --- a/src/gallium/drivers/i965/brw_state.h +++ b/src/gallium/drivers/i965/brw_state.h @@ -36,12 +36,12 @@ #include "brw_context.h" static inline void -brw_add_validated_bo(struct brw_context *brw, dri_bo *bo) +brw_add_validated_bo(struct brw_context *brw, struct brw_winsys_buffer *bo) { assert(brw->state.validated_bo_count < ARRAY_SIZE(brw->state.validated_bos)); if (bo != NULL) { - dri_bo_reference(bo); + brw->sws->bo_reference(bo); brw->state.validated_bos[brw->state.validated_bo_count++] = bo; } }; @@ -95,9 +95,9 @@ const struct brw_tracked_state brw_index_buffer; * Use same key for WM and VS surfaces. */ struct brw_surface_key { - GLenum target, depthmode; - dri_bo *bo; - GLint format, internal_format; + unsigned target; + struct brw_winsys_buffer *bo; + GLint format; GLint first_level, last_level; GLint width, height, depth; GLint pitch, cpp; @@ -116,42 +116,42 @@ void brw_destroy_state(struct brw_context *brw); /*********************************************************************** * brw_state_cache.c */ -dri_bo *brw_cache_data(struct brw_cache *cache, +struct brw_winsys_buffer *brw_cache_data(struct brw_cache *cache, enum brw_cache_id cache_id, const void *data, - dri_bo **reloc_bufs, + struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs); -dri_bo *brw_cache_data_sz(struct brw_cache *cache, +struct brw_winsys_buffer *brw_cache_data_sz(struct brw_cache *cache, enum brw_cache_id cache_id, const void *data, GLuint data_size, - dri_bo **reloc_bufs, + struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs); -dri_bo *brw_upload_cache( struct brw_cache *cache, +struct brw_winsys_buffer *brw_upload_cache( struct brw_cache *cache, enum brw_cache_id cache_id, const void *key, GLuint key_sz, - dri_bo **reloc_bufs, + struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs, const void *data, GLuint data_sz, const void *aux, void *aux_return ); -dri_bo *brw_search_cache( struct brw_cache *cache, +struct brw_winsys_buffer *brw_search_cache( struct brw_cache *cache, enum brw_cache_id cache_id, const void *key, GLuint key_size, - dri_bo **reloc_bufs, + struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs, void *aux_return); void brw_state_cache_check_size( struct brw_context *brw ); void brw_init_caches( struct brw_context *brw ); void brw_destroy_caches( struct brw_context *brw ); -void brw_state_cache_bo_delete(struct brw_cache *cache, dri_bo *bo); +void brw_state_cache_bo_delete(struct brw_cache *cache, struct brw_winsys_buffer *bo); /*********************************************************************** * brw_state_batch.c @@ -166,7 +166,7 @@ void brw_destroy_batch_cache( struct brw_context *brw ); void brw_clear_batch_cache( struct brw_context *brw ); /* brw_wm_surface_state.c */ -dri_bo * +struct brw_winsys_buffer * brw_create_constant_surface( struct brw_context *brw, struct brw_surface_key *key ); diff --git a/src/gallium/drivers/i965/brw_state_batch.c b/src/gallium/drivers/i965/brw_state_batch.c index 7821898cf9..9568794625 100644 --- a/src/gallium/drivers/i965/brw_state_batch.c +++ b/src/gallium/drivers/i965/brw_state_batch.c @@ -33,7 +33,6 @@ #include "brw_state.h" #include "intel_batchbuffer.h" -#include "main/imports.h" diff --git a/src/gallium/drivers/i965/brw_state_cache.c b/src/gallium/drivers/i965/brw_state_cache.c index c262e1db8b..91d0f80297 100644 --- a/src/gallium/drivers/i965/brw_state_cache.c +++ b/src/gallium/drivers/i965/brw_state_cache.c @@ -56,7 +56,6 @@ * incorrect program is run for the other instance. */ -#include "main/imports.h" #include "brw_state.h" #include "intel_batchbuffer.h" @@ -72,7 +71,7 @@ static GLuint hash_key(const void *key, GLuint key_size, - dri_bo **reloc_bufs, GLuint nr_reloc_bufs) + struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs) { GLuint *ikey = (GLuint *)key; GLuint hash = 0, i; @@ -88,7 +87,7 @@ hash_key(const void *key, GLuint key_size, /* Include the BO pointers as key data as well */ ikey = (GLuint *)reloc_bufs; - key_size = nr_reloc_bufs * sizeof(dri_bo *); + key_size = nr_reloc_bufs * sizeof(struct brw_winsys_buffer *); for (i = 0; i < key_size/4; i++) { hash ^= ikey[i]; hash = (hash << 5) | (hash >> 27); @@ -103,14 +102,14 @@ hash_key(const void *key, GLuint key_size, */ static void update_cache_last(struct brw_cache *cache, enum brw_cache_id cache_id, - dri_bo *bo) + struct brw_winsys_buffer *bo) { if (bo == cache->last_bo[cache_id]) return; /* no change */ - dri_bo_unreference(cache->last_bo[cache_id]); + brw->sws->bo_unreference(cache->last_bo[cache_id]); cache->last_bo[cache_id] = bo; - dri_bo_reference(cache->last_bo[cache_id]); + brw->sws->bo_reference(cache->last_bo[cache_id]); cache->brw->state.dirty.cache |= 1 << cache_id; } @@ -118,7 +117,7 @@ update_cache_last(struct brw_cache *cache, enum brw_cache_id cache_id, static struct brw_cache_item * search_cache(struct brw_cache *cache, enum brw_cache_id cache_id, GLuint hash, const void *key, GLuint key_size, - dri_bo **reloc_bufs, GLuint nr_reloc_bufs) + struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs) { struct brw_cache_item *c; @@ -139,7 +138,7 @@ search_cache(struct brw_cache *cache, enum brw_cache_id cache_id, memcmp(c->key, key, key_size) == 0 && c->nr_reloc_bufs == nr_reloc_bufs && memcmp(c->reloc_bufs, reloc_bufs, - nr_reloc_bufs * sizeof(dri_bo *)) == 0) + nr_reloc_bufs * sizeof(struct brw_winsys_buffer *)) == 0) return c; } @@ -173,12 +172,12 @@ rehash(struct brw_cache *cache) /** * Returns the buffer object matching cache_id and key, or NULL. */ -dri_bo * +struct brw_winsys_buffer * brw_search_cache(struct brw_cache *cache, enum brw_cache_id cache_id, const void *key, GLuint key_size, - dri_bo **reloc_bufs, GLuint nr_reloc_bufs, + struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs, void *aux_return) { struct brw_cache_item *item; @@ -195,17 +194,17 @@ brw_search_cache(struct brw_cache *cache, update_cache_last(cache, cache_id, item->bo); - dri_bo_reference(item->bo); + brw->sws->bo_reference(item->bo); return item->bo; } -dri_bo * +struct brw_winsys_buffer * brw_upload_cache( struct brw_cache *cache, enum brw_cache_id cache_id, const void *key, GLuint key_size, - dri_bo **reloc_bufs, + struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs, const void *data, GLuint data_size, @@ -214,10 +213,10 @@ brw_upload_cache( struct brw_cache *cache, { struct brw_cache_item *item = CALLOC_STRUCT(brw_cache_item); GLuint hash = hash_key(key, key_size, reloc_bufs, nr_reloc_bufs); - GLuint relocs_size = nr_reloc_bufs * sizeof(dri_bo *); + GLuint relocs_size = nr_reloc_bufs * sizeof(struct brw_winsys_buffer *); GLuint aux_size = cache->aux_size[cache_id]; void *tmp; - dri_bo *bo; + struct brw_winsys_buffer *bo; int i; /* Create the buffer object to contain the data */ @@ -233,7 +232,7 @@ brw_upload_cache( struct brw_cache *cache, memcpy(tmp + key_size + aux_size, reloc_bufs, relocs_size); for (i = 0; i < nr_reloc_bufs; i++) { if (reloc_bufs[i] != NULL) - dri_bo_reference(reloc_bufs[i]); + brw->sws->bo_reference(reloc_bufs[i]); } item->cache_id = cache_id; @@ -244,7 +243,7 @@ brw_upload_cache( struct brw_cache *cache, item->nr_reloc_bufs = nr_reloc_bufs; item->bo = bo; - dri_bo_reference(bo); + brw->sws->bo_reference(bo); item->data_size = data_size; if (cache->n_items > cache->size * 1.5) @@ -277,15 +276,15 @@ brw_upload_cache( struct brw_cache *cache, /** * This doesn't really work with aux data. Use search/upload instead */ -dri_bo * +struct brw_winsys_buffer * brw_cache_data_sz(struct brw_cache *cache, enum brw_cache_id cache_id, const void *data, GLuint data_size, - dri_bo **reloc_bufs, + struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs) { - dri_bo *bo; + struct brw_winsys_buffer *bo; struct brw_cache_item *item; GLuint hash = hash_key(data, data_size, reloc_bufs, nr_reloc_bufs); @@ -293,7 +292,7 @@ brw_cache_data_sz(struct brw_cache *cache, reloc_bufs, nr_reloc_bufs); if (item) { update_cache_last(cache, cache_id, item->bo); - dri_bo_reference(item->bo); + brw->sws->bo_reference(item->bo); return item->bo; } @@ -314,11 +313,11 @@ brw_cache_data_sz(struct brw_cache *cache, * better to use, as the potentially changing offsets in the data-used-as-key * will result in excessive cache misses. */ -dri_bo * +struct brw_winsys_buffer * brw_cache_data(struct brw_cache *cache, enum brw_cache_id cache_id, const void *data, - dri_bo **reloc_bufs, + struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs) { return brw_cache_data_sz(cache, cache_id, data, cache->key_size[cache_id], @@ -497,8 +496,8 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) next = c->next; for (j = 0; j < c->nr_reloc_bufs; j++) - dri_bo_unreference(c->reloc_bufs[j]); - dri_bo_unreference(c->bo); + brw->sws->bo_unreference(c->reloc_bufs[j]); + brw->sws->bo_unreference(c->bo); free((void *)c->key); free(c); } @@ -523,7 +522,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) * at the cost of walking the entire hash table. */ void -brw_state_cache_bo_delete(struct brw_cache *cache, dri_bo *bo) +brw_state_cache_bo_delete(struct brw_cache *cache, struct brw_winsys_buffer *bo) { struct brw_cache_item **prev; GLuint i; @@ -535,14 +534,14 @@ brw_state_cache_bo_delete(struct brw_cache *cache, dri_bo *bo) for (prev = &cache->items[i]; *prev;) { struct brw_cache_item *c = *prev; - if (drm_intel_bo_references(c->bo, bo)) { + if (cache->sws->bo_references(c->bo, bo)) { int j; *prev = c->next; for (j = 0; j < c->nr_reloc_bufs; j++) - dri_bo_unreference(c->reloc_bufs[j]); - dri_bo_unreference(c->bo); + brw->sws->bo_unreference(c->reloc_bufs[j]); + brw->sws->bo_unreference(c->bo); free((void *)c->key); free(c); cache->n_items--; @@ -580,7 +579,7 @@ brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache) brw_clear_cache(brw, cache); for (i = 0; i < BRW_MAX_CACHE; i++) { - dri_bo_unreference(cache->last_bo[i]); + brw->sws->bo_unreference(cache->last_bo[i]); free(cache->name[i]); } free(cache->items); diff --git a/src/gallium/drivers/i965/brw_state_dump.c b/src/gallium/drivers/i965/brw_state_dump.c index e94fa7d2b4..1bc83fb9c1 100644 --- a/src/gallium/drivers/i965/brw_state_dump.c +++ b/src/gallium/drivers/i965/brw_state_dump.c @@ -25,8 +25,6 @@ * */ -#include "main/mtypes.h" - #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" @@ -55,7 +53,7 @@ state_out(const char *name, void *data, uint32_t hw_offset, int index, /** Generic, undecoded state buffer debug printout */ static void -state_struct_out(const char *name, dri_bo *buffer, unsigned int state_size) +state_struct_out(const char *name, struct brw_winsys_buffer *buffer, unsigned int state_size) { int i; @@ -102,7 +100,7 @@ static void dump_wm_surface_state(struct brw_context *brw) int i; for (i = 0; i < brw->wm.nr_surfaces; i++) { - dri_bo *surf_bo = brw->wm.surf_bo[i]; + struct brw_winsys_buffer *surf_bo = brw->wm.surf_bo[i]; unsigned int surfoff; struct brw_surface_state *surf; char name[20]; @@ -162,7 +160,7 @@ static void dump_sf_viewport_state(struct brw_context *brw) dri_bo_unmap(brw->sf.vp_bo); } -static void brw_debug_prog(const char *name, dri_bo *prog) +static void brw_debug_prog(const char *name, struct brw_winsys_buffer *prog) { unsigned int i; uint32_t *data; @@ -202,10 +200,8 @@ static void brw_debug_prog(const char *name, dri_bo *prog) * The buffer offsets printed rely on the buffer containing the last offset * it was validated at. */ -void brw_debug_batch(struct intel_context *intel) +void brw_debug_batch(struct brw_context *brw) { - struct brw_context *brw = brw_context(&intel->ctx); - state_struct_out("WM bind", brw->wm.bind_bo, 4 * brw->wm.nr_surfaces); dump_wm_surface_state(brw); diff --git a/src/gallium/drivers/i965/brw_state_upload.c b/src/gallium/drivers/i965/brw_state_upload.c index 6801084616..b68b6cb21a 100644 --- a/src/gallium/drivers/i965/brw_state_upload.c +++ b/src/gallium/drivers/i965/brw_state_upload.c @@ -149,7 +149,7 @@ brw_clear_validated_bos(struct brw_context *brw) /* Clear the last round of validated bos */ for (i = 0; i < brw->state.validated_bo_count; i++) { - dri_bo_unreference(brw->state.validated_bos[i]); + brw->sws->bo_unreference(brw->state.validated_bos[i]); brw->state.validated_bos[i] = NULL; } brw->state.validated_bo_count = 0; @@ -272,8 +272,6 @@ brw_print_dirty_count(struct dirty_bit_map *bit_map, int32_t bits) */ enum pipe_error brw_validate_state( struct brw_context *brw ) { - GLcontext *ctx = &brw->intel.ctx; - struct intel_context *intel = &brw->intel; struct brw_state_flags *state = &brw->state.dirty; GLuint i; diff --git a/src/gallium/drivers/i965/brw_structs.h b/src/gallium/drivers/i965/brw_structs.h index 66d4127271..27d264c3de 100644 --- a/src/gallium/drivers/i965/brw_structs.h +++ b/src/gallium/drivers/i965/brw_structs.h @@ -33,6 +33,7 @@ #ifndef BRW_STRUCTS_H #define BRW_STRUCTS_H +#include "brw_types.h" /** Number of general purpose registers (VS, WM, etc) */ #define BRW_MAX_GRF 128 diff --git a/src/gallium/drivers/i965/brw_swtnl.c b/src/gallium/drivers/i965/brw_swtnl.c index 6684f442d5..83f138f67a 100644 --- a/src/gallium/drivers/i965/brw_swtnl.c +++ b/src/gallium/drivers/i965/brw_swtnl.c @@ -6,7 +6,6 @@ static GLboolean check_fallbacks( struct brw_context *brw, const struct _mesa_prim *prim, GLuint nr_prims ) { - GLcontext *ctx = &brw->intel.ctx; GLuint i; /* If we don't require strict OpenGL conformance, never diff --git a/src/gallium/drivers/i965/brw_tex.c b/src/gallium/drivers/i965/brw_tex.c index e911b105b2..c33c19ee51 100644 --- a/src/gallium/drivers/i965/brw_tex.c +++ b/src/gallium/drivers/i965/brw_tex.c @@ -30,11 +30,6 @@ */ -#include "main/glheader.h" -#include "main/mtypes.h" -#include "main/teximage.h" - -#include "intel_context.h" #include "intel_regions.h" #include "intel_tex.h" #include "brw_context.h" @@ -45,8 +40,6 @@ */ void brw_validate_textures( struct brw_context *brw ) { - GLcontext *ctx = &brw->intel.ctx; - struct intel_context *intel = &brw->intel; int i; for (i = 0; i < BRW_MAX_TEX_UNIT; i++) { diff --git a/src/gallium/drivers/i965/brw_tex_layout.c b/src/gallium/drivers/i965/brw_tex_layout.c index 5986cbffad..75cdc18912 100644 --- a/src/gallium/drivers/i965/brw_tex_layout.c +++ b/src/gallium/drivers/i965/brw_tex_layout.c @@ -34,13 +34,11 @@ #include "intel_mipmap_tree.h" #include "intel_tex_layout.h" -#include "intel_context.h" -#include "main/macros.h" #include "intel_chipset.h" #define FILE_DEBUG_FLAG DEBUG_MIPTREE -GLboolean brw_miptree_layout(struct intel_context *intel, +GLboolean brw_miptree_layout(struct brw_context *brw, struct intel_mipmap_tree *mt, uint32_t tiling) { @@ -67,7 +65,7 @@ GLboolean brw_miptree_layout(struct intel_context *intel, mt->pitch = ALIGN(mt->width0, align_w); } - if (mt->first_level != mt->last_level) { + if (mt->last_level != 0) { GLuint mip1_width; if (mt->compressed) { @@ -93,7 +91,7 @@ GLboolean brw_miptree_layout(struct intel_context *intel, mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) * 6; } - for (level = mt->first_level; level <= mt->last_level; level++) { + for (level = 0; level <= mt->last_level; level++) { GLuint img_height; GLuint nr_images = 6; GLuint q = 0; @@ -109,7 +107,7 @@ GLboolean brw_miptree_layout(struct intel_context *intel, else img_height = ALIGN(height, align_h); - if (level == mt->first_level + 1) { + if (level == 1) { x += ALIGN(width, align_w); } else { @@ -147,7 +145,7 @@ GLboolean brw_miptree_layout(struct intel_context *intel, pack_x_pitch = width; pack_x_nr = 1; - for (level = mt->first_level ; level <= mt->last_level ; level++) { + for (level = 0 ; level <= mt->last_level ; level++) { GLuint nr_images = mt->target == GL_TEXTURE_3D ? depth : 6; GLint x = 0; GLint y = 0; diff --git a/src/gallium/drivers/i965/brw_types.h b/src/gallium/drivers/i965/brw_types.h index 32b62848da..87dae13d94 100644 --- a/src/gallium/drivers/i965/brw_types.h +++ b/src/gallium/drivers/i965/brw_types.h @@ -1,11 +1,18 @@ #ifndef BRW_TYPES_H #define BRW_TYPES_H -typedef GLuint uint32_t; -typedef GLubyte uint8_t; -typedef GLushort uint16_t; +#include "pipe/p_compiler.h" + +typedef uint32_t GLuint; +typedef uint8_t GLubyte; +typedef uint16_t GLushort; +typedef int32_t GLint; +typedef int8_t GLbyte; +typedef int16_t GLshort; +typedef float GLfloat; + /* no GLenum, translate all away */ -typedef GLboolean uint8_t; +typedef uint8_t GLboolean; #endif diff --git a/src/gallium/drivers/i965/brw_util.c b/src/gallium/drivers/i965/brw_util.c index 17f671a8fa..c5244e58ab 100644 --- a/src/gallium/drivers/i965/brw_util.c +++ b/src/gallium/drivers/i965/brw_util.c @@ -30,8 +30,6 @@ */ -#include "main/mtypes.h" -#include "shader/prog_parameter.h" #include "brw_util.h" #include "brw_defines.h" diff --git a/src/gallium/drivers/i965/brw_util.h b/src/gallium/drivers/i965/brw_util.h index 33e7cd87e4..37c3acbc11 100644 --- a/src/gallium/drivers/i965/brw_util.h +++ b/src/gallium/drivers/i965/brw_util.h @@ -33,7 +33,7 @@ #ifndef BRW_UTIL_H #define BRW_UTIL_H -#include "main/mtypes.h" +#include "brw_types.h" extern GLuint brw_count_bits( GLuint val ); extern GLuint brw_parameter_list_state_flags(struct gl_program_parameter_list *paramList); diff --git a/src/gallium/drivers/i965/brw_vs.c b/src/gallium/drivers/i965/brw_vs.c index 53a5560105..97e523c3ee 100644 --- a/src/gallium/drivers/i965/brw_vs.c +++ b/src/gallium/drivers/i965/brw_vs.c @@ -71,7 +71,7 @@ static void do_vs_prog( struct brw_context *brw, */ program = brw_get_program(&c.func, &program_size); - dri_bo_unreference(brw->vs.prog_bo); + brw->sws->bo_unreference(brw->vs.prog_bo); brw->vs.prog_bo = brw_upload_cache( &brw->cache, BRW_VS_PROG, &c.key, sizeof(c.key), NULL, 0, @@ -83,7 +83,6 @@ static void do_vs_prog( struct brw_context *brw, static void brw_upload_vs_prog(struct brw_context *brw) { - GLcontext *ctx = &brw->intel.ctx; struct brw_vs_prog_key key; struct brw_vertex_program *vp = (struct brw_vertex_program *)brw->vertex_program; @@ -100,7 +99,7 @@ static void brw_upload_vs_prog(struct brw_context *brw) /* Make an early check for the key. */ - dri_bo_unreference(brw->vs.prog_bo); + brw->sws->bo_unreference(brw->vs.prog_bo); brw->vs.prog_bo = brw_search_cache(&brw->cache, BRW_VS_PROG, &key, sizeof(key), NULL, 0, diff --git a/src/gallium/drivers/i965/brw_vs_emit.c b/src/gallium/drivers/i965/brw_vs_emit.c index 7f20c4baca..6adb743017 100644 --- a/src/gallium/drivers/i965/brw_vs_emit.c +++ b/src/gallium/drivers/i965/brw_vs_emit.c @@ -30,9 +30,6 @@ */ -#include "main/macros.h" -#include "shader/program.h" -#include "shader/prog_parameter.h" #include "pipe/p_shader_tokens.h" #include "brw_context.h" #include "brw_vs.h" diff --git a/src/gallium/drivers/i965/brw_vs_state.c b/src/gallium/drivers/i965/brw_vs_state.c index d790ab6555..1717223e49 100644 --- a/src/gallium/drivers/i965/brw_vs_state.c +++ b/src/gallium/drivers/i965/brw_vs_state.c @@ -34,7 +34,6 @@ #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" -#include "main/macros.h" struct brw_vs_unit_key { unsigned int total_grf; @@ -51,8 +50,6 @@ struct brw_vs_unit_key { static void vs_unit_populate_key(struct brw_context *brw, struct brw_vs_unit_key *key) { - GLcontext *ctx = &brw->intel.ctx; - memset(key, 0, sizeof(*key)); /* CACHE_NEW_VS_PROG */ @@ -79,11 +76,11 @@ vs_unit_populate_key(struct brw_context *brw, struct brw_vs_unit_key *key) } } -static dri_bo * +static struct brw_winsys_buffer * vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) { struct brw_vs_unit_state vs; - dri_bo *bo; + struct brw_winsys_buffer *bo; int chipset_max_threads; memset(&vs, 0, sizeof(vs)); @@ -163,7 +160,7 @@ static void prepare_vs_unit(struct brw_context *brw) vs_unit_populate_key(brw, &key); - dri_bo_unreference(brw->vs.state_bo); + brw->sws->bo_unreference(brw->vs.state_bo); brw->vs.state_bo = brw_search_cache(&brw->cache, BRW_VS_UNIT, &key, sizeof(key), &brw->vs.prog_bo, 1, diff --git a/src/gallium/drivers/i965/brw_vs_surface_state.c b/src/gallium/drivers/i965/brw_vs_surface_state.c index 89f47522a1..6446e8e761 100644 --- a/src/gallium/drivers/i965/brw_vs_surface_state.c +++ b/src/gallium/drivers/i965/brw_vs_surface_state.c @@ -29,11 +29,6 @@ * Keith Whitwell */ -#include "main/mtypes.h" -#include "main/texformat.h" -#include "main/texstore.h" -#include "shader/prog_parameter.h" - #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" @@ -47,7 +42,6 @@ static drm_intel_bo * brw_vs_update_constant_buffer(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; struct brw_vertex_program *vp = (struct brw_vertex_program *) brw->vertex_program; const struct gl_program_parameter_list *params = vp->program.Base.Parameters; @@ -73,7 +67,7 @@ brw_vs_update_constant_buffer(struct brw_context *brw) * Sets brw->vs.surf_bo[surf] and brw->vp->const_buffer. */ static void -brw_update_vs_constant_surface( GLcontext *ctx, +brw_update_vs_constant_surface( struct brw_context *brw, GLuint surf) { struct brw_context *brw = brw_context(ctx); @@ -87,7 +81,7 @@ brw_update_vs_constant_surface( GLcontext *ctx, /* If we're in this state update atom, we need to update VS constants, so * free the old buffer and create a new one for the new contents. */ - dri_bo_unreference(vp->const_buffer); + brw->sws->bo_unreference(vp->const_buffer); vp->const_buffer = brw_vs_update_constant_buffer(brw); /* If there's no constant buffer, then no surface BO is needed to point at @@ -101,8 +95,7 @@ brw_update_vs_constant_surface( GLcontext *ctx, memset(&key, 0, sizeof(key)); - key.format = MESA_FORMAT_RGBA_FLOAT32; - key.internal_format = GL_RGBA; + key.format = PIPE_FORMAT_R32G32B32A32_FLOAT; key.bo = vp->const_buffer; key.depthmode = GL_NONE; key.pitch = params->NumParameters; @@ -132,10 +125,10 @@ brw_update_vs_constant_surface( GLcontext *ctx, /** * Constructs the binding table for the VS surface state. */ -static dri_bo * +static struct brw_winsys_buffer * brw_vs_get_binding_table(struct brw_context *brw) { - dri_bo *bind_bo; + struct brw_winsys_buffer *bind_bo; bind_bo = brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND, NULL, 0, @@ -186,7 +179,6 @@ brw_vs_get_binding_table(struct brw_context *brw) */ static void prepare_vs_surfaces(struct brw_context *brw ) { - GLcontext *ctx = &brw->intel.ctx; int i; int nr_surfaces = 0; @@ -208,7 +200,7 @@ static void prepare_vs_surfaces(struct brw_context *brw ) * just slightly increases our working set size. */ if (brw->vs.nr_surfaces != 0) { - dri_bo_unreference(brw->vs.bind_bo); + brw->sws->bo_unreference(brw->vs.bind_bo); brw->vs.bind_bo = brw_vs_get_binding_table(brw); } } diff --git a/src/gallium/drivers/i965/brw_wm.c b/src/gallium/drivers/i965/brw_wm.c index 20d31880b4..32b8900bac 100644 --- a/src/gallium/drivers/i965/brw_wm.c +++ b/src/gallium/drivers/i965/brw_wm.c @@ -29,7 +29,6 @@ * Keith Whitwell */ -#include "main/texformat.h" #include "brw_context.h" #include "brw_util.h" #include "brw_wm.h" @@ -186,7 +185,7 @@ static void do_wm_prog( struct brw_context *brw, */ program = brw_get_program(&c->func, &program_size); - dri_bo_unreference(brw->wm.prog_bo); + brw->sws->bo_unreference(brw->wm.prog_bo); brw->wm.prog_bo = brw_upload_cache( &brw->cache, BRW_WM_PROG, &c->key, sizeof(c->key), NULL, 0, @@ -200,7 +199,6 @@ static void do_wm_prog( struct brw_context *brw, static void brw_wm_populate_key( struct brw_context *brw, struct brw_wm_prog_key *key ) { - GLcontext *ctx = &brw->intel.ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ const struct brw_fragment_program *fp = (struct brw_fragment_program *)brw->fragment_program; @@ -329,7 +327,7 @@ static void brw_prepare_wm_prog(struct brw_context *brw) /* Make an early check for the key. */ - dri_bo_unreference(brw->wm.prog_bo); + brw->sws->bo_unreference(brw->wm.prog_bo); brw->wm.prog_bo = brw_search_cache(&brw->cache, BRW_WM_PROG, &key, sizeof(key), NULL, 0, diff --git a/src/gallium/drivers/i965/brw_wm_emit.c b/src/gallium/drivers/i965/brw_wm_emit.c index 9c47c46a3d..fec33f74eb 100644 --- a/src/gallium/drivers/i965/brw_wm_emit.c +++ b/src/gallium/drivers/i965/brw_wm_emit.c @@ -30,7 +30,6 @@ */ -#include "main/macros.h" #include "brw_context.h" #include "brw_wm.h" diff --git a/src/gallium/drivers/i965/brw_wm_glsl.c b/src/gallium/drivers/i965/brw_wm_glsl.c index d836e2fb34..c4f0711793 100644 --- a/src/gallium/drivers/i965/brw_wm_glsl.c +++ b/src/gallium/drivers/i965/brw_wm_glsl.c @@ -1,7 +1,3 @@ -#include "main/macros.h" -#include "shader/prog_parameter.h" -#include "shader/prog_print.h" -#include "shader/prog_optimize.h" #include "brw_context.h" #include "brw_eu.h" #include "brw_wm.h" diff --git a/src/gallium/drivers/i965/brw_wm_iz.c b/src/gallium/drivers/i965/brw_wm_iz.c index 5e399ac62a..6f1e9fcc3c 100644 --- a/src/gallium/drivers/i965/brw_wm_iz.c +++ b/src/gallium/drivers/i965/brw_wm_iz.c @@ -30,7 +30,6 @@ */ -#include "main/mtypes.h" #include "brw_wm.h" diff --git a/src/gallium/drivers/i965/brw_wm_sampler_state.c b/src/gallium/drivers/i965/brw_wm_sampler_state.c index dff466587a..a8993f9312 100644 --- a/src/gallium/drivers/i965/brw_wm_sampler_state.c +++ b/src/gallium/drivers/i965/brw_wm_sampler_state.c @@ -34,9 +34,6 @@ #include "brw_state.h" #include "brw_defines.h" -#include "main/macros.h" - - /* Samplers aren't strictly wm state from the hardware's perspective, * but that is the only situation in which we use them in this driver. @@ -79,7 +76,7 @@ static GLint S_FIXED(GLfloat value, GLuint frac_bits) } -static dri_bo *upload_default_color( struct brw_context *brw, +static struct brw_winsys_buffer *upload_default_color( struct brw_context *brw, const GLfloat *color ) { struct brw_sampler_default_color sdc; @@ -102,7 +99,7 @@ struct wm_sampler_key { float max_aniso; GLenum minfilter, magfilter; GLenum comparemode, comparefunc; - dri_bo *sdc_bo; + struct brw_winsys_buffer *sdc_bo; /** If target is cubemap, take context setting. */ @@ -115,7 +112,7 @@ struct wm_sampler_key { * entry. */ static void brw_update_sampler_state(struct wm_sampler_entry *key, - dri_bo *sdc_bo, + struct brw_winsys_buffer *sdc_bo, struct brw_sampler_state *sampler) { _mesa_memset(sampler, 0, sizeof(*sampler)); @@ -240,7 +237,6 @@ static void brw_wm_sampler_populate_key(struct brw_context *brw, struct wm_sampler_key *key) { - GLcontext *ctx = &brw->intel.ctx; int unit; memset(key, 0, sizeof(*key)); @@ -272,7 +268,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw, entry->comparemode = texObj->CompareMode; entry->comparefunc = texObj->CompareFunc; - dri_bo_unreference(brw->wm.sdc_bo[unit]); + brw->sws->bo_unreference(brw->wm.sdc_bo[unit]); if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) { float bordercolor[4] = { texObj->BorderColor[0], @@ -300,7 +296,6 @@ brw_wm_sampler_populate_key(struct brw_context *brw, */ static void upload_wm_samplers( struct brw_context *brw ) { - GLcontext *ctx = &brw->intel.ctx; struct wm_sampler_key key; int i; @@ -311,7 +306,7 @@ static void upload_wm_samplers( struct brw_context *brw ) brw->state.dirty.cache |= CACHE_NEW_SAMPLER; } - dri_bo_unreference(brw->wm.sampler_bo); + brw->sws->bo_unreference(brw->wm.sampler_bo); brw->wm.sampler_bo = NULL; if (brw->wm.sampler_count == 0) return; diff --git a/src/gallium/drivers/i965/brw_wm_state.c b/src/gallium/drivers/i965/brw_wm_state.c index 361f91292b..958c00d3e0 100644 --- a/src/gallium/drivers/i965/brw_wm_state.c +++ b/src/gallium/drivers/i965/brw_wm_state.c @@ -60,10 +60,8 @@ struct brw_wm_unit_key { static void wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key) { - GLcontext *ctx = &brw->intel.ctx; const struct gl_fragment_program *fp = brw->fragment_program; const struct brw_fragment_program *bfp = (struct brw_fragment_program *) fp; - struct intel_context *intel = &brw->intel; memset(key, 0, sizeof(*key)); @@ -121,7 +119,7 @@ wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key) /* temporary sanity check assertion */ ASSERT(bfp->isGLSL == brw_wm_is_glsl(fp)); - /* _NEW_DEPTH */ + /* _NEW_QUERY */ key->stats_wm = intel->stats_wm; /* _NEW_LINE */ @@ -136,12 +134,12 @@ wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key) /** * Setup wm hardware state. See page 225 of Volume 2 */ -static dri_bo * +static struct brw_winsys_buffer * wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, - dri_bo **reloc_bufs) + struct brw_winsys_buffer **reloc_bufs) { struct brw_wm_unit_state wm; - dri_bo *bo; + struct brw_winsys_buffer *bo; memset(&wm, 0, sizeof(wm)); @@ -257,9 +255,8 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, static void upload_wm_unit( struct brw_context *brw ) { - struct intel_context *intel = &brw->intel; struct brw_wm_unit_key key; - dri_bo *reloc_bufs[3]; + struct brw_winsys_buffer *reloc_bufs[3]; wm_unit_populate_key(brw, &key); /* Allocate the necessary scratch space if we haven't already. Don't @@ -271,7 +268,7 @@ static void upload_wm_unit( struct brw_context *brw ) GLuint total = key.total_scratch * key.max_threads; if (brw->wm.scratch_bo && total > brw->wm.scratch_bo->size) { - dri_bo_unreference(brw->wm.scratch_bo); + brw->sws->bo_unreference(brw->wm.scratch_bo); brw->wm.scratch_bo = NULL; } if (brw->wm.scratch_bo == NULL) { @@ -286,7 +283,7 @@ static void upload_wm_unit( struct brw_context *brw ) reloc_bufs[1] = brw->wm.scratch_bo; reloc_bufs[2] = brw->wm.sampler_bo; - dri_bo_unreference(brw->wm.state_bo); + brw->sws->bo_unreference(brw->wm.state_bo); brw->wm.state_bo = brw_search_cache(&brw->cache, BRW_WM_UNIT, &key, sizeof(key), reloc_bufs, 3, @@ -302,7 +299,7 @@ const struct brw_tracked_state brw_wm_unit = { _NEW_POLYGONSTIPPLE | _NEW_LINE | _NEW_COLOR | - _NEW_DEPTH), + _NEW_QUERY), .brw = (BRW_NEW_FRAGMENT_PROGRAM | BRW_NEW_CURBE_OFFSETS | diff --git a/src/gallium/drivers/i965/brw_wm_surface_state.c b/src/gallium/drivers/i965/brw_wm_surface_state.c index f7cc5153a8..86dcb74b5b 100644 --- a/src/gallium/drivers/i965/brw_wm_surface_state.c +++ b/src/gallium/drivers/i965/brw_wm_surface_state.c @@ -30,11 +30,6 @@ */ -#include "main/mtypes.h" -#include "main/texformat.h" -#include "main/texstore.h" -#include "shader/prog_parameter.h" - #include "intel_mipmap_tree.h" #include "intel_batchbuffer.h" #include "intel_tex.h" @@ -70,90 +65,87 @@ static GLuint translate_tex_target( GLenum target ) } -static GLuint translate_tex_format( GLuint mesa_format, GLenum internal_format, +static GLuint translate_tex_format( GLuint mesa_format, GLenum depth_mode ) { - switch( mesa_format ) { - case MESA_FORMAT_L8: + switch( pipe_format ) { + case PIPE_FORMAT_L8_UNORM: return BRW_SURFACEFORMAT_L8_UNORM; - case MESA_FORMAT_I8: + case PIPE_FORMAT_I8_UNORM: return BRW_SURFACEFORMAT_I8_UNORM; - case MESA_FORMAT_A8: + case PIPE_FORMAT_A8_UNORM: return BRW_SURFACEFORMAT_A8_UNORM; - case MESA_FORMAT_AL88: + case PIPE_FORMAT_A8L8_UNORM: return BRW_SURFACEFORMAT_L8A8_UNORM; - case MESA_FORMAT_RGB888: - assert(0); /* not supported for sampling */ - return BRW_SURFACEFORMAT_R8G8B8_UNORM; + case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_R8G8B8A8_UNORM: + return BRW_SURFACEFORMAT_B8G8R8A8_UNORM; - case MESA_FORMAT_ARGB8888: - if (internal_format == GL_RGB) - return BRW_SURFACEFORMAT_B8G8R8X8_UNORM; - else - return BRW_SURFACEFORMAT_B8G8R8A8_UNORM; + case PIPE_FORMAT_R8G8B8X8_UNORM: + return BRW_SURFACEFORMAT_R8G8B8X8_UNORM; - case MESA_FORMAT_RGBA8888_REV: - if (internal_format == GL_RGB) - return BRW_SURFACEFORMAT_R8G8B8X8_UNORM; - else - return BRW_SURFACEFORMAT_R8G8B8A8_UNORM; + case PIPE_FORMAT_: + return BRW_SURFACEFORMAT_B8G8R8A8_UNORM; - case MESA_FORMAT_RGB565: + case PIPE_FORMAT_RGB565: return BRW_SURFACEFORMAT_B5G6R5_UNORM; - case MESA_FORMAT_ARGB1555: + case PIPE_FORMAT_ARGB1555: return BRW_SURFACEFORMAT_B5G5R5A1_UNORM; - case MESA_FORMAT_ARGB4444: + case PIPE_FORMAT_ARGB4444: return BRW_SURFACEFORMAT_B4G4R4A4_UNORM; - case MESA_FORMAT_YCBCR_REV: + + case PIPE_FORMAT_L16_UNORM: + return BRW_SURFACEFORMAT_L16_UNORM; + + case PIPE_FORMAT_I16_UNORM: + return BRW_SURFACEFORMAT_I16_UNORM; + + case PIPE_FORMAT_A16_UNORM: + return BRW_SURFACEFORMAT_A16_UNORM; + + case PIPE_FORMAT_YCBCR_REV: return BRW_SURFACEFORMAT_YCRCB_NORMAL; - case MESA_FORMAT_YCBCR: + case PIPE_FORMAT_YCBCR: return BRW_SURFACEFORMAT_YCRCB_SWAPUVY; - case MESA_FORMAT_RGB_FXT1: - case MESA_FORMAT_RGBA_FXT1: + case PIPE_FORMAT_RGB_FXT1: + case PIPE_FORMAT_RGBA_FXT1: return BRW_SURFACEFORMAT_FXT1; - case MESA_FORMAT_Z16: - if (depth_mode == GL_INTENSITY) - return BRW_SURFACEFORMAT_I16_UNORM; - else if (depth_mode == GL_ALPHA) - return BRW_SURFACEFORMAT_A16_UNORM; - else - return BRW_SURFACEFORMAT_L16_UNORM; - - case MESA_FORMAT_RGB_DXT1: + case PIPE_FORMAT_RGB_DXT1: return BRW_SURFACEFORMAT_DXT1_RGB; - case MESA_FORMAT_RGBA_DXT1: + case PIPE_FORMAT_RGBA_DXT1: return BRW_SURFACEFORMAT_BC1_UNORM; - case MESA_FORMAT_RGBA_DXT3: + case PIPE_FORMAT_RGBA_DXT3: return BRW_SURFACEFORMAT_BC2_UNORM; - case MESA_FORMAT_RGBA_DXT5: + case PIPE_FORMAT_RGBA_DXT5: return BRW_SURFACEFORMAT_BC3_UNORM; - case MESA_FORMAT_SARGB8: + case PIPE_FORMAT_R8G8B8A8_SRGB: return BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB; - case MESA_FORMAT_SLA8: + case PIPE_FORMAT_A8L8_SRGB: return BRW_SURFACEFORMAT_L8A8_UNORM_SRGB; - case MESA_FORMAT_SL8: + case PIPE_FORMAT_L8_SRGB: return BRW_SURFACEFORMAT_L8_UNORM_SRGB; - case MESA_FORMAT_SRGB_DXT1: + case PIPE_FORMAT_SRGB_DXT1: return BRW_SURFACEFORMAT_BC1_UNORM_SRGB; - case MESA_FORMAT_S8_Z24: + case PIPE_FORMAT_S8_Z24: /* XXX: these different surface formats don't seem to * make any difference for shadow sampler/compares. */ @@ -164,10 +156,10 @@ static GLuint translate_tex_format( GLuint mesa_format, GLenum internal_format, else return BRW_SURFACEFORMAT_L24X8_UNORM; - case MESA_FORMAT_DUDV8: + case PIPE_FORMAT_DUDV8: return BRW_SURFACEFORMAT_R8G8_SNORM; - case MESA_FORMAT_SIGNED_RGBA8888_REV: + case PIPE_FORMAT_SIGNED_RGBA8888_REV: return BRW_SURFACEFORMAT_R8G8B8A8_SNORM; default: @@ -195,12 +187,12 @@ brw_set_surface_tiling(struct brw_surface_state *surf, uint32_t tiling) } } -static dri_bo * +static struct brw_winsys_buffer * brw_create_texture_surface( struct brw_context *brw, struct brw_surface_key *key ) { struct brw_surface_state surf; - dri_bo *bo; + struct brw_winsys_buffer *bo; memset(&surf, 0, sizeof(surf)); @@ -234,7 +226,7 @@ brw_create_texture_surface( struct brw_context *brw, else surf.ss1.base_addr = key->offset; - surf.ss2.mip_count = key->last_level - key->first_level; + surf.ss2.mip_count = key->last_level; surf.ss2.width = key->width - 1; surf.ss2.height = key->height - 1; brw_set_surface_tiling(&surf, key->tiling); @@ -270,41 +262,30 @@ brw_create_texture_surface( struct brw_context *brw, } static void -brw_update_texture_surface( GLcontext *ctx, GLuint unit ) +brw_update_texture_surface( struct brw_context *brw, GLuint unit ) { - struct brw_context *brw = brw_context(ctx); - struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; - struct intel_texture_object *intelObj = intel_texture_object(tObj); - struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel]; + struct pipe_texture *tex = brw->texture[unit]; struct brw_surface_key key; const GLuint surf = SURF_INDEX_TEXTURE(unit); memset(&key, 0, sizeof(key)); - if (intelObj->imageOverride) { - key.pitch = intelObj->pitchOverride / intelObj->mt->cpp; - key.depth = intelObj->depthOverride; - key.bo = NULL; - key.offset = intelObj->textureOffset; - } else { - key.format = firstImage->TexFormat->MesaFormat; - key.internal_format = firstImage->InternalFormat; - key.pitch = intelObj->mt->pitch; - key.depth = firstImage->Depth; - key.bo = intelObj->mt->region->buffer; - key.offset = 0; - } - - key.target = tObj->Target; - key.depthmode = tObj->DepthMode; - key.first_level = intelObj->firstLevel; - key.last_level = intelObj->lastLevel; - key.width = firstImage->Width; - key.height = firstImage->Height; - key.cpp = intelObj->mt->cpp; - key.tiling = intelObj->mt->region->tiling; - - dri_bo_unreference(brw->wm.surf_bo[surf]); + key.format = tex->base.format; + key.pitch = tex->pitch; + key.depth = tex->base.depth[0]; + key.bo = tex->buffer; + key.offset = 0; + + key.target = tObj->target; /* translated to BRW enum */ + /* key.depthmode = tObj->DepthMode; */ /* XXX: add this to gallium? or the state tracker? */ + key.first_level = 0; + key.last_level = tex->base.last_level; + key.width = tex->base.depth[0]; + key.height = tex->base.height[0]; + key.cpp = tex->cpp; + key.tiling = tex->tiling; + + brw->sws->bo_unreference(brw->wm.surf_bo[surf]); brw->wm.surf_bo[surf] = brw_search_cache(&brw->surface_cache, BRW_SS_SURFACE, &key, sizeof(key), @@ -321,13 +302,13 @@ brw_update_texture_surface( GLcontext *ctx, GLuint unit ) * Create the constant buffer surface. Vertex/fragment shader constants will be * read from this buffer with Data Port Read instructions/messages. */ -dri_bo * +struct brw_winsys_buffer * brw_create_constant_surface( struct brw_context *brw, struct brw_surface_key *key ) { const GLint w = key->width - 1; struct brw_surface_state surf; - dri_bo *bo; + struct brw_winsys_buffer *bo; memset(&surf, 0, sizeof(surf)); @@ -374,7 +355,6 @@ brw_create_constant_surface( struct brw_context *brw, static drm_intel_bo * brw_wm_update_constant_buffer(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; struct brw_fragment_program *fp = (struct brw_fragment_program *) brw->fragment_program; const struct gl_program_parameter_list *params = fp->program.Base.Parameters; @@ -399,7 +379,7 @@ brw_wm_update_constant_buffer(struct brw_context *brw) * The constant buffer will be (re)allocated here if needed. */ static void -brw_update_wm_constant_surface( GLcontext *ctx, +brw_update_wm_constant_surface( struct brw_context *brw, GLuint surf) { struct brw_context *brw = brw_context(ctx); @@ -412,7 +392,7 @@ brw_update_wm_constant_surface( GLcontext *ctx, /* If we're in this state update atom, we need to update WM constants, so * free the old buffer and create a new one for the new contents. */ - dri_bo_unreference(fp->const_buffer); + brw->sws->bo_unreference(fp->const_buffer); fp->const_buffer = brw_wm_update_constant_buffer(brw); /* If there's no constant buffer, then no surface BO is needed to point at @@ -426,7 +406,7 @@ brw_update_wm_constant_surface( GLcontext *ctx, memset(&key, 0, sizeof(key)); - key.format = MESA_FORMAT_RGBA_FLOAT32; + key.format = PIPE_FORMAT_RGBA_FLOAT32; key.internal_format = GL_RGBA; key.bo = fp->const_buffer; key.depthmode = GL_NONE; @@ -442,7 +422,7 @@ brw_update_wm_constant_surface( GLcontext *ctx, key.width, key.height, key.depth, key.cpp, key.pitch); */ - dri_bo_unreference(brw->wm.surf_bo[surf]); + brw->sws->bo_unreference(brw->wm.surf_bo[surf]); brw->wm.surf_bo[surf] = brw_search_cache(&brw->surface_cache, BRW_SS_SURFACE, &key, sizeof(key), @@ -464,7 +444,6 @@ brw_update_wm_constant_surface( GLcontext *ctx, */ static void prepare_wm_constant_surface(struct brw_context *brw ) { - GLcontext *ctx = &brw->intel.ctx; struct brw_fragment_program *fp = (struct brw_fragment_program *) brw->fragment_program; GLuint surf = SURF_INDEX_FRAG_CONST_BUFFER; @@ -507,8 +486,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw, struct gl_renderbuffer *rb, unsigned int unit) { - GLcontext *ctx = &brw->intel.ctx; - dri_bo *region_bo = NULL; + struct brw_winsys_buffer *region_bo = NULL; struct intel_renderbuffer *irb = intel_renderbuffer(rb); struct intel_region *region = irb ? irb->region : NULL; struct { @@ -528,16 +506,16 @@ brw_update_renderbuffer_surface(struct brw_context *brw, key.surface_type = BRW_SURFACE_2D; switch (irb->texformat->MesaFormat) { - case MESA_FORMAT_ARGB8888: + case PIPE_FORMAT_ARGB8888: key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; break; - case MESA_FORMAT_RGB565: + case PIPE_FORMAT_RGB565: key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; break; - case MESA_FORMAT_ARGB1555: + case PIPE_FORMAT_ARGB1555: key.surface_format = BRW_SURFACEFORMAT_B5G5R5A1_UNORM; break; - case MESA_FORMAT_ARGB4444: + case PIPE_FORMAT_ARGB4444: key.surface_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM; break; default: @@ -569,7 +547,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw, key.color_blend = (!ctx->Color._LogicOpEnabled && ctx->Color.BlendEnabled); - dri_bo_unreference(brw->wm.surf_bo[unit]); + brw->sws->bo_unreference(brw->wm.surf_bo[unit]); brw->wm.surf_bo[unit] = brw_search_cache(&brw->surface_cache, BRW_SS_SURFACE, &key, sizeof(key), @@ -646,10 +624,10 @@ brw_update_renderbuffer_surface(struct brw_context *brw, * Constructs the binding table for the WM surface state, which maps unit * numbers to surface state objects. */ -static dri_bo * +static struct brw_winsys_buffer * brw_wm_get_binding_table(struct brw_context *brw) { - dri_bo *bind_bo; + struct brw_winsys_buffer *bind_bo; assert(brw->wm.nr_surfaces <= BRW_WM_MAX_SURF); @@ -692,7 +670,6 @@ brw_wm_get_binding_table(struct brw_context *brw) static void prepare_wm_surfaces(struct brw_context *brw ) { - GLcontext *ctx = &brw->intel.ctx; GLuint i; int old_nr_surfaces; @@ -724,12 +701,12 @@ static void prepare_wm_surfaces(struct brw_context *brw ) brw_update_texture_surface(ctx, i); brw->wm.nr_surfaces = surf + 1; } else { - dri_bo_unreference(brw->wm.surf_bo[surf]); + brw->sws->bo_unreference(brw->wm.surf_bo[surf]); brw->wm.surf_bo[surf] = NULL; } } - dri_bo_unreference(brw->wm.bind_bo); + brw->sws->bo_unreference(brw->wm.bind_bo); brw->wm.bind_bo = brw_wm_get_binding_table(brw); if (brw->wm.nr_surfaces != old_nr_surfaces) diff --git a/src/gallium/drivers/i965/intel_batchbuffer.h b/src/gallium/drivers/i965/intel_batchbuffer.h index a595d2e0c5..be04656aec 100644 --- a/src/gallium/drivers/i965/intel_batchbuffer.h +++ b/src/gallium/drivers/i965/intel_batchbuffer.h @@ -1,9 +1,6 @@ #ifndef INTEL_BATCHBUFFER_H #define INTEL_BATCHBUFFER_H -#include "main/mtypes.h" - -#include "intel_context.h" #include "intel_bufmgr.h" #include "intel_reg.h" @@ -44,7 +41,7 @@ struct intel_batchbuffer { struct intel_context *intel; - dri_bo *buf; + struct brw_winsys_buffer *buf; GLubyte *buffer; @@ -89,7 +86,7 @@ void intel_batchbuffer_release_space(struct intel_batchbuffer *batch, GLuint bytes); GLboolean intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch, - dri_bo *buffer, + struct brw_winsys_buffer *buffer, uint32_t read_domains, uint32_t write_domain, uint32_t offset); diff --git a/src/gallium/drivers/i965/intel_tex_format.c b/src/gallium/drivers/i965/intel_tex_format.c index 3322a71130..c62ecdadf0 100644 --- a/src/gallium/drivers/i965/intel_tex_format.c +++ b/src/gallium/drivers/i965/intel_tex_format.c @@ -1,206 +1,9 @@ #include "intel_context.h" #include "intel_tex.h" #include "intel_chipset.h" -#include "main/texformat.h" -#include "main/enums.h" -/** - * Choose hardware texture format given the user's glTexImage parameters. - * - * It works out that this function is fine for all the supported - * hardware. However, there is still a need to map the formats onto - * hardware descriptors. - * - * Note that the i915 can actually support many more formats than - * these if we take the step of simply swizzling the colors - * immediately after sampling... - */ -const struct gl_texture_format * -intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat, - GLenum format, GLenum type) -{ - struct intel_context *intel = intel_context(ctx); - const GLboolean do32bpt = (intel->ctx.Visual.rgbBits >= 24); - -#if 0 - printf("%s intFmt=0x%x format=0x%x type=0x%x\n", - __FUNCTION__, internalFormat, format, type); -#endif - - switch (internalFormat) { - case 4: - case GL_RGBA: - case GL_COMPRESSED_RGBA: - if (format == GL_BGRA) { - if (type == GL_UNSIGNED_BYTE || type == GL_UNSIGNED_INT_8_8_8_8_REV) { - return &_mesa_texformat_argb8888; - } - else if (type == GL_UNSIGNED_SHORT_4_4_4_4_REV) { - return &_mesa_texformat_argb4444; - } - else if (type == GL_UNSIGNED_SHORT_1_5_5_5_REV) { - return &_mesa_texformat_argb1555; - } - } - return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_argb4444; - - case 3: - case GL_RGB: - case GL_COMPRESSED_RGB: - if (format == GL_RGB && type == GL_UNSIGNED_SHORT_5_6_5) { - return &_mesa_texformat_rgb565; - } - return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_rgb565; - - case GL_RGBA8: - case GL_RGB10_A2: - case GL_RGBA12: - case GL_RGBA16: - return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_argb4444; - - case GL_RGBA4: - case GL_RGBA2: - return &_mesa_texformat_argb4444; - - case GL_RGB5_A1: - return &_mesa_texformat_argb1555; - - case GL_RGB8: - case GL_RGB10: - case GL_RGB12: - case GL_RGB16: - return &_mesa_texformat_argb8888; - - case GL_RGB5: - case GL_RGB4: - case GL_R3_G3_B2: - return &_mesa_texformat_rgb565; - - case GL_ALPHA: - case GL_ALPHA4: - case GL_ALPHA8: - case GL_ALPHA12: - case GL_ALPHA16: - case GL_COMPRESSED_ALPHA: - return &_mesa_texformat_a8; - - case 1: - case GL_LUMINANCE: - case GL_LUMINANCE4: - case GL_LUMINANCE8: - case GL_LUMINANCE12: - case GL_LUMINANCE16: - case GL_COMPRESSED_LUMINANCE: - return &_mesa_texformat_l8; - - case 2: - case GL_LUMINANCE_ALPHA: - case GL_LUMINANCE4_ALPHA4: - case GL_LUMINANCE6_ALPHA2: - case GL_LUMINANCE8_ALPHA8: - case GL_LUMINANCE12_ALPHA4: - case GL_LUMINANCE12_ALPHA12: - case GL_LUMINANCE16_ALPHA16: - case GL_COMPRESSED_LUMINANCE_ALPHA: - return &_mesa_texformat_al88; - - case GL_INTENSITY: - case GL_INTENSITY4: - case GL_INTENSITY8: - case GL_INTENSITY12: - case GL_INTENSITY16: - case GL_COMPRESSED_INTENSITY: - return &_mesa_texformat_i8; - case GL_YCBCR_MESA: - if (type == GL_UNSIGNED_SHORT_8_8_MESA || type == GL_UNSIGNED_BYTE) - return &_mesa_texformat_ycbcr; - else - return &_mesa_texformat_ycbcr_rev; - - case GL_COMPRESSED_RGB_FXT1_3DFX: - return &_mesa_texformat_rgb_fxt1; - case GL_COMPRESSED_RGBA_FXT1_3DFX: - return &_mesa_texformat_rgba_fxt1; - - case GL_RGB_S3TC: - case GL_RGB4_S3TC: - case GL_COMPRESSED_RGB_S3TC_DXT1_EXT: - return &_mesa_texformat_rgb_dxt1; - - case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT: - return &_mesa_texformat_rgba_dxt1; - - case GL_RGBA_S3TC: - case GL_RGBA4_S3TC: - case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT: - return &_mesa_texformat_rgba_dxt3; - - case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT: - return &_mesa_texformat_rgba_dxt5; - - case GL_DEPTH_COMPONENT: - case GL_DEPTH_COMPONENT16: - case GL_DEPTH_COMPONENT24: - case GL_DEPTH_COMPONENT32: -#if 0 - return &_mesa_texformat_z16; -#else - /* fall-through. - * 16bpp depth texture can't be paired with a stencil buffer so - * always used combined depth/stencil format. - */ -#endif - case GL_DEPTH_STENCIL_EXT: - case GL_DEPTH24_STENCIL8_EXT: - return &_mesa_texformat_s8_z24; - -#ifndef I915 - case GL_SRGB_EXT: - case GL_SRGB8_EXT: - case GL_SRGB_ALPHA_EXT: - case GL_SRGB8_ALPHA8_EXT: - case GL_COMPRESSED_SRGB_EXT: - case GL_COMPRESSED_SRGB_ALPHA_EXT: - case GL_COMPRESSED_SLUMINANCE_EXT: - case GL_COMPRESSED_SLUMINANCE_ALPHA_EXT: - return &_mesa_texformat_sargb8; - case GL_SLUMINANCE_EXT: - case GL_SLUMINANCE8_EXT: - if (IS_G4X(intel->intelScreen->deviceID)) - return &_mesa_texformat_sl8; - else - return &_mesa_texformat_sargb8; - case GL_SLUMINANCE_ALPHA_EXT: - case GL_SLUMINANCE8_ALPHA8_EXT: - if (IS_G4X(intel->intelScreen->deviceID)) - return &_mesa_texformat_sla8; - else - return &_mesa_texformat_sargb8; - case GL_COMPRESSED_SRGB_S3TC_DXT1_EXT: - case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT: - case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT: - case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT: - return &_mesa_texformat_srgb_dxt1; - - /* i915 could also do this */ - case GL_DUDV_ATI: - case GL_DU8DV8_ATI: - return &_mesa_texformat_dudv8; - case GL_RGBA_SNORM: - case GL_RGBA8_SNORM: - return &_mesa_texformat_signed_rgba8888_rev; -#endif - - default: - fprintf(stderr, "unexpected texture format %s in %s\n", - _mesa_lookup_enum_by_nr(internalFormat), __FUNCTION__); - return NULL; - } - - return NULL; /* never get here */ -} int intel_compressed_num_bytes(GLuint mesaFormat) { diff --git a/src/gallium/drivers/i965/intel_tex_layout.c b/src/gallium/drivers/i965/intel_tex_layout.c index 7d69ea4484..1cdab49e5e 100644 --- a/src/gallium/drivers/i965/intel_tex_layout.c +++ b/src/gallium/drivers/i965/intel_tex_layout.c @@ -33,7 +33,6 @@ #include "intel_mipmap_tree.h" #include "intel_tex_layout.h" #include "intel_context.h" -#include "main/macros.h" void intel_get_texture_alignment_unit(GLenum internalFormat, GLuint *w, GLuint *h) { @@ -86,7 +85,7 @@ void i945_miptree_layout_2d( struct intel_context *intel, * constraints of mipmap placement push the right edge of the * 2nd mipmap out past the width of its parent. */ - if (mt->first_level != mt->last_level) { + if (mt->last_level) { GLuint mip1_width; if (mt->compressed) { @@ -108,7 +107,7 @@ void i945_miptree_layout_2d( struct intel_context *intel, mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->pitch); mt->total_height = 0; - for ( level = mt->first_level ; level <= mt->last_level ; level++ ) { + for ( level = 0 ; level <= mt->last_level ; level++ ) { GLuint img_height; intel_miptree_set_level_info(mt, level, 1, x, y, width, @@ -127,7 +126,7 @@ void i945_miptree_layout_2d( struct intel_context *intel, /* Layout_below: step right after second mipmap. */ - if (level == mt->first_level + 1) { + if (level == 1) { x += ALIGN(width, align_w); } else { -- cgit v1.2.3 From 09c231f84a20a306a173b60c82484ce1f9331edf Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Mon, 26 Oct 2009 00:20:33 +0000 Subject: i965g: still working on compilation --- src/gallium/auxiliary/tgsi/tgsi_scan.h | 3 + src/gallium/drivers/i965/Makefile | 9 +- src/gallium/drivers/i965/brw_batchbuffer.c | 14 +- src/gallium/drivers/i965/brw_context.h | 18 +- src/gallium/drivers/i965/brw_eu_emit.c | 4 +- src/gallium/drivers/i965/brw_pipe_fb.c | 2 +- src/gallium/drivers/i965/brw_pipe_flush.c | 9 +- src/gallium/drivers/i965/brw_pipe_query.c | 110 +++++++----- src/gallium/drivers/i965/brw_pipe_sampler.c | 81 +++++++++ src/gallium/drivers/i965/brw_screen_surface.c | 156 ++++++++++++++--- src/gallium/drivers/i965/brw_screen_texture.c | 218 ++++++++++++++++++++++++ src/gallium/drivers/i965/brw_sf.c | 80 ++++----- src/gallium/drivers/i965/brw_sf.h | 13 +- src/gallium/drivers/i965/brw_sf_emit.c | 145 +++++++++------- src/gallium/drivers/i965/brw_sf_state.c | 178 +++++++++---------- src/gallium/drivers/i965/brw_state.h | 13 +- src/gallium/drivers/i965/brw_state_batch.c | 8 +- src/gallium/drivers/i965/brw_state_cache.c | 64 ++++--- src/gallium/drivers/i965/brw_state_debug.c | 19 ++- src/gallium/drivers/i965/brw_state_dump.c | 64 +++---- src/gallium/drivers/i965/brw_state_upload.c | 37 ++-- src/gallium/drivers/i965/brw_tex.c | 50 ------ src/gallium/drivers/i965/brw_tex_layout.c | 218 ------------------------ src/gallium/drivers/i965/brw_urb.c | 10 +- src/gallium/drivers/i965/brw_vs.h | 2 +- src/gallium/drivers/i965/brw_vs_emit.c | 20 +-- src/gallium/drivers/i965/brw_vs_state.c | 4 +- src/gallium/drivers/i965/brw_winsys.h | 18 +- src/gallium/drivers/i965/brw_wm.c | 4 +- src/gallium/drivers/i965/brw_wm.h | 36 ++-- src/gallium/drivers/i965/brw_wm_debug.c | 68 ++++---- src/gallium/drivers/i965/brw_wm_emit.c | 8 +- src/gallium/drivers/i965/brw_wm_fp.c | 18 +- src/gallium/drivers/i965/brw_wm_glsl.c | 16 +- src/gallium/drivers/i965/brw_wm_pass0.c | 6 +- src/gallium/drivers/i965/brw_wm_pass1.c | 2 +- src/gallium/drivers/i965/brw_wm_pass2.c | 4 +- src/gallium/drivers/i965/brw_wm_sampler_state.c | 170 ++++-------------- src/gallium/drivers/i965/brw_wm_state.c | 6 +- 39 files changed, 1007 insertions(+), 898 deletions(-) create mode 100644 src/gallium/drivers/i965/brw_screen_texture.c delete mode 100644 src/gallium/drivers/i965/brw_tex.c delete mode 100644 src/gallium/drivers/i965/brw_tex_layout.c (limited to 'src/gallium/drivers/i965/brw_vs_state.c') diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.h b/src/gallium/auxiliary/tgsi/tgsi_scan.h index 8a7ee0c7e4..6754001e88 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_scan.h +++ b/src/gallium/auxiliary/tgsi/tgsi_scan.h @@ -61,6 +61,9 @@ struct tgsi_shader_info boolean uses_kill; /**< KIL or KILP instruction used? */ boolean uses_fogcoord; /**< fragment shader uses fog coord? */ boolean uses_frontfacing; /**< fragment shader uses front/back-face flag? */ + + uint texture_max; + uint texture_mask; }; diff --git a/src/gallium/drivers/i965/Makefile b/src/gallium/drivers/i965/Makefile index 40e8aa8786..c3dbad72ae 100644 --- a/src/gallium/drivers/i965/Makefile +++ b/src/gallium/drivers/i965/Makefile @@ -28,10 +28,7 @@ C_SOURCES = \ brw_pipe_blend.c \ brw_pipe_depth.c \ brw_pipe_fb.c \ - brw_pipe_flush.c \ brw_pipe_query.c \ - brw_pipe_shader.c \ - brw_screen_surface.c \ brw_sf.c \ brw_sf_emit.c \ brw_sf_state.c \ @@ -40,8 +37,6 @@ C_SOURCES = \ brw_state_dump.c \ brw_state_upload.c \ brw_swtnl.c \ - brw_tex.c \ - brw_tex_layout.c \ brw_urb.c \ brw_util.c \ brw_vs.c \ @@ -60,8 +55,12 @@ C_SOURCES = \ brw_wm_sampler_state.c \ brw_wm_state.c \ brw_wm_surface_state.c \ + brw_screen_surface.c \ + brw_screen_texture.c \ brw_bo.c \ brw_batchbuffer.c \ + brw_pipe_shader.c \ + brw_pipe_flush.c \ intel_tex_layout.c include ../../Makefile.template diff --git a/src/gallium/drivers/i965/brw_batchbuffer.c b/src/gallium/drivers/i965/brw_batchbuffer.c index 8bcac76ede..45fbd59273 100644 --- a/src/gallium/drivers/i965/brw_batchbuffer.c +++ b/src/gallium/drivers/i965/brw_batchbuffer.c @@ -105,13 +105,13 @@ _brw_batchbuffer_flush(struct brw_batchbuffer *batch, const char *file, } - if (INTEL_DEBUG & DEBUG_BATCH) - fprintf(stderr, "%s:%d: Batchbuffer flush with %db used\n", file, line, + if (BRW_DEBUG & DEBUG_BATCH) + debug_printf("%s:%d: Batchbuffer flush with %db used\n", file, line, used); /* Emit a flush if the bufmgr doesn't do it for us. */ if (intel->always_flush_cache || !intel->ttm) { - *(GLuint *) (batch->ptr) = intel->vtbl.flush_cmd(); + *(GLuint *) (batch->ptr) = ((CMD_MI_FLUSH << 16) | BRW_FLUSH_STATE_CACHE); batch->ptr += 4; used = batch->ptr - batch->map; } @@ -136,15 +136,15 @@ _brw_batchbuffer_flush(struct brw_batchbuffer *batch, const char *file, batch->sws->bo_exec(batch->buf, used, NULL, 0, 0 ); - if (INTEL_DEBUG & DEBUG_BATCH) { + if (BRW_DEBUG & DEBUG_BATCH) { dri_bo_map(batch->buf, GL_FALSE); intel_decode(batch->buf->virtual, used / 4, batch->buf->offset, brw->brw_screen->pci_id); dri_bo_unmap(batch->buf); } - if (INTEL_DEBUG & DEBUG_SYNC) { - fprintf(stderr, "waiting for idle\n"); + if (BRW_DEBUG & DEBUG_SYNC) { + debug_printf("waiting for idle\n"); dri_bo_map(batch->buf, GL_TRUE); dri_bo_unmap(batch->buf); } @@ -166,7 +166,7 @@ brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch, int ret; if (batch->ptr - batch->map > batch->buf->size) - _mesa_printf ("bad relocation ptr %p map %p offset %d size %d\n", + debug_printf ("bad relocation ptr %p map %p offset %d size %d\n", batch->ptr, batch->map, batch->ptr - batch->map, batch->buf->size); ret = batch->sws->bo_emit_reloc(batch->buf, diff --git a/src/gallium/drivers/i965/brw_context.h b/src/gallium/drivers/i965/brw_context.h index df43d8ba4d..10c1cf6f33 100644 --- a/src/gallium/drivers/i965/brw_context.h +++ b/src/gallium/drivers/i965/brw_context.h @@ -190,6 +190,8 @@ struct brw_fragment_shader { #define PIPE_NEW_FRAMEBUFFER_DIMENSIONS 0x10000 #define PIPE_NEW_DEPTH_BUFFER 0x20000 #define PIPE_NEW_COLOR_BUFFERS 0x40000 +#define PIPE_NEW_QUERY 0x80000 +#define PIPE_NEW_SCISSOR 0x100000 @@ -204,7 +206,7 @@ struct brw_fragment_shader { #define BRW_NEW_WM_INPUT_DIMENSIONS 0x100 #define BRW_NEW_PSP 0x800 #define BRW_NEW_WM_SURFACES 0x1000 -#define BRW_NEW_FENCE 0x2000 +#define BRW_NEW_xxx 0x2000 /* was FENCE */ #define BRW_NEW_INDICES 0x4000 #define BRW_NEW_VERTICES 0x8000 /** @@ -373,6 +375,7 @@ struct brw_cache_item { struct brw_cache { struct brw_context *brw; + struct brw_winsys_screen *sws; struct brw_cache_item **items; GLuint size, n_items; @@ -380,6 +383,7 @@ struct brw_cache { GLuint key_size[BRW_MAX_CACHE]; /* for fixed-size keys */ GLuint aux_size[BRW_MAX_CACHE]; char *name[BRW_MAX_CACHE]; + /* Record of the last BOs chosen for each cache_id. Used to set * brw->state.dirty.cache when a new cache item is chosen. @@ -448,7 +452,7 @@ struct brw_query_object { int last_index; /* Total count of pixels from previous BOs */ - unsigned int count; + uint64_t result; }; @@ -477,11 +481,18 @@ struct brw_context const struct brw_rasterizer_state *rast; const struct brw_depth_stencil_state *zstencil; + const struct pipe_texture *texture[PIPE_MAX_SAMPLERS]; + const struct pipe_sampler *sampler[PIPE_MAX_SAMPLERS]; + unsigned num_textures; + unsigned num_samplers; + + struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS]; struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; unsigned num_vertex_elements; unsigned num_vertex_buffers; + struct pipe_scissor_state scissor; struct pipe_framebuffer_state fb; struct pipe_viewport_state vp; struct pipe_clip_state ucp; @@ -492,6 +503,8 @@ struct brw_context struct brw_blend_constant_color bcc; struct brw_polygon_stipple bps; + + /** * Index buffer for this draw_prims call. * @@ -688,6 +701,7 @@ struct brw_context struct brw_winsys_buffer *bo; int index; GLboolean active; + int stats_wm; } query; struct { diff --git a/src/gallium/drivers/i965/brw_eu_emit.c b/src/gallium/drivers/i965/brw_eu_emit.c index f6b8843e01..f7fa520348 100644 --- a/src/gallium/drivers/i965/brw_eu_emit.c +++ b/src/gallium/drivers/i965/brw_eu_emit.c @@ -1262,7 +1262,7 @@ void brw_SAMPLE(struct brw_compile *p, GLboolean need_stall = 0; if (writemask == 0) { - /*_mesa_printf("%s: zero writemask??\n", __FUNCTION__); */ + /*debug_printf("%s: zero writemask??\n", __FUNCTION__); */ return; } @@ -1294,7 +1294,7 @@ void brw_SAMPLE(struct brw_compile *p, if (newmask != writemask) { need_stall = 1; - /* _mesa_printf("need stall %x %x\n", newmask , writemask); */ + /* debug_printf("need stall %x %x\n", newmask , writemask); */ } else { struct brw_reg m1 = brw_message_reg(msg_reg_nr); diff --git a/src/gallium/drivers/i965/brw_pipe_fb.c b/src/gallium/drivers/i965/brw_pipe_fb.c index 6391717227..c65f9bc374 100644 --- a/src/gallium/drivers/i965/brw_pipe_fb.c +++ b/src/gallium/drivers/i965/brw_pipe_fb.c @@ -53,7 +53,7 @@ static void brw_set_viewport_state( struct pipe_context *pipe, void brw_pipe_framebuffer_init( struct brw_context *brw ) { brw->base.set_framebuffer_state = brw_set_framebuffer_state; - brw->base.set_framebuffer_state = brw_set_framebuffer_state; + brw->base.set_viewport_state = brw_set_viewport_state; } void brw_pipe_framebuffer_cleanup( struct brw_context *brw ) diff --git a/src/gallium/drivers/i965/brw_pipe_flush.c b/src/gallium/drivers/i965/brw_pipe_flush.c index 65e7151517..fb4a784de9 100644 --- a/src/gallium/drivers/i965/brw_pipe_flush.c +++ b/src/gallium/drivers/i965/brw_pipe_flush.c @@ -52,14 +52,7 @@ static void brw_note_fence( struct brw_context *brw, GLuint fence ) */ static GLuint brw_flush_cmd( void ) { - struct brw_mi_flush flush; - - return ; - - flush.opcode = CMD_MI_FLUSH; - flush.pad = 0; - flush.flags = BRW_FLUSH_STATE_CACHE; - return *(GLuint *)&flush; + return ((CMD_MI_FLUSH << 16) | BRW_FLUSH_STATE_CACHE); } diff --git a/src/gallium/drivers/i965/brw_pipe_query.c b/src/gallium/drivers/i965/brw_pipe_query.c index a2da1373bf..18a9b71af0 100644 --- a/src/gallium/drivers/i965/brw_pipe_query.c +++ b/src/gallium/drivers/i965/brw_pipe_query.c @@ -46,25 +46,38 @@ #include "brw_reg.h" /** Waits on the query object's BO and totals the results for this query */ -static void -brw_queryobj_get_results(struct brw_query_object *query) +static boolean +brw_query_get_result(struct pipe_context *pipe, + struct pipe_query *q, + boolean wait, + uint64_t *result) { - int i; - uint64_t *results; - - if (query->bo == NULL) - return; + struct brw_context *brw = brw_context(pipe); + struct brw_query_object *query = (struct brw_query_object *)q; /* Map and count the pixels from the current query BO */ - dri_bo_map(query->bo, GL_FALSE); - results = query->bo->virtual; - for (i = query->first_index; i <= query->last_index; i++) { - query->Base.Result += results[i * 2 + 1] - results[i * 2]; + if (query->bo) { + int i; + uint64_t *map; + + if (brw->sws->bo_is_busy(query->bo) && !wait) + return FALSE; + + map = brw->sws->bo_map(query->bo, GL_FALSE); + if (map == NULL) + return FALSE; + + for (i = query->first_index; i <= query->last_index; i++) { + query->result += map[i * 2 + 1] - map[i * 2]; + } + + brw->sws->bo_unmap(query->bo); + brw->sws->bo_unreference(query->bo); + query->bo = NULL; } - dri_bo_unmap(query->bo); - brw->sws->bo_unreference(query->bo); - query->bo = NULL; + *result = query->result; + return TRUE; } static struct pipe_query * @@ -72,12 +85,12 @@ brw_query_create(struct pipe_context *pipe, unsigned type ) { struct brw_query_object *query; - switch (query->type) { + switch (type) { case PIPE_QUERY_OCCLUSION_COUNTER: query = CALLOC_STRUCT( brw_query_object ); if (query == NULL) return NULL; - return &query->Base; + return (struct pipe_query *)query; default: return NULL; @@ -87,6 +100,7 @@ brw_query_create(struct pipe_context *pipe, unsigned type ) static void brw_query_destroy(struct pipe_context *pipe, struct pipe_query *q) { + struct brw_context *brw = brw_context(pipe); struct brw_query_object *query = (struct brw_query_object *)q; brw->sws->bo_unreference(query->bo); @@ -94,24 +108,25 @@ brw_query_destroy(struct pipe_context *pipe, struct pipe_query *q) } static void -brw_begin_query(struct pipe_context *pipe, struct pipe_query *q) +brw_query_begin(struct pipe_context *pipe, struct pipe_query *q) { struct brw_context *brw = brw_context(pipe); struct brw_query_object *query = (struct brw_query_object *)q; /* Reset our driver's tracking of query state. */ brw->sws->bo_unreference(query->bo); + query->result = 0; query->bo = NULL; query->first_index = -1; query->last_index = -1; insert_at_head(&brw->query.active_head, query); - brw->stats_wm++; - brw->dirty.mesa |= PIPE_NEW_QUERY; + brw->query.stats_wm++; + brw->state.dirty.mesa |= PIPE_NEW_QUERY; } static void -brw_end_query(struct pipe_context *pipe, struct pipe_query *q) +brw_query_end(struct pipe_context *pipe, struct pipe_query *q) { struct brw_context *brw = brw_context(pipe); struct brw_query_object *query = (struct brw_query_object *)q; @@ -129,27 +144,13 @@ brw_end_query(struct pipe_context *pipe, struct pipe_query *q) } remove_from_list(query); - brw->stats_wm--; - brw->dirty.mesa |= PIPE_NEW_QUERY; + brw->query.stats_wm--; + brw->state.dirty.mesa |= PIPE_NEW_QUERY; } -static void brw_wait_query(struct pipe_context *pipe, struct pipe_query *q) -{ - struct brw_query_object *query = (struct brw_query_object *)q; - - brw_queryobj_get_results(query); - query->Base.Ready = GL_TRUE; -} - -static void brw_check_query(struct pipe_context *pipe, struct pipe_query *q) -{ - struct brw_query_object *query = (struct brw_query_object *)q; - - if (query->bo == NULL || !drm_intel_bo_busy(query->bo)) { - brw_queryobj_get_results(query); - query->Base.Ready = GL_TRUE; - } -} +/*********************************************************************** + * Internal functions and callbacks to implement queries + */ /** Called to set up the query BO and account for its aperture space */ void @@ -201,8 +202,17 @@ brw_emit_query_begin(struct brw_context *brw) foreach(query, &brw->query.active_head) { if (query->bo != brw->query.bo) { + uint64_t tmp; + + /* Propogate the results from this buffer to all of the + * active queries, as the bo is going away. + */ if (query->bo != NULL) - brw_queryobj_get_results(query); + brw_query_get_result( &brw->base, + (struct pipe_query *)query, + FALSE, + &tmp ); + brw->sws->bo_reference(brw->query.bo); query->bo = brw->query.bo; query->first_index = brw->query.index; @@ -235,12 +245,18 @@ brw_emit_query_end(struct brw_context *brw) brw->query.index++; } -void brw_init_queryobj_functions(struct dd_function_table *functions) +void brw_pipe_query_init( struct brw_context *brw ) { - functions->NewQueryObject = brw_new_query_object; - functions->DeleteQuery = brw_delete_query; - functions->BeginQuery = brw_begin_query; - functions->EndQuery = brw_end_query; - functions->CheckQuery = brw_check_query; - functions->WaitQuery = brw_wait_query; + brw->base.create_query = brw_query_create; + brw->base.destroy_query = brw_query_destroy; + brw->base.begin_query = brw_query_begin; + brw->base.end_query = brw_query_end; + brw->base.get_query_result = brw_query_get_result; +} + + +void brw_pipe_query_cleanup( struct brw_context *brw ) +{ + /* Unreference brw->query.bo ?? + */ } diff --git a/src/gallium/drivers/i965/brw_pipe_sampler.c b/src/gallium/drivers/i965/brw_pipe_sampler.c index b3069f08c0..bc20eef6fb 100644 --- a/src/gallium/drivers/i965/brw_pipe_sampler.c +++ b/src/gallium/drivers/i965/brw_pipe_sampler.c @@ -14,6 +14,87 @@ static void *brw_create_sampler_state( struct pipe_context *pipe, { struct brw_sampler_state *sampler = CALLOC_STRUCT(brw_sampler_state); + switch (key->minfilter) { + case GL_NEAREST: + sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST; + sampler->ss0.mip_filter = BRW_MIPFILTER_NONE; + break; + case GL_LINEAR: + sampler->ss0.min_filter = BRW_MAPFILTER_LINEAR; + sampler->ss0.mip_filter = BRW_MIPFILTER_NONE; + break; + case GL_NEAREST_MIPMAP_NEAREST: + sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST; + sampler->ss0.mip_filter = BRW_MIPFILTER_NEAREST; + break; + case GL_LINEAR_MIPMAP_NEAREST: + sampler->ss0.min_filter = BRW_MAPFILTER_LINEAR; + sampler->ss0.mip_filter = BRW_MIPFILTER_NEAREST; + break; + case GL_NEAREST_MIPMAP_LINEAR: + sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST; + sampler->ss0.mip_filter = BRW_MIPFILTER_LINEAR; + break; + case GL_LINEAR_MIPMAP_LINEAR: + sampler->ss0.min_filter = BRW_MAPFILTER_LINEAR; + sampler->ss0.mip_filter = BRW_MIPFILTER_LINEAR; + break; + default: + break; + } + + /* Set Anisotropy: + */ + if (key->max_aniso > 1.0) { + sampler->ss0.min_filter = BRW_MAPFILTER_ANISOTROPIC; + sampler->ss0.mag_filter = BRW_MAPFILTER_ANISOTROPIC; + + if (key->max_aniso > 2.0) { + sampler->ss3.max_aniso = MIN2((key->max_aniso - 2) / 2, + BRW_ANISORATIO_16); + } + } + else { + switch (key->magfilter) { + case GL_NEAREST: + sampler->ss0.mag_filter = BRW_MAPFILTER_NEAREST; + break; + case GL_LINEAR: + sampler->ss0.mag_filter = BRW_MAPFILTER_LINEAR; + break; + default: + break; + } + } + + sampler->ss1.r_wrap_mode = translate_wrap_mode(key->wrap_r); + sampler->ss1.s_wrap_mode = translate_wrap_mode(key->wrap_s); + sampler->ss1.t_wrap_mode = translate_wrap_mode(key->wrap_t); + + /* Set LOD bias: + */ + sampler->ss0.lod_bias = S_FIXED(CLAMP(key->lod_bias, -16, 15), 6); + + sampler->ss0.lod_preclamp = 1; /* OpenGL mode */ + sampler->ss0.default_color_mode = 0; /* OpenGL/DX10 mode */ + + /* Set shadow function: + */ + if (key->comparemode == GL_COMPARE_R_TO_TEXTURE_ARB) { + /* Shadowing is "enabled" by emitting a particular sampler + * message (sample_c). So need to recompile WM program when + * shadow comparison is enabled on each/any texture unit. + */ + sampler->ss0.shadow_function = + intel_translate_shadow_compare_func(key->comparefunc); + } + + /* Set BaseMipLevel, MaxLOD, MinLOD: + */ + sampler->ss0.base_level = U_FIXED(0, 1); + + sampler->ss1.max_lod = U_FIXED(MIN2(MAX2(key->maxlod, 0), 13), 6); + sampler->ss1.min_lod = U_FIXED(MIN2(MAX2(key->minlod, 0), 13), 6); return (void *)sampler; } diff --git a/src/gallium/drivers/i965/brw_screen_surface.c b/src/gallium/drivers/i965/brw_screen_surface.c index 544be6a089..e0df6cc629 100644 --- a/src/gallium/drivers/i965/brw_screen_surface.c +++ b/src/gallium/drivers/i965/brw_screen_surface.c @@ -1,27 +1,131 @@ - /* _NEW_BUFFERS */ - if (IS_965(brw->brw_screen->pci_id) && - !IS_G4X(brw->brw_screen->pci_id)) { - for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) { - struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[i]; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); - - /* The original gen4 hardware couldn't set up WM surfaces pointing - * at an offset within a tile, which can happen when rendering to - * anything but the base level of a texture or the +X face/0 depth. - * This was fixed with the 4 Series hardware. - * - * For these original chips, you would have to make the depth and - * color destination surfaces include information on the texture - * type, LOD, face, and various limits to use them as a destination. - * I would have done this, but there's also a nasty requirement that - * the depth and the color surfaces all be of the same LOD, which - * may be a worse requirement than this alignment. (Also, we may - * want to just demote the texture to untiled, instead). - */ - if (irb->region && - irb->region->tiling != I915_TILING_NONE && - (irb->region->draw_offset & 4095)) { - DBG("FALLBACK: non-tile-aligned destination for tiled FBO\n"); - return GL_TRUE; - } + +#include "pipe/p_screen.h" +#include "brw_screen.h" + +struct brw_surface_id { + unsigned face:3; + unsigned zslice:13; + unsigned level:16; +}; + +static boolean need_linear_view( struct brw_screen *brw_screen, + struct brw_texture *brw_texture, + unsigned face, + unsigned level, + unsigned zslice ) +{ +#if 0 + /* XXX: what about IDGNG? + */ + if (!BRW_IS_G4X(brw->brw_screen->pci_id)) + { + struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[i]; + struct intel_renderbuffer *irb = intel_renderbuffer(rb); + + /* The original gen4 hardware couldn't set up WM surfaces pointing + * at an offset within a tile, which can happen when rendering to + * anything but the base level of a texture or the +X face/0 depth. + * This was fixed with the 4 Series hardware. + * + * For these original chips, you would have to make the depth and + * color destination surfaces include information on the texture + * type, LOD, face, and various limits to use them as a destination. + * + * This is easy in Gallium as surfaces are all backed by + * textures, but there's also a nasty requirement that the depth + * and the color surfaces all be of the same LOD, which is + * harder to get around as we can't look at a surface in + * isolation and decide if it's legal. + * + * Instead, end up being pessimistic and say that for i965, + * ... ?? + */ + if (brw_tex->tiling != I915_TILING_NONE && + (brw_tex_image_offset(brw_tex, face, level, zslize) & 4095)) { + if (BRW_DEBUG & DEBUG_VIEW) + debug_printf("%s: need surface view for non-aligned tex image\n", + __FUNCTION__); + return GL_TRUE; } + } +#endif + + /* Tiled 3d textures don't have subsets that look like 2d surfaces: + */ + + /* Everything else should be fine to render to in-place: + */ + return GL_FALSE; +} + +/* Look at all texture views and figure out if any of them need to be + * back-copied into the texture for sampling + */ +void brw_update_texture( struct pipe_screen *screen, + struct pipe_texture *texture ) +{ + /* currently nothing to do */ +} + + +static struct pipe_surface *create_linear_view( struct brw_screen *brw_screen, + struct brw_texture *brw_tex, + struct brw_surface_id id ) +{ + +} + +static struct pipe_surface *create_in_place_view( struct brw_screen *brw_screen, + struct brw_texture *brw_tex, + struct brw_surface_id id ) +{ + struct brw_surface *surface = CALLOC_STRUCT(brw_surface); + surface->id = id; + +} + +/* Get a surface which is view into a texture + */ +struct pipe_surface *brw_get_tex_surface(struct pipe_screen *screen, + struct pipe_texture *texture, + unsigned face, unsigned level, + unsigned zslice, + unsigned usage ) +{ + struct brw_screen *bscreen = brw_screen(screen); + struct brw_surface_id id; + + id.face = face; + id.level = level; + id.zslice = zslice; + + if (need_linear_view(brw_screen, brw_tex, id)) + type = BRW_VIEW_LINEAR; + else + type = BRW_VIEW_IN_PLACE; + + + foreach (surface, texture->views[type]) { + if (id.value == surface->id.value) + return surface; + } + + switch (type) { + case BRW_VIEW_LINEAR: + surface = create_linear_view( texture, id, type ); + break; + case BRW_VIEW_IN_PLACE: + surface = create_in_place_view( texture, id, type ); + break; + default: + return NULL; + } + + insert_at_head( texture->views[type], surface ); + return surface; +} + + +void brw_tex_surface_destroy( struct pipe_surface *surface ) +{ +} diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c new file mode 100644 index 0000000000..50c30878c6 --- /dev/null +++ b/src/gallium/drivers/i965/brw_screen_texture.c @@ -0,0 +1,218 @@ +/* + Copyright (C) Intel Corp. 2006. All Rights Reserved. + Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to + develop this 3D driver. + + Permission is hereby granted, free of charge, to any person obtaining + a copy of this software and associated documentation files (the + "Software"), to deal in the Software without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sublicense, and/or sell copies of the Software, and to + permit persons to whom the Software is furnished to do so, subject to + the following conditions: + + The above copyright notice and this permission notice (including the + next paragraph) shall be included in all copies or substantial + portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + **********************************************************************/ + /* + * Authors: + * Keith Whitwell + */ + +/* Code to layout images in a mipmap tree for i965. + */ + +#include "brw_tex_layout.h" + +#define FILE_DEBUG_FLAG DEBUG_MIPTREE + +GLboolean brw_miptree_layout(struct brw_context *brw, + struct intel_mipmap_tree *mt, + uint32_t tiling) +{ + /* XXX: these vary depending on image format: */ + /* GLint align_w = 4; */ + + switch (mt->target) { + case GL_TEXTURE_CUBE_MAP: + if (IS_IGDNG(brw->brw_screen->pci_id)) { + GLuint align_h = 2, align_w = 4; + GLuint level; + GLuint x = 0; + GLuint y = 0; + GLuint width = mt->width0; + GLuint height = mt->height0; + GLuint qpitch = 0; + GLuint y_pitch = 0; + + mt->pitch = mt->width0; + intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h); + y_pitch = ALIGN(height, align_h); + + if (mt->compressed) { + mt->pitch = ALIGN(mt->width0, align_w); + } + + if (mt->last_level != 0) { + GLuint mip1_width; + + if (mt->compressed) { + mip1_width = ALIGN(minify(mt->width0), align_w) + + ALIGN(minify(minify(mt->width0)), align_w); + } else { + mip1_width = ALIGN(minify(mt->width0), align_w) + + minify(minify(mt->width0)); + } + + if (mip1_width > mt->pitch) { + mt->pitch = mip1_width; + } + } + + mt->pitch = intel_miptree_pitch_align(intel, mt, tiling, mt->pitch); + + if (mt->compressed) { + qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4 * mt->pitch * mt->cpp; + mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4 * 6; + } else { + qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) * mt->pitch * mt->cpp; + mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) * 6; + } + + for (level = 0; level <= mt->last_level; level++) { + GLuint img_height; + GLuint nr_images = 6; + GLuint q = 0; + + intel_miptree_set_level_info(mt, level, nr_images, x, y, width, + height, 1); + + for (q = 0; q < nr_images; q++) + intel_miptree_set_image_offset_ex(mt, level, q, x, y, q * qpitch); + + if (mt->compressed) + img_height = MAX2(1, height/4); + else + img_height = ALIGN(height, align_h); + + if (level == 1) { + x += ALIGN(width, align_w); + } + else { + y += img_height; + } + + width = minify(width); + height = minify(height); + } + + break; + } + + case GL_TEXTURE_3D: { + GLuint width = mt->width0; + GLuint height = mt->height0; + GLuint depth = mt->depth0; + GLuint pack_x_pitch, pack_x_nr; + GLuint pack_y_pitch; + GLuint level; + GLuint align_h = 2; + GLuint align_w = 4; + + mt->total_height = 0; + intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h); + + if (mt->compressed) { + mt->pitch = ALIGN(width, align_w); + pack_y_pitch = (height + 3) / 4; + } else { + mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0); + pack_y_pitch = ALIGN(mt->height0, align_h); + } + + pack_x_pitch = width; + pack_x_nr = 1; + + for (level = 0 ; level <= mt->last_level ; level++) { + GLuint nr_images = mt->target == GL_TEXTURE_3D ? depth : 6; + GLint x = 0; + GLint y = 0; + GLint q, j; + + intel_miptree_set_level_info(mt, level, nr_images, + 0, mt->total_height, + width, height, depth); + + for (q = 0; q < nr_images;) { + for (j = 0; j < pack_x_nr && q < nr_images; j++, q++) { + intel_miptree_set_image_offset(mt, level, q, x, y); + x += pack_x_pitch; + } + + x = 0; + y += pack_y_pitch; + } + + + mt->total_height += y; + width = minify(width); + height = minify(height); + depth = minify(depth); + + if (mt->compressed) { + pack_y_pitch = (height + 3) / 4; + + if (pack_x_pitch > ALIGN(width, align_w)) { + pack_x_pitch = ALIGN(width, align_w); + pack_x_nr <<= 1; + } + } else { + if (pack_x_pitch > 4) { + pack_x_pitch >>= 1; + pack_x_nr <<= 1; + assert(pack_x_pitch * pack_x_nr <= mt->pitch); + } + + if (pack_y_pitch > 2) { + pack_y_pitch >>= 1; + pack_y_pitch = ALIGN(pack_y_pitch, align_h); + } + } + + } + /* The 965's sampler lays cachelines out according to how accesses + * in the texture surfaces run, so they may be "vertical" through + * memory. As a result, the docs say in Surface Padding Requirements: + * Sampling Engine Surfaces that two extra rows of padding are required. + * We don't know of similar requirements for pre-965, but given that + * those docs are silent on padding requirements in general, let's play + * it safe. + */ + if (mt->target == GL_TEXTURE_CUBE_MAP) + mt->total_height += 2; + break; + } + + default: + i945_miptree_layout_2d(intel, mt, tiling); + break; + } + DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__, + mt->pitch, + mt->total_height, + mt->cpp, + mt->pitch * mt->total_height * mt->cpp ); + + return GL_TRUE; +} + diff --git a/src/gallium/drivers/i965/brw_sf.c b/src/gallium/drivers/i965/brw_sf.c index 1b73b3fd51..013d839e37 100644 --- a/src/gallium/drivers/i965/brw_sf.c +++ b/src/gallium/drivers/i965/brw_sf.c @@ -29,11 +29,12 @@ * Keith Whitwell */ +#include "pipe/p_state.h" #include "brw_batchbuffer.h" - #include "brw_defines.h" #include "brw_context.h" +#include "brw_pipe_rast.h" #include "brw_eu.h" #include "brw_util.h" #include "brw_sf.h" @@ -45,7 +46,6 @@ static void compile_sf_prog( struct brw_context *brw, struct brw_sf_compile c; const GLuint *program; GLuint program_size; - GLuint i, idx; memset(&c, 0, sizeof(c)); @@ -54,7 +54,7 @@ static void compile_sf_prog( struct brw_context *brw, brw_init_compile(brw, &c.func); c.key = *key; - c.nr_attrs = util_count_bits(c.key.attrs); + c.nr_attrs = c.key.nr_attrs; c.nr_attr_regs = (c.nr_attrs+1)/2; c.nr_setup_attrs = c.key.nr_attrs; c.nr_setup_regs = (c.nr_setup_attrs+1)/2; @@ -62,21 +62,6 @@ static void compile_sf_prog( struct brw_context *brw, c.prog_data.urb_read_length = c.nr_attr_regs; c.prog_data.urb_entry_size = c.nr_setup_regs * 2; - /* Construct map from attribute number to position in the vertex. - */ - for (i = idx = 0; i < VERT_RESULT_MAX; i++) - if (c.key.attrs & (1<= VERT_RESULT_TEX0 && i <= VERT_RESULT_TEX7) { - c.point_attrs[i].CoordReplace = - ctx->Point.CoordReplace[i - VERT_RESULT_TEX0]; - } - else { - c.point_attrs[i].CoordReplace = GL_FALSE; - } - idx++; - } /* Which primitive? Or all three? */ @@ -122,7 +107,7 @@ static void compile_sf_prog( struct brw_context *brw, /* Calculate interpolants for triangle and line rasterization. */ -static void upload_sf_prog(struct brw_context *brw) +static int upload_sf_prog(struct brw_context *brw) { struct brw_sf_prog_key key; @@ -131,46 +116,49 @@ static void upload_sf_prog(struct brw_context *brw) /* Populate the key, noting state dependencies: */ /* CACHE_NEW_VS_PROG */ - key.attrs = brw->vs.prog_data->nr_outputs_written; + key.nr_attrs = brw->curr.vertex_shader->info.file_max[TGSI_FILE_OUTPUT] + 1; + + + /* XXX: this is probably where the mapping between vertex shader + * outputs and fragment shader inputs should be handled. Assume + * for now 1:1 correspondance. + * + * XXX: scan frag shader inputs to work out linear vs. perspective + * interpolation below. + * + * XXX: as long as we're hard-wiring, is eg. position required to + * be linear? + */ + key.linear_attrs = 0; + key.persp_attrs = (1 << key.nr_attrs) - 1; /* BRW_NEW_REDUCED_PRIMITIVE */ switch (brw->reduced_primitive) { - case GL_TRIANGLES: - /* NOTE: We just use the edgeflag attribute as an indicator that - * unfilled triangles are active. We don't actually do the - * edgeflag testing here, it is already done in the clip - * program. + case PIPE_PRIM_TRIANGLES: + /* PIPE_NEW_RAST */ - if (key.attrs & (1<curr.rast->templ.fill_cw != PIPE_POLYGON_MODE_FILL || + brw->curr.rast->templ.fill_ccw != PIPE_POLYGON_MODE_FILL) key.primitive = SF_UNFILLED_TRIS; else key.primitive = SF_TRIANGLES; break; - case GL_LINES: + case PIPE_PRIM_LINES: key.primitive = SF_LINES; break; - case GL_POINTS: + case PIPE_PRIM_POINTS: key.primitive = SF_POINTS; break; } - key.do_point_sprite = ctx->Point.PointSprite; - key.SpriteOrigin = ctx->Point.SpriteOrigin; - /* _NEW_LIGHT */ - key.do_flat_shading = (ctx->Light.ShadeModel == GL_FLAT); - key.do_twoside_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide); + key.do_point_sprite = brw->curr.rast->templ.point_sprite; + key.sprite_origin_lower_left = 0; /* XXX: ctx->Point.SpriteOrigin - fix rast state */ + key.do_flat_shading = brw->curr.rast->templ.flatshade; + key.do_twoside_color = brw->curr.rast->templ.light_twoside; - /* _NEW_HINT */ - key.linear_color = 0; - - /* _NEW_POLYGON */ if (key.do_twoside_color) { - /* If we're rendering to a FBO, we have to invert the polygon - * face orientation, just as we invert the viewport in - * sf_unit_create_from_key(). ctx->DrawBuffer->Name will be - * nonzero if we're rendering to such an FBO. - */ - key.frontface_ccw = (ctx->Polygon.FrontFace == GL_CCW) ^ (ctx->DrawBuffer->Name != 0); + key.frontface_ccw = (brw->curr.rast->templ.front_winding == + PIPE_WINDING_CCW); } brw->sws->bo_unreference(brw->sf.prog_bo); @@ -180,14 +168,16 @@ static void upload_sf_prog(struct brw_context *brw) &brw->sf.prog_data); if (brw->sf.prog_bo == NULL) compile_sf_prog( brw, &key ); + + return 0; } const struct brw_tracked_state brw_sf_prog = { .dirty = { - .mesa = (_NEW_HINT | _NEW_LIGHT | _NEW_POLYGON | _NEW_POINT), + .mesa = (PIPE_NEW_RAST | PIPE_NEW_VERTEX_SHADER), .brw = (BRW_NEW_REDUCED_PRIMITIVE), - .cache = CACHE_NEW_VS_PROG + .cache = 0 }, .prepare = upload_sf_prog }; diff --git a/src/gallium/drivers/i965/brw_sf.h b/src/gallium/drivers/i965/brw_sf.h index c99116b8b1..0b7003dc5e 100644 --- a/src/gallium/drivers/i965/brw_sf.h +++ b/src/gallium/drivers/i965/brw_sf.h @@ -49,14 +49,21 @@ struct brw_sf_prog_key { */ GLuint persp_attrs:32; GLuint linear_attrs:32; + GLuint point_coord_replace_attrs:32; + GLuint nr_attrs:8; GLuint primitive:2; GLuint do_twoside_color:1; GLuint do_flat_shading:1; GLuint frontface_ccw:1; GLuint do_point_sprite:1; GLuint sprite_origin_lower_left:1; - GLuint pad:25; + GLuint pad:17; + + GLuint attr_col0:8; + GLuint attr_col1:8; + GLuint attr_bfc0:8; + GLuint attr_bfc1:8; }; struct brw_sf_point_tex { @@ -101,9 +108,7 @@ struct brw_sf_compile { GLuint nr_setup_attrs; GLuint nr_setup_regs; - GLubyte attr_to_idx[VERT_RESULT_MAX]; - GLubyte idx_to_attr[VERT_RESULT_MAX]; - struct brw_sf_point_tex point_attrs[VERT_RESULT_MAX]; + GLuint point_coord_replace_mask; }; diff --git a/src/gallium/drivers/i965/brw_sf_emit.c b/src/gallium/drivers/i965/brw_sf_emit.c index 4acb2b7d72..db52c9553e 100644 --- a/src/gallium/drivers/i965/brw_sf_emit.c +++ b/src/gallium/drivers/i965/brw_sf_emit.c @@ -43,17 +43,12 @@ static struct brw_reg get_vert_attr(struct brw_sf_compile *c, struct brw_reg vert, GLuint attr) { - GLuint off = c->attr_to_idx[attr] / 2; - GLuint sub = c->attr_to_idx[attr] % 2; + GLuint off = attr / 2; + GLuint sub = attr % 2; return brw_vec4_grf(vert.nr + off, sub * 4); } -static GLboolean have_attr(struct brw_sf_compile *c, - GLuint attr) -{ - return (c->key.attrs & (1<func; - GLuint i; - for (i = 0; i < 2; i++) { - if (have_attr(c, VERT_RESULT_COL0+i) && - have_attr(c, VERT_RESULT_BFC0+i)) - brw_MOV(p, - get_vert_attr(c, vert, VERT_RESULT_COL0+i), - get_vert_attr(c, vert, VERT_RESULT_BFC0+i)); - } + if (c->key.attr_col0 && c->key.attr_bfc0) + brw_MOV(p, + get_vert_attr(c, vert, c->key.attr_col0), + get_vert_attr(c, vert, c->key.attr_bfc0)); + + if (c->key.attr_col1 && c->key.attr_bfc1) + brw_MOV(p, + get_vert_attr(c, vert, c->key.attr_col1), + get_vert_attr(c, vert, c->key.attr_bfc1)); } @@ -89,8 +85,8 @@ static void do_twoside_color( struct brw_sf_compile *c ) * for user-supplied vertex programs, as t_vp_build.c always does * the right thing. */ - if (!(have_attr(c, VERT_RESULT_COL0) && have_attr(c, VERT_RESULT_BFC0)) && - !(have_attr(c, VERT_RESULT_COL1) && have_attr(c, VERT_RESULT_BFC1))) + if (!(c->key.attr_col0 && c->key.attr_bfc0) && + !(c->key.attr_col1 && c->key.attr_bfc1)) return; /* Need to use BRW_EXECUTE_4 and also do an 4-wide compare in order @@ -126,14 +122,17 @@ static void copy_colors( struct brw_sf_compile *c, struct brw_reg src) { struct brw_compile *p = &c->func; - GLuint i; - for (i = VERT_RESULT_COL0; i <= VERT_RESULT_COL1; i++) { - if (have_attr(c,i)) - brw_MOV(p, - get_vert_attr(c, dst, i), - get_vert_attr(c, src, i)); - } + if (c->key.attr_col0) + brw_MOV(p, + get_vert_attr(c, dst, c->key.attr_col0), + get_vert_attr(c, src, c->key.attr_col0)); + + if (c->key.attr_col1) + brw_MOV(p, + get_vert_attr(c, dst, c->key.attr_col1), + get_vert_attr(c, src, c->key.attr_col1)); + } @@ -146,10 +145,16 @@ static void do_flatshade_triangle( struct brw_sf_compile *c ) { struct brw_compile *p = &c->func; struct brw_reg ip = brw_ip_reg(); - GLuint nr = util_count_bits(c->key.attrs & VERT_RESULT_COLOR_BITS); GLuint jmpi = 1; + GLuint nr = 0; - if (!nr) + if (c->key.attr_col0) + nr++; + + if (c->key.attr_col1) + nr++; + + if (nr == 0) return; /* Already done in clip program: @@ -184,10 +189,16 @@ static void do_flatshade_line( struct brw_sf_compile *c ) { struct brw_compile *p = &c->func; struct brw_reg ip = brw_ip_reg(); - GLuint nr = util_count_bits(c->key.attrs & VERT_RESULT_COLOR_BITS); GLuint jmpi = 1; + GLuint nr = 0; + + if (c->key.attr_col0) + nr++; + + if (c->key.attr_col1) + nr++; - if (!nr) + if (nr == 0) return; /* Already done in clip program: @@ -319,10 +330,10 @@ static GLboolean calculate_masks( struct brw_sf_compile *c, *pc_linear = 0; *pc = 0xf; - if (persp_mask & (1 << c->idx_to_attr[reg*2])) + if (persp_mask & (1 << (reg*2))) *pc_persp = 0xf; - if (linear_mask & (1 << c->idx_to_attr[reg*2])) + if (linear_mask & (1 << (reg*2))) *pc_linear = 0xf; /* Maybe only processs one attribute on the final round: @@ -330,10 +341,10 @@ static GLboolean calculate_masks( struct brw_sf_compile *c, if (reg*2+1 < c->nr_setup_attrs) { *pc |= 0xf0; - if (persp_mask & (1 << c->idx_to_attr[reg*2+1])) + if (persp_mask & (1 << (reg*2+1))) *pc_persp |= 0xf0; - if (linear_mask & (1 << c->idx_to_attr[reg*2+1])) + if (linear_mask & (1 << (reg*2+1))) *pc_linear |= 0xf0; } @@ -513,24 +524,28 @@ void brw_emit_point_sprite_setup( struct brw_sf_compile *c, GLboolean allocate) alloc_regs(c); copy_z_inv_w(c); + for (i = 0; i < c->nr_setup_regs; i++) { - struct brw_sf_point_tex *tex = &c->point_attrs[c->idx_to_attr[2*i]]; + /* XXX: only seems to check point_coord_replace_attrs for every + * second attribute?!? + */ + boolean coord_replace = !!(c->key.point_coord_replace_attrs & (1<<(2*i))); struct brw_reg a0 = offset(c->vert[0], i); GLushort pc, pc_persp, pc_linear; GLboolean last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear); if (pc_persp) { - if (!tex->CoordReplace) { - brw_set_predicate_control_flag_value(p, pc_persp); - brw_MUL(p, a0, a0, c->inv_w[0]); - } + if (coord_replace) { + brw_set_predicate_control_flag_value(p, pc_persp); + brw_MUL(p, a0, a0, c->inv_w[0]); + } } - if (tex->CoordReplace) { - /* Caculate 1.0/PointWidth */ - brw_math(&c->func, + if (coord_replace) { + /* Caculate 1.0/PointWidth */ + brw_math(&c->func, c->tmp, BRW_MATH_FUNCTION_INV, BRW_MATH_SATURATE_NONE, @@ -539,33 +554,37 @@ void brw_emit_point_sprite_setup( struct brw_sf_compile *c, GLboolean allocate) BRW_MATH_DATA_SCALAR, BRW_MATH_PRECISION_FULL); - if (c->key.SpriteOrigin == GL_LOWER_LEFT) { - brw_MUL(p, c->m1Cx, c->tmp, c->inv_w[0]); - brw_MOV(p, vec1(suboffset(c->m1Cx, 1)), brw_imm_f(0.0)); - brw_MUL(p, c->m2Cy, c->tmp, negate(c->inv_w[0])); - brw_MOV(p, vec1(suboffset(c->m2Cy, 0)), brw_imm_f(0.0)); - } else { - brw_MUL(p, c->m1Cx, c->tmp, c->inv_w[0]); - brw_MOV(p, vec1(suboffset(c->m1Cx, 1)), brw_imm_f(0.0)); - brw_MUL(p, c->m2Cy, c->tmp, c->inv_w[0]); - brw_MOV(p, vec1(suboffset(c->m2Cy, 0)), brw_imm_f(0.0)); - } - } else { - brw_MOV(p, c->m1Cx, brw_imm_ud(0)); - brw_MOV(p, c->m2Cy, brw_imm_ud(0)); + if (c->key.sprite_origin_lower_left) { + brw_MUL(p, c->m1Cx, c->tmp, c->inv_w[0]); + brw_MOV(p, vec1(suboffset(c->m1Cx, 1)), brw_imm_f(0.0)); + brw_MUL(p, c->m2Cy, c->tmp, negate(c->inv_w[0])); + brw_MOV(p, vec1(suboffset(c->m2Cy, 0)), brw_imm_f(0.0)); + } + else { + brw_MUL(p, c->m1Cx, c->tmp, c->inv_w[0]); + brw_MOV(p, vec1(suboffset(c->m1Cx, 1)), brw_imm_f(0.0)); + brw_MUL(p, c->m2Cy, c->tmp, c->inv_w[0]); + brw_MOV(p, vec1(suboffset(c->m2Cy, 0)), brw_imm_f(0.0)); + } + } + else { + brw_MOV(p, c->m1Cx, brw_imm_ud(0)); + brw_MOV(p, c->m2Cy, brw_imm_ud(0)); } { brw_set_predicate_control_flag_value(p, pc); - if (tex->CoordReplace) { - if (c->key.sprite_origin_lower_left) { - brw_MUL(p, c->m3C0, c->inv_w[0], brw_imm_f(1.0)); - brw_MOV(p, vec1(suboffset(c->m3C0, 0)), brw_imm_f(0.0)); - } - else - brw_MOV(p, c->m3C0, brw_imm_f(0.0)); - } else { - brw_MOV(p, c->m3C0, a0); /* constant value */ + if (coord_replace) { + if (c->key.sprite_origin_lower_left) { + brw_MUL(p, c->m3C0, c->inv_w[0], brw_imm_f(1.0)); + brw_MOV(p, vec1(suboffset(c->m3C0, 0)), brw_imm_f(0.0)); + } + else { + brw_MOV(p, c->m3C0, brw_imm_f(0.0)); + } + } + else { + brw_MOV(p, c->m3C0, a0); /* constant value */ } /* Copy m0..m3 to URB. diff --git a/src/gallium/drivers/i965/brw_sf_state.c b/src/gallium/drivers/i965/brw_sf_state.c index 648a16a038..fbc9f15eb4 100644 --- a/src/gallium/drivers/i965/brw_sf_state.c +++ b/src/gallium/drivers/i965/brw_sf_state.c @@ -29,58 +29,48 @@ * Keith Whitwell */ +#include "util/u_math.h" +#include "pipe/p_state.h" #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" +#include "brw_debug.h" +#include "brw_pipe_rast.h" -static void upload_sf_vp(struct brw_context *brw) +static int upload_sf_vp(struct brw_context *brw) { - const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF; + const struct pipe_viewport_state *vp = &brw->curr.vp; + const struct pipe_scissor_state *scissor = &brw->curr.scissor; struct brw_sf_viewport sfv; - GLfloat y_scale, y_bias; - const GLfloat *v = ctx->Viewport._WindowMap.m; memset(&sfv, 0, sizeof(sfv)); - y_scale = 1.0; - y_bias = 0; + /* PIPE_NEW_VIEWPORT, PIPE_NEW_SCISSOR */ - /* _NEW_VIEWPORT */ + sfv.viewport.m00 = vp->scale[0]; + sfv.viewport.m11 = vp->scale[1]; + sfv.viewport.m22 = vp->scale[2]; + sfv.viewport.m30 = vp->translate[0]; + sfv.viewport.m31 = vp->translate[1]; + sfv.viewport.m32 = vp->translate[2]; - sfv.viewport.m00 = v[MAT_SX]; - sfv.viewport.m11 = v[MAT_SY] * y_scale; - sfv.viewport.m22 = v[MAT_SZ] * depth_scale; - sfv.viewport.m30 = v[MAT_TX]; - sfv.viewport.m31 = v[MAT_TY] * y_scale + y_bias; - sfv.viewport.m32 = v[MAT_TZ] * depth_scale; - - /* _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT - * for DrawBuffer->_[XY]{min,max} - */ - - /* The scissor only needs to handle the intersection of drawable and - * scissor rect. - * - * Note that the hardware's coordinates are inclusive, while Mesa's min is - * inclusive but max is exclusive. - */ - /* Y=0=bottom */ - sfv.scissor.xmin = ctx->DrawBuffer->_Xmin; - sfv.scissor.xmax = ctx->DrawBuffer->_Xmax - 1; - sfv.scissor.ymin = ctx->DrawBuffer->_Ymin; - sfv.scissor.ymax = ctx->DrawBuffer->_Ymax - 1; + sfv.scissor.xmin = scissor->minx; + sfv.scissor.xmax = scissor->maxx; /* -1 ?? */ + sfv.scissor.ymin = scissor->miny; + sfv.scissor.ymax = scissor->maxy; /* -1 ?? */ brw->sws->bo_unreference(brw->sf.vp_bo); brw->sf.vp_bo = brw_cache_data( &brw->cache, BRW_SF_VP, &sfv, NULL, 0 ); + + return 0; } const struct brw_tracked_state brw_sf_vp = { .dirty = { - .mesa = (_NEW_VIEWPORT | - _NEW_SCISSOR | - _NEW_BUFFERS), + .mesa = (PIPE_NEW_VIEWPORT | + PIPE_NEW_SCISSOR), .brw = 0, .cache = 0 }, @@ -90,15 +80,17 @@ const struct brw_tracked_state brw_sf_vp = { struct brw_sf_unit_key { unsigned int total_grf; unsigned int urb_entry_read_length; - unsigned int nr_urb_entries, urb_size, sfsize; - - GLenum front_face, cull_face, provoking_vertex; + unsigned scissor:1; unsigned line_smooth:1; unsigned point_sprite:1; unsigned point_attenuated:1; - unsigned render_to_fbo:1; + unsigned front_face:2; + unsigned cull_mode:2; + unsigned flatshade_first:1; + unsigned gl_rasterization_rules:1; + unsigned line_last_pixel_enable:1; float line_width; float point_size; }; @@ -106,6 +98,7 @@ struct brw_sf_unit_key { static void sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key) { + const struct pipe_rasterizer_state *rast = &brw->curr.rast->templ; memset(key, 0, sizeof(*key)); /* CACHE_NEW_SF_PROG */ @@ -117,25 +110,22 @@ sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key) key->urb_size = brw->urb.vsize; key->sfsize = brw->urb.sfsize; - key->scissor = ctx->Scissor.Enabled; - key->front_face = ctx->Polygon.FrontFace; - - if (ctx->Polygon.CullFlag) - key->cull_face = ctx->Polygon.CullFaceMode; - else - key->cull_face = GL_NONE; - - key->line_width = ctx->Line.Width; - key->line_smooth = ctx->Line.SmoothFlag; - - key->point_sprite = ctx->Point.PointSprite; - key->point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize); - key->point_attenuated = ctx->Point._Attenuated; - - /* _NEW_LIGHT */ - key->provoking_vertex = ctx->Light.ProvokingVertex; - - key->render_to_fbo = 1; + /* PIPE_NEW_RAST */ + key->scissor = rast->scissor; + key->front_face = rast->front_winding; + key->cull_mode = rast->cull_mode; + key->line_smooth = rast->line_smooth; + key->line_width = rast->line_width; + key->flatshade_first = rast->flatshade_first; + key->line_last_pixel_enable = rast->line_last_pixel; + key->gl_rasterization_rules = rast->gl_rasterization_rules; + + key->point_sprite = rast->point_sprite; + key->point_attenuated = rast->point_size_per_vertex; + + key->point_size = CLAMP(rast->point_size, + rast->point_size_min, + rast->point_size_max); } static struct brw_winsys_buffer * @@ -147,7 +137,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, int chipset_max_threads; memset(&sf, 0, sizeof(sf)); - sf.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1; + sf.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; sf.thread0.kernel_start_pointer = brw->sf.prog_bo->offset >> 6; /* reloc */ sf.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; @@ -174,10 +164,10 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, sf.thread4.max_threads = MIN2(chipset_max_threads, key->nr_urb_entries) - 1; - if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) + if (BRW_DEBUG & DEBUG_SINGLE_THREAD) sf.thread4.max_threads = 0; - if (INTEL_DEBUG & DEBUG_STATS) + if (BRW_DEBUG & DEBUG_STATS) sf.thread4.stats_enable = 1; /* CACHE_NEW_SF_VP */ @@ -185,31 +175,30 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, sf.sf5.viewport_transform = 1; - /* _NEW_SCISSOR */ if (key->scissor) sf.sf6.scissor = 1; - /* _NEW_POLYGON */ - if (key->front_face == GL_CCW) + if (key->front_face == PIPE_WINDING_CCW) sf.sf5.front_winding = BRW_FRONTWINDING_CCW; else sf.sf5.front_winding = BRW_FRONTWINDING_CW; - switch (key->cull_face) { - case GL_FRONT: - sf.sf6.cull_mode = BRW_CULLMODE_FRONT; + switch (key->cull_mode) { + case PIPE_WINDING_CCW: + case PIPE_WINDING_CW: + sf.sf6.cull_mode = (key->front_face == key->cull_mode ? + BRW_CULLMODE_FRONT : + BRW_CULLMODE_BACK); break; - case GL_BACK: - sf.sf6.cull_mode = BRW_CULLMODE_BACK; - break; - case GL_FRONT_AND_BACK: + case PIPE_WINDING_BOTH: sf.sf6.cull_mode = BRW_CULLMODE_BOTH; break; - case GL_NONE: + case PIPE_WINDING_NONE: sf.sf6.cull_mode = BRW_CULLMODE_NONE; break; default: assert(0); + sf.sf6.cull_mode = BRW_CULLMODE_NONE; break; } @@ -223,9 +212,9 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, else if (sf.sf6.line_width <= 0x2) sf.sf6.line_width = 0; - /* _NEW_BUFFERS */ - key->render_to_fbo = 1; - if (!key->render_to_fbo) { + /* XXX: gl_rasterization_rules? something else? + */ + if (0) { /* Rendering to an OpenGL window */ sf.sf6.point_rast_rule = BRW_RASTRULE_UPPER_RIGHT; } @@ -261,7 +250,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, /* might be BRW_NEW_PRIMITIVE if we have to adjust pv for polygons: */ - if (key->provoking_vertex == GL_LAST_VERTEX_CONVENTION) { + if (!key->flatshade_first) { sf.sf7.trifan_pv = 2; sf.sf7.linestrip_pv = 1; sf.sf7.tristrip_pv = 2; @@ -270,12 +259,19 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, sf.sf7.linestrip_pv = 0; sf.sf7.tristrip_pv = 0; } - sf.sf7.line_last_pixel_enable = 0; + + sf.sf7.line_last_pixel_enable = key->line_last_pixel_enable; /* Set bias for OpenGL rasterization rules: */ - sf.sf6.dest_org_vbias = 0x8; - sf.sf6.dest_org_hbias = 0x8; + if (key->gl_rasterization_rules) { + sf.sf6.dest_org_vbias = 0x8; + sf.sf6.dest_org_hbias = 0x8; + } + else { + sf.sf6.dest_org_vbias = 0x0; + sf.sf6.dest_org_hbias = 0x0; + } bo = brw_upload_cache(&brw->cache, BRW_SF_UNIT, key, sizeof(*key), @@ -287,23 +283,23 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, * something loaded through the GPE (L2 ISC), so it's INSTRUCTION domain. */ /* Emit SF program relocation */ - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - sf.thread0.grf_reg_count << 1, - offsetof(struct brw_sf_unit_state, thread0), - brw->sf.prog_bo); + brw->sws->bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + sf.thread0.grf_reg_count << 1, + offsetof(struct brw_sf_unit_state, thread0), + brw->sf.prog_bo); /* Emit SF viewport relocation */ - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - sf.sf5.front_winding | (sf.sf5.viewport_transform << 1), - offsetof(struct brw_sf_unit_state, sf5), - brw->sf.vp_bo); + brw->sws->bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + sf.sf5.front_winding | (sf.sf5.viewport_transform << 1), + offsetof(struct brw_sf_unit_state, sf5), + brw->sf.vp_bo); return bo; } -static void upload_sf_unit( struct brw_context *brw ) +static int upload_sf_unit( struct brw_context *brw ) { struct brw_sf_unit_key key; struct brw_winsys_buffer *reloc_bufs[2]; @@ -321,16 +317,12 @@ static void upload_sf_unit( struct brw_context *brw ) if (brw->sf.state_bo == NULL) { brw->sf.state_bo = sf_unit_create_from_key(brw, &key, reloc_bufs); } + return 0; } const struct brw_tracked_state brw_sf_unit = { .dirty = { - .mesa = (_NEW_POLYGON | - _NEW_LIGHT | - _NEW_LINE | - _NEW_POINT | - _NEW_SCISSOR | - _NEW_BUFFERS), + .mesa = (PIPE_NEW_RAST), .brw = BRW_NEW_URB_FENCE, .cache = (CACHE_NEW_SF_VP | CACHE_NEW_SF_PROG) diff --git a/src/gallium/drivers/i965/brw_state.h b/src/gallium/drivers/i965/brw_state.h index 663fc839df..2275e9ad69 100644 --- a/src/gallium/drivers/i965/brw_state.h +++ b/src/gallium/drivers/i965/brw_state.h @@ -168,9 +168,20 @@ GLboolean brw_cached_batch_struct( struct brw_context *brw, void brw_destroy_batch_cache( struct brw_context *brw ); void brw_clear_batch_cache( struct brw_context *brw ); -/* brw_wm_surface_state.c */ +/*********************************************************************** + * brw_wm_surface_state.c + */ struct brw_winsys_buffer * brw_create_constant_surface( struct brw_context *brw, struct brw_surface_key *key ); +/*********************************************************************** + * brw_state_debug.c + */ +void brw_update_dirty_counts( unsigned mesa, + unsigned brw, + unsigned cache ); + + + #endif diff --git a/src/gallium/drivers/i965/brw_state_batch.c b/src/gallium/drivers/i965/brw_state_batch.c index 324fce5163..7d212e5c24 100644 --- a/src/gallium/drivers/i965/brw_state_batch.c +++ b/src/gallium/drivers/i965/brw_state_batch.c @@ -46,7 +46,7 @@ GLboolean brw_cached_batch_struct( struct brw_context *brw, struct brw_cached_batch_item *item = brw->cached_batch_items; struct header *newheader = (struct header *)data; - if (brw->emit_state_always) { + if (brw->flags.always_emit_state) { brw_batchbuffer_data(brw->batch, data, sz, IGNORE_CLIPRECTS); return GL_TRUE; } @@ -56,8 +56,8 @@ GLboolean brw_cached_batch_struct( struct brw_context *brw, if (item->sz == sz && memcmp(item->header, newheader, sz) == 0) return GL_FALSE; if (item->sz != sz) { - _mesa_free(item->header); - item->header = _mesa_malloc(sz); + FREE(item->header); + item->header = MALLOC(sz); item->sz = sz; } goto emit; @@ -67,7 +67,7 @@ GLboolean brw_cached_batch_struct( struct brw_context *brw, assert(!item); item = CALLOC_STRUCT(brw_cached_batch_item); - item->header = _mesa_malloc(sz); + item->header = MALLOC(sz); item->sz = sz; item->next = brw->cached_batch_items; brw->cached_batch_items = item; diff --git a/src/gallium/drivers/i965/brw_state_cache.c b/src/gallium/drivers/i965/brw_state_cache.c index 97f88b3ab3..4310d01ba2 100644 --- a/src/gallium/drivers/i965/brw_state_cache.c +++ b/src/gallium/drivers/i965/brw_state_cache.c @@ -55,7 +55,9 @@ * only one of the two buffers referenced gets put into the offset, and the * incorrect program is run for the other instance. */ +#include "util/u_memory.h" +#include "brw_debug.h" #include "brw_state.h" #include "brw_batchbuffer.h" @@ -107,9 +109,9 @@ update_cache_last(struct brw_cache *cache, enum brw_cache_id cache_id, if (bo == cache->last_bo[cache_id]) return; /* no change */ - brw->sws->bo_unreference(cache->last_bo[cache_id]); + cache->sws->bo_unreference(cache->last_bo[cache_id]); cache->last_bo[cache_id] = bo; - brw->sws->bo_reference(cache->last_bo[cache_id]); + cache->sws->bo_reference(cache->last_bo[cache_id]); cache->brw->state.dirty.cache |= 1 << cache_id; } @@ -127,7 +129,7 @@ search_cache(struct brw_cache *cache, enum brw_cache_id cache_id, for (c = cache->items[hash % cache->size]; c; c = c->next) bucketcount++; - fprintf(stderr, "bucket %d/%d = %d/%d items\n", hash % cache->size, + debug_printf("bucket %d/%d = %d/%d items\n", hash % cache->size, cache->size, bucketcount, cache->n_items); #endif @@ -154,7 +156,7 @@ rehash(struct brw_cache *cache) GLuint size, i; size = cache->size * 3; - items = (struct brw_cache_item**) _mesa_calloc(size * sizeof(*items)); + items = (struct brw_cache_item**) CALLOC(size, sizeof(*items)); for (i = 0; i < cache->size; i++) for (c = cache->items[i]; c; c = next) { @@ -194,7 +196,7 @@ brw_search_cache(struct brw_cache *cache, update_cache_last(cache, cache_id, item->bo); - brw->sws->bo_reference(item->bo); + cache->sws->bo_reference(item->bo); return item->bo; } @@ -219,20 +221,25 @@ brw_upload_cache( struct brw_cache *cache, struct brw_winsys_buffer *bo; int i; - /* Create the buffer object to contain the data */ - bo = brw->sws->bo_alloc(cache->sws, - cache->buffer_type[cache_id], data_size, 1 << 6); + /* Create the buffer object to contain the data. For now, use a + * single buffer type to describe all cached state atoms. Later, + * may want to take advantage of hardware distinctions between + * these various entities. + */ + bo = cache->sws->bo_alloc(cache->sws, + BRW_BUFFER_TYPE_STATE_CACHE, + data_size, 1 << 6); /* Set up the memory containing the key, aux_data, and reloc_bufs */ - tmp = _mesa_malloc(key_size + aux_size + relocs_size); + tmp = MALLOC(key_size + aux_size + relocs_size); memcpy(tmp, key, key_size); memcpy(tmp + key_size, aux, cache->aux_size[cache_id]); memcpy(tmp + key_size + aux_size, reloc_bufs, relocs_size); for (i = 0; i < nr_reloc_bufs; i++) { if (reloc_bufs[i] != NULL) - brw->sws->bo_reference(reloc_bufs[i]); + cache->sws->bo_reference(reloc_bufs[i]); } item->cache_id = cache_id; @@ -243,7 +250,7 @@ brw_upload_cache( struct brw_cache *cache, item->nr_reloc_bufs = nr_reloc_bufs; item->bo = bo; - brw->sws->bo_reference(bo); + cache->sws->bo_reference(bo); item->data_size = data_size; if (cache->n_items > cache->size * 1.5) @@ -259,13 +266,13 @@ brw_upload_cache( struct brw_cache *cache, *(void **)aux_return = (void *)((char *)item->key + item->key_size); } - if (INTEL_DEBUG & DEBUG_STATE) - _mesa_printf("upload %s: %d bytes to cache id %d\n", + if (BRW_DEBUG & DEBUG_STATE) + debug_printf("upload %s: %d bytes to cache id %d\n", cache->name[cache_id], data_size, cache_id); /* Copy data to the buffer */ - dri_bo_subdata(bo, 0, data_size, data); + cache->sws->bo_subdata(bo, 0, data_size, data); update_cache_last(cache, cache_id, bo); @@ -292,7 +299,7 @@ brw_cache_data_sz(struct brw_cache *cache, reloc_bufs, nr_reloc_bufs); if (item) { update_cache_last(cache, cache_id, item->bo); - brw->sws->bo_reference(item->bo); + cache->sws->bo_reference(item->bo); return item->bo; } @@ -349,11 +356,12 @@ brw_init_non_surface_cache(struct brw_context *brw) struct brw_cache *cache = &brw->cache; cache->brw = brw; + cache->sws = brw->sws; cache->size = 7; cache->n_items = 0; cache->items = (struct brw_cache_item **) - _mesa_calloc(cache->size * sizeof(struct brw_cache_item)); + CALLOC(cache->size, sizeof(struct brw_cache_item)); brw_init_cache_id(cache, "CC_VP", @@ -457,7 +465,7 @@ brw_init_surface_cache(struct brw_context *brw) cache->size = 7; cache->n_items = 0; cache->items = (struct brw_cache_item **) - _mesa_calloc(cache->size * sizeof(struct brw_cache_item)); + CALLOC(cache->size, sizeof(struct brw_cache_item)); brw_init_cache_id(cache, "SS_SURFACE", @@ -487,8 +495,8 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) struct brw_cache_item *c, *next; GLuint i; - if (INTEL_DEBUG & DEBUG_STATE) - _mesa_printf("%s\n", __FUNCTION__); + if (BRW_DEBUG & DEBUG_STATE) + debug_printf("%s\n", __FUNCTION__); for (i = 0; i < cache->size; i++) { for (c = cache->items[i]; c; c = next) { @@ -507,7 +515,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) cache->n_items = 0; if (brw->curbe.last_buf) { - _mesa_free(brw->curbe.last_buf); + FREE(brw->curbe.last_buf); brw->curbe.last_buf = NULL; } @@ -527,8 +535,8 @@ brw_state_cache_bo_delete(struct brw_cache *cache, struct brw_winsys_buffer *bo) struct brw_cache_item **prev; GLuint i; - if (INTEL_DEBUG & DEBUG_STATE) - _mesa_printf("%s\n", __FUNCTION__); + if (BRW_DEBUG & DEBUG_STATE) + debug_printf("%s\n", __FUNCTION__); for (i = 0; i < cache->size; i++) { for (prev = &cache->items[i]; *prev;) { @@ -540,8 +548,8 @@ brw_state_cache_bo_delete(struct brw_cache *cache, struct brw_winsys_buffer *bo) *prev = c->next; for (j = 0; j < c->nr_reloc_bufs; j++) - brw->sws->bo_unreference(c->reloc_bufs[j]); - brw->sws->bo_unreference(c->bo); + cache->sws->bo_unreference(c->reloc_bufs[j]); + cache->sws->bo_unreference(c->bo); free((void *)c->key); free(c); cache->n_items--; @@ -555,8 +563,8 @@ brw_state_cache_bo_delete(struct brw_cache *cache, struct brw_winsys_buffer *bo) void brw_state_cache_check_size(struct brw_context *brw) { - if (INTEL_DEBUG & DEBUG_STATE) - _mesa_printf("%s (n_items=%d)\n", __FUNCTION__, brw->cache.n_items); + if (BRW_DEBUG & DEBUG_STATE) + debug_printf("%s (n_items=%d)\n", __FUNCTION__, brw->cache.n_items); /* un-tuned guess. We've got around 20 state objects for a total of around * 32k, so 1000 of them is around 1.5MB. @@ -574,8 +582,8 @@ brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache) { GLuint i; - if (INTEL_DEBUG & DEBUG_STATE) - _mesa_printf("%s\n", __FUNCTION__); + if (BRW_DEBUG & DEBUG_STATE) + debug_printf("%s\n", __FUNCTION__); brw_clear_cache(brw, cache); for (i = 0; i < BRW_MAX_CACHE; i++) { diff --git a/src/gallium/drivers/i965/brw_state_debug.c b/src/gallium/drivers/i965/brw_state_debug.c index 22cea4b7d8..cc4744dc16 100644 --- a/src/gallium/drivers/i965/brw_state_debug.c +++ b/src/gallium/drivers/i965/brw_state_debug.c @@ -109,8 +109,25 @@ brw_print_dirty_count(struct dirty_bit_map *bit_map, int32_t bits) if (bit_map[i].bit == 0) return; - fprintf(stderr, "0x%08x: %12d (%s)\n", + debug_printf("0x%08x: %12d (%s)\n", bit_map[i].bit, bit_map[i].count, bit_map[i].name); } } +void +brw_update_dirty_counts( unsigned mesa, + unsigned brw, + unsigned cache ) +{ + static int dirty_count = 0; + + brw_update_dirty_count(mesa_bits, mesa); + brw_update_dirty_count(brw_bits, brw); + brw_update_dirty_count(cache_bits, cache); + if (dirty_count++ % 1000 == 0) { + brw_print_dirty_count(mesa_bits, mesa); + brw_print_dirty_count(brw_bits, brw); + brw_print_dirty_count(cache_bits, cache); + debug_printf("\n"); + } +} diff --git a/src/gallium/drivers/i965/brw_state_dump.c b/src/gallium/drivers/i965/brw_state_dump.c index 1bc83fb9c1..72604304d4 100644 --- a/src/gallium/drivers/i965/brw_state_dump.c +++ b/src/gallium/drivers/i965/brw_state_dump.c @@ -28,6 +28,7 @@ #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" +#include "brw_winsys.h" /** * Prints out a header, the contents, and the message associated with @@ -44,28 +45,32 @@ state_out(const char *name, void *data, uint32_t hw_offset, int index, { va_list va; - fprintf(stderr, "%8s: 0x%08x: 0x%08x: ", - name, hw_offset + index * 4, ((uint32_t *)data)[index]); + debug_printf("%8s: 0x%08x: 0x%08x: ", + name, hw_offset + index * 4, ((uint32_t *)data)[index]); va_start(va, fmt); - vfprintf(stderr, fmt, va); + debug_vprintf(fmt, va); va_end(va); } /** Generic, undecoded state buffer debug printout */ static void -state_struct_out(const char *name, struct brw_winsys_buffer *buffer, unsigned int state_size) +state_struct_out(struct brw_winsys_screen *sws, + const char *name, + struct brw_winsys_buffer *buffer, + unsigned int state_size) { int i; + void *data; if (buffer == NULL) return; - dri_bo_map(buffer, GL_FALSE); + data = sws->bo_map(buffer, GL_FALSE); for (i = 0; i < state_size / 4; i++) { - state_out(name, buffer->virtual, buffer->offset, i, + state_out(name, data, buffer->offset, i, "dword %d\n", i); } - dri_bo_unmap(buffer); + sws->bo_unmap(buffer); } static const char * @@ -106,12 +111,11 @@ static void dump_wm_surface_state(struct brw_context *brw) char name[20]; if (surf_bo == NULL) { - fprintf(stderr, " WM SS%d: NULL\n", i); + debug_printf(" WM SS%d: NULL\n", i); continue; } - dri_bo_map(surf_bo, GL_FALSE); + surf = (struct brw_surface_state *)brw->sws->bo_map(surf_bo, GL_FALSE); surfoff = surf_bo->offset; - surf = (struct brw_surface_state *)(surf_bo->virtual); sprintf(name, "WM SS%d", i); state_out(name, surf, surfoff, 0, "%s %s\n", @@ -127,7 +131,7 @@ static void dump_wm_surface_state(struct brw_context *brw) state_out(name, surf, surfoff, 5, "x,y offset: %d,%d\n", surf->ss5.x_offset, surf->ss5.y_offset); - dri_bo_unmap(surf_bo); + brw->sws->bo_unmap(surf_bo); } } @@ -140,9 +144,7 @@ static void dump_sf_viewport_state(struct brw_context *brw) if (brw->sf.vp_bo == NULL) return; - dri_bo_map(brw->sf.vp_bo, GL_FALSE); - - vp = brw->sf.vp_bo->virtual; + vp = (struct brw_sf_viewport *)brw->sws->bo_map(brw->sf.vp_bo, GL_FALSE); vp_off = brw->sf.vp_bo->offset; state_out(name, vp, vp_off, 0, "m00 = %f\n", vp->viewport.m00); @@ -157,10 +159,12 @@ static void dump_sf_viewport_state(struct brw_context *brw) state_out(name, vp, vp_off, 7, "bottom right = %d,%d\n", vp->scissor.xmax, vp->scissor.ymax); - dri_bo_unmap(brw->sf.vp_bo); + brw->sws->bo_unmap(brw->sf.vp_bo); } -static void brw_debug_prog(const char *name, struct brw_winsys_buffer *prog) +static void brw_debug_prog(struct brw_winsys_screen *sws, + const char *name, + struct brw_winsys_buffer *prog) { unsigned int i; uint32_t *data; @@ -168,12 +172,10 @@ static void brw_debug_prog(const char *name, struct brw_winsys_buffer *prog) if (prog == NULL) return; - dri_bo_map(prog, GL_FALSE); - - data = prog->virtual; + data = (uint32_t *)sws->bo_map(prog, GL_FALSE); for (i = 0; i < prog->size / 4 / 4; i++) { - fprintf(stderr, "%8s: 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", + debug_printf("%8s: 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", name, (unsigned int)prog->offset + i * 4 * 4, data[i * 4], data[i * 4 + 1], data[i * 4 + 2], data[i * 4 + 3]); /* Stop at the end of the program. It'd be nice to keep track of the actual @@ -186,7 +188,7 @@ static void brw_debug_prog(const char *name, struct brw_winsys_buffer *prog) break; } - dri_bo_unmap(prog); + sws->bo_unmap(prog); } @@ -202,19 +204,21 @@ static void brw_debug_prog(const char *name, struct brw_winsys_buffer *prog) */ void brw_debug_batch(struct brw_context *brw) { - state_struct_out("WM bind", brw->wm.bind_bo, 4 * brw->wm.nr_surfaces); + struct brw_winsys_screen *sws = brw->sws; + + state_struct_out(sws, "WM bind", brw->wm.bind_bo, 4 * brw->wm.nr_surfaces); dump_wm_surface_state(brw); - state_struct_out("VS", brw->vs.state_bo, sizeof(struct brw_vs_unit_state)); - brw_debug_prog("VS prog", brw->vs.prog_bo); + state_struct_out(sws, "VS", brw->vs.state_bo, sizeof(struct brw_vs_unit_state)); + brw_debug_prog(sws, "VS prog", brw->vs.prog_bo); - state_struct_out("GS", brw->gs.state_bo, sizeof(struct brw_gs_unit_state)); - brw_debug_prog("GS prog", brw->gs.prog_bo); + state_struct_out(sws, "GS", brw->gs.state_bo, sizeof(struct brw_gs_unit_state)); + brw_debug_prog(sws, "GS prog", brw->gs.prog_bo); - state_struct_out("SF", brw->sf.state_bo, sizeof(struct brw_sf_unit_state)); + state_struct_out(sws, "SF", brw->sf.state_bo, sizeof(struct brw_sf_unit_state)); dump_sf_viewport_state(brw); - brw_debug_prog("SF prog", brw->sf.prog_bo); + brw_debug_prog(sws, "SF prog", brw->sf.prog_bo); - state_struct_out("WM", brw->wm.state_bo, sizeof(struct brw_wm_unit_state)); - brw_debug_prog("WM prog", brw->wm.prog_bo); + state_struct_out(sws, "WM", brw->wm.state_bo, sizeof(struct brw_wm_unit_state)); + brw_debug_prog(sws, "WM prog", brw->wm.prog_bo); } diff --git a/src/gallium/drivers/i965/brw_state_upload.c b/src/gallium/drivers/i965/brw_state_upload.c index 8659e35289..eff3a40a46 100644 --- a/src/gallium/drivers/i965/brw_state_upload.c +++ b/src/gallium/drivers/i965/brw_state_upload.c @@ -34,6 +34,7 @@ #include "brw_context.h" #include "brw_state.h" #include "brw_batchbuffer.h" +#include "brw_debug.h" /* This is used to initialize brw->state.atoms[]. We could use this * list directly except for a single atom, brw_constant_buffer, which @@ -83,12 +84,8 @@ const struct brw_tracked_state *atoms[] = &brw_blend_constant_color, &brw_depthbuffer, - &brw_polygon_stipple, - &brw_polygon_stipple_offset, - &brw_line_stipple, - &brw_aa_line_parameters, &brw_psp_urb_cbs, @@ -163,11 +160,12 @@ enum pipe_error brw_validate_state( struct brw_context *brw ) { struct brw_state_flags *state = &brw->state.dirty; GLuint i; + int ret; brw_clear_validated_bos(brw); - brw_add_validated_bo(brw, intel->batch->buf); + brw_add_validated_bo(brw, brw->batch->buf); - if (brw->emit_state_always) { + if (brw->flags.always_emit_state) { state->mesa |= ~0; state->brw |= ~0; state->cache |= ~0; @@ -199,10 +197,10 @@ enum pipe_error brw_validate_state( struct brw_context *brw ) * If this fails, we can experience GPU lock-ups. */ { - const struct brw_fragment_program *fp = brw->fragment_program; + const struct brw_fragment_shader *fp = brw->curr.fragment_shader; if (fp) { - assert(fp->info.max_sampler <= brw->nr_samplers && - fp->info.max_texture <= brw->nr_textures); + assert(fp->info.file_max[TGSI_FILE_SAMPLER] < brw->curr.num_samplers && + fp->info.texture_max < brw->curr.num_textures); } } @@ -213,18 +211,18 @@ enum pipe_error brw_validate_state( struct brw_context *brw ) enum pipe_error brw_upload_state(struct brw_context *brw) { struct brw_state_flags *state = &brw->state.dirty; + int ret; int i; - static int dirty_count = 0; brw_clear_validated_bos(brw); - if (INTEL_DEBUG) { + if (BRW_DEBUG) { /* Debug version which enforces various sanity checks on the * state flags which are generated and checked to help ensure * state atoms are ordered correctly in the list. */ struct brw_state_flags examined, prev; - _mesa_memset(&examined, 0, sizeof(examined)); + memset(&examined, 0, sizeof(examined)); prev = *state; for (i = 0; i < Elements(atoms); i++) { @@ -268,19 +266,14 @@ enum pipe_error brw_upload_state(struct brw_context *brw) } } - if (INTEL_DEBUG & DEBUG_STATE) { - brw_update_dirty_count(mesa_bits, state->mesa); - brw_update_dirty_count(brw_bits, state->brw); - brw_update_dirty_count(cache_bits, state->cache); - if (dirty_count++ % 1000 == 0) { - brw_print_dirty_count(mesa_bits, state->mesa); - brw_print_dirty_count(brw_bits, state->brw); - brw_print_dirty_count(cache_bits, state->cache); - debug_printf("\n"); - } + if (BRW_DEBUG & DEBUG_STATE) { + brw_update_dirty_counts( state->mesa, + state->brw, + state->cache ); } /* Clear dirty flags: */ memset(state, 0, sizeof(*state)); + return 0; } diff --git a/src/gallium/drivers/i965/brw_tex.c b/src/gallium/drivers/i965/brw_tex.c deleted file mode 100644 index 6f7adb6393..0000000000 --- a/src/gallium/drivers/i965/brw_tex.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell - */ - - -#include "brw_context.h" - -/** - * Finalizes all textures, completing any rendering that needs to be done - * to prepare them. - */ -void brw_validate_textures( struct brw_context *brw ) -{ - int i; - - for (i = 0; i < BRW_MAX_TEX_UNIT; i++) { - struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i]; - - if (texUnit->_ReallyEnabled) { - intel_finalize_mipmap_tree(intel, i); - } - } -} diff --git a/src/gallium/drivers/i965/brw_tex_layout.c b/src/gallium/drivers/i965/brw_tex_layout.c deleted file mode 100644 index 50c30878c6..0000000000 --- a/src/gallium/drivers/i965/brw_tex_layout.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell - */ - -/* Code to layout images in a mipmap tree for i965. - */ - -#include "brw_tex_layout.h" - -#define FILE_DEBUG_FLAG DEBUG_MIPTREE - -GLboolean brw_miptree_layout(struct brw_context *brw, - struct intel_mipmap_tree *mt, - uint32_t tiling) -{ - /* XXX: these vary depending on image format: */ - /* GLint align_w = 4; */ - - switch (mt->target) { - case GL_TEXTURE_CUBE_MAP: - if (IS_IGDNG(brw->brw_screen->pci_id)) { - GLuint align_h = 2, align_w = 4; - GLuint level; - GLuint x = 0; - GLuint y = 0; - GLuint width = mt->width0; - GLuint height = mt->height0; - GLuint qpitch = 0; - GLuint y_pitch = 0; - - mt->pitch = mt->width0; - intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h); - y_pitch = ALIGN(height, align_h); - - if (mt->compressed) { - mt->pitch = ALIGN(mt->width0, align_w); - } - - if (mt->last_level != 0) { - GLuint mip1_width; - - if (mt->compressed) { - mip1_width = ALIGN(minify(mt->width0), align_w) - + ALIGN(minify(minify(mt->width0)), align_w); - } else { - mip1_width = ALIGN(minify(mt->width0), align_w) - + minify(minify(mt->width0)); - } - - if (mip1_width > mt->pitch) { - mt->pitch = mip1_width; - } - } - - mt->pitch = intel_miptree_pitch_align(intel, mt, tiling, mt->pitch); - - if (mt->compressed) { - qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4 * mt->pitch * mt->cpp; - mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4 * 6; - } else { - qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) * mt->pitch * mt->cpp; - mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) * 6; - } - - for (level = 0; level <= mt->last_level; level++) { - GLuint img_height; - GLuint nr_images = 6; - GLuint q = 0; - - intel_miptree_set_level_info(mt, level, nr_images, x, y, width, - height, 1); - - for (q = 0; q < nr_images; q++) - intel_miptree_set_image_offset_ex(mt, level, q, x, y, q * qpitch); - - if (mt->compressed) - img_height = MAX2(1, height/4); - else - img_height = ALIGN(height, align_h); - - if (level == 1) { - x += ALIGN(width, align_w); - } - else { - y += img_height; - } - - width = minify(width); - height = minify(height); - } - - break; - } - - case GL_TEXTURE_3D: { - GLuint width = mt->width0; - GLuint height = mt->height0; - GLuint depth = mt->depth0; - GLuint pack_x_pitch, pack_x_nr; - GLuint pack_y_pitch; - GLuint level; - GLuint align_h = 2; - GLuint align_w = 4; - - mt->total_height = 0; - intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h); - - if (mt->compressed) { - mt->pitch = ALIGN(width, align_w); - pack_y_pitch = (height + 3) / 4; - } else { - mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0); - pack_y_pitch = ALIGN(mt->height0, align_h); - } - - pack_x_pitch = width; - pack_x_nr = 1; - - for (level = 0 ; level <= mt->last_level ; level++) { - GLuint nr_images = mt->target == GL_TEXTURE_3D ? depth : 6; - GLint x = 0; - GLint y = 0; - GLint q, j; - - intel_miptree_set_level_info(mt, level, nr_images, - 0, mt->total_height, - width, height, depth); - - for (q = 0; q < nr_images;) { - for (j = 0; j < pack_x_nr && q < nr_images; j++, q++) { - intel_miptree_set_image_offset(mt, level, q, x, y); - x += pack_x_pitch; - } - - x = 0; - y += pack_y_pitch; - } - - - mt->total_height += y; - width = minify(width); - height = minify(height); - depth = minify(depth); - - if (mt->compressed) { - pack_y_pitch = (height + 3) / 4; - - if (pack_x_pitch > ALIGN(width, align_w)) { - pack_x_pitch = ALIGN(width, align_w); - pack_x_nr <<= 1; - } - } else { - if (pack_x_pitch > 4) { - pack_x_pitch >>= 1; - pack_x_nr <<= 1; - assert(pack_x_pitch * pack_x_nr <= mt->pitch); - } - - if (pack_y_pitch > 2) { - pack_y_pitch >>= 1; - pack_y_pitch = ALIGN(pack_y_pitch, align_h); - } - } - - } - /* The 965's sampler lays cachelines out according to how accesses - * in the texture surfaces run, so they may be "vertical" through - * memory. As a result, the docs say in Surface Padding Requirements: - * Sampling Engine Surfaces that two extra rows of padding are required. - * We don't know of similar requirements for pre-965, but given that - * those docs are silent on padding requirements in general, let's play - * it safe. - */ - if (mt->target == GL_TEXTURE_CUBE_MAP) - mt->total_height += 2; - break; - } - - default: - i945_miptree_layout_2d(intel, mt, tiling); - break; - } - DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__, - mt->pitch, - mt->total_height, - mt->cpp, - mt->pitch * mt->total_height * mt->cpp ); - - return GL_TRUE; -} - diff --git a/src/gallium/drivers/i965/brw_urb.c b/src/gallium/drivers/i965/brw_urb.c index a2277519ad..ff2466528d 100644 --- a/src/gallium/drivers/i965/brw_urb.c +++ b/src/gallium/drivers/i965/brw_urb.c @@ -184,17 +184,17 @@ static void recalculate_urb_fence( struct brw_context *brw ) * entries and the values for minimum nr of entries * provided above. */ - _mesa_printf("couldn't calculate URB layout!\n"); + debug_printf("couldn't calculate URB layout!\n"); exit(1); } - if (INTEL_DEBUG & (DEBUG_URB|DEBUG_FALLBACKS)) - _mesa_printf("URB CONSTRAINED\n"); + if (BRW_DEBUG & (DEBUG_URB|DEBUG_FALLBACKS)) + debug_printf("URB CONSTRAINED\n"); } done: - if (INTEL_DEBUG & DEBUG_URB) - _mesa_printf("URB fence: %d ..VS.. %d ..GS.. %d ..CLP.. %d ..SF.. %d ..CS.. %d\n", + if (BRW_DEBUG & DEBUG_URB) + debug_printf("URB fence: %d ..VS.. %d ..GS.. %d ..CLP.. %d ..SF.. %d ..CS.. %d\n", brw->urb.vs_start, brw->urb.gs_start, brw->urb.clip_start, diff --git a/src/gallium/drivers/i965/brw_vs.h b/src/gallium/drivers/i965/brw_vs.h index 54f7d7d7c4..e33fa2f0aa 100644 --- a/src/gallium/drivers/i965/brw_vs.h +++ b/src/gallium/drivers/i965/brw_vs.h @@ -64,7 +64,7 @@ struct brw_vs_compile { struct brw_reg r0; struct brw_reg r1; - struct brw_reg regs[PROGRAM_ADDRESS+1][128]; + struct brw_reg regs[TGSI_FILE_COUNT][128]; struct brw_reg tmp; struct brw_reg stack; diff --git a/src/gallium/drivers/i965/brw_vs_emit.c b/src/gallium/drivers/i965/brw_vs_emit.c index 086f54799e..04132a167b 100644 --- a/src/gallium/drivers/i965/brw_vs_emit.c +++ b/src/gallium/drivers/i965/brw_vs_emit.c @@ -242,10 +242,10 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) c->prog_data.total_grf = reg; - if (INTEL_DEBUG & DEBUG_VS) { - _mesa_printf("%s NumAddrRegs %d\n", __FUNCTION__, c->vp->program.Base.NumAddressRegs); - _mesa_printf("%s NumTemps %d\n", __FUNCTION__, c->vp->program.Base.NumTemporaries); - _mesa_printf("%s reg = %d\n", __FUNCTION__, reg); + if (BRW_DEBUG & DEBUG_VS) { + debug_printf("%s NumAddrRegs %d\n", __FUNCTION__, c->vp->program.Base.NumAddressRegs); + debug_printf("%s NumTemps %d\n", __FUNCTION__, c->vp->program.Base.NumTemporaries); + debug_printf("%s reg = %d\n", __FUNCTION__, reg); } } @@ -1248,10 +1248,10 @@ void brw_vs_emit(struct brw_vs_compile *c ) GLuint index; GLuint file; - if (INTEL_DEBUG & DEBUG_VS) { - _mesa_printf("vs-mesa:\n"); + if (BRW_DEBUG & DEBUG_VS) { + debug_printf("vs-mesa:\n"); _mesa_print_program(&c->vp->program.Base); - _mesa_printf("\n"); + debug_printf("\n"); } brw_set_compression_control(p, BRW_COMPRESSION_NONE); @@ -1526,12 +1526,12 @@ void brw_vs_emit(struct brw_vs_compile *c ) post_vs_emit(c, end_inst, last_inst); - if (INTEL_DEBUG & DEBUG_VS) { + if (BRW_DEBUG & DEBUG_VS) { int i; - _mesa_printf("vs-native:\n"); + debug_printf("vs-native:\n"); for (i = 0; i < p->nr_insn; i++) brw_disasm(stderr, &p->store[i]); - _mesa_printf("\n"); + debug_printf("\n"); } } diff --git a/src/gallium/drivers/i965/brw_vs_state.c b/src/gallium/drivers/i965/brw_vs_state.c index 1717223e49..05a91f2de4 100644 --- a/src/gallium/drivers/i965/brw_vs_state.c +++ b/src/gallium/drivers/i965/brw_vs_state.c @@ -122,7 +122,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) vs.thread4.max_threads = CLAMP(key->nr_urb_entries / 2, 1, chipset_max_threads) - 1; - if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) + if (BRW_DEBUG & DEBUG_SINGLE_THREAD) vs.thread4.max_threads = 0; /* No samplers for ARB_vp programs: @@ -131,7 +131,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) */ vs.vs5.sampler_count = 0; - if (INTEL_DEBUG & DEBUG_STATS) + if (BRW_DEBUG & DEBUG_STATS) vs.thread4.stats_enable = 1; /* Vertex program always enabled: diff --git a/src/gallium/drivers/i965/brw_winsys.h b/src/gallium/drivers/i965/brw_winsys.h index 51e23b9640..33032276bc 100644 --- a/src/gallium/drivers/i965/brw_winsys.h +++ b/src/gallium/drivers/i965/brw_winsys.h @@ -69,6 +69,7 @@ enum brw_buffer_type BRW_BUFFER_TYPE_SHADER_CONSTANTS, BRW_BUFFER_TYPE_WM_SCRATCH, BRW_BUFFER_TYPE_BATCH, + BRW_BUFFER_TYPE_STATE_CACHE, }; @@ -156,11 +157,15 @@ struct brw_winsys_screen { unsigned offset, struct brw_winsys_buffer *b2); - void (*bo_subdata)(struct brw_winsys_buffer *dst, + void (*bo_subdata)(struct brw_winsys_buffer *buffer, size_t offset, size_t size, const void *data); + boolean (*bo_is_busy)(struct brw_winsys_buffer *buffer); + boolean (*bo_references)(struct brw_winsys_buffer *a, + struct brw_winsys_buffer *b); + /* XXX: couldn't this be handled by returning true/false on * bo_emit_reloc? */ @@ -171,18 +176,13 @@ struct brw_winsys_screen { /** * Map a buffer. */ - void *(*buffer_map)(struct brw_winsys *iws, - struct brw_winsys_buffer *buffer, - boolean write); + void *(*bo_map)(struct brw_winsys_buffer *buffer, + boolean write); /** * Unmap a buffer. */ - void (*buffer_unmap)(struct brw_winsys *iws, - struct brw_winsys_buffer *buffer); - - void (*buffer_destroy)(struct brw_winsys *iws, - struct brw_winsys_buffer *buffer); + void (*bo_unmap)(struct brw_winsys_buffer *buffer); /*@}*/ diff --git a/src/gallium/drivers/i965/brw_wm.c b/src/gallium/drivers/i965/brw_wm.c index 764708f7df..3d889699f8 100644 --- a/src/gallium/drivers/i965/brw_wm.c +++ b/src/gallium/drivers/i965/brw_wm.c @@ -178,8 +178,8 @@ static void do_wm_prog( struct brw_context *brw, brw_wm_non_glsl_emit(brw, c); } - if (INTEL_DEBUG & DEBUG_WM) - fprintf(stderr, "\n"); + if (BRW_DEBUG & DEBUG_WM) + debug_printf("\n"); /* get the program */ diff --git a/src/gallium/drivers/i965/brw_wm.h b/src/gallium/drivers/i965/brw_wm.h index bf241f5fa4..5bc2a49c1f 100644 --- a/src/gallium/drivers/i965/brw_wm.h +++ b/src/gallium/drivers/i965/brw_wm.h @@ -33,6 +33,7 @@ #ifndef BRW_WM_H #define BRW_WM_H +#include "tgsi/tgsi_ureg.h" #include "brw_context.h" #include "brw_eu.h" @@ -57,17 +58,18 @@ #define AA_ALWAYS 2 struct brw_wm_prog_key { + unsigned proj_attrib_mask; /**< one bit per fragment program attribute */ + unsigned linear_attrib_mask:1; /**< linear interpolation vs perspective interp */ + GLuint source_depth_reg:3; GLuint aa_dest_stencil_reg:3; GLuint dest_depth_reg:3; GLuint nr_depth_regs:3; - GLuint computes_depth:1; /* could be derived from program string */ + GLuint computes_depth:1; GLuint source_depth_to_render_target:1; GLuint flat_shade:1; - GLuint linear_color:1; /**< linear interpolation vs perspective interp */ GLuint runtime_check_aads_emit:1; - - GLbitfield proj_attrib_mask; /**< one bit per fragment program attribute */ + GLuint shadowtex_mask:16; GLuint yuvtex_mask:16; GLuint yuvtex_swap_mask:16; /* UV swaped */ @@ -75,7 +77,7 @@ struct brw_wm_prog_key { GLuint tex_swizzles[BRW_MAX_TEX_UNIT]; GLuint program_string_id:32; - GLuint drawable_height; + GLuint vp_nr_outputs_written; }; @@ -151,7 +153,7 @@ struct brw_wm_instruction { }; -#define BRW_WM_MAX_INSN (MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS*3 + FRAG_ATTRIB_MAX + 3) +#define BRW_WM_MAX_INSN 2048 #define BRW_WM_MAX_GRF 128 /* hardware limit */ #define BRW_WM_MAX_VREG (BRW_WM_MAX_INSN * 4) #define BRW_WM_MAX_REF (BRW_WM_MAX_INSN * 12) @@ -161,11 +163,19 @@ struct brw_wm_instruction { #define BRW_WM_MAX_SUBROUTINE 16 +struct ureg_instruction { + unsigned opcode:8; + unsigned tex_target:3; + struct ureg_dst dst; + struct ureg_src src[3]; +}; + /* New opcodes to track internal operations required for WM unit. * These are added early so that the registers used can be tracked, * freed and reused like those of other instructions. */ +#define MAX_OPCODE TGSI_OPCODE_LAST #define WM_PIXELXY (MAX_OPCODE) #define WM_DELTAXY (MAX_OPCODE + 1) #define WM_PIXELW (MAX_OPCODE + 2) @@ -177,7 +187,7 @@ struct brw_wm_instruction { #define WM_FRONTFACING (MAX_OPCODE + 8) #define MAX_WM_OPCODE (MAX_OPCODE + 9) -#define PROGRAM_PAYLOAD (PROGRAM_FILE_MAX) +#define PROGRAM_PAYLOAD (TGSI_FILE_COUNT) #define PAYLOAD_DEPTH (FRAG_ATTRIB_MAX) struct brw_wm_compile { @@ -198,15 +208,15 @@ struct brw_wm_compile { * simplifying and adding instructions for interpolation and * framebuffer writes. */ - struct prog_instruction prog_instructions[BRW_WM_MAX_INSN]; + struct ureg_instruction prog_instructions[BRW_WM_MAX_INSN]; GLuint nr_fp_insns; GLuint fp_temp; GLuint fp_interp_emitted; GLuint fp_fragcolor_emitted; - struct prog_src_register pixel_xy; - struct prog_src_register delta_xy; - struct prog_src_register pixel_w; + struct ureg_src pixel_xy; + struct ureg_src delta_xy; + struct ureg_src pixel_w; struct brw_wm_value vreg[BRW_WM_MAX_VREG]; @@ -217,7 +227,7 @@ struct brw_wm_compile { struct { struct brw_wm_value depth[4]; /* includes r0/r1 */ - struct brw_wm_value input_interp[FRAG_ATTRIB_MAX]; + struct brw_wm_value input_interp[PIPE_MAX_SHADER_INPUTS]; } payload; @@ -295,7 +305,7 @@ void brw_wm_lookup_iz( GLuint line_aa, GLboolean ps_uses_depth, struct brw_wm_prog_key *key ); -GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp); +//GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp); void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c); void emit_ddxy(struct brw_compile *p, diff --git a/src/gallium/drivers/i965/brw_wm_debug.c b/src/gallium/drivers/i965/brw_wm_debug.c index c6659646f2..04dec5ba39 100644 --- a/src/gallium/drivers/i965/brw_wm_debug.c +++ b/src/gallium/drivers/i965/brw_wm_debug.c @@ -41,21 +41,21 @@ void brw_wm_print_value( struct brw_wm_compile *c, if (c->state >= PASS2_DONE) brw_print_reg(value->hw_reg); else if( value == &c->undef_value ) - _mesa_printf("undef"); + debug_printf("undef"); else if( value - c->vreg >= 0 && value - c->vreg < BRW_WM_MAX_VREG) - _mesa_printf("r%d", value - c->vreg); + debug_printf("r%d", value - c->vreg); else if (value - c->creg >= 0 && value - c->creg < BRW_WM_MAX_PARAM) - _mesa_printf("c%d", value - c->creg); + debug_printf("c%d", value - c->creg); else if (value - c->payload.input_interp >= 0 && value - c->payload.input_interp < FRAG_ATTRIB_MAX) - _mesa_printf("i%d", value - c->payload.input_interp); + debug_printf("i%d", value - c->payload.input_interp); else if (value - c->payload.depth >= 0 && value - c->payload.depth < FRAG_ATTRIB_MAX) - _mesa_printf("d%d", value - c->payload.depth); + debug_printf("d%d", value - c->payload.depth); else - _mesa_printf("?"); + debug_printf("?"); } void brw_wm_print_ref( struct brw_wm_compile *c, @@ -64,16 +64,16 @@ void brw_wm_print_ref( struct brw_wm_compile *c, struct brw_reg hw_reg = ref->hw_reg; if (ref->unspill_reg) - _mesa_printf("UNSPILL(%x)/", ref->value->spill_slot); + debug_printf("UNSPILL(%x)/", ref->value->spill_slot); if (c->state >= PASS2_DONE) brw_print_reg(ref->hw_reg); else { - _mesa_printf("%s", hw_reg.negate ? "-" : ""); - _mesa_printf("%s", hw_reg.abs ? "abs/" : ""); + debug_printf("%s", hw_reg.negate ? "-" : ""); + debug_printf("%s", hw_reg.abs ? "abs/" : ""); brw_wm_print_value(c, ref->value); if ((hw_reg.nr&1) || hw_reg.subnr) { - _mesa_printf("->%d.%d", (hw_reg.nr&1), hw_reg.subnr); + debug_printf("->%d.%d", (hw_reg.nr&1), hw_reg.subnr); } } } @@ -84,22 +84,22 @@ void brw_wm_print_insn( struct brw_wm_compile *c, GLuint i, arg; GLuint nr_args = brw_wm_nr_args(inst->opcode); - _mesa_printf("["); + debug_printf("["); for (i = 0; i < 4; i++) { if (inst->dst[i]) { brw_wm_print_value(c, inst->dst[i]); if (inst->dst[i]->spill_slot) - _mesa_printf("/SPILL(%x)",inst->dst[i]->spill_slot); + debug_printf("/SPILL(%x)",inst->dst[i]->spill_slot); } else - _mesa_printf("#"); + debug_printf("#"); if (i < 3) - _mesa_printf(","); + debug_printf(","); } - _mesa_printf("]"); + debug_printf("]"); if (inst->writemask != BRW_WRITEMASK_XYZW) - _mesa_printf(".%s%s%s%s", + debug_printf(".%s%s%s%s", GET_BIT(inst->writemask, 0) ? "x" : "", GET_BIT(inst->writemask, 1) ? "y" : "", GET_BIT(inst->writemask, 2) ? "z" : "", @@ -107,58 +107,58 @@ void brw_wm_print_insn( struct brw_wm_compile *c, switch (inst->opcode) { case WM_PIXELXY: - _mesa_printf(" = PIXELXY"); + debug_printf(" = PIXELXY"); break; case WM_DELTAXY: - _mesa_printf(" = DELTAXY"); + debug_printf(" = DELTAXY"); break; case WM_PIXELW: - _mesa_printf(" = PIXELW"); + debug_printf(" = PIXELW"); break; case WM_WPOSXY: - _mesa_printf(" = WPOSXY"); + debug_printf(" = WPOSXY"); break; case WM_PINTERP: - _mesa_printf(" = PINTERP"); + debug_printf(" = PINTERP"); break; case WM_LINTERP: - _mesa_printf(" = LINTERP"); + debug_printf(" = LINTERP"); break; case WM_CINTERP: - _mesa_printf(" = CINTERP"); + debug_printf(" = CINTERP"); break; case WM_FB_WRITE: - _mesa_printf(" = FB_WRITE"); + debug_printf(" = FB_WRITE"); break; case WM_FRONTFACING: - _mesa_printf(" = FRONTFACING"); + debug_printf(" = FRONTFACING"); break; default: - _mesa_printf(" = %s", _mesa_opcode_string(inst->opcode)); + debug_printf(" = %s", _mesa_opcode_string(inst->opcode)); break; } if (inst->saturate) - _mesa_printf("_SAT"); + debug_printf("_SAT"); for (arg = 0; arg < nr_args; arg++) { - _mesa_printf(" ["); + debug_printf(" ["); for (i = 0; i < 4; i++) { if (inst->src[arg][i]) { brw_wm_print_ref(c, inst->src[arg][i]); } else - _mesa_printf("%%"); + debug_printf("%%"); if (i < 3) - _mesa_printf(","); + debug_printf(","); else - _mesa_printf("]"); + debug_printf("]"); } } - _mesa_printf("\n"); + debug_printf("\n"); } void brw_wm_print_program( struct brw_wm_compile *c, @@ -166,9 +166,9 @@ void brw_wm_print_program( struct brw_wm_compile *c, { GLuint insn; - _mesa_printf("%s:\n", stage); + debug_printf("%s:\n", stage); for (insn = 0; insn < c->nr_insns; insn++) brw_wm_print_insn(c, &c->instruction[insn]); - _mesa_printf("\n"); + debug_printf("\n"); } diff --git a/src/gallium/drivers/i965/brw_wm_emit.c b/src/gallium/drivers/i965/brw_wm_emit.c index 7df9b79d7a..5f7ae6592c 100644 --- a/src/gallium/drivers/i965/brw_wm_emit.c +++ b/src/gallium/drivers/i965/brw_wm_emit.c @@ -1481,7 +1481,7 @@ void brw_wm_emit( struct brw_wm_compile *c ) break; default: - _mesa_printf("Unsupported opcode %i (%s) in fragment shader\n", + debug_printf("Unsupported opcode %i (%s) in fragment shader\n", inst->opcode, inst->opcode < MAX_OPCODE ? _mesa_opcode_string(inst->opcode) : "unknown"); @@ -1494,12 +1494,12 @@ void brw_wm_emit( struct brw_wm_compile *c ) inst->dst[i]->spill_slot); } - if (INTEL_DEBUG & DEBUG_WM) { + if (BRW_DEBUG & DEBUG_WM) { int i; - _mesa_printf("wm-native:\n"); + debug_printf("wm-native:\n"); for (i = 0; i < p->nr_insn; i++) brw_disasm(stderr, &p->store[i]); - _mesa_printf("\n"); + debug_printf("\n"); } } diff --git a/src/gallium/drivers/i965/brw_wm_fp.c b/src/gallium/drivers/i965/brw_wm_fp.c index be240031c7..d594730730 100644 --- a/src/gallium/drivers/i965/brw_wm_fp.c +++ b/src/gallium/drivers/i965/brw_wm_fp.c @@ -142,7 +142,7 @@ static struct prog_dst_register get_temp( struct brw_wm_compile *c ) int bit = _mesa_ffs( ~c->fp_temp ); if (!bit) { - _mesa_printf("%s: out of temporaries\n", __FILE__); + debug_printf("%s: out of temporaries\n", __FILE__); exit(1); } @@ -977,7 +977,7 @@ static void print_insns( const struct prog_instruction *insn, { GLuint i; for (i = 0; i < nr; i++, insn++) { - _mesa_printf("%3d: ", i); + debug_printf("%3d: ", i); if (insn->Opcode < MAX_OPCODE) _mesa_print_instruction(insn); else if (insn->Opcode < MAX_WM_OPCODE) { @@ -988,7 +988,7 @@ static void print_insns( const struct prog_instruction *insn, 3); } else - _mesa_printf("965 Opcode %d\n", insn->Opcode); + debug_printf("965 Opcode %d\n", insn->Opcode); } } @@ -1002,10 +1002,10 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) struct brw_fragment_program *fp = c->fp; GLuint insn; - if (INTEL_DEBUG & DEBUG_WM) { - _mesa_printf("pre-fp:\n"); + if (BRW_DEBUG & DEBUG_WM) { + debug_printf("pre-fp:\n"); _mesa_print_program(&fp->program.Base); - _mesa_printf("\n"); + debug_printf("\n"); } c->pixel_xy = src_undef(); @@ -1103,10 +1103,10 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) } } - if (INTEL_DEBUG & DEBUG_WM) { - _mesa_printf("pass_fp:\n"); + if (BRW_DEBUG & DEBUG_WM) { + debug_printf("pass_fp:\n"); print_insns( c->prog_instructions, c->nr_fp_insns ); - _mesa_printf("\n"); + debug_printf("\n"); } } diff --git a/src/gallium/drivers/i965/brw_wm_glsl.c b/src/gallium/drivers/i965/brw_wm_glsl.c index a8de5fdd0b..3118e615f9 100644 --- a/src/gallium/drivers/i965/brw_wm_glsl.c +++ b/src/gallium/drivers/i965/brw_wm_glsl.c @@ -1694,7 +1694,7 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c) c->cur_inst = i; #if 0 - _mesa_printf("Inst %d: ", i); + debug_printf("Inst %d: ", i); _mesa_print_instruction(inst); #endif @@ -1920,7 +1920,7 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c) } break; default: - _mesa_printf("unsupported IR in fragment shader %d\n", + debug_printf("unsupported IR in fragment shader %d\n", inst->Opcode); } @@ -1931,11 +1931,11 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c) } post_wm_emit(c); - if (INTEL_DEBUG & DEBUG_WM) { - _mesa_printf("wm-native:\n"); + if (BRW_DEBUG & DEBUG_WM) { + debug_printf("wm-native:\n"); for (i = 0; i < p->nr_insn; i++) brw_disasm(stderr, &p->store[i]); - _mesa_printf("\n"); + debug_printf("\n"); } } @@ -1945,8 +1945,8 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c) */ void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c) { - if (INTEL_DEBUG & DEBUG_WM) { - _mesa_printf("brw_wm_glsl_emit:\n"); + if (BRW_DEBUG & DEBUG_WM) { + debug_printf("brw_wm_glsl_emit:\n"); } /* initial instruction translation/simplification */ @@ -1955,7 +1955,7 @@ void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c) /* actual code generation */ brw_wm_emit_glsl(brw, c); - if (INTEL_DEBUG & DEBUG_WM) { + if (BRW_DEBUG & DEBUG_WM) { brw_wm_print_program(c, "brw_wm_glsl_emit done"); } diff --git a/src/gallium/drivers/i965/brw_wm_pass0.c b/src/gallium/drivers/i965/brw_wm_pass0.c index 31b0270e84..71e4c56835 100644 --- a/src/gallium/drivers/i965/brw_wm_pass0.c +++ b/src/gallium/drivers/i965/brw_wm_pass0.c @@ -101,7 +101,7 @@ static const struct brw_wm_ref *get_param_ref( struct brw_wm_compile *c, GLuint i = c->prog_data.nr_params++; if (i >= BRW_WM_MAX_PARAM) { - _mesa_printf("%s: out of params\n", __FUNCTION__); + debug_printf("%s: out of params\n", __FUNCTION__); c->prog_data.error = 1; return NULL; } @@ -150,7 +150,7 @@ static const struct brw_wm_ref *get_imm_ref( struct brw_wm_compile *c, return c->imm_ref[i].ref; } else { - _mesa_printf("%s: out of imm_refs\n", __FUNCTION__); + debug_printf("%s: out of imm_refs\n", __FUNCTION__); c->prog_data.error = 1; return NULL; } @@ -434,7 +434,7 @@ void brw_wm_pass0( struct brw_wm_compile *c ) } } - if (INTEL_DEBUG & DEBUG_WM) { + if (BRW_DEBUG & DEBUG_WM) { brw_wm_print_program(c, "pass0"); } } diff --git a/src/gallium/drivers/i965/brw_wm_pass1.c b/src/gallium/drivers/i965/brw_wm_pass1.c index f2ae3a958f..85a3a55ca4 100644 --- a/src/gallium/drivers/i965/brw_wm_pass1.c +++ b/src/gallium/drivers/i965/brw_wm_pass1.c @@ -284,7 +284,7 @@ void brw_wm_pass1( struct brw_wm_compile *c ) track_arg(c, inst, 2, read2); } - if (INTEL_DEBUG & DEBUG_WM) { + if (BRW_DEBUG & DEBUG_WM) { brw_wm_print_program(c, "pass1"); } } diff --git a/src/gallium/drivers/i965/brw_wm_pass2.c b/src/gallium/drivers/i965/brw_wm_pass2.c index 6faea018fb..a19ca62328 100644 --- a/src/gallium/drivers/i965/brw_wm_pass2.c +++ b/src/gallium/drivers/i965/brw_wm_pass2.c @@ -331,13 +331,13 @@ void brw_wm_pass2( struct brw_wm_compile *c ) } } - if (INTEL_DEBUG & DEBUG_WM) { + if (BRW_DEBUG & DEBUG_WM) { brw_wm_print_program(c, "pass2"); } c->state = PASS2_DONE; - if (INTEL_DEBUG & DEBUG_WM) { + if (BRW_DEBUG & DEBUG_WM) { brw_wm_print_program(c, "pass2/done"); } } diff --git a/src/gallium/drivers/i965/brw_wm_sampler_state.c b/src/gallium/drivers/i965/brw_wm_sampler_state.c index a8993f9312..32692d533c 100644 --- a/src/gallium/drivers/i965/brw_wm_sampler_state.c +++ b/src/gallium/drivers/i965/brw_wm_sampler_state.c @@ -76,8 +76,9 @@ static GLint S_FIXED(GLfloat value, GLuint frac_bits) } -static struct brw_winsys_buffer *upload_default_color( struct brw_context *brw, - const GLfloat *color ) +static struct brw_winsys_buffer * +upload_default_color( struct brw_context *brw, + const GLfloat *color ) { struct brw_sampler_default_color sdc; @@ -117,63 +118,6 @@ static void brw_update_sampler_state(struct wm_sampler_entry *key, { _mesa_memset(sampler, 0, sizeof(*sampler)); - switch (key->minfilter) { - case GL_NEAREST: - sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST; - sampler->ss0.mip_filter = BRW_MIPFILTER_NONE; - break; - case GL_LINEAR: - sampler->ss0.min_filter = BRW_MAPFILTER_LINEAR; - sampler->ss0.mip_filter = BRW_MIPFILTER_NONE; - break; - case GL_NEAREST_MIPMAP_NEAREST: - sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST; - sampler->ss0.mip_filter = BRW_MIPFILTER_NEAREST; - break; - case GL_LINEAR_MIPMAP_NEAREST: - sampler->ss0.min_filter = BRW_MAPFILTER_LINEAR; - sampler->ss0.mip_filter = BRW_MIPFILTER_NEAREST; - break; - case GL_NEAREST_MIPMAP_LINEAR: - sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST; - sampler->ss0.mip_filter = BRW_MIPFILTER_LINEAR; - break; - case GL_LINEAR_MIPMAP_LINEAR: - sampler->ss0.min_filter = BRW_MAPFILTER_LINEAR; - sampler->ss0.mip_filter = BRW_MIPFILTER_LINEAR; - break; - default: - break; - } - - /* Set Anisotropy: - */ - if (key->max_aniso > 1.0) { - sampler->ss0.min_filter = BRW_MAPFILTER_ANISOTROPIC; - sampler->ss0.mag_filter = BRW_MAPFILTER_ANISOTROPIC; - - if (key->max_aniso > 2.0) { - sampler->ss3.max_aniso = MIN2((key->max_aniso - 2) / 2, - BRW_ANISORATIO_16); - } - } - else { - switch (key->magfilter) { - case GL_NEAREST: - sampler->ss0.mag_filter = BRW_MAPFILTER_NEAREST; - break; - case GL_LINEAR: - sampler->ss0.mag_filter = BRW_MAPFILTER_LINEAR; - break; - default: - break; - } - } - - sampler->ss1.r_wrap_mode = translate_wrap_mode(key->wrap_r); - sampler->ss1.s_wrap_mode = translate_wrap_mode(key->wrap_s); - sampler->ss1.t_wrap_mode = translate_wrap_mode(key->wrap_t); - /* Cube-maps on 965 and later must use the same wrap mode for all 3 * coordinate dimensions. Futher, only CUBE and CLAMP are valid. */ @@ -198,36 +142,7 @@ static void brw_update_sampler_state(struct wm_sampler_entry *key, } - /* Set shadow function: - */ - if (key->comparemode == GL_COMPARE_R_TO_TEXTURE_ARB) { - /* Shadowing is "enabled" by emitting a particular sampler - * message (sample_c). So need to recompile WM program when - * shadow comparison is enabled on each/any texture unit. - */ - sampler->ss0.shadow_function = - intel_translate_shadow_compare_func(key->comparefunc); - } - - /* Set LOD bias: - */ - sampler->ss0.lod_bias = S_FIXED(CLAMP(key->lod_bias, -16, 15), 6); - - sampler->ss0.lod_preclamp = 1; /* OpenGL mode */ - sampler->ss0.default_color_mode = 0; /* OpenGL/DX10 mode */ - - /* Set BaseMipLevel, MaxLOD, MinLOD: - * - * XXX: I don't think that using firstLevel, lastLevel works, - * because we always setup the surface state as if firstLevel == - * level zero. Probably have to subtract firstLevel from each of - * these: - */ - sampler->ss0.base_level = U_FIXED(0, 1); - sampler->ss1.max_lod = U_FIXED(MIN2(MAX2(key->maxlod, 0), 13), 6); - sampler->ss1.min_lod = U_FIXED(MIN2(MAX2(key->minlod, 0), 13), 6); - sampler->ss2.default_color_pointer = sdc_bo->offset >> 5; /* reloc */ } @@ -237,57 +152,42 @@ static void brw_wm_sampler_populate_key(struct brw_context *brw, struct wm_sampler_key *key) { - int unit; + int nr = MIN2(brw->curr.number_textures, + brw->curr.number_samplers); + int i; memset(key, 0, sizeof(*key)); - for (unit = 0; unit < BRW_MAX_TEX_UNIT; unit++) { - if (ctx->Texture.Unit[unit]._ReallyEnabled) { - struct wm_sampler_entry *entry = &key->sampler[unit]; - struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; - struct gl_texture_object *texObj = texUnit->_Current; - struct intel_texture_object *intelObj = intel_texture_object(texObj); - struct gl_texture_image *firstImage = - texObj->Image[0][intelObj->firstLevel]; - - entry->tex_target = texObj->Target; - - entry->seamless_cube_map = (texObj->Target == GL_TEXTURE_CUBE_MAP) - ? ctx->Texture.CubeMapSeamless : GL_FALSE; - - entry->wrap_r = texObj->WrapR; - entry->wrap_s = texObj->WrapS; - entry->wrap_t = texObj->WrapT; - - entry->maxlod = texObj->MaxLod; - entry->minlod = texObj->MinLod; - entry->lod_bias = texUnit->LodBias + texObj->LodBias; - entry->max_aniso = texObj->MaxAnisotropy; - entry->minfilter = texObj->MinFilter; - entry->magfilter = texObj->MagFilter; - entry->comparemode = texObj->CompareMode; - entry->comparefunc = texObj->CompareFunc; - - brw->sws->bo_unreference(brw->wm.sdc_bo[unit]); - if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) { - float bordercolor[4] = { - texObj->BorderColor[0], - texObj->BorderColor[0], - texObj->BorderColor[0], - texObj->BorderColor[0] - }; - /* GL specs that border color for depth textures is taken from the - * R channel, while the hardware uses A. Spam R into all the - * channels for safety. - */ - brw->wm.sdc_bo[unit] = upload_default_color(brw, bordercolor); - } else { - brw->wm.sdc_bo[unit] = upload_default_color(brw, - texObj->BorderColor); - } - key->sampler_count = unit + 1; + for (i = 0; i < nr; i++) { + const struct brw_texture *tex = brw->curr.texture[i]; + const struct brw_sampler *sampler = brw->curr.sampler[i]; + struct wm_sampler_entry *entry = &key->sampler[i]; + + entry->tex_target = texObj->Target; + entry->seamless_cube_map = FALSE; /* XXX: add this to gallium */ + entry->ss0 = sampler->ss0; + entry->ss1 = sampler->ss1; + entry->ss3 = sampler->ss3; + + brw->sws->bo_unreference(brw->wm.sdc_bo[i]); + if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) { + float bordercolor[4] = { + texObj->BorderColor[0], + texObj->BorderColor[0], + texObj->BorderColor[0], + texObj->BorderColor[0] + }; + /* GL specs that border color for depth textures is taken from the + * R channel, while the hardware uses A. Spam R into all the + * channels for safety. + */ + brw->wm.sdc_bo[i] = upload_default_color(brw, bordercolor); + } else { + brw->wm.sdc_bo[i] = upload_default_color(brw, texObj->BorderColor); } } + + key->sampler_count = nr; } /* All samplers must be uploaded in a single contiguous array, which @@ -354,7 +254,7 @@ static void upload_wm_samplers( struct brw_context *brw ) const struct brw_tracked_state brw_wm_samplers = { .dirty = { - .mesa = _NEW_TEXTURE, + .mesa = PIPE_NEW_BOUND_TEXTURES | PIPE_NEW_SAMPLER, .brw = 0, .cache = 0 }, diff --git a/src/gallium/drivers/i965/brw_wm_state.c b/src/gallium/drivers/i965/brw_wm_state.c index 4989aae830..edabf6ceb6 100644 --- a/src/gallium/drivers/i965/brw_wm_state.c +++ b/src/gallium/drivers/i965/brw_wm_state.c @@ -65,7 +65,7 @@ wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key) memset(key, 0, sizeof(*key)); - if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) + if (BRW_DEBUG & DEBUG_SINGLE_THREAD) key->max_threads = 1; else { /* WM maximum threads is number of EUs times number of threads per EU. */ @@ -120,7 +120,7 @@ wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key) ASSERT(bfp->isGLSL == brw_wm_is_glsl(fp)); /* _NEW_QUERY */ - key->stats_wm = intel->stats_wm; + key->stats_wm = (brw->query.stats_wm != 0); /* _NEW_LINE */ key->line_stipple = ctx->Line.StippleFlag; @@ -215,7 +215,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, wm.wm5.line_stipple = key->line_stipple; - if (INTEL_DEBUG & DEBUG_STATS || key->stats_wm) + if (BRW_DEBUG & DEBUG_STATS || key->stats_wm) wm.wm4.stats_enable = 1; bo = brw_upload_cache(&brw->cache, BRW_WM_UNIT, -- cgit v1.2.3 From 81b8589f064204d9ddcd7d1f9d43d2dcf5676235 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Wed, 28 Oct 2009 21:24:03 +0000 Subject: i965g: still working on compilation --- src/gallium/drivers/i965/brw_vs.c | 2 +- src/gallium/drivers/i965/brw_vs.h | 3 + src/gallium/drivers/i965/brw_vs_emit.c | 199 +++++++++++++++++------- src/gallium/drivers/i965/brw_vs_state.c | 25 +-- src/gallium/drivers/i965/brw_vs_surface_state.c | 33 +++- src/gallium/drivers/i965/brw_wm.c | 36 +++-- 6 files changed, 208 insertions(+), 90 deletions(-) (limited to 'src/gallium/drivers/i965/brw_vs_state.c') diff --git a/src/gallium/drivers/i965/brw_vs.c b/src/gallium/drivers/i965/brw_vs.c index 3965ca6c54..26a28114d9 100644 --- a/src/gallium/drivers/i965/brw_vs.c +++ b/src/gallium/drivers/i965/brw_vs.c @@ -57,7 +57,7 @@ static void do_vs_prog( struct brw_context *brw, c.prog_data.nr_inputs = vp->info.num_inputs; c.prog_data.copy_edgeflag = c.key.copy_edgeflag; - if (0) + if (1) tgsi_dump(c.vp->tokens, 0); /* Emit GEN4 code. diff --git a/src/gallium/drivers/i965/brw_vs.h b/src/gallium/drivers/i965/brw_vs.h index 2a2dbb3457..b4e450d89b 100644 --- a/src/gallium/drivers/i965/brw_vs.h +++ b/src/gallium/drivers/i965/brw_vs.h @@ -60,6 +60,9 @@ struct brw_vs_compile { GLuint nr_inputs; GLuint nr_outputs; + GLuint nr_immediates; + GLfloat immediate[128][4]; + GLboolean copy_edgeflag; GLuint first_output; diff --git a/src/gallium/drivers/i965/brw_vs_emit.c b/src/gallium/drivers/i965/brw_vs_emit.c index 5366ab8514..6809bccdec 100644 --- a/src/gallium/drivers/i965/brw_vs_emit.c +++ b/src/gallium/drivers/i965/brw_vs_emit.c @@ -34,8 +34,7 @@ #include "util/u_memory.h" #include "util/u_math.h" -#include "tgsi/tgsi_ureg.h" -#include "tgsi/tgsi_ureg_parse.h" +#include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_dump.h" #include "tgsi/tgsi_info.h" @@ -67,6 +66,7 @@ static void release_tmps( struct brw_vs_compile *c ) } + /** * Preallocate GRF register before code emit. * Do things as simply as possible. Allocate and populate all regs @@ -83,10 +83,17 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) * XXX this heuristic/check may need some fine tuning... */ if (c->vp->info.file_max[TGSI_FILE_CONSTANT] + + c->vp->info.file_max[TGSI_FILE_IMMEDIATE] + c->vp->info.file_max[TGSI_FILE_TEMPORARY] + 21 > BRW_MAX_GRF) c->vp->use_const_buffer = GL_TRUE; - else + else { + /* XXX: immediates can go elsewhere if necessary: + */ + assert(c->vp->info.file_max[TGSI_FILE_IMMEDIATE] + + c->vp->info.file_max[TGSI_FILE_TEMPORARY] + 21 > BRW_MAX_GRF); + c->vp->use_const_buffer = GL_FALSE; + } /*printf("use_const_buffer = %d\n", c->vp->use_const_buffer);*/ @@ -139,6 +146,29 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) if (c->nr_inputs == 0) reg++; + /* Allocate a GRF and load immediate values by hand with 4 MOVs!!! + * + * XXX: Try to encode float immediates as brw immediates + * XXX: Put immediates into the CURBE. + * XXX: Make sure ureg sets minimal immediate size and respect it + * here. + */ + for (i = 0; i < c->nr_immediates; i++) { + struct brw_reg r; + int j; + + r = brw_vec8_grf(reg, 0); + + for (j = 0; j < 4; j++) { + brw_MOV(&c->func, + brw_writemask(r, (1<immediate[i][j])); + } + + reg++; + } + + /* Allocate outputs. The non-position outputs go straight into message regs. */ c->nr_outputs = 0; @@ -754,21 +784,20 @@ static void emit_nrm( struct brw_vs_compile *c, static struct brw_reg get_constant(struct brw_vs_compile *c, - const struct ureg_instruction *inst, - GLuint argIndex) + GLuint argIndex, + GLuint index, + GLboolean relAddr) { - const struct ureg_src src = inst->src[argIndex]; struct brw_compile *p = &c->func; struct brw_reg const_reg; struct brw_reg const2_reg; - const GLboolean relAddr = src.Indirect; assert(argIndex < 3); - if (c->current_const[argIndex].index != src.Index || relAddr) { + if (c->current_const[argIndex].index != index || relAddr) { struct brw_reg addrReg = c->regs[TGSI_FILE_ADDRESS][0]; - c->current_const[argIndex].index = src.Index; + c->current_const[argIndex].index = index; #if 0 printf(" fetch const[%d] for arg %d into reg %d\n", @@ -780,7 +809,7 @@ get_constant(struct brw_vs_compile *c, 0, /* oword */ relAddr, /* relative indexing? */ addrReg, /* address register */ - 16 * src.Index, /* byte offset */ + 16 * index, /* byte offset */ SURF_INDEX_VERT_CONST_BUFFER /* binding table index */ ); @@ -797,7 +826,7 @@ get_constant(struct brw_vs_compile *c, 1, /* oword */ relAddr, /* relative indexing? */ addrReg, /* address register */ - 16 * src.Index, /* byte offset */ + 16 * index, /* byte offset */ SURF_INDEX_VERT_CONST_BUFFER ); } @@ -894,12 +923,11 @@ static struct brw_reg deref( struct brw_vs_compile *c, */ static struct brw_reg get_src_reg( struct brw_vs_compile *c, - const struct ureg_instruction *inst, - GLuint argIndex ) + GLuint argIndex, + GLuint file, + GLint index, + GLboolean relAddr ) { - const GLuint file = inst->src[argIndex].File; - const GLint index = inst->src[argIndex].Index; - const GLboolean relAddr = inst->src[argIndex].Indirect; switch (file) { case TGSI_FILE_TEMPORARY: @@ -913,9 +941,12 @@ get_src_reg( struct brw_vs_compile *c, return c->regs[file][index]; } + case TGSI_FILE_IMMEDIATE: + return c->regs[file][index]; + case TGSI_FILE_CONSTANT: if (c->vp->use_const_buffer) { - return get_constant(c, inst, argIndex); + return get_constant(c, argIndex, index, relAddr); } else if (relAddr) { return deref(c, c->regs[TGSI_FILE_CONSTANT][0], index); @@ -962,27 +993,32 @@ static void emit_arl( struct brw_vs_compile *c, * Return the brw reg for the given instruction's src argument. */ static struct brw_reg get_arg( struct brw_vs_compile *c, - const struct ureg_instruction *inst, + const struct tgsi_full_src_register *src, GLuint argIndex ) { - const struct ureg_src src = inst->src[argIndex]; struct brw_reg reg; - if (src.File == TGSI_FILE_NULL) + if (src->SrcRegister.File == TGSI_FILE_NULL) return brw_null_reg(); - reg = get_src_reg(c, inst, argIndex); + reg = get_src_reg(c, argIndex, + src->SrcRegister.File, + src->SrcRegister.Index, + src->SrcRegister.Indirect); /* Convert 3-bit swizzle to 2-bit. */ - reg.dw1.bits.swizzle = BRW_SWIZZLE4(src.SwizzleX, - src.SwizzleY, - src.SwizzleZ, - src.SwizzleW); + reg.dw1.bits.swizzle = BRW_SWIZZLE4(src->SrcRegister.SwizzleX, + src->SrcRegister.SwizzleY, + src->SrcRegister.SwizzleZ, + src->SrcRegister.SwizzleW); /* Note this is ok for non-swizzle instructions: */ - reg.negate = src.Negate ? 1 : 0; + reg.negate = src->SrcRegister.Negate ? 1 : 0; + + /* XXX: abs, absneg + */ return reg; } @@ -992,19 +1028,21 @@ static struct brw_reg get_arg( struct brw_vs_compile *c, * Get brw register for the given program dest register. */ static struct brw_reg get_dst( struct brw_vs_compile *c, - struct ureg_dst dst ) + unsigned file, + unsigned index, + unsigned writemask ) { struct brw_reg reg; - switch (dst.File) { + switch (file) { case TGSI_FILE_TEMPORARY: case TGSI_FILE_OUTPUT: - assert(c->regs[dst.File][dst.Index].nr != 0); - reg = c->regs[dst.File][dst.Index]; + assert(c->regs[file][index].nr != 0); + reg = c->regs[file][index]; break; case TGSI_FILE_ADDRESS: - assert(dst.Index == 0); - reg = c->regs[dst.File][dst.Index]; + assert(index == 0); + reg = c->regs[file][index]; break; case TGSI_FILE_NULL: /* we may hit this for OPCODE_END, OPCODE_KIL, etc */ @@ -1015,7 +1053,7 @@ static struct brw_reg get_dst( struct brw_vs_compile *c, reg = brw_null_reg(); } - reg.dw1.bits.writemask = dst.WriteMask; + reg.dw1.bits.writemask = writemask; return reg; } @@ -1199,7 +1237,7 @@ post_vs_emit( struct brw_vs_compile *c, } static uint32_t -get_predicate(const struct ureg_instruction *inst) +get_predicate(const struct tgsi_full_instruction *inst) { /* XXX: disabling for now */ @@ -1242,8 +1280,10 @@ get_predicate(const struct ureg_instruction *inst) } static void emit_insn(struct brw_vs_compile *c, - const struct ureg_instruction *inst) + const struct tgsi_full_instruction *inst) { + unsigned opcode = inst->Instruction.Opcode; + unsigned label = inst->InstructionExtLabel.Label; struct brw_compile *p = &c->func; struct brw_reg args[3], dst; GLuint i; @@ -1256,20 +1296,25 @@ static void emit_insn(struct brw_vs_compile *c, /* Get argument regs. */ for (i = 0; i < 3; i++) { - args[i] = get_arg(c, inst, i); + args[i] = get_arg(c, &inst->FullSrcRegisters[i], i); } /* Get dest regs. Note that it is possible for a reg to be both * dst and arg, given the static allocation of registers. So * care needs to be taken emitting multi-operation instructions. */ - dst = get_dst(c, inst->dst); + dst = get_dst(c, + inst->FullDstRegisters[0].DstRegister.File, + inst->FullDstRegisters[0].DstRegister.Index, + inst->FullDstRegisters[0].DstRegister.WriteMask); - if (inst->dst.Saturate) { + /* XXX: saturate + */ + if (inst->Instruction.Saturate != TGSI_SAT_NONE) { debug_printf("Unsupported saturate in vertex shader"); } - switch (inst->opcode) { + switch (opcode) { case TGSI_OPCODE_ABS: brw_MOV(p, dst, brw_abs(args[0])); break; @@ -1443,7 +1488,7 @@ static void emit_insn(struct brw_vs_compile *c, brw_set_access_mode(p, BRW_ALIGN_16); brw_ADD(p, get_addr_reg(c->stack_index), get_addr_reg(c->stack_index), brw_imm_d(4)); - brw_save_call(p, inst->label, p->nr_insn); + brw_save_call(p, label, p->nr_insn); brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16)); break; case TGSI_OPCODE_RET: @@ -1468,8 +1513,8 @@ static void emit_insn(struct brw_vs_compile *c, break; default: debug_printf("Unsupported opcode %i (%s) in vertex shader", - inst->opcode, - tgsi_get_opcode_name(inst->opcode)); + opcode, + tgsi_get_opcode_name(opcode)); } /* Set the predication update on the last instruction of the native @@ -1498,11 +1543,12 @@ static void emit_insn(struct brw_vs_compile *c, void brw_vs_emit(struct brw_vs_compile *c) { struct brw_compile *p = &c->func; + const struct tgsi_token *tokens = c->vp->tokens; struct brw_instruction *end_inst, *last_inst; - struct ureg_parse_context parse; - struct ureg_declaration *decl; - struct ureg_declaration *imm; - struct ureg_declaration *insn; + struct tgsi_parse_context parse; + struct tgsi_full_instruction *inst; + boolean done = FALSE; + int i; if (BRW_DEBUG & DEBUG_VS) tgsi_dump(c->vp->tokens, 0); @@ -1512,21 +1558,66 @@ void brw_vs_emit(struct brw_vs_compile *c) brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_access_mode(p, BRW_ALIGN_16); + /* Inputs */ + tgsi_parse_init( &parse, tokens ); + while( !tgsi_parse_end_of_tokens( &parse ) ) { + tgsi_parse_token( &parse ); + + switch( parse.FullToken.Token.Type ) { + case TGSI_TOKEN_TYPE_DECLARATION: + /* Nothing to do -- using info from tgsi_scan(). + */ + break; + + case TGSI_TOKEN_TYPE_IMMEDIATE: { + static const float id[4] = {0,0,0,1}; + const float *imm = &parse.FullToken.FullImmediate.u[i].Float; + unsigned size = parse.FullToken.FullImmediate.Immediate.NrTokens - 1; + + for (i = 0; i < size; i++) + c->immediate[c->nr_immediates][i] = imm[i]; + + for ( ; i < 4; i++) + c->immediate[c->nr_immediates][i] = id[i]; + + c->nr_immediates++; + break; + } + + case TGSI_TOKEN_TYPE_INSTRUCTION: + done = 1; + break; + } + } + /* Static register allocation */ brw_vs_alloc_regs(c); brw_MOV(p, get_addr_reg(c->stack_index), brw_address(c->stack)); - while (ureg_next_decl(&parse, &decl)) { - } - - while (ureg_next_immediate(&parse, &imm)) { - } - - while (ureg_next_instruction(&parse, &insn)) { + /* Instructions + */ + tgsi_parse_init( &parse, tokens ); + while( !tgsi_parse_end_of_tokens( &parse ) ) { + tgsi_parse_token( &parse ); + + switch( parse.FullToken.Token.Type ) { + case TGSI_TOKEN_TYPE_DECLARATION: + case TGSI_TOKEN_TYPE_IMMEDIATE: + break; + + case TGSI_TOKEN_TYPE_INSTRUCTION: + inst = &parse.FullToken.FullInstruction; + emit_insn( c, inst ); + break; + + default: + assert( 0 ); + } } + tgsi_parse_free( &parse ); - end_inst = &p->store[end_offset]; + end_inst = &p->store[c->end_offset]; last_inst = &p->store[p->nr_insn]; /* The END instruction will be patched to jump to this code */ diff --git a/src/gallium/drivers/i965/brw_vs_state.c b/src/gallium/drivers/i965/brw_vs_state.c index 05a91f2de4..549696f7ae 100644 --- a/src/gallium/drivers/i965/brw_vs_state.c +++ b/src/gallium/drivers/i965/brw_vs_state.c @@ -29,8 +29,10 @@ * Keith Whitwell */ +#include "util/u_math.h" +#include "brw_debug.h" #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" @@ -64,8 +66,8 @@ vs_unit_populate_key(struct brw_context *brw, struct brw_vs_unit_key *key) /* BRW_NEW_NR_VS_SURFACES */ key->nr_surfaces = brw->vs.nr_surfaces; - /* BRW_NEW_CURBE_OFFSETS, _NEW_TRANSFORM */ - if (ctx->Transform.ClipPlanesEnabled) { + /* PIPE_NEW_CLIP */ + if (brw->curr.ucp.nr) { /* Note that we read in the userclip planes as well, hence * clip_start: */ @@ -86,7 +88,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) memset(&vs, 0, sizeof(vs)); vs.thread0.kernel_start_pointer = brw->vs.prog_bo->offset >> 6; /* reloc */ - vs.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1; + vs.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; vs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; /* Choosing multiple program flow means that we may get 2-vertex threads, * which will have the channel mask for dwords 4-7 enabled in the thread, @@ -119,6 +121,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) chipset_max_threads = 32; else chipset_max_threads = 16; + vs.thread4.max_threads = CLAMP(key->nr_urb_entries / 2, 1, chipset_max_threads) - 1; @@ -145,16 +148,16 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) NULL, NULL); /* Emit VS program relocation */ - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - vs.thread0.grf_reg_count << 1, - offsetof(struct brw_vs_unit_state, thread0), - brw->vs.prog_bo); + brw->sws->bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + vs.thread0.grf_reg_count << 1, + offsetof(struct brw_vs_unit_state, thread0), + brw->vs.prog_bo); return bo; } -static void prepare_vs_unit(struct brw_context *brw) +static int prepare_vs_unit(struct brw_context *brw) { struct brw_vs_unit_key key; @@ -168,11 +171,13 @@ static void prepare_vs_unit(struct brw_context *brw) if (brw->vs.state_bo == NULL) { brw->vs.state_bo = vs_unit_create_from_key(brw, &key); } + + return 0; } const struct brw_tracked_state brw_vs_unit = { .dirty = { - .mesa = _NEW_TRANSFORM, + .mesa = (PIPE_NEW_CLIP), .brw = (BRW_NEW_CURBE_OFFSETS | BRW_NEW_NR_VS_SURFACES | BRW_NEW_URB_FENCE), diff --git a/src/gallium/drivers/i965/brw_vs_surface_state.c b/src/gallium/drivers/i965/brw_vs_surface_state.c index 319e29bfcb..9a9d47a8a3 100644 --- a/src/gallium/drivers/i965/brw_vs_surface_state.c +++ b/src/gallium/drivers/i965/brw_vs_surface_state.c @@ -32,6 +32,11 @@ #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" +#include "brw_winsys.h" + +/* XXX: disabled true constant buffer functionality + */ + /* Creates a new VS constant buffer reflecting the current VS program's * constants, if needed by the VS program. @@ -39,9 +44,12 @@ * Otherwise, constants go through the CURBEs using the brw_constant_buffer * state atom. */ -static drm_intel_bo * +#if 0 +static struct brw_winsys_buffer * brw_vs_update_constant_buffer(struct brw_context *brw) { + /* XXX: true constant buffers + */ struct brw_vertex_program *vp = (struct brw_vertex_program *) brw->vertex_program; const struct gl_program_parameter_list *params = vp->program.Base.Parameters; @@ -61,21 +69,20 @@ brw_vs_update_constant_buffer(struct brw_context *brw) return const_buffer; } +#endif /** * Update the surface state for a VS constant buffer. * * Sets brw->vs.surf_bo[surf] and brw->vp->const_buffer. */ +#if 0 static void brw_update_vs_constant_surface( struct brw_context *brw, GLuint surf) { - struct brw_context *brw = brw_context(ctx); struct brw_surface_key key; - struct brw_vertex_program *vp = - (struct brw_vertex_program *) brw->vertex_program; - const struct gl_program_parameter_list *params = vp->program.Base.Parameters; + struct pipe_buffer *cb = brw->curr.vs_constants; assert(surf == 0); @@ -121,6 +128,7 @@ brw_update_vs_constant_surface( struct brw_context *brw, brw->vs.surf_bo[surf] = brw_create_constant_surface(brw, &key); } } +#endif /** @@ -129,6 +137,7 @@ brw_update_vs_constant_surface( struct brw_context *brw, static struct brw_winsys_buffer * brw_vs_get_binding_table(struct brw_context *brw) { +#if 0 struct brw_winsys_buffer *bind_bo; bind_bo = brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND, @@ -169,6 +178,9 @@ brw_vs_get_binding_table(struct brw_context *brw) } return bind_bo; +#else + return NULL; +#endif } /** @@ -178,8 +190,9 @@ brw_vs_get_binding_table(struct brw_context *brw) * to be updated, and produces BRW_NEW_NR_VS_SURFACES for the VS unit and * CACHE_NEW_SURF_BIND for the binding table upload. */ -static void prepare_vs_surfaces(struct brw_context *brw ) +static int prepare_vs_surfaces(struct brw_context *brw ) { +#if 0 int i; int nr_surfaces = 0; @@ -195,6 +208,7 @@ static void prepare_vs_surfaces(struct brw_context *brw ) brw->state.dirty.brw |= BRW_NEW_NR_VS_SURFACES; brw->vs.nr_surfaces = nr_surfaces; } +#endif /* Note that we don't end up updating the bind_bo if we don't have a * surface to be pointing at. This should be relatively harmless, as it @@ -204,12 +218,15 @@ static void prepare_vs_surfaces(struct brw_context *brw ) brw->sws->bo_unreference(brw->vs.bind_bo); brw->vs.bind_bo = brw_vs_get_binding_table(brw); } + + return 0; } const struct brw_tracked_state brw_vs_surfaces = { .dirty = { - .mesa = (_NEW_PROGRAM_CONSTANTS), - .brw = (BRW_NEW_VERTEX_PROGRAM), + .mesa = (PIPE_NEW_VERTEX_CONSTANTS | + PIPE_NEW_VERTEX_SHADER), + .brw = 0, .cache = 0 }, .prepare = prepare_vs_surfaces, diff --git a/src/gallium/drivers/i965/brw_wm.c b/src/gallium/drivers/i965/brw_wm.c index 3d889699f8..f0dabfcfd0 100644 --- a/src/gallium/drivers/i965/brw_wm.c +++ b/src/gallium/drivers/i965/brw_wm.c @@ -28,11 +28,14 @@ * Authors: * Keith Whitwell */ - + +#include "tgsi/tgsi_info.h" + #include "brw_context.h" #include "brw_util.h" #include "brw_wm.h" #include "brw_state.h" +#include "brw_debug.h" /** Return number of src args for given instruction */ @@ -54,7 +57,7 @@ GLuint brw_wm_nr_args( GLuint opcode ) return 3; default: assert(opcode < MAX_OPCODE); - return _mesa_num_inst_src_regs(opcode); + return tgsi_get_opcode_info(opcode)->num_src; } } @@ -62,17 +65,17 @@ GLuint brw_wm_nr_args( GLuint opcode ) GLuint brw_wm_is_scalar_result( GLuint opcode ) { switch (opcode) { - case OPCODE_COS: - case OPCODE_EX2: - case OPCODE_LG2: - case OPCODE_POW: - case OPCODE_RCP: - case OPCODE_RSQ: - case OPCODE_SIN: - case OPCODE_DP3: - case OPCODE_DP4: - case OPCODE_DPH: - case OPCODE_DST: + case TGSI_OPCODE_COS: + case TGSI_OPCODE_EX2: + case TGSI_OPCODE_LG2: + case TGSI_OPCODE_POW: + case TGSI_OPCODE_RCP: + case TGSI_OPCODE_RSQ: + case TGSI_OPCODE_SIN: + case TGSI_OPCODE_DP3: + case TGSI_OPCODE_DP4: + case TGSI_OPCODE_DPH: + case TGSI_OPCODE_DST: return 1; default: @@ -134,7 +137,7 @@ brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c) * we'll use one of two code generators. */ static void do_wm_prog( struct brw_context *brw, - struct brw_fragment_program *fp, + struct brw_fragment_shader *fp, struct brw_wm_prog_key *key) { struct brw_wm_compile *c; @@ -163,7 +166,7 @@ static void do_wm_prog( struct brw_context *brw, brw_init_compile(brw, &c->func); /* temporary sanity check assertion */ - ASSERT(fp->isGLSL == brw_wm_is_glsl(&c->fp->program)); + assert(fp->isGLSL == brw_wm_is_glsl(&c->fp->program)); /* * Shader which use GLSL features such as flow control are handled @@ -200,8 +203,7 @@ static void brw_wm_populate_key( struct brw_context *brw, struct brw_wm_prog_key *key ) { /* BRW_NEW_FRAGMENT_PROGRAM */ - const struct brw_fragment_program *fp = - (struct brw_fragment_program *)brw->fragment_program; + const struct brw_fragment_program *fp = brw->curr.fragment_shader; GLboolean uses_depth = (fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0; GLuint lookup = 0; GLuint line_aa; -- cgit v1.2.3 From 15a8ac2c9d6ed13468ef88f3f3bd3ccf4ee2fd0e Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Sun, 1 Nov 2009 19:30:53 +0000 Subject: i965g: driver and winsys compile A milestone of sorts. Still a long way from something working -- the old one compiled too, at least some of the time... --- src/gallium/drivers/i965/brw_batchbuffer.c | 11 +- src/gallium/drivers/i965/brw_cc.c | 2 +- src/gallium/drivers/i965/brw_clip_state.c | 2 +- src/gallium/drivers/i965/brw_gs_state.c | 2 +- src/gallium/drivers/i965/brw_screen_texture.c | 6 +- src/gallium/drivers/i965/brw_sf_state.c | 4 +- src/gallium/drivers/i965/brw_state_dump.c | 6 +- src/gallium/drivers/i965/brw_vs_state.c | 2 +- src/gallium/drivers/i965/brw_winsys.h | 39 +-- src/gallium/drivers/i965/brw_wm_sampler_state.c | 2 +- src/gallium/drivers/i965/brw_wm_state.c | 6 +- src/gallium/drivers/i965/brw_wm_surface_state.c | 4 +- src/gallium/winsys/drm/i965/gem/Makefile | 4 +- src/gallium/winsys/drm/i965/gem/SConscript | 2 - src/gallium/winsys/drm/i965/gem/i965_drm_api.c | 105 ++++---- .../winsys/drm/i965/gem/i965_drm_batchbuffer.c | 244 ------------------ src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c | 287 ++++++++++++++------- src/gallium/winsys/drm/i965/gem/i965_drm_fence.c | 81 ------ src/gallium/winsys/drm/i965/gem/i965_drm_winsys.h | 50 ++-- 19 files changed, 308 insertions(+), 551 deletions(-) delete mode 100644 src/gallium/winsys/drm/i965/gem/i965_drm_batchbuffer.c delete mode 100644 src/gallium/winsys/drm/i965/gem/i965_drm_fence.c (limited to 'src/gallium/drivers/i965/brw_vs_state.c') diff --git a/src/gallium/drivers/i965/brw_batchbuffer.c b/src/gallium/drivers/i965/brw_batchbuffer.c index 080c92046b..72650cdb5d 100644 --- a/src/gallium/drivers/i965/brw_batchbuffer.c +++ b/src/gallium/drivers/i965/brw_batchbuffer.c @@ -36,7 +36,6 @@ #include "brw_debug.h" #include "brw_structs.h" -#define BATCH_SIZE (32*1024) #define USE_LOCAL_BUFFER 1 #define ALWAYS_EMIT_MI_FLUSH 1 @@ -49,17 +48,17 @@ brw_batchbuffer_reset(struct brw_batchbuffer *batch) } if (USE_LOCAL_BUFFER && !batch->buffer) - batch->buffer = MALLOC(BATCH_SIZE); + batch->buffer = MALLOC(BRW_BATCH_SIZE); batch->buf = batch->sws->bo_alloc(batch->sws, BRW_BUFFER_TYPE_BATCH, - BATCH_SIZE, 4096); + BRW_BATCH_SIZE, 4096); if (batch->buffer) batch->map = batch->buffer; else batch->map = batch->sws->bo_map(batch->buf, GL_TRUE); - batch->size = BATCH_SIZE; + batch->size = BRW_BATCH_SIZE; batch->ptr = batch->map; } @@ -132,7 +131,7 @@ _brw_batchbuffer_flush(struct brw_batchbuffer *batch, batch->map = NULL; batch->ptr = NULL; - batch->sws->bo_exec(batch->buf, used, NULL, 0, 0 ); + batch->sws->bo_exec(batch->buf, used ); #if 0 if (BRW_DEBUG & DEBUG_BATCH) { @@ -196,7 +195,7 @@ brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch, * the buffer doesn't move and we can short-circuit the relocation processing * in the kernel */ - brw_batchbuffer_emit_dword (batch, buffer->offset + delta); + brw_batchbuffer_emit_dword (batch, buffer->offset[0] + delta); return 0; } diff --git a/src/gallium/drivers/i965/brw_cc.c b/src/gallium/drivers/i965/brw_cc.c index bdd6418ae1..cf3791e11e 100644 --- a/src/gallium/drivers/i965/brw_cc.c +++ b/src/gallium/drivers/i965/brw_cc.c @@ -137,7 +137,7 @@ cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key) cc.cc3 = key->cc3; /* CACHE_NEW_CC_VP */ - cc.cc4.cc_viewport_state_offset = brw->cc.vp_bo->offset >> 5; /* reloc */ + cc.cc4.cc_viewport_state_offset = *(brw->cc.vp_bo->offset) >> 5; /* reloc */ cc.cc5 = key->cc5; cc.cc6 = key->cc6; diff --git a/src/gallium/drivers/i965/brw_clip_state.c b/src/gallium/drivers/i965/brw_clip_state.c index bf4e6f5103..31e2e0bc17 100644 --- a/src/gallium/drivers/i965/brw_clip_state.c +++ b/src/gallium/drivers/i965/brw_clip_state.c @@ -83,7 +83,7 @@ clip_unit_create_from_key(struct brw_context *brw, clip.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; /* reloc */ - clip.thread0.kernel_start_pointer = brw->clip.prog_bo->offset >> 6; + clip.thread0.kernel_start_pointer = *(brw->clip.prog_bo->offset) >> 6; clip.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; clip.thread1.single_program_flow = 1; diff --git a/src/gallium/drivers/i965/brw_gs_state.c b/src/gallium/drivers/i965/brw_gs_state.c index 15a66c9741..9046969394 100644 --- a/src/gallium/drivers/i965/brw_gs_state.c +++ b/src/gallium/drivers/i965/brw_gs_state.c @@ -79,7 +79,7 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key) gs.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; if (key->prog_active) /* reloc */ - gs.thread0.kernel_start_pointer = brw->gs.prog_bo->offset >> 6; + gs.thread0.kernel_start_pointer = brw->gs.prog_bo->offset[0] >> 6; gs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; gs.thread1.single_program_flow = 1; diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c index 3fd486986f..48b3451bfc 100644 --- a/src/gallium/drivers/i965/brw_screen_texture.c +++ b/src/gallium/drivers/i965/brw_screen_texture.c @@ -222,7 +222,11 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, /* This is ok for all textures with channel width 8bit or less: */ /* tex->ss.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */ - tex->ss.ss1.base_addr = tex->bo->offset; /* reloc */ + + + /* XXX: what happens when tex->bo->offset changes??? + */ + tex->ss.ss1.base_addr = tex->bo->offset[0]; /* reloc */ tex->ss.ss2.mip_count = tex->base.last_level; tex->ss.ss2.width = tex->base.width[0] - 1; tex->ss.ss2.height = tex->base.height[0] - 1; diff --git a/src/gallium/drivers/i965/brw_sf_state.c b/src/gallium/drivers/i965/brw_sf_state.c index fbc9f15eb4..4ab5709d53 100644 --- a/src/gallium/drivers/i965/brw_sf_state.c +++ b/src/gallium/drivers/i965/brw_sf_state.c @@ -138,7 +138,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, memset(&sf, 0, sizeof(sf)); sf.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; - sf.thread0.kernel_start_pointer = brw->sf.prog_bo->offset >> 6; /* reloc */ + sf.thread0.kernel_start_pointer = brw->sf.prog_bo->offset[0] >> 6; /* reloc */ sf.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; @@ -171,7 +171,7 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, sf.thread4.stats_enable = 1; /* CACHE_NEW_SF_VP */ - sf.sf5.sf_viewport_state_offset = brw->sf.vp_bo->offset >> 5; /* reloc */ + sf.sf5.sf_viewport_state_offset = brw->sf.vp_bo->offset[0] >> 5; /* reloc */ sf.sf5.viewport_transform = 1; diff --git a/src/gallium/drivers/i965/brw_state_dump.c b/src/gallium/drivers/i965/brw_state_dump.c index 72604304d4..345e42a6b2 100644 --- a/src/gallium/drivers/i965/brw_state_dump.c +++ b/src/gallium/drivers/i965/brw_state_dump.c @@ -67,7 +67,7 @@ state_struct_out(struct brw_winsys_screen *sws, data = sws->bo_map(buffer, GL_FALSE); for (i = 0; i < state_size / 4; i++) { - state_out(name, data, buffer->offset, i, + state_out(name, data, buffer->offset[0], i, "dword %d\n", i); } sws->bo_unmap(buffer); @@ -115,7 +115,7 @@ static void dump_wm_surface_state(struct brw_context *brw) continue; } surf = (struct brw_surface_state *)brw->sws->bo_map(surf_bo, GL_FALSE); - surfoff = surf_bo->offset; + surfoff = surf_bo->offset[0]; sprintf(name, "WM SS%d", i); state_out(name, surf, surfoff, 0, "%s %s\n", @@ -145,7 +145,7 @@ static void dump_sf_viewport_state(struct brw_context *brw) return; vp = (struct brw_sf_viewport *)brw->sws->bo_map(brw->sf.vp_bo, GL_FALSE); - vp_off = brw->sf.vp_bo->offset; + vp_off = brw->sf.vp_bo->offset[0]; state_out(name, vp, vp_off, 0, "m00 = %f\n", vp->viewport.m00); state_out(name, vp, vp_off, 1, "m11 = %f\n", vp->viewport.m11); diff --git a/src/gallium/drivers/i965/brw_vs_state.c b/src/gallium/drivers/i965/brw_vs_state.c index 549696f7ae..6a2395dd96 100644 --- a/src/gallium/drivers/i965/brw_vs_state.c +++ b/src/gallium/drivers/i965/brw_vs_state.c @@ -87,7 +87,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) memset(&vs, 0, sizeof(vs)); - vs.thread0.kernel_start_pointer = brw->vs.prog_bo->offset >> 6; /* reloc */ + vs.thread0.kernel_start_pointer = brw->vs.prog_bo->offset[0] >> 6; /* reloc */ vs.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; vs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; /* Choosing multiple program flow means that we may get 2-vertex threads, diff --git a/src/gallium/drivers/i965/brw_winsys.h b/src/gallium/drivers/i965/brw_winsys.h index bc3d31196c..d19cd5d248 100644 --- a/src/gallium/drivers/i965/brw_winsys.h +++ b/src/gallium/drivers/i965/brw_winsys.h @@ -31,12 +31,15 @@ struct brw_winsys; struct pipe_fence_handle; -/* This currently just wraps dri_bo: +/* Not sure why the winsys needs this: + */ +#define BRW_BATCH_SIZE (32*1024) + + +/* Need a tiny bit of information inside the abstract buffer struct: */ struct brw_winsys_buffer { - struct brw_winsys_screen *sws; - void *bo; - unsigned offset; + unsigned *offset; unsigned size; }; @@ -70,6 +73,8 @@ enum brw_buffer_type BRW_BUFFER_TYPE_WM_SCRATCH, BRW_BUFFER_TYPE_BATCH, BRW_BUFFER_TYPE_STATE_CACHE, + + BRW_BUFFER_TYPE_MAX /* Count of possible values */ }; struct brw_winsys_screen { @@ -103,12 +108,9 @@ struct brw_winsys_screen { struct brw_winsys_buffer *b2); int (*bo_exec)( struct brw_winsys_buffer *buffer, - unsigned bytes_used, - void *foo, - int a, - int b ); + unsigned bytes_used ); - void (*bo_subdata)(struct brw_winsys_buffer *buffer, + int (*bo_subdata)(struct brw_winsys_buffer *buffer, size_t offset, size_t size, const void *data); @@ -142,14 +144,14 @@ struct brw_winsys_screen { /** * Destroy the winsys. */ - void (*destroy)(struct brw_winsys *iws); + void (*destroy)(struct brw_winsys_screen *iws); }; /** * Create brw pipe_screen. */ -struct pipe_screen *brw_create_screen(struct brw_winsys *iws, unsigned pci_id); +struct pipe_screen *brw_create_screen(struct brw_winsys_screen *iws, unsigned pci_id); /** * Create a brw pipe_context. @@ -162,19 +164,20 @@ struct pipe_context *brw_create_context(struct pipe_screen *screen); * TODO UGLY */ struct pipe_texture; -boolean brw_get_texture_buffer_brw(struct pipe_texture *texture, - struct brw_winsys_buffer **buffer, - unsigned *stride); +boolean brw_texture_get_winsys_buffer(struct pipe_texture *texture, + struct brw_winsys_buffer **buffer, + unsigned *stride); /** * Wrap a brw_winsys buffer with a texture blanket. * * TODO UGLY */ -struct pipe_texture * brw_texture_blanket_ws(struct pipe_screen *screen, - const struct pipe_texture *tmplt, - const unsigned *stride, - struct brw_winsys_buffer *buffer); +struct pipe_texture * +brw_texture_blanket_winsys_buffer(struct pipe_screen *screen, + const struct pipe_texture *template, + const unsigned pitch, + struct brw_winsys_buffer *buffer); diff --git a/src/gallium/drivers/i965/brw_wm_sampler_state.c b/src/gallium/drivers/i965/brw_wm_sampler_state.c index ddd88d6e22..d43968c85a 100644 --- a/src/gallium/drivers/i965/brw_wm_sampler_state.c +++ b/src/gallium/drivers/i965/brw_wm_sampler_state.c @@ -81,7 +81,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw, entry->ss0 = sampler->ss0; entry->ss1 = sampler->ss1; - entry->ss2.default_color_pointer = brw->wm.sdc_bo[i]->offset >> 5; /* reloc */ + entry->ss2.default_color_pointer = brw->wm.sdc_bo[i]->offset[0] >> 5; /* reloc */ entry->ss3 = sampler->ss3; /* Cube-maps on 965 and later must use the same wrap mode for all 3 diff --git a/src/gallium/drivers/i965/brw_wm_state.c b/src/gallium/drivers/i965/brw_wm_state.c index f161de9b40..5cfa8fe2d1 100644 --- a/src/gallium/drivers/i965/brw_wm_state.c +++ b/src/gallium/drivers/i965/brw_wm_state.c @@ -148,7 +148,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, memset(&wm, 0, sizeof(wm)); wm.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; - wm.thread0.kernel_start_pointer = brw->wm.prog_bo->offset >> 6; /* reloc */ + wm.thread0.kernel_start_pointer = brw->wm.prog_bo->offset[0] >> 6; /* reloc */ wm.thread1.depth_coef_urb_read_offset = 1; wm.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; @@ -159,7 +159,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, if (key->total_scratch != 0) { wm.thread2.scratch_space_base_pointer = - brw->wm.scratch_bo->offset >> 10; /* reloc */ + brw->wm.scratch_bo->offset[0] >> 10; /* reloc */ wm.thread2.per_thread_scratch_space = key->total_scratch / 1024 - 1; } else { wm.thread2.scratch_space_base_pointer = 0; @@ -179,7 +179,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, if (brw->wm.sampler_bo != NULL) { /* reloc */ - wm.wm4.sampler_state_pointer = brw->wm.sampler_bo->offset >> 5; + wm.wm4.sampler_state_pointer = brw->wm.sampler_bo->offset[0] >> 5; } else { wm.wm4.sampler_state_pointer = 0; } diff --git a/src/gallium/drivers/i965/brw_wm_surface_state.c b/src/gallium/drivers/i965/brw_wm_surface_state.c index 88485c76cb..f55a6c4af2 100644 --- a/src/gallium/drivers/i965/brw_wm_surface_state.c +++ b/src/gallium/drivers/i965/brw_wm_surface_state.c @@ -118,7 +118,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw, */ brw->sws->bo_emit_reloc(brw->wm.surf_bo[unit], I915_GEM_DOMAIN_RENDER, 0, - ss.ss1.base_addr - surface->bo->offset, /* XXX */ + ss.ss1.base_addr - surface->bo->offset[0], /* XXX */ offsetof(struct brw_surface_state, ss1), surface->bo); } @@ -150,7 +150,7 @@ brw_wm_get_binding_table(struct brw_context *brw) int i; for (i = 0; i < brw->wm.nr_surfaces; i++) - data[i] = brw->wm.surf_bo[i]->offset; + data[i] = brw->wm.surf_bo[i]->offset[0]; bind_bo = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND, NULL, 0, diff --git a/src/gallium/winsys/drm/i965/gem/Makefile b/src/gallium/winsys/drm/i965/gem/Makefile index 74d81b4bc8..6a7497b6be 100644 --- a/src/gallium/winsys/drm/i965/gem/Makefile +++ b/src/gallium/winsys/drm/i965/gem/Makefile @@ -1,12 +1,10 @@ TOP = ../../../../../.. include $(TOP)/configs/current -LIBNAME = inteldrm +LIBNAME = i965drm C_SOURCES = \ - i965_drm_batchbuffer.c \ i965_drm_buffer.c \ - i965_drm_fence.c \ i965_drm_api.c LIBRARY_INCLUDES = $(shell pkg-config libdrm --cflags-only-I) diff --git a/src/gallium/winsys/drm/i965/gem/SConscript b/src/gallium/winsys/drm/i965/gem/SConscript index 9f1391caff..6256ec6eaf 100644 --- a/src/gallium/winsys/drm/i965/gem/SConscript +++ b/src/gallium/winsys/drm/i965/gem/SConscript @@ -4,9 +4,7 @@ env = drienv.Clone() i965drm_sources = [ 'i965_drm_api.c', - 'i965_drm_batchbuffer.c', 'i965_drm_buffer.c', - 'i965_drm_fence.c', ] i965drm = env.ConvenienceLibrary( diff --git a/src/gallium/winsys/drm/i965/gem/i965_drm_api.c b/src/gallium/winsys/drm/i965/gem/i965_drm_api.c index de68cb3551..8b9c777a6f 100644 --- a/src/gallium/winsys/drm/i965/gem/i965_drm_api.c +++ b/src/gallium/winsys/drm/i965/gem/i965_drm_api.c @@ -1,11 +1,12 @@ +#include #include "state_tracker/drm_api.h" #include "i965_drm_winsys.h" #include "util/u_memory.h" -#include "brw/brw_context.h" /* XXX: shouldn't be doing this */ -#include "brw/brw_screen.h" /* XXX: shouldn't be doing this */ +#include "i965/brw_context.h" /* XXX: shouldn't be doing this */ +#include "i965/brw_screen.h" /* XXX: shouldn't be doing this */ #include "trace/tr_drm.h" @@ -15,7 +16,7 @@ static void -i965_drm_get_device_id(unsigned int *device_id) +i965_libdrm_get_device_id(unsigned int *device_id) { char path[512]; FILE *file; @@ -36,29 +37,28 @@ i965_drm_get_device_id(unsigned int *device_id) fclose(file); } -static struct i965_buffer * -i965_drm_buffer_from_handle(struct i965_drm_winsys *idws, +static struct i965_libdrm_buffer * +i965_libdrm_buffer_from_handle(struct i965_libdrm_winsys *idws, const char* name, unsigned handle) { - struct i965_drm_buffer *buf = CALLOC_STRUCT(i965_drm_buffer); + struct i965_libdrm_buffer *buf = CALLOC_STRUCT(i965_libdrm_buffer); uint32_t tile = 0, swizzle = 0; if (!buf) return NULL; - buf->magic = 0xDEAD1337; - buf->bo = drm_i965_bo_gem_create_from_name(idws->pools.gem, name, handle); + buf->bo = drm_intel_bo_gem_create_from_name(idws->gem, name, handle); buf->flinked = TRUE; buf->flink = handle; if (!buf->bo) goto err; - drm_i965_bo_get_tiling(buf->bo, &tile, &swizzle); - if (tile != I965_TILE_NONE) + drm_intel_bo_get_tiling(buf->bo, &tile, &swizzle); + if (tile != 0) buf->map_gtt = TRUE; - return (struct i965_buffer *)buf; + return buf; err: FREE(buf); @@ -72,38 +72,43 @@ err: static struct pipe_texture * -i965_drm_texture_from_shared_handle(struct drm_api *api, +i965_libdrm_texture_from_shared_handle(struct drm_api *api, struct pipe_screen *screen, - struct pipe_texture *templ, + struct pipe_texture *template, const char* name, unsigned pitch, unsigned handle) { - struct i965_drm_winsys *idws = i965_drm_winsys(i965_screen(screen)->iws); - struct i965_buffer *buffer; + /* XXX: this is silly -- there should be a way to get directly from + * the "drm_api" struct to ourselves, without peering into + * unrelated code: + */ + struct i965_libdrm_winsys *idws = i965_libdrm_winsys(brw_screen(screen)->sws); + struct i965_libdrm_buffer *buffer; - buffer = i965_drm_buffer_from_handle(idws, name, handle); + buffer = i965_libdrm_buffer_from_handle(idws, name, handle); if (!buffer) return NULL; - return i965_texture_blanket_i965(screen, templ, pitch, buffer); + return brw_texture_blanket_winsys_buffer(screen, template, pitch, &buffer->base); } + static boolean -i965_drm_shared_handle_from_texture(struct drm_api *api, +i965_libdrm_shared_handle_from_texture(struct drm_api *api, struct pipe_screen *screen, struct pipe_texture *texture, unsigned *pitch, unsigned *handle) { - struct i965_drm_buffer *buf = NULL; - struct i965_buffer *buffer = NULL; - if (!i965_get_texture_buffer_i965(texture, &buffer, pitch)) + struct i965_libdrm_buffer *buf = NULL; + struct brw_winsys_buffer *buffer = NULL; + if (!brw_texture_get_winsys_buffer(texture, &buffer, pitch)) return FALSE; - buf = i965_drm_buffer(buffer); + buf = i965_libdrm_buffer(buffer); if (!buf->flinked) { - if (drm_i965_bo_flink(buf->bo, &buf->flink)) + if (drm_intel_bo_flink(buf->bo, &buf->flink)) return FALSE; buf->flinked = TRUE; } @@ -114,36 +119,36 @@ i965_drm_shared_handle_from_texture(struct drm_api *api, } static boolean -i965_drm_local_handle_from_texture(struct drm_api *api, +i965_libdrm_local_handle_from_texture(struct drm_api *api, struct pipe_screen *screen, struct pipe_texture *texture, unsigned *pitch, unsigned *handle) { - struct i965_buffer *buffer = NULL; - if (!i965_get_texture_buffer_i965(texture, &buffer, pitch)) + struct brw_winsys_buffer *buffer = NULL; + if (!brw_texture_get_winsys_buffer(texture, &buffer, pitch)) return FALSE; - *handle = i965_drm_buffer(buffer)->bo->handle; + *handle = i965_libdrm_buffer(buffer)->bo->handle; return TRUE; } static void -i965_drm_winsys_destroy(struct i965_winsys *iws) +i965_libdrm_winsys_destroy(struct brw_winsys_screen *iws) { - struct i965_drm_winsys *idws = i965_drm_winsys(iws); + struct i965_libdrm_winsys *idws = i965_libdrm_winsys(iws); - drm_i965_bufmgr_destroy(idws->pools.gem); + drm_intel_bufmgr_destroy(idws->gem); FREE(idws); } static struct pipe_screen * -i965_drm_create_screen(struct drm_api *api, int drmFD, +i965_libdrm_create_screen(struct drm_api *api, int drmFD, struct drm_create_screen_arg *arg) { - struct i965_drm_winsys *idws; + struct i965_libdrm_winsys *idws; unsigned int deviceID; if (arg != NULL) { @@ -155,35 +160,31 @@ i965_drm_create_screen(struct drm_api *api, int drmFD, } } - idws = CALLOC_STRUCT(i965_drm_winsys); + idws = CALLOC_STRUCT(i965_libdrm_winsys); if (!idws) return NULL; - i965_drm_get_device_id(&deviceID); + i965_libdrm_get_device_id(&deviceID); - i965_drm_winsys_init_batchbuffer_functions(idws); - i965_drm_winsys_init_buffer_functions(idws); - i965_drm_winsys_init_fence_functions(idws); + i965_libdrm_winsys_init_buffer_functions(idws); idws->fd = drmFD; idws->id = deviceID; - idws->max_batch_size = 16 * 4096; - idws->base.destroy = i965_drm_winsys_destroy; + idws->base.destroy = i965_libdrm_winsys_destroy; - idws->pools.gem = drm_i965_bufmgr_gem_init(idws->fd, idws->max_batch_size); - drm_i965_bufmgr_gem_enable_reuse(idws->pools.gem); + idws->gem = drm_intel_bufmgr_gem_init(idws->fd, BRW_BATCH_SIZE); + drm_intel_bufmgr_gem_enable_reuse(idws->gem); - idws->softpipe = FALSE; idws->dump_cmd = debug_get_bool_option("I965_DUMP_CMD", FALSE); - return i965_create_screen(&idws->base, deviceID); + return brw_create_screen(&idws->base, deviceID); } static struct pipe_context * -i965_drm_create_context(struct drm_api *api, struct pipe_screen *screen) +i965_libdrm_create_context(struct drm_api *api, struct pipe_screen *screen) { - return i965_create_context(screen); + return brw_create_context(screen); } static void @@ -192,18 +193,18 @@ destroy(struct drm_api *api) } -struct drm_api i965_drm_api = +struct drm_api i965_libdrm_api = { - .create_context = i965_drm_create_context, - .create_screen = i965_drm_create_screen, - .texture_from_shared_handle = i965_drm_texture_from_shared_handle, - .shared_handle_from_texture = i965_drm_shared_handle_from_texture, - .local_handle_from_texture = i965_drm_local_handle_from_texture, + .create_context = i965_libdrm_create_context, + .create_screen = i965_libdrm_create_screen, + .texture_from_shared_handle = i965_libdrm_texture_from_shared_handle, + .shared_handle_from_texture = i965_libdrm_shared_handle_from_texture, + .local_handle_from_texture = i965_libdrm_local_handle_from_texture, .destroy = destroy, }; struct drm_api * drm_api_create() { - return trace_drm_create(&i965_drm_api); + return trace_drm_create(&i965_libdrm_api); } diff --git a/src/gallium/winsys/drm/i965/gem/i965_drm_batchbuffer.c b/src/gallium/winsys/drm/i965/gem/i965_drm_batchbuffer.c deleted file mode 100644 index 5b4dafc8e4..0000000000 --- a/src/gallium/winsys/drm/i965/gem/i965_drm_batchbuffer.c +++ /dev/null @@ -1,244 +0,0 @@ - -#include "intel_drm_winsys.h" -#include "util/u_memory.h" - -#include "i915_drm.h" - -#define BATCH_RESERVED 16 - -#define INTEL_DEFAULT_RELOCS 100 -#define INTEL_MAX_RELOCS 400 - -#define INTEL_BATCH_NO_CLIPRECTS 0x1 -#define INTEL_BATCH_CLIPRECTS 0x2 - -#undef INTEL_RUN_SYNC -#undef INTEL_MAP_BATCHBUFFER -#undef INTEL_MAP_GTT -#define INTEL_ALWAYS_FLUSH - -struct intel_drm_batchbuffer -{ - struct intel_batchbuffer base; - - size_t actual_size; - - drm_intel_bo *bo; -}; - -static INLINE struct intel_drm_batchbuffer * -intel_drm_batchbuffer(struct intel_batchbuffer *batch) -{ - return (struct intel_drm_batchbuffer *)batch; -} - -static void -intel_drm_batchbuffer_reset(struct intel_drm_batchbuffer *batch) -{ - struct intel_drm_winsys *idws = intel_drm_winsys(batch->base.iws); - int ret; - - if (batch->bo) - drm_intel_bo_unreference(batch->bo); - batch->bo = drm_intel_bo_alloc(idws->pools.gem, - "gallium3d_batchbuffer", - batch->actual_size, - 4096); - -#ifdef INTEL_MAP_BATCHBUFFER -#ifdef INTEL_MAP_GTT - ret = drm_intel_gem_bo_map_gtt(batch->bo); -#else - ret = drm_intel_bo_map(batch->bo, TRUE); -#endif - assert(ret == 0); - batch->base.map = batch->bo->virtual; -#else - (void)ret; -#endif - - memset(batch->base.map, 0, batch->actual_size); - batch->base.ptr = batch->base.map; - batch->base.size = batch->actual_size - BATCH_RESERVED; - batch->base.relocs = 0; -} - -static struct intel_batchbuffer * -intel_drm_batchbuffer_create(struct intel_winsys *iws) -{ - struct intel_drm_winsys *idws = intel_drm_winsys(iws); - struct intel_drm_batchbuffer *batch = CALLOC_STRUCT(intel_drm_batchbuffer); - - batch->actual_size = idws->max_batch_size; - -#ifdef INTEL_MAP_BATCHBUFFER - batch->base.map = NULL; -#else - batch->base.map = MALLOC(batch->actual_size); -#endif - batch->base.ptr = NULL; - batch->base.size = 0; - - batch->base.relocs = 0; - batch->base.max_relocs = 300;/*INTEL_DEFAULT_RELOCS;*/ - - batch->base.iws = iws; - - intel_drm_batchbuffer_reset(batch); - - return &batch->base; -} - -static int -intel_drm_batchbuffer_reloc(struct intel_batchbuffer *ibatch, - struct intel_buffer *buffer, - enum intel_buffer_usage usage, - unsigned pre_add) -{ - struct intel_drm_batchbuffer *batch = intel_drm_batchbuffer(ibatch); - unsigned write_domain = 0; - unsigned read_domain = 0; - unsigned offset; - int ret = 0; - - assert(batch->base.relocs < batch->base.max_relocs); - - if (usage == INTEL_USAGE_SAMPLER) { - write_domain = 0; - read_domain = I915_GEM_DOMAIN_SAMPLER; - - } else if (usage == INTEL_USAGE_RENDER) { - write_domain = I915_GEM_DOMAIN_RENDER; - read_domain = I915_GEM_DOMAIN_RENDER; - - } else if (usage == INTEL_USAGE_2D_TARGET) { - write_domain = I915_GEM_DOMAIN_RENDER; - read_domain = I915_GEM_DOMAIN_RENDER; - - } else if (usage == INTEL_USAGE_2D_SOURCE) { - write_domain = 0; - read_domain = I915_GEM_DOMAIN_RENDER; - - } else if (usage == INTEL_USAGE_VERTEX) { - write_domain = 0; - read_domain = I915_GEM_DOMAIN_VERTEX; - - } else { - assert(0); - return -1; - } - - offset = (unsigned)(batch->base.ptr - batch->base.map); - - ret = drm_intel_bo_emit_reloc(batch->bo, offset, - intel_bo(buffer), pre_add, - read_domain, - write_domain); - - ((uint32_t*)batch->base.ptr)[0] = intel_bo(buffer)->offset + pre_add; - batch->base.ptr += 4; - - if (!ret) - batch->base.relocs++; - - return ret; -} - -static void -intel_drm_batchbuffer_flush(struct intel_batchbuffer *ibatch, - struct pipe_fence_handle **fence) -{ - struct intel_drm_batchbuffer *batch = intel_drm_batchbuffer(ibatch); - unsigned used = 0; - int ret = 0; - int i; - - assert(intel_batchbuffer_space(ibatch) >= 0); - - used = batch->base.ptr - batch->base.map; - assert((used & 3) == 0); - - -#ifdef INTEL_ALWAYS_FLUSH - /* MI_FLUSH | FLUSH_MAP_CACHE */ - intel_batchbuffer_dword(ibatch, (0x4<<23)|(1<<0)); - used += 4; -#endif - - if ((used & 4) == 0) { - /* MI_NOOP */ - intel_batchbuffer_dword(ibatch, 0); - } - /* MI_BATCH_BUFFER_END */ - intel_batchbuffer_dword(ibatch, (0xA<<23)); - - used = batch->base.ptr - batch->base.map; - assert((used & 4) == 0); - -#ifdef INTEL_MAP_BATCHBUFFER -#ifdef INTEL_MAP_GTT - drm_intel_gem_bo_unmap_gtt(batch->bo); -#else - drm_intel_bo_unmap(batch->bo); -#endif -#else - drm_intel_bo_subdata(batch->bo, 0, used, batch->base.map); -#endif - - /* Do the sending to HW */ - ret = drm_intel_bo_exec(batch->bo, used, NULL, 0, 0); - assert(ret == 0); - - if (intel_drm_winsys(ibatch->iws)->dump_cmd) { - unsigned *ptr; - drm_intel_bo_map(batch->bo, FALSE); - ptr = (unsigned*)batch->bo->virtual; - - debug_printf("%s:\n", __func__); - for (i = 0; i < used / 4; i++, ptr++) { - debug_printf("\t%08x: %08x\n", i*4, *ptr); - } - - drm_intel_bo_unmap(batch->bo); - } else { -#ifdef INTEL_RUN_SYNC - drm_intel_bo_map(batch->bo, FALSE); - drm_intel_bo_unmap(batch->bo); -#endif - } - - if (fence) { - ibatch->iws->fence_reference(ibatch->iws, fence, NULL); - -#ifdef INTEL_RUN_SYNC - /* we run synced to GPU so just pass null */ - (*fence) = intel_drm_fence_create(NULL); -#else - (*fence) = intel_drm_fence_create(batch->bo); -#endif - } - - intel_drm_batchbuffer_reset(batch); -} - -static void -intel_drm_batchbuffer_destroy(struct intel_batchbuffer *ibatch) -{ - struct intel_drm_batchbuffer *batch = intel_drm_batchbuffer(ibatch); - - if (batch->bo) - drm_intel_bo_unreference(batch->bo); - -#ifndef INTEL_MAP_BATCHBUFFER - FREE(batch->base.map); -#endif - FREE(batch); -} - -void intel_drm_winsys_init_batchbuffer_functions(struct intel_drm_winsys *idws) -{ - idws->base.batchbuffer_create = intel_drm_batchbuffer_create; - idws->base.batchbuffer_reloc = intel_drm_batchbuffer_reloc; - idws->base.batchbuffer_flush = intel_drm_batchbuffer_flush; - idws->base.batchbuffer_destroy = intel_drm_batchbuffer_destroy; -} diff --git a/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c b/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c index 4f123bae05..5dbfd2e6b0 100644 --- a/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c +++ b/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c @@ -3,48 +3,58 @@ #include "util/u_memory.h" #include "i915_drm.h" - -static struct intel_buffer * -intel_drm_buffer_create(struct intel_winsys *iws, - unsigned size, unsigned alignment, - enum intel_buffer_type type) +#include "intel_bufmgr.h" + +const char *names[BRW_BUFFER_TYPE_MAX] = { + "texture", + "scanout", + "vertex", + "curbe", + "query", + "shader_constants", + "wm_scratch", + "batch", + "state_cache", +}; + +static struct brw_winsys_buffer * +i965_libdrm_bo_alloc( struct brw_winsys_screen *sws, + enum brw_buffer_type type, + unsigned size, + unsigned alignment ) { - struct intel_drm_buffer *buf = CALLOC_STRUCT(intel_drm_buffer); - struct intel_drm_winsys *idws = intel_drm_winsys(iws); - drm_intel_bufmgr *pool; - char *name; + struct i965_libdrm_winsys *idws = i965_libdrm_winsys(sws); + struct i965_libdrm_buffer *buf; + buf = CALLOC_STRUCT(i965_libdrm_buffer); if (!buf) return NULL; - buf->magic = 0xDEAD1337; - buf->flinked = FALSE; - buf->flink = 0; - buf->map_gtt = FALSE; - - if (type == INTEL_NEW_TEXTURE) { - name = "gallium3d_texture"; - pool = idws->pools.gem; - } else if (type == INTEL_NEW_VERTEX) { - name = "gallium3d_vertex"; - pool = idws->pools.gem; + switch (type) { + case BRW_BUFFER_TYPE_TEXTURE: + break; + case BRW_BUFFER_TYPE_VERTEX: buf->map_gtt = TRUE; - } else if (type == INTEL_NEW_SCANOUT) { - name = "gallium3d_scanout"; - pool = idws->pools.gem; + break; + case BRW_BUFFER_TYPE_SCANOUT: buf->map_gtt = TRUE; - } else { - assert(0); - name = "gallium3d_unknown"; - pool = idws->pools.gem; + break; + default: + break; } - buf->bo = drm_intel_bo_alloc(pool, name, size, alignment); + buf->bo = drm_intel_bo_alloc(idws->gem, + names[type], + size, + alignment); if (!buf->bo) goto err; - return (struct intel_buffer *)buf; + buf->base.offset = &buf->bo->offset; + buf->base.size = size; + + return &buf->base; err: assert(0); @@ -52,103 +62,186 @@ err: return NULL; } -static int -intel_drm_buffer_set_fence_reg(struct intel_winsys *iws, - struct intel_buffer *buffer, - unsigned stride, - enum intel_buffer_tile tile) + + + +/* Reference and unreference buffers: + */ +static void +i965_libdrm_bo_reference( struct brw_winsys_buffer *buffer ) { - struct intel_drm_buffer *buf = intel_drm_buffer(buffer); - assert(I915_TILING_NONE == INTEL_TILE_NONE); - assert(I915_TILING_X == INTEL_TILE_X); - assert(I915_TILING_Y == INTEL_TILE_Y); + struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer); - if (tile != INTEL_TILE_NONE) { - assert(buf->map_count == 0); - buf->map_gtt = TRUE; - } + /* I think we have to refcount ourselves and then just pass through + * the final dereference to the bo on destruction. + */ + buf->cheesy_refcount++; +} - return drm_intel_bo_set_tiling(buf->bo, &tile, stride); +static void +i965_libdrm_bo_unreference( struct brw_winsys_buffer *buffer ) +{ + struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer); + + if (--buf->cheesy_refcount == 0) { + drm_intel_bo_unreference(buf->bo); + FREE(buffer); + } } -static void * -intel_drm_buffer_map(struct intel_winsys *iws, - struct intel_buffer *buffer, - boolean write) + /* XXX: parameter names!! + */ +static int +i965_libdrm_bo_emit_reloc( struct brw_winsys_buffer *buffer, + unsigned domain, + unsigned a, + unsigned b, + unsigned offset, + struct brw_winsys_buffer *buffer2) { - struct intel_drm_buffer *buf = intel_drm_buffer(buffer); - drm_intel_bo *bo = intel_bo(buffer); - int ret = 0; + struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer); + struct i965_libdrm_buffer *buf2 = i965_libdrm_buffer(buffer2); + int ret; - assert(bo); + ret = dri_bo_emit_reloc( buf->bo, domain, a, b, offset, buf2->bo ); + if (ret) + return -1; - if (buf->map_count) - goto out; + return 0; +} - if (buf->map_gtt) - ret = drm_intel_gem_bo_map_gtt(bo); - else - ret = drm_intel_bo_map(bo, write); +static int +i965_libdrm_bo_exec( struct brw_winsys_buffer *buffer, + unsigned bytes_used ) +{ + struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer); + int ret; - buf->ptr = bo->virtual; + ret = dri_bo_exec(buf->bo, bytes_used, NULL, 0, 0); + if (ret) + return -1; + + return 0; +} + +static int +i965_libdrm_bo_subdata(struct brw_winsys_buffer *buffer, + size_t offset, + size_t size, + const void *data) +{ + struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer); + int ret; - assert(ret == 0); -out: + /* XXX: use bo_map_gtt/memcpy/unmap_gtt under some circumstances??? + */ + ret = drm_intel_bo_subdata(buf->bo, offset, size, (void*)data); if (ret) - return NULL; + return -1; + + return 0; +} - buf->map_count++; - return buf->ptr; + +static boolean +i965_libdrm_bo_is_busy(struct brw_winsys_buffer *buffer) +{ + struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer); + + return drm_intel_bo_busy(buf->bo); } -static void -intel_drm_buffer_unmap(struct intel_winsys *iws, - struct intel_buffer *buffer) +static boolean +i965_libdrm_bo_references(struct brw_winsys_buffer *a, + struct brw_winsys_buffer *b) { - struct intel_drm_buffer *buf = intel_drm_buffer(buffer); + struct i965_libdrm_buffer *bufa = i965_libdrm_buffer(a); + struct i965_libdrm_buffer *bufb = i965_libdrm_buffer(b); - if (--buf->map_count) - return; + /* XXX: can't find this func: + */ + return drm_intel_bo_references(bufa->bo, bufb->bo); +} - if (buf->map_gtt) - drm_intel_gem_bo_unmap_gtt(intel_bo(buffer)); - else - drm_intel_bo_unmap(intel_bo(buffer)); +/* XXX: couldn't this be handled by returning true/false on + * bo_emit_reloc? + */ +static boolean +i965_libdrm_check_aperture_space( struct brw_winsys_screen *iws, + struct brw_winsys_buffer **buffers, + unsigned count ) +{ + static drm_intel_bo *bos[128]; + int i; + + if (count > Elements(bos)) { + assert(0); + return FALSE; + } + + for (i = 0; i < count; i++) + bos[i] = i965_libdrm_buffer(buffers[i])->bo; + + return dri_bufmgr_check_aperture_space(bos, count); } -static int -intel_drm_buffer_write(struct intel_winsys *iws, - struct intel_buffer *buffer, - size_t offset, - size_t size, - const void *data) +/** + * Map a buffer. + */ +static void * +i965_libdrm_bo_map(struct brw_winsys_buffer *buffer, + boolean write) { - struct intel_drm_buffer *buf = intel_drm_buffer(buffer); + struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer); + int ret; + + if (!buf->map_count) { + if (buf->map_gtt) { + ret = drm_intel_gem_bo_map_gtt(buf->bo); + if (ret) + return NULL; + } + else { + ret = drm_intel_bo_map(buf->bo, write); + if (ret) + return NULL; + } + } - return drm_intel_bo_subdata(buf->bo, offset, size, (void*)data); + buf->map_count++; + return buf->bo->virtual; } -static void -intel_drm_buffer_destroy(struct intel_winsys *iws, - struct intel_buffer *buffer) +/** + * Unmap a buffer. + */ +static void +i965_libdrm_bo_unmap(struct brw_winsys_buffer *buffer) { - drm_intel_bo_unreference(intel_bo(buffer)); + struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer); -#ifdef DEBUG - intel_drm_buffer(buffer)->magic = 0; - intel_drm_buffer(buffer)->bo = NULL; -#endif + if (--buf->map_count > 0) + return; - FREE(buffer); + if (buf->map_gtt) + drm_intel_gem_bo_unmap_gtt(buf->bo); + else + drm_intel_bo_unmap(buf->bo); } + void -intel_drm_winsys_init_buffer_functions(struct intel_drm_winsys *idws) +i965_libdrm_winsys_init_buffer_functions(struct i965_libdrm_winsys *idws) { - idws->base.buffer_create = intel_drm_buffer_create; - idws->base.buffer_set_fence_reg = intel_drm_buffer_set_fence_reg; - idws->base.buffer_map = intel_drm_buffer_map; - idws->base.buffer_unmap = intel_drm_buffer_unmap; - idws->base.buffer_write = intel_drm_buffer_write; - idws->base.buffer_destroy = intel_drm_buffer_destroy; + idws->base.bo_alloc = i965_libdrm_bo_alloc; + idws->base.bo_reference = i965_libdrm_bo_reference; + idws->base.bo_unreference = i965_libdrm_bo_unreference; + idws->base.bo_emit_reloc = i965_libdrm_bo_emit_reloc; + idws->base.bo_exec = i965_libdrm_bo_exec; + idws->base.bo_subdata = i965_libdrm_bo_subdata; + idws->base.bo_is_busy = i965_libdrm_bo_is_busy; + idws->base.bo_references = i965_libdrm_bo_references; + idws->base.check_aperture_space = i965_libdrm_check_aperture_space; + idws->base.bo_map = i965_libdrm_bo_map; + idws->base.bo_unmap = i965_libdrm_bo_unmap; } diff --git a/src/gallium/winsys/drm/i965/gem/i965_drm_fence.c b/src/gallium/winsys/drm/i965/gem/i965_drm_fence.c deleted file mode 100644 index e70bfe7b44..0000000000 --- a/src/gallium/winsys/drm/i965/gem/i965_drm_fence.c +++ /dev/null @@ -1,81 +0,0 @@ - -#include "intel_drm_winsys.h" -#include "util/u_memory.h" -#include "pipe/p_refcnt.h" - -/** - * Because gem does not have fence's we have to create our own fences. - * - * They work by keeping the batchbuffer around and checking if that has - * been idled. If bo is NULL fence has expired. - */ -struct intel_drm_fence -{ - struct pipe_reference reference; - drm_intel_bo *bo; -}; - - -struct pipe_fence_handle * -intel_drm_fence_create(drm_intel_bo *bo) -{ - struct intel_drm_fence *fence = CALLOC_STRUCT(intel_drm_fence); - - pipe_reference_init(&fence->reference, 1); - /* bo is null if fence already expired */ - if (bo) { - drm_intel_bo_reference(bo); - fence->bo = bo; - } - - return (struct pipe_fence_handle *)fence; -} - -static void -intel_drm_fence_reference(struct intel_winsys *iws, - struct pipe_fence_handle **ptr, - struct pipe_fence_handle *fence) -{ - struct intel_drm_fence *old = (struct intel_drm_fence *)*ptr; - struct intel_drm_fence *f = (struct intel_drm_fence *)fence; - - if (pipe_reference((struct pipe_reference**)ptr, &f->reference)) { - if (old->bo) - drm_intel_bo_unreference(old->bo); - FREE(old); - } -} - -static int -intel_drm_fence_signalled(struct intel_winsys *iws, - struct pipe_fence_handle *fence) -{ - assert(0); - - return 0; -} - -static int -intel_drm_fence_finish(struct intel_winsys *iws, - struct pipe_fence_handle *fence) -{ - struct intel_drm_fence *f = (struct intel_drm_fence *)fence; - - /* fence already expired */ - if (!f->bo) - return 0; - - drm_intel_bo_wait_rendering(f->bo); - drm_intel_bo_unreference(f->bo); - f->bo = NULL; - - return 0; -} - -void -intel_drm_winsys_init_fence_functions(struct intel_drm_winsys *idws) -{ - idws->base.fence_reference = intel_drm_fence_reference; - idws->base.fence_signalled = intel_drm_fence_signalled; - idws->base.fence_finish = intel_drm_fence_finish; -} diff --git a/src/gallium/winsys/drm/i965/gem/i965_drm_winsys.h b/src/gallium/winsys/drm/i965/gem/i965_drm_winsys.h index 9854756880..bfcd512cef 100644 --- a/src/gallium/winsys/drm/i965/gem/i965_drm_winsys.h +++ b/src/gallium/winsys/drm/i965/gem/i965_drm_winsys.h @@ -2,56 +2,45 @@ #ifndef INTEL_DRM_WINSYS_H #define INTEL_DRM_WINSYS_H -#include "i965/intel_batchbuffer.h" +#include "i965/brw_winsys.h" #include "drm.h" #include "intel_bufmgr.h" + /* * Winsys */ -struct intel_drm_winsys +struct i965_libdrm_winsys { - struct intel_winsys base; + struct brw_winsys_screen base; + drm_intel_bufmgr *gem; - boolean softpipe; boolean dump_cmd; int fd; /**< Drm file discriptor */ unsigned id; - - size_t max_batch_size; - - struct { - drm_intel_bufmgr *gem; - } pools; }; -static INLINE struct intel_drm_winsys * -intel_drm_winsys(struct intel_winsys *iws) +static INLINE struct i965_libdrm_winsys * +i965_libdrm_winsys(struct brw_winsys_screen *iws) { - return (struct intel_drm_winsys *)iws; + return (struct i965_libdrm_winsys *)iws; } -struct intel_drm_winsys * intel_drm_winsys_create(int fd, unsigned pci_id); -struct pipe_fence_handle * intel_drm_fence_create(drm_intel_bo *bo); +struct i965_libdrm_winsys *i965_libdrm_winsys_create(int fd, unsigned pci_id); -void intel_drm_winsys_init_batchbuffer_functions(struct intel_drm_winsys *idws); -void intel_drm_winsys_init_buffer_functions(struct intel_drm_winsys *idws); -void intel_drm_winsys_init_fence_functions(struct intel_drm_winsys *idws); +void i965_libdrm_winsys_init_buffer_functions(struct i965_libdrm_winsys *idws); -/* - * Buffer +/* Buffer. */ - - -struct intel_drm_buffer { - unsigned magic; +struct i965_libdrm_buffer { + struct brw_winsys_buffer base; drm_intel_bo *bo; @@ -61,18 +50,15 @@ struct intel_drm_buffer { boolean flinked; unsigned flink; + + unsigned cheesy_refcount; }; -static INLINE struct intel_drm_buffer * -intel_drm_buffer(struct intel_buffer *buffer) +static INLINE struct i965_libdrm_buffer * +i965_libdrm_buffer(struct brw_winsys_buffer *buffer) { - return (struct intel_drm_buffer *)buffer; + return (struct i965_libdrm_buffer *)buffer; } -static INLINE drm_intel_bo * -intel_bo(struct intel_buffer *buffer) -{ - return intel_drm_buffer(buffer)->bo; -} #endif -- cgit v1.2.3 From a277bb20debc413f6ccf46f529497bf8bafa64dd Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Tue, 3 Nov 2009 23:16:02 +0000 Subject: i965g: convert read/write domain pairs into single usage value Easier to understand what's going on in the driver sources, convert stereotype usage values back to GEM read/write domain flags in the winsys. --- src/gallium/drivers/i965/brw_batchbuffer.c | 9 +++-- src/gallium/drivers/i965/brw_batchbuffer.h | 7 ++-- src/gallium/drivers/i965/brw_cc.c | 2 +- src/gallium/drivers/i965/brw_clip_state.c | 2 +- src/gallium/drivers/i965/brw_curbe.c | 2 +- src/gallium/drivers/i965/brw_draw_upload.c | 8 ++--- src/gallium/drivers/i965/brw_gs_state.c | 2 +- src/gallium/drivers/i965/brw_misc_state.c | 18 +++++----- src/gallium/drivers/i965/brw_pipe_query.c | 4 +-- src/gallium/drivers/i965/brw_sf_state.c | 4 +-- src/gallium/drivers/i965/brw_vs_state.c | 2 +- src/gallium/drivers/i965/brw_vs_surface_state.c | 2 +- src/gallium/drivers/i965/brw_winsys.h | 40 ++++++++++----------- src/gallium/drivers/i965/brw_wm_constant_buffer.c | 2 +- src/gallium/drivers/i965/brw_wm_sampler_state.c | 2 +- src/gallium/drivers/i965/brw_wm_state.c | 26 +++++++------- src/gallium/drivers/i965/brw_wm_surface_state.c | 6 ++-- src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c | 42 ++++++++++++++++++++--- 18 files changed, 104 insertions(+), 76 deletions(-) (limited to 'src/gallium/drivers/i965/brw_vs_state.c') diff --git a/src/gallium/drivers/i965/brw_batchbuffer.c b/src/gallium/drivers/i965/brw_batchbuffer.c index 72650cdb5d..fd6b34cb8a 100644 --- a/src/gallium/drivers/i965/brw_batchbuffer.c +++ b/src/gallium/drivers/i965/brw_batchbuffer.c @@ -168,9 +168,9 @@ _brw_batchbuffer_flush(struct brw_batchbuffer *batch, */ enum pipe_error brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch, - struct brw_winsys_buffer *buffer, - uint32_t read_domains, uint32_t write_domain, - uint32_t delta) + struct brw_winsys_buffer *buffer, + uint32_t usage, + uint32_t delta) { int ret; @@ -182,8 +182,7 @@ brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch, } ret = batch->sws->bo_emit_reloc(batch->buf, - read_domains, - write_domain, + usage, delta, batch->ptr - batch->map, buffer); diff --git a/src/gallium/drivers/i965/brw_batchbuffer.h b/src/gallium/drivers/i965/brw_batchbuffer.h index d687b79f93..b7186b3757 100644 --- a/src/gallium/drivers/i965/brw_batchbuffer.h +++ b/src/gallium/drivers/i965/brw_batchbuffer.h @@ -77,8 +77,7 @@ int brw_batchbuffer_data(struct brw_batchbuffer *batch, int brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch, struct brw_winsys_buffer *buffer, - uint32_t read_domains, - uint32_t write_domain, + enum brw_buffer_usage usage, uint32_t offset); /* Inline functions - might actually be better off with these @@ -125,10 +124,10 @@ brw_batchbuffer_require_space(struct brw_batchbuffer *batch, #define OUT_BATCH(d) brw_batchbuffer_emit_dword(brw->batch, d) -#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ +#define OUT_RELOC(buf, usage, delta) do { \ assert((unsigned) (delta) < buf->size); \ brw_batchbuffer_emit_reloc(brw->batch, buf, \ - read_domains, write_domain, delta); \ + usage, delta); \ } while (0) #ifdef DEBUG diff --git a/src/gallium/drivers/i965/brw_cc.c b/src/gallium/drivers/i965/brw_cc.c index c6267e1c60..20967f0191 100644 --- a/src/gallium/drivers/i965/brw_cc.c +++ b/src/gallium/drivers/i965/brw_cc.c @@ -151,7 +151,7 @@ cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key) /* Emit CC viewport relocation */ brw->sws->bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, 0, offsetof(struct brw_cc_unit_state, cc4), brw->cc.vp_bo); diff --git a/src/gallium/drivers/i965/brw_clip_state.c b/src/gallium/drivers/i965/brw_clip_state.c index 8be53e4bfb..6f8309fea9 100644 --- a/src/gallium/drivers/i965/brw_clip_state.c +++ b/src/gallium/drivers/i965/brw_clip_state.c @@ -150,7 +150,7 @@ clip_unit_create_from_key(struct brw_context *brw, /* Emit clip program relocation */ assert(brw->clip.prog_bo); brw->sws->bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, clip.thread0.grf_reg_count << 1, offsetof(struct brw_clip_unit_state, thread0), brw->clip.prog_bo); diff --git a/src/gallium/drivers/i965/brw_curbe.c b/src/gallium/drivers/i965/brw_curbe.c index ed5b250f82..3910174bda 100644 --- a/src/gallium/drivers/i965/brw_curbe.c +++ b/src/gallium/drivers/i965/brw_curbe.c @@ -323,7 +323,7 @@ static int emit_curbe_buffer(struct brw_context *brw) } else { OUT_BATCH((CMD_CONST_BUFFER << 16) | (1 << 8) | (2 - 2)); OUT_RELOC(brw->curbe.curbe_bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, (sz - 1) + brw->curbe.curbe_offset); } ADVANCE_BATCH(); diff --git a/src/gallium/drivers/i965/brw_draw_upload.c b/src/gallium/drivers/i965/brw_draw_upload.c index 040d8ca93a..f0b7c741c0 100644 --- a/src/gallium/drivers/i965/brw_draw_upload.c +++ b/src/gallium/drivers/i965/brw_draw_upload.c @@ -300,11 +300,11 @@ static int brw_emit_vertex_buffers( struct brw_context *brw ) BRW_VB0_ACCESS_VERTEXDATA | (brw->vb.vb[i].stride << BRW_VB0_PITCH_SHIFT)); OUT_RELOC(brw->vb.vb[i].bo, - I915_GEM_DOMAIN_VERTEX, 0, + BRW_USAGE_VERTEX, brw->vb.vb[i].offset); if (BRW_IS_IGDNG(brw)) { OUT_RELOC(brw->vb.vb[i].bo, - I915_GEM_DOMAIN_VERTEX, 0, + BRW_USAGE_VERTEX, brw->vb.vb[i].bo->size - 1); } else OUT_BATCH(brw->vb.vb[i].stride ? brw->vb.vb[i].vertex_count : 0); @@ -527,10 +527,10 @@ static int brw_emit_index_buffer(struct brw_context *brw) BEGIN_BATCH(4, IGNORE_CLIPRECTS); OUT_BATCH( ib.header.dword ); OUT_RELOC(brw->ib.bo, - I915_GEM_DOMAIN_VERTEX, 0, + BRW_USAGE_VERTEX, brw->ib.offset); OUT_RELOC(brw->ib.bo, - I915_GEM_DOMAIN_VERTEX, 0, + BRW_USAGE_VERTEX, brw->ib.offset + brw->ib.size - 1); OUT_BATCH( 0 ); ADVANCE_BATCH(); diff --git a/src/gallium/drivers/i965/brw_gs_state.c b/src/gallium/drivers/i965/brw_gs_state.c index 9046969394..f27f886a65 100644 --- a/src/gallium/drivers/i965/brw_gs_state.c +++ b/src/gallium/drivers/i965/brw_gs_state.c @@ -113,7 +113,7 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key) if (key->prog_active) { /* Emit GS program relocation */ brw->sws->bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, gs.thread0.grf_reg_count << 1, offsetof(struct brw_gs_unit_state, thread0), brw->gs.prog_bo); diff --git a/src/gallium/drivers/i965/brw_misc_state.c b/src/gallium/drivers/i965/brw_misc_state.c index 06b9a2d2df..e786ea1100 100644 --- a/src/gallium/drivers/i965/brw_misc_state.c +++ b/src/gallium/drivers/i965/brw_misc_state.c @@ -111,7 +111,7 @@ static int upload_binding_table_pointers(struct brw_context *brw) OUT_BATCH(CMD_BINDING_TABLE_PTRS << 16 | (6 - 2)); if (brw->vs.bind_bo != NULL) OUT_RELOC(brw->vs.bind_bo, - I915_GEM_DOMAIN_SAMPLER, 0, + BRW_USAGE_SAMPLER, 0); /* vs */ else OUT_BATCH(0); @@ -119,7 +119,7 @@ static int upload_binding_table_pointers(struct brw_context *brw) OUT_BATCH(0); /* clip */ OUT_BATCH(0); /* sf */ OUT_RELOC(brw->wm.bind_bo, - I915_GEM_DOMAIN_SAMPLER, 0, + BRW_USAGE_SAMPLER, 0); /* wm/ps */ ADVANCE_BATCH(); return 0; @@ -147,25 +147,25 @@ static int upload_pipelined_state_pointers(struct brw_context *brw ) BEGIN_BATCH(7, IGNORE_CLIPRECTS); OUT_BATCH(CMD_PIPELINED_STATE_POINTERS << 16 | (7 - 2)); OUT_RELOC(brw->vs.state_bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, 0); if (brw->gs.prog_active) OUT_RELOC(brw->gs.state_bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, 1); else OUT_BATCH(0); OUT_RELOC(brw->clip.state_bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, 1); OUT_RELOC(brw->sf.state_bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, 0); OUT_RELOC(brw->wm.state_bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, 0); OUT_RELOC(brw->cc.state_bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, 0); ADVANCE_BATCH(); @@ -288,7 +288,7 @@ static int emit_depthbuffer(struct brw_context *brw) ((surface->layout != PIPE_SURFACE_LAYOUT_LINEAR) << 27) | (BRW_SURFACE_2D << 29)); OUT_RELOC(bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + BRW_USAGE_DEPTH_BUFFER, surface->offset); OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) | ((pitch - 1) << 6) | diff --git a/src/gallium/drivers/i965/brw_pipe_query.c b/src/gallium/drivers/i965/brw_pipe_query.c index 18a9b71af0..1fe2f4da4f 100644 --- a/src/gallium/drivers/i965/brw_pipe_query.c +++ b/src/gallium/drivers/i965/brw_pipe_query.c @@ -193,7 +193,7 @@ brw_emit_query_begin(struct brw_context *brw) * to pick up the results. */ OUT_RELOC(brw->query.bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + BRW_USAGE_QUERY_RESULT, PIPE_CONTROL_GLOBAL_GTT_WRITE | ((brw->query.index * 2) * sizeof(uint64_t))); OUT_BATCH(0); @@ -234,7 +234,7 @@ brw_emit_query_end(struct brw_context *brw) PIPE_CONTROL_DEPTH_STALL | PIPE_CONTROL_WRITE_DEPTH_COUNT); OUT_RELOC(brw->query.bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + BRW_USAGE_QUERY_RESULT, PIPE_CONTROL_GLOBAL_GTT_WRITE | ((brw->query.index * 2 + 1) * sizeof(uint64_t))); OUT_BATCH(0); diff --git a/src/gallium/drivers/i965/brw_sf_state.c b/src/gallium/drivers/i965/brw_sf_state.c index 4ab5709d53..31343ff245 100644 --- a/src/gallium/drivers/i965/brw_sf_state.c +++ b/src/gallium/drivers/i965/brw_sf_state.c @@ -284,14 +284,14 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, */ /* Emit SF program relocation */ brw->sws->bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, sf.thread0.grf_reg_count << 1, offsetof(struct brw_sf_unit_state, thread0), brw->sf.prog_bo); /* Emit SF viewport relocation */ brw->sws->bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, sf.sf5.front_winding | (sf.sf5.viewport_transform << 1), offsetof(struct brw_sf_unit_state, sf5), brw->sf.vp_bo); diff --git a/src/gallium/drivers/i965/brw_vs_state.c b/src/gallium/drivers/i965/brw_vs_state.c index 6a2395dd96..26d5d005fa 100644 --- a/src/gallium/drivers/i965/brw_vs_state.c +++ b/src/gallium/drivers/i965/brw_vs_state.c @@ -149,7 +149,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) /* Emit VS program relocation */ brw->sws->bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, vs.thread0.grf_reg_count << 1, offsetof(struct brw_vs_unit_state, thread0), brw->vs.prog_bo); diff --git a/src/gallium/drivers/i965/brw_vs_surface_state.c b/src/gallium/drivers/i965/brw_vs_surface_state.c index 9a9d47a8a3..32fb9b2a8b 100644 --- a/src/gallium/drivers/i965/brw_vs_surface_state.c +++ b/src/gallium/drivers/i965/brw_vs_surface_state.c @@ -170,7 +170,7 @@ brw_vs_get_binding_table(struct brw_context *brw) */ drm_intel_bo_emit_reloc(bind_bo, i * 4, brw->vs.surf_bo[i], 0, - I915_GEM_DOMAIN_INSTRUCTION, 0); + BRW_USAGE_STATE); } } diff --git a/src/gallium/drivers/i965/brw_winsys.h b/src/gallium/drivers/i965/brw_winsys.h index d19cd5d248..d0bd97d994 100644 --- a/src/gallium/drivers/i965/brw_winsys.h +++ b/src/gallium/drivers/i965/brw_winsys.h @@ -43,25 +43,22 @@ struct brw_winsys_buffer { unsigned size; }; +/* Describe the usage of a particular buffer in a relocation. The DRM + * winsys will translate these back to GEM read/write domain flags. + */ enum brw_buffer_usage { - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_SAMPLER, - I915_GEM_DOMAIN_VERTEX, - I915_GEM_DOMAIN_INSTRUCTION, - - - /* XXX: migrate from domains to explicit usage cases, eg below: - */ - - /* use on textures */ - BRW_USAGE_RENDER = 0x01, - BRW_USAGE_SAMPLER = 0x02, - BRW_USAGE_2D_TARGET = 0x04, - BRW_USAGE_2D_SOURCE = 0x08, - /* use on vertex */ - BRW_USAGE_VERTEX = 0x10, + BRW_USAGE_STATE, /* INSTRUCTION, 0 */ + BRW_USAGE_QUERY_RESULT, /* INSTRUCTION, INSTRUCTION */ + BRW_USAGE_RENDER_TARGET, /* RENDER, 0 */ + BRW_USAGE_DEPTH_BUFFER, /* RENDER, RENDER */ + BRW_USAGE_SAMPLER, /* SAMPLER, 0 */ + BRW_USAGE_VERTEX, /* VERTEX, 0 */ + BRW_USAGE_SCRATCH, /* 0, 0 */ }; +/* Should be possible to validate usages above against buffer creation + * types, below: + */ enum brw_buffer_type { BRW_BUFFER_TYPE_TEXTURE, @@ -70,10 +67,9 @@ enum brw_buffer_type BRW_BUFFER_TYPE_CURBE, BRW_BUFFER_TYPE_QUERY, BRW_BUFFER_TYPE_SHADER_CONSTANTS, - BRW_BUFFER_TYPE_WM_SCRATCH, + BRW_BUFFER_TYPE_SHADER_SCRATCH, BRW_BUFFER_TYPE_BATCH, BRW_BUFFER_TYPE_STATE_CACHE, - BRW_BUFFER_TYPE_MAX /* Count of possible values */ }; @@ -98,12 +94,12 @@ struct brw_winsys_screen { void (*bo_reference)( struct brw_winsys_buffer *buffer ); void (*bo_unreference)( struct brw_winsys_buffer *buffer ); - /* XXX: parameter names!! + /* delta -- added to b2->offset, and written into buffer + * offset -- location above value is written to within buffer */ int (*bo_emit_reloc)( struct brw_winsys_buffer *buffer, - unsigned domain, - unsigned a, - unsigned b, + enum brw_buffer_usage usage, + unsigned delta, unsigned offset, struct brw_winsys_buffer *b2); diff --git a/src/gallium/drivers/i965/brw_wm_constant_buffer.c b/src/gallium/drivers/i965/brw_wm_constant_buffer.c index 7d2533b104..50ecef29a4 100644 --- a/src/gallium/drivers/i965/brw_wm_constant_buffer.c +++ b/src/gallium/drivers/i965/brw_wm_constant_buffer.c @@ -37,7 +37,7 @@ brw_create_constant_surface( struct brw_context *brw, if (key->bo) { /* Emit relocation to surface contents */ brw->sws->bo_emit_reloc(bo, - I915_GEM_DOMAIN_SAMPLER, 0, + BRW_USAGE_SAMPLER, 0, offsetof(struct brw_surface_state, ss1), key->bo); diff --git a/src/gallium/drivers/i965/brw_wm_sampler_state.c b/src/gallium/drivers/i965/brw_wm_sampler_state.c index d43968c85a..2909dd3876 100644 --- a/src/gallium/drivers/i965/brw_wm_sampler_state.c +++ b/src/gallium/drivers/i965/brw_wm_sampler_state.c @@ -182,7 +182,7 @@ static int upload_wm_samplers( struct brw_context *brw ) /* Emit SDC relocations */ for (i = 0; i < key.sampler_count; i++) { brw->sws->bo_emit_reloc(brw->wm.sampler_bo, - I915_GEM_DOMAIN_SAMPLER, 0, + BRW_USAGE_SAMPLER, 0, i * sizeof(struct brw_sampler_state) + offsetof(struct brw_sampler_state, ss2), diff --git a/src/gallium/drivers/i965/brw_wm_state.c b/src/gallium/drivers/i965/brw_wm_state.c index 5cfa8fe2d1..ccbb647bcd 100644 --- a/src/gallium/drivers/i965/brw_wm_state.c +++ b/src/gallium/drivers/i965/brw_wm_state.c @@ -230,27 +230,27 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, /* Emit WM program relocation */ brw->sws->bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - wm.thread0.grf_reg_count << 1, - offsetof(struct brw_wm_unit_state, thread0), - brw->wm.prog_bo); + BRW_USAGE_STATE, + wm.thread0.grf_reg_count << 1, + offsetof(struct brw_wm_unit_state, thread0), + brw->wm.prog_bo); /* Emit scratch space relocation */ if (key->total_scratch != 0) { brw->sws->bo_emit_reloc(bo, - 0, 0, - wm.thread2.per_thread_scratch_space, - offsetof(struct brw_wm_unit_state, thread2), - brw->wm.scratch_bo); + BRW_USAGE_SCRATCH, + wm.thread2.per_thread_scratch_space, + offsetof(struct brw_wm_unit_state, thread2), + brw->wm.scratch_bo); } /* Emit sampler state relocation */ if (key->sampler_count != 0) { brw->sws->bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - wm.wm4.stats_enable | (wm.wm4.sampler_count << 2), - offsetof(struct brw_wm_unit_state, wm4), - brw->wm.sampler_bo); + BRW_USAGE_STATE, + wm.wm4.stats_enable | (wm.wm4.sampler_count << 2), + offsetof(struct brw_wm_unit_state, wm4), + brw->wm.sampler_bo); } return bo; @@ -277,7 +277,7 @@ static int upload_wm_unit( struct brw_context *brw ) } if (brw->wm.scratch_bo == NULL) { brw->wm.scratch_bo = brw->sws->bo_alloc(brw->sws, - BRW_BUFFER_TYPE_WM_SCRATCH, + BRW_BUFFER_TYPE_SHADER_SCRATCH, total, 4096); } diff --git a/src/gallium/drivers/i965/brw_wm_surface_state.c b/src/gallium/drivers/i965/brw_wm_surface_state.c index f55a6c4af2..e5a0ed7d61 100644 --- a/src/gallium/drivers/i965/brw_wm_surface_state.c +++ b/src/gallium/drivers/i965/brw_wm_surface_state.c @@ -60,7 +60,7 @@ brw_update_texture_surface( struct brw_context *brw, /* Emit relocation to surface contents */ brw->sws->bo_emit_reloc(brw->wm.surf_bo[surf], - I915_GEM_DOMAIN_SAMPLER, 0, + BRW_USAGE_SAMPLER, 0, offsetof(struct brw_surface_state, ss1), tex->bo); @@ -117,7 +117,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw, /* XXX: we will only be rendering to this surface: */ brw->sws->bo_emit_reloc(brw->wm.surf_bo[unit], - I915_GEM_DOMAIN_RENDER, 0, + BRW_USAGE_RENDER_TARGET, ss.ss1.base_addr - surface->bo->offset[0], /* XXX */ offsetof(struct brw_surface_state, ss1), surface->bo); @@ -161,7 +161,7 @@ brw_wm_get_binding_table(struct brw_context *brw) /* Emit binding table relocations to surface state */ for (i = 0; i < brw->wm.nr_surfaces; i++) { brw->sws->bo_emit_reloc(bind_bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, + BRW_USAGE_STATE, 0, i * sizeof(GLuint), brw->wm.surf_bo[i]); diff --git a/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c b/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c index 5dbfd2e6b0..61717d2942 100644 --- a/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c +++ b/src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c @@ -93,17 +93,51 @@ i965_libdrm_bo_unreference( struct brw_winsys_buffer *buffer ) */ static int i965_libdrm_bo_emit_reloc( struct brw_winsys_buffer *buffer, - unsigned domain, - unsigned a, - unsigned b, + enum brw_buffer_usage usage, + unsigned delta, unsigned offset, struct brw_winsys_buffer *buffer2) { struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer); struct i965_libdrm_buffer *buf2 = i965_libdrm_buffer(buffer2); + int read, write; int ret; - ret = dri_bo_emit_reloc( buf->bo, domain, a, b, offset, buf2->bo ); + switch (usage) { + case BRW_USAGE_STATE: + read = I915_GEM_DOMAIN_INSTRUCTION; + write = 0; + break; + case BRW_USAGE_QUERY_RESULT: + read = I915_GEM_DOMAIN_INSTRUCTION; + write = I915_GEM_DOMAIN_INSTRUCTION; + break; + case BRW_USAGE_RENDER_TARGET: + read = I915_GEM_DOMAIN_RENDER; + write = 0; + break; + case BRW_USAGE_DEPTH_BUFFER: + read = I915_GEM_DOMAIN_RENDER; + write = I915_GEM_DOMAIN_RENDER; + break; + case BRW_USAGE_SAMPLER: + read = I915_GEM_DOMAIN_SAMPLER; + write = 0; + break; + case BRW_USAGE_VERTEX: + read = I915_GEM_DOMAIN_VERTEX; + write = 0; + break; + case BRW_USAGE_SCRATCH: + read = 0; + write = 0; + break; + default: + assert(0); + return -1; + } + + ret = dri_bo_emit_reloc( buf->bo, read, write, delta, offset, buf2->bo ); if (ret) return -1; -- cgit v1.2.3 From c796aed5ddad011d66e631c4cafdbf779e73f213 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Thu, 5 Nov 2009 13:57:05 +0000 Subject: i965g: add lots of error checks and early returns Any allocation that may fail should be checked, and propogate the error upwards. At the highest level we will flush batch and retry. This is an alternate strategy to what the original DRI driver did of attempting to flush batch from the lowest levels (eg inside BEGIN_BATCH). The trouble with that strategy was that flushes could occur at unexpected times, and additionally there was a need for a wierd notification mechanism to propogate the 'lost context' state back up to higher levels. Propogating the errors directly gives us a lot of flexibility how to deal with these states, at the expense of a lot more checking in the code. Will add some sanity checks later to make sure that out-of-memory conditions are properly escalated and not lost halfway up the stack. --- src/gallium/drivers/i965/brw_batchbuffer.c | 19 +- src/gallium/drivers/i965/brw_batchbuffer.h | 3 +- src/gallium/drivers/i965/brw_cc.c | 73 ++++--- src/gallium/drivers/i965/brw_clip.c | 60 ++++-- src/gallium/drivers/i965/brw_clip_state.c | 60 +++--- src/gallium/drivers/i965/brw_context.c | 46 +++-- src/gallium/drivers/i965/brw_context.h | 2 +- src/gallium/drivers/i965/brw_curbe.c | 18 +- src/gallium/drivers/i965/brw_draw.c | 3 +- src/gallium/drivers/i965/brw_draw_upload.c | 18 +- src/gallium/drivers/i965/brw_eu.c | 13 +- src/gallium/drivers/i965/brw_eu.h | 8 +- src/gallium/drivers/i965/brw_gs.c | 69 ++++--- src/gallium/drivers/i965/brw_gs_state.c | 48 +++-- src/gallium/drivers/i965/brw_pipe_query.c | 31 +-- src/gallium/drivers/i965/brw_pipe_shader.c | 3 +- src/gallium/drivers/i965/brw_pipe_vertex.c | 2 +- src/gallium/drivers/i965/brw_screen_buffers.c | 16 +- src/gallium/drivers/i965/brw_screen_surface.c | 7 +- src/gallium/drivers/i965/brw_screen_texture.c | 17 +- src/gallium/drivers/i965/brw_sf.c | 52 +++-- src/gallium/drivers/i965/brw_sf_state.c | 86 ++++---- src/gallium/drivers/i965/brw_state.h | 71 +++---- src/gallium/drivers/i965/brw_state_cache.c | 115 +++++------ src/gallium/drivers/i965/brw_state_upload.c | 3 +- src/gallium/drivers/i965/brw_vs.c | 56 +++--- src/gallium/drivers/i965/brw_vs_state.c | 58 +++--- src/gallium/drivers/i965/brw_vs_surface_state.c | 97 ++++++---- src/gallium/drivers/i965/brw_winsys.h | 56 ++++-- src/gallium/drivers/i965/brw_wm.c | 78 ++++---- src/gallium/drivers/i965/brw_wm_constant_buffer.c | 87 +++++---- src/gallium/drivers/i965/brw_wm_sampler_state.c | 98 ++++++---- src/gallium/drivers/i965/brw_wm_state.c | 103 ++++++---- src/gallium/drivers/i965/brw_wm_surface_state.c | 226 ++++++++++++---------- src/gallium/winsys/drm/i965/xlib/xlib_i965.c | 46 ++--- 35 files changed, 1003 insertions(+), 745 deletions(-) (limited to 'src/gallium/drivers/i965/brw_vs_state.c') diff --git a/src/gallium/drivers/i965/brw_batchbuffer.c b/src/gallium/drivers/i965/brw_batchbuffer.c index ca612e5ed0..e5f73bd6a3 100644 --- a/src/gallium/drivers/i965/brw_batchbuffer.c +++ b/src/gallium/drivers/i965/brw_batchbuffer.c @@ -38,17 +38,17 @@ #define USE_MALLOC_BUFFER 1 #define ALWAYS_EMIT_MI_FLUSH 1 -void +enum pipe_error brw_batchbuffer_reset(struct brw_batchbuffer *batch) { - if (batch->buf) { - batch->sws->bo_unreference(batch->buf); - batch->buf = NULL; - } + enum pipe_error ret; - batch->buf = batch->sws->bo_alloc(batch->sws, - BRW_BUFFER_TYPE_BATCH, - BRW_BATCH_SIZE, 4096); + ret = batch->sws->bo_alloc( batch->sws, + BRW_BUFFER_TYPE_BATCH, + BRW_BATCH_SIZE, 4096, + &batch->buf ); + if (ret) + return ret; if (batch->malloc_buffer) batch->map = batch->malloc_buffer; @@ -59,6 +59,7 @@ brw_batchbuffer_reset(struct brw_batchbuffer *batch) batch->size = BRW_BATCH_SIZE; batch->ptr = batch->map; + return PIPE_OK; } struct brw_batchbuffer * @@ -91,7 +92,7 @@ brw_batchbuffer_free(struct brw_batchbuffer *batch) batch->map = NULL; } - batch->sws->bo_unreference(batch->buf); + bo_reference(&batch->buf, NULL); FREE(batch); } diff --git a/src/gallium/drivers/i965/brw_batchbuffer.h b/src/gallium/drivers/i965/brw_batchbuffer.h index 1f04826aea..288a9d2755 100644 --- a/src/gallium/drivers/i965/brw_batchbuffer.h +++ b/src/gallium/drivers/i965/brw_batchbuffer.h @@ -65,7 +65,8 @@ void _brw_batchbuffer_flush(struct brw_batchbuffer *batch, const char *file, int line); -void brw_batchbuffer_reset(struct brw_batchbuffer *batch); +enum pipe_error +brw_batchbuffer_reset(struct brw_batchbuffer *batch); /* Unlike bmBufferData, this currently requires the buffer be mapped. diff --git a/src/gallium/drivers/i965/brw_cc.c b/src/gallium/drivers/i965/brw_cc.c index 20967f0191..8e25fe8585 100644 --- a/src/gallium/drivers/i965/brw_cc.c +++ b/src/gallium/drivers/i965/brw_cc.c @@ -57,10 +57,11 @@ static void calc_sane_viewport( const struct pipe_viewport_state *vp, svp->far = 1; } -static int prepare_cc_vp( struct brw_context *brw ) +static enum pipe_error prepare_cc_vp( struct brw_context *brw ) { struct brw_cc_viewport ccv; struct sane_viewport svp; + enum pipe_error ret; memset(&ccv, 0, sizeof(ccv)); @@ -70,10 +71,12 @@ static int prepare_cc_vp( struct brw_context *brw ) ccv.min_depth = svp.near; ccv.max_depth = svp.far; - brw->sws->bo_unreference(brw->cc.vp_bo); - brw->cc.vp_bo = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0 ); - - return 0; + ret = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0, + &brw->cc.vp_bo ); + if (ret) + return ret; + + return PIPE_OK; } const struct brw_tracked_state brw_cc_vp = { @@ -123,11 +126,13 @@ cc_unit_populate_key(const struct brw_context *brw, /** * Creates the state cache entry for the given CC unit key. */ -static struct brw_winsys_buffer * -cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key) +static enum pipe_error +cc_unit_create_from_key(struct brw_context *brw, + struct brw_cc_unit_key *key, + struct brw_winsys_buffer **bo_out) { struct brw_cc_unit_state cc; - struct brw_winsys_buffer *bo; + enum pipe_error ret; memset(&cc, 0, sizeof(cc)); @@ -143,38 +148,48 @@ cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key) cc.cc6 = key->cc6; cc.cc7 = key->cc7; - bo = brw_upload_cache(&brw->cache, BRW_CC_UNIT, - key, sizeof(*key), - &brw->cc.vp_bo, 1, - &cc, sizeof(cc), - NULL, NULL); + ret = brw_upload_cache(&brw->cache, BRW_CC_UNIT, + key, sizeof(*key), + &brw->cc.vp_bo, 1, + &cc, sizeof(cc), + NULL, NULL, + bo_out); + if (ret) + return ret; - /* Emit CC viewport relocation */ - brw->sws->bo_emit_reloc(bo, - BRW_USAGE_STATE, - 0, - offsetof(struct brw_cc_unit_state, cc4), - brw->cc.vp_bo); - return bo; + /* Emit CC viewport relocation */ + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_STATE, + 0, + offsetof(struct brw_cc_unit_state, cc4), + brw->cc.vp_bo); + if (ret) + return ret; + + return PIPE_OK; } static int prepare_cc_unit( struct brw_context *brw ) { struct brw_cc_unit_key key; + enum pipe_error ret; cc_unit_populate_key(brw, &key); - brw->sws->bo_unreference(brw->cc.state_bo); - brw->cc.state_bo = brw_search_cache(&brw->cache, BRW_CC_UNIT, - &key, sizeof(key), - &brw->cc.vp_bo, 1, - NULL); - - if (brw->cc.state_bo == NULL) - brw->cc.state_bo = cc_unit_create_from_key(brw, &key); + if (brw_search_cache(&brw->cache, BRW_CC_UNIT, + &key, sizeof(key), + &brw->cc.vp_bo, 1, + NULL, + &brw->cc.state_bo)) + return PIPE_OK; + + ret = cc_unit_create_from_key(brw, &key, + &brw->cc.state_bo); + if (ret) + return ret; - return 0; + return PIPE_OK; } const struct brw_tracked_state brw_cc_unit = { diff --git a/src/gallium/drivers/i965/brw_clip.c b/src/gallium/drivers/i965/brw_clip.c index 1a52fa771b..35e1d2fdbd 100644 --- a/src/gallium/drivers/i965/brw_clip.c +++ b/src/gallium/drivers/i965/brw_clip.c @@ -48,9 +48,12 @@ #define BACK_UNFILLED_BIT 0x2 -static void compile_clip_prog( struct brw_context *brw, - struct brw_clip_prog_key *key ) +static enum pipe_error +compile_clip_prog( struct brw_context *brw, + struct brw_clip_prog_key *key, + struct brw_winsys_buffer **bo_out ) { + enum pipe_error ret; struct brw_clip_compile c; const GLuint *program; GLuint program_size; @@ -123,31 +126,39 @@ static void compile_clip_prog( struct brw_context *brw, break; default: assert(0); - return; + return PIPE_ERROR_BAD_INPUT; } /* get the program */ - program = brw_get_program(&c.func, &program_size); + ret = brw_get_program(&c.func, &program, &program_size); + if (ret) + return ret; /* Upload */ - brw->sws->bo_unreference(brw->clip.prog_bo); - brw->clip.prog_bo = brw_upload_cache( &brw->cache, - BRW_CLIP_PROG, - &c.key, sizeof(c.key), - NULL, 0, - program, program_size, - &c.prog_data, - &brw->clip.prog_data ); + ret = brw_upload_cache( &brw->cache, + BRW_CLIP_PROG, + &c.key, sizeof(c.key), + NULL, 0, + program, program_size, + &c.prog_data, + &brw->clip.prog_data, + bo_out ); + if (ret) + return ret; + + return PIPE_OK; } /* Calculate interpolants for triangle and line rasterization. */ -static int upload_clip_prog(struct brw_context *brw) +static enum pipe_error +upload_clip_prog(struct brw_context *brw) { + enum pipe_error ret; struct brw_clip_prog_key key; /* Populate the key, starting from the almost-complete version from @@ -166,15 +177,22 @@ static int upload_clip_prog(struct brw_context *brw) /* PIPE_NEW_CLIP */ key.nr_userclip = brw->curr.ucp.nr; - brw->sws->bo_unreference(brw->clip.prog_bo); - brw->clip.prog_bo = brw_search_cache(&brw->cache, BRW_CLIP_PROG, - &key, sizeof(key), - NULL, 0, - &brw->clip.prog_data); - if (brw->clip.prog_bo == NULL) - compile_clip_prog( brw, &key ); + /* Already cached? + */ + if (brw_search_cache(&brw->cache, BRW_CLIP_PROG, + &key, sizeof(key), + NULL, 0, + &brw->clip.prog_data, + &brw->clip.prog_bo)) + return PIPE_OK; + + /* Compile new program: + */ + ret = compile_clip_prog( brw, &key, &brw->clip.prog_bo ); + if (ret) + return ret; - return 0; + return PIPE_OK; } diff --git a/src/gallium/drivers/i965/brw_clip_state.c b/src/gallium/drivers/i965/brw_clip_state.c index 6f8309fea9..d4e3c43c61 100644 --- a/src/gallium/drivers/i965/brw_clip_state.c +++ b/src/gallium/drivers/i965/brw_clip_state.c @@ -72,12 +72,13 @@ clip_unit_populate_key(struct brw_context *brw, struct brw_clip_unit_key *key) key->depth_clamp = 0; // XXX: add this to gallium: ctx->Transform.DepthClamp; } -static struct brw_winsys_buffer * +static enum pipe_error clip_unit_create_from_key(struct brw_context *brw, - struct brw_clip_unit_key *key) + struct brw_clip_unit_key *key, + struct brw_winsys_buffer **bo_out) { struct brw_clip_unit_state clip; - struct brw_winsys_buffer *bo; + enum pipe_error ret; memset(&clip, 0, sizeof(clip)); @@ -141,39 +142,50 @@ clip_unit_create_from_key(struct brw_context *brw, clip.viewport_ymin = -1; clip.viewport_ymax = 1; - bo = brw_upload_cache(&brw->cache, BRW_CLIP_UNIT, - key, sizeof(*key), - &brw->clip.prog_bo, 1, - &clip, sizeof(clip), - NULL, NULL); + ret = brw_upload_cache(&brw->cache, BRW_CLIP_UNIT, + key, sizeof(*key), + &brw->clip.prog_bo, 1, + &clip, sizeof(clip), + NULL, NULL, + bo_out); + if (ret) + return ret; /* Emit clip program relocation */ assert(brw->clip.prog_bo); - brw->sws->bo_emit_reloc(bo, - BRW_USAGE_STATE, - clip.thread0.grf_reg_count << 1, - offsetof(struct brw_clip_unit_state, thread0), - brw->clip.prog_bo); - - return bo; + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_STATE, + clip.thread0.grf_reg_count << 1, + offsetof(struct brw_clip_unit_state, thread0), + brw->clip.prog_bo); + if (ret) + return ret; + + return PIPE_OK; } static int upload_clip_unit( struct brw_context *brw ) { struct brw_clip_unit_key key; + enum pipe_error ret; clip_unit_populate_key(brw, &key); - brw->sws->bo_unreference(brw->clip.state_bo); - brw->clip.state_bo = brw_search_cache(&brw->cache, BRW_CLIP_UNIT, - &key, sizeof(key), - &brw->clip.prog_bo, 1, - NULL); - if (brw->clip.state_bo == NULL) { - brw->clip.state_bo = clip_unit_create_from_key(brw, &key); - } + if (brw_search_cache(&brw->cache, BRW_CLIP_UNIT, + &key, sizeof(key), + &brw->clip.prog_bo, 1, + NULL, + &brw->clip.state_bo)) + return PIPE_OK; + + /* Create new: + */ + ret = clip_unit_create_from_key(brw, &key, + &brw->clip.state_bo); + if (ret) + return ret; - return 0; + return PIPE_OK; } const struct brw_tracked_state brw_clip_unit = { diff --git a/src/gallium/drivers/i965/brw_context.c b/src/gallium/drivers/i965/brw_context.c index aaf7d1834e..2cee7a7a3c 100644 --- a/src/gallium/drivers/i965/brw_context.c +++ b/src/gallium/drivers/i965/brw_context.c @@ -72,29 +72,33 @@ static void brw_destroy_context( struct pipe_context *pipe ) brw->curr.fb.nr_cbufs = 0; pipe_surface_reference(&brw->curr.fb.zsbuf, NULL); - brw->sws->bo_unreference(brw->curbe.curbe_bo); - brw->sws->bo_unreference(brw->vs.prog_bo); - brw->sws->bo_unreference(brw->vs.state_bo); - brw->sws->bo_unreference(brw->vs.bind_bo); - brw->sws->bo_unreference(brw->gs.prog_bo); - brw->sws->bo_unreference(brw->gs.state_bo); - brw->sws->bo_unreference(brw->clip.prog_bo); - brw->sws->bo_unreference(brw->clip.state_bo); - brw->sws->bo_unreference(brw->clip.vp_bo); - brw->sws->bo_unreference(brw->sf.prog_bo); - brw->sws->bo_unreference(brw->sf.state_bo); - brw->sws->bo_unreference(brw->sf.vp_bo); + bo_reference(&brw->curbe.curbe_bo, NULL); + bo_reference(&brw->vs.prog_bo, NULL); + bo_reference(&brw->vs.state_bo, NULL); + bo_reference(&brw->vs.bind_bo, NULL); + bo_reference(&brw->gs.prog_bo, NULL); + bo_reference(&brw->gs.state_bo, NULL); + bo_reference(&brw->clip.prog_bo, NULL); + bo_reference(&brw->clip.state_bo, NULL); + bo_reference(&brw->clip.vp_bo, NULL); + bo_reference(&brw->sf.prog_bo, NULL); + bo_reference(&brw->sf.state_bo, NULL); + bo_reference(&brw->sf.vp_bo, NULL); + for (i = 0; i < BRW_MAX_TEX_UNIT; i++) - brw->sws->bo_unreference(brw->wm.sdc_bo[i]); - brw->sws->bo_unreference(brw->wm.bind_bo); + bo_reference(&brw->wm.sdc_bo[i], NULL); + + bo_reference(&brw->wm.bind_bo, NULL); + for (i = 0; i < BRW_WM_MAX_SURF; i++) - brw->sws->bo_unreference(brw->wm.surf_bo[i]); - brw->sws->bo_unreference(brw->wm.sampler_bo); - brw->sws->bo_unreference(brw->wm.prog_bo); - brw->sws->bo_unreference(brw->wm.state_bo); - brw->sws->bo_unreference(brw->cc.prog_bo); - brw->sws->bo_unreference(brw->cc.state_bo); - brw->sws->bo_unreference(brw->cc.vp_bo); + bo_reference(&brw->wm.surf_bo[i], NULL); + + bo_reference(&brw->wm.sampler_bo, NULL); + bo_reference(&brw->wm.prog_bo, NULL); + bo_reference(&brw->wm.state_bo, NULL); + bo_reference(&brw->cc.prog_bo, NULL); + bo_reference(&brw->cc.state_bo, NULL); + bo_reference(&brw->cc.vp_bo, NULL); } diff --git a/src/gallium/drivers/i965/brw_context.h b/src/gallium/drivers/i965/brw_context.h index 09d34615c7..580251d2f1 100644 --- a/src/gallium/drivers/i965/brw_context.h +++ b/src/gallium/drivers/i965/brw_context.h @@ -744,7 +744,7 @@ struct brw_context * brw_queryobj.c */ void brw_init_query(struct brw_context *brw); -void brw_prepare_query_begin(struct brw_context *brw); +enum pipe_error brw_prepare_query_begin(struct brw_context *brw); void brw_emit_query_begin(struct brw_context *brw); void brw_emit_query_end(struct brw_context *brw); diff --git a/src/gallium/drivers/i965/brw_curbe.c b/src/gallium/drivers/i965/brw_curbe.c index 1e2e232204..ca7774a7cc 100644 --- a/src/gallium/drivers/i965/brw_curbe.c +++ b/src/gallium/drivers/i965/brw_curbe.c @@ -160,10 +160,11 @@ static GLfloat fixed_plane[6][4] = { * cache mechanism, but maybe would benefit from a comparison against * the current uploaded set of constants. */ -static int prepare_curbe_buffer(struct brw_context *brw) +static enum pipe_error prepare_curbe_buffer(struct brw_context *brw) { const GLuint sz = brw->curbe.total_size; const GLuint bufsz = sz * 16 * sizeof(GLfloat); + enum pipe_error ret; GLfloat *buf; GLuint i; @@ -267,17 +268,20 @@ static int prepare_curbe_buffer(struct brw_context *brw) (brw->curbe.need_new_bo || brw->curbe.curbe_next_offset + bufsz > brw->curbe.curbe_bo->size)) { - brw->sws->bo_unreference(brw->curbe.curbe_bo); - brw->curbe.curbe_bo = NULL; + bo_reference(&brw->curbe.curbe_bo, NULL); } if (brw->curbe.curbe_bo == NULL) { /* Allocate a single page for CURBE entries for this batchbuffer. * They're generally around 64b. */ - brw->curbe.curbe_bo = brw->sws->bo_alloc(brw->sws, - BRW_BUFFER_TYPE_CURBE, - 4096, 1 << 6); + ret = brw->sws->bo_alloc(brw->sws, + BRW_BUFFER_TYPE_CURBE, + 4096, 1 << 6, + &brw->curbe.curbe_bo); + if (ret) + return ret; + brw->curbe.curbe_next_offset = 0; } @@ -313,7 +317,7 @@ static int prepare_curbe_buffer(struct brw_context *brw) return 0; } -static int emit_curbe_buffer(struct brw_context *brw) +static enum pipe_error emit_curbe_buffer(struct brw_context *brw) { GLuint sz = brw->curbe.total_size; diff --git a/src/gallium/drivers/i965/brw_draw.c b/src/gallium/drivers/i965/brw_draw.c index 6d6b1c7c5c..88cb31ad54 100644 --- a/src/gallium/drivers/i965/brw_draw.c +++ b/src/gallium/drivers/i965/brw_draw.c @@ -280,6 +280,5 @@ void brw_draw_cleanup( struct brw_context *brw ) u_upload_destroy( brw->vb.upload_vertex ); u_upload_destroy( brw->vb.upload_index ); - brw->sws->bo_unreference(brw->ib.bo); - brw->ib.bo = NULL; + bo_reference(&brw->ib.bo, NULL); } diff --git a/src/gallium/drivers/i965/brw_draw_upload.c b/src/gallium/drivers/i965/brw_draw_upload.c index 4fa7d549eb..188605a0c1 100644 --- a/src/gallium/drivers/i965/brw_draw_upload.c +++ b/src/gallium/drivers/i965/brw_draw_upload.c @@ -251,9 +251,8 @@ static int brw_prepare_vertices(struct brw_context *brw) brw->vb.vb[i].vertex_count = (vb->stride == 0 ? 1 : (bo->size - offset) / vb->stride); - brw->sws->bo_unreference(brw->vb.vb[i].bo); - brw->vb.vb[i].bo = bo; - brw->sws->bo_reference(brw->vb.vb[i].bo); + + bo_reference( &brw->vb.vb[i].bo, bo ); /* Don't need to retain this reference. We have a reference on * the underlying winsys buffer: @@ -417,6 +416,7 @@ const struct brw_tracked_state brw_vertices = { static int brw_prepare_indices(struct brw_context *brw) { struct pipe_buffer *index_buffer = brw->curr.index_buffer; + struct pipe_buffer *upload_buf = NULL; struct brw_winsys_buffer *bo = NULL; GLuint offset; GLuint index_size; @@ -438,7 +438,6 @@ static int brw_prepare_indices(struct brw_context *brw) /* Turn userbuffer into a proper hardware buffer? */ if (brw_buffer_is_user_buffer(index_buffer)) { - struct pipe_buffer *upload_buf; ret = u_upload_buffer( brw->vb.upload_index, 0, @@ -450,8 +449,6 @@ static int brw_prepare_indices(struct brw_context *brw) return ret; bo = brw_buffer(upload_buf)->bo; - brw->sws->bo_reference(bo); - pipe_buffer_reference( &upload_buf, NULL ); /* XXX: annotate the userbuffer with the upload information so * that successive calls don't get re-uploaded. @@ -459,8 +456,6 @@ static int brw_prepare_indices(struct brw_context *brw) } else { bo = brw_buffer(index_buffer)->bo; - brw->sws->bo_reference(bo); - ib_size = bo->size; offset = 0; } @@ -486,15 +481,12 @@ static int brw_prepare_indices(struct brw_context *brw) if (brw->ib.bo != bo || brw->ib.size != ib_size) { - brw->sws->bo_unreference(brw->ib.bo); - brw->ib.bo = bo; + bo_reference(&brw->ib.bo, bo); brw->ib.size = ib_size; brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER; } - else { - brw->sws->bo_unreference(bo); - } + pipe_buffer_reference( &upload_buf, NULL ); brw_add_validated_bo(brw, brw->ib.bo); return 0; } diff --git a/src/gallium/drivers/i965/brw_eu.c b/src/gallium/drivers/i965/brw_eu.c index de43b14512..a8fcb5f97e 100644 --- a/src/gallium/drivers/i965/brw_eu.c +++ b/src/gallium/drivers/i965/brw_eu.c @@ -118,16 +118,23 @@ void brw_init_compile( struct brw_context *brw, struct brw_compile *p ) } -const GLuint *brw_get_program( struct brw_compile *p, - GLuint *sz ) +enum pipe_error brw_get_program( struct brw_compile *p, + const GLuint **data, + GLuint *sz ) { GLuint i; for (i = 0; i < 8; i++) brw_NOP(p); + /* Is the generated program malformed for some reason? + */ + if (p->error) + return PIPE_ERROR_BAD_INPUT; + *sz = p->nr_insn * sizeof(struct brw_instruction); - return (const GLuint *)p->store; + *data = (const GLuint *)p->store; + return PIPE_OK; } diff --git a/src/gallium/drivers/i965/brw_eu.h b/src/gallium/drivers/i965/brw_eu.h index 7bddc3859c..565f4ef1c5 100644 --- a/src/gallium/drivers/i965/brw_eu.h +++ b/src/gallium/drivers/i965/brw_eu.h @@ -34,6 +34,7 @@ #define BRW_EU_H #include "util/u_debug.h" +#include "pipe/p_error.h" #include "brw_structs.h" #include "brw_defines.h" @@ -132,6 +133,8 @@ struct brw_compile { struct brw_eu_label *first_label; /**< linked list of labels */ struct brw_eu_call *first_call; /**< linked list of CALs */ + + boolean error; }; @@ -772,7 +775,10 @@ void brw_set_predicate_control( struct brw_compile *p, GLuint pc ); void brw_set_conditionalmod( struct brw_compile *p, GLuint conditional ); void brw_init_compile( struct brw_context *, struct brw_compile *p ); -const GLuint *brw_get_program( struct brw_compile *p, GLuint *sz ); + +enum pipe_error brw_get_program( struct brw_compile *p, + const GLuint **program, + GLuint *sz ); /* Helpers for regular instructions: diff --git a/src/gallium/drivers/i965/brw_gs.c b/src/gallium/drivers/i965/brw_gs.c index 693d8bfdf8..ce77be24f6 100644 --- a/src/gallium/drivers/i965/brw_gs.c +++ b/src/gallium/drivers/i965/brw_gs.c @@ -40,10 +40,12 @@ -static void compile_gs_prog( struct brw_context *brw, - struct brw_gs_prog_key *key ) +static enum pipe_error compile_gs_prog( struct brw_context *brw, + struct brw_gs_prog_key *key, + struct brw_winsys_buffer **bo_out ) { struct brw_gs_compile c; + enum pipe_error ret; const GLuint *program; GLuint program_size; @@ -57,9 +59,9 @@ static void compile_gs_prog( struct brw_context *brw, c.nr_attrs = c.key.nr_attrs; if (BRW_IS_IGDNG(brw)) - c.nr_regs = (c.nr_attrs + 1) / 2 + 3; /* are vertices packed, or reg-aligned? */ + c.nr_regs = (c.nr_attrs + 1) / 2 + 3; /* are vertices packed, or reg-aligned? */ else - c.nr_regs = (c.nr_attrs + 1) / 2 + 1; /* are vertices packed, or reg-aligned? */ + c.nr_regs = (c.nr_attrs + 1) / 2 + 1; /* are vertices packed, or reg-aligned? */ c.nr_bytes = c.nr_regs * REG_SIZE; @@ -93,40 +95,47 @@ static void compile_gs_prog( struct brw_context *brw, if (key->hint_gs_always) brw_gs_lines( &c ); else { - return; + return PIPE_OK; } break; case PIPE_PRIM_TRIANGLES: if (key->hint_gs_always) brw_gs_tris( &c ); else { - return; + return PIPE_OK; } break; case PIPE_PRIM_POINTS: if (key->hint_gs_always) brw_gs_points( &c ); else { - return; + return PIPE_OK; } - break; + break; default: - return; + assert(0); + return PIPE_ERROR_BAD_INPUT; } /* get the program */ - program = brw_get_program(&c.func, &program_size); + ret = brw_get_program(&c.func, &program, &program_size); + if (ret) + return ret; /* Upload */ - brw->sws->bo_unreference(brw->gs.prog_bo); - brw->gs.prog_bo = brw_upload_cache( &brw->cache, BRW_GS_PROG, - &c.key, sizeof(c.key), - NULL, 0, - program, program_size, - &c.prog_data, - &brw->gs.prog_data ); + ret = brw_upload_cache( &brw->cache, BRW_GS_PROG, + &c.key, sizeof(c.key), + NULL, 0, + program, program_size, + &c.prog_data, + &brw->gs.prog_data, + bo_out ); + if (ret) + return ret; + + return PIPE_OK; } static const unsigned gs_prim[PIPE_PRIM_MAX] = { @@ -166,6 +175,8 @@ static void populate_key( struct brw_context *brw, static int prepare_gs_prog(struct brw_context *brw) { struct brw_gs_prog_key key; + enum pipe_error ret; + /* Populate the key: */ populate_key(brw, &key); @@ -175,17 +186,21 @@ static int prepare_gs_prog(struct brw_context *brw) brw->gs.prog_active = key.need_gs_prog; } - if (brw->gs.prog_active) { - brw->sws->bo_unreference(brw->gs.prog_bo); - brw->gs.prog_bo = brw_search_cache(&brw->cache, BRW_GS_PROG, - &key, sizeof(key), - NULL, 0, - &brw->gs.prog_data); - if (brw->gs.prog_bo == NULL) - compile_gs_prog( brw, &key ); - } + if (!brw->gs.prog_active) + return PIPE_OK; + + if (brw_search_cache(&brw->cache, BRW_GS_PROG, + &key, sizeof(key), + NULL, 0, + &brw->gs.prog_data, + &brw->gs.prog_bo)) + return PIPE_OK; + + ret = compile_gs_prog( brw, &key, &brw->gs.prog_bo ); + if (ret) + return ret; - return 0; + return PIPE_OK; } diff --git a/src/gallium/drivers/i965/brw_gs_state.c b/src/gallium/drivers/i965/brw_gs_state.c index f27f886a65..18a66da538 100644 --- a/src/gallium/drivers/i965/brw_gs_state.c +++ b/src/gallium/drivers/i965/brw_gs_state.c @@ -69,11 +69,13 @@ gs_unit_populate_key(struct brw_context *brw, struct brw_gs_unit_key *key) key->urb_size = brw->urb.vsize; } -static struct brw_winsys_buffer * -gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key) +static enum pipe_error +gs_unit_create_from_key(struct brw_context *brw, + struct brw_gs_unit_key *key, + struct brw_winsys_buffer **bo_out) { struct brw_gs_unit_state gs; - struct brw_winsys_buffer *bo; + enum pipe_error ret; memset(&gs, 0, sizeof(gs)); @@ -104,40 +106,46 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key) if (BRW_DEBUG & DEBUG_STATS) gs.thread4.stats_enable = 1; - bo = brw_upload_cache(&brw->cache, BRW_GS_UNIT, - key, sizeof(*key), - &brw->gs.prog_bo, 1, - &gs, sizeof(gs), - NULL, NULL); + ret = brw_upload_cache(&brw->cache, BRW_GS_UNIT, + key, sizeof(*key), + &brw->gs.prog_bo, 1, + &gs, sizeof(gs), + NULL, NULL, + bo_out); + if (ret) + return ret; if (key->prog_active) { /* Emit GS program relocation */ - brw->sws->bo_emit_reloc(bo, + brw->sws->bo_emit_reloc(*bo_out, BRW_USAGE_STATE, gs.thread0.grf_reg_count << 1, offsetof(struct brw_gs_unit_state, thread0), brw->gs.prog_bo); } - return bo; + return PIPE_OK; } -static int prepare_gs_unit(struct brw_context *brw) +static enum pipe_error prepare_gs_unit(struct brw_context *brw) { struct brw_gs_unit_key key; + enum pipe_error ret; gs_unit_populate_key(brw, &key); - brw->sws->bo_unreference(brw->gs.state_bo); - brw->gs.state_bo = brw_search_cache(&brw->cache, BRW_GS_UNIT, - &key, sizeof(key), - &brw->gs.prog_bo, 1, - NULL); - if (brw->gs.state_bo == NULL) { - brw->gs.state_bo = gs_unit_create_from_key(brw, &key); - } + if (brw_search_cache(&brw->cache, BRW_GS_UNIT, + &key, sizeof(key), + &brw->gs.prog_bo, 1, + NULL, + &brw->gs.state_bo)) + return PIPE_OK; + + ret = gs_unit_create_from_key(brw, &key, &brw->gs.state_bo); + if (ret) + return ret; - return 0; + return PIPE_OK; } const struct brw_tracked_state brw_gs_unit = { diff --git a/src/gallium/drivers/i965/brw_pipe_query.c b/src/gallium/drivers/i965/brw_pipe_query.c index 3370ebd262..6a01173787 100644 --- a/src/gallium/drivers/i965/brw_pipe_query.c +++ b/src/gallium/drivers/i965/brw_pipe_query.c @@ -72,8 +72,7 @@ brw_query_get_result(struct pipe_context *pipe, } brw->sws->bo_unmap(query->bo); - brw->sws->bo_unreference(query->bo); - query->bo = NULL; + bo_reference(&query->bo, NULL); } *result = query->result; @@ -100,10 +99,9 @@ brw_query_create(struct pipe_context *pipe, unsigned type ) static void brw_query_destroy(struct pipe_context *pipe, struct pipe_query *q) { - struct brw_context *brw = brw_context(pipe); struct brw_query_object *query = (struct brw_query_object *)q; - brw->sws->bo_unreference(query->bo); + bo_reference(&query->bo, NULL); FREE(query); } @@ -114,9 +112,8 @@ brw_query_begin(struct pipe_context *pipe, struct pipe_query *q) struct brw_query_object *query = (struct brw_query_object *)q; /* Reset our driver's tracking of query state. */ - brw->sws->bo_unreference(query->bo); + bo_reference(&query->bo, NULL); query->result = 0; - query->bo = NULL; query->first_index = -1; query->last_index = -1; @@ -139,8 +136,7 @@ brw_query_end(struct pipe_context *pipe, struct pipe_query *q) brw_emit_query_end(brw); brw_context_flush( brw ); - brw->sws->bo_unreference(brw->query.bo); - brw->query.bo = NULL; + bo_reference(&brw->query.bo, NULL); } remove_from_list(query); @@ -153,24 +149,30 @@ brw_query_end(struct pipe_context *pipe, struct pipe_query *q) */ /** Called to set up the query BO and account for its aperture space */ -void +enum pipe_error brw_prepare_query_begin(struct brw_context *brw) { + enum pipe_error ret; + /* Skip if we're not doing any queries. */ if (is_empty_list(&brw->query.active_head)) - return; + return PIPE_OK; /* Get a new query BO if we're going to need it. */ if (brw->query.bo == NULL || brw->query.index * 2 + 1 >= 4096 / sizeof(uint64_t)) { - brw->sws->bo_unreference(brw->query.bo); - brw->query.bo = NULL; - brw->query.bo = brw->sws->bo_alloc(brw->sws, BRW_BUFFER_TYPE_QUERY, 4096, 1); + ret = brw->sws->bo_alloc(brw->sws, BRW_BUFFER_TYPE_QUERY, 4096, 1, + &brw->query.bo); + if (ret) + return ret; + brw->query.index = 0; } brw_add_validated_bo(brw, brw->query.bo); + + return PIPE_OK; } /** Called just before primitive drawing to get a beginning PS_DEPTH_COUNT. */ @@ -213,8 +215,7 @@ brw_emit_query_begin(struct brw_context *brw) FALSE, &tmp ); - brw->sws->bo_reference(brw->query.bo); - query->bo = brw->query.bo; + bo_reference( &query->bo, brw->query.bo ); query->first_index = brw->query.index; } query->last_index = brw->query.index; diff --git a/src/gallium/drivers/i965/brw_pipe_shader.c b/src/gallium/drivers/i965/brw_pipe_shader.c index 2833f2bce0..662c43c3e5 100644 --- a/src/gallium/drivers/i965/brw_pipe_shader.c +++ b/src/gallium/drivers/i965/brw_pipe_shader.c @@ -146,10 +146,9 @@ fail: static void brw_delete_fs_state( struct pipe_context *pipe, void *prog ) { - struct brw_context *brw = brw_context(pipe); struct brw_fragment_shader *fs = (struct brw_fragment_shader *)prog; - brw->sws->bo_unreference(fs->const_buffer); + bo_reference(&fs->const_buffer, NULL); FREE( (void *)fs->tokens ); FREE( fs ); } diff --git a/src/gallium/drivers/i965/brw_pipe_vertex.c b/src/gallium/drivers/i965/brw_pipe_vertex.c index 97e9a23688..73bba5b088 100644 --- a/src/gallium/drivers/i965/brw_pipe_vertex.c +++ b/src/gallium/drivers/i965/brw_pipe_vertex.c @@ -56,7 +56,7 @@ brw_pipe_vertex_cleanup( struct brw_context *brw ) */ #if 0 for (i = 0; i < PIPE_MAX_ATTRIBS; i++) { - brw->sws->bo_unreference(brw->vb.inputs[i].bo); + bo_reference(&brw->vb.inputs[i].bo, NULL); brw->vb.inputs[i].bo = NULL; } #endif diff --git a/src/gallium/drivers/i965/brw_screen_buffers.c b/src/gallium/drivers/i965/brw_screen_buffers.c index ba54740225..7ae386ffb3 100644 --- a/src/gallium/drivers/i965/brw_screen_buffers.c +++ b/src/gallium/drivers/i965/brw_screen_buffers.c @@ -43,15 +43,11 @@ brw_buffer_unmap( struct pipe_screen *screen, static void brw_buffer_destroy( struct pipe_buffer *buffer ) { - struct brw_screen *bscreen = brw_screen( buffer->screen ); - struct brw_winsys_screen *sws = bscreen->sws; struct brw_buffer *buf = brw_buffer( buffer ); assert(!p_atomic_read(&buffer->reference.count)); - if (buf->bo) - sws->bo_unreference(buf->bo); - + bo_reference(&buf->bo, NULL); FREE(buf); } @@ -66,6 +62,7 @@ brw_buffer_create(struct pipe_screen *screen, struct brw_winsys_screen *sws = bscreen->sws; struct brw_buffer *buf; unsigned buffer_type; + enum pipe_error ret; buf = CALLOC_STRUCT(brw_buffer); if (!buf) @@ -101,10 +98,11 @@ brw_buffer_create(struct pipe_screen *screen, break; } - buf->bo = sws->bo_alloc( sws, - buffer_type, - size, - alignment ); + ret = sws->bo_alloc( sws, buffer_type, + size, alignment, + &buf->bo ); + if (ret != PIPE_OK) + return NULL; return &buf->base; } diff --git a/src/gallium/drivers/i965/brw_screen_surface.c b/src/gallium/drivers/i965/brw_screen_surface.c index 1c408e9f2e..21a7382873 100644 --- a/src/gallium/drivers/i965/brw_screen_surface.c +++ b/src/gallium/drivers/i965/brw_screen_surface.c @@ -150,9 +150,7 @@ static struct brw_surface *create_in_place_view( struct brw_screen *brw_screen, surface->pitch = tex->pitch; surface->tiling = tex->tiling; - surface->bo = tex->bo; - brw_screen->sws->bo_reference(surface->bo); - + bo_reference( &surface->bo, tex->bo ); pipe_texture_reference( &surface->base.texture, &tex->base ); surface->ss.ss0.surface_format = tex->ss.ss0.surface_format; @@ -244,11 +242,10 @@ static struct pipe_surface *brw_get_tex_surface(struct pipe_screen *screen, static void brw_tex_surface_destroy( struct pipe_surface *surf ) { struct brw_surface *surface = brw_surface(surf); - struct brw_screen *screen = brw_screen(surf->texture->screen); /* Unreference texture, shared buffer: */ - screen->sws->bo_unreference(surface->bo); + bo_reference(&surface->bo, NULL); pipe_texture_reference( &surface->base.texture, NULL ); diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c index ba6dc7dfde..355abf0b89 100644 --- a/src/gallium/drivers/i965/brw_screen_texture.c +++ b/src/gallium/drivers/i965/brw_screen_texture.c @@ -187,6 +187,7 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, struct brw_screen *bscreen = brw_screen(screen); struct brw_texture *tex; enum brw_buffer_type buffer_type; + enum pipe_error ret; tex = CALLOC_STRUCT(brw_texture); if (tex == NULL) @@ -235,10 +236,13 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, buffer_type = BRW_BUFFER_TYPE_TEXTURE; } - tex->bo = bscreen->sws->bo_alloc( bscreen->sws, - buffer_type, - tex->pitch * tex->total_height * tex->cpp, - 64 ); + ret = bscreen->sws->bo_alloc( bscreen->sws, + buffer_type, + tex->pitch * tex->total_height * tex->cpp, + 64, + &tex->bo ); + if (ret) + goto fail; tex->ss.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW; tex->ss.ss0.surface_type = translate_tex_target(tex->base.target); @@ -289,7 +293,7 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, return &tex->base; fail: - bscreen->sws->bo_unreference(tex->bo); + bo_reference(&tex->bo, NULL); FREE(tex); return NULL; } @@ -306,7 +310,8 @@ static struct pipe_texture *brw_texture_blanket(struct pipe_screen *screen, static void brw_texture_destroy(struct pipe_texture *pt) { - //bscreen->sws->bo_unreference(tex->bo); + struct brw_texture *tex = brw_texture(pt); + bo_reference(&tex->bo, NULL); FREE(pt); } diff --git a/src/gallium/drivers/i965/brw_sf.c b/src/gallium/drivers/i965/brw_sf.c index 013d839e37..24d1015bbd 100644 --- a/src/gallium/drivers/i965/brw_sf.c +++ b/src/gallium/drivers/i965/brw_sf.c @@ -40,9 +40,11 @@ #include "brw_sf.h" #include "brw_state.h" -static void compile_sf_prog( struct brw_context *brw, - struct brw_sf_prog_key *key ) +static enum pipe_error compile_sf_prog( struct brw_context *brw, + struct brw_sf_prog_key *key, + struct brw_winsys_buffer **bo_out ) { + enum pipe_error ret; struct brw_sf_compile c; const GLuint *program; GLuint program_size; @@ -87,28 +89,35 @@ static void compile_sf_prog( struct brw_context *brw, break; default: assert(0); - return; + return PIPE_ERROR_BAD_INPUT; } /* get the program */ - program = brw_get_program(&c.func, &program_size); + ret = brw_get_program(&c.func, &program, &program_size); + if (ret) + return ret; /* Upload */ - brw->sws->bo_unreference(brw->sf.prog_bo); - brw->sf.prog_bo = brw_upload_cache( &brw->cache, BRW_SF_PROG, - &c.key, sizeof(c.key), - NULL, 0, - program, program_size, - &c.prog_data, - &brw->sf.prog_data ); + ret = brw_upload_cache( &brw->cache, BRW_SF_PROG, + &c.key, sizeof(c.key), + NULL, 0, + program, program_size, + &c.prog_data, + &brw->sf.prog_data, + bo_out); + if (ret) + return ret; + + return PIPE_OK; } /* Calculate interpolants for triangle and line rasterization. */ -static int upload_sf_prog(struct brw_context *brw) +static enum pipe_error upload_sf_prog(struct brw_context *brw) { + enum pipe_error ret; struct brw_sf_prog_key key; memset(&key, 0, sizeof(key)); @@ -161,15 +170,18 @@ static int upload_sf_prog(struct brw_context *brw) PIPE_WINDING_CCW); } - brw->sws->bo_unreference(brw->sf.prog_bo); - brw->sf.prog_bo = brw_search_cache(&brw->cache, BRW_SF_PROG, - &key, sizeof(key), - NULL, 0, - &brw->sf.prog_data); - if (brw->sf.prog_bo == NULL) - compile_sf_prog( brw, &key ); + if (brw_search_cache(&brw->cache, BRW_SF_PROG, + &key, sizeof(key), + NULL, 0, + &brw->sf.prog_data, + &brw->sf.prog_bo)) + return PIPE_OK; - return 0; + ret = compile_sf_prog( brw, &key, &brw->sf.prog_bo ); + if (ret) + return ret; + + return PIPE_OK; } diff --git a/src/gallium/drivers/i965/brw_sf_state.c b/src/gallium/drivers/i965/brw_sf_state.c index 31343ff245..f030f26c19 100644 --- a/src/gallium/drivers/i965/brw_sf_state.c +++ b/src/gallium/drivers/i965/brw_sf_state.c @@ -39,11 +39,12 @@ #include "brw_debug.h" #include "brw_pipe_rast.h" -static int upload_sf_vp(struct brw_context *brw) +static enum pipe_error upload_sf_vp(struct brw_context *brw) { const struct pipe_viewport_state *vp = &brw->curr.vp; const struct pipe_scissor_state *scissor = &brw->curr.scissor; struct brw_sf_viewport sfv; + enum pipe_error ret; memset(&sfv, 0, sizeof(sfv)); @@ -61,10 +62,12 @@ static int upload_sf_vp(struct brw_context *brw) sfv.scissor.ymin = scissor->miny; sfv.scissor.ymax = scissor->maxy; /* -1 ?? */ - brw->sws->bo_unreference(brw->sf.vp_bo); - brw->sf.vp_bo = brw_cache_data( &brw->cache, BRW_SF_VP, &sfv, NULL, 0 ); + ret = brw_cache_data( &brw->cache, BRW_SF_VP, &sfv, NULL, 0, + &brw->sf.vp_bo ); + if (ret) + return ret; - return 0; + return PIPE_OK; } const struct brw_tracked_state brw_sf_vp = { @@ -128,12 +131,13 @@ sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key) rast->point_size_max); } -static struct brw_winsys_buffer * +static enum pipe_error sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, - struct brw_winsys_buffer **reloc_bufs) + struct brw_winsys_buffer **reloc_bufs, + struct brw_winsys_buffer **bo_out) { struct brw_sf_unit_state sf; - struct brw_winsys_buffer *bo; + enum pipe_error ret; int chipset_max_threads; memset(&sf, 0, sizeof(sf)); @@ -273,51 +277,65 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, sf.sf6.dest_org_hbias = 0x0; } - bo = brw_upload_cache(&brw->cache, BRW_SF_UNIT, - key, sizeof(*key), - reloc_bufs, 2, - &sf, sizeof(sf), - NULL, NULL); + ret = brw_upload_cache(&brw->cache, BRW_SF_UNIT, + key, sizeof(*key), + reloc_bufs, 2, + &sf, sizeof(sf), + NULL, NULL, + bo_out); + if (ret) + return ret; /* STATE_PREFETCH command description describes this state as being * something loaded through the GPE (L2 ISC), so it's INSTRUCTION domain. */ /* Emit SF program relocation */ - brw->sws->bo_emit_reloc(bo, - BRW_USAGE_STATE, - sf.thread0.grf_reg_count << 1, - offsetof(struct brw_sf_unit_state, thread0), - brw->sf.prog_bo); + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_STATE, + sf.thread0.grf_reg_count << 1, + offsetof(struct brw_sf_unit_state, thread0), + brw->sf.prog_bo); + if (ret) + return ret; - /* Emit SF viewport relocation */ - brw->sws->bo_emit_reloc(bo, - BRW_USAGE_STATE, - sf.sf5.front_winding | (sf.sf5.viewport_transform << 1), - offsetof(struct brw_sf_unit_state, sf5), - brw->sf.vp_bo); - return bo; + /* Emit SF viewport relocation */ + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_STATE, + sf.sf5.front_winding | (sf.sf5.viewport_transform << 1), + offsetof(struct brw_sf_unit_state, sf5), + brw->sf.vp_bo); + if (ret) + return ret; + + return PIPE_OK; } -static int upload_sf_unit( struct brw_context *brw ) +static enum pipe_error upload_sf_unit( struct brw_context *brw ) { struct brw_sf_unit_key key; struct brw_winsys_buffer *reloc_bufs[2]; + enum pipe_error ret; sf_unit_populate_key(brw, &key); reloc_bufs[0] = brw->sf.prog_bo; reloc_bufs[1] = brw->sf.vp_bo; - brw->sws->bo_unreference(brw->sf.state_bo); - brw->sf.state_bo = brw_search_cache(&brw->cache, BRW_SF_UNIT, - &key, sizeof(key), - reloc_bufs, 2, - NULL); - if (brw->sf.state_bo == NULL) { - brw->sf.state_bo = sf_unit_create_from_key(brw, &key, reloc_bufs); - } - return 0; + if (brw_search_cache(&brw->cache, BRW_SF_UNIT, + &key, sizeof(key), + reloc_bufs, 2, + NULL, + &brw->sf.state_bo)) + return PIPE_OK; + + + ret = sf_unit_create_from_key(brw, &key, reloc_bufs, + &brw->sf.state_bo); + if (ret) + return ret; + + return PIPE_OK; } const struct brw_tracked_state brw_sf_unit = { diff --git a/src/gallium/drivers/i965/brw_state.h b/src/gallium/drivers/i965/brw_state.h index 94d2cb6f82..e219a1d870 100644 --- a/src/gallium/drivers/i965/brw_state.h +++ b/src/gallium/drivers/i965/brw_state.h @@ -44,8 +44,8 @@ brw_add_validated_bo(struct brw_context *brw, struct brw_winsys_buffer *bo) assert(brw->state.validated_bo_count < Elements(brw->state.validated_bos)); if (bo != NULL) { - brw->sws->bo_reference(bo); - brw->state.validated_bos[brw->state.validated_bo_count++] = bo; + bo_reference( &brw->state.validated_bos[brw->state.validated_bo_count++], + bo ); } } @@ -106,37 +106,42 @@ void brw_destroy_state(struct brw_context *brw); /*********************************************************************** * brw_state_cache.c */ -struct brw_winsys_buffer *brw_cache_data(struct brw_cache *cache, - enum brw_cache_id cache_id, - const void *data, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs); - -struct brw_winsys_buffer *brw_cache_data_sz(struct brw_cache *cache, - enum brw_cache_id cache_id, - const void *data, - GLuint data_size, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs); - -struct brw_winsys_buffer *brw_upload_cache( struct brw_cache *cache, - enum brw_cache_id cache_id, - const void *key, - GLuint key_sz, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs, - const void *data, - GLuint data_sz, - const void *aux, - void *aux_return ); - -struct brw_winsys_buffer *brw_search_cache( struct brw_cache *cache, - enum brw_cache_id cache_id, - const void *key, - GLuint key_size, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs, - void *aux_return); +enum pipe_error brw_cache_data(struct brw_cache *cache, + enum brw_cache_id cache_id, + const void *data, + struct brw_winsys_buffer **reloc_bufs, + GLuint nr_reloc_bufs, + struct brw_winsys_buffer **bo_out ); + +enum pipe_error brw_cache_data_sz(struct brw_cache *cache, + enum brw_cache_id cache_id, + const void *data, + GLuint data_size, + struct brw_winsys_buffer **reloc_bufs, + GLuint nr_reloc_bufs, + struct brw_winsys_buffer **bo_out); + +enum pipe_error brw_upload_cache( struct brw_cache *cache, + enum brw_cache_id cache_id, + const void *key, + GLuint key_sz, + struct brw_winsys_buffer **reloc_bufs, + GLuint nr_reloc_bufs, + const void *data, + GLuint data_sz, + const void *aux, + void *aux_return , + struct brw_winsys_buffer **bo_out); + +boolean brw_search_cache( struct brw_cache *cache, + enum brw_cache_id cache_id, + const void *key, + GLuint key_size, + struct brw_winsys_buffer **reloc_bufs, + GLuint nr_reloc_bufs, + void *aux_return, + struct brw_winsys_buffer **bo_out); + void brw_state_cache_check_size( struct brw_context *brw ); void brw_init_caches( struct brw_context *brw ); diff --git a/src/gallium/drivers/i965/brw_state_cache.c b/src/gallium/drivers/i965/brw_state_cache.c index cbd1f02d77..f8369d31ec 100644 --- a/src/gallium/drivers/i965/brw_state_cache.c +++ b/src/gallium/drivers/i965/brw_state_cache.c @@ -109,9 +109,8 @@ update_cache_last(struct brw_cache *cache, enum brw_cache_id cache_id, if (bo == cache->last_bo[cache_id]) return; /* no change */ - cache->sws->bo_unreference(cache->last_bo[cache_id]); - cache->last_bo[cache_id] = bo; - cache->sws->bo_reference(cache->last_bo[cache_id]); + bo_reference( &cache->last_bo[cache_id], bo ); + cache->brw->state.dirty.cache |= 1 << cache_id; } @@ -174,14 +173,15 @@ rehash(struct brw_cache *cache) /** * Returns the buffer object matching cache_id and key, or NULL. */ -struct brw_winsys_buffer * +boolean brw_search_cache(struct brw_cache *cache, enum brw_cache_id cache_id, const void *key, GLuint key_size, struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs, - void *aux_return) + void *aux_return, + struct brw_winsys_buffer **bo_out) { struct brw_cache_item *item; GLuint hash = hash_key(key, key_size, reloc_bufs, nr_reloc_bufs); @@ -189,20 +189,20 @@ brw_search_cache(struct brw_cache *cache, item = search_cache(cache, cache_id, hash, key, key_size, reloc_bufs, nr_reloc_bufs); - if (item == NULL) - return NULL; - - if (aux_return) - *(void **)aux_return = (void *)((char *)item->key + item->key_size); - - update_cache_last(cache, cache_id, item->bo); - - cache->sws->bo_reference(item->bo); - return item->bo; + if (item) { + if (aux_return) + *(void **)aux_return = (void *)((char *)item->key + item->key_size); + + update_cache_last(cache, cache_id, item->bo); + bo_reference(bo_out, item->bo); + return TRUE; + } + + return FALSE; } -struct brw_winsys_buffer * +enum pipe_error brw_upload_cache( struct brw_cache *cache, enum brw_cache_id cache_id, const void *key, @@ -212,14 +212,15 @@ brw_upload_cache( struct brw_cache *cache, const void *data, GLuint data_size, const void *aux, - void *aux_return ) + void *aux_return, + struct brw_winsys_buffer **bo_out) { struct brw_cache_item *item = CALLOC_STRUCT(brw_cache_item); GLuint hash = hash_key(key, key_size, reloc_bufs, nr_reloc_bufs); GLuint relocs_size = nr_reloc_bufs * sizeof(struct brw_winsys_buffer *); GLuint aux_size = cache->aux_size[cache_id]; + enum pipe_error ret; void *tmp; - struct brw_winsys_buffer *bo; int i; /* Create the buffer object to contain the data. For now, use a @@ -227,9 +228,12 @@ brw_upload_cache( struct brw_cache *cache, * may want to take advantage of hardware distinctions between * these various entities. */ - bo = cache->sws->bo_alloc(cache->sws, - cache->buffer_type, - data_size, 1 << 6); + ret = cache->sws->bo_alloc(cache->sws, + cache->buffer_type, + data_size, 1 << 6, + bo_out); + if (ret) + return ret; /* Set up the memory containing the key, aux_data, and reloc_bufs */ @@ -240,7 +244,7 @@ brw_upload_cache( struct brw_cache *cache, memcpy((char *)tmp + key_size + aux_size, reloc_bufs, relocs_size); for (i = 0; i < nr_reloc_bufs; i++) { if (reloc_bufs[i] != NULL) - cache->sws->bo_reference(reloc_bufs[i]); + p_atomic_inc(&reloc_bufs[i]->reference.count); } item->cache_id = cache_id; @@ -249,9 +253,7 @@ brw_upload_cache( struct brw_cache *cache, item->key_size = key_size; item->reloc_bufs = (struct brw_winsys_buffer **)((char *)tmp + key_size + aux_size); item->nr_reloc_bufs = nr_reloc_bufs; - - item->bo = bo; - cache->sws->bo_reference(bo); + bo_reference( &item->bo, *bo_out ); item->data_size = data_size; if (cache->n_items > cache->size * 1.5) @@ -273,28 +275,28 @@ brw_upload_cache( struct brw_cache *cache, data_size, cache_id); /* Copy data to the buffer */ - cache->sws->bo_subdata(bo, + cache->sws->bo_subdata(item->bo, cache_id, 0, data_size, data); - update_cache_last(cache, cache_id, bo); + update_cache_last(cache, cache_id, item->bo); - return bo; + return PIPE_OK; } /** * This doesn't really work with aux data. Use search/upload instead */ -struct brw_winsys_buffer * +enum pipe_error brw_cache_data_sz(struct brw_cache *cache, enum brw_cache_id cache_id, const void *data, GLuint data_size, struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs) + GLuint nr_reloc_bufs, + struct brw_winsys_buffer **bo_out) { - struct brw_winsys_buffer *bo; struct brw_cache_item *item; GLuint hash = hash_key(data, data_size, reloc_bufs, nr_reloc_bufs); @@ -302,17 +304,17 @@ brw_cache_data_sz(struct brw_cache *cache, reloc_bufs, nr_reloc_bufs); if (item) { update_cache_last(cache, cache_id, item->bo); - cache->sws->bo_reference(item->bo); - return item->bo; - } - bo = brw_upload_cache(cache, cache_id, - data, data_size, - reloc_bufs, nr_reloc_bufs, - data, data_size, - NULL, NULL); + bo_reference(bo_out, item->bo); + return PIPE_OK; + } - return bo; + return brw_upload_cache(cache, cache_id, + data, data_size, + reloc_bufs, nr_reloc_bufs, + data, data_size, + NULL, NULL, + bo_out); } @@ -323,15 +325,16 @@ brw_cache_data_sz(struct brw_cache *cache, * better to use, as the potentially changing offsets in the data-used-as-key * will result in excessive cache misses. */ -struct brw_winsys_buffer * +enum pipe_error brw_cache_data(struct brw_cache *cache, enum brw_cache_id cache_id, const void *data, struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs) + GLuint nr_reloc_bufs, + struct brw_winsys_buffer **bo_out) { return brw_cache_data_sz(cache, cache_id, data, cache->key_size[cache_id], - reloc_bufs, nr_reloc_bufs); + reloc_bufs, nr_reloc_bufs, bo_out); } @@ -506,11 +509,13 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) int j; next = c->next; + for (j = 0; j < c->nr_reloc_bufs; j++) - brw->sws->bo_unreference(c->reloc_bufs[j]); - brw->sws->bo_unreference(c->bo); - free((void *)c->key); - free(c); + bo_reference(&c->reloc_bufs[j], NULL); + + bo_reference(&c->bo, NULL); + FREE((void *)c->key); + FREE(c); } cache->items[i] = NULL; } @@ -551,10 +556,12 @@ brw_state_cache_bo_delete(struct brw_cache *cache, struct brw_winsys_buffer *bo) *prev = c->next; for (j = 0; j < c->nr_reloc_bufs; j++) - cache->sws->bo_unreference(c->reloc_bufs[j]); - cache->sws->bo_unreference(c->bo); - free((void *)c->key); - free(c); + bo_reference(&c->reloc_bufs[j], NULL); + + bo_reference(&c->bo, NULL); + + FREE((void *)c->key); + FREE(c); cache->n_items--; } else { prev = &c->next; @@ -590,10 +597,10 @@ brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache) brw_clear_cache(brw, cache); for (i = 0; i < BRW_MAX_CACHE; i++) { - brw->sws->bo_unreference(cache->last_bo[i]); - free(cache->name[i]); + bo_reference(&cache->last_bo[i], NULL); + FREE(cache->name[i]); } - free(cache->items); + FREE(cache->items); cache->items = NULL; cache->size = 0; } diff --git a/src/gallium/drivers/i965/brw_state_upload.c b/src/gallium/drivers/i965/brw_state_upload.c index a71af4d2b9..fdcdd59129 100644 --- a/src/gallium/drivers/i965/brw_state_upload.c +++ b/src/gallium/drivers/i965/brw_state_upload.c @@ -140,8 +140,7 @@ brw_clear_validated_bos(struct brw_context *brw) /* Clear the last round of validated bos */ for (i = 0; i < brw->state.validated_bo_count; i++) { - brw->sws->bo_unreference(brw->state.validated_bos[i]); - brw->state.validated_bos[i] = NULL; + bo_reference(&brw->state.validated_bos[i], NULL); } brw->state.validated_bo_count = 0; } diff --git a/src/gallium/drivers/i965/brw_vs.c b/src/gallium/drivers/i965/brw_vs.c index 26a28114d9..966940ceac 100644 --- a/src/gallium/drivers/i965/brw_vs.c +++ b/src/gallium/drivers/i965/brw_vs.c @@ -39,10 +39,12 @@ -static void do_vs_prog( struct brw_context *brw, - struct brw_vertex_shader *vp, - struct brw_vs_prog_key *key ) +static enum pipe_error do_vs_prog( struct brw_context *brw, + struct brw_vertex_shader *vp, + struct brw_vs_prog_key *key, + struct brw_winsys_buffer **bo_out) { + enum pipe_error ret; GLuint program_size; const GLuint *program; struct brw_vs_compile c; @@ -66,22 +68,29 @@ static void do_vs_prog( struct brw_context *brw, /* get the program */ - program = brw_get_program(&c.func, &program_size); - - brw->sws->bo_unreference(brw->vs.prog_bo); - brw->vs.prog_bo = brw_upload_cache( &brw->cache, BRW_VS_PROG, - &c.key, sizeof(c.key), - NULL, 0, - program, program_size, - &c.prog_data, - &brw->vs.prog_data ); + ret = brw_get_program(&c.func, &program, &program_size); + if (ret) + return ret; + + ret = brw_upload_cache( &brw->cache, BRW_VS_PROG, + &c.key, sizeof(c.key), + NULL, 0, + program, program_size, + &c.prog_data, + &brw->vs.prog_data, + bo_out); + if (ret) + return ret; + + return PIPE_OK; } -static int brw_upload_vs_prog(struct brw_context *brw) +static enum pipe_error brw_upload_vs_prog(struct brw_context *brw) { struct brw_vs_prog_key key; struct brw_vertex_shader *vp = brw->curr.vertex_shader; + enum pipe_error ret; memset(&key, 0, sizeof(key)); @@ -95,15 +104,18 @@ static int brw_upload_vs_prog(struct brw_context *brw) /* Make an early check for the key. */ - brw->sws->bo_unreference(brw->vs.prog_bo); - brw->vs.prog_bo = brw_search_cache(&brw->cache, BRW_VS_PROG, - &key, sizeof(key), - NULL, 0, - &brw->vs.prog_data); - if (brw->vs.prog_bo == NULL) - do_vs_prog(brw, vp, &key); - - return 0; + if (brw_search_cache(&brw->cache, BRW_VS_PROG, + &key, sizeof(key), + NULL, 0, + &brw->vs.prog_data, + &brw->vs.prog_bo)) + return PIPE_OK; + + ret = do_vs_prog(brw, vp, &key, &brw->vs.prog_bo); + if (ret) + return ret; + + return PIPE_OK; } diff --git a/src/gallium/drivers/i965/brw_vs_state.c b/src/gallium/drivers/i965/brw_vs_state.c index 26d5d005fa..22a4d7f01b 100644 --- a/src/gallium/drivers/i965/brw_vs_state.c +++ b/src/gallium/drivers/i965/brw_vs_state.c @@ -78,11 +78,13 @@ vs_unit_populate_key(struct brw_context *brw, struct brw_vs_unit_key *key) } } -static struct brw_winsys_buffer * -vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) +static enum pipe_error +vs_unit_create_from_key(struct brw_context *brw, + struct brw_vs_unit_key *key, + struct brw_winsys_buffer **bo_out) { + enum pipe_error ret; struct brw_vs_unit_state vs; - struct brw_winsys_buffer *bo; int chipset_max_threads; memset(&vs, 0, sizeof(vs)); @@ -141,38 +143,46 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key) */ vs.vs6.vs_enable = 1; - bo = brw_upload_cache(&brw->cache, BRW_VS_UNIT, - key, sizeof(*key), - &brw->vs.prog_bo, 1, - &vs, sizeof(vs), - NULL, NULL); + ret = brw_upload_cache(&brw->cache, BRW_VS_UNIT, + key, sizeof(*key), + &brw->vs.prog_bo, 1, + &vs, sizeof(vs), + NULL, NULL, + bo_out); + if (ret) + return ret; /* Emit VS program relocation */ - brw->sws->bo_emit_reloc(bo, - BRW_USAGE_STATE, - vs.thread0.grf_reg_count << 1, - offsetof(struct brw_vs_unit_state, thread0), - brw->vs.prog_bo); - - return bo; + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_STATE, + vs.thread0.grf_reg_count << 1, + offsetof(struct brw_vs_unit_state, thread0), + brw->vs.prog_bo); + if (ret) + return ret; + + return PIPE_OK; } static int prepare_vs_unit(struct brw_context *brw) { struct brw_vs_unit_key key; + enum pipe_error ret; vs_unit_populate_key(brw, &key); - brw->sws->bo_unreference(brw->vs.state_bo); - brw->vs.state_bo = brw_search_cache(&brw->cache, BRW_VS_UNIT, - &key, sizeof(key), - &brw->vs.prog_bo, 1, - NULL); - if (brw->vs.state_bo == NULL) { - brw->vs.state_bo = vs_unit_create_from_key(brw, &key); - } + if (brw_search_cache(&brw->cache, BRW_VS_UNIT, + &key, sizeof(key), + &brw->vs.prog_bo, 1, + NULL, + &brw->vs.state_bo)) + return PIPE_OK; + + ret = vs_unit_create_from_key(brw, &key, &brw->vs.state_bo); + if (ret) + return ret; - return 0; + return PIPE_OK; } const struct brw_tracked_state brw_vs_unit = { diff --git a/src/gallium/drivers/i965/brw_vs_surface_state.c b/src/gallium/drivers/i965/brw_vs_surface_state.c index 32fb9b2a8b..b12df0ec03 100644 --- a/src/gallium/drivers/i965/brw_vs_surface_state.c +++ b/src/gallium/drivers/i965/brw_vs_surface_state.c @@ -83,22 +83,23 @@ brw_update_vs_constant_surface( struct brw_context *brw, { struct brw_surface_key key; struct pipe_buffer *cb = brw->curr.vs_constants; + enum pipe_error ret; assert(surf == 0); /* If we're in this state update atom, we need to update VS constants, so * free the old buffer and create a new one for the new contents. */ - brw->sws->bo_unreference(vp->const_buffer); - vp->const_buffer = brw_vs_update_constant_buffer(brw); + ret = brw_vs_update_constant_buffer(brw, &vp->const_buffer); + if (ret) + return ret; /* If there's no constant buffer, then no surface BO is needed to point at * it. */ - if (vp->const_buffer == 0) { - drm_intel_bo_unreference(brw->vs.surf_bo[surf]); - brw->vs.surf_bo[surf] = NULL; - return; + if (vp->const_buffer == NULL) { + bo_reference(brw->vs.surf_bo[surf], NULL); + return PIPE_OK; } memset(&key, 0, sizeof(key)); @@ -118,15 +119,20 @@ brw_update_vs_constant_surface( struct brw_context *brw, key.width, key.height, key.depth, key.cpp, key.pitch); */ - drm_intel_bo_unreference(brw->vs.surf_bo[surf]); - brw->vs.surf_bo[surf] = brw_search_cache(&brw->surface_cache, - BRW_SS_SURFACE, - &key, sizeof(key), - &key.bo, key.bo ? 1 : 0, - NULL); - if (brw->vs.surf_bo[surf] == NULL) { - brw->vs.surf_bo[surf] = brw_create_constant_surface(brw, &key); - } + if (brw_search_cache(&brw->surface_cache, + BRW_SS_SURFACE, + &key, sizeof(key), + &key.bo, key.bo ? 1 : 0, + NULL, + &brw->vs.surf_bo[surf])) + return PIPE_OK; + + ret = brw_create_constant_surface(brw, &key + &brw->vs.surf_bo[surf]); + if (ret) + return ret; + + return PIPE_OK; } #endif @@ -134,18 +140,20 @@ brw_update_vs_constant_surface( struct brw_context *brw, /** * Constructs the binding table for the VS surface state. */ -static struct brw_winsys_buffer * -brw_vs_get_binding_table(struct brw_context *brw) +static enum pipe_error +brw_vs_get_binding_table(struct brw_context *brw, + struct brw_winsys_buffer **bo_out) { #if 0 - struct brw_winsys_buffer *bind_bo; - - bind_bo = brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND, - NULL, 0, - brw->vs.surf_bo, BRW_VS_MAX_SURF, - NULL); - - if (bind_bo == NULL) { + if (brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND, + NULL, 0, + brw->vs.surf_bo, BRW_VS_MAX_SURF, + NULL, + bo_out)) + { + return PIPE_OK; + } + else { GLuint data_size = BRW_VS_MAX_SURF * sizeof(GLuint); uint32_t *data = malloc(data_size); int i; @@ -156,11 +164,14 @@ brw_vs_get_binding_table(struct brw_context *brw) else data[i] = 0; - bind_bo = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND, - NULL, 0, - brw->vs.surf_bo, BRW_VS_MAX_SURF, - data, data_size, - NULL, NULL); + ret = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND, + NULL, 0, + brw->vs.surf_bo, BRW_VS_MAX_SURF, + data, data_size, + NULL, NULL, + bo_out); + if (ret) + return ret; /* Emit binding table relocations to surface state */ for (i = 0; i < BRW_VS_MAX_SURF; i++) { @@ -168,18 +179,19 @@ brw_vs_get_binding_table(struct brw_context *brw) /* The presumed offsets were set in the data values for * brw_upload_cache. */ - drm_intel_bo_emit_reloc(bind_bo, i * 4, - brw->vs.surf_bo[i], 0, - BRW_USAGE_STATE); + ret = sws->bo_emit_reloc(*bo_out, i * 4, + brw->vs.surf_bo[i], 0, + BRW_USAGE_STATE); + if (ret) + return ret; } } - free(data); + FREE(data); + return PIPE_OK; } - - return bind_bo; #else - return NULL; + return PIPE_OK; #endif } @@ -190,8 +202,10 @@ brw_vs_get_binding_table(struct brw_context *brw) * to be updated, and produces BRW_NEW_NR_VS_SURFACES for the VS unit and * CACHE_NEW_SURF_BIND for the binding table upload. */ -static int prepare_vs_surfaces(struct brw_context *brw ) +static enum pipe_error prepare_vs_surfaces(struct brw_context *brw ) { + enum pipe_error ret; + #if 0 int i; int nr_surfaces = 0; @@ -215,11 +229,12 @@ static int prepare_vs_surfaces(struct brw_context *brw ) * just slightly increases our working set size. */ if (brw->vs.nr_surfaces != 0) { - brw->sws->bo_unreference(brw->vs.bind_bo); - brw->vs.bind_bo = brw_vs_get_binding_table(brw); + ret = brw_vs_get_binding_table(brw, &brw->vs.bind_bo); + if (ret) + return ret; } - return 0; + return PIPE_OK; } const struct brw_tracked_state brw_vs_surfaces = { diff --git a/src/gallium/drivers/i965/brw_winsys.h b/src/gallium/drivers/i965/brw_winsys.h index d941fbcebe..f61c541ad1 100644 --- a/src/gallium/drivers/i965/brw_winsys.h +++ b/src/gallium/drivers/i965/brw_winsys.h @@ -28,6 +28,7 @@ #include "pipe/p_compiler.h" #include "pipe/p_error.h" +#include "pipe/p_refcnt.h" struct brw_winsys; struct pipe_fence_handle; @@ -36,10 +37,13 @@ struct pipe_fence_handle; */ #define BRW_BATCH_SIZE (32*1024) +struct brw_winsys_screen; /* Need a tiny bit of information inside the abstract buffer struct: */ struct brw_winsys_buffer { + struct pipe_reference reference; + struct brw_winsys_screen *sws; unsigned *offset; unsigned size; }; @@ -105,6 +109,10 @@ enum brw_buffer_data_type { BRW_DATA_MAX }; + + + + struct brw_winsys_screen { @@ -116,33 +124,33 @@ struct brw_winsys_screen { /** * Create a buffer. */ - struct brw_winsys_buffer *(*bo_alloc)( struct brw_winsys_screen *sws, - enum brw_buffer_type type, - unsigned size, - unsigned alignment ); + enum pipe_error (*bo_alloc)( struct brw_winsys_screen *sws, + enum brw_buffer_type type, + unsigned size, + unsigned alignment, + struct brw_winsys_buffer **bo_out ); - /* Reference and unreference buffers: + /* Destroy a buffer when our refcount goes to zero: */ - void (*bo_reference)( struct brw_winsys_buffer *buffer ); - void (*bo_unreference)( struct brw_winsys_buffer *buffer ); + void (*bo_destroy)( struct brw_winsys_buffer *buffer ); /* delta -- added to b2->offset, and written into buffer * offset -- location above value is written to within buffer */ - int (*bo_emit_reloc)( struct brw_winsys_buffer *buffer, - enum brw_buffer_usage usage, - unsigned delta, - unsigned offset, - struct brw_winsys_buffer *b2); + enum pipe_error (*bo_emit_reloc)( struct brw_winsys_buffer *buffer, + enum brw_buffer_usage usage, + unsigned delta, + unsigned offset, + struct brw_winsys_buffer *b2); - int (*bo_exec)( struct brw_winsys_buffer *buffer, - unsigned bytes_used ); + enum pipe_error (*bo_exec)( struct brw_winsys_buffer *buffer, + unsigned bytes_used ); - int (*bo_subdata)(struct brw_winsys_buffer *buffer, - enum brw_buffer_data_type data_type, - size_t offset, - size_t size, - const void *data); + enum pipe_error (*bo_subdata)(struct brw_winsys_buffer *buffer, + enum brw_buffer_data_type data_type, + size_t offset, + size_t size, + const void *data); boolean (*bo_is_busy)(struct brw_winsys_buffer *buffer); boolean (*bo_references)(struct brw_winsys_buffer *a, @@ -175,6 +183,16 @@ struct brw_winsys_screen { }; +static INLINE void +bo_reference(struct brw_winsys_buffer **ptr, struct brw_winsys_buffer *buf) +{ + struct brw_winsys_buffer *old_buf = *ptr; + + if (pipe_reference((struct pipe_reference **)ptr, &buf->reference)) + old_buf->sws->bo_destroy(old_buf); +} + + /** * Create brw pipe_screen. */ diff --git a/src/gallium/drivers/i965/brw_wm.c b/src/gallium/drivers/i965/brw_wm.c index 815ae8c51a..93f90bf329 100644 --- a/src/gallium/drivers/i965/brw_wm.c +++ b/src/gallium/drivers/i965/brw_wm.c @@ -137,30 +137,26 @@ brw_wm_linear_shader_emit(struct brw_context *brw, struct brw_wm_compile *c) * Depending on the instructions used (i.e. flow control instructions) * we'll use one of two code generators. */ -static int do_wm_prog( struct brw_context *brw, - struct brw_fragment_shader *fp, - struct brw_wm_prog_key *key) +static enum pipe_error do_wm_prog( struct brw_context *brw, + struct brw_fragment_shader *fp, + struct brw_wm_prog_key *key, + struct brw_winsys_buffer **bo_out) { + enum pipe_error ret; struct brw_wm_compile *c; const GLuint *program; GLuint program_size; - c = brw->wm.compile_data; - if (c == NULL) { - brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data)); - c = brw->wm.compile_data; - if (c == NULL) { - /* Ouch - big out of memory problem. Can't continue - * without triggering a segfault, no way to signal, - * so just return. - */ + if (brw->wm.compile_data == NULL) { + brw->wm.compile_data = MALLOC(sizeof(*brw->wm.compile_data)); + if (!brw->wm.compile_data) return PIPE_ERROR_OUT_OF_MEMORY; - } - } else { - memset(c, 0, sizeof(*brw->wm.compile_data)); } - memcpy(&c->key, key, sizeof(*key)); + c = brw->wm.compile_data; + memset(c, 0, sizeof *c); + + c->key = *key; c->fp = fp; c->env_param = NULL; /*brw->intel.ctx.FragmentProgram.Parameters;*/ @@ -190,17 +186,21 @@ static int do_wm_prog( struct brw_context *brw, /* get the program */ - program = brw_get_program(&c->func, &program_size); - - brw->sws->bo_unreference(brw->wm.prog_bo); - brw->wm.prog_bo = brw_upload_cache( &brw->cache, BRW_WM_PROG, - &c->key, sizeof(c->key), - NULL, 0, - program, program_size, - &c->prog_data, - &brw->wm.prog_data ); - - return 0; + ret = brw_get_program(&c->func, &program, &program_size); + if (ret) + return ret; + + ret = brw_upload_cache( &brw->cache, BRW_WM_PROG, + &c->key, sizeof(c->key), + NULL, 0, + program, program_size, + &c->prog_data, + &brw->wm.prog_data, + bo_out ); + if (ret) + return ret; + + return PIPE_OK; } @@ -267,24 +267,28 @@ static void brw_wm_populate_key( struct brw_context *brw, } -static int brw_prepare_wm_prog(struct brw_context *brw) +static enum pipe_error brw_prepare_wm_prog(struct brw_context *brw) { struct brw_wm_prog_key key; struct brw_fragment_shader *fs = brw->curr.fragment_shader; + enum pipe_error ret; brw_wm_populate_key(brw, &key); /* Make an early check for the key. */ - brw->sws->bo_unreference(brw->wm.prog_bo); - brw->wm.prog_bo = brw_search_cache(&brw->cache, BRW_WM_PROG, - &key, sizeof(key), - NULL, 0, - &brw->wm.prog_data); - if (brw->wm.prog_bo == NULL) - return do_wm_prog(brw, fs, &key); - - return 0; + if (brw_search_cache(&brw->cache, BRW_WM_PROG, + &key, sizeof(key), + NULL, 0, + &brw->wm.prog_data, + &brw->wm.prog_bo)) + return PIPE_OK; + + ret = do_wm_prog(brw, fs, &key, &brw->wm.prog_bo); + if (ret) + return ret; + + return PIPE_OK; } diff --git a/src/gallium/drivers/i965/brw_wm_constant_buffer.c b/src/gallium/drivers/i965/brw_wm_constant_buffer.c index 50ecef29a4..14568265dd 100644 --- a/src/gallium/drivers/i965/brw_wm_constant_buffer.c +++ b/src/gallium/drivers/i965/brw_wm_constant_buffer.c @@ -6,12 +6,14 @@ * Create the constant buffer surface. Vertex/fragment shader constants will be * read from this buffer with Data Port Read instructions/messages. */ -struct brw_winsys_buffer * +enum pipe_error brw_create_constant_surface( struct brw_context *brw, - struct brw_surface_key *key ) + struct brw_surface_key *key, + struct brw_winsys_buffer **bo_out ) { const GLint w = key->width - 1; struct brw_winsys_buffer *bo; + enum pipe_error ret; memset(&surf, 0, sizeof(surf)); @@ -28,22 +30,27 @@ brw_create_constant_surface( struct brw_context *brw, surf.ss3.pitch = (key->pitch * key->cpp) - 1; /* ignored?? */ brw_set_surface_tiling(&surf, key->tiling); /* tiling now allowed */ - bo = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE, - key, sizeof(*key), - &key->bo, key->bo ? 1 : 0, - &surf, sizeof(surf), - NULL, NULL); + ret = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE, + key, sizeof(*key), + &key->bo, key->bo ? 1 : 0, + &surf, sizeof(surf), + NULL, NULL, + &bo_out); + if (ret) + return ret; if (key->bo) { /* Emit relocation to surface contents */ - brw->sws->bo_emit_reloc(bo, - BRW_USAGE_SAMPLER, - 0, - offsetof(struct brw_surface_state, ss1), - key->bo); + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_SAMPLER, + 0, + offsetof(struct brw_surface_state, ss1), + key->bo); + if (ret) + return ret; } - return bo; + return PIPE_OK; } @@ -52,7 +59,7 @@ brw_create_constant_surface( struct brw_context *brw, * Update the surface state for a WM constant buffer. * The constant buffer will be (re)allocated here if needed. */ -static void +static enum pipe_error brw_update_wm_constant_surface( struct brw_context *brw, GLuint surf) { @@ -60,20 +67,21 @@ brw_update_wm_constant_surface( struct brw_context *brw, struct brw_fragment_shader *fp = brw->curr.fragment_shader; struct pipe_buffer *cbuf = brw->curr.fragment_constants; int pitch = cbuf->size / (4 * sizeof(float)); + enum pipe_error ret; /* If we're in this state update atom, we need to update WM constants, so * free the old buffer and create a new one for the new contents. */ - brw->sws->bo_unreference(fp->const_buffer); - fp->const_buffer = brw_wm_update_constant_buffer(brw); + ret = brw_wm_update_constant_buffer(brw, &fp->const_buffer); + if (ret) + return ret; /* If there's no constant buffer, then no surface BO is needed to point at * it. */ if (cbuf == NULL) { - drm_intel_bo_unreference(brw->wm.surf_bo[surf]); - brw->wm.surf_bo[surf] = NULL; - return; + bo_reference(&brw->wm.surf_bo[surf], NULL); + return PIPE_OK; } memset(&key, 0, sizeof(key)); @@ -97,16 +105,20 @@ brw_update_wm_constant_surface( struct brw_context *brw, key.width, key.height, key.depth, key.cpp, key.pitch); */ - brw->sws->bo_unreference(brw->wm.surf_bo[surf]); - brw->wm.surf_bo[surf] = brw_search_cache(&brw->surface_cache, - BRW_SS_SURFACE, - &key, sizeof(key), - &key.bo, 1, - NULL); - if (brw->wm.surf_bo[surf] == NULL) { - brw->wm.surf_bo[surf] = brw_create_constant_surface(brw, &key); - } + if (brw_search_cache(&brw->surface_cache, + BRW_SS_SURFACE, + &key, sizeof(key), + &key.bo, 1, + NULL, + &brw->wm.surf_bo[surf])) + return PIPE_OK; + + ret = brw_create_constant_surface(brw, &key, &brw->wm.surf_bo[surf]); + if (ret) + return ret; + brw->state.dirty.brw |= BRW_NEW_WM_SURFACES; + return PIPE_OK; } /** @@ -117,28 +129,33 @@ brw_update_wm_constant_surface( struct brw_context *brw, * BRW_NEW_WM_SURFACES to get picked up by brw_prepare_wm_surfaces for * inclusion in the binding table. */ -static void prepare_wm_constant_surface(struct brw_context *brw ) +static enum pipe_error prepare_wm_constant_surface(struct brw_context *brw ) { struct brw_fragment_program *fp = (struct brw_fragment_program *) brw->fragment_program; GLuint surf = SURF_INDEX_FRAG_CONST_BUFFER; - drm_intel_bo_unreference(fp->const_buffer); - fp->const_buffer = brw_wm_update_constant_buffer(brw); + ret = brw_wm_update_constant_buffer(brw, + &fp->const_buffer); + if (ret) + return ret; /* If there's no constant buffer, then no surface BO is needed to point at * it. */ if (fp->const_buffer == 0) { if (brw->wm.surf_bo[surf] != NULL) { - drm_intel_bo_unreference(brw->wm.surf_bo[surf]); - brw->wm.surf_bo[surf] = NULL; + bo_reference(&brw->wm.surf_bo[surf], NULL); brw->state.dirty.brw |= BRW_NEW_WM_SURFACES; } - return; + return PIPE_OK; } - brw_update_wm_constant_surface(ctx, surf); + ret = brw_update_wm_constant_surface(ctx, surf); + if (ret) + return ret; + + return PIPE_OK } const struct brw_tracked_state brw_wm_constant_surface = { diff --git a/src/gallium/drivers/i965/brw_wm_sampler_state.c b/src/gallium/drivers/i965/brw_wm_sampler_state.c index 2fddb4ad89..2861aa979f 100644 --- a/src/gallium/drivers/i965/brw_wm_sampler_state.c +++ b/src/gallium/drivers/i965/brw_wm_sampler_state.c @@ -43,16 +43,22 @@ -static struct brw_winsys_buffer * +static enum pipe_error upload_default_color( struct brw_context *brw, - const GLfloat *color ) + const GLfloat *color, + struct brw_winsys_buffer **bo_out ) { struct brw_sampler_default_color sdc; + enum pipe_error ret; COPY_4V(sdc.color, color); - return brw_cache_data( &brw->cache, BRW_SAMPLER_DEFAULT_COLOR, &sdc, - NULL, 0 ); + ret = brw_cache_data( &brw->cache, BRW_SAMPLER_DEFAULT_COLOR, &sdc, + NULL, 0, bo_out ); + if (ret) + return ret; + + return PIPE_OK; } @@ -111,9 +117,10 @@ brw_wm_sampler_populate_key(struct brw_context *brw, } -static void +static enum pipe_error brw_wm_sampler_update_default_colors(struct brw_context *brw) { + enum pipe_error ret; int nr = MIN2(brw->curr.num_textures, brw->curr.num_samplers); int i; @@ -121,8 +128,7 @@ brw_wm_sampler_update_default_colors(struct brw_context *brw) for (i = 0; i < nr; i++) { const struct brw_texture *tex = brw_texture(brw->curr.texture[i]); const struct brw_sampler *sampler = brw->curr.sampler[i]; - - brw->sws->bo_unreference(brw->wm.sdc_bo[i]); + const float *bc; if (pf_is_depth_or_stencil(tex->base.format)) { float bordercolor[4] = { @@ -131,15 +137,25 @@ brw_wm_sampler_update_default_colors(struct brw_context *brw) sampler->border_color[0], sampler->border_color[0] }; - /* GL specs that border color for depth textures is taken from the - * R channel, while the hardware uses A. Spam R into all the - * channels for safety. - */ - brw->wm.sdc_bo[i] = upload_default_color(brw, bordercolor); - } else { - brw->wm.sdc_bo[i] = upload_default_color(brw, sampler->border_color); + + bc = bordercolor; + } + else { + bc = sampler->border_color; } + + /* GL specs that border color for depth textures is taken from the + * R channel, while the hardware uses A. Spam R into all the + * channels for safety. + */ + ret = upload_default_color(brw, + bc, + &brw->wm.sdc_bo[i]); + if (ret) + return ret; } + + return PIPE_OK; } @@ -149,6 +165,7 @@ brw_wm_sampler_update_default_colors(struct brw_context *brw) static int upload_wm_samplers( struct brw_context *brw ) { struct wm_sampler_key key; + enum pipe_error ret; int i; brw_wm_sampler_update_default_colors(brw); @@ -159,35 +176,40 @@ static int upload_wm_samplers( struct brw_context *brw ) brw->state.dirty.cache |= CACHE_NEW_SAMPLER; } - brw->sws->bo_unreference(brw->wm.sampler_bo); - brw->wm.sampler_bo = NULL; - if (brw->wm.sampler_count == 0) - return 0; + if (brw->wm.sampler_count == 0) { + bo_reference(&brw->wm.sampler_bo, NULL); + return PIPE_OK; + } - brw->wm.sampler_bo = brw_search_cache(&brw->cache, BRW_SAMPLER, - &key, sizeof(key), - brw->wm.sdc_bo, key.sampler_count, - NULL); + if (brw_search_cache(&brw->cache, BRW_SAMPLER, + &key, sizeof(key), + brw->wm.sdc_bo, key.sampler_count, + NULL, + &brw->wm.sampler_bo)) + return PIPE_OK; /* If we didnt find it in the cache, compute the state and put it in the * cache. */ - if (brw->wm.sampler_bo == NULL) { - brw->wm.sampler_bo = brw_upload_cache(&brw->cache, BRW_SAMPLER, - &key, sizeof(key), - brw->wm.sdc_bo, key.sampler_count, - &key.sampler, sizeof(key.sampler), - NULL, NULL); - - /* Emit SDC relocations */ - for (i = 0; i < key.sampler_count; i++) { - brw->sws->bo_emit_reloc(brw->wm.sampler_bo, - BRW_USAGE_SAMPLER, - 0, - i * sizeof(struct brw_sampler_state) + - offsetof(struct brw_sampler_state, ss2), - brw->wm.sdc_bo[i]); - } + ret = brw_upload_cache(&brw->cache, BRW_SAMPLER, + &key, sizeof(key), + brw->wm.sdc_bo, key.sampler_count, + &key.sampler, sizeof(key.sampler), + NULL, NULL, + &brw->wm.sampler_bo); + if (ret) + return ret; + + /* Emit SDC relocations */ + for (i = 0; i < key.sampler_count; i++) { + ret = brw->sws->bo_emit_reloc(brw->wm.sampler_bo, + BRW_USAGE_SAMPLER, + 0, + i * sizeof(struct brw_sampler_state) + + offsetof(struct brw_sampler_state, ss2), + brw->wm.sdc_bo[i]); + if (ret) + return ret; } return 0; diff --git a/src/gallium/drivers/i965/brw_wm_state.c b/src/gallium/drivers/i965/brw_wm_state.c index ccbb647bcd..86dc10540d 100644 --- a/src/gallium/drivers/i965/brw_wm_state.c +++ b/src/gallium/drivers/i965/brw_wm_state.c @@ -138,12 +138,13 @@ wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key) /** * Setup wm hardware state. See page 225 of Volume 2 */ -static struct brw_winsys_buffer * +static enum pipe_error wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, - struct brw_winsys_buffer **reloc_bufs) + struct brw_winsys_buffer **reloc_bufs, + struct brw_winsys_buffer **bo_out) { struct brw_wm_unit_state wm; - struct brw_winsys_buffer *bo; + enum pipe_error ret; memset(&wm, 0, sizeof(wm)); @@ -222,45 +223,56 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, if (BRW_DEBUG & DEBUG_STATS || key->stats_wm) wm.wm4.stats_enable = 1; - bo = brw_upload_cache(&brw->cache, BRW_WM_UNIT, - key, sizeof(*key), - reloc_bufs, 3, - &wm, sizeof(wm), - NULL, NULL); + ret = brw_upload_cache(&brw->cache, BRW_WM_UNIT, + key, sizeof(*key), + reloc_bufs, 3, + &wm, sizeof(wm), + NULL, NULL, + bo_out); + if (ret) + return ret; /* Emit WM program relocation */ - brw->sws->bo_emit_reloc(bo, - BRW_USAGE_STATE, - wm.thread0.grf_reg_count << 1, - offsetof(struct brw_wm_unit_state, thread0), - brw->wm.prog_bo); + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_STATE, + wm.thread0.grf_reg_count << 1, + offsetof(struct brw_wm_unit_state, thread0), + brw->wm.prog_bo); + if (ret) + return ret; /* Emit scratch space relocation */ if (key->total_scratch != 0) { - brw->sws->bo_emit_reloc(bo, - BRW_USAGE_SCRATCH, - wm.thread2.per_thread_scratch_space, - offsetof(struct brw_wm_unit_state, thread2), - brw->wm.scratch_bo); + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_SCRATCH, + wm.thread2.per_thread_scratch_space, + offsetof(struct brw_wm_unit_state, thread2), + brw->wm.scratch_bo); + if (ret) + return ret; } /* Emit sampler state relocation */ if (key->sampler_count != 0) { - brw->sws->bo_emit_reloc(bo, - BRW_USAGE_STATE, - wm.wm4.stats_enable | (wm.wm4.sampler_count << 2), - offsetof(struct brw_wm_unit_state, wm4), - brw->wm.sampler_bo); + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_STATE, + wm.wm4.stats_enable | (wm.wm4.sampler_count << 2), + offsetof(struct brw_wm_unit_state, wm4), + brw->wm.sampler_bo); + if (ret) + return ret; } - return bo; + return PIPE_OK; } -static int upload_wm_unit( struct brw_context *brw ) +static enum pipe_error upload_wm_unit( struct brw_context *brw ) { struct brw_wm_unit_key key; struct brw_winsys_buffer *reloc_bufs[3]; + enum pipe_error ret; + wm_unit_populate_key(brw, &key); /* Allocate the necessary scratch space if we haven't already. Don't @@ -271,15 +283,19 @@ static int upload_wm_unit( struct brw_context *brw ) if (key.total_scratch) { GLuint total = key.total_scratch * key.max_threads; - if (brw->wm.scratch_bo && total > brw->wm.scratch_bo->size) { - brw->sws->bo_unreference(brw->wm.scratch_bo); - brw->wm.scratch_bo = NULL; - } + /* Do we need a new buffer: + */ + if (brw->wm.scratch_bo && total > brw->wm.scratch_bo->size) + bo_reference(&brw->wm.scratch_bo, NULL); + if (brw->wm.scratch_bo == NULL) { - brw->wm.scratch_bo = brw->sws->bo_alloc(brw->sws, - BRW_BUFFER_TYPE_SHADER_SCRATCH, - total, - 4096); + ret = brw->sws->bo_alloc(brw->sws, + BRW_BUFFER_TYPE_SHADER_SCRATCH, + total, + 4096, + &brw->wm.scratch_bo); + if (ret) + return ret; } } @@ -287,16 +303,19 @@ static int upload_wm_unit( struct brw_context *brw ) reloc_bufs[1] = brw->wm.scratch_bo; reloc_bufs[2] = brw->wm.sampler_bo; - brw->sws->bo_unreference(brw->wm.state_bo); - brw->wm.state_bo = brw_search_cache(&brw->cache, BRW_WM_UNIT, - &key, sizeof(key), - reloc_bufs, 3, - NULL); - if (brw->wm.state_bo == NULL) { - brw->wm.state_bo = wm_unit_create_from_key(brw, &key, reloc_bufs); - } + if (brw_search_cache(&brw->cache, BRW_WM_UNIT, + &key, sizeof(key), + reloc_bufs, 3, + NULL, + &brw->wm.state_bo)) + return PIPE_OK; + + ret = wm_unit_create_from_key(brw, &key, reloc_bufs, + &brw->wm.state_bo); + if (ret) + return ret; - return 0; + return PIPE_OK; } const struct brw_tracked_state brw_wm_unit = { diff --git a/src/gallium/drivers/i965/brw_wm_surface_state.c b/src/gallium/drivers/i965/brw_wm_surface_state.c index b055dde20c..e5d0329967 100644 --- a/src/gallium/drivers/i965/brw_wm_surface_state.c +++ b/src/gallium/drivers/i965/brw_wm_surface_state.c @@ -40,31 +40,40 @@ -static void +static enum pipe_error brw_update_texture_surface( struct brw_context *brw, struct brw_texture *tex, - GLuint surf ) + struct brw_winsys_buffer **bo_out) { - brw->wm.surf_bo[surf] = brw_search_cache(&brw->surface_cache, - BRW_SS_SURFACE, - &tex->ss, sizeof tex->ss, - &tex->bo, 1, - NULL); - - if (brw->wm.surf_bo[surf] == NULL) { - brw->wm.surf_bo[surf] = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE, - &tex->ss, sizeof tex->ss, - &tex->bo, 1, - &tex->ss, sizeof tex->ss, - NULL, NULL); + enum pipe_error ret; + + if (brw_search_cache(&brw->surface_cache, + BRW_SS_SURFACE, + &tex->ss, sizeof tex->ss, + &tex->bo, 1, + NULL, + bo_out)) + return PIPE_OK; + + ret = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE, + &tex->ss, sizeof tex->ss, + &tex->bo, 1, + &tex->ss, sizeof tex->ss, + NULL, NULL, + bo_out); + if (ret) + return ret; - /* Emit relocation to surface contents */ - brw->sws->bo_emit_reloc(brw->wm.surf_bo[surf], - BRW_USAGE_SAMPLER, - 0, - offsetof(struct brw_surface_state, ss1), - tex->bo); - } + /* Emit relocation to surface contents */ + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_SAMPLER, + 0, + offsetof(struct brw_surface_state, ss1), + tex->bo); + if (ret) + return ret; + + return PIPE_OK; } @@ -79,13 +88,14 @@ brw_update_texture_surface( struct brw_context *brw, * While it is only used for the front/back buffer currently, it should be * usable for further buffers when doing ARB_draw_buffer support. */ -static void -brw_update_renderbuffer_surface(struct brw_context *brw, - struct brw_surface *surface, - unsigned int unit) +static enum pipe_error +brw_update_render_surface(struct brw_context *brw, + struct brw_surface *surface, + struct brw_winsys_buffer **bo_out) { struct brw_surf_ss0 blend_ss0 = brw->curr.blend->ss0; struct brw_surface_state ss; + enum pipe_error ret; /* Surfaces are potentially shared between contexts, so can't * scribble the in-place ss0 value in the surface. @@ -98,30 +108,35 @@ brw_update_renderbuffer_surface(struct brw_context *brw, ss.ss0.writedisable_red = blend_ss0.writedisable_red; ss.ss0.writedisable_alpha = blend_ss0.writedisable_alpha; - brw->sws->bo_unreference(brw->wm.surf_bo[unit]); - brw->wm.surf_bo[unit] = brw_search_cache(&brw->surface_cache, - BRW_SS_SURFACE, - &ss, sizeof(ss), - &surface->bo, 1, - NULL); - - if (brw->wm.surf_bo[unit] == NULL) { - - brw->wm.surf_bo[unit] = brw_upload_cache(&brw->surface_cache, - BRW_SS_SURFACE, - &ss, sizeof ss, - &surface->bo, 1, - &ss, sizeof ss, - NULL, NULL); + if (brw_search_cache(&brw->surface_cache, + BRW_SS_SURFACE, + &ss, sizeof(ss), + &surface->bo, 1, + NULL, + bo_out)) + return PIPE_OK; + + ret = brw_upload_cache(&brw->surface_cache, + BRW_SS_SURFACE, + &ss, sizeof ss, + &surface->bo, 1, + &ss, sizeof ss, + NULL, NULL, + bo_out); + if (ret) + return ret; /* XXX: we will only be rendering to this surface: */ - brw->sws->bo_emit_reloc(brw->wm.surf_bo[unit], - BRW_USAGE_RENDER_TARGET, - ss.ss1.base_addr - surface->bo->offset[0], /* XXX */ - offsetof(struct brw_surface_state, ss1), - surface->bo); - } + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_RENDER_TARGET, + ss.ss1.base_addr - surface->bo->offset[0], /* XXX */ + offsetof(struct brw_surface_state, ss1), + surface->bo); + if (ret) + return ret; + + return PIPE_OK; } @@ -129,60 +144,60 @@ brw_update_renderbuffer_surface(struct brw_context *brw, * Constructs the binding table for the WM surface state, which maps unit * numbers to surface state objects. */ -static struct brw_winsys_buffer * -brw_wm_get_binding_table(struct brw_context *brw) +static enum pipe_error +brw_wm_get_binding_table(struct brw_context *brw, + struct brw_winsys_buffer **bo_out ) { - struct brw_winsys_buffer *bind_bo; + enum pipe_error ret; + uint32_t data[BRW_WM_MAX_SURF]; + GLuint data_size = brw->wm.nr_surfaces * sizeof data[0]; + int i; assert(brw->wm.nr_surfaces <= BRW_WM_MAX_SURF); + assert(brw->wm.nr_surfaces > 0); /* Note there is no key for this search beyond the values in the * relocation array: */ - bind_bo = brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND, - NULL, 0, - brw->wm.surf_bo, brw->wm.nr_surfaces, - NULL); - - if (bind_bo == NULL) { - uint32_t data[BRW_WM_MAX_SURF]; - GLuint data_size = brw->wm.nr_surfaces * sizeof data[0]; - int i; - - for (i = 0; i < brw->wm.nr_surfaces; i++) - data[i] = brw->wm.surf_bo[i]->offset[0]; - - bind_bo = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND, - NULL, 0, - brw->wm.surf_bo, brw->wm.nr_surfaces, - data, data_size, - NULL, NULL); - - /* Emit binding table relocations to surface state */ - for (i = 0; i < brw->wm.nr_surfaces; i++) { - brw->sws->bo_emit_reloc(bind_bo, - BRW_USAGE_STATE, - 0, - i * sizeof(GLuint), - brw->wm.surf_bo[i]); - } + if (brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND, + NULL, 0, + brw->wm.surf_bo, + brw->wm.nr_surfaces, + NULL, + bo_out)) + return PIPE_OK; + + for (i = 0; i < brw->wm.nr_surfaces; i++) + data[i] = brw->wm.surf_bo[i]->offset[0]; + + ret = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND, + NULL, 0, + brw->wm.surf_bo, brw->wm.nr_surfaces, + data, data_size, + NULL, NULL, + bo_out); + if (ret) + return ret; + + /* Emit binding table relocations to surface state */ + for (i = 0; i < brw->wm.nr_surfaces; i++) { + ret = brw->sws->bo_emit_reloc(*bo_out, + BRW_USAGE_STATE, + 0, + i * sizeof(GLuint), + brw->wm.surf_bo[i]); + if (ret) + return ret; } - return bind_bo; + return PIPE_OK; } -static int prepare_wm_surfaces(struct brw_context *brw ) +static enum pipe_error prepare_wm_surfaces(struct brw_context *brw ) { - GLuint i; + enum pipe_error ret; int nr_surfaces = 0; - - /* Unreference old buffers - */ - for (i = 0; i < brw->wm.nr_surfaces; i++) { - brw->sws->bo_unreference(brw->wm.surf_bo[i]); - brw->wm.surf_bo[i] = NULL; - } - + GLuint i; /* PIPE_NEW_COLOR_BUFFERS | PIPE_NEW_BLEND * @@ -192,38 +207,51 @@ static int prepare_wm_surfaces(struct brw_context *brw ) * XXX: no color buffer case */ for (i = 0; i < brw->curr.fb.nr_cbufs; i++) { - brw_update_renderbuffer_surface(brw, - brw_surface(brw->curr.fb.cbufs[i]), - nr_surfaces++); + ret = brw_update_render_surface(brw, + brw_surface(brw->curr.fb.cbufs[i]), + &brw->wm.surf_bo[nr_surfaces++]); + if (ret) + return ret; } /* PIPE_NEW_TEXTURE */ for (i = 0; i < brw->curr.num_textures; i++) { - brw_update_texture_surface(brw, - brw_texture(brw->curr.texture[i]), - nr_surfaces++); + ret = brw_update_texture_surface(brw, + brw_texture(brw->curr.texture[i]), + &brw->wm.surf_bo[nr_surfaces++]); + if (ret) + return ret; } /* PIPE_NEW_FRAGMENT_CONSTANTS */ #if 0 if (brw->curr.fragment_constants) { - brw_update_fragment_constant_surface(brw, - brw->curr.fragment_constants, - nr_surfaces++); + ret = brw_update_fragment_constant_surface(brw, + brw->curr.fragment_constants, + &brw->wm.surf_bo[nr_surfaces++]); + if (ret) + return ret; } #endif if (brw->wm.nr_surfaces != nr_surfaces) { + + /* Unreference any left-over old buffers + */ + for (i = nr_surfaces; i < brw->wm.nr_surfaces; i++) + bo_reference(&brw->wm.surf_bo[i], NULL); + brw->wm.nr_surfaces = nr_surfaces; brw->state.dirty.brw |= BRW_NEW_NR_WM_SURFACES; } - brw->sws->bo_unreference(brw->wm.bind_bo); - brw->wm.bind_bo = brw_wm_get_binding_table(brw); + ret = brw_wm_get_binding_table(brw, &brw->wm.bind_bo); + if (ret) + return ret; - return 0; + return PIPE_OK; } const struct brw_tracked_state brw_wm_surfaces = { diff --git a/src/gallium/winsys/drm/i965/xlib/xlib_i965.c b/src/gallium/winsys/drm/i965/xlib/xlib_i965.c index b1edca818a..fc465d7c14 100644 --- a/src/gallium/winsys/drm/i965/xlib/xlib_i965.c +++ b/src/gallium/winsys/drm/i965/xlib/xlib_i965.c @@ -134,11 +134,12 @@ const char *data_types[BRW_DATA_MAX] = }; -static struct brw_winsys_buffer * +static enum pipe_error xlib_brw_bo_alloc( struct brw_winsys_screen *sws, - enum brw_buffer_type type, - unsigned size, - unsigned alignment ) + enum brw_buffer_type type, + unsigned size, + unsigned alignment, + struct brw_winsys_buffer **bo_out ) { struct xlib_brw_winsys *xbw = xlib_brw_winsys(sws); struct xlib_brw_buffer *buf; @@ -148,12 +149,13 @@ xlib_brw_bo_alloc( struct brw_winsys_screen *sws, buf = CALLOC_STRUCT(xlib_brw_buffer); if (!buf) - return NULL; + return PIPE_ERROR_OUT_OF_MEMORY; + + pipe_reference_init(&buf->base.reference, 1); buf->offset = align(xbw->offset, alignment); buf->type = type; buf->virtual = MALLOC(size); - buf->cheesy_refcount = 1; buf->base.offset = &buf->offset; /* hmm, cheesy */ buf->base.size = size; @@ -161,36 +163,25 @@ xlib_brw_bo_alloc( struct brw_winsys_screen *sws, if (xbw->offset > MAX_VRAM) goto err; - return &buf->base; + /* XXX: possibly rentrant call to bo_destroy: + */ + bo_reference(bo_out, &buf->base); + return PIPE_OK; err: assert(0); + FREE(buf->virtual); FREE(buf); - return NULL; -} - -static void -xlib_brw_bo_reference( struct brw_winsys_buffer *buffer ) -{ - struct xlib_brw_buffer *buf = xlib_brw_buffer(buffer); - - buf->cheesy_refcount++; + return PIPE_ERROR_OUT_OF_MEMORY; } static void -xlib_brw_bo_unreference( struct brw_winsys_buffer *buffer ) +xlib_brw_bo_destroy( struct brw_winsys_buffer *buffer ) { struct xlib_brw_buffer *buf = xlib_brw_buffer(buffer); - /* As a special favor in this call only, buffer is allowed to be - * NULL: - */ - if (buffer == NULL) - return; - - if (--buf->cheesy_refcount == 0) { - FREE(buffer); - } + FREE(buf->virtual); + FREE(buf); } static int @@ -378,8 +369,7 @@ xlib_create_brw_winsys_screen( void ) ws->base.destroy = xlib_brw_winsys_destroy; ws->base.bo_alloc = xlib_brw_bo_alloc; - ws->base.bo_reference = xlib_brw_bo_reference; - ws->base.bo_unreference = xlib_brw_bo_unreference; + ws->base.bo_destroy = xlib_brw_bo_destroy; ws->base.bo_emit_reloc = xlib_brw_bo_emit_reloc; ws->base.bo_exec = xlib_brw_bo_exec; ws->base.bo_subdata = xlib_brw_bo_subdata; -- cgit v1.2.3 From 963728665aa0d48d4fdbba4276084528f221ee39 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Thu, 5 Nov 2009 20:34:27 +0000 Subject: i965g: make the winsys responsible for all buffer->offset handling The winsys now inserts the presumed offset into referring buffers from inside of bo_emit_reloc(). Remove the many locally coded places where this was happening in the driver and eliminate the worry of getting it wrong. No longer need to expose offset values to the driver at all, so no need to worry about what to do in the driver when they change. Just use zero values wherever we had offsets previously -- the relocations will fix it all up for us. --- src/gallium/drivers/i965/brw_batchbuffer.c | 11 +++++------ src/gallium/drivers/i965/brw_cc.c | 2 +- src/gallium/drivers/i965/brw_clip_state.c | 2 +- src/gallium/drivers/i965/brw_gs_state.c | 4 ++-- src/gallium/drivers/i965/brw_screen_texture.c | 8 +++++--- src/gallium/drivers/i965/brw_sf_state.c | 6 ++++-- src/gallium/drivers/i965/brw_vs_state.c | 2 +- src/gallium/drivers/i965/brw_winsys.h | 1 - src/gallium/drivers/i965/brw_wm_sampler_state.c | 2 +- src/gallium/drivers/i965/brw_wm_state.c | 13 ++++--------- src/gallium/drivers/i965/brw_wm_surface_state.c | 7 +++++-- src/gallium/winsys/drm/i965/xlib/xlib_i965.c | 1 - 12 files changed, 29 insertions(+), 30 deletions(-) (limited to 'src/gallium/drivers/i965/brw_vs_state.c') diff --git a/src/gallium/drivers/i965/brw_batchbuffer.c b/src/gallium/drivers/i965/brw_batchbuffer.c index 76a7d2d2af..a55be6faab 100644 --- a/src/gallium/drivers/i965/brw_batchbuffer.c +++ b/src/gallium/drivers/i965/brw_batchbuffer.c @@ -115,7 +115,7 @@ _brw_batchbuffer_flush(struct brw_batchbuffer *batch, file, line, used); if (ALWAYS_EMIT_MI_FLUSH) { - *(GLuint *) (batch->ptr) = ((MI_FLUSH << 16) | BRW_FLUSH_STATE_CACHE); + *(GLuint *) (batch->ptr) = MI_FLUSH | BRW_FLUSH_STATE_CACHE; batch->ptr += 4; used = batch->ptr - batch->map; } @@ -192,12 +192,11 @@ brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch, if (ret != 0) return ret; - /* - * Using the old buffer offset, write in what the right data would be, in case - * the buffer doesn't move and we can short-circuit the relocation processing - * in the kernel + /* bo_emit_reloc was resposible for writing a zero into the + * batchbuffer if necessary. Just need to update our pointer. */ - brw_batchbuffer_emit_dword (batch, buffer->offset[0] + delta); + batch->ptr += 4; + return 0; } diff --git a/src/gallium/drivers/i965/brw_cc.c b/src/gallium/drivers/i965/brw_cc.c index ba16fc4f6b..78d83929e0 100644 --- a/src/gallium/drivers/i965/brw_cc.c +++ b/src/gallium/drivers/i965/brw_cc.c @@ -142,7 +142,7 @@ cc_unit_create_from_key(struct brw_context *brw, cc.cc3 = key->cc3; /* CACHE_NEW_CC_VP */ - cc.cc4.cc_viewport_state_offset = *(brw->cc.vp_bo->offset) >> 5; /* reloc */ + cc.cc4.cc_viewport_state_offset = 0; cc.cc5 = key->cc5; cc.cc6 = key->cc6; diff --git a/src/gallium/drivers/i965/brw_clip_state.c b/src/gallium/drivers/i965/brw_clip_state.c index d4e3c43c61..157e6edf19 100644 --- a/src/gallium/drivers/i965/brw_clip_state.c +++ b/src/gallium/drivers/i965/brw_clip_state.c @@ -84,7 +84,7 @@ clip_unit_create_from_key(struct brw_context *brw, clip.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; /* reloc */ - clip.thread0.kernel_start_pointer = *(brw->clip.prog_bo->offset) >> 6; + clip.thread0.kernel_start_pointer = 0; clip.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; clip.thread1.single_program_flow = 1; diff --git a/src/gallium/drivers/i965/brw_gs_state.c b/src/gallium/drivers/i965/brw_gs_state.c index 18a66da538..36a99fd0e9 100644 --- a/src/gallium/drivers/i965/brw_gs_state.c +++ b/src/gallium/drivers/i965/brw_gs_state.c @@ -80,8 +80,8 @@ gs_unit_create_from_key(struct brw_context *brw, memset(&gs, 0, sizeof(gs)); gs.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; - if (key->prog_active) /* reloc */ - gs.thread0.kernel_start_pointer = brw->gs.prog_bo->offset[0] >> 6; + /* reloc */ + gs.thread0.kernel_start_pointer = 0; gs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; gs.thread1.single_program_flow = 1; diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c index 355abf0b89..8e684aa076 100644 --- a/src/gallium/drivers/i965/brw_screen_texture.c +++ b/src/gallium/drivers/i965/brw_screen_texture.c @@ -211,8 +211,10 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, /* && bscreen->use_texture_tiling */ /* && bscreen->kernel_exec_fencing */) { - if (bscreen->chipset.is_965 && - pf_is_depth_or_stencil(templ->format)) + if (1) + tex->tiling = BRW_TILING_NONE; + else if (bscreen->chipset.is_965 && + pf_is_depth_or_stencil(templ->format)) tex->tiling = BRW_TILING_Y; else tex->tiling = BRW_TILING_X; @@ -256,7 +258,7 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, /* XXX: what happens when tex->bo->offset changes??? */ - tex->ss.ss1.base_addr = tex->bo->offset[0]; /* reloc */ + tex->ss.ss1.base_addr = 0; /* reloc */ tex->ss.ss2.mip_count = tex->base.last_level; tex->ss.ss2.width = tex->base.width[0] - 1; tex->ss.ss2.height = tex->base.height[0] - 1; diff --git a/src/gallium/drivers/i965/brw_sf_state.c b/src/gallium/drivers/i965/brw_sf_state.c index bd8fc65b9e..689483b4bc 100644 --- a/src/gallium/drivers/i965/brw_sf_state.c +++ b/src/gallium/drivers/i965/brw_sf_state.c @@ -142,7 +142,8 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, memset(&sf, 0, sizeof(sf)); sf.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; - sf.thread0.kernel_start_pointer = brw->sf.prog_bo->offset[0] >> 6; /* reloc */ + /* reloc */ + sf.thread0.kernel_start_pointer = 0; sf.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; @@ -175,7 +176,8 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, sf.thread4.stats_enable = 1; /* CACHE_NEW_SF_VP */ - sf.sf5.sf_viewport_state_offset = brw->sf.vp_bo->offset[0] >> 5; /* reloc */ + /* reloc */ + sf.sf5.sf_viewport_state_offset = 0; sf.sf5.viewport_transform = 1; diff --git a/src/gallium/drivers/i965/brw_vs_state.c b/src/gallium/drivers/i965/brw_vs_state.c index 22a4d7f01b..a5b30eba47 100644 --- a/src/gallium/drivers/i965/brw_vs_state.c +++ b/src/gallium/drivers/i965/brw_vs_state.c @@ -89,7 +89,7 @@ vs_unit_create_from_key(struct brw_context *brw, memset(&vs, 0, sizeof(vs)); - vs.thread0.kernel_start_pointer = brw->vs.prog_bo->offset[0] >> 6; /* reloc */ + vs.thread0.kernel_start_pointer = 0; /* reloc */ vs.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; vs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; /* Choosing multiple program flow means that we may get 2-vertex threads, diff --git a/src/gallium/drivers/i965/brw_winsys.h b/src/gallium/drivers/i965/brw_winsys.h index e041b0acaf..f4a1e9d8ed 100644 --- a/src/gallium/drivers/i965/brw_winsys.h +++ b/src/gallium/drivers/i965/brw_winsys.h @@ -44,7 +44,6 @@ struct brw_winsys_screen; struct brw_winsys_buffer { struct pipe_reference reference; struct brw_winsys_screen *sws; - unsigned *offset; unsigned size; }; diff --git a/src/gallium/drivers/i965/brw_wm_sampler_state.c b/src/gallium/drivers/i965/brw_wm_sampler_state.c index 2861aa979f..174836b39d 100644 --- a/src/gallium/drivers/i965/brw_wm_sampler_state.c +++ b/src/gallium/drivers/i965/brw_wm_sampler_state.c @@ -87,7 +87,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw, entry->ss0 = sampler->ss0; entry->ss1 = sampler->ss1; - entry->ss2.default_color_pointer = brw->wm.sdc_bo[i]->offset[0] >> 5; /* reloc */ + entry->ss2.default_color_pointer = 0; /* reloc */ entry->ss3 = sampler->ss3; /* Cube-maps on 965 and later must use the same wrap mode for all 3 diff --git a/src/gallium/drivers/i965/brw_wm_state.c b/src/gallium/drivers/i965/brw_wm_state.c index 86dc10540d..56789ce7a4 100644 --- a/src/gallium/drivers/i965/brw_wm_state.c +++ b/src/gallium/drivers/i965/brw_wm_state.c @@ -149,7 +149,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, memset(&wm, 0, sizeof(wm)); wm.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; - wm.thread0.kernel_start_pointer = brw->wm.prog_bo->offset[0] >> 6; /* reloc */ + wm.thread0.kernel_start_pointer = 0; /* reloc */ wm.thread1.depth_coef_urb_read_offset = 1; wm.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; @@ -159,8 +159,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, wm.thread1.binding_table_entry_count = key->nr_surfaces; if (key->total_scratch != 0) { - wm.thread2.scratch_space_base_pointer = - brw->wm.scratch_bo->offset[0] >> 10; /* reloc */ + wm.thread2.scratch_space_base_pointer = 0; /* reloc */ wm.thread2.per_thread_scratch_space = key->total_scratch / 1024 - 1; } else { wm.thread2.scratch_space_base_pointer = 0; @@ -178,12 +177,8 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, else wm.wm4.sampler_count = (key->sampler_count + 1) / 4; - if (brw->wm.sampler_bo != NULL) { - /* reloc */ - wm.wm4.sampler_state_pointer = brw->wm.sampler_bo->offset[0] >> 5; - } else { - wm.wm4.sampler_state_pointer = 0; - } + /* reloc */ + wm.wm4.sampler_state_pointer = 0; wm.wm5.program_uses_depth = key->uses_depth; wm.wm5.program_computes_depth = key->computes_depth; diff --git a/src/gallium/drivers/i965/brw_wm_surface_state.c b/src/gallium/drivers/i965/brw_wm_surface_state.c index e5d0329967..ed365b03b9 100644 --- a/src/gallium/drivers/i965/brw_wm_surface_state.c +++ b/src/gallium/drivers/i965/brw_wm_surface_state.c @@ -130,7 +130,7 @@ brw_update_render_surface(struct brw_context *brw, */ ret = brw->sws->bo_emit_reloc(*bo_out, BRW_USAGE_RENDER_TARGET, - ss.ss1.base_addr - surface->bo->offset[0], /* XXX */ + 0, offsetof(struct brw_surface_state, ss1), surface->bo); if (ret) @@ -167,8 +167,11 @@ brw_wm_get_binding_table(struct brw_context *brw, bo_out)) return PIPE_OK; + /* Upload zero data, will all be overwitten with relocation + * offsets: + */ for (i = 0; i < brw->wm.nr_surfaces; i++) - data[i] = brw->wm.surf_bo[i]->offset[0]; + data[i] = 0; ret = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND, NULL, 0, diff --git a/src/gallium/winsys/drm/i965/xlib/xlib_i965.c b/src/gallium/winsys/drm/i965/xlib/xlib_i965.c index 5aec332761..f46d9961c6 100644 --- a/src/gallium/winsys/drm/i965/xlib/xlib_i965.c +++ b/src/gallium/winsys/drm/i965/xlib/xlib_i965.c @@ -168,7 +168,6 @@ xlib_brw_bo_alloc( struct brw_winsys_screen *sws, buf->offset = align(xbw->used, alignment); buf->type = type; buf->virtual = MALLOC(size); - buf->base.offset = &buf->offset; /* hmm, cheesy */ buf->base.size = size; buf->base.sws = sws; -- cgit v1.2.3 From 4c196ed7a8e06933d11b96ac520afa39252fc5c7 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Thu, 5 Nov 2009 22:43:36 +0000 Subject: i965g: pass relocation information in an array with bo_subdata Makes it easier to dump as we get all of the information about the upload in a single hit. Opens the window to simplification in the driver if these relocation arrays can be maintained statically rather than being recreated whenever we check for a new upload. Still needs some cleanup to avoid uglyness introduced with the delta values. --- src/gallium/drivers/i965/brw_cc.c | 27 ++++---- src/gallium/drivers/i965/brw_clip_state.c | 35 ++++++---- src/gallium/drivers/i965/brw_context.h | 4 +- src/gallium/drivers/i965/brw_curbe.c | 3 +- src/gallium/drivers/i965/brw_gs_state.c | 36 ++++++---- src/gallium/drivers/i965/brw_sf_state.c | 73 ++++++++++---------- src/gallium/drivers/i965/brw_state.h | 16 ++--- src/gallium/drivers/i965/brw_state_cache.c | 81 ++++++++++++----------- src/gallium/drivers/i965/brw_vs_state.c | 28 ++++---- src/gallium/drivers/i965/brw_vs_surface_state.c | 69 +++++++------------ src/gallium/drivers/i965/brw_winsys.h | 28 +++++++- src/gallium/drivers/i965/brw_wm_constant_buffer.c | 25 +++---- src/gallium/drivers/i965/brw_wm_sampler_state.c | 27 ++++---- src/gallium/drivers/i965/brw_wm_state.c | 61 ++++++++--------- src/gallium/drivers/i965/brw_wm_surface_state.c | 70 +++++++++----------- src/gallium/winsys/drm/i965/xlib/xlib_i965.c | 31 +++++++-- 16 files changed, 327 insertions(+), 287 deletions(-) (limited to 'src/gallium/drivers/i965/brw_vs_state.c') diff --git a/src/gallium/drivers/i965/brw_cc.c b/src/gallium/drivers/i965/brw_cc.c index 78d83929e0..94e2c99c3e 100644 --- a/src/gallium/drivers/i965/brw_cc.c +++ b/src/gallium/drivers/i965/brw_cc.c @@ -129,6 +129,7 @@ cc_unit_populate_key(const struct brw_context *brw, static enum pipe_error cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key, + struct brw_winsys_reloc *reloc, struct brw_winsys_buffer **bo_out) { struct brw_cc_unit_state cc; @@ -141,50 +142,48 @@ cc_unit_create_from_key(struct brw_context *brw, cc.cc2 = key->cc2; cc.cc3 = key->cc3; - /* CACHE_NEW_CC_VP */ cc.cc4.cc_viewport_state_offset = 0; cc.cc5 = key->cc5; cc.cc6 = key->cc6; cc.cc7 = key->cc7; - + ret = brw_upload_cache(&brw->cache, BRW_CC_UNIT, key, sizeof(*key), - &brw->cc.vp_bo, 1, + reloc, Elements(reloc), &cc, sizeof(cc), NULL, NULL, bo_out); if (ret) return ret; - - /* Emit CC viewport relocation */ - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_STATE, - 0, - offsetof(struct brw_cc_unit_state, cc4), - brw->cc.vp_bo); - if (ret) - return ret; - return PIPE_OK; } static int prepare_cc_unit( struct brw_context *brw ) { struct brw_cc_unit_key key; + struct brw_winsys_reloc reloc[1]; enum pipe_error ret; cc_unit_populate_key(brw, &key); + /* CACHE_NEW_CC_VP */ + make_reloc(&reloc[0], + BRW_USAGE_STATE, + 0, + offsetof(struct brw_cc_unit_state, cc4), + brw->cc.vp_bo); + if (brw_search_cache(&brw->cache, BRW_CC_UNIT, &key, sizeof(key), - &brw->cc.vp_bo, 1, + reloc, 1, NULL, &brw->cc.state_bo)) return PIPE_OK; ret = cc_unit_create_from_key(brw, &key, + reloc, &brw->cc.state_bo); if (ret) return ret; diff --git a/src/gallium/drivers/i965/brw_clip_state.c b/src/gallium/drivers/i965/brw_clip_state.c index 157e6edf19..3f2b9701e6 100644 --- a/src/gallium/drivers/i965/brw_clip_state.c +++ b/src/gallium/drivers/i965/brw_clip_state.c @@ -75,6 +75,7 @@ clip_unit_populate_key(struct brw_context *brw, struct brw_clip_unit_key *key) static enum pipe_error clip_unit_create_from_key(struct brw_context *brw, struct brw_clip_unit_key *key, + struct brw_winsys_reloc *reloc, struct brw_winsys_buffer **bo_out) { struct brw_clip_unit_state clip; @@ -82,7 +83,6 @@ clip_unit_create_from_key(struct brw_context *brw, memset(&clip, 0, sizeof(clip)); - clip.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; /* reloc */ clip.thread0.kernel_start_pointer = 0; @@ -144,36 +144,44 @@ clip_unit_create_from_key(struct brw_context *brw, ret = brw_upload_cache(&brw->cache, BRW_CLIP_UNIT, key, sizeof(*key), - &brw->clip.prog_bo, 1, + reloc, 1, &clip, sizeof(clip), NULL, NULL, bo_out); if (ret) return ret; - /* Emit clip program relocation */ - assert(brw->clip.prog_bo); - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_STATE, - clip.thread0.grf_reg_count << 1, - offsetof(struct brw_clip_unit_state, thread0), - brw->clip.prog_bo); - if (ret) - return ret; - return PIPE_OK; } static int upload_clip_unit( struct brw_context *brw ) { struct brw_clip_unit_key key; + struct brw_winsys_reloc reloc[1]; + unsigned grf_reg_count; enum pipe_error ret; clip_unit_populate_key(brw, &key); + grf_reg_count = align(key.total_grf, 16) / 16 - 1; + + /* clip program relocation + * + * XXX: these reloc structs are long lived and only need to be + * updated when the bound BO changes. Hopefully the stuff mixed in + * in the delta's is non-orthogonal. + */ + assert(brw->clip.prog_bo); + make_reloc(&reloc[0], + BRW_USAGE_STATE, + grf_reg_count << 1, + offsetof(struct brw_clip_unit_state, thread0), + brw->clip.prog_bo); + + if (brw_search_cache(&brw->cache, BRW_CLIP_UNIT, &key, sizeof(key), - &brw->clip.prog_bo, 1, + reloc, 1, NULL, &brw->clip.state_bo)) return PIPE_OK; @@ -181,6 +189,7 @@ static int upload_clip_unit( struct brw_context *brw ) /* Create new: */ ret = clip_unit_create_from_key(brw, &key, + reloc, &brw->clip.state_bo); if (ret) return ret; diff --git a/src/gallium/drivers/i965/brw_context.h b/src/gallium/drivers/i965/brw_context.h index 177fe2172d..67fad0d9a5 100644 --- a/src/gallium/drivers/i965/brw_context.h +++ b/src/gallium/drivers/i965/brw_context.h @@ -383,8 +383,8 @@ struct brw_cache_item { GLuint hash; GLuint key_size; /* for variable-sized keys */ const void *key; - struct brw_winsys_buffer **reloc_bufs; - GLuint nr_reloc_bufs; + struct brw_winsys_reloc *relocs; + GLuint nr_relocs; struct brw_winsys_buffer *bo; GLuint data_size; diff --git a/src/gallium/drivers/i965/brw_curbe.c b/src/gallium/drivers/i965/brw_curbe.c index ca7774a7cc..0a5cfcc7cf 100644 --- a/src/gallium/drivers/i965/brw_curbe.c +++ b/src/gallium/drivers/i965/brw_curbe.c @@ -295,7 +295,8 @@ static enum pipe_error prepare_curbe_buffer(struct brw_context *brw) brw->curbe.curbe_offset, BRW_DATA_OTHER, bufsz, - buf); + buf, + NULL, 0); } brw_add_validated_bo(brw, brw->curbe.curbe_bo); diff --git a/src/gallium/drivers/i965/brw_gs_state.c b/src/gallium/drivers/i965/brw_gs_state.c index 36a99fd0e9..1b0de17aec 100644 --- a/src/gallium/drivers/i965/brw_gs_state.c +++ b/src/gallium/drivers/i965/brw_gs_state.c @@ -72,15 +72,18 @@ gs_unit_populate_key(struct brw_context *brw, struct brw_gs_unit_key *key) static enum pipe_error gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key, + struct brw_winsys_reloc *reloc, + unsigned nr_reloc, struct brw_winsys_buffer **bo_out) { struct brw_gs_unit_state gs; enum pipe_error ret; + memset(&gs, 0, sizeof(gs)); + /* maybe-reloc: populate the background */ gs.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; - /* reloc */ gs.thread0.kernel_start_pointer = 0; gs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; @@ -108,22 +111,13 @@ gs_unit_create_from_key(struct brw_context *brw, ret = brw_upload_cache(&brw->cache, BRW_GS_UNIT, key, sizeof(*key), - &brw->gs.prog_bo, 1, + reloc, nr_reloc, &gs, sizeof(gs), NULL, NULL, bo_out); if (ret) return ret; - if (key->prog_active) { - /* Emit GS program relocation */ - brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_STATE, - gs.thread0.grf_reg_count << 1, - offsetof(struct brw_gs_unit_state, thread0), - brw->gs.prog_bo); - } - return PIPE_OK; } @@ -131,17 +125,33 @@ static enum pipe_error prepare_gs_unit(struct brw_context *brw) { struct brw_gs_unit_key key; enum pipe_error ret; + struct brw_winsys_reloc reloc[1]; + unsigned nr_reloc = 0; + unsigned grf_reg_count; gs_unit_populate_key(brw, &key); + grf_reg_count = (align(key.total_grf, 16) / 16 - 1); + + /* GS program relocation */ + if (key.prog_active) { + make_reloc(&reloc[nr_reloc++], + BRW_USAGE_STATE, + grf_reg_count << 1, + offsetof(struct brw_gs_unit_state, thread0), + brw->gs.prog_bo); + } + if (brw_search_cache(&brw->cache, BRW_GS_UNIT, &key, sizeof(key), - &brw->gs.prog_bo, 1, + reloc, nr_reloc, NULL, &brw->gs.state_bo)) return PIPE_OK; - ret = gs_unit_create_from_key(brw, &key, &brw->gs.state_bo); + ret = gs_unit_create_from_key(brw, &key, + reloc, nr_reloc, + &brw->gs.state_bo); if (ret) return ret; diff --git a/src/gallium/drivers/i965/brw_sf_state.c b/src/gallium/drivers/i965/brw_sf_state.c index 689483b4bc..a911482149 100644 --- a/src/gallium/drivers/i965/brw_sf_state.c +++ b/src/gallium/drivers/i965/brw_sf_state.c @@ -132,8 +132,9 @@ sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key) } static enum pipe_error -sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, - struct brw_winsys_buffer **reloc_bufs, +sf_unit_create_from_key(struct brw_context *brw, + struct brw_sf_unit_key *key, + struct brw_winsys_reloc *reloc, struct brw_winsys_buffer **bo_out) { struct brw_sf_unit_state sf; @@ -141,7 +142,8 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, int chipset_max_threads; memset(&sf, 0, sizeof(sf)); - sf.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; + + sf.thread0.grf_reg_count = 0; /* reloc */ sf.thread0.kernel_start_pointer = 0; @@ -177,18 +179,10 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, /* CACHE_NEW_SF_VP */ /* reloc */ - sf.sf5.sf_viewport_state_offset = 0; - - sf.sf5.viewport_transform = 1; if (key->scissor) sf.sf6.scissor = 1; - if (key->front_face == PIPE_WINDING_CCW) - sf.sf5.front_winding = BRW_FRONTWINDING_CCW; - else - sf.sf5.front_winding = BRW_FRONTWINDING_CW; - switch (key->cull_mode) { case PIPE_WINDING_CCW: case PIPE_WINDING_CW: @@ -281,34 +275,13 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, ret = brw_upload_cache(&brw->cache, BRW_SF_UNIT, key, sizeof(*key), - reloc_bufs, 2, + reloc, 2, &sf, sizeof(sf), NULL, NULL, bo_out); if (ret) return ret; - /* STATE_PREFETCH command description describes this state as being - * something loaded through the GPE (L2 ISC), so it's INSTRUCTION domain. - */ - /* Emit SF program relocation */ - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_STATE, - sf.thread0.grf_reg_count << 1, - offsetof(struct brw_sf_unit_state, thread0), - brw->sf.prog_bo); - if (ret) - return ret; - - - /* Emit SF viewport relocation */ - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_STATE, - sf.sf5.front_winding | (sf.sf5.viewport_transform << 1), - offsetof(struct brw_sf_unit_state, sf5), - brw->sf.vp_bo); - if (ret) - return ret; return PIPE_OK; } @@ -316,23 +289,47 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key, static enum pipe_error upload_sf_unit( struct brw_context *brw ) { struct brw_sf_unit_key key; - struct brw_winsys_buffer *reloc_bufs[2]; + struct brw_winsys_reloc reloc[2]; + unsigned total_grf; + unsigned viewport_transform; + unsigned front_winding; enum pipe_error ret; sf_unit_populate_key(brw, &key); + + /* XXX: cut this crap and pre calculate the key: + */ + total_grf = (align(key.total_grf, 16) / 16 - 1); + viewport_transform = 1; + front_winding = (key.front_face == PIPE_WINDING_CCW ? + BRW_FRONTWINDING_CCW : + BRW_FRONTWINDING_CW); + + /* Emit SF program relocation */ + make_reloc(&reloc[0], + BRW_USAGE_STATE, + total_grf << 1, + offsetof(struct brw_sf_unit_state, thread0), + brw->sf.prog_bo); + + /* Emit SF viewport relocation */ + make_reloc(&reloc[1], + BRW_USAGE_STATE, + front_winding | (viewport_transform << 1), + offsetof(struct brw_sf_unit_state, sf5), + brw->sf.vp_bo); - reloc_bufs[0] = brw->sf.prog_bo; - reloc_bufs[1] = brw->sf.vp_bo; if (brw_search_cache(&brw->cache, BRW_SF_UNIT, &key, sizeof(key), - reloc_bufs, 2, + reloc, 2, NULL, &brw->sf.state_bo)) return PIPE_OK; - ret = sf_unit_create_from_key(brw, &key, reloc_bufs, + ret = sf_unit_create_from_key(brw, &key, + reloc, &brw->sf.state_bo); if (ret) return ret; diff --git a/src/gallium/drivers/i965/brw_state.h b/src/gallium/drivers/i965/brw_state.h index e219a1d870..97710abec3 100644 --- a/src/gallium/drivers/i965/brw_state.h +++ b/src/gallium/drivers/i965/brw_state.h @@ -109,24 +109,24 @@ void brw_destroy_state(struct brw_context *brw); enum pipe_error brw_cache_data(struct brw_cache *cache, enum brw_cache_id cache_id, const void *data, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs, + struct brw_winsys_reloc *relocs, + GLuint nr_relocs, struct brw_winsys_buffer **bo_out ); enum pipe_error brw_cache_data_sz(struct brw_cache *cache, enum brw_cache_id cache_id, const void *data, GLuint data_size, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs, + struct brw_winsys_reloc *relocs, + GLuint nr_relocs, struct brw_winsys_buffer **bo_out); enum pipe_error brw_upload_cache( struct brw_cache *cache, enum brw_cache_id cache_id, const void *key, GLuint key_sz, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs, + struct brw_winsys_reloc *relocs, + GLuint nr_relocs, const void *data, GLuint data_sz, const void *aux, @@ -137,8 +137,8 @@ boolean brw_search_cache( struct brw_cache *cache, enum brw_cache_id cache_id, const void *key, GLuint key_size, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs, + struct brw_winsys_reloc *relocs, + GLuint nr_relocs, void *aux_return, struct brw_winsys_buffer **bo_out); diff --git a/src/gallium/drivers/i965/brw_state_cache.c b/src/gallium/drivers/i965/brw_state_cache.c index f8369d31ec..16b643ceb2 100644 --- a/src/gallium/drivers/i965/brw_state_cache.c +++ b/src/gallium/drivers/i965/brw_state_cache.c @@ -47,7 +47,7 @@ * a safe point (unlock) we throw out all of the cache data and let it * regenerate for the next rendering operation. * - * The reloc_buf pointers need to be included as key data, otherwise the + * The reloc structs need to be included as key data, otherwise the * non-unique values stuffed in the offset in key data through * brw_cache_data() may result in successful probe for state buffers * even when the buffer being referenced doesn't match. The result would be @@ -73,7 +73,7 @@ static GLuint hash_key(const void *key, GLuint key_size, - struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs) + struct brw_winsys_reloc *relocs, GLuint nr_relocs) { GLuint *ikey = (GLuint *)key; GLuint hash = 0, i; @@ -88,8 +88,8 @@ hash_key(const void *key, GLuint key_size, } /* Include the BO pointers as key data as well */ - ikey = (GLuint *)reloc_bufs; - key_size = nr_reloc_bufs * sizeof(struct brw_winsys_buffer *); + ikey = (GLuint *)relocs; + key_size = nr_relocs * sizeof(struct brw_winsys_reloc); for (i = 0; i < key_size/4; i++) { hash ^= ikey[i]; hash = (hash << 5) | (hash >> 27); @@ -118,7 +118,7 @@ update_cache_last(struct brw_cache *cache, enum brw_cache_id cache_id, static struct brw_cache_item * search_cache(struct brw_cache *cache, enum brw_cache_id cache_id, GLuint hash, const void *key, GLuint key_size, - struct brw_winsys_buffer **reloc_bufs, GLuint nr_reloc_bufs) + struct brw_winsys_reloc *relocs, GLuint nr_relocs) { struct brw_cache_item *c; @@ -137,9 +137,8 @@ search_cache(struct brw_cache *cache, enum brw_cache_id cache_id, c->hash == hash && c->key_size == key_size && memcmp(c->key, key, key_size) == 0 && - c->nr_reloc_bufs == nr_reloc_bufs && - memcmp(c->reloc_bufs, reloc_bufs, - nr_reloc_bufs * sizeof(struct brw_winsys_buffer *)) == 0) + c->nr_relocs == nr_relocs && + memcmp(c->relocs, relocs, nr_relocs * sizeof *relocs) == 0) return c; } @@ -178,16 +177,16 @@ brw_search_cache(struct brw_cache *cache, enum brw_cache_id cache_id, const void *key, GLuint key_size, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs, + struct brw_winsys_reloc *relocs, + GLuint nr_relocs, void *aux_return, struct brw_winsys_buffer **bo_out) { struct brw_cache_item *item; - GLuint hash = hash_key(key, key_size, reloc_bufs, nr_reloc_bufs); + GLuint hash = hash_key(key, key_size, relocs, nr_relocs); item = search_cache(cache, cache_id, hash, key, key_size, - reloc_bufs, nr_reloc_bufs); + relocs, nr_relocs); if (item) { if (aux_return) @@ -207,8 +206,8 @@ brw_upload_cache( struct brw_cache *cache, enum brw_cache_id cache_id, const void *key, GLuint key_size, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs, + struct brw_winsys_reloc *relocs, + GLuint nr_relocs, const void *data, GLuint data_size, const void *aux, @@ -216,8 +215,8 @@ brw_upload_cache( struct brw_cache *cache, struct brw_winsys_buffer **bo_out) { struct brw_cache_item *item = CALLOC_STRUCT(brw_cache_item); - GLuint hash = hash_key(key, key_size, reloc_bufs, nr_reloc_bufs); - GLuint relocs_size = nr_reloc_bufs * sizeof(struct brw_winsys_buffer *); + GLuint hash = hash_key(key, key_size, relocs, nr_relocs); + GLuint relocs_size = nr_relocs * sizeof relocs[0]; GLuint aux_size = cache->aux_size[cache_id]; enum pipe_error ret; void *tmp; @@ -236,23 +235,22 @@ brw_upload_cache( struct brw_cache *cache, return ret; - /* Set up the memory containing the key, aux_data, and reloc_bufs */ + /* Set up the memory containing the key, aux_data, and relocs */ tmp = MALLOC(key_size + aux_size + relocs_size); memcpy(tmp, key, key_size); memcpy((char *)tmp + key_size, aux, cache->aux_size[cache_id]); - memcpy((char *)tmp + key_size + aux_size, reloc_bufs, relocs_size); - for (i = 0; i < nr_reloc_bufs; i++) { - if (reloc_bufs[i] != NULL) - p_atomic_inc(&reloc_bufs[i]->reference.count); + memcpy((char *)tmp + key_size + aux_size, relocs, relocs_size); + for (i = 0; i < nr_relocs; i++) { + p_atomic_inc(&relocs[i].bo->reference.count); } item->cache_id = cache_id; item->key = tmp; item->hash = hash; item->key_size = key_size; - item->reloc_bufs = (struct brw_winsys_buffer **)((char *)tmp + key_size + aux_size); - item->nr_reloc_bufs = nr_reloc_bufs; + item->relocs = (struct brw_winsys_reloc *)((char *)tmp + key_size + aux_size); + item->nr_relocs = nr_relocs; bo_reference( &item->bo, *bo_out ); item->data_size = data_size; @@ -275,9 +273,12 @@ brw_upload_cache( struct brw_cache *cache, data_size, cache_id); /* Copy data to the buffer */ - cache->sws->bo_subdata(item->bo, - cache_id, - 0, data_size, data); + ret = cache->sws->bo_subdata(item->bo, + cache_id, + 0, data_size, data, + relocs, nr_relocs); + if (ret) + return ret; update_cache_last(cache, cache_id, item->bo); @@ -293,15 +294,15 @@ brw_cache_data_sz(struct brw_cache *cache, enum brw_cache_id cache_id, const void *data, GLuint data_size, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs, + struct brw_winsys_reloc *relocs, + GLuint nr_relocs, struct brw_winsys_buffer **bo_out) { struct brw_cache_item *item; - GLuint hash = hash_key(data, data_size, reloc_bufs, nr_reloc_bufs); + GLuint hash = hash_key(data, data_size, relocs, nr_relocs); item = search_cache(cache, cache_id, hash, data, data_size, - reloc_bufs, nr_reloc_bufs); + relocs, nr_relocs); if (item) { update_cache_last(cache, cache_id, item->bo); @@ -311,7 +312,7 @@ brw_cache_data_sz(struct brw_cache *cache, return brw_upload_cache(cache, cache_id, data, data_size, - reloc_bufs, nr_reloc_bufs, + relocs, nr_relocs, data, data_size, NULL, NULL, bo_out); @@ -321,20 +322,22 @@ brw_cache_data_sz(struct brw_cache *cache, /** * Wrapper around brw_cache_data_sz using the cache_id's canonical key size. * - * If nr_reloc_bufs is nonzero, brw_search_cache()/brw_upload_cache() would be + * If nr_relocs is nonzero, brw_search_cache()/brw_upload_cache() would be * better to use, as the potentially changing offsets in the data-used-as-key * will result in excessive cache misses. + * + * XXX: above is no longer true -- can we remove some code? */ enum pipe_error brw_cache_data(struct brw_cache *cache, enum brw_cache_id cache_id, const void *data, - struct brw_winsys_buffer **reloc_bufs, - GLuint nr_reloc_bufs, + struct brw_winsys_reloc *relocs, + GLuint nr_relocs, struct brw_winsys_buffer **bo_out) { return brw_cache_data_sz(cache, cache_id, data, cache->key_size[cache_id], - reloc_bufs, nr_reloc_bufs, bo_out); + relocs, nr_relocs, bo_out); } @@ -510,8 +513,8 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) next = c->next; - for (j = 0; j < c->nr_reloc_bufs; j++) - bo_reference(&c->reloc_bufs[j], NULL); + for (j = 0; j < c->nr_relocs; j++) + bo_reference(&c->relocs[j].bo, NULL); bo_reference(&c->bo, NULL); FREE((void *)c->key); @@ -555,8 +558,8 @@ brw_state_cache_bo_delete(struct brw_cache *cache, struct brw_winsys_buffer *bo) *prev = c->next; - for (j = 0; j < c->nr_reloc_bufs; j++) - bo_reference(&c->reloc_bufs[j], NULL); + for (j = 0; j < c->nr_relocs; j++) + bo_reference(&c->relocs[j].bo, NULL); bo_reference(&c->bo, NULL); diff --git a/src/gallium/drivers/i965/brw_vs_state.c b/src/gallium/drivers/i965/brw_vs_state.c index a5b30eba47..0b44f39f4d 100644 --- a/src/gallium/drivers/i965/brw_vs_state.c +++ b/src/gallium/drivers/i965/brw_vs_state.c @@ -81,6 +81,7 @@ vs_unit_populate_key(struct brw_context *brw, struct brw_vs_unit_key *key) static enum pipe_error vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key, + struct brw_winsys_reloc *reloc, struct brw_winsys_buffer **bo_out) { enum pipe_error ret; @@ -145,22 +146,13 @@ vs_unit_create_from_key(struct brw_context *brw, ret = brw_upload_cache(&brw->cache, BRW_VS_UNIT, key, sizeof(*key), - &brw->vs.prog_bo, 1, + reloc, Elements(reloc), &vs, sizeof(vs), NULL, NULL, bo_out); if (ret) return ret; - /* Emit VS program relocation */ - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_STATE, - vs.thread0.grf_reg_count << 1, - offsetof(struct brw_vs_unit_state, thread0), - brw->vs.prog_bo); - if (ret) - return ret; - return PIPE_OK; } @@ -168,17 +160,29 @@ static int prepare_vs_unit(struct brw_context *brw) { struct brw_vs_unit_key key; enum pipe_error ret; + struct brw_winsys_reloc reloc[1]; + unsigned grf_reg_count; vs_unit_populate_key(brw, &key); + grf_reg_count = (align(key.total_grf, 16) / 16 - 1); + + /* Emit VS program relocation */ + make_reloc(&reloc[0], + BRW_USAGE_STATE, + grf_reg_count << 1, + offsetof(struct brw_vs_unit_state, thread0), + brw->vs.prog_bo); + + if (brw_search_cache(&brw->cache, BRW_VS_UNIT, &key, sizeof(key), - &brw->vs.prog_bo, 1, + reloc, 1, NULL, &brw->vs.state_bo)) return PIPE_OK; - ret = vs_unit_create_from_key(brw, &key, &brw->vs.state_bo); + ret = vs_unit_create_from_key(brw, &key, reloc, &brw->vs.state_bo); if (ret) return ret; diff --git a/src/gallium/drivers/i965/brw_vs_surface_state.c b/src/gallium/drivers/i965/brw_vs_surface_state.c index b12df0ec03..aaf2a44f61 100644 --- a/src/gallium/drivers/i965/brw_vs_surface_state.c +++ b/src/gallium/drivers/i965/brw_vs_surface_state.c @@ -65,7 +65,8 @@ brw_vs_update_constant_buffer(struct brw_context *brw) size, 64); /* _NEW_PROGRAM_CONSTANTS */ - dri_bo_subdata(const_buffer, 0, size, params->ParameterValues); + brw->sws->bo_subdata(const_buffer, 0, size, params->ParameterValues, + NULL, 0); return const_buffer; } @@ -145,51 +146,31 @@ brw_vs_get_binding_table(struct brw_context *brw, struct brw_winsys_buffer **bo_out) { #if 0 - if (brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND, - NULL, 0, - brw->vs.surf_bo, BRW_VS_MAX_SURF, - NULL, - bo_out)) - { - return PIPE_OK; - } - else { - GLuint data_size = BRW_VS_MAX_SURF * sizeof(GLuint); - uint32_t *data = malloc(data_size); - int i; - - for (i = 0; i < BRW_VS_MAX_SURF; i++) - if (brw->vs.surf_bo[i]) - data[i] = brw->vs.surf_bo[i]->offset; - else - data[i] = 0; - - ret = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND, - NULL, 0, - brw->vs.surf_bo, BRW_VS_MAX_SURF, - data, data_size, - NULL, NULL, - bo_out); - if (ret) - return ret; - - /* Emit binding table relocations to surface state */ - for (i = 0; i < BRW_VS_MAX_SURF; i++) { - if (brw->vs.surf_bo[i] != NULL) { - /* The presumed offsets were set in the data values for - * brw_upload_cache. - */ - ret = sws->bo_emit_reloc(*bo_out, i * 4, - brw->vs.surf_bo[i], 0, - BRW_USAGE_STATE); - if (ret) - return ret; - } - } + static GLuint data[BRW_VS_MAX_SURF]; /* always zero */ + struct brw_winsys_reloc reloc[BRW_VS_MAX_SURF]; + int i; - FREE(data); - return PIPE_OK; + /* Emit binding table relocations to surface state */ + for (i = 0; i < BRW_VS_MAX_SURF; i++) { + make_reloc(&reloc[i], + BRW_USAGE_STATE, + 0, + i * 4, + brw->vs.surf_bo[i]); } + + ret = brw_cache_data( &brw->surface_cache, + BRW_SS_SURF_BIND, + NULL, 0, + reloc, Elements(reloc), + data, sizeof data, + NULL, NULL, + bo_out); + if (ret) + return ret; + + FREE(data); + return PIPE_OK; #else return PIPE_OK; #endif diff --git a/src/gallium/drivers/i965/brw_winsys.h b/src/gallium/drivers/i965/brw_winsys.h index e72b928b06..2da660a1e6 100644 --- a/src/gallium/drivers/i965/brw_winsys.h +++ b/src/gallium/drivers/i965/brw_winsys.h @@ -111,6 +111,30 @@ enum brw_buffer_data_type { }; +/* Relocations to be applied with subdata in a call to sws->bo_subdata, below. + * + * Effectively this encodes: + * + * (unsigned *)(subdata + offset) = bo->offset + delta + */ +struct brw_winsys_reloc { + enum brw_buffer_usage usage; /* debug only */ + unsigned delta; + unsigned offset; + struct brw_winsys_buffer *bo; +}; + +static INLINE void make_reloc( struct brw_winsys_reloc *reloc, + enum brw_buffer_usage usage, + unsigned delta, + unsigned offset, + struct brw_winsys_buffer *bo) +{ + reloc->usage = usage; + reloc->delta = delta; + reloc->offset = offset; + reloc->bo = bo; /* Note - note taking a reference yet */ +} @@ -151,7 +175,9 @@ struct brw_winsys_screen { enum brw_buffer_data_type data_type, size_t offset, size_t size, - const void *data); + const void *data, + const struct brw_winsys_reloc *reloc, + unsigned nr_reloc ); boolean (*bo_is_busy)(struct brw_winsys_buffer *buffer); boolean (*bo_references)(struct brw_winsys_buffer *a, diff --git a/src/gallium/drivers/i965/brw_wm_constant_buffer.c b/src/gallium/drivers/i965/brw_wm_constant_buffer.c index 14568265dd..6434c6acf7 100644 --- a/src/gallium/drivers/i965/brw_wm_constant_buffer.c +++ b/src/gallium/drivers/i965/brw_wm_constant_buffer.c @@ -13,16 +13,24 @@ brw_create_constant_surface( struct brw_context *brw, { const GLint w = key->width - 1; struct brw_winsys_buffer *bo; + struct brw_winsys_reloc reloc[1]; enum pipe_error ret; + /* Emit relocation to surface contents */ + make_reloc(&reloc[0], + BRW_USAGE_SAMPLER, + 0, + offsetof(struct brw_surface_state, ss1), + key->bo); + + memset(&surf, 0, sizeof(surf)); surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW; surf.ss0.surface_type = BRW_SURFACE_BUFFER; surf.ss0.surface_format = BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; - assert(key->bo); - surf.ss1.base_addr = key->bo->offset; /* reloc */ + surf.ss1.base_addr = 0; /* reloc */ surf.ss2.width = w & 0x7f; /* bits 6:0 of size or width */ surf.ss2.height = (w >> 7) & 0x1fff; /* bits 19:7 of size or width */ @@ -32,24 +40,13 @@ brw_create_constant_surface( struct brw_context *brw, ret = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE, key, sizeof(*key), - &key->bo, key->bo ? 1 : 0, + reloc, Elements(reloc), &surf, sizeof(surf), NULL, NULL, &bo_out); if (ret) return ret; - if (key->bo) { - /* Emit relocation to surface contents */ - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_SAMPLER, - 0, - offsetof(struct brw_surface_state, ss1), - key->bo); - if (ret) - return ret; - } - return PIPE_OK; } diff --git a/src/gallium/drivers/i965/brw_wm_sampler_state.c b/src/gallium/drivers/i965/brw_wm_sampler_state.c index 174836b39d..4e99ac703a 100644 --- a/src/gallium/drivers/i965/brw_wm_sampler_state.c +++ b/src/gallium/drivers/i965/brw_wm_sampler_state.c @@ -165,6 +165,7 @@ brw_wm_sampler_update_default_colors(struct brw_context *brw) static int upload_wm_samplers( struct brw_context *brw ) { struct wm_sampler_key key; + struct brw_winsys_reloc reloc[BRW_MAX_TEX_UNIT]; enum pipe_error ret; int i; @@ -181,9 +182,20 @@ static int upload_wm_samplers( struct brw_context *brw ) return PIPE_OK; } + /* Emit SDC relocations */ + for (i = 0; i < key.sampler_count; i++) { + make_reloc( &reloc[i], + BRW_USAGE_SAMPLER, + 0, + i * sizeof(struct brw_sampler_state) + + offsetof(struct brw_sampler_state, ss2), + brw->wm.sdc_bo[i]); + } + + if (brw_search_cache(&brw->cache, BRW_SAMPLER, &key, sizeof(key), - brw->wm.sdc_bo, key.sampler_count, + reloc, key.sampler_count, NULL, &brw->wm.sampler_bo)) return PIPE_OK; @@ -193,24 +205,13 @@ static int upload_wm_samplers( struct brw_context *brw ) */ ret = brw_upload_cache(&brw->cache, BRW_SAMPLER, &key, sizeof(key), - brw->wm.sdc_bo, key.sampler_count, + reloc, key.sampler_count, &key.sampler, sizeof(key.sampler), NULL, NULL, &brw->wm.sampler_bo); if (ret) return ret; - /* Emit SDC relocations */ - for (i = 0; i < key.sampler_count; i++) { - ret = brw->sws->bo_emit_reloc(brw->wm.sampler_bo, - BRW_USAGE_SAMPLER, - 0, - i * sizeof(struct brw_sampler_state) + - offsetof(struct brw_sampler_state, ss2), - brw->wm.sdc_bo[i]); - if (ret) - return ret; - } return 0; } diff --git a/src/gallium/drivers/i965/brw_wm_state.c b/src/gallium/drivers/i965/brw_wm_state.c index 56789ce7a4..d8e88237ce 100644 --- a/src/gallium/drivers/i965/brw_wm_state.c +++ b/src/gallium/drivers/i965/brw_wm_state.c @@ -144,8 +144,36 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, struct brw_winsys_buffer **bo_out) { struct brw_wm_unit_state wm; + struct brw_winsys_reloc reloc[3]; + unsigned nr_reloc = 0; enum pipe_error ret; + /* Emit WM program relocation */ + make_reloc(&reloc[nr_reloc++], + BRW_USAGE_STATE, + wm.thread0.grf_reg_count << 1, + offsetof(struct brw_wm_unit_state, thread0), + brw->wm.prog_bo); + + /* Emit scratch space relocation */ + if (key->total_scratch != 0) { + make_reloc(&reloc[nr_reloc++], + BRW_USAGE_SCRATCH, + wm.thread2.per_thread_scratch_space, + offsetof(struct brw_wm_unit_state, thread2), + brw->wm.scratch_bo); + } + + /* Emit sampler state relocation */ + if (key->sampler_count != 0) { + make_reloc(&reloc[nr_reloc++], + BRW_USAGE_STATE, + wm.wm4.stats_enable | (wm.wm4.sampler_count << 2), + offsetof(struct brw_wm_unit_state, wm4), + brw->wm.sampler_bo); + } + + memset(&wm, 0, sizeof(wm)); wm.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1; @@ -220,44 +248,13 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, ret = brw_upload_cache(&brw->cache, BRW_WM_UNIT, key, sizeof(*key), - reloc_bufs, 3, + reloc, nr_reloc, &wm, sizeof(wm), NULL, NULL, bo_out); if (ret) return ret; - /* Emit WM program relocation */ - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_STATE, - wm.thread0.grf_reg_count << 1, - offsetof(struct brw_wm_unit_state, thread0), - brw->wm.prog_bo); - if (ret) - return ret; - - /* Emit scratch space relocation */ - if (key->total_scratch != 0) { - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_SCRATCH, - wm.thread2.per_thread_scratch_space, - offsetof(struct brw_wm_unit_state, thread2), - brw->wm.scratch_bo); - if (ret) - return ret; - } - - /* Emit sampler state relocation */ - if (key->sampler_count != 0) { - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_STATE, - wm.wm4.stats_enable | (wm.wm4.sampler_count << 2), - offsetof(struct brw_wm_unit_state, wm4), - brw->wm.sampler_bo); - if (ret) - return ret; - } - return PIPE_OK; } diff --git a/src/gallium/drivers/i965/brw_wm_surface_state.c b/src/gallium/drivers/i965/brw_wm_surface_state.c index ed365b03b9..f882331433 100644 --- a/src/gallium/drivers/i965/brw_wm_surface_state.c +++ b/src/gallium/drivers/i965/brw_wm_surface_state.c @@ -45,33 +45,32 @@ brw_update_texture_surface( struct brw_context *brw, struct brw_texture *tex, struct brw_winsys_buffer **bo_out) { + struct brw_winsys_reloc reloc[1]; enum pipe_error ret; + /* Emit relocation to surface contents */ + make_reloc(&reloc[0], + BRW_USAGE_SAMPLER, + 0, + offsetof(struct brw_surface_state, ss1), + tex->bo); + if (brw_search_cache(&brw->surface_cache, BRW_SS_SURFACE, &tex->ss, sizeof tex->ss, - &tex->bo, 1, + reloc, Elements(reloc), NULL, bo_out)) return PIPE_OK; ret = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE, &tex->ss, sizeof tex->ss, - &tex->bo, 1, + reloc, Elements(reloc), &tex->ss, sizeof tex->ss, NULL, NULL, bo_out); if (ret) return ret; - - /* Emit relocation to surface contents */ - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_SAMPLER, - 0, - offsetof(struct brw_surface_state, ss1), - tex->bo); - if (ret) - return ret; return PIPE_OK; } @@ -95,8 +94,17 @@ brw_update_render_surface(struct brw_context *brw, { struct brw_surf_ss0 blend_ss0 = brw->curr.blend->ss0; struct brw_surface_state ss; + struct brw_winsys_reloc reloc[1]; enum pipe_error ret; + /* XXX: we will only be rendering to this surface: + */ + make_reloc(&reloc[0], + BRW_USAGE_RENDER_TARGET, + 0, + offsetof(struct brw_surface_state, ss1), + surface->bo); + /* Surfaces are potentially shared between contexts, so can't * scribble the in-place ss0 value in the surface. */ @@ -111,7 +119,7 @@ brw_update_render_surface(struct brw_context *brw, if (brw_search_cache(&brw->surface_cache, BRW_SS_SURFACE, &ss, sizeof(ss), - &surface->bo, 1, + reloc, Elements(reloc), NULL, bo_out)) return PIPE_OK; @@ -119,23 +127,13 @@ brw_update_render_surface(struct brw_context *brw, ret = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE, &ss, sizeof ss, - &surface->bo, 1, + reloc, Elements(reloc), &ss, sizeof ss, NULL, NULL, bo_out); if (ret) return ret; - /* XXX: we will only be rendering to this surface: - */ - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_RENDER_TARGET, - 0, - offsetof(struct brw_surface_state, ss1), - surface->bo); - if (ret) - return ret; - return PIPE_OK; } @@ -149,6 +147,7 @@ brw_wm_get_binding_table(struct brw_context *brw, struct brw_winsys_buffer **bo_out ) { enum pipe_error ret; + struct brw_winsys_reloc reloc[BRW_WM_MAX_SURF]; uint32_t data[BRW_WM_MAX_SURF]; GLuint data_size = brw->wm.nr_surfaces * sizeof data[0]; int i; @@ -156,13 +155,21 @@ brw_wm_get_binding_table(struct brw_context *brw, assert(brw->wm.nr_surfaces <= BRW_WM_MAX_SURF); assert(brw->wm.nr_surfaces > 0); + /* Emit binding table relocations to surface state */ + for (i = 0; i < brw->wm.nr_surfaces; i++) { + make_reloc(&reloc[i], + BRW_USAGE_STATE, + 0, + i * sizeof(GLuint), + brw->wm.surf_bo[i]); + } + /* Note there is no key for this search beyond the values in the * relocation array: */ if (brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND, NULL, 0, - brw->wm.surf_bo, - brw->wm.nr_surfaces, + reloc, brw->wm.nr_surfaces, NULL, bo_out)) return PIPE_OK; @@ -175,24 +182,13 @@ brw_wm_get_binding_table(struct brw_context *brw, ret = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND, NULL, 0, - brw->wm.surf_bo, brw->wm.nr_surfaces, + reloc, brw->wm.nr_surfaces, data, data_size, NULL, NULL, bo_out); if (ret) return ret; - /* Emit binding table relocations to surface state */ - for (i = 0; i < brw->wm.nr_surfaces; i++) { - ret = brw->sws->bo_emit_reloc(*bo_out, - BRW_USAGE_STATE, - 0, - i * sizeof(GLuint), - brw->wm.surf_bo[i]); - if (ret) - return ret; - } - return PIPE_OK; } diff --git a/src/gallium/winsys/drm/i965/xlib/xlib_i965.c b/src/gallium/winsys/drm/i965/xlib/xlib_i965.c index ab5df56bc0..ce6d85976d 100644 --- a/src/gallium/winsys/drm/i965/xlib/xlib_i965.c +++ b/src/gallium/winsys/drm/i965/xlib/xlib_i965.c @@ -47,6 +47,10 @@ #define MAX_VRAM (128*1024*1024) +#define MAX_DUMPS 128 + + + extern int brw_disasm (FILE *file, const struct brw_instruction *inst, unsigned count ); @@ -294,21 +298,36 @@ xlib_brw_bo_subdata(struct brw_winsys_buffer *buffer, enum brw_buffer_data_type data_type, size_t offset, size_t size, - const void *data) + const void *data, + const struct brw_winsys_reloc *reloc, + unsigned nr_relocs) { struct xlib_brw_buffer *buf = xlib_brw_buffer(buffer); struct xlib_brw_winsys *xbw = xlib_brw_winsys(buffer->sws); + unsigned i; - debug_printf("%s buf %p off %d sz %d %s\n", + debug_printf("%s buf %p off %d sz %d %s relocs: %d\n", __FUNCTION__, - (void *)buffer, offset, size, data_types[data_type]); - - if (1) - dump_data( xbw, data_type, data, size ); + (void *)buffer, offset, size, + data_types[data_type], + nr_relocs); assert(buf->base.size >= offset + size); memcpy(buf->virtual + offset, data, size); + /* Apply the relocations: + */ + for (i = 0; i < nr_relocs; i++) { + debug_printf("\treloc[%d] usage %s off %d value %x+%x\n", + i, usages[reloc[i].usage], reloc[i].offset, + xlib_brw_buffer(reloc[i].bo)->offset, reloc[i].delta); + + *(unsigned *)(buf->virtual + offset + reloc[i].offset) = + xlib_brw_buffer(reloc[i].bo)->offset + reloc[i].delta; + } + + if (1) + dump_data( xbw, data_type, buf->virtual + offset, size ); return 0; } -- cgit v1.2.3 From caf2cf884cb32883e9af07dbe36ca9648bae1821 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Fri, 6 Nov 2009 10:38:19 +0000 Subject: i965g: fix some reloc counts --- src/gallium/drivers/i965/brw_cc.c | 2 +- src/gallium/drivers/i965/brw_vs_state.c | 2 +- src/gallium/drivers/i965/brw_vs_surface_state.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/i965/brw_vs_state.c') diff --git a/src/gallium/drivers/i965/brw_cc.c b/src/gallium/drivers/i965/brw_cc.c index 94e2c99c3e..f05728ea5d 100644 --- a/src/gallium/drivers/i965/brw_cc.c +++ b/src/gallium/drivers/i965/brw_cc.c @@ -150,7 +150,7 @@ cc_unit_create_from_key(struct brw_context *brw, ret = brw_upload_cache(&brw->cache, BRW_CC_UNIT, key, sizeof(*key), - reloc, Elements(reloc), + reloc, 1, &cc, sizeof(cc), NULL, NULL, bo_out); diff --git a/src/gallium/drivers/i965/brw_vs_state.c b/src/gallium/drivers/i965/brw_vs_state.c index 0b44f39f4d..dadbb622e4 100644 --- a/src/gallium/drivers/i965/brw_vs_state.c +++ b/src/gallium/drivers/i965/brw_vs_state.c @@ -146,7 +146,7 @@ vs_unit_create_from_key(struct brw_context *brw, ret = brw_upload_cache(&brw->cache, BRW_VS_UNIT, key, sizeof(*key), - reloc, Elements(reloc), + reloc, 1, &vs, sizeof(vs), NULL, NULL, bo_out); diff --git a/src/gallium/drivers/i965/brw_vs_surface_state.c b/src/gallium/drivers/i965/brw_vs_surface_state.c index aaf2a44f61..177a5170d2 100644 --- a/src/gallium/drivers/i965/brw_vs_surface_state.c +++ b/src/gallium/drivers/i965/brw_vs_surface_state.c @@ -162,7 +162,7 @@ brw_vs_get_binding_table(struct brw_context *brw, ret = brw_cache_data( &brw->surface_cache, BRW_SS_SURF_BIND, NULL, 0, - reloc, Elements(reloc), + reloc, nr_reloc, data, sizeof data, NULL, NULL, bo_out); -- cgit v1.2.3