From 4490122d0cae360d1552cea7d7d860de352f13f6 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Wed, 25 Nov 2009 23:02:46 +0000 Subject: i965g: remove redundant nr_attrs member --- src/gallium/drivers/i965/brw_clip.c | 8 ++------ src/gallium/drivers/i965/brw_clip.h | 4 ++-- src/gallium/drivers/i965/brw_clip_tri.c | 6 +++--- src/gallium/drivers/i965/brw_clip_util.c | 2 +- 4 files changed, 8 insertions(+), 12 deletions(-) (limited to 'src/gallium/drivers/i965') diff --git a/src/gallium/drivers/i965/brw_clip.c b/src/gallium/drivers/i965/brw_clip.c index 4ec7b823e8..58d9e56df2 100644 --- a/src/gallium/drivers/i965/brw_clip.c +++ b/src/gallium/drivers/i965/brw_clip.c @@ -81,10 +81,6 @@ compile_clip_prog( struct brw_context *brw, else delta = REG_SIZE; - /* XXX: c.nr_attrs is very redundant: - */ - c.nr_attrs = c.key.nr_attrs; - c.offset_hpos = delta + c.key.output_hpos * ATTR_SIZE; if (c.key.output_color0) @@ -103,9 +99,9 @@ compile_clip_prog( struct brw_context *brw, c.offset_edgeflag = delta + c.key.output_edgeflag * ATTR_SIZE; if (BRW_IS_IGDNG(brw)) - c.nr_regs = (c.nr_attrs + 1) / 2 + 3; /* are vertices packed, or reg-aligned? */ + c.nr_regs = (c.key.nr_attrs + 1) / 2 + 3; /* are vertices packed, or reg-aligned? */ else - c.nr_regs = (c.nr_attrs + 1) / 2 + 1; /* are vertices packed, or reg-aligned? */ + c.nr_regs = (c.key.nr_attrs + 1) / 2 + 1; /* are vertices packed, or reg-aligned? */ c.nr_bytes = c.nr_regs * REG_SIZE; diff --git a/src/gallium/drivers/i965/brw_clip.h b/src/gallium/drivers/i965/brw_clip.h index 8729efa47b..80e3a11a37 100644 --- a/src/gallium/drivers/i965/brw_clip.h +++ b/src/gallium/drivers/i965/brw_clip.h @@ -115,9 +115,9 @@ struct brw_clip_compile { struct brw_reg ff_sync; } reg; - /* 3 different ways of expressing vertex size: + /* 3 different ways of expressing vertex size, including + * key.nr_attrs. */ - GLuint nr_attrs; GLuint nr_regs; GLuint nr_bytes; diff --git a/src/gallium/drivers/i965/brw_clip_tri.c b/src/gallium/drivers/i965/brw_clip_tri.c index fa00f6044f..4cde7294ea 100644 --- a/src/gallium/drivers/i965/brw_clip_tri.c +++ b/src/gallium/drivers/i965/brw_clip_tri.c @@ -66,12 +66,12 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c, i += c->nr_regs; } - if (c->nr_attrs & 1) { + if (c->key.nr_attrs & 1) { for (j = 0; j < 3; j++) { - GLuint delta = c->nr_attrs*16 + 32; + GLuint delta = c->key.nr_attrs*16 + 32; if (c->chipset.is_igdng) - delta = c->nr_attrs * 16 + 32 * 3; + delta = c->key.nr_attrs * 16 + 32 * 3; brw_MOV(&c->func, byte_offset(c->reg.vertex[j], delta), brw_imm_f(0)); } diff --git a/src/gallium/drivers/i965/brw_clip_util.c b/src/gallium/drivers/i965/brw_clip_util.c index 872042c9a9..97a5710310 100644 --- a/src/gallium/drivers/i965/brw_clip_util.c +++ b/src/gallium/drivers/i965/brw_clip_util.c @@ -140,7 +140,7 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c, /* Iterate over each attribute (could be done in pairs?) */ - for (i = 0; i < c->nr_attrs; i++) { + for (i = 0; i < c->key.nr_attrs; i++) { GLuint delta = i*16 + 32; if (c->chipset.is_igdng) -- cgit v1.2.3