From 26add9288c88108e3485ffc57c51ea9bdc0ee719 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sat, 16 Feb 2008 17:23:12 +1100 Subject: nouveau: match gallium code reorginisation. That was... fun.. --- src/gallium/drivers/nouveau/nouveau_stateobj.h | 141 +++++++++++++++++++++++++ 1 file changed, 141 insertions(+) create mode 100644 src/gallium/drivers/nouveau/nouveau_stateobj.h (limited to 'src/gallium/drivers/nouveau/nouveau_stateobj.h') diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h new file mode 100644 index 0000000000..07c31b014a --- /dev/null +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -0,0 +1,141 @@ +#ifndef __NOUVEAU_STATEOBJ_H__ +#define __NOUVEAU_STATEOBJ_H__ + +#include "pipe/p_util.h" + +struct nouveau_stateobj_reloc { + struct pipe_buffer *bo; + + unsigned offset; + unsigned packet; + + unsigned data; + unsigned flags; + unsigned vor; + unsigned tor; +}; + +struct nouveau_stateobj { + int refcount; + + unsigned *push; + struct nouveau_stateobj_reloc *reloc; + + unsigned *cur; + unsigned cur_packet; + unsigned cur_reloc; +}; + +static INLINE struct nouveau_stateobj * +so_new(unsigned push, unsigned reloc) +{ + struct nouveau_stateobj *so; + + so = MALLOC(sizeof(struct nouveau_stateobj)); + so->refcount = 1; + so->push = MALLOC(sizeof(unsigned) * push); + so->reloc = MALLOC(sizeof(struct nouveau_stateobj_reloc) * reloc); + + so->cur = so->push; + so->cur_reloc = so->cur_packet = 0; + + return so; +} + +static INLINE void +so_ref(struct nouveau_stateobj *ref, struct nouveau_stateobj **pso) +{ + struct nouveau_stateobj *so; + + so = *pso; + if (so) { + if (--so->refcount <= 0) { + free(so->push); + free(so->reloc); + free(so); + } + *pso = NULL; + } + + if (ref) { + ref->refcount++; + *pso = ref; + } +} + +static INLINE void +so_data(struct nouveau_stateobj *so, unsigned data) +{ + (*so->cur++) = (data); + so->cur_packet += 4; +} + +static INLINE void +so_method(struct nouveau_stateobj *so, struct nouveau_grobj *gr, + unsigned mthd, unsigned size) +{ + so->cur_packet = (gr->subc << 13) | (1 << 18) | (mthd - 4); + so_data(so, (gr->subc << 13) | (size << 18) | mthd); +} + +static INLINE void +so_reloc(struct nouveau_stateobj *so, struct pipe_buffer *bo, + unsigned data, unsigned flags, unsigned vor, unsigned tor) +{ + struct nouveau_stateobj_reloc *r = &so->reloc[so->cur_reloc++]; + + r->bo = bo; + r->offset = so->cur - so->push; + r->packet = so->cur_packet; + r->data = data; + r->flags = flags; + r->vor = vor; + r->tor = tor; + so_data(so, data); +} + +static INLINE void +so_emit(struct nouveau_winsys *nvws, struct nouveau_stateobj *so) +{ + struct nouveau_pushbuf *pb = nvws->channel->pushbuf; + unsigned nr, i; + + nr = so->cur - so->push; + if (pb->remaining < nr) + nvws->push_flush(nvws->channel, nr); + pb->remaining -= nr; + + memcpy(pb->cur, so->push, nr * 4); + for (i = 0; i < so->cur_reloc; i++) { + struct nouveau_stateobj_reloc *r = &so->reloc[i]; + + nvws->push_reloc(nvws->channel, pb->cur + r->offset, r->bo, + r->data, r->flags, r->vor, r->tor); + } + pb->cur += nr; +} + +static INLINE void +so_emit_reloc_markers(struct nouveau_winsys *nvws, struct nouveau_stateobj *so) +{ + struct nouveau_pushbuf *pb = nvws->channel->pushbuf; + unsigned i; + + i = so->cur_reloc << 1; + if (nvws->channel->pushbuf->remaining < i) + nvws->push_flush(nvws->channel, i); + nvws->channel->pushbuf->remaining -= i; + + for (i = 0; i < so->cur_reloc; i++) { + struct nouveau_stateobj_reloc *r = &so->reloc[i]; + + nvws->push_reloc(nvws->channel, pb->cur++, r->bo, r->packet, + (r->flags & + (NOUVEAU_BO_VRAM | NOUVEAU_BO_GART)) | + NOUVEAU_BO_DUMMY, 0, 0); + nvws->push_reloc(nvws->channel, pb->cur++, r->bo, r->data, + r->flags | NOUVEAU_BO_DUMMY, r->vor, r->tor); + } +} + +#endif -- cgit v1.2.3 From c0f9cab905f3f54cc01bf947665f8a731b8cb347 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Mon, 18 Feb 2008 18:23:12 +1100 Subject: nouveau: cleanups + fixes --- src/gallium/drivers/nouveau/nouveau_stateobj.h | 21 +++++++++------------ src/gallium/drivers/nv40/nv40_state_emit.c | 8 +++++--- 2 files changed, 14 insertions(+), 15 deletions(-) (limited to 'src/gallium/drivers/nouveau/nouveau_stateobj.h') diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index 07c31b014a..459cc7d77a 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -45,22 +45,19 @@ so_new(unsigned push, unsigned reloc) static INLINE void so_ref(struct nouveau_stateobj *ref, struct nouveau_stateobj **pso) { - struct nouveau_stateobj *so; - - so = *pso; - if (so) { - if (--so->refcount <= 0) { - free(so->push); - free(so->reloc); - free(so); - } - *pso = NULL; - } + struct nouveau_stateobj *so = *pso; if (ref) { ref->refcount++; - *pso = ref; } + + if (so && --so->refcount <= 0) { + free(so->push); + free(so->reloc); + free(so); + } + + *pso = ref; } static INLINE void diff --git a/src/gallium/drivers/nv40/nv40_state_emit.c b/src/gallium/drivers/nv40/nv40_state_emit.c index e702b10323..e8230111bb 100644 --- a/src/gallium/drivers/nv40/nv40_state_emit.c +++ b/src/gallium/drivers/nv40/nv40_state_emit.c @@ -103,8 +103,10 @@ nv40_emit_hw_state(struct nv40_context *nv40) nv40->hw_dirty &= ~NV40_NEW_STIPPLE; } - if (nv40->hw_dirty & NV40_NEW_FRAGPROG) + if (nv40->hw_dirty & NV40_NEW_FRAGPROG) { so_emit(nv40->nvws, nv40->state.fragprog); + nv40->hw_dirty &= ~NV40_NEW_FRAGPROG; + } if (nv40->dirty_samplers || (nv40->dirty & NV40_NEW_FRAGPROG)) { nv40_fragtex_bind(nv40); @@ -116,9 +118,9 @@ nv40_emit_hw_state(struct nv40_context *nv40) nv40->dirty &= ~NV40_NEW_FRAGPROG; } - if (nv40->dirty & NV40_NEW_VERTPROG) { + if (nv40->hw_dirty & NV40_NEW_VERTPROG) { so_emit(nv40->nvws, nv40->state.vertprog); - nv40->dirty &= ~NV40_NEW_VERTPROG; + nv40->hw_dirty &= ~NV40_NEW_VERTPROG; } nv40->dirty_samplers = 0; -- cgit v1.2.3 From 7b938431d0ab5ccce1e7e2b1c38e1dcbdc6001e8 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Fri, 22 Feb 2008 14:46:48 +1100 Subject: nv40: stateobj start out with 0 refcount --- src/gallium/drivers/nouveau/nouveau_stateobj.h | 2 +- src/gallium/drivers/nv40/nv40_fragprog.c | 1 - src/gallium/drivers/nv40/nv40_fragtex.c | 2 -- src/gallium/drivers/nv40/nv40_state.c | 12 ++++++------ src/gallium/drivers/nv40/nv40_state_blend.c | 1 - src/gallium/drivers/nv40/nv40_state_fb.c | 1 - src/gallium/drivers/nv40/nv40_state_scissor.c | 1 - src/gallium/drivers/nv40/nv40_state_stipple.c | 1 - src/gallium/drivers/nv40/nv40_state_viewport.c | 1 - src/gallium/drivers/nv40/nv40_vbo.c | 1 - src/gallium/drivers/nv40/nv40_vertprog.c | 1 - 11 files changed, 7 insertions(+), 17 deletions(-) (limited to 'src/gallium/drivers/nouveau/nouveau_stateobj.h') diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index 459cc7d77a..439c7e4734 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -32,7 +32,7 @@ so_new(unsigned push, unsigned reloc) struct nouveau_stateobj *so; so = MALLOC(sizeof(struct nouveau_stateobj)); - so->refcount = 1; + so->refcount = 0; so->push = MALLOC(sizeof(unsigned) * push); so->reloc = MALLOC(sizeof(struct nouveau_stateobj_reloc) * reloc); diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c index db2613ef8b..a4a1ea01e0 100644 --- a/src/gallium/drivers/nv40/nv40_fragprog.c +++ b/src/gallium/drivers/nv40/nv40_fragprog.c @@ -817,7 +817,6 @@ nv40_fragprog_validate(struct nv40_context *nv40) so_method(so, nv40->hw->curie, NV40TCL_FP_CONTROL, 1); so_data (so, fp->fp_control); so_ref(so, &fp->so); - so_ref(NULL, &so); update_constants: if (fp->nr_consts) { diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c index 3d27a9bf13..c8a8120f30 100644 --- a/src/gallium/drivers/nv40/nv40_fragtex.c +++ b/src/gallium/drivers/nv40/nv40_fragtex.c @@ -137,7 +137,6 @@ nv40_fragtex_validate(struct nv40_context *nv40) so_method(so, nv40->hw->curie, NV40TCL_TEX_ENABLE(unit), 1); so_data (so, 0); so_ref(so, &nv40->state.hw[NV40_STATE_FRAGTEX0 + unit]); - so_ref(NULL, &so); state->dirty |= (1 << (NV40_STATE_FRAGTEX0 + unit)); } @@ -148,7 +147,6 @@ nv40_fragtex_validate(struct nv40_context *nv40) so = nv40_fragtex_build(nv40, unit); so_ref(so, &nv40->state.hw[NV40_STATE_FRAGTEX0 + unit]); - so_ref(NULL, &so); state->dirty |= (1 << (NV40_STATE_FRAGTEX0 + unit)); } diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c index 74cbabb023..107e60f179 100644 --- a/src/gallium/drivers/nv40/nv40_state.c +++ b/src/gallium/drivers/nv40/nv40_state.c @@ -11,7 +11,7 @@ nv40_blend_state_create(struct pipe_context *pipe, { struct nv40_context *nv40 = nv40_context(pipe); struct nouveau_grobj *curie = nv40->hw->curie; - struct nv40_blend_state *bso = MALLOC(sizeof(*bso)); + struct nv40_blend_state *bso = CALLOC(1, sizeof(*bso)); struct nouveau_stateobj *so = so_new(16, 0); if (cso->blend_enable) { @@ -47,7 +47,7 @@ nv40_blend_state_create(struct pipe_context *pipe, so_method(so, curie, NV40TCL_DITHER_ENABLE, 1); so_data (so, cso->dither ? 1 : 0); - bso->so = so; + so_ref(so, &bso->so); bso->pipe = *cso; return (void *)bso; } @@ -284,7 +284,7 @@ nv40_rasterizer_state_create(struct pipe_context *pipe, const struct pipe_rasterizer_state *cso) { struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_rasterizer_state *rsso = MALLOC(sizeof(*rsso)); + struct nv40_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); struct nouveau_stateobj *so = so_new(32, 0); struct nouveau_grobj *curie = nv40->hw->curie; @@ -389,7 +389,7 @@ nv40_rasterizer_state_create(struct pipe_context *pipe, so_data(so, 0); } - rsso->so = so; + so_ref(so, &rsso->so); rsso->pipe = *cso; return (void *)rsso; } @@ -417,7 +417,7 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe, const struct pipe_depth_stencil_alpha_state *cso) { struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_zsa_state *zsaso = MALLOC(sizeof(*zsaso)); + struct nv40_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); struct nouveau_stateobj *so = so_new(32, 0); so_method(so, nv40->hw->curie, NV40TCL_DEPTH_FUNC, 3); @@ -460,7 +460,7 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe, so_data (so, 0); } - zsaso->so = so; + so_ref(so, &zsaso->so); zsaso->pipe = *cso; return (void *)zsaso; } diff --git a/src/gallium/drivers/nv40/nv40_state_blend.c b/src/gallium/drivers/nv40/nv40_state_blend.c index b12f8b03dd..81b927a67a 100644 --- a/src/gallium/drivers/nv40/nv40_state_blend.c +++ b/src/gallium/drivers/nv40/nv40_state_blend.c @@ -28,7 +28,6 @@ nv40_state_blend_colour_validate(struct nv40_context *nv40) (float_to_ubyte(bcol->color[2]) << 0))); so_ref(so, &nv40->state.hw[NV40_STATE_BCOL]); - so_ref(NULL, &so); return TRUE; } diff --git a/src/gallium/drivers/nv40/nv40_state_fb.c b/src/gallium/drivers/nv40/nv40_state_fb.c index d3032f1be5..c3bf4d43a3 100644 --- a/src/gallium/drivers/nv40/nv40_state_fb.c +++ b/src/gallium/drivers/nv40/nv40_state_fb.c @@ -143,7 +143,6 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) so_data (so, ((h - 1) << 16) | 0); so_ref(so, &nv40->state.hw[NV40_STATE_FB]); - so_ref(NULL, &so); return TRUE; } diff --git a/src/gallium/drivers/nv40/nv40_state_scissor.c b/src/gallium/drivers/nv40/nv40_state_scissor.c index 2871fa2516..ee797094d3 100644 --- a/src/gallium/drivers/nv40/nv40_state_scissor.c +++ b/src/gallium/drivers/nv40/nv40_state_scissor.c @@ -22,7 +22,6 @@ nv40_state_scissor_validate(struct nv40_context *nv40) } so_ref(so, &nv40->state.hw[NV40_STATE_SCISSOR]); - so_ref(NULL, &so); return TRUE; } diff --git a/src/gallium/drivers/nv40/nv40_state_stipple.c b/src/gallium/drivers/nv40/nv40_state_stipple.c index bd163582a3..aad4d179ac 100644 --- a/src/gallium/drivers/nv40/nv40_state_stipple.c +++ b/src/gallium/drivers/nv40/nv40_state_stipple.c @@ -27,7 +27,6 @@ nv40_state_stipple_validate(struct nv40_context *nv40) } so_ref(so, &nv40->state.hw[NV40_STATE_STIPPLE]); - so_ref(NULL, &so); return TRUE; } diff --git a/src/gallium/drivers/nv40/nv40_state_viewport.c b/src/gallium/drivers/nv40/nv40_state_viewport.c index 79fcc31a8b..68820d3133 100644 --- a/src/gallium/drivers/nv40/nv40_state_viewport.c +++ b/src/gallium/drivers/nv40/nv40_state_viewport.c @@ -17,7 +17,6 @@ nv40_state_viewport_validate(struct nv40_context *nv40) so_data (so, fui(vpt->scale[3])); so_ref(so, &nv40->state.hw[NV40_STATE_VIEWPORT]); - so_ref(NULL, &so); return TRUE; } diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c index 3bfcb264db..5abe4c9af1 100644 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ b/src/gallium/drivers/nv40/nv40_vbo.c @@ -159,7 +159,6 @@ nv40_vbo_arrays_update(struct nv40_context *nv40, struct pipe_buffer *ib, so_emit(nv40->nvws, vtxfmt); so_emit(nv40->nvws, vtxbuf); so_ref (vtxbuf, &nv40->so_vtxbuf); - so_ref (NULL, &vtxbuf); so_ref (NULL, &vtxfmt); } diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c index 8a2d233697..c482964adc 100644 --- a/src/gallium/drivers/nv40/nv40_vertprog.c +++ b/src/gallium/drivers/nv40/nv40_vertprog.c @@ -678,7 +678,6 @@ check_gpu_resources: so_data (so, vp->ir); so_data (so, vp->or); so_ref(so, &vp->so); - so_ref(NULL, &so); upload_code = TRUE; } -- cgit v1.2.3 From 9575e35807c89c0b8a745671bc2dcd54d96379ff Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 19 Mar 2008 00:06:15 +1100 Subject: nouveau: pass nvws to nvws->push_* functions, rather than nouveau_channel* --- src/gallium/drivers/nouveau/nouveau_push.h | 7 ++- src/gallium/drivers/nouveau/nouveau_stateobj.h | 10 ++-- src/gallium/drivers/nouveau/nouveau_winsys.h | 4 +- src/gallium/drivers/nv40/nv40_dma.h | 66 ------------------------- src/gallium/drivers/nv40/nv40_screen.c | 2 +- src/gallium/drivers/nv50/nv50_screen.c | 2 +- src/gallium/winsys/dri/nouveau/nouveau_winsys.c | 15 ++++-- 7 files changed, 23 insertions(+), 83 deletions(-) delete mode 100644 src/gallium/drivers/nv40/nv40_dma.h (limited to 'src/gallium/drivers/nouveau/nouveau_stateobj.h') diff --git a/src/gallium/drivers/nouveau/nouveau_push.h b/src/gallium/drivers/nouveau/nouveau_push.h index c5c5d988d5..225c17744a 100644 --- a/src/gallium/drivers/nouveau/nouveau_push.h +++ b/src/gallium/drivers/nouveau/nouveau_push.h @@ -27,7 +27,7 @@ #define BEGIN_RING(obj,mthd,size) do { \ NOUVEAU_PUSH_CONTEXT(pc); \ if (pc->nvws->channel->pushbuf->remaining < ((size) + 1)) \ - pc->nvws->push_flush(pc->nvws->channel, ((size) + 1)); \ + pc->nvws->push_flush(pc->nvws, ((size) + 1)); \ OUT_RING((pc->obj->subc << 13) | ((size) << 18) | (mthd)); \ pc->nvws->channel->pushbuf->remaining -= ((size) + 1); \ } while(0) @@ -38,13 +38,12 @@ #define FIRE_RING() do { \ NOUVEAU_PUSH_CONTEXT(pc); \ - pc->nvws->push_flush(pc->nvws->channel, 0); \ + pc->nvws->push_flush(pc->nvws, 0); \ } while(0) #define OUT_RELOC(bo,data,flags,vor,tor) do { \ NOUVEAU_PUSH_CONTEXT(pc); \ - pc->nvws->push_reloc(pc->nvws->channel, \ - pc->nvws->channel->pushbuf->cur++, \ + pc->nvws->push_reloc(pc->nvws, pc->nvws->channel->pushbuf->cur++, \ (bo), (data), (flags), (vor), (tor)); \ } while(0) diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index 439c7e4734..d465223748 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -99,14 +99,14 @@ so_emit(struct nouveau_winsys *nvws, struct nouveau_stateobj *so) nr = so->cur - so->push; if (pb->remaining < nr) - nvws->push_flush(nvws->channel, nr); + nvws->push_flush(nvws, nr); pb->remaining -= nr; memcpy(pb->cur, so->push, nr * 4); for (i = 0; i < so->cur_reloc; i++) { struct nouveau_stateobj_reloc *r = &so->reloc[i]; - nvws->push_reloc(nvws->channel, pb->cur + r->offset, r->bo, + nvws->push_reloc(nvws, pb->cur + r->offset, r->bo, r->data, r->flags, r->vor, r->tor); } pb->cur += nr; @@ -120,17 +120,17 @@ so_emit_reloc_markers(struct nouveau_winsys *nvws, struct nouveau_stateobj *so) i = so->cur_reloc << 1; if (nvws->channel->pushbuf->remaining < i) - nvws->push_flush(nvws->channel, i); + nvws->push_flush(nvws, i); nvws->channel->pushbuf->remaining -= i; for (i = 0; i < so->cur_reloc; i++) { struct nouveau_stateobj_reloc *r = &so->reloc[i]; - nvws->push_reloc(nvws->channel, pb->cur++, r->bo, r->packet, + nvws->push_reloc(nvws, pb->cur++, r->bo, r->packet, (r->flags & (NOUVEAU_BO_VRAM | NOUVEAU_BO_GART)) | NOUVEAU_BO_DUMMY, 0, 0); - nvws->push_reloc(nvws->channel, pb->cur++, r->bo, r->data, + nvws->push_reloc(nvws, pb->cur++, r->bo, r->data, r->flags | NOUVEAU_BO_DUMMY, r->vor, r->tor); } } diff --git a/src/gallium/drivers/nouveau/nouveau_winsys.h b/src/gallium/drivers/nouveau/nouveau_winsys.h index e4b20478a0..7fa7cc0910 100644 --- a/src/gallium/drivers/nouveau/nouveau_winsys.h +++ b/src/gallium/drivers/nouveau/nouveau_winsys.h @@ -24,10 +24,10 @@ struct nouveau_winsys { struct nouveau_resource **); void (*res_free)(struct nouveau_resource **); - int (*push_reloc)(struct nouveau_channel *, void *ptr, + int (*push_reloc)(struct nouveau_winsys *, void *ptr, struct pipe_buffer *, uint32_t data, uint32_t flags, uint32_t vor, uint32_t tor); - int (*push_flush)(struct nouveau_channel *, unsigned size); + int (*push_flush)(struct nouveau_winsys *, unsigned size); int (*grobj_alloc)(struct nouveau_winsys *, int grclass, struct nouveau_grobj **); diff --git a/src/gallium/drivers/nv40/nv40_dma.h b/src/gallium/drivers/nv40/nv40_dma.h deleted file mode 100644 index 1fb8267768..0000000000 --- a/src/gallium/drivers/nv40/nv40_dma.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef __NV40_DMA_H__ -#define __NV40_DMA_H__ - -#include "pipe/nouveau/nouveau_winsys.h" - -#define OUT_RING(data) do { \ - (*nv40->nvws->channel->pushbuf->cur++) = (data); \ -} while(0) - -#define OUT_RINGp(src,size) do { \ - memcpy(nv40->nvws->channel->pushbuf->cur, (src), (size) * 4); \ - nv40->nvws->channel->pushbuf->cur += (size); \ -} while(0) - -#define OUT_RINGf(data) do { \ - union { float v; uint32_t u; } c; \ - c.v = (data); \ - OUT_RING(c.u); \ -} while(0) - -#define BEGIN_RING(obj,mthd,size) do { \ - if (nv40->nvws->channel->pushbuf->remaining < ((size) + 1)) \ - nv40->nvws->push_flush(nv40->nvws->channel, ((size) + 1)); \ - OUT_RING((nv40->obj->subc << 13) | ((size) << 18) | (mthd)); \ - nv40->nvws->channel->pushbuf->remaining -= ((size) + 1); \ -} while(0) - -#define BEGIN_RING_NI(obj,mthd,size) do { \ - BEGIN_RING(obj, (mthd) | 0x40000000, (size)); \ -} while(0) - -#define FIRE_RING() do { \ - nv40->nvws->push_flush(nv40->nvws->channel, 0); \ -} while(0) - -#define OUT_RELOC(bo,data,flags,vor,tor) do { \ - nv40->nvws->push_reloc(nv40->nvws->channel, \ - nv40->nvws->channel->pushbuf->cur, \ - (struct nouveau_bo *)(bo), \ - (data), (flags), (vor), (tor)); \ - OUT_RING(0); \ -} while(0) - -/* Raw data + flags depending on FB/TT buffer */ -#define OUT_RELOCd(bo,data,flags,vor,tor) do { \ - OUT_RELOC((bo), (data), (flags) | NOUVEAU_BO_OR, (vor), (tor)); \ -} while(0) - -/* FB/TT object handle */ -#define OUT_RELOCo(bo,flags) do { \ - OUT_RELOC((bo), 0, (flags) | NOUVEAU_BO_OR, \ - nv40->nvws->channel->vram->handle, \ - nv40->nvws->channel->gart->handle); \ -} while(0) - -/* Low 32-bits of offset */ -#define OUT_RELOCl(bo,delta,flags) do { \ - OUT_RELOC((bo), (delta), (flags) | NOUVEAU_BO_LOW, 0, 0); \ -} while(0) - -/* High 32-bits of offset */ -#define OUT_RELOCh(bo,delta,flags) do { \ - OUT_RELOC((bo), (delta), (flags) | NOUVEAU_BO_HIGH, 0, 0); \ -} while(0) - -#endif diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c index 268ca83ce0..bf30fbeca1 100644 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ b/src/gallium/drivers/nv40/nv40_screen.c @@ -260,7 +260,7 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws, so_emit(nvws, so); so_ref(NULL, &so); - nvws->push_flush(nvws->channel, 0); + nvws->push_flush(nvws, 0); screen->pipe.winsys = ws; screen->pipe.destroy = nv40_screen_destroy; diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index 721c6421d1..ff4aca81a5 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -171,7 +171,7 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws, so_emit(nvws, so); so_ref(NULL, &so); - nvws->push_flush(nvws->channel, 0); + nvws->push_flush(nvws, 0); screen->pipe.winsys = ws; diff --git a/src/gallium/winsys/dri/nouveau/nouveau_winsys.c b/src/gallium/winsys/dri/nouveau/nouveau_winsys.c index 6c85aab9f5..bf1afce5d9 100644 --- a/src/gallium/winsys/dri/nouveau/nouveau_winsys.c +++ b/src/gallium/winsys/dri/nouveau/nouveau_winsys.c @@ -59,14 +59,21 @@ nouveau_pipe_surface_fill(struct nouveau_winsys *nvws, struct pipe_surface *dst, } static int -nouveau_pipe_emit_reloc(struct nouveau_channel *chan, void *ptr, +nouveau_pipe_push_reloc(struct nouveau_winsys *nvws, void *ptr, struct pipe_buffer *buf, uint32_t data, uint32_t flags, uint32_t vor, uint32_t tor) { - return nouveau_pushbuf_emit_reloc(chan, ptr, nouveau_buffer(buf)->bo, + return nouveau_pushbuf_emit_reloc(nvws->channel, ptr, + nouveau_buffer(buf)->bo, data, flags, vor, tor); } +static int +nouveau_pipe_push_flush(struct nouveau_winsys *nvws, unsigned size) +{ + return nouveau_pushbuf_flush(nvws->channel, size); +} + struct pipe_context * nouveau_pipe_create(struct nouveau_context *nv) { @@ -114,8 +121,8 @@ nouveau_pipe_create(struct nouveau_context *nv) nvws->res_alloc = nouveau_resource_alloc; nvws->res_free = nouveau_resource_free; - nvws->push_reloc = nouveau_pipe_emit_reloc; - nvws->push_flush = nouveau_pushbuf_flush; + nvws->push_reloc = nouveau_pipe_push_reloc; + nvws->push_flush = nouveau_pipe_push_flush; nvws->grobj_alloc = nouveau_pipe_grobj_alloc; nvws->grobj_free = nouveau_grobj_free; -- cgit v1.2.3 From bbefb541ad94382debb0f7a8daa636729799a31a Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 30 Mar 2008 20:32:22 +1000 Subject: nouveau: adapt to recent gallium changes --- src/gallium/drivers/nouveau/nouveau_push.h | 8 ++--- src/gallium/drivers/nouveau/nouveau_stateobj.h | 4 +-- src/gallium/drivers/nouveau/nouveau_winsys.h | 3 +- src/gallium/drivers/nv10/nv10_context.c | 19 +++------- src/gallium/drivers/nv10/nv10_state.c | 18 +++++----- src/gallium/drivers/nv30/nv30_context.c | 19 +++------- src/gallium/drivers/nv30/nv30_query.c | 2 +- src/gallium/drivers/nv30/nv30_state.c | 18 +++++----- src/gallium/drivers/nv30/nv30_vbo.c | 4 +-- src/gallium/drivers/nv40/nv40_context.c | 17 ++------- src/gallium/drivers/nv40/nv40_draw.c | 4 +-- src/gallium/drivers/nv40/nv40_query.c | 2 +- src/gallium/drivers/nv40/nv40_screen.c | 2 +- src/gallium/drivers/nv40/nv40_state.c | 20 +++++------ src/gallium/drivers/nv40/nv40_state_emit.c | 4 +-- src/gallium/drivers/nv40/nv40_vbo.c | 4 +-- src/gallium/drivers/nv50/nv50_context.c | 18 ++-------- src/gallium/drivers/nv50/nv50_screen.c | 2 +- src/gallium/drivers/nv50/nv50_state.c | 12 +++---- src/gallium/winsys/dri/nouveau/nouveau_context.c | 4 +-- src/gallium/winsys/dri/nouveau/nouveau_winsys.c | 12 ++++++- .../winsys/dri/nouveau/nouveau_winsys_pipe.c | 42 ++++++++++++++++++++++ 22 files changed, 121 insertions(+), 117 deletions(-) (limited to 'src/gallium/drivers/nouveau/nouveau_stateobj.h') diff --git a/src/gallium/drivers/nouveau/nouveau_push.h b/src/gallium/drivers/nouveau/nouveau_push.h index 225c17744a..54ef1c1291 100644 --- a/src/gallium/drivers/nouveau/nouveau_push.h +++ b/src/gallium/drivers/nouveau/nouveau_push.h @@ -27,7 +27,7 @@ #define BEGIN_RING(obj,mthd,size) do { \ NOUVEAU_PUSH_CONTEXT(pc); \ if (pc->nvws->channel->pushbuf->remaining < ((size) + 1)) \ - pc->nvws->push_flush(pc->nvws, ((size) + 1)); \ + pc->nvws->push_flush(pc->nvws, ((size) + 1), NULL); \ OUT_RING((pc->obj->subc << 13) | ((size) << 18) | (mthd)); \ pc->nvws->channel->pushbuf->remaining -= ((size) + 1); \ } while(0) @@ -36,9 +36,9 @@ BEGIN_RING(obj, (mthd) | 0x40000000, (size)); \ } while(0) -#define FIRE_RING() do { \ +#define FIRE_RING(fence) do { \ NOUVEAU_PUSH_CONTEXT(pc); \ - pc->nvws->push_flush(pc->nvws, 0); \ + pc->nvws->push_flush(pc->nvws, 0, fence); \ } while(0) #define OUT_RELOC(bo,data,flags,vor,tor) do { \ @@ -73,7 +73,7 @@ #define OUT_RELOCm(bo, flags, obj, mthd, size) do { \ NOUVEAU_PUSH_CONTEXT(pc); \ if (pc->nvws->channel->pushbuf->remaining < ((size) + 1)) \ - pc->nvws->push_flush(pc->nvws->channel, ((size) + 1)); \ + pc->nvws->push_flush(pc->nvws->channel, ((size) + 1), NULL); \ OUT_RELOCd((bo), (pc->obj->subc << 13) | ((size) << 18) | (mthd), \ (flags), 0, 0); \ pc->nvws->channel->pushbuf->remaining -= ((size) + 1); \ diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index d465223748..d501b76b51 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -99,7 +99,7 @@ so_emit(struct nouveau_winsys *nvws, struct nouveau_stateobj *so) nr = so->cur - so->push; if (pb->remaining < nr) - nvws->push_flush(nvws, nr); + nvws->push_flush(nvws, nr, NULL); pb->remaining -= nr; memcpy(pb->cur, so->push, nr * 4); @@ -120,7 +120,7 @@ so_emit_reloc_markers(struct nouveau_winsys *nvws, struct nouveau_stateobj *so) i = so->cur_reloc << 1; if (nvws->channel->pushbuf->remaining < i) - nvws->push_flush(nvws, i); + nvws->push_flush(nvws, i, NULL); nvws->channel->pushbuf->remaining -= i; for (i = 0; i < so->cur_reloc; i++) { diff --git a/src/gallium/drivers/nouveau/nouveau_winsys.h b/src/gallium/drivers/nouveau/nouveau_winsys.h index 7fa7cc0910..2a5305f7ce 100644 --- a/src/gallium/drivers/nouveau/nouveau_winsys.h +++ b/src/gallium/drivers/nouveau/nouveau_winsys.h @@ -27,7 +27,8 @@ struct nouveau_winsys { int (*push_reloc)(struct nouveau_winsys *, void *ptr, struct pipe_buffer *, uint32_t data, uint32_t flags, uint32_t vor, uint32_t tor); - int (*push_flush)(struct nouveau_winsys *, unsigned size); + int (*push_flush)(struct nouveau_winsys *, unsigned size, + struct pipe_fence_handle **fence); int (*grobj_alloc)(struct nouveau_winsys *, int grclass, struct nouveau_grobj **); diff --git a/src/gallium/drivers/nv10/nv10_context.c b/src/gallium/drivers/nv10/nv10_context.c index 2599acf286..14042fb2fb 100644 --- a/src/gallium/drivers/nv10/nv10_context.c +++ b/src/gallium/drivers/nv10/nv10_context.c @@ -7,10 +7,10 @@ #include "nv10_screen.h" static void -nv10_flush(struct pipe_context *pipe, unsigned flags) +nv10_flush(struct pipe_context *pipe, unsigned flags, + struct pipe_fence_handle **fence) { struct nv10_context *nv10 = nv10_context(pipe); - struct nouveau_winsys *nvws = nv10->nvws; if (flags & PIPE_FLUSH_TEXTURE_CACHE) { BEGIN_RING(celsius, 0x1fd8, 1); @@ -19,18 +19,7 @@ nv10_flush(struct pipe_context *pipe, unsigned flags) OUT_RING (1); } - if (flags & PIPE_FLUSH_WAIT) { - nvws->notifier_reset(nv10->sync, 0); - BEGIN_RING(celsius, 0x104, 1); - OUT_RING (0); - BEGIN_RING(celsius, 0x100, 1); - OUT_RING (0); - } - - FIRE_RING(); - - if (flags & PIPE_FLUSH_WAIT) - nvws->notifier_wait(nv10->sync, 0, 0, 2000); + FIRE_RING(fence); } static void @@ -253,7 +242,7 @@ nv10_init_hwctx(struct nv10_context *nv10, int celsius_class) OUT_RING (1); - FIRE_RING (); + FIRE_RING (NULL); return TRUE; } diff --git a/src/gallium/drivers/nv10/nv10_state.c b/src/gallium/drivers/nv10/nv10_state.c index d7c445f1b3..1ff01de106 100644 --- a/src/gallium/drivers/nv10/nv10_state.c +++ b/src/gallium/drivers/nv10/nv10_state.c @@ -633,24 +633,22 @@ nv10_set_viewport_state(struct pipe_context *pipe, } static void -nv10_set_vertex_buffer(struct pipe_context *pipe, unsigned index, - const struct pipe_vertex_buffer *vb) +nv10_set_vertex_buffers(struct pipe_context *pipe, unsigned count, + const struct pipe_vertex_buffer *vb) { struct nv10_context *nv10 = nv10_context(pipe); - nv10->vtxbuf[index] = *vb; - + memcpy(nv10->vtxbuf, vb, sizeof(*vb) * count); nv10->dirty |= NV10_NEW_ARRAYS; } static void -nv10_set_vertex_element(struct pipe_context *pipe, unsigned index, - const struct pipe_vertex_element *ve) +nv10_set_vertex_elements(struct pipe_context *pipe, unsigned count, + const struct pipe_vertex_element *ve) { struct nv10_context *nv10 = nv10_context(pipe); - nv10->vtxelt[index] = *ve; - + memcpy(nv10->vtxelt, ve, sizeof(*ve) * count); nv10->dirty |= NV10_NEW_ARRAYS; } @@ -693,7 +691,7 @@ nv10_init_state_functions(struct nv10_context *nv10) nv10->pipe.set_scissor_state = nv10_set_scissor_state; nv10->pipe.set_viewport_state = nv10_set_viewport_state; - nv10->pipe.set_vertex_buffer = nv10_set_vertex_buffer; - nv10->pipe.set_vertex_element = nv10_set_vertex_element; + nv10->pipe.set_vertex_buffers = nv10_set_vertex_buffers; + nv10->pipe.set_vertex_elements = nv10_set_vertex_elements; } diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index cdd662a9f1..1e729d789b 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -7,10 +7,10 @@ #include "nv30_screen.h" static void -nv30_flush(struct pipe_context *pipe, unsigned flags) +nv30_flush(struct pipe_context *pipe, unsigned flags, + struct pipe_fence_handle **fence) { struct nv30_context *nv30 = nv30_context(pipe); - struct nouveau_winsys *nvws = nv30->nvws; if (flags & PIPE_FLUSH_TEXTURE_CACHE) { BEGIN_RING(rankine, 0x1fd8, 1); @@ -19,18 +19,7 @@ nv30_flush(struct pipe_context *pipe, unsigned flags) OUT_RING (1); } - if (flags & PIPE_FLUSH_WAIT) { - nvws->notifier_reset(nv30->sync, 0); - BEGIN_RING(rankine, 0x104, 1); - OUT_RING (0); - BEGIN_RING(rankine, 0x100, 1); - OUT_RING (0); - } - - FIRE_RING(); - - if (flags & PIPE_FLUSH_WAIT) - nvws->notifier_wait(nv30->sync, 0, 0, 2000); + FIRE_RING(fence); } static void @@ -144,7 +133,7 @@ nv30_init_hwctx(struct nv30_context *nv30, int rankine_class) BEGIN_RING(rankine, 0x1e94, 1); OUT_RING (0x13); - FIRE_RING (); + FIRE_RING (NULL); return TRUE; } diff --git a/src/gallium/drivers/nv30/nv30_query.c b/src/gallium/drivers/nv30/nv30_query.c index 71fdcfa24d..e19cb455dc 100644 --- a/src/gallium/drivers/nv30/nv30_query.c +++ b/src/gallium/drivers/nv30/nv30_query.c @@ -67,7 +67,7 @@ nv30_query_end(struct pipe_context *pipe, struct pipe_query *pq) BEGIN_RING(rankine, NV34TCL_QUERY_GET, 1); OUT_RING ((0x01 << NV34TCL_QUERY_GET_UNK24_SHIFT) | ((q->object->start * 32) << NV34TCL_QUERY_GET_OFFSET_SHIFT)); - FIRE_RING(); + FIRE_RING(NULL); } static boolean diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c index b0055892ae..983638adcc 100644 --- a/src/gallium/drivers/nv30/nv30_state.c +++ b/src/gallium/drivers/nv30/nv30_state.c @@ -710,24 +710,22 @@ nv30_set_viewport_state(struct pipe_context *pipe, } static void -nv30_set_vertex_buffer(struct pipe_context *pipe, unsigned index, - const struct pipe_vertex_buffer *vb) +nv30_set_vertex_buffers(struct pipe_context *pipe, unsigned count, + const struct pipe_vertex_buffer *vb) { struct nv30_context *nv30 = nv30_context(pipe); - nv30->vtxbuf[index] = *vb; - + memcpy(nv30->vtxbuf, vb, sizeof(*vb) * count); nv30->dirty |= NV30_NEW_ARRAYS; } static void -nv30_set_vertex_element(struct pipe_context *pipe, unsigned index, - const struct pipe_vertex_element *ve) +nv30_set_vertex_elements(struct pipe_context *pipe, unsigned count, + const struct pipe_vertex_element *ve) { struct nv30_context *nv30 = nv30_context(pipe); - nv30->vtxelt[index] = *ve; - + memcpy(nv30->vtxelt, ve, sizeof(*ve) * count); nv30->dirty |= NV30_NEW_ARRAYS; } @@ -770,7 +768,7 @@ nv30_init_state_functions(struct nv30_context *nv30) nv30->pipe.set_scissor_state = nv30_set_scissor_state; nv30->pipe.set_viewport_state = nv30_set_viewport_state; - nv30->pipe.set_vertex_buffer = nv30_set_vertex_buffer; - nv30->pipe.set_vertex_element = nv30_set_vertex_element; + nv30->pipe.set_vertex_buffers = nv30_set_vertex_buffers; + nv30->pipe.set_vertex_elements = nv30_set_vertex_elements; } diff --git a/src/gallium/drivers/nv30/nv30_vbo.c b/src/gallium/drivers/nv30/nv30_vbo.c index a62462f7bc..b18a407ec5 100644 --- a/src/gallium/drivers/nv30/nv30_vbo.c +++ b/src/gallium/drivers/nv30/nv30_vbo.c @@ -229,7 +229,7 @@ nv30_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start, BEGIN_RING(rankine, NV34TCL_VERTEX_BEGIN_END, 1); OUT_RING (0); - pipe->flush(pipe, 0); + pipe->flush(pipe, 0, NULL); return TRUE; } @@ -418,7 +418,7 @@ nv30_draw_elements(struct pipe_context *pipe, mode, start, count); } - pipe->flush(pipe, 0); + pipe->flush(pipe, 0, NULL); return TRUE; } diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index 7fcf8b8619..f9c93f7a2d 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -7,10 +7,10 @@ #include "nv40_screen.h" static void -nv40_flush(struct pipe_context *pipe, unsigned flags) +nv40_flush(struct pipe_context *pipe, unsigned flags, + struct pipe_fence_handle **fence) { struct nv40_context *nv40 = nv40_context(pipe); - struct nouveau_winsys *nvws = nv40->nvws; if (flags & PIPE_FLUSH_TEXTURE_CACHE) { BEGIN_RING(curie, 0x1fd8, 1); @@ -19,18 +19,7 @@ nv40_flush(struct pipe_context *pipe, unsigned flags) OUT_RING (1); } - if (flags & PIPE_FLUSH_WAIT) { - nvws->notifier_reset(nv40->screen->sync, 0); - BEGIN_RING(curie, 0x104, 1); - OUT_RING (0); - BEGIN_RING(curie, 0x100, 1); - OUT_RING (0); - } - - FIRE_RING(); - - if (flags & PIPE_FLUSH_WAIT) - nvws->notifier_wait(nv40->screen->sync, 0, 0, 2000); + FIRE_RING(fence); } static void diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c index d05e5ad193..9cd8fa6a49 100644 --- a/src/gallium/drivers/nv40/nv40_draw.c +++ b/src/gallium/drivers/nv40/nv40_draw.c @@ -89,7 +89,7 @@ nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, NOUVEAU_ERR("AIII, missed flush\n"); assert(0); } - FIRE_RING(); + FIRE_RING(NULL); nv40_state_emit(nv40); } @@ -275,7 +275,7 @@ nv40_draw_elements_swtnl(struct pipe_context *pipe, ws->buffer_unmap(ws, nv40->constbuf[PIPE_SHADER_VERTEX]); draw_flush(nv40->draw); - pipe->flush(pipe, 0); + pipe->flush(pipe, 0, NULL); return TRUE; } diff --git a/src/gallium/drivers/nv40/nv40_query.c b/src/gallium/drivers/nv40/nv40_query.c index 15961591b9..57f39cfab0 100644 --- a/src/gallium/drivers/nv40/nv40_query.c +++ b/src/gallium/drivers/nv40/nv40_query.c @@ -75,7 +75,7 @@ nv40_query_end(struct pipe_context *pipe, struct pipe_query *pq) BEGIN_RING(curie, NV40TCL_QUERY_GET, 1); OUT_RING ((0x01 << NV40TCL_QUERY_GET_UNK24_SHIFT) | ((q->object->start * 32) << NV40TCL_QUERY_GET_OFFSET_SHIFT)); - FIRE_RING(); + FIRE_RING(NULL); } static boolean diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c index 75b965bb9d..e98005f749 100644 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ b/src/gallium/drivers/nv40/nv40_screen.c @@ -266,7 +266,7 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws, so_emit(nvws, so); so_ref(NULL, &so); - nvws->push_flush(nvws, 0); + nvws->push_flush(nvws, 0, NULL); screen->pipe.winsys = ws; screen->pipe.destroy = nv40_screen_destroy; diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c index 3eafbece30..1417c95e75 100644 --- a/src/gallium/drivers/nv40/nv40_state.c +++ b/src/gallium/drivers/nv40/nv40_state.c @@ -660,26 +660,26 @@ nv40_set_viewport_state(struct pipe_context *pipe, } static void -nv40_set_vertex_buffer(struct pipe_context *pipe, unsigned index, - const struct pipe_vertex_buffer *vb) +nv40_set_vertex_buffers(struct pipe_context *pipe, unsigned count, + const struct pipe_vertex_buffer *vb) { struct nv40_context *nv40 = nv40_context(pipe); - draw_set_vertex_buffer(nv40->draw, index, vb); + draw_set_vertex_buffers(nv40->draw, count, vb); - nv40->vtxbuf[index] = *vb; + memcpy(nv40->vtxbuf, vb, sizeof(*vb) * count); nv40->dirty |= NV40_NEW_ARRAYS; } static void -nv40_set_vertex_element(struct pipe_context *pipe, unsigned index, - const struct pipe_vertex_element *ve) +nv40_set_vertex_elements(struct pipe_context *pipe, unsigned count, + const struct pipe_vertex_element *ve) { struct nv40_context *nv40 = nv40_context(pipe); - draw_set_vertex_element(nv40->draw, index, ve); + draw_set_vertex_elements(nv40->draw, count, ve); - nv40->vtxelt[index] = *ve; + memcpy(nv40->vtxelt, ve, sizeof(*ve) * count); nv40->dirty |= NV40_NEW_ARRAYS; } @@ -722,7 +722,7 @@ nv40_init_state_functions(struct nv40_context *nv40) nv40->pipe.set_scissor_state = nv40_set_scissor_state; nv40->pipe.set_viewport_state = nv40_set_viewport_state; - nv40->pipe.set_vertex_buffer = nv40_set_vertex_buffer; - nv40->pipe.set_vertex_element = nv40_set_vertex_element; + nv40->pipe.set_vertex_buffers = nv40_set_vertex_buffers; + nv40->pipe.set_vertex_elements = nv40_set_vertex_elements; } diff --git a/src/gallium/drivers/nv40/nv40_state_emit.c b/src/gallium/drivers/nv40/nv40_state_emit.c index a9a9abc922..74feb6d4bf 100644 --- a/src/gallium/drivers/nv40/nv40_state_emit.c +++ b/src/gallium/drivers/nv40/nv40_state_emit.c @@ -123,7 +123,7 @@ nv40_state_validate(struct nv40_context *nv40) return FALSE; /* Attempt to go to hwtnl again */ - nv40->pipe.flush(&nv40->pipe, 0); + nv40->pipe.flush(&nv40->pipe, 0, NULL); nv40->dirty |= (NV40_NEW_VIEWPORT | NV40_NEW_VERTPROG | NV40_NEW_ARRAYS | @@ -147,7 +147,7 @@ nv40_state_validate_swtnl(struct nv40_context *nv40) /* Setup for swtnl */ if (nv40->render_mode == HW) { NOUVEAU_ERR("hw->swtnl 0x%08x\n", nv40->fallback_swtnl); - nv40->pipe.flush(&nv40->pipe, 0); + nv40->pipe.flush(&nv40->pipe, 0, NULL); nv40->dirty |= (NV40_NEW_VIEWPORT | NV40_NEW_VERTPROG | NV40_NEW_ARRAYS | diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c index 4fae10f74b..b66bf26afb 100644 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ b/src/gallium/drivers/nv40/nv40_vbo.c @@ -209,7 +209,7 @@ nv40_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start, BEGIN_RING(curie, NV40TCL_BEGIN_END, 1); OUT_RING (0); - pipe->flush(pipe, 0); + pipe->flush(pipe, 0, NULL); return TRUE; } @@ -384,7 +384,7 @@ nv40_draw_elements(struct pipe_context *pipe, mode, start, count); } - pipe->flush(pipe, 0); + pipe->flush(pipe, 0, NULL); return TRUE; } diff --git a/src/gallium/drivers/nv50/nv50_context.c b/src/gallium/drivers/nv50/nv50_context.c index 980d066c84..e822d86394 100644 --- a/src/gallium/drivers/nv50/nv50_context.c +++ b/src/gallium/drivers/nv50/nv50_context.c @@ -7,24 +7,12 @@ #include "nv50_screen.h" static void -nv50_flush(struct pipe_context *pipe, unsigned flags) +nv50_flush(struct pipe_context *pipe, unsigned flags, + struct pipe_fence_handle **fence) { struct nv50_context *nv50 = (struct nv50_context *)pipe; - struct nv50_screen *screen = nv50->screen; - struct nouveau_winsys *nvws = screen->nvws; - if (flags & PIPE_FLUSH_WAIT) { - nvws->notifier_reset(screen->sync, 0); - BEGIN_RING(tesla, 0x104, 1); - OUT_RING (0); - BEGIN_RING(tesla, 0x100, 1); - OUT_RING (0); - } - - FIRE_RING(); - - if (flags & PIPE_FLUSH_WAIT) - nvws->notifier_wait(screen->sync, 0, 0, 2000); + FIRE_RING(fence); } static void diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index ff4aca81a5..586373a5c4 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -171,7 +171,7 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws, so_emit(nvws, so); so_ref(NULL, &so); - nvws->push_flush(nvws, 0); + nvws->push_flush(nvws, 0, NULL); screen->pipe.winsys = ws; diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c index b096a2583d..a614ea0335 100644 --- a/src/gallium/drivers/nv50/nv50_state.c +++ b/src/gallium/drivers/nv50/nv50_state.c @@ -422,14 +422,14 @@ nv50_set_viewport_state(struct pipe_context *pipe, } static void -nv50_set_vertex_buffer(struct pipe_context *pipe, unsigned index, - const struct pipe_vertex_buffer *vb) +nv50_set_vertex_buffers(struct pipe_context *pipe, unsigned count, + const struct pipe_vertex_buffer *vb) { } static void -nv50_set_vertex_element(struct pipe_context *pipe, unsigned index, - const struct pipe_vertex_element *ve) +nv50_set_vertex_elements(struct pipe_context *pipe, unsigned count, + const struct pipe_vertex_element *ve) { } @@ -472,7 +472,7 @@ nv50_init_state_functions(struct nv50_context *nv50) nv50->pipe.set_scissor_state = nv50_set_scissor_state; nv50->pipe.set_viewport_state = nv50_set_viewport_state; - nv50->pipe.set_vertex_buffer = nv50_set_vertex_buffer; - nv50->pipe.set_vertex_element = nv50_set_vertex_element; + nv50->pipe.set_vertex_buffers = nv50_set_vertex_buffers; + nv50->pipe.set_vertex_elements = nv50_set_vertex_elements; } diff --git a/src/gallium/winsys/dri/nouveau/nouveau_context.c b/src/gallium/winsys/dri/nouveau/nouveau_context.c index 336dd65847..cf1d83b18f 100644 --- a/src/gallium/winsys/dri/nouveau/nouveau_context.c +++ b/src/gallium/winsys/dri/nouveau/nouveau_context.c @@ -282,7 +282,7 @@ nouveau_context_destroy(__DRIcontextPrivate *driContextPriv) assert(nv); - st_flush(nv->st, PIPE_FLUSH_WAIT); + st_finish(nv->st); st_destroy_context(nv->st); if (nv->pctx_id >= 0) { @@ -337,7 +337,7 @@ nouveau_context_unbind(__DRIcontextPrivate *driContextPriv) struct nouveau_context *nv = driContextPriv->driverPrivate; (void)nv; - st_flush(nv->st, 0); + st_flush(nv->st, 0, NULL); return GL_TRUE; } diff --git a/src/gallium/winsys/dri/nouveau/nouveau_winsys.c b/src/gallium/winsys/dri/nouveau/nouveau_winsys.c index bf1afce5d9..60fdbb8dfd 100644 --- a/src/gallium/winsys/dri/nouveau/nouveau_winsys.c +++ b/src/gallium/winsys/dri/nouveau/nouveau_winsys.c @@ -69,8 +69,18 @@ nouveau_pipe_push_reloc(struct nouveau_winsys *nvws, void *ptr, } static int -nouveau_pipe_push_flush(struct nouveau_winsys *nvws, unsigned size) +nouveau_pipe_push_flush(struct nouveau_winsys *nvws, unsigned size, + struct pipe_fence_handle **fence) { + if (fence) { + struct nouveau_pushbuf *pb = nvws->channel->pushbuf; + struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(pb); + struct nouveau_fence *ref = NULL; + + nouveau_fence_ref(nvpb->fence, &ref); + *fence = (struct pipe_fence_handle *)ref; + } + return nouveau_pushbuf_flush(nvws->channel, size); } diff --git a/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c b/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c index e1a9271395..453b3623f4 100644 --- a/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c +++ b/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c @@ -164,6 +164,44 @@ nouveau_pipe_bo_unmap(struct pipe_winsys *pws, struct pipe_buffer *buf) nouveau_bo_unmap(nvbuf->bo); } +static INLINE struct nouveau_fence * +nouveau_pipe_fence(struct pipe_fence_handle *pfence) +{ + return (struct nouveau_fence *)pfence; +} + +static void +nouveau_pipe_fence_reference(struct pipe_winsys *ws, + struct pipe_fence_handle **ptr, + struct pipe_fence_handle *pfence) +{ + nouveau_fence_ref((void *)pfence, (void *)ptr); +} + +static int +nouveau_pipe_fence_signalled(struct pipe_winsys *ws, + struct pipe_fence_handle *pfence, unsigned flag) +{ + struct nouveau_pipe_winsys *nvpws = (struct nouveau_pipe_winsys *)ws; + struct nouveau_fence *fence = nouveau_pipe_fence(pfence); + + if (nouveau_fence(fence)->signalled == 0) + nouveau_fence_flush(nvpws->nv->nvc->channel); + + return !nouveau_fence(fence)->signalled; +} + +static int +nouveau_pipe_fence_finish(struct pipe_winsys *ws, + struct pipe_fence_handle *pfence, unsigned flag) +{ + struct nouveau_fence *fence = nouveau_pipe_fence(pfence); + struct nouveau_fence *ref = NULL; + + nouveau_fence_ref(fence, &ref); + return nouveau_fence_wait(&ref); +} + struct pipe_winsys * nouveau_create_pipe_winsys(struct nouveau_context *nv) { @@ -189,6 +227,10 @@ nouveau_create_pipe_winsys(struct nouveau_context *nv) pws->buffer_map = nouveau_pipe_bo_map; pws->buffer_unmap = nouveau_pipe_bo_unmap; + pws->fence_reference = nouveau_pipe_fence_reference; + pws->fence_signalled = nouveau_pipe_fence_signalled; + pws->fence_finish = nouveau_pipe_fence_finish; + pws->get_name = nouveau_get_name; return &nvpws->pws; -- cgit v1.2.3 From 5d3070149267251bafc1ff982b77e7f422554f50 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Mon, 16 Jun 2008 22:02:02 +1000 Subject: nv50: use stateobjs for sampler/image_control uploads --- src/gallium/drivers/nouveau/nouveau_stateobj.h | 18 +++++++++++ src/gallium/drivers/nv50/nv50_state_validate.c | 45 +++++++++++++++----------- 2 files changed, 44 insertions(+), 19 deletions(-) (limited to 'src/gallium/drivers/nouveau/nouveau_stateobj.h') diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index d501b76b51..78b2738070 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -2,6 +2,7 @@ #define __NOUVEAU_STATEOBJ_H__ #include "pipe/p_util.h" +#include "pipe/p_debug.h" struct nouveau_stateobj_reloc { struct pipe_buffer *bo; @@ -67,6 +68,14 @@ so_data(struct nouveau_stateobj *so, unsigned data) so->cur_packet += 4; } +static INLINE void +so_datap(struct nouveau_stateobj *so, unsigned *data, unsigned size) +{ + so->cur_packet += (4 * size); + while (size--) + (*so->cur++) = (*data++); +} + static INLINE void so_method(struct nouveau_stateobj *so, struct nouveau_grobj *gr, unsigned mthd, unsigned size) @@ -91,6 +100,15 @@ so_reloc(struct nouveau_stateobj *so, struct pipe_buffer *bo, so_data(so, data); } +static INLINE void +so_dump(struct nouveau_stateobj *so) +{ + unsigned i, nr = so->cur - so->push; + + for (i = 0; i < nr; i++) + debug_printf("+0x%04x: 0x%08x\n", i, so->push[i]); +} + static INLINE void so_emit(struct nouveau_winsys *nvws, struct nouveau_stateobj *so) { diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c index 63c1756bcb..b5a9195231 100644 --- a/src/gallium/drivers/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nv50/nv50_state_validate.c @@ -181,34 +181,41 @@ nv50_state_validate(struct nv50_context *nv50) if (nv50->dirty & NV50_NEW_SAMPLER) { int i; - BEGIN_RING(tesla, 0x0f00, 1); - OUT_RING ((NV50_CB_TSC << 0) | (0 << 8)); - BEGIN_RING(tesla, 0x40000f04, nv50->sampler_nr * 8); + so = so_new(nv50->sampler_nr * 8 + 3, 0); + so_method(so, tesla, 0x0f00, 1); + so_data (so, NV50_CB_TSC); + so_method(so, tesla, 0x40000f04, nv50->sampler_nr * 8); for (i = 0; i < nv50->sampler_nr; i++) - OUT_RINGp(nv50->sampler[i], 8); + so_datap (so, nv50->sampler[i], 8); + so_emit(nvws, so); + so_ref(NULL, &so); } if (nv50->dirty & NV50_NEW_TEXTURE) { int i; - BEGIN_RING(tesla, 0x0f00, 1); - OUT_RING ((NV50_CB_TIC << 0) | (0 << 8)); - BEGIN_RING(tesla, 0x40000f04, nv50->miptree_nr * 8); - for (i = 0; i < nv50->sampler_nr; i++) { + so = so_new(nv50->miptree_nr * 8 + 3, nv50->miptree_nr * 2); + so_method(so, tesla, 0x0f00, 1); + so_data (so, NV50_CB_TIC); + so_method(so, tesla, 0x40000f04, nv50->miptree_nr * 8); + for (i = 0; i < nv50->miptree_nr; i++) { struct nv50_miptree *mt = nv50->miptree[i]; - OUT_RING (0x2a712488); - OUT_RELOCl(mt->buffer, 0, - NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW); - OUT_RING (0xd0c05000); - OUT_RING (0x00300000); - OUT_RING (mt->base.width[0]); - OUT_RING ((mt->base.depth[0] << 16) | - mt->base.height[0]); - OUT_RING (0x03000000); - OUT_RELOCh(mt->buffer, 0, - NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH); + so_data (so, 0x2a712488); + so_reloc(so, mt->buffer, 0, NOUVEAU_BO_VRAM | + NOUVEAU_BO_LOW, 0, 0); + so_data (so, 0xd0c05000); + so_data (so, 0x00300000); + so_data (so, mt->base.width[0]); + so_data (so, (mt->base.depth[0] << 16) | + mt->base.height[0]); + so_data (so, 0x03000000); + so_reloc(so, mt->buffer, 0, NOUVEAU_BO_VRAM | + NOUVEAU_BO_HIGH, 0, 0); } + + so_emit(nvws, so); + so_ref(NULL, &so); } if (nv50->dirty & NV50_NEW_ARRAYS) -- cgit v1.2.3 From 06d87b44cffef9e335b9a0e70fd2aec61fcd171b Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Tue, 8 Jul 2008 12:51:29 +1000 Subject: nv50: make use of nouveau drm 0.0.11 to get 3d going --- src/gallium/drivers/nouveau/nouveau_bo.h | 2 + src/gallium/drivers/nouveau/nouveau_stateobj.h | 3 + src/gallium/drivers/nv50/nv50_state_validate.c | 6 +- src/gallium/winsys/dri/nouveau/nouveau_bo.c | 16 +++ src/gallium/winsys/dri/nouveau/nouveau_drmif.h | 1 + src/gallium/winsys/dri/nouveau/nouveau_screen.c | 2 +- .../winsys/dri/nouveau/nouveau_winsys_pipe.c | 12 ++ src/gallium/winsys/dri/nouveau/nv50_surface.c | 158 +++++++++++---------- 8 files changed, 120 insertions(+), 80 deletions(-) (limited to 'src/gallium/drivers/nouveau/nouveau_stateobj.h') diff --git a/src/gallium/drivers/nouveau/nouveau_bo.h b/src/gallium/drivers/nouveau/nouveau_bo.h index 18020e9c65..65b138283c 100644 --- a/src/gallium/drivers/nouveau/nouveau_bo.h +++ b/src/gallium/drivers/nouveau/nouveau_bo.h @@ -35,6 +35,8 @@ #define NOUVEAU_BO_HIGH (1 << 7) #define NOUVEAU_BO_OR (1 << 8) #define NOUVEAU_BO_LOCAL (1 << 9) +#define NOUVEAU_BO_TILED (1 << 10) +#define NOUVEAU_BO_ZTILE (1 << 11) #define NOUVEAU_BO_DUMMY (1 << 31) struct nouveau_bo { diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index 78b2738070..998ec2d4ad 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -136,6 +136,9 @@ so_emit_reloc_markers(struct nouveau_winsys *nvws, struct nouveau_stateobj *so) struct nouveau_pushbuf *pb = nvws->channel->pushbuf; unsigned i; + if (!so) + return; + i = so->cur_reloc << 1; if (nvws->channel->pushbuf->remaining < i) nvws->push_flush(nvws, i, NULL); diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c index cf5a071a8d..88ef685bb1 100644 --- a/src/gallium/drivers/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nv50/nv50_state_validate.c @@ -44,7 +44,7 @@ nv50_state_validate_fb(struct nv50_context *nv50) so_data(so, 0xe6); break; } - so_data(so, 0x00000040); + so_data(so, 0x00000000); so_data(so, 0x00000000); so_method(so, tesla, 0x1224, 1); @@ -82,7 +82,7 @@ nv50_state_validate_fb(struct nv50_context *nv50) so_data(so, 0x16); break; } - so_data(so, 0x00000040); + so_data(so, 0x00000000); so_data(so, 0x00000000); so_method(so, tesla, 0x1538, 1); @@ -265,7 +265,7 @@ scissor_uptodate: so_data (so, 0x2a712488); so_reloc(so, mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW, 0, 0); - so_data (so, 0xd0c05000); + so_data (so, 0xd0005000); so_data (so, 0x00300000); so_data (so, mt->base.width[0]); so_data (so, (mt->base.depth[0] << 16) | diff --git a/src/gallium/winsys/dri/nouveau/nouveau_bo.c b/src/gallium/winsys/dri/nouveau/nouveau_bo.c index 57f5b7d1ae..b5942994d9 100644 --- a/src/gallium/winsys/dri/nouveau/nouveau_bo.c +++ b/src/gallium/winsys/dri/nouveau/nouveau_bo.c @@ -182,6 +182,13 @@ nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align, nvbo->drm.alignment = align; nvbo->refcount = 1; + if (flags & NOUVEAU_BO_TILED) { + nvbo->tiled = 1; + if (flags & NOUVEAU_BO_ZTILE) + nvbo->tiled |= 2; + flags &= ~NOUVEAU_BO_TILED; + } + ret = nouveau_bo_set_status(&nvbo->base, flags); if (ret) { free(nvbo); @@ -332,6 +339,12 @@ nouveau_bo_set_status(struct nouveau_bo *bo, uint32_t flags) else if (flags & NOUVEAU_BO_GART) new_flags |= (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI); + + if (nvbo->tiled && flags) { + new_flags |= NOUVEAU_MEM_TILE; + if (nvbo->tiled & 2) + new_flags |= NOUVEAU_MEM_TILE_ZETA; + } if (new_flags) { ret = nouveau_mem_alloc(bo->device, bo->size, @@ -347,9 +360,12 @@ nouveau_bo_set_status(struct nouveau_bo *bo, uint32_t flags) /* Copy old -> new */ /*XXX: use M2MF */ if (nvbo->sysmem || nvbo->map) { + struct nouveau_pushbuf_bo *pbo = nvbo->pending; + nvbo->pending = NULL; nouveau_bo_map(bo, NOUVEAU_BO_RD); memcpy(new_map, bo->map, bo->size); nouveau_bo_unmap(bo); + nvbo->pending = pbo; } /* Free old memory */ diff --git a/src/gallium/winsys/dri/nouveau/nouveau_drmif.h b/src/gallium/winsys/dri/nouveau/nouveau_drmif.h index 5829f649cd..dcd6a5eb0a 100644 --- a/src/gallium/winsys/dri/nouveau/nouveau_drmif.h +++ b/src/gallium/winsys/dri/nouveau/nouveau_drmif.h @@ -259,6 +259,7 @@ struct nouveau_bo_priv { uint64_t offset; uint64_t flags; + int tiled; }; #define nouveau_bo(n) ((struct nouveau_bo_priv *)(n)) diff --git a/src/gallium/winsys/dri/nouveau/nouveau_screen.c b/src/gallium/winsys/dri/nouveau/nouveau_screen.c index b15ee7509c..df1fe7e69b 100644 --- a/src/gallium/winsys/dri/nouveau/nouveau_screen.c +++ b/src/gallium/winsys/dri/nouveau/nouveau_screen.c @@ -13,7 +13,7 @@ #include "nouveau_screen.h" #include "nouveau_swapbuffers.h" -#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 10 +#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 11 #error nouveau_drm.h version does not match expected version #endif diff --git a/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c b/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c index ba5dd2eea4..765ea36f88 100644 --- a/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c +++ b/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c @@ -76,6 +76,18 @@ nouveau_pipe_bo_create(struct pipe_winsys *pws, unsigned alignment, if (usage & NOUVEAU_BUFFER_USAGE_TEXTURE) flags |= NOUVEAU_BO_GART; flags |= NOUVEAU_BO_VRAM; + + switch (dev->chipset & 0xf0) { + case 0x50: + case 0x80: + case 0x90: + flags |= NOUVEAU_BO_TILED; + if (usage & NOUVEAU_BUFFER_USAGE_ZETA) + flags |= NOUVEAU_BO_ZTILE; + break; + default: + break; + } } if (usage & PIPE_BUFFER_USAGE_VERTEX) { diff --git a/src/gallium/winsys/dri/nouveau/nv50_surface.c b/src/gallium/winsys/dri/nouveau/nv50_surface.c index cf76d76cf5..c8ab7f690f 100644 --- a/src/gallium/winsys/dri/nouveau/nv50_surface.c +++ b/src/gallium/winsys/dri/nouveau/nv50_surface.c @@ -22,52 +22,70 @@ nv50_format(enum pipe_format format) } static int -nv50_surface_copy_prep(struct nouveau_context *nv, - struct pipe_surface *dst, struct pipe_surface *src) +nv50_surface_set(struct nouveau_context *nv, struct pipe_surface *surf, int dst) { struct nouveau_channel *chan = nv->nvc->channel; struct nouveau_grobj *eng2d = nv->nvc->Nv2D; - int surf_format; - - assert(src->format == dst->format); + struct nouveau_bo *bo = nouveau_buffer(surf->buffer)->bo; + int surf_format, mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT; + int flags = NOUVEAU_BO_VRAM | (dst ? NOUVEAU_BO_WR : NOUVEAU_BO_RD); + + surf_format = nv50_format(surf->format); + if (surf_format < 0) + return 1; + + if (!nouveau_bo(bo)->tiled) { + BEGIN_RING(chan, eng2d, mthd, 2); + OUT_RING (chan, surf_format); + OUT_RING (chan, 1); + BEGIN_RING(chan, eng2d, mthd + 0x14, 5); + OUT_RING (chan, surf->stride); + OUT_RING (chan, surf->width); + OUT_RING (chan, surf->height); + OUT_RELOCh(chan, bo, surf->offset, flags); + OUT_RELOCl(chan, bo, surf->offset, flags); + } else { + BEGIN_RING(chan, eng2d, mthd, 5); + OUT_RING (chan, surf_format); + OUT_RING (chan, 0); + OUT_RING (chan, 0); + OUT_RING (chan, 1); + OUT_RING (chan, 0); + BEGIN_RING(chan, eng2d, mthd + 0x18, 4); + OUT_RING (chan, surf->width); + OUT_RING (chan, surf->height); + OUT_RELOCh(chan, bo, surf->offset, flags); + OUT_RELOCl(chan, bo, surf->offset, flags); + } + +#if 0 + if (dst) { + BEGIN_RING(chan, eng2d, NV50_2D_CLIP_X, 4); + OUT_RING (chan, 0); + OUT_RING (chan, 0); + OUT_RING (chan, surf->width); + OUT_RING (chan, surf->height); + } +#endif + + return 0; +} - surf_format = nv50_format(dst->format); - assert(surf_format >= 0); +static int +nv50_surface_copy_prep(struct nouveau_context *nv, + struct pipe_surface *dst, struct pipe_surface *src) +{ + int ret; - BEGIN_RING(chan, eng2d, NV50_2D_DMA_IN_MEMORY0, 2); - OUT_RELOCo(chan, nouveau_buffer(src->buffer)->bo, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - OUT_RELOCo(chan, nouveau_buffer(dst->buffer)->bo, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + assert(src->format == dst->format); - BEGIN_RING(chan, eng2d, NV50_2D_DST_FORMAT, 2); - OUT_RING (chan, surf_format); - OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, NV50_2D_DST_PITCH, 5); - OUT_RING (chan, dst->stride); - OUT_RING (chan, dst->width); - OUT_RING (chan, dst->height); - OUT_RELOCh(chan, nouveau_buffer(dst->buffer)->bo, dst->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - OUT_RELOCl(chan, nouveau_buffer(dst->buffer)->bo, dst->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - BEGIN_RING(chan, eng2d, NV50_2D_CLIP_X, 4); - OUT_RING (chan, 0); - OUT_RING (chan, 0); - OUT_RING (chan, dst->width); - OUT_RING (chan, dst->height); + ret = nv50_surface_set(nv, dst, 1); + if (ret) + return ret; - BEGIN_RING(chan, eng2d, NV50_2D_SRC_FORMAT, 2); - OUT_RING (chan, surf_format); - OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, NV50_2D_SRC_PITCH, 5); - OUT_RING (chan, src->stride); - OUT_RING (chan, src->width); - OUT_RING (chan, src->height); - OUT_RELOCh(chan, nouveau_buffer(src->buffer)->bo, src->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - OUT_RELOCl(chan, nouveau_buffer(src->buffer)->bo, src->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + ret = nv50_surface_set(nv, src, 0); + if (ret) + return ret; return 0; } @@ -79,17 +97,19 @@ nv50_surface_copy(struct nouveau_context *nv, unsigned dx, unsigned dy, struct nouveau_channel *chan = nv->nvc->channel; struct nouveau_grobj *eng2d = nv->nvc->Nv2D; - BEGIN_RING(chan, eng2d, 0x0110, 1); + BEGIN_RING(chan, eng2d, 0x088c, 1); OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, NV50_2D_BLIT_DST_X, 12); + BEGIN_RING(chan, eng2d, NV50_2D_BLIT_DST_X, 4); OUT_RING (chan, dx); OUT_RING (chan, dy); OUT_RING (chan, w); OUT_RING (chan, h); + BEGIN_RING(chan, eng2d, 0x08c0, 4); OUT_RING (chan, 0); OUT_RING (chan, 1); OUT_RING (chan, 0); OUT_RING (chan, 1); + BEGIN_RING(chan, eng2d, 0x08d0, 4); OUT_RING (chan, 0); OUT_RING (chan, sx); OUT_RING (chan, 0); @@ -109,35 +129,15 @@ nv50_surface_fill(struct nouveau_context *nv, struct pipe_surface *dst, { struct nouveau_channel *chan = nv->nvc->channel; struct nouveau_grobj *eng2d = nv->nvc->Nv2D; - int surf_format, rect_format; - - surf_format = nv50_format(dst->format); - if (surf_format < 0) - return 1; + int rect_format, ret; rect_format = nv50_format(dst->format); if (rect_format < 0) return 1; - BEGIN_RING(chan, eng2d, NV50_2D_DMA_IN_MEMORY1, 1); - OUT_RELOCo(chan, nouveau_buffer(dst->buffer)->bo, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - BEGIN_RING(chan, eng2d, NV50_2D_DST_FORMAT, 2); - OUT_RING (chan, surf_format); - OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, NV50_2D_DST_PITCH, 5); - OUT_RING (chan, dst->stride); - OUT_RING (chan, dst->width); - OUT_RING (chan, dst->height); - OUT_RELOCh(chan, nouveau_buffer(dst->buffer)->bo, dst->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - OUT_RELOCl(chan, nouveau_buffer(dst->buffer)->bo, dst->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - BEGIN_RING(chan, eng2d, NV50_2D_CLIP_X, 4); - OUT_RING (chan, 0); - OUT_RING (chan, 0); - OUT_RING (chan, dst->width); - OUT_RING (chan, dst->height); + ret = nv50_surface_set(nv, dst, 1); + if (ret) + return ret; BEGIN_RING(chan, eng2d, 0x0580, 3); OUT_RING (chan, 4); @@ -151,27 +151,33 @@ nv50_surface_fill(struct nouveau_context *nv, struct pipe_surface *dst, OUT_RING (chan, dy + h); FIRE_RING(chan); - return 0; } int nouveau_surface_channel_create_nv50(struct nouveau_channel_context *nvc) { + struct nouveau_channel *chan = nvc->channel; + struct nouveau_grobj *eng2d = NULL; int ret; - ret = nouveau_grobj_alloc(nvc->channel, nvc->next_handle++, NV50_2D, - &nvc->Nv2D); + ret = nouveau_grobj_alloc(chan, nvc->next_handle++, NV50_2D, &eng2d); if (ret) return ret; - BIND_RING (nvc->channel, nvc->Nv2D, nvc->next_subchannel++); - BEGIN_RING(nvc->channel, nvc->Nv2D, NV50_2D_DMA_NOTIFY, 1); - OUT_RING (nvc->channel, nvc->sync_notifier->handle); - BEGIN_RING(nvc->channel, nvc->Nv2D, NV50_2D_DMA_IN_MEMORY0, 2); - OUT_RING (nvc->channel, nvc->channel->vram->handle); - OUT_RING (nvc->channel, nvc->channel->vram->handle); - BEGIN_RING(nvc->channel, nvc->Nv2D, NV50_2D_OPERATION, 1); - OUT_RING (nvc->channel, NV50_2D_OPERATION_SRCCOPY); + nvc->Nv2D = eng2d; + + BIND_RING (chan, eng2d, nvc->next_subchannel++); + BEGIN_RING(chan, eng2d, NV50_2D_DMA_NOTIFY, 4); + OUT_RING (chan, nvc->sync_notifier->handle); + OUT_RING (chan, chan->vram->handle); + OUT_RING (chan, chan->vram->handle); + OUT_RING (chan, chan->vram->handle); + BEGIN_RING(chan, eng2d, NV50_2D_OPERATION, 1); + OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY); + BEGIN_RING(chan, eng2d, 0x0290, 1); + OUT_RING (chan, 0); + BEGIN_RING(chan, eng2d, 0x0888, 1); + OUT_RING (chan, 1); return 0; } -- cgit v1.2.3 From f302fca5eb63e4bca8af5b35c585451486143e6a Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 11 Sep 2008 06:41:18 +1000 Subject: nouveau: gallium directory structure changed again.. --- src/gallium/drivers/nouveau/nouveau_stateobj.h | 1 - src/gallium/drivers/nv04/nv04_context.c | 1 - src/gallium/drivers/nv04/nv04_context.h | 4 + src/gallium/drivers/nv04/nv04_fragprog.c | 1 - src/gallium/drivers/nv04/nv04_miptree.c | 6 +- src/gallium/drivers/nv04/nv04_prim_vbuf.c | 5 +- src/gallium/drivers/nv04/nv04_screen.c | 1 - src/gallium/drivers/nv04/nv04_state.c | 1 - src/gallium/drivers/nv04/nv04_surface.c | 3 +- src/gallium/drivers/nv04/nv04_vbo.c | 1 - src/gallium/drivers/nv10/nv10_context.c | 1 - src/gallium/drivers/nv10/nv10_context.h | 4 + src/gallium/drivers/nv10/nv10_fragprog.c | 1 - src/gallium/drivers/nv10/nv10_miptree.c | 6 +- src/gallium/drivers/nv10/nv10_prim_vbuf.c | 6 +- src/gallium/drivers/nv10/nv10_screen.c | 1 - src/gallium/drivers/nv10/nv10_state.c | 1 - src/gallium/drivers/nv10/nv10_state_emit.c | 2 - src/gallium/drivers/nv10/nv10_surface.c | 3 +- src/gallium/drivers/nv10/nv10_vbo.c | 1 - src/gallium/drivers/nv30/nv30_context.c | 1 - src/gallium/drivers/nv30/nv30_context.h | 4 + src/gallium/drivers/nv30/nv30_draw.c | 1 - src/gallium/drivers/nv30/nv30_miptree.c | 9 +- src/gallium/drivers/nv30/nv30_screen.c | 1 - src/gallium/drivers/nv30/nv30_state.c | 1 - src/gallium/drivers/nv30/nv30_surface.c | 4 +- src/gallium/drivers/nv30/nv30_vbo.c | 1 - src/gallium/drivers/nv40/nv40_context.c | 1 - src/gallium/drivers/nv40/nv40_context.h | 4 + src/gallium/drivers/nv40/nv40_draw.c | 3 +- src/gallium/drivers/nv40/nv40_miptree.c | 11 +- src/gallium/drivers/nv40/nv40_screen.c | 1 - src/gallium/drivers/nv40/nv40_state.c | 1 - src/gallium/drivers/nv40/nv40_surface.c | 4 +- src/gallium/drivers/nv40/nv40_vbo.c | 1 - src/gallium/drivers/nv50/nv50_context.c | 1 - src/gallium/drivers/nv50/nv50_context.h | 4 + src/gallium/drivers/nv50/nv50_draw.c | 1 - src/gallium/drivers/nv50/nv50_miptree.c | 12 +- src/gallium/drivers/nv50/nv50_screen.c | 1 - src/gallium/drivers/nv50/nv50_state.c | 1 - src/gallium/drivers/nv50/nv50_surface.c | 12 +- src/gallium/drivers/nv50/nv50_vbo.c | 1 - src/gallium/winsys/dri/nouveau/Makefile | 45 -- src/gallium/winsys/dri/nouveau/nouveau_bo.c | 470 --------------------- src/gallium/winsys/dri/nouveau/nouveau_channel.c | 126 ------ src/gallium/winsys/dri/nouveau/nouveau_context.c | 346 --------------- src/gallium/winsys/dri/nouveau/nouveau_context.h | 113 ----- src/gallium/winsys/dri/nouveau/nouveau_device.c | 159 ------- src/gallium/winsys/dri/nouveau/nouveau_dma.c | 219 ---------- src/gallium/winsys/dri/nouveau/nouveau_dma.h | 143 ------- src/gallium/winsys/dri/nouveau/nouveau_dri.h | 28 -- src/gallium/winsys/dri/nouveau/nouveau_drmif.h | 310 -------------- src/gallium/winsys/dri/nouveau/nouveau_fence.c | 214 ---------- src/gallium/winsys/dri/nouveau/nouveau_grobj.c | 107 ----- src/gallium/winsys/dri/nouveau/nouveau_local.h | 117 ----- src/gallium/winsys/dri/nouveau/nouveau_lock.c | 94 ----- src/gallium/winsys/dri/nouveau/nouveau_notifier.c | 137 ------ src/gallium/winsys/dri/nouveau/nouveau_pushbuf.c | 271 ------------ src/gallium/winsys/dri/nouveau/nouveau_resource.c | 116 ----- src/gallium/winsys/dri/nouveau/nouveau_screen.c | 310 -------------- src/gallium/winsys/dri/nouveau/nouveau_screen.h | 20 - .../winsys/dri/nouveau/nouveau_swapbuffers.c | 86 ---- .../winsys/dri/nouveau/nouveau_swapbuffers.h | 10 - src/gallium/winsys/dri/nouveau/nouveau_winsys.c | 158 ------- .../winsys/dri/nouveau/nouveau_winsys_pipe.c | 205 --------- .../winsys/dri/nouveau/nouveau_winsys_pipe.h | 34 -- .../winsys/dri/nouveau/nouveau_winsys_softpipe.c | 85 ---- src/gallium/winsys/dri/nouveau/nv04_surface.c | 314 -------------- src/gallium/winsys/dri/nouveau/nv50_surface.c | 194 --------- src/gallium/winsys/drm/nouveau/Makefile | 45 ++ src/gallium/winsys/drm/nouveau/nouveau_bo.c | 470 +++++++++++++++++++++ src/gallium/winsys/drm/nouveau/nouveau_channel.c | 126 ++++++ src/gallium/winsys/drm/nouveau/nouveau_context.c | 346 +++++++++++++++ src/gallium/winsys/drm/nouveau/nouveau_context.h | 113 +++++ src/gallium/winsys/drm/nouveau/nouveau_device.c | 159 +++++++ src/gallium/winsys/drm/nouveau/nouveau_dma.c | 219 ++++++++++ src/gallium/winsys/drm/nouveau/nouveau_dma.h | 143 +++++++ src/gallium/winsys/drm/nouveau/nouveau_dri.h | 28 ++ src/gallium/winsys/drm/nouveau/nouveau_drmif.h | 310 ++++++++++++++ src/gallium/winsys/drm/nouveau/nouveau_fence.c | 214 ++++++++++ src/gallium/winsys/drm/nouveau/nouveau_grobj.c | 107 +++++ src/gallium/winsys/drm/nouveau/nouveau_local.h | 117 +++++ src/gallium/winsys/drm/nouveau/nouveau_lock.c | 94 +++++ src/gallium/winsys/drm/nouveau/nouveau_notifier.c | 137 ++++++ src/gallium/winsys/drm/nouveau/nouveau_pushbuf.c | 271 ++++++++++++ src/gallium/winsys/drm/nouveau/nouveau_resource.c | 116 +++++ src/gallium/winsys/drm/nouveau/nouveau_screen.c | 310 ++++++++++++++ src/gallium/winsys/drm/nouveau/nouveau_screen.h | 20 + .../winsys/drm/nouveau/nouveau_swapbuffers.c | 86 ++++ .../winsys/drm/nouveau/nouveau_swapbuffers.h | 10 + src/gallium/winsys/drm/nouveau/nouveau_winsys.c | 158 +++++++ .../winsys/drm/nouveau/nouveau_winsys_pipe.c | 206 +++++++++ .../winsys/drm/nouveau/nouveau_winsys_pipe.h | 34 ++ .../winsys/drm/nouveau/nouveau_winsys_softpipe.c | 85 ++++ src/gallium/winsys/drm/nouveau/nv04_surface.c | 314 ++++++++++++++ src/gallium/winsys/drm/nouveau/nv50_surface.c | 194 +++++++++ 98 files changed, 4487 insertions(+), 4507 deletions(-) delete mode 100644 src/gallium/winsys/dri/nouveau/Makefile delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_bo.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_channel.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_context.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_context.h delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_device.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_dma.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_dma.h delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_dri.h delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_drmif.h delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_fence.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_grobj.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_local.h delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_lock.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_notifier.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_pushbuf.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_resource.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_screen.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_screen.h delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_swapbuffers.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_swapbuffers.h delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_winsys.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.h delete mode 100644 src/gallium/winsys/dri/nouveau/nouveau_winsys_softpipe.c delete mode 100644 src/gallium/winsys/dri/nouveau/nv04_surface.c delete mode 100644 src/gallium/winsys/dri/nouveau/nv50_surface.c create mode 100644 src/gallium/winsys/drm/nouveau/Makefile create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_bo.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_channel.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_context.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_context.h create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_device.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_dma.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_dma.h create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_dri.h create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_drmif.h create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_fence.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_grobj.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_local.h create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_lock.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_notifier.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_pushbuf.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_resource.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_screen.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_screen.h create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_swapbuffers.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_swapbuffers.h create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_winsys.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_winsys_pipe.c create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_winsys_pipe.h create mode 100644 src/gallium/winsys/drm/nouveau/nouveau_winsys_softpipe.c create mode 100644 src/gallium/winsys/drm/nouveau/nv04_surface.c create mode 100644 src/gallium/winsys/drm/nouveau/nv50_surface.c (limited to 'src/gallium/drivers/nouveau/nouveau_stateobj.h') diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index 998ec2d4ad..729988b095 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -1,7 +1,6 @@ #ifndef __NOUVEAU_STATEOBJ_H__ #define __NOUVEAU_STATEOBJ_H__ -#include "pipe/p_util.h" #include "pipe/p_debug.h" struct nouveau_stateobj_reloc { diff --git a/src/gallium/drivers/nv04/nv04_context.c b/src/gallium/drivers/nv04/nv04_context.c index 852a8edf5f..9f75253363 100644 --- a/src/gallium/drivers/nv04/nv04_context.c +++ b/src/gallium/drivers/nv04/nv04_context.c @@ -1,7 +1,6 @@ #include "draw/draw_context.h" #include "pipe/p_defines.h" #include "pipe/p_winsys.h" -#include "pipe/p_util.h" #include "nv04_context.h" #include "nv04_screen.h" diff --git a/src/gallium/drivers/nv04/nv04_context.h b/src/gallium/drivers/nv04/nv04_context.h index 5ba1d4ecdc..3e6a085270 100644 --- a/src/gallium/drivers/nv04/nv04_context.h +++ b/src/gallium/drivers/nv04/nv04_context.h @@ -4,6 +4,10 @@ #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "pipe/p_state.h" +#include "pipe/p_compiler.h" + +#include "util/u_memory.h" +#include "util/u_math.h" #include "draw/draw_vertex.h" diff --git a/src/gallium/drivers/nv04/nv04_fragprog.c b/src/gallium/drivers/nv04/nv04_fragprog.c index 215974eec0..8a2af41fe0 100644 --- a/src/gallium/drivers/nv04/nv04_fragprog.c +++ b/src/gallium/drivers/nv04/nv04_fragprog.c @@ -1,7 +1,6 @@ #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "pipe/p_state.h" -#include "pipe/p_util.h" #include "pipe/p_shader_tokens.h" #include "tgsi/tgsi_parse.h" diff --git a/src/gallium/drivers/nv04/nv04_miptree.c b/src/gallium/drivers/nv04/nv04_miptree.c index 97f679731e..02f7d210e3 100644 --- a/src/gallium/drivers/nv04/nv04_miptree.c +++ b/src/gallium/drivers/nv04/nv04_miptree.c @@ -1,6 +1,5 @@ #include "pipe/p_state.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_inlines.h" #include "nv04_context.h" @@ -72,7 +71,6 @@ nv04_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) static void nv04_miptree_release(struct pipe_screen *screen, struct pipe_texture **pt) { - struct pipe_winsys *ws = screen->winsys; struct pipe_texture *mt = *pt; *pt = NULL; @@ -80,7 +78,7 @@ nv04_miptree_release(struct pipe_screen *screen, struct pipe_texture **pt) struct nv04_miptree *nv04mt = (struct nv04_miptree *)mt; int l; - pipe_buffer_reference(ws, &nv04mt->buffer, NULL); + pipe_buffer_reference(screen, &nv04mt->buffer, NULL); for (l = 0; l <= mt->last_level; l++) { if (nv04mt->level[l].image_offset) FREE(nv04mt->level[l].image_offset); @@ -101,7 +99,7 @@ nv04_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ps = ws->surface_alloc(ws); if (!ps) return NULL; - pipe_buffer_reference(ws, &ps->buffer, nv04mt->buffer); + pipe_buffer_reference(pscreen, &ps->buffer, nv04mt->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; diff --git a/src/gallium/drivers/nv04/nv04_prim_vbuf.c b/src/gallium/drivers/nv04/nv04_prim_vbuf.c index d3963d1f59..19979fff79 100644 --- a/src/gallium/drivers/nv04/nv04_prim_vbuf.c +++ b/src/gallium/drivers/nv04/nv04_prim_vbuf.c @@ -1,9 +1,10 @@ -#include "draw/draw_vbuf.h" #include "pipe/p_debug.h" -#include "pipe/p_util.h" #include "pipe/p_inlines.h" #include "pipe/p_winsys.h" +#include "pipe/p_compiler.h" + +#include "draw/draw_vbuf.h" #include "nv04_context.h" #include "nv04_state.h" diff --git a/src/gallium/drivers/nv04/nv04_screen.c b/src/gallium/drivers/nv04/nv04_screen.c index da09a3a5fe..3966a29ffa 100644 --- a/src/gallium/drivers/nv04/nv04_screen.c +++ b/src/gallium/drivers/nv04/nv04_screen.c @@ -1,5 +1,4 @@ #include "pipe/p_screen.h" -#include "pipe/p_util.h" #include "nv04_context.h" #include "nv04_screen.h" diff --git a/src/gallium/drivers/nv04/nv04_state.c b/src/gallium/drivers/nv04/nv04_state.c index 668d875671..ff1933b550 100644 --- a/src/gallium/drivers/nv04/nv04_state.c +++ b/src/gallium/drivers/nv04/nv04_state.c @@ -1,7 +1,6 @@ #include "draw/draw_context.h" #include "pipe/p_state.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_shader_tokens.h" #include "tgsi/tgsi_parse.h" diff --git a/src/gallium/drivers/nv04/nv04_surface.c b/src/gallium/drivers/nv04/nv04_surface.c index b13ebf9f9b..57039483c6 100644 --- a/src/gallium/drivers/nv04/nv04_surface.c +++ b/src/gallium/drivers/nv04/nv04_surface.c @@ -28,10 +28,9 @@ #include "nv04_context.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_winsys.h" #include "pipe/p_inlines.h" -#include "util/p_tile.h" +#include "util/u_tile.h" static void nv04_surface_copy(struct pipe_context *pipe, unsigned do_flip, diff --git a/src/gallium/drivers/nv04/nv04_vbo.c b/src/gallium/drivers/nv04/nv04_vbo.c index fbfe0cf406..91f919d48e 100644 --- a/src/gallium/drivers/nv04/nv04_vbo.c +++ b/src/gallium/drivers/nv04/nv04_vbo.c @@ -1,7 +1,6 @@ #include "draw/draw_context.h" #include "pipe/p_context.h" #include "pipe/p_state.h" -#include "pipe/p_util.h" #include "nv04_context.h" #include "nv04_state.h" diff --git a/src/gallium/drivers/nv10/nv10_context.c b/src/gallium/drivers/nv10/nv10_context.c index 9fcd0b0fc3..e9b61daae7 100644 --- a/src/gallium/drivers/nv10/nv10_context.c +++ b/src/gallium/drivers/nv10/nv10_context.c @@ -1,7 +1,6 @@ #include "draw/draw_context.h" #include "pipe/p_defines.h" #include "pipe/p_winsys.h" -#include "pipe/p_util.h" #include "nv10_context.h" #include "nv10_screen.h" diff --git a/src/gallium/drivers/nv10/nv10_context.h b/src/gallium/drivers/nv10/nv10_context.h index 2bdba53db8..f3b56de25a 100644 --- a/src/gallium/drivers/nv10/nv10_context.h +++ b/src/gallium/drivers/nv10/nv10_context.h @@ -4,6 +4,10 @@ #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "pipe/p_state.h" +#include "pipe/p_compiler.h" + +#include "util/u_memory.h" +#include "util/u_math.h" #include "draw/draw_vertex.h" diff --git a/src/gallium/drivers/nv10/nv10_fragprog.c b/src/gallium/drivers/nv10/nv10_fragprog.c index 137de9d53e..698db5a16a 100644 --- a/src/gallium/drivers/nv10/nv10_fragprog.c +++ b/src/gallium/drivers/nv10/nv10_fragprog.c @@ -1,7 +1,6 @@ #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "pipe/p_state.h" -#include "pipe/p_util.h" #include "pipe/p_shader_tokens.h" #include "tgsi/tgsi_parse.h" diff --git a/src/gallium/drivers/nv10/nv10_miptree.c b/src/gallium/drivers/nv10/nv10_miptree.c index 9a68df2925..ad084e72b8 100644 --- a/src/gallium/drivers/nv10/nv10_miptree.c +++ b/src/gallium/drivers/nv10/nv10_miptree.c @@ -1,6 +1,5 @@ #include "pipe/p_state.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_inlines.h" #include "nv10_context.h" @@ -79,7 +78,6 @@ nv10_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) static void nv10_miptree_release(struct pipe_screen *screen, struct pipe_texture **pt) { - struct pipe_winsys *ws = screen->winsys; struct pipe_texture *mt = *pt; *pt = NULL; @@ -87,7 +85,7 @@ nv10_miptree_release(struct pipe_screen *screen, struct pipe_texture **pt) struct nv10_miptree *nv10mt = (struct nv10_miptree *)mt; int l; - pipe_buffer_reference(ws, &nv10mt->buffer, NULL); + pipe_buffer_reference(screen, &nv10mt->buffer, NULL); for (l = 0; l <= mt->last_level; l++) { if (nv10mt->level[l].image_offset) FREE(nv10mt->level[l].image_offset); @@ -115,7 +113,7 @@ nv10_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt, ps = ws->surface_alloc(ws); if (!ps) return NULL; - pipe_buffer_reference(ws, &ps->buffer, nv10mt->buffer); + pipe_buffer_reference(screen, &ps->buffer, nv10mt->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; diff --git a/src/gallium/drivers/nv10/nv10_prim_vbuf.c b/src/gallium/drivers/nv10/nv10_prim_vbuf.c index 930536b946..62a8f6d89d 100644 --- a/src/gallium/drivers/nv10/nv10_prim_vbuf.c +++ b/src/gallium/drivers/nv10/nv10_prim_vbuf.c @@ -38,15 +38,14 @@ */ -#include "draw/draw_vbuf.h" #include "pipe/p_debug.h" -#include "pipe/p_util.h" #include "pipe/p_inlines.h" #include "pipe/p_winsys.h" #include "nv10_context.h" #include "nv10_state.h" +#include "draw/draw_vbuf.h" /** * Primitive renderer for nv10. @@ -180,10 +179,11 @@ nv10_vbuf_render_release_vertices( struct vbuf_render *render, struct nv10_vbuf_render *nv10_render = nv10_vbuf_render(render); struct nv10_context *nv10 = nv10_render->nv10; struct pipe_winsys *winsys = nv10->pipe.winsys; + struct pipe_screen *pscreen = &nv10->screen->pipe; assert(nv10_render->buffer); winsys->buffer_unmap(winsys, nv10_render->buffer); - pipe_buffer_reference(winsys, &nv10_render->buffer, NULL); + pipe_buffer_reference(pscreen, &nv10_render->buffer, NULL); } diff --git a/src/gallium/drivers/nv10/nv10_screen.c b/src/gallium/drivers/nv10/nv10_screen.c index 403f7b98cd..27a9edf9bb 100644 --- a/src/gallium/drivers/nv10/nv10_screen.c +++ b/src/gallium/drivers/nv10/nv10_screen.c @@ -1,5 +1,4 @@ #include "pipe/p_screen.h" -#include "pipe/p_util.h" #include "nv10_context.h" #include "nv10_screen.h" diff --git a/src/gallium/drivers/nv10/nv10_state.c b/src/gallium/drivers/nv10/nv10_state.c index f902fd54b6..d2375aa2f6 100644 --- a/src/gallium/drivers/nv10/nv10_state.c +++ b/src/gallium/drivers/nv10/nv10_state.c @@ -1,7 +1,6 @@ #include "draw/draw_context.h" #include "pipe/p_state.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_shader_tokens.h" #include "tgsi/tgsi_parse.h" diff --git a/src/gallium/drivers/nv10/nv10_state_emit.c b/src/gallium/drivers/nv10/nv10_state_emit.c index d21368d33f..46c7e1d753 100644 --- a/src/gallium/drivers/nv10/nv10_state_emit.c +++ b/src/gallium/drivers/nv10/nv10_state_emit.c @@ -1,5 +1,3 @@ -#include "pipe/p_util.h" - #include "nv10_context.h" #include "nv10_state.h" diff --git a/src/gallium/drivers/nv10/nv10_surface.c b/src/gallium/drivers/nv10/nv10_surface.c index 2e230ebbec..875e4c5858 100644 --- a/src/gallium/drivers/nv10/nv10_surface.c +++ b/src/gallium/drivers/nv10/nv10_surface.c @@ -28,10 +28,9 @@ #include "nv10_context.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_winsys.h" #include "pipe/p_inlines.h" -#include "util/p_tile.h" +#include "util/u_tile.h" static void nv10_surface_copy(struct pipe_context *pipe, unsigned do_flip, diff --git a/src/gallium/drivers/nv10/nv10_vbo.c b/src/gallium/drivers/nv10/nv10_vbo.c index f024f53420..d0e788ac03 100644 --- a/src/gallium/drivers/nv10/nv10_vbo.c +++ b/src/gallium/drivers/nv10/nv10_vbo.c @@ -1,7 +1,6 @@ #include "draw/draw_context.h" #include "pipe/p_context.h" #include "pipe/p_state.h" -#include "pipe/p_util.h" #include "nv10_context.h" #include "nv10_state.h" diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c index eefc614e5b..2bff28aca9 100644 --- a/src/gallium/drivers/nv30/nv30_context.c +++ b/src/gallium/drivers/nv30/nv30_context.c @@ -1,7 +1,6 @@ #include "draw/draw_context.h" #include "pipe/p_defines.h" #include "pipe/p_winsys.h" -#include "pipe/p_util.h" #include "nv30_context.h" #include "nv30_screen.h" diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h index 823b34a7c3..b933769700 100644 --- a/src/gallium/drivers/nv30/nv30_context.h +++ b/src/gallium/drivers/nv30/nv30_context.h @@ -4,6 +4,10 @@ #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "pipe/p_state.h" +#include "pipe/p_compiler.h" + +#include "util/u_memory.h" +#include "util/u_math.h" #include "draw/draw_vertex.h" diff --git a/src/gallium/drivers/nv30/nv30_draw.c b/src/gallium/drivers/nv30/nv30_draw.c index aeeaf58f20..74fc138c05 100644 --- a/src/gallium/drivers/nv30/nv30_draw.c +++ b/src/gallium/drivers/nv30/nv30_draw.c @@ -1,5 +1,4 @@ #include "draw/draw_pipe.h" -#include "pipe/p_util.h" #include "nv30_context.h" diff --git a/src/gallium/drivers/nv30/nv30_miptree.c b/src/gallium/drivers/nv30/nv30_miptree.c index a0e488c09b..5c4f4da948 100644 --- a/src/gallium/drivers/nv30/nv30_miptree.c +++ b/src/gallium/drivers/nv30/nv30_miptree.c @@ -1,6 +1,5 @@ #include "pipe/p_state.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_inlines.h" #include "nv30_context.h" @@ -33,7 +32,7 @@ nv30_miptree_layout(struct nv30_miptree *nv30mt) if (swizzled) pitch = pt->nblocksx[l]; - pitch = align_int(pitch, 64); + pitch = align(pitch, 64); nv30mt->level[l].pitch = pitch * pt->block.size; nv30mt->level[l].image_offset = @@ -84,7 +83,6 @@ nv30_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) static void nv30_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **pt) { - struct pipe_winsys *ws = pscreen->winsys; struct pipe_texture *mt = *pt; *pt = NULL; @@ -92,7 +90,7 @@ nv30_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **pt) struct nv30_miptree *nv30mt = (struct nv30_miptree *)mt; int l; - pipe_buffer_reference(ws, &nv30mt->buffer, NULL); + pipe_buffer_reference(pscreen, &nv30mt->buffer, NULL); for (l = 0; l <= mt->last_level; l++) { if (nv30mt->level[l].image_offset) FREE(nv30mt->level[l].image_offset); @@ -106,7 +104,6 @@ nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, unsigned face, unsigned level, unsigned zslice, unsigned flags) { - struct pipe_winsys *ws = pscreen->winsys; struct nv30_miptree *nv30mt = (struct nv30_miptree *)pt; struct pipe_surface *ps; @@ -114,7 +111,7 @@ nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!ps) return NULL; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(ws, &ps->buffer, nv30mt->buffer); + pipe_buffer_reference(pscreen, &ps->buffer, nv30mt->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c index d5514c2aba..a595e2eb22 100644 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ b/src/gallium/drivers/nv30/nv30_screen.c @@ -1,5 +1,4 @@ #include "pipe/p_screen.h" -#include "pipe/p_util.h" #include "nv30_context.h" #include "nv30_screen.h" diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c index eceb535315..fc66075c83 100644 --- a/src/gallium/drivers/nv30/nv30_state.c +++ b/src/gallium/drivers/nv30/nv30_state.c @@ -1,6 +1,5 @@ #include "pipe/p_state.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_inlines.h" #include "tgsi/tgsi_parse.h" diff --git a/src/gallium/drivers/nv30/nv30_surface.c b/src/gallium/drivers/nv30/nv30_surface.c index b22211ac86..36f4887750 100644 --- a/src/gallium/drivers/nv30/nv30_surface.c +++ b/src/gallium/drivers/nv30/nv30_surface.c @@ -28,10 +28,10 @@ #include "nv30_context.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_winsys.h" #include "pipe/p_inlines.h" -#include "util/p_tile.h" + +#include "util/u_tile.h" static void nv30_surface_copy(struct pipe_context *pipe, unsigned do_flip, diff --git a/src/gallium/drivers/nv30/nv30_vbo.c b/src/gallium/drivers/nv30/nv30_vbo.c index b1c73793bf..556f981d4a 100644 --- a/src/gallium/drivers/nv30/nv30_vbo.c +++ b/src/gallium/drivers/nv30/nv30_vbo.c @@ -1,6 +1,5 @@ #include "pipe/p_context.h" #include "pipe/p_state.h" -#include "pipe/p_util.h" #include "nv30_context.h" #include "nv30_state.h" diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c index a40f14895f..cc63dd734b 100644 --- a/src/gallium/drivers/nv40/nv40_context.c +++ b/src/gallium/drivers/nv40/nv40_context.c @@ -1,7 +1,6 @@ #include "draw/draw_context.h" #include "pipe/p_defines.h" #include "pipe/p_winsys.h" -#include "pipe/p_util.h" #include "nv40_context.h" #include "nv40_screen.h" diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h index 8e60a81e68..adcfbdd85a 100644 --- a/src/gallium/drivers/nv40/nv40_context.h +++ b/src/gallium/drivers/nv40/nv40_context.h @@ -4,6 +4,10 @@ #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "pipe/p_state.h" +#include "pipe/p_compiler.h" + +#include "util/u_memory.h" +#include "util/u_math.h" #include "draw/draw_vertex.h" diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c index 2cf58e2950..8e56cdc2fe 100644 --- a/src/gallium/drivers/nv40/nv40_draw.c +++ b/src/gallium/drivers/nv40/nv40_draw.c @@ -1,6 +1,7 @@ -#include "pipe/p_util.h" #include "pipe/p_shader_tokens.h" +#include "util/u_pack_color.h" + #include "draw/draw_context.h" #include "draw/draw_vertex.h" #include "draw/draw_pipe.h" diff --git a/src/gallium/drivers/nv40/nv40_miptree.c b/src/gallium/drivers/nv40/nv40_miptree.c index 38e1a5f04c..6c54c37ef7 100644 --- a/src/gallium/drivers/nv40/nv40_miptree.c +++ b/src/gallium/drivers/nv40/nv40_miptree.c @@ -1,6 +1,5 @@ #include "pipe/p_state.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_inlines.h" #include "nv40_context.h" @@ -33,7 +32,7 @@ nv40_miptree_layout(struct nv40_miptree *nv40mt) if (swizzled) pitch = pt->nblocksx[l]; - pitch = align_int(pitch, 64); + pitch = align(pitch, 64); nv40mt->level[l].pitch = pitch * pt->block.size; nv40mt->level[l].image_offset = @@ -84,7 +83,6 @@ nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) static void nv40_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **pt) { - struct pipe_winsys *ws = pscreen->winsys; struct pipe_texture *mt = *pt; *pt = NULL; @@ -92,7 +90,7 @@ nv40_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **pt) struct nv40_miptree *nv40mt = (struct nv40_miptree *)mt; int l; - pipe_buffer_reference(ws, &nv40mt->buffer, NULL); + pipe_buffer_reference(pscreen, &nv40mt->buffer, NULL); for (l = 0; l <= mt->last_level; l++) { if (nv40mt->level[l].image_offset) FREE(nv40mt->level[l].image_offset); @@ -106,7 +104,6 @@ nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, unsigned face, unsigned level, unsigned zslice, unsigned flags) { - struct pipe_winsys *ws = pscreen->winsys; struct nv40_miptree *nv40mt = (struct nv40_miptree *)pt; struct pipe_surface *ps; @@ -114,7 +111,7 @@ nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!ps) return NULL; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(ws, &ps->buffer, nv40mt->buffer); + pipe_buffer_reference(pscreen, &ps->buffer, nv40mt->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; @@ -148,7 +145,7 @@ nv40_miptree_surface_del(struct pipe_screen *pscreen, return; pipe_texture_reference(&ps->texture, NULL); - pipe_buffer_reference(pscreen->winsys, &ps->buffer, NULL); + pipe_buffer_reference(pscreen, &ps->buffer, NULL); FREE(ps); } diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c index 0e1df89ee8..ada0238511 100644 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ b/src/gallium/drivers/nv40/nv40_screen.c @@ -1,5 +1,4 @@ #include "pipe/p_screen.h" -#include "pipe/p_util.h" #include "nv40_context.h" #include "nv40_screen.h" diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c index 63d0ecc915..255c4b294d 100644 --- a/src/gallium/drivers/nv40/nv40_state.c +++ b/src/gallium/drivers/nv40/nv40_state.c @@ -1,6 +1,5 @@ #include "pipe/p_state.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_inlines.h" #include "draw/draw_context.h" diff --git a/src/gallium/drivers/nv40/nv40_surface.c b/src/gallium/drivers/nv40/nv40_surface.c index 0916555d56..576af7c59e 100644 --- a/src/gallium/drivers/nv40/nv40_surface.c +++ b/src/gallium/drivers/nv40/nv40_surface.c @@ -28,10 +28,10 @@ #include "nv40_context.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_winsys.h" #include "pipe/p_inlines.h" -#include "util/p_tile.h" + +#include "util/u_tile.h" static void nv40_surface_copy(struct pipe_context *pipe, boolean do_flip, diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c index 755d5586b7..09f6e79d32 100644 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ b/src/gallium/drivers/nv40/nv40_vbo.c @@ -1,6 +1,5 @@ #include "pipe/p_context.h" #include "pipe/p_state.h" -#include "pipe/p_util.h" #include "nv40_context.h" #include "nv40_state.h" diff --git a/src/gallium/drivers/nv50/nv50_context.c b/src/gallium/drivers/nv50/nv50_context.c index 07987c7d02..b02c53f209 100644 --- a/src/gallium/drivers/nv50/nv50_context.c +++ b/src/gallium/drivers/nv50/nv50_context.c @@ -23,7 +23,6 @@ #include "draw/draw_context.h" #include "pipe/p_defines.h" #include "pipe/p_winsys.h" -#include "pipe/p_util.h" #include "nv50_context.h" #include "nv50_screen.h" diff --git a/src/gallium/drivers/nv50/nv50_context.h b/src/gallium/drivers/nv50/nv50_context.h index 1c069f1625..5d377f2d06 100644 --- a/src/gallium/drivers/nv50/nv50_context.h +++ b/src/gallium/drivers/nv50/nv50_context.h @@ -4,6 +4,10 @@ #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "pipe/p_state.h" +#include "pipe/p_compiler.h" + +#include "util/u_memory.h" +#include "util/u_math.h" #include "draw/draw_vertex.h" diff --git a/src/gallium/drivers/nv50/nv50_draw.c b/src/gallium/drivers/nv50/nv50_draw.c index 4fd81bd27a..2f6f607261 100644 --- a/src/gallium/drivers/nv50/nv50_draw.c +++ b/src/gallium/drivers/nv50/nv50_draw.c @@ -21,7 +21,6 @@ */ #include "draw/draw_pipe.h" -#include "pipe/p_util.h" #include "nv50_context.h" diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c index a02ad41885..b0e8fe2f0b 100644 --- a/src/gallium/drivers/nv50/nv50_miptree.c +++ b/src/gallium/drivers/nv50/nv50_miptree.c @@ -22,7 +22,6 @@ #include "pipe/p_state.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_inlines.h" #include "nv50_context.h" @@ -62,7 +61,6 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) static void nv50_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **ppt) { - struct pipe_winsys *ws = pscreen->winsys; struct pipe_texture *pt = *ppt; *ppt = NULL; @@ -70,7 +68,7 @@ nv50_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **ppt) if (--pt->refcount <= 0) { struct nv50_miptree *mt = nv50_miptree(pt); - pipe_buffer_reference(ws, &mt->buffer, NULL); + pipe_buffer_reference(pscreen, &mt->buffer, NULL); FREE(mt); } } @@ -80,7 +78,6 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, unsigned face, unsigned level, unsigned zslice, unsigned flags) { - struct pipe_winsys *ws = pscreen->winsys; struct nv50_miptree *mt = nv50_miptree(pt); struct nv50_surface *s; struct pipe_surface *ps; @@ -91,7 +88,7 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ps = &s->base; ps->refcount = 1; - ps->winsys = ws; + ps->winsys = pscreen->winsys; ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; @@ -104,7 +101,7 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ps->status = PIPE_SURFACE_STATUS_DEFINED; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(ws, &ps->buffer, mt->buffer); + pipe_buffer_reference(pscreen, &ps->buffer, mt->buffer); return ps; } @@ -113,7 +110,6 @@ static void nv50_miptree_surface_del(struct pipe_screen *pscreen, struct pipe_surface **psurface) { - struct pipe_winsys *ws = pscreen->winsys; struct pipe_surface *ps = *psurface; struct nv50_surface *s = nv50_surface(ps); @@ -121,7 +117,7 @@ nv50_miptree_surface_del(struct pipe_screen *pscreen, if (--ps->refcount <= 0) { pipe_texture_reference(&ps->texture, NULL); - pipe_buffer_reference(ws, &ps->buffer, NULL); + pipe_buffer_reference(pscreen, &ps->buffer, NULL); FREE(s); } } diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index ec43923929..b5aef7dadd 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -21,7 +21,6 @@ */ #include "pipe/p_screen.h" -#include "pipe/p_util.h" #include "nv50_context.h" #include "nv50_screen.h" diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c index 4055527d9f..95f9d408b5 100644 --- a/src/gallium/drivers/nv50/nv50_state.c +++ b/src/gallium/drivers/nv50/nv50_state.c @@ -22,7 +22,6 @@ #include "pipe/p_state.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_inlines.h" #include "tgsi/tgsi_parse.h" diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c index a9daeee369..5bf97d3a6b 100644 --- a/src/gallium/drivers/nv50/nv50_surface.c +++ b/src/gallium/drivers/nv50/nv50_surface.c @@ -22,10 +22,10 @@ #include "nv50_context.h" #include "pipe/p_defines.h" -#include "pipe/p_util.h" #include "pipe/p_winsys.h" #include "pipe/p_inlines.h" -#include "util/p_tile.h" + +#include "util/u_tile.h" static void nv50_surface_copy(struct pipe_context *pipe, boolean flip, @@ -90,10 +90,10 @@ nv50_surface_map(struct pipe_screen *screen, struct pipe_surface *ps, } static void -nv50_surface_unmap(struct pipe_screen *screen, struct pipe_surface *ps) +nv50_surface_unmap(struct pipe_screen *pscreen, struct pipe_surface *ps) { - struct nouveau_winsys *nvws = nv50_screen(screen)->nvws; - struct pipe_winsys *ws = screen->winsys; + struct nouveau_winsys *nvws = nv50_screen(pscreen)->nvws; + struct pipe_winsys *ws = pscreen->winsys; struct nv50_surface *s = nv50_surface(ps); struct nv50_surface m = *s; @@ -104,7 +104,7 @@ nv50_surface_unmap(struct pipe_screen *screen, struct pipe_surface *ps) nvws->surface_copy(nvws, &s->base, 0, 0, &m.base, 0, 0, ps->width, ps->height); - pipe_buffer_reference(ws, &s->untiled, NULL); + pipe_buffer_reference(pscreen, &s->untiled, NULL); } void diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c index c94531723b..584336682e 100644 --- a/src/gallium/drivers/nv50/nv50_vbo.c +++ b/src/gallium/drivers/nv50/nv50_vbo.c @@ -22,7 +22,6 @@ #include "pipe/p_context.h" #include "pipe/p_state.h" -#include "pipe/p_util.h" #include "nv50_context.h" diff --git a/src/gallium/winsys/dri/nouveau/Makefile b/src/gallium/winsys/dri/nouveau/Makefile deleted file mode 100644 index be630ff6d1..0000000000 --- a/src/gallium/winsys/dri/nouveau/Makefile +++ /dev/null @@ -1,45 +0,0 @@ - -TOP = ../../../../.. -include $(TOP)/configs/current - -LIBNAME = nouveau_dri.so - -MINIGLX_SOURCES = - -PIPE_DRIVERS = \ - $(TOP)/src/gallium/drivers/softpipe/libsoftpipe.a \ - $(TOP)/src/gallium/drivers/nv04/libnv04.a \ - $(TOP)/src/gallium/drivers/nv10/libnv10.a \ - $(TOP)/src/gallium/drivers/nv30/libnv30.a \ - $(TOP)/src/gallium/drivers/nv40/libnv40.a \ - $(TOP)/src/gallium/drivers/nv50/libnv50.a - -DRIVER_SOURCES = \ - nouveau_bo.c \ - nouveau_channel.c \ - nouveau_context.c \ - nouveau_device.c \ - nouveau_dma.c \ - nouveau_fence.c \ - nouveau_grobj.c \ - nouveau_lock.c \ - nouveau_notifier.c \ - nouveau_pushbuf.c \ - nouveau_resource.c \ - nouveau_screen.c \ - nouveau_swapbuffers.c \ - nouveau_winsys.c \ - nouveau_winsys_pipe.c \ - nouveau_winsys_softpipe.c \ - nv04_surface.c \ - nv50_surface.c - -C_SOURCES = \ - $(COMMON_GALLIUM_SOURCES) \ - $(DRIVER_SOURCES) - -ASM_SOURCES = - -include ../Makefile.template - -symlinks: diff --git a/src/gallium/winsys/dri/nouveau/nouveau_bo.c b/src/gallium/winsys/dri/nouveau/nouveau_bo.c deleted file mode 100644 index b5942994d9..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_bo.c +++ /dev/null @@ -1,470 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_dma.h" -#include "nouveau_local.h" - -static void -nouveau_mem_free(struct nouveau_device *dev, struct drm_nouveau_mem_alloc *ma, - void **map) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - struct drm_nouveau_mem_free mf; - - if (map && *map) { - drmUnmap(*map, ma->size); - *map = NULL; - } - - if (ma->size) { - mf.offset = ma->offset; - mf.flags = ma->flags; - drmCommandWrite(nvdev->fd, DRM_NOUVEAU_MEM_FREE, - &mf, sizeof(mf)); - ma->size = 0; - } -} - -static int -nouveau_mem_alloc(struct nouveau_device *dev, unsigned size, unsigned align, - uint32_t flags, struct drm_nouveau_mem_alloc *ma, void **map) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - int ret; - - ma->alignment = align; - ma->size = size; - ma->flags = flags; - if (map) - ma->flags |= NOUVEAU_MEM_MAPPED; - ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_MEM_ALLOC, ma, - sizeof(struct drm_nouveau_mem_alloc)); - if (ret) - return ret; - - if (map) { - ret = drmMap(nvdev->fd, ma->map_handle, ma->size, map); - if (ret) { - *map = NULL; - nouveau_mem_free(dev, ma, map); - return ret; - } - } - - return 0; -} - -static void -nouveau_bo_tmp_del(void *priv) -{ - struct nouveau_resource *r = priv; - - nouveau_fence_ref(NULL, (struct nouveau_fence **)&r->priv); - nouveau_resource_free(&r); -} - -static unsigned -nouveau_bo_tmp_max(struct nouveau_device_priv *nvdev) -{ - struct nouveau_resource *r = nvdev->sa_heap; - unsigned max = 0; - - while (r) { - if (r->in_use && !nouveau_fence(r->priv)->emitted) { - r = r->next; - continue; - } - - if (max < r->size) - max = r->size; - r = r->next; - } - - return max; -} - -static struct nouveau_resource * -nouveau_bo_tmp(struct nouveau_channel *chan, unsigned size, - struct nouveau_fence *fence) -{ - struct nouveau_device_priv *nvdev = nouveau_device(chan->device); - struct nouveau_resource *r = NULL; - struct nouveau_fence *ref = NULL; - - if (fence) - nouveau_fence_ref(fence, &ref); - else - nouveau_fence_new(chan, &ref); - assert(ref); - - while (nouveau_resource_alloc(nvdev->sa_heap, size, ref, &r)) { - if (nouveau_bo_tmp_max(nvdev) < size) { - nouveau_fence_ref(NULL, &ref); - return NULL; - } - - nouveau_fence_flush(chan); - } - nouveau_fence_signal_cb(ref, nouveau_bo_tmp_del, r); - - return r; -} - -int -nouveau_bo_init(struct nouveau_device *dev) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - int ret; - - ret = nouveau_mem_alloc(dev, 128*1024, 0, NOUVEAU_MEM_AGP | - NOUVEAU_MEM_PCI, &nvdev->sa, &nvdev->sa_map); - if (ret) - return ret; - - ret = nouveau_resource_init(&nvdev->sa_heap, 0, nvdev->sa.size); - if (ret) { - nouveau_mem_free(dev, &nvdev->sa, &nvdev->sa_map); - return ret; - } - - return 0; -} - -void -nouveau_bo_takedown(struct nouveau_device *dev) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - - nouveau_mem_free(dev, &nvdev->sa, &nvdev->sa_map); -} - -int -nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align, - int size, struct nouveau_bo **bo) -{ - struct nouveau_bo_priv *nvbo; - int ret; - - if (!dev || !bo || *bo) - return -EINVAL; - - nvbo = calloc(1, sizeof(struct nouveau_bo_priv)); - if (!nvbo) - return -ENOMEM; - nvbo->base.device = dev; - nvbo->base.size = size; - nvbo->base.handle = bo_to_ptr(nvbo); - nvbo->drm.alignment = align; - nvbo->refcount = 1; - - if (flags & NOUVEAU_BO_TILED) { - nvbo->tiled = 1; - if (flags & NOUVEAU_BO_ZTILE) - nvbo->tiled |= 2; - flags &= ~NOUVEAU_BO_TILED; - } - - ret = nouveau_bo_set_status(&nvbo->base, flags); - if (ret) { - free(nvbo); - return ret; - } - - *bo = &nvbo->base; - return 0; -} - -int -nouveau_bo_user(struct nouveau_device *dev, void *ptr, int size, - struct nouveau_bo **bo) -{ - struct nouveau_bo_priv *nvbo; - - if (!dev || !bo || *bo) - return -EINVAL; - - nvbo = calloc(1, sizeof(*nvbo)); - if (!nvbo) - return -ENOMEM; - nvbo->base.device = dev; - - nvbo->sysmem = ptr; - nvbo->user = 1; - - nvbo->base.size = size; - nvbo->base.offset = nvbo->drm.offset; - nvbo->base.handle = bo_to_ptr(nvbo); - nvbo->refcount = 1; - *bo = &nvbo->base; - return 0; -} - -int -nouveau_bo_ref(struct nouveau_device *dev, uint64_t handle, - struct nouveau_bo **bo) -{ - struct nouveau_bo_priv *nvbo = ptr_to_bo(handle); - - if (!dev || !bo || *bo) - return -EINVAL; - - nvbo->refcount++; - *bo = &nvbo->base; - return 0; -} - -static void -nouveau_bo_del_cb(void *priv) -{ - struct nouveau_bo_priv *nvbo = priv; - - nouveau_fence_ref(NULL, &nvbo->fence); - nouveau_mem_free(nvbo->base.device, &nvbo->drm, &nvbo->map); - if (nvbo->sysmem && !nvbo->user) - free(nvbo->sysmem); - free(nvbo); -} - -void -nouveau_bo_del(struct nouveau_bo **bo) -{ - struct nouveau_bo_priv *nvbo; - - if (!bo || !*bo) - return; - nvbo = nouveau_bo(*bo); - *bo = NULL; - - if (--nvbo->refcount) - return; - - if (nvbo->pending) - nouveau_pushbuf_flush(nvbo->pending->channel, 0); - - if (nvbo->fence) - nouveau_fence_signal_cb(nvbo->fence, nouveau_bo_del_cb, nvbo); - else - nouveau_bo_del_cb(nvbo); -} - -int -nouveau_bo_map(struct nouveau_bo *bo, uint32_t flags) -{ - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - - if (!nvbo) - return -EINVAL; - - if (nvbo->pending && - (nvbo->pending->flags & NOUVEAU_BO_WR || flags & NOUVEAU_BO_WR)) { - nouveau_pushbuf_flush(nvbo->pending->channel, 0); - } - - if (flags & NOUVEAU_BO_WR) - nouveau_fence_wait(&nvbo->fence); - else - nouveau_fence_wait(&nvbo->wr_fence); - - if (nvbo->sysmem) - bo->map = nvbo->sysmem; - else - bo->map = nvbo->map; - return 0; -} - -void -nouveau_bo_unmap(struct nouveau_bo *bo) -{ - bo->map = NULL; -} - -static int -nouveau_bo_upload(struct nouveau_bo_priv *nvbo) -{ - if (nvbo->fence) - nouveau_fence_wait(&nvbo->fence); - memcpy(nvbo->map, nvbo->sysmem, nvbo->drm.size); - return 0; -} - -int -nouveau_bo_set_status(struct nouveau_bo *bo, uint32_t flags) -{ - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - struct drm_nouveau_mem_alloc new; - void *new_map = NULL, *new_sysmem = NULL; - unsigned new_flags = 0, ret; - - assert(!bo->map); - - /* Check current memtype vs requested, if they match do nothing */ - if ((nvbo->drm.flags & NOUVEAU_MEM_FB) && (flags & NOUVEAU_BO_VRAM)) - return 0; - if ((nvbo->drm.flags & (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI)) && - (flags & NOUVEAU_BO_GART)) - return 0; - if (nvbo->drm.size == 0 && nvbo->sysmem && (flags & NOUVEAU_BO_LOCAL)) - return 0; - - memset(&new, 0x00, sizeof(new)); - - /* Allocate new memory */ - if (flags & NOUVEAU_BO_VRAM) - new_flags |= NOUVEAU_MEM_FB; - else - if (flags & NOUVEAU_BO_GART) - new_flags |= (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI); - - if (nvbo->tiled && flags) { - new_flags |= NOUVEAU_MEM_TILE; - if (nvbo->tiled & 2) - new_flags |= NOUVEAU_MEM_TILE_ZETA; - } - - if (new_flags) { - ret = nouveau_mem_alloc(bo->device, bo->size, - nvbo->drm.alignment, new_flags, - &new, &new_map); - if (ret) - return ret; - } else - if (!nvbo->user) { - new_sysmem = malloc(bo->size); - } - - /* Copy old -> new */ - /*XXX: use M2MF */ - if (nvbo->sysmem || nvbo->map) { - struct nouveau_pushbuf_bo *pbo = nvbo->pending; - nvbo->pending = NULL; - nouveau_bo_map(bo, NOUVEAU_BO_RD); - memcpy(new_map, bo->map, bo->size); - nouveau_bo_unmap(bo); - nvbo->pending = pbo; - } - - /* Free old memory */ - if (nvbo->fence) - nouveau_fence_wait(&nvbo->fence); - nouveau_mem_free(bo->device, &nvbo->drm, &nvbo->map); - if (nvbo->sysmem && !nvbo->user) - free(nvbo->sysmem); - - nvbo->drm = new; - nvbo->map = new_map; - if (!nvbo->user) - nvbo->sysmem = new_sysmem; - bo->flags = flags; - bo->offset = nvbo->drm.offset; - return 0; -} - -static int -nouveau_bo_validate_user(struct nouveau_channel *chan, struct nouveau_bo *bo, - struct nouveau_fence *fence, uint32_t flags) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_device_priv *nvdev = nouveau_device(chan->device); - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - struct nouveau_resource *r; - - if (nvchan->user_charge + bo->size > nvdev->sa.size) - return 1; - - if (!(flags & NOUVEAU_BO_GART)) - return 1; - - r = nouveau_bo_tmp(chan, bo->size, fence); - if (!r) - return 1; - nvchan->user_charge += bo->size; - - memcpy(nvdev->sa_map + r->start, nvbo->sysmem, bo->size); - - nvbo->offset = nvdev->sa.offset + r->start; - nvbo->flags = NOUVEAU_BO_GART; - return 0; -} - -static int -nouveau_bo_validate_bo(struct nouveau_channel *chan, struct nouveau_bo *bo, - struct nouveau_fence *fence, uint32_t flags) -{ - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - int ret; - - ret = nouveau_bo_set_status(bo, flags); - if (ret) { - nouveau_fence_flush(chan); - - ret = nouveau_bo_set_status(bo, flags); - if (ret) - return ret; - } - - if (nvbo->user) - nouveau_bo_upload(nvbo); - - nvbo->offset = nvbo->drm.offset; - if (nvbo->drm.flags & (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI)) - nvbo->flags = NOUVEAU_BO_GART; - else - nvbo->flags = NOUVEAU_BO_VRAM; - - return 0; -} - -int -nouveau_bo_validate(struct nouveau_channel *chan, struct nouveau_bo *bo, - uint32_t flags) -{ - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - struct nouveau_fence *fence = nouveau_pushbuf(chan->pushbuf)->fence; - int ret; - - assert(bo->map == NULL); - - if (nvbo->user) { - ret = nouveau_bo_validate_user(chan, bo, fence, flags); - if (ret) { - ret = nouveau_bo_validate_bo(chan, bo, fence, flags); - if (ret) - return ret; - } - } else { - ret = nouveau_bo_validate_bo(chan, bo, fence, flags); - if (ret) - return ret; - } - - if (flags & NOUVEAU_BO_WR) - nouveau_fence_ref(fence, &nvbo->wr_fence); - nouveau_fence_ref(fence, &nvbo->fence); - return 0; -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_channel.c b/src/gallium/winsys/dri/nouveau/nouveau_channel.c deleted file mode 100644 index 3b4dcd1ecf..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_channel.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_dma.h" - -int -nouveau_channel_alloc(struct nouveau_device *dev, uint32_t fb_ctxdma, - uint32_t tt_ctxdma, struct nouveau_channel **chan) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - struct nouveau_channel_priv *nvchan; - int ret; - - if (!nvdev || !chan || *chan) - return -EINVAL; - - nvchan = calloc(1, sizeof(struct nouveau_channel_priv)); - if (!nvchan) - return -ENOMEM; - nvchan->base.device = dev; - - nvchan->drm.fb_ctxdma_handle = fb_ctxdma; - nvchan->drm.tt_ctxdma_handle = tt_ctxdma; - ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_CHANNEL_ALLOC, - &nvchan->drm, sizeof(nvchan->drm)); - if (ret) { - free(nvchan); - return ret; - } - - nvchan->base.id = nvchan->drm.channel; - if (nouveau_grobj_ref(&nvchan->base, nvchan->drm.fb_ctxdma_handle, - &nvchan->base.vram) || - nouveau_grobj_ref(&nvchan->base, nvchan->drm.tt_ctxdma_handle, - &nvchan->base.gart)) { - nouveau_channel_free((void *)&nvchan); - return -EINVAL; - } - - ret = drmMap(nvdev->fd, nvchan->drm.ctrl, nvchan->drm.ctrl_size, - (void*)&nvchan->user); - if (ret) { - nouveau_channel_free((void *)&nvchan); - return ret; - } - nvchan->put = &nvchan->user[0x40/4]; - nvchan->get = &nvchan->user[0x44/4]; - nvchan->ref_cnt = &nvchan->user[0x48/4]; - - ret = drmMap(nvdev->fd, nvchan->drm.notifier, nvchan->drm.notifier_size, - (drmAddressPtr)&nvchan->notifier_block); - if (ret) { - nouveau_channel_free((void *)&nvchan); - return ret; - } - - ret = drmMap(nvdev->fd, nvchan->drm.cmdbuf, nvchan->drm.cmdbuf_size, - (void*)&nvchan->pushbuf); - if (ret) { - nouveau_channel_free((void *)&nvchan); - return ret; - } - - ret = nouveau_grobj_alloc(&nvchan->base, 0x00000000, 0x0030, - &nvchan->base.nullobj); - if (ret) { - nouveau_channel_free((void *)&nvchan); - return ret; - } - - nouveau_dma_channel_init(&nvchan->base); - nouveau_pushbuf_init(&nvchan->base); - - *chan = &nvchan->base; - return 0; -} - -void -nouveau_channel_free(struct nouveau_channel **chan) -{ - struct nouveau_channel_priv *nvchan; - struct nouveau_device_priv *nvdev; - struct drm_nouveau_channel_free cf; - - if (!chan || !*chan) - return; - nvchan = nouveau_channel(*chan); - *chan = NULL; - nvdev = nouveau_device(nvchan->base.device); - - FIRE_RING_CH(&nvchan->base); - - nouveau_grobj_free(&nvchan->base.vram); - nouveau_grobj_free(&nvchan->base.gart); - nouveau_grobj_free(&nvchan->base.nullobj); - - cf.channel = nvchan->drm.channel; - drmCommandWrite(nvdev->fd, DRM_NOUVEAU_CHANNEL_FREE, &cf, sizeof(cf)); - free(nvchan); -} - - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_context.c b/src/gallium/winsys/dri/nouveau/nouveau_context.c deleted file mode 100644 index 74413c408f..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_context.c +++ /dev/null @@ -1,346 +0,0 @@ -#include "main/glheader.h" -#include "glapi/glthread.h" -#include -#include "utils.h" - -#include "state_tracker/st_public.h" -#include "state_tracker/st_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_context.h" -#include "pipe/p_screen.h" - -#include "nouveau_context.h" -#include "nouveau_dri.h" -#include "nouveau_local.h" -#include "nouveau_screen.h" -#include "nouveau_winsys_pipe.h" - -#ifdef DEBUG -static const struct dri_debug_control debug_control[] = { - { "bo", DEBUG_BO }, - { NULL, 0 } -}; -int __nouveau_debug = 0; -#endif - -static void -nouveau_channel_context_destroy(struct nouveau_channel_context *nvc) -{ - nouveau_grobj_free(&nvc->NvCtxSurf2D); - nouveau_grobj_free(&nvc->NvImageBlit); - nouveau_grobj_free(&nvc->NvGdiRect); - nouveau_grobj_free(&nvc->NvM2MF); - nouveau_grobj_free(&nvc->Nv2D); - nouveau_grobj_free(&nvc->NvSwzSurf); - nouveau_grobj_free(&nvc->NvSIFM); - - nouveau_notifier_free(&nvc->sync_notifier); - - nouveau_channel_free(&nvc->channel); - - FREE(nvc); -} - -static struct nouveau_channel_context * -nouveau_channel_context_create(struct nouveau_device *dev) -{ - struct nouveau_channel_context *nvc; - int ret; - - nvc = CALLOC_STRUCT(nouveau_channel_context); - if (!nvc) - return NULL; - - if ((ret = nouveau_channel_alloc(dev, 0x8003d001, 0x8003d002, - &nvc->channel))) { - NOUVEAU_ERR("Error creating GPU channel: %d\n", ret); - nouveau_channel_context_destroy(nvc); - return NULL; - } - - nvc->next_handle = 0x80000000; - - if ((ret = nouveau_notifier_alloc(nvc->channel, nvc->next_handle++, 1, - &nvc->sync_notifier))) { - NOUVEAU_ERR("Error creating channel sync notifier: %d\n", ret); - nouveau_channel_context_destroy(nvc); - return NULL; - } - - switch (dev->chipset & 0xf0) { - case 0x50: - case 0x80: - case 0x90: - ret = nouveau_surface_channel_create_nv50(nvc); - break; - default: - ret = nouveau_surface_channel_create_nv04(nvc); - break; - } - - if (ret) { - NOUVEAU_ERR("Error initialising surface objects: %d\n", ret); - nouveau_channel_context_destroy(nvc); - return NULL; - } - - return nvc; -} - -GLboolean -nouveau_context_create(const __GLcontextModes *glVis, - __DRIcontextPrivate *driContextPriv, - void *sharedContextPrivate) -{ - __DRIscreenPrivate *driScrnPriv = driContextPriv->driScreenPriv; - struct nouveau_screen *nv_screen = driScrnPriv->private; - struct nouveau_context *nv = CALLOC_STRUCT(nouveau_context); - struct pipe_context *pipe = NULL; - struct st_context *st_share = NULL; - struct nouveau_channel_context *nvc = NULL; - struct nouveau_device *dev = nv_screen->device; - int i; - - if (sharedContextPrivate) { - st_share = ((struct nouveau_context *)sharedContextPrivate)->st; - } - - switch (dev->chipset & 0xf0) { - case 0x10: - case 0x20: - /* NV10 */ - case 0x30: - /* NV30 */ - case 0x40: - case 0x60: - /* NV40 */ - case 0x50: - case 0x80: - case 0x90: - /* G80 */ - break; - default: - NOUVEAU_ERR("Unsupported chipset: NV%02x\n", dev->chipset); - return GL_FALSE; - } - - driContextPriv->driverPrivate = (void *)nv; - nv->nv_screen = nv_screen; - nv->dri_screen = driScrnPriv; - - { - struct nouveau_device_priv *nvdev = nouveau_device(dev); - - nvdev->ctx = driContextPriv->hHWContext; - nvdev->lock = (drmLock *)&driScrnPriv->pSAREA->lock; - } - - driParseConfigFiles(&nv->dri_option_cache, &nv_screen->option_cache, - nv->dri_screen->myNum, "nouveau"); -#ifdef DEBUG - __nouveau_debug = driParseDebugString(getenv("NOUVEAU_DEBUG"), - debug_control); -#endif - - /*XXX: Hack up a fake region and buffer object for front buffer. - * This will go away with TTM, replaced with a simple reference - * of the front buffer handle passed to us by the DDX. - */ - { - struct pipe_surface *fb_surf; - struct nouveau_pipe_buffer *fb_buf; - struct nouveau_bo_priv *fb_bo; - - fb_bo = calloc(1, sizeof(struct nouveau_bo_priv)); - fb_bo->drm.offset = nv_screen->front_offset; - fb_bo->drm.flags = NOUVEAU_MEM_FB; - fb_bo->drm.size = nv_screen->front_pitch * - nv_screen->front_height; - fb_bo->refcount = 1; - fb_bo->base.flags = NOUVEAU_BO_PIN | NOUVEAU_BO_VRAM; - fb_bo->base.offset = fb_bo->drm.offset; - fb_bo->base.handle = (unsigned long)fb_bo; - fb_bo->base.size = fb_bo->drm.size; - fb_bo->base.device = nv_screen->device; - - fb_buf = calloc(1, sizeof(struct nouveau_pipe_buffer)); - fb_buf->bo = &fb_bo->base; - - fb_surf = calloc(1, sizeof(struct pipe_surface)); - if (nv_screen->front_cpp == 2) - fb_surf->format = PIPE_FORMAT_R5G6B5_UNORM; - else - fb_surf->format = PIPE_FORMAT_A8R8G8B8_UNORM; - pf_get_block(fb_surf->format, &fb_surf->block); - fb_surf->width = nv_screen->front_pitch / nv_screen->front_cpp; - fb_surf->height = nv_screen->front_height; - fb_surf->stride = fb_surf->width * fb_surf->block.size; - fb_surf->refcount = 1; - fb_surf->buffer = &fb_buf->base; - - nv->frontbuffer = fb_surf; - } - - /* Attempt to share a single channel between multiple contexts from - * a single process. - */ - nvc = nv_screen->nvc; - if (!nvc && st_share) { - struct nouveau_context *snv = st_share->pipe->priv; - if (snv) { - nvc = snv->nvc; - } - } - - /*XXX: temporary - disable multi-context/single-channel on pre-NV4x */ - switch (dev->chipset & 0xf0) { - case 0x40: - case 0x60: - /* NV40 class */ - case 0x50: - case 0x80: - case 0x90: - /* G80 class */ - break; - default: - nvc = NULL; - break; - } - - if (!nvc) { - nvc = nouveau_channel_context_create(dev); - if (!nvc) { - NOUVEAU_ERR("Failed initialising GPU context\n"); - return GL_FALSE; - } - nv_screen->nvc = nvc; - } - - nvc->refcount++; - nv->nvc = nvc; - - /* Find a free slot for a pipe context, allocate a new one if needed */ - nv->pctx_id = -1; - for (i = 0; i < nvc->nr_pctx; i++) { - if (nvc->pctx[i] == NULL) { - nv->pctx_id = i; - break; - } - } - - if (nv->pctx_id < 0) { - nv->pctx_id = nvc->nr_pctx++; - nvc->pctx = - realloc(nvc->pctx, - sizeof(struct pipe_context *) * nvc->nr_pctx); - } - - /* Create pipe */ - switch (dev->chipset & 0xf0) { - case 0x50: - case 0x80: - case 0x90: - if (nouveau_surface_init_nv50(nv)) - return GL_FALSE; - break; - default: - if (nouveau_surface_init_nv04(nv)) - return GL_FALSE; - break; - } - - if (!getenv("NOUVEAU_FORCE_SOFTPIPE")) { - struct pipe_screen *pscreen; - - pipe = nouveau_pipe_create(nv); - if (!pipe) - NOUVEAU_ERR("Couldn't create hw pipe\n"); - pscreen = nvc->pscreen; - - nv->cap.hw_vertex_buffer = - pscreen->get_param(pscreen, NOUVEAU_CAP_HW_VTXBUF); - nv->cap.hw_index_buffer = - pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF); - } - - if (!pipe) { - NOUVEAU_MSG("Using softpipe\n"); - pipe = nouveau_create_softpipe(nv); - if (!pipe) { - NOUVEAU_ERR("Error creating pipe, bailing\n"); - return GL_FALSE; - } - } - - pipe->priv = nv; - nv->st = st_create_context(pipe, glVis, st_share); - return GL_TRUE; -} - -void -nouveau_context_destroy(__DRIcontextPrivate *driContextPriv) -{ - struct nouveau_context *nv = driContextPriv->driverPrivate; - struct nouveau_channel_context *nvc = nv->nvc; - - assert(nv); - - st_finish(nv->st); - st_destroy_context(nv->st); - - if (nv->pctx_id >= 0) { - nvc->pctx[nv->pctx_id] = NULL; - if (--nvc->refcount <= 0) { - nouveau_channel_context_destroy(nvc); - nv->nv_screen->nvc = NULL; - } - } - - free(nv); -} - -GLboolean -nouveau_context_bind(__DRIcontextPrivate *driContextPriv, - __DRIdrawablePrivate *driDrawPriv, - __DRIdrawablePrivate *driReadPriv) -{ - struct nouveau_context *nv; - struct nouveau_framebuffer *draw, *read; - - if (!driContextPriv) { - st_make_current(NULL, NULL, NULL); - return GL_TRUE; - } - - nv = driContextPriv->driverPrivate; - draw = driDrawPriv->driverPrivate; - read = driReadPriv->driverPrivate; - - st_make_current(nv->st, draw->stfb, read->stfb); - - if ((nv->dri_drawable != driDrawPriv) || - (nv->last_stamp != driDrawPriv->lastStamp)) { - nv->dri_drawable = driDrawPriv; - st_resize_framebuffer(draw->stfb, driDrawPriv->w, - driDrawPriv->h); - nv->last_stamp = driDrawPriv->lastStamp; - } - - if (driDrawPriv != driReadPriv) { - st_resize_framebuffer(read->stfb, driReadPriv->w, - driReadPriv->h); - } - - return GL_TRUE; -} - -GLboolean -nouveau_context_unbind(__DRIcontextPrivate *driContextPriv) -{ - struct nouveau_context *nv = driContextPriv->driverPrivate; - (void)nv; - - st_flush(nv->st, 0, NULL); - return GL_TRUE; -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_context.h b/src/gallium/winsys/dri/nouveau/nouveau_context.h deleted file mode 100644 index 77e2147a2c..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_context.h +++ /dev/null @@ -1,113 +0,0 @@ -#ifndef __NOUVEAU_CONTEXT_H__ -#define __NOUVEAU_CONTEXT_H__ - -#include "dri_util.h" -#include "xmlconfig.h" - -#include "nouveau/nouveau_winsys.h" -#include "nouveau_drmif.h" -#include "nouveau_dma.h" - -struct nouveau_framebuffer { - struct st_framebuffer *stfb; -}; - -struct nouveau_channel_context { - struct pipe_screen *pscreen; - int refcount; - - unsigned cur_pctx; - unsigned nr_pctx; - struct pipe_context **pctx; - - struct nouveau_channel *channel; - - struct nouveau_notifier *sync_notifier; - - /* Common */ - struct nouveau_grobj *NvM2MF; - /* NV04-NV40 */ - struct nouveau_grobj *NvCtxSurf2D; - struct nouveau_grobj *NvSwzSurf; - struct nouveau_grobj *NvImageBlit; - struct nouveau_grobj *NvGdiRect; - struct nouveau_grobj *NvSIFM; - /* G80 */ - struct nouveau_grobj *Nv2D; - - uint32_t next_handle; - uint32_t next_subchannel; - uint32_t next_sequence; -}; - -struct nouveau_context { - struct st_context *st; - - /* DRI stuff */ - __DRIscreenPrivate *dri_screen; - __DRIdrawablePrivate *dri_drawable; - unsigned int last_stamp; - driOptionCache dri_option_cache; - drm_context_t drm_context; - drmLock drm_lock; - GLboolean locked; - struct nouveau_screen *nv_screen; - struct pipe_surface *frontbuffer; - - struct { - int hw_vertex_buffer; - int hw_index_buffer; - } cap; - - /* Hardware context */ - struct nouveau_channel_context *nvc; - int pctx_id; - - /* pipe_surface accel */ - struct pipe_surface *surf_src, *surf_dst; - unsigned surf_src_offset, surf_dst_offset; - int (*surface_copy_prep)(struct nouveau_context *, - struct pipe_surface *dst, - struct pipe_surface *src); - void (*surface_copy)(struct nouveau_context *, unsigned dx, unsigned dy, - unsigned sx, unsigned sy, unsigned w, unsigned h); - void (*surface_copy_done)(struct nouveau_context *); - int (*surface_fill)(struct nouveau_context *, struct pipe_surface *, - unsigned, unsigned, unsigned, unsigned, unsigned); -}; - -extern GLboolean nouveau_context_create(const __GLcontextModes *, - __DRIcontextPrivate *, void *); -extern void nouveau_context_destroy(__DRIcontextPrivate *); -extern GLboolean nouveau_context_bind(__DRIcontextPrivate *, - __DRIdrawablePrivate *draw, - __DRIdrawablePrivate *read); -extern GLboolean nouveau_context_unbind(__DRIcontextPrivate *); - -#ifdef DEBUG -extern int __nouveau_debug; - -#define DEBUG_BO (1 << 0) - -#define DBG(flag, ...) do { \ - if (__nouveau_debug & (DEBUG_##flag)) \ - NOUVEAU_ERR(__VA_ARGS__); \ -} while(0) -#else -#define DBG(flag, ...) -#endif - -extern void LOCK_HARDWARE(struct nouveau_context *); -extern void UNLOCK_HARDWARE(struct nouveau_context *); - -extern int -nouveau_surface_channel_create_nv04(struct nouveau_channel_context *); -extern int -nouveau_surface_channel_create_nv50(struct nouveau_channel_context *); -extern int nouveau_surface_init_nv04(struct nouveau_context *); -extern int nouveau_surface_init_nv50(struct nouveau_context *); - -extern uint32_t *nouveau_pipe_dma_beginp(struct nouveau_grobj *, int, int); -extern void nouveau_pipe_dma_kickoff(struct nouveau_channel *); - -#endif diff --git a/src/gallium/winsys/dri/nouveau/nouveau_device.c b/src/gallium/winsys/dri/nouveau/nouveau_device.c deleted file mode 100644 index 0b452fcd02..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_device.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include - -#include "nouveau_drmif.h" - -int -nouveau_device_open_existing(struct nouveau_device **dev, int close, - int fd, drm_context_t ctx) -{ - struct nouveau_device_priv *nvdev; - int ret; - - if (!dev || *dev) - return -EINVAL; - - nvdev = calloc(1, sizeof(*nvdev)); - if (!nvdev) - return -ENOMEM; - nvdev->fd = fd; - nvdev->ctx = ctx; - nvdev->needs_close = close; - - drmCommandNone(nvdev->fd, DRM_NOUVEAU_CARD_INIT); - - if ((ret = nouveau_bo_init(&nvdev->base))) { - nouveau_device_close((void *)&nvdev); - return ret; - } - - { - uint64_t value; - - ret = nouveau_device_get_param(&nvdev->base, - NOUVEAU_GETPARAM_CHIPSET_ID, - &value); - if (ret) { - nouveau_device_close((void *)&nvdev); - return ret; - } - nvdev->base.chipset = value; - } - - *dev = &nvdev->base; - return 0; -} - -int -nouveau_device_open(struct nouveau_device **dev, const char *busid) -{ - drm_context_t ctx; - int fd, ret; - - if (!dev || *dev) - return -EINVAL; - - fd = drmOpen("nouveau", busid); - if (fd < 0) - return -EINVAL; - - ret = drmCreateContext(fd, &ctx); - if (ret) { - drmClose(fd); - return ret; - } - - ret = nouveau_device_open_existing(dev, 1, fd, ctx); - if (ret) { - drmDestroyContext(fd, ctx); - drmClose(fd); - return ret; - } - - return 0; -} - -void -nouveau_device_close(struct nouveau_device **dev) -{ - struct nouveau_device_priv *nvdev; - - if (dev || !*dev) - return; - nvdev = nouveau_device(*dev); - *dev = NULL; - - nouveau_bo_takedown(&nvdev->base); - - if (nvdev->needs_close) { - drmDestroyContext(nvdev->fd, nvdev->ctx); - drmClose(nvdev->fd); - } - free(nvdev); -} - -int -nouveau_device_get_param(struct nouveau_device *dev, - uint64_t param, uint64_t *value) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - struct drm_nouveau_getparam g; - int ret; - - if (!nvdev || !value) - return -EINVAL; - - g.param = param; - ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GETPARAM, - &g, sizeof(g)); - if (ret) - return ret; - - *value = g.value; - return 0; -} - -int -nouveau_device_set_param(struct nouveau_device *dev, - uint64_t param, uint64_t value) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - struct drm_nouveau_setparam s; - int ret; - - if (!nvdev) - return -EINVAL; - - s.param = param; - s.value = value; - ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_SETPARAM, - &s, sizeof(s)); - if (ret) - return ret; - - return 0; -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_dma.c b/src/gallium/winsys/dri/nouveau/nouveau_dma.c deleted file mode 100644 index f8a8ba04f6..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_dma.c +++ /dev/null @@ -1,219 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_dma.h" -#include "nouveau_local.h" - -static inline uint32_t -READ_GET(struct nouveau_channel_priv *nvchan) -{ - return *nvchan->get; -} - -static inline void -WRITE_PUT(struct nouveau_channel_priv *nvchan, uint32_t val) -{ - uint32_t put = ((val << 2) + nvchan->dma->base); - volatile int dum; - - NOUVEAU_DMA_BARRIER; - dum = READ_GET(nvchan); - - *nvchan->put = put; - nvchan->dma->put = val; -#ifdef NOUVEAU_DMA_TRACE - NOUVEAU_MSG("WRITE_PUT %d/0x%08x\n", nvchan->drm.channel, put); -#endif - - NOUVEAU_DMA_BARRIER; -} - -static inline int -LOCAL_GET(struct nouveau_dma_priv *dma, uint32_t *val) -{ - uint32_t get = *val; - - if (get >= dma->base && get <= (dma->base + (dma->max << 2))) { - *val = (get - dma->base) >> 2; - return 1; - } - - return 0; -} - -void -nouveau_dma_channel_init(struct nouveau_channel *chan) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - int i; - - nvchan->dma = &nvchan->dma_master; - nvchan->dma->base = nvchan->drm.put_base; - nvchan->dma->cur = nvchan->dma->put = 0; - nvchan->dma->max = (nvchan->drm.cmdbuf_size >> 2) - 2; - nvchan->dma->free = nvchan->dma->max - nvchan->dma->cur; - - RING_SPACE_CH(chan, RING_SKIPS); - for (i = 0; i < RING_SKIPS; i++) - OUT_RING_CH(chan, 0); -} - -#define CHECK_TIMEOUT() do { \ - if ((NOUVEAU_TIME_MSEC() - t_start) > NOUVEAU_DMA_TIMEOUT) \ - return - EBUSY; \ -} while(0) - -int -nouveau_dma_wait(struct nouveau_channel *chan, int size) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - uint32_t get, t_start; - - FIRE_RING_CH(chan); - - t_start = NOUVEAU_TIME_MSEC(); - while (dma->free < size) { - CHECK_TIMEOUT(); - - get = READ_GET(nvchan); - if (!LOCAL_GET(dma, &get)) - continue; - - if (dma->put >= get) { - dma->free = dma->max - dma->cur; - - if (dma->free < size) { -#ifdef NOUVEAU_DMA_DEBUG - dma->push_free = 1; -#endif - OUT_RING_CH(chan, 0x20000000 | dma->base); - if (get <= RING_SKIPS) { - /*corner case - will be idle*/ - if (dma->put <= RING_SKIPS) - WRITE_PUT(nvchan, - RING_SKIPS + 1); - - do { - CHECK_TIMEOUT(); - get = READ_GET(nvchan); - if (!LOCAL_GET(dma, &get)) - get = 0; - } while (get <= RING_SKIPS); - } - - WRITE_PUT(nvchan, RING_SKIPS); - dma->cur = dma->put = RING_SKIPS; - dma->free = get - (RING_SKIPS + 1); - } - } else { - dma->free = get - dma->cur - 1; - } - } - - return 0; -} - -#ifdef NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF -static void -nouveau_dma_parse_pushbuf(struct nouveau_channel *chan, int get, int put) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - unsigned mthd_count = 0; - - while (get != put) { - uint32_t gpuget = (get << 2) + nvchan->drm.put_base; - uint32_t data; - - if (get < 0 || get >= nvchan->drm.cmdbuf_size) { - NOUVEAU_ERR("DMA_PT 0x%08x\n", gpuget); - assert(0); - } - data = nvchan->pushbuf[get++]; - - if (mthd_count) { - NOUVEAU_MSG("0x%08x 0x%08x\n", gpuget, data); - mthd_count--; - continue; - } - - switch (data & 0x60000000) { - case 0x00000000: - mthd_count = (data >> 18) & 0x7ff; - NOUVEAU_MSG("0x%08x 0x%08x MTHD " - "Sc %d Mthd 0x%04x Size %d\n", - gpuget, data, (data>>13) & 7, data & 0x1ffc, - mthd_count); - break; - case 0x20000000: - get = (data & 0x1ffffffc) >> 2; - NOUVEAU_MSG("0x%08x 0x%08x JUMP 0x%08x\n", - gpuget, data, data & 0x1ffffffc); - continue; - case 0x40000000: - mthd_count = (data >> 18) & 0x7ff; - NOUVEAU_MSG("0x%08x 0x%08x NINC " - "Sc %d Mthd 0x%04x Size %d\n", - gpuget, data, (data>>13) & 7, data & 0x1ffc, - mthd_count); - break; - case 0x60000000: - /* DMA_OPCODE_CALL apparently, doesn't seem to work on - * my NV40 at least.. - */ - /* fall-through */ - default: - NOUVEAU_MSG("DMA_PUSHER 0x%08x 0x%08x\n", - gpuget, data); - assert(0); - } - } -} -#endif - -void -nouveau_dma_kickoff(struct nouveau_channel *chan) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - - if (dma->cur == dma->put) - return; - -#ifdef NOUVEAU_DMA_DEBUG - if (dma->push_free) { - NOUVEAU_ERR("Packet incomplete: %d left\n", dma->push_free); - return; - } -#endif - -#ifdef NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF - nouveau_dma_parse_pushbuf(chan, dma->put, dma->cur); -#endif - - WRITE_PUT(nvchan, dma->cur); -} diff --git a/src/gallium/winsys/dri/nouveau/nouveau_dma.h b/src/gallium/winsys/dri/nouveau/nouveau_dma.h deleted file mode 100644 index cfa6d26e82..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_dma.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_DMA_H__ -#define __NOUVEAU_DMA_H__ - -#include -#include "nouveau_drmif.h" -#include "nouveau_local.h" - -#define RING_SKIPS 8 - -extern int nouveau_dma_wait(struct nouveau_channel *chan, int size); -extern void nouveau_dma_subc_bind(struct nouveau_grobj *); -extern void nouveau_dma_channel_init(struct nouveau_channel *); -extern void nouveau_dma_kickoff(struct nouveau_channel *); - -#ifdef NOUVEAU_DMA_DEBUG -static char faulty[1024]; -#endif - -static inline void -nouveau_dma_out(struct nouveau_channel *chan, uint32_t data) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - -#ifdef NOUVEAU_DMA_DEBUG - if (dma->push_free == 0) { - NOUVEAU_ERR("No space left in packet at %s\n", faulty); - return; - } - dma->push_free--; -#endif -#ifdef NOUVEAU_DMA_TRACE - { - uint32_t offset = (dma->cur << 2) + dma->base; - NOUVEAU_MSG("\tOUT_RING %d/0x%08x -> 0x%08x\n", - nvchan->drm.channel, offset, data); - } -#endif - nvchan->pushbuf[dma->cur + (dma->base - nvchan->drm.put_base)/4] = data; - dma->cur++; -} - -static inline void -nouveau_dma_outp(struct nouveau_channel *chan, uint32_t *ptr, int size) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - (void)dma; - -#ifdef NOUVEAU_DMA_DEBUG - if (dma->push_free < size) { - NOUVEAU_ERR("Packet too small. Free=%d, Need=%d\n", - dma->push_free, size); - return; - } -#endif -#ifdef NOUVEAU_DMA_TRACE - while (size--) { - nouveau_dma_out(chan, *ptr); - ptr++; - } -#else - memcpy(&nvchan->pushbuf[dma->cur], ptr, size << 2); -#ifdef NOUVEAU_DMA_DEBUG - dma->push_free -= size; -#endif - dma->cur += size; -#endif -} - -static inline void -nouveau_dma_space(struct nouveau_channel *chan, int size) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - - if (dma->free < size) { - if (nouveau_dma_wait(chan, size) && chan->hang_notify) - chan->hang_notify(chan); - } - dma->free -= size; -#ifdef NOUVEAU_DMA_DEBUG - dma->push_free = size; -#endif -} - -static inline void -nouveau_dma_begin(struct nouveau_channel *chan, struct nouveau_grobj *grobj, - int method, int size, const char* file, int line) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - (void)dma; - -#ifdef NOUVEAU_DMA_TRACE - NOUVEAU_MSG("BEGIN_RING %d/%08x/%d/0x%04x/%d\n", nvchan->drm.channel, - grobj->handle, grobj->subc, method, size); -#endif - -#ifdef NOUVEAU_DMA_DEBUG - if (dma->push_free) { - NOUVEAU_ERR("Previous packet incomplete: %d left at %s\n", - dma->push_free, faulty); - return; - } - sprintf(faulty,"%s:%d",file,line); -#endif - - nouveau_dma_space(chan, (size + 1)); - nouveau_dma_out(chan, (size << 18) | (grobj->subc << 13) | method); -} - -#define RING_SPACE_CH(ch,sz) nouveau_dma_space((ch), (sz)) -#define BEGIN_RING_CH(ch,gr,m,sz) nouveau_dma_begin((ch), (gr), (m), (sz), __FUNCTION__, __LINE__ ) -#define OUT_RING_CH(ch, data) nouveau_dma_out((ch), (data)) -#define OUT_RINGp_CH(ch,ptr,dwords) nouveau_dma_outp((ch), (void*)(ptr), \ - (dwords)) -#define FIRE_RING_CH(ch) nouveau_dma_kickoff((ch)) -#define WAIT_RING_CH(ch,sz) nouveau_dma_wait((ch), (sz)) - -#endif diff --git a/src/gallium/winsys/dri/nouveau/nouveau_dri.h b/src/gallium/winsys/dri/nouveau/nouveau_dri.h deleted file mode 100644 index 1207c2d609..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_dri.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef _NOUVEAU_DRI_ -#define _NOUVEAU_DRI_ - -#include "xf86drm.h" -#include "drm.h" -#include "nouveau_drm.h" - -struct nouveau_dri { - uint32_t device_id; /**< \brief PCI device ID */ - uint32_t width; /**< \brief width in pixels of display */ - uint32_t height; /**< \brief height in scanlines of display */ - uint32_t depth; /**< \brief depth of display (8, 15, 16, 24) */ - uint32_t bpp; /**< \brief bit depth of display (8, 16, 24, 32) */ - - uint32_t bus_type; /**< \brief ths bus type */ - uint32_t bus_mode; /**< \brief bus mode (used for AGP, maybe also for PCI-E ?) */ - - uint32_t front_offset; /**< \brief front buffer offset */ - uint32_t front_pitch; /**< \brief front buffer pitch */ - uint32_t back_offset; /**< \brief private back buffer offset */ - uint32_t back_pitch; /**< \brief private back buffer pitch */ - uint32_t depth_offset; /**< \brief private depth buffer offset */ - uint32_t depth_pitch; /**< \brief private depth buffer pitch */ - -}; - -#endif - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_drmif.h b/src/gallium/winsys/dri/nouveau/nouveau_drmif.h deleted file mode 100644 index dcd6a5eb0a..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_drmif.h +++ /dev/null @@ -1,310 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_DRMIF_H__ -#define __NOUVEAU_DRMIF_H__ - -#include -#include -#include - -#include "nouveau/nouveau_device.h" -#include "nouveau/nouveau_channel.h" -#include "nouveau/nouveau_grobj.h" -#include "nouveau/nouveau_notifier.h" -#include "nouveau/nouveau_bo.h" -#include "nouveau/nouveau_resource.h" -#include "nouveau/nouveau_pushbuf.h" - -struct nouveau_device_priv { - struct nouveau_device base; - - int fd; - drm_context_t ctx; - drmLock *lock; - int needs_close; - - struct drm_nouveau_mem_alloc sa; - void *sa_map; - struct nouveau_resource *sa_heap; -}; -#define nouveau_device(n) ((struct nouveau_device_priv *)(n)) - -extern int -nouveau_device_open_existing(struct nouveau_device **, int close, - int fd, drm_context_t ctx); - -extern int -nouveau_device_open(struct nouveau_device **, const char *busid); - -extern void -nouveau_device_close(struct nouveau_device **); - -extern int -nouveau_device_get_param(struct nouveau_device *, uint64_t param, uint64_t *v); - -extern int -nouveau_device_set_param(struct nouveau_device *, uint64_t param, uint64_t val); - -struct nouveau_fence { - struct nouveau_channel *channel; -}; - -struct nouveau_fence_cb { - struct nouveau_fence_cb *next; - void (*func)(void *); - void *priv; -}; - -struct nouveau_fence_priv { - struct nouveau_fence base; - int refcount; - - struct nouveau_fence *next; - struct nouveau_fence_cb *signal_cb; - - uint32_t sequence; - int emitted; - int signalled; -}; -#define nouveau_fence(n) ((struct nouveau_fence_priv *)(n)) - -extern int -nouveau_fence_new(struct nouveau_channel *, struct nouveau_fence **); - -extern int -nouveau_fence_ref(struct nouveau_fence *, struct nouveau_fence **); - -extern int -nouveau_fence_signal_cb(struct nouveau_fence *, void (*)(void *), void *); - -extern void -nouveau_fence_emit(struct nouveau_fence *); - -extern int -nouveau_fence_wait(struct nouveau_fence **); - -extern void -nouveau_fence_flush(struct nouveau_channel *); - -struct nouveau_pushbuf_reloc { - struct nouveau_pushbuf_bo *pbbo; - uint32_t *ptr; - uint32_t flags; - uint32_t data; - uint32_t vor; - uint32_t tor; -}; - -struct nouveau_pushbuf_bo { - struct nouveau_channel *channel; - struct nouveau_bo *bo; - unsigned flags; - unsigned handled; -}; - -#define NOUVEAU_PUSHBUF_MAX_BUFFERS 1024 -#define NOUVEAU_PUSHBUF_MAX_RELOCS 1024 -struct nouveau_pushbuf_priv { - struct nouveau_pushbuf base; - - struct nouveau_fence *fence; - - unsigned nop_jump; - unsigned start; - unsigned size; - - struct nouveau_pushbuf_bo *buffers; - unsigned nr_buffers; - struct nouveau_pushbuf_reloc *relocs; - unsigned nr_relocs; -}; -#define nouveau_pushbuf(n) ((struct nouveau_pushbuf_priv *)(n)) - -#define pbbo_to_ptr(o) ((uint64_t)(unsigned long)(o)) -#define ptr_to_pbbo(h) ((struct nouveau_pushbuf_bo *)(unsigned long)(h)) -#define pbrel_to_ptr(o) ((uint64_t)(unsigned long)(o)) -#define ptr_to_pbrel(h) ((struct nouveau_pushbuf_reloc *)(unsigned long)(h)) -#define bo_to_ptr(o) ((uint64_t)(unsigned long)(o)) -#define ptr_to_bo(h) ((struct nouveau_bo_priv *)(unsigned long)(h)) - -extern int -nouveau_pushbuf_init(struct nouveau_channel *); - -extern int -nouveau_pushbuf_flush(struct nouveau_channel *, unsigned min); - -extern int -nouveau_pushbuf_emit_reloc(struct nouveau_channel *, void *ptr, - struct nouveau_bo *, uint32_t data, uint32_t flags, - uint32_t vor, uint32_t tor); - -struct nouveau_dma_priv { - uint32_t base; - uint32_t max; - uint32_t cur; - uint32_t put; - uint32_t free; - - int push_free; -} dma; - -struct nouveau_channel_priv { - struct nouveau_channel base; - - struct drm_nouveau_channel_alloc drm; - - uint32_t *pushbuf; - void *notifier_block; - - volatile uint32_t *user; - volatile uint32_t *put; - volatile uint32_t *get; - volatile uint32_t *ref_cnt; - - struct nouveau_dma_priv dma_master; - struct nouveau_dma_priv dma_bufmgr; - struct nouveau_dma_priv *dma; - - struct nouveau_fence *fence_head; - struct nouveau_fence *fence_tail; - uint32_t fence_sequence; - - struct nouveau_pushbuf_priv pb; - - unsigned user_charge; -}; -#define nouveau_channel(n) ((struct nouveau_channel_priv *)(n)) - -extern int -nouveau_channel_alloc(struct nouveau_device *, uint32_t fb, uint32_t tt, - struct nouveau_channel **); - -extern void -nouveau_channel_free(struct nouveau_channel **); - -struct nouveau_grobj_priv { - struct nouveau_grobj base; -}; -#define nouveau_grobj(n) ((struct nouveau_grobj_priv *)(n)) - -extern int nouveau_grobj_alloc(struct nouveau_channel *, uint32_t handle, - int class, struct nouveau_grobj **); -extern int nouveau_grobj_ref(struct nouveau_channel *, uint32_t handle, - struct nouveau_grobj **); -extern void nouveau_grobj_free(struct nouveau_grobj **); - - -struct nouveau_notifier_priv { - struct nouveau_notifier base; - - struct drm_nouveau_notifierobj_alloc drm; - volatile void *map; -}; -#define nouveau_notifier(n) ((struct nouveau_notifier_priv *)(n)) - -extern int -nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle, int count, - struct nouveau_notifier **); - -extern void -nouveau_notifier_free(struct nouveau_notifier **); - -extern void -nouveau_notifier_reset(struct nouveau_notifier *, int id); - -extern uint32_t -nouveau_notifier_status(struct nouveau_notifier *, int id); - -extern uint32_t -nouveau_notifier_return_val(struct nouveau_notifier *, int id); - -extern int -nouveau_notifier_wait_status(struct nouveau_notifier *, int id, int status, - int timeout); - -struct nouveau_bo_priv { - struct nouveau_bo base; - - struct nouveau_pushbuf_bo *pending; - struct nouveau_fence *fence; - struct nouveau_fence *wr_fence; - - struct drm_nouveau_mem_alloc drm; - void *map; - - void *sysmem; - int user; - - int refcount; - - uint64_t offset; - uint64_t flags; - int tiled; -}; -#define nouveau_bo(n) ((struct nouveau_bo_priv *)(n)) - -extern int -nouveau_bo_init(struct nouveau_device *); - -extern void -nouveau_bo_takedown(struct nouveau_device *); - -extern int -nouveau_bo_new(struct nouveau_device *, uint32_t flags, int align, int size, - struct nouveau_bo **); - -extern int -nouveau_bo_user(struct nouveau_device *, void *ptr, int size, - struct nouveau_bo **); - -extern int -nouveau_bo_ref(struct nouveau_device *, uint64_t handle, struct nouveau_bo **); - -extern int -nouveau_bo_set_status(struct nouveau_bo *, uint32_t flags); - -extern void -nouveau_bo_del(struct nouveau_bo **); - -extern int -nouveau_bo_map(struct nouveau_bo *, uint32_t flags); - -extern void -nouveau_bo_unmap(struct nouveau_bo *); - -extern int -nouveau_bo_validate(struct nouveau_channel *, struct nouveau_bo *, - uint32_t flags); - -extern int -nouveau_resource_init(struct nouveau_resource **heap, unsigned start, - unsigned size); - -extern int -nouveau_resource_alloc(struct nouveau_resource *heap, int size, void *priv, - struct nouveau_resource **); - -extern void -nouveau_resource_free(struct nouveau_resource **); - -#endif diff --git a/src/gallium/winsys/dri/nouveau/nouveau_fence.c b/src/gallium/winsys/dri/nouveau/nouveau_fence.c deleted file mode 100644 index e7b0b4ff07..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_fence.c +++ /dev/null @@ -1,214 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_dma.h" -#include "nouveau_local.h" - -static void -nouveau_fence_del_unsignalled(struct nouveau_fence *fence) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(fence->channel); - struct nouveau_fence *le; - - if (nvchan->fence_head == fence) { - nvchan->fence_head = nouveau_fence(fence)->next; - if (nvchan->fence_head == NULL) - nvchan->fence_tail = NULL; - return; - } - - le = nvchan->fence_head; - while (le && nouveau_fence(le)->next != fence) - le = nouveau_fence(le)->next; - assert(le && nouveau_fence(le)->next == fence); - nouveau_fence(le)->next = nouveau_fence(fence)->next; - if (nvchan->fence_tail == fence) - nvchan->fence_tail = le; -} - -static void -nouveau_fence_del(struct nouveau_fence **fence) -{ - struct nouveau_fence_priv *nvfence; - - if (!fence || !*fence) - return; - nvfence = nouveau_fence(*fence); - *fence = NULL; - - if (--nvfence->refcount) - return; - - if (nvfence->emitted && !nvfence->signalled) { - if (nvfence->signal_cb) { - nvfence->refcount++; - nouveau_fence_wait((void *)&nvfence); - return; - } - - nouveau_fence_del_unsignalled(&nvfence->base); - } - free(nvfence); -} - -int -nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **fence) -{ - struct nouveau_fence_priv *nvfence; - - if (!chan || !fence || *fence) - return -EINVAL; - - nvfence = calloc(1, sizeof(struct nouveau_fence_priv)); - if (!nvfence) - return -ENOMEM; - nvfence->base.channel = chan; - nvfence->refcount = 1; - - *fence = &nvfence->base; - return 0; -} - -int -nouveau_fence_ref(struct nouveau_fence *ref, struct nouveau_fence **fence) -{ - struct nouveau_fence_priv *nvfence; - - if (!fence) - return -EINVAL; - - if (*fence) { - nouveau_fence_del(fence); - *fence = NULL; - } - - if (ref) { - nvfence = nouveau_fence(ref); - nvfence->refcount++; - *fence = &nvfence->base; - } - - return 0; -} - -int -nouveau_fence_signal_cb(struct nouveau_fence *fence, void (*func)(void *), - void *priv) -{ - struct nouveau_fence_priv *nvfence = nouveau_fence(fence); - struct nouveau_fence_cb *cb; - - if (!nvfence || !func) - return -EINVAL; - - cb = malloc(sizeof(struct nouveau_fence_cb)); - if (!cb) - return -ENOMEM; - - cb->func = func; - cb->priv = priv; - cb->next = nvfence->signal_cb; - nvfence->signal_cb = cb; - return 0; -} - -void -nouveau_fence_emit(struct nouveau_fence *fence) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(fence->channel); - struct nouveau_fence_priv *nvfence = nouveau_fence(fence); - - nvfence->emitted = 1; - nvfence->sequence = ++nvchan->fence_sequence; - if (nvfence->sequence == 0xffffffff) - NOUVEAU_ERR("AII wrap unhandled\n"); - - /*XXX: assumes subc 0 is populated */ - RING_SPACE_CH(fence->channel, 2); - OUT_RING_CH (fence->channel, 0x00040050); - OUT_RING_CH (fence->channel, nvfence->sequence); - - if (nvchan->fence_tail) { - nouveau_fence(nvchan->fence_tail)->next = fence; - } else { - nvchan->fence_head = fence; - } - nvchan->fence_tail = fence; -} - -void -nouveau_fence_flush(struct nouveau_channel *chan) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - uint32_t sequence = *nvchan->ref_cnt; - - while (nvchan->fence_head) { - struct nouveau_fence_priv *nvfence; - - nvfence = nouveau_fence(nvchan->fence_head); - if (nvfence->sequence > sequence) - break; - nouveau_fence_del_unsignalled(&nvfence->base); - nvfence->signalled = 1; - - if (nvfence->signal_cb) { - struct nouveau_fence *fence = NULL; - - nouveau_fence_ref(&nvfence->base, &fence); - - while (nvfence->signal_cb) { - struct nouveau_fence_cb *cb; - - cb = nvfence->signal_cb; - nvfence->signal_cb = cb->next; - cb->func(cb->priv); - free(cb); - } - - nouveau_fence_ref(NULL, &fence); - } - } -} - -int -nouveau_fence_wait(struct nouveau_fence **fence) -{ - struct nouveau_fence_priv *nvfence; - - if (!fence || !*fence) - return -EINVAL; - nvfence = nouveau_fence(*fence); - - if (nvfence->emitted) { - while (!nvfence->signalled) - nouveau_fence_flush(nvfence->base.channel); - } - nouveau_fence_ref(NULL, fence); - - return 0; -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_grobj.c b/src/gallium/winsys/dri/nouveau/nouveau_grobj.c deleted file mode 100644 index 51523897d5..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_grobj.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include - -#include "nouveau_drmif.h" - -int -nouveau_grobj_alloc(struct nouveau_channel *chan, uint32_t handle, - int class, struct nouveau_grobj **grobj) -{ - struct nouveau_device_priv *nvdev = nouveau_device(chan->device); - struct nouveau_grobj_priv *nvgrobj; - struct drm_nouveau_grobj_alloc g; - int ret; - - if (!nvdev || !grobj || *grobj) - return -EINVAL; - - nvgrobj = calloc(1, sizeof(*nvgrobj)); - if (!nvgrobj) - return -ENOMEM; - nvgrobj->base.channel = chan; - nvgrobj->base.handle = handle; - nvgrobj->base.grclass = class; - - g.channel = chan->id; - g.handle = handle; - g.class = class; - ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GROBJ_ALLOC, - &g, sizeof(g)); - if (ret) { - nouveau_grobj_free((void *)&nvgrobj); - return ret; - } - - *grobj = &nvgrobj->base; - return 0; -} - -int -nouveau_grobj_ref(struct nouveau_channel *chan, uint32_t handle, - struct nouveau_grobj **grobj) -{ - struct nouveau_grobj_priv *nvgrobj; - - if (!chan || !grobj || *grobj) - return -EINVAL; - - nvgrobj = calloc(1, sizeof(struct nouveau_grobj_priv)); - if (!nvgrobj) - return -ENOMEM; - nvgrobj->base.channel = chan; - nvgrobj->base.handle = handle; - nvgrobj->base.grclass = 0; - - *grobj = &nvgrobj->base; - return 0; -} - -void -nouveau_grobj_free(struct nouveau_grobj **grobj) -{ - struct nouveau_device_priv *nvdev; - struct nouveau_channel_priv *chan; - struct nouveau_grobj_priv *nvgrobj; - - if (!grobj || !*grobj) - return; - nvgrobj = nouveau_grobj(*grobj); - *grobj = NULL; - - - chan = nouveau_channel(nvgrobj->base.channel); - nvdev = nouveau_device(chan->base.device); - - if (nvgrobj->base.grclass) { - struct drm_nouveau_gpuobj_free f; - - f.channel = chan->drm.channel; - f.handle = nvgrobj->base.handle; - drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE, - &f, sizeof(f)); - } - free(nvgrobj); -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_local.h b/src/gallium/winsys/dri/nouveau/nouveau_local.h deleted file mode 100644 index e878a40803..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_local.h +++ /dev/null @@ -1,117 +0,0 @@ -#ifndef __NOUVEAU_LOCAL_H__ -#define __NOUVEAU_LOCAL_H__ - -#include "pipe/p_compiler.h" -#include "nouveau_winsys_pipe.h" -#include - -struct pipe_buffer; - -/* Debug output */ -#define NOUVEAU_MSG(fmt, args...) do { \ - fprintf(stdout, "nouveau: "fmt, ##args); \ - fflush(stdout); \ -} while(0) - -#define NOUVEAU_ERR(fmt, args...) do { \ - fprintf(stderr, "%s:%d - "fmt, __func__, __LINE__, ##args); \ - fflush(stderr); \ -} while(0) - -#define NOUVEAU_TIME_MSEC() 0 - -/* User FIFO control */ -//#define NOUVEAU_DMA_TRACE -//#define NOUVEAU_DMA_DEBUG -//#define NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF -#define NOUVEAU_DMA_BARRIER -#define NOUVEAU_DMA_TIMEOUT 2000 - -/* Push buffer access macros */ -static INLINE void -OUT_RING(struct nouveau_channel *chan, unsigned data) -{ - *(chan->pushbuf->cur++) = (data); -} - -static INLINE void -OUT_RINGp(struct nouveau_channel *chan, uint32_t *data, unsigned size) -{ - memcpy(chan->pushbuf->cur, data, size * 4); - chan->pushbuf->cur += size; -} - -static INLINE void -OUT_RINGf(struct nouveau_channel *chan, float f) -{ - union { uint32_t i; float f; } c; - c.f = f; - OUT_RING(chan, c.i); -} - -static INLINE void -BEGIN_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr, - unsigned mthd, unsigned size) -{ - if (chan->pushbuf->remaining < (size + 1)) - nouveau_pushbuf_flush(chan, (size + 1)); - OUT_RING(chan, (gr->subc << 13) | (size << 18) | mthd); - chan->pushbuf->remaining -= (size + 1); -} - -static INLINE void -FIRE_RING(struct nouveau_channel *chan) -{ - nouveau_pushbuf_flush(chan, 0); -} - -static INLINE void -BIND_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr, unsigned subc) -{ - gr->subc = subc; - BEGIN_RING(chan, gr, 0x0000, 1); - OUT_RING (chan, gr->handle); -} - -static INLINE void -OUT_RELOC(struct nouveau_channel *chan, struct nouveau_bo *bo, - unsigned data, unsigned flags, unsigned vor, unsigned tor) -{ - nouveau_pushbuf_emit_reloc(chan, chan->pushbuf->cur++, bo, - data, flags, vor, tor); -} - -/* Raw data + flags depending on FB/TT buffer */ -static INLINE void -OUT_RELOCd(struct nouveau_channel *chan, struct nouveau_bo *bo, - unsigned data, unsigned flags, unsigned vor, unsigned tor) -{ - OUT_RELOC(chan, bo, data, flags | NOUVEAU_BO_OR, vor, tor); -} - -/* FB/TT object handle */ -static INLINE void -OUT_RELOCo(struct nouveau_channel *chan, struct nouveau_bo *bo, - unsigned flags) -{ - OUT_RELOC(chan, bo, 0, flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); -} - -/* Low 32-bits of offset */ -static INLINE void -OUT_RELOCl(struct nouveau_channel *chan, struct nouveau_bo *bo, - unsigned delta, unsigned flags) -{ - OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_LOW, 0, 0); -} - -/* High 32-bits of offset */ -static INLINE void -OUT_RELOCh(struct nouveau_channel *chan, struct nouveau_bo *bo, - unsigned delta, unsigned flags) -{ - OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_HIGH, 0, 0); -} - -#endif diff --git a/src/gallium/winsys/dri/nouveau/nouveau_lock.c b/src/gallium/winsys/dri/nouveau/nouveau_lock.c deleted file mode 100644 index 9adb9ac854..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_lock.c +++ /dev/null @@ -1,94 +0,0 @@ -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#include "main/glheader.h" -#include "glapi/glthread.h" -#include - -#include "nouveau_context.h" -#include "nouveau_screen.h" - -_glthread_DECLARE_STATIC_MUTEX( lockMutex ); - -static void -nouveau_contended_lock(struct nouveau_context *nv, GLuint flags) -{ - __DRIdrawablePrivate *dPriv = nv->dri_drawable; - __DRIscreenPrivate *sPriv = nv->dri_screen; - struct nouveau_screen *nv_screen = nv->nv_screen; - struct nouveau_device *dev = nv_screen->device; - struct nouveau_device_priv *nvdev = nouveau_device(dev); - - drmGetLock(nvdev->fd, nvdev->ctx, flags); - - /* If the window moved, may need to set a new cliprect now. - * - * NOTE: This releases and regains the hw lock, so all state - * checking must be done *after* this call: - */ - if (dPriv) - DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv); -} - -/* Lock the hardware and validate our state. - */ -void -LOCK_HARDWARE(struct nouveau_context *nv) -{ - struct nouveau_screen *nv_screen = nv->nv_screen; - struct nouveau_device *dev = nv_screen->device; - struct nouveau_device_priv *nvdev = nouveau_device(dev); - char __ret=0; - - _glthread_LOCK_MUTEX(lockMutex); - assert(!nv->locked); - - DRM_CAS(nvdev->lock, nvdev->ctx, - (DRM_LOCK_HELD | nvdev->ctx), __ret); - - if (__ret) - nouveau_contended_lock(nv, 0); - nv->locked = GL_TRUE; -} - - - /* Unlock the hardware using the global current context - */ -void -UNLOCK_HARDWARE(struct nouveau_context *nv) -{ - struct nouveau_screen *nv_screen = nv->nv_screen; - struct nouveau_device *dev = nv_screen->device; - struct nouveau_device_priv *nvdev = nouveau_device(dev); - - assert(nv->locked); - nv->locked = GL_FALSE; - - DRM_UNLOCK(nvdev->fd, nvdev->lock, nvdev->ctx); - - _glthread_UNLOCK_MUTEX(lockMutex); -} diff --git a/src/gallium/winsys/dri/nouveau/nouveau_notifier.c b/src/gallium/winsys/dri/nouveau/nouveau_notifier.c deleted file mode 100644 index 01e8f38440..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_notifier.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_local.h" - -#define NOTIFIER(__v) \ - struct nouveau_notifier_priv *nvnotify = nouveau_notifier(notifier); \ - volatile uint32_t *__v = (void*)nvnotify->map + (id * 32) - -int -nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle, - int count, struct nouveau_notifier **notifier) -{ - struct nouveau_notifier_priv *nvnotify; - int ret; - - if (!chan || !notifier || *notifier) - return -EINVAL; - - nvnotify = calloc(1, sizeof(struct nouveau_notifier_priv)); - if (!nvnotify) - return -ENOMEM; - nvnotify->base.channel = chan; - nvnotify->base.handle = handle; - - nvnotify->drm.channel = chan->id; - nvnotify->drm.handle = handle; - nvnotify->drm.count = count; - if ((ret = drmCommandWriteRead(nouveau_device(chan->device)->fd, - DRM_NOUVEAU_NOTIFIEROBJ_ALLOC, - &nvnotify->drm, - sizeof(nvnotify->drm)))) { - nouveau_notifier_free((void *)&nvnotify); - return ret; - } - - nvnotify->map = (void *)nouveau_channel(chan)->notifier_block + - nvnotify->drm.offset; - *notifier = &nvnotify->base; - return 0; -} - -void -nouveau_notifier_free(struct nouveau_notifier **notifier) -{ - - struct nouveau_notifier_priv *nvnotify; - struct nouveau_channel_priv *nvchan; - struct nouveau_device_priv *nvdev; - struct drm_nouveau_gpuobj_free f; - - if (!notifier || !*notifier) - return; - nvnotify = nouveau_notifier(*notifier); - *notifier = NULL; - - nvchan = nouveau_channel(nvnotify->base.channel); - nvdev = nouveau_device(nvchan->base.device); - - f.channel = nvchan->drm.channel; - f.handle = nvnotify->base.handle; - drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE, &f, sizeof(f)); - free(nvnotify); -} - -void -nouveau_notifier_reset(struct nouveau_notifier *notifier, int id) -{ - NOTIFIER(n); - - n[NV_NOTIFY_TIME_0 /4] = 0x00000000; - n[NV_NOTIFY_TIME_1 /4] = 0x00000000; - n[NV_NOTIFY_RETURN_VALUE/4] = 0x00000000; - n[NV_NOTIFY_STATE /4] = (NV_NOTIFY_STATE_STATUS_IN_PROCESS << - NV_NOTIFY_STATE_STATUS_SHIFT); -} - -uint32_t -nouveau_notifier_status(struct nouveau_notifier *notifier, int id) -{ - NOTIFIER(n); - - return n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT; -} - -uint32_t -nouveau_notifier_return_val(struct nouveau_notifier *notifier, int id) -{ - NOTIFIER(n); - - return n[NV_NOTIFY_RETURN_VALUE/4]; -} - -int -nouveau_notifier_wait_status(struct nouveau_notifier *notifier, int id, - int status, int timeout) -{ - NOTIFIER(n); - uint32_t time = 0, t_start = NOUVEAU_TIME_MSEC(); - - while (time <= timeout) { - uint32_t v; - - v = n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT; - if (v == status) - return 0; - - if (timeout) - time = NOUVEAU_TIME_MSEC() - t_start; - } - - return -EBUSY; -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_pushbuf.c b/src/gallium/winsys/dri/nouveau/nouveau_pushbuf.c deleted file mode 100644 index 815046ba85..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_pushbuf.c +++ /dev/null @@ -1,271 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_dma.h" - -#define PB_BUFMGR_DWORDS (4096 / 2) -#define PB_MIN_USER_DWORDS 2048 - -static int -nouveau_pushbuf_space(struct nouveau_channel *chan, unsigned min) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_pushbuf_priv *nvpb = &nvchan->pb; - - assert((min + 1) <= nvchan->dma->max); - - /* Wait for enough space in push buffer */ - min = min < PB_MIN_USER_DWORDS ? PB_MIN_USER_DWORDS : min; - min += 1; /* a bit extra for the NOP */ - if (nvchan->dma->free < min) - WAIT_RING_CH(chan, min); - - /* Insert NOP, may turn into a jump later */ - RING_SPACE_CH(chan, 1); - nvpb->nop_jump = nvchan->dma->cur; - OUT_RING_CH(chan, 0); - - /* Any remaining space is available to the user */ - nvpb->start = nvchan->dma->cur; - nvpb->size = nvchan->dma->free; - nvpb->base.channel = chan; - nvpb->base.remaining = nvpb->size; - nvpb->base.cur = &nvchan->pushbuf[nvpb->start]; - - /* Create a new fence object for this "frame" */ - nouveau_fence_ref(NULL, &nvpb->fence); - nouveau_fence_new(chan, &nvpb->fence); - - return 0; -} - -int -nouveau_pushbuf_init(struct nouveau_channel *chan) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *m = &nvchan->dma_master; - struct nouveau_dma_priv *b = &nvchan->dma_bufmgr; - int i; - - if (!nvchan) - return -EINVAL; - - /* Reassign last bit of push buffer for a "separate" bufmgr - * ring buffer - */ - m->max -= PB_BUFMGR_DWORDS; - m->free -= PB_BUFMGR_DWORDS; - - b->base = m->base + ((m->max + 2) << 2); - b->max = PB_BUFMGR_DWORDS - 2; - b->cur = b->put = 0; - b->free = b->max - b->cur; - - /* Some NOPs just to be safe - *XXX: RING_SKIPS - */ - nvchan->dma = b; - RING_SPACE_CH(chan, 8); - for (i = 0; i < 8; i++) - OUT_RING_CH(chan, 0); - nvchan->dma = m; - - nouveau_pushbuf_space(chan, 0); - chan->pushbuf = &nvchan->pb.base; - - nvchan->pb.buffers = calloc(NOUVEAU_PUSHBUF_MAX_BUFFERS, - sizeof(struct nouveau_pushbuf_bo)); - nvchan->pb.relocs = calloc(NOUVEAU_PUSHBUF_MAX_RELOCS, - sizeof(struct nouveau_pushbuf_reloc)); - return 0; -} - -static uint32_t -nouveau_pushbuf_calc_reloc(struct nouveau_bo *bo, - struct nouveau_pushbuf_reloc *r) -{ - uint32_t push; - - if (r->flags & NOUVEAU_BO_LOW) { - push = bo->offset + r->data; - } else - if (r->flags & NOUVEAU_BO_HIGH) { - push = (bo->offset + r->data) >> 32; - } else { - push = r->data; - } - - if (r->flags & NOUVEAU_BO_OR) { - if (bo->flags & NOUVEAU_BO_VRAM) - push |= r->vor; - else - push |= r->tor; - } - - return push; -} - -/* This would be our TTM "superioctl" */ -int -nouveau_pushbuf_flush(struct nouveau_channel *chan, unsigned min) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_pushbuf_priv *nvpb = &nvchan->pb; - int ret, i; - - if (nvpb->base.remaining == nvpb->size) - return 0; - - nouveau_fence_flush(chan); - - nvpb->size -= nvpb->base.remaining; - nvchan->dma->cur += nvpb->size; - nvchan->dma->free -= nvpb->size; - assert(nvchan->dma->cur <= nvchan->dma->max); - - nvchan->dma = &nvchan->dma_bufmgr; - nvchan->pushbuf[nvpb->nop_jump] = 0x20000000 | - (nvchan->dma->base + (nvchan->dma->cur << 2)); - - /* Validate buffers + apply relocations */ - nvchan->user_charge = 0; - for (i = 0; i < nvpb->nr_relocs; i++) { - struct nouveau_pushbuf_reloc *r = &nvpb->relocs[i]; - struct nouveau_pushbuf_bo *pbbo = r->pbbo; - struct nouveau_bo *bo = pbbo->bo; - - /* Validated, mem matches presumed, no relocation necessary */ - if (pbbo->handled & 2) { - if (!(pbbo->handled & 1)) - assert(0); - continue; - } - - /* Not yet validated, do it now */ - if (!(pbbo->handled & 1)) { - ret = nouveau_bo_validate(chan, bo, pbbo->flags); - if (ret) { - assert(0); - return ret; - } - pbbo->handled |= 1; - - if (bo->offset == nouveau_bo(bo)->offset && - bo->flags == nouveau_bo(bo)->flags) { - pbbo->handled |= 2; - continue; - } - bo->offset = nouveau_bo(bo)->offset; - bo->flags = nouveau_bo(bo)->flags; - } - - /* Apply the relocation */ - *r->ptr = nouveau_pushbuf_calc_reloc(bo, r); - } - nvpb->nr_relocs = 0; - - /* Dereference all buffers on validate list */ - for (i = 0; i < nvpb->nr_buffers; i++) { - struct nouveau_pushbuf_bo *pbbo = &nvpb->buffers[i]; - - nouveau_bo(pbbo->bo)->pending = NULL; - nouveau_bo_del(&pbbo->bo); - } - nvpb->nr_buffers = 0; - - /* Switch back to user's ring */ - RING_SPACE_CH(chan, 1); - OUT_RING_CH(chan, 0x20000000 | ((nvpb->start << 2) + - nvchan->dma_master.base)); - nvchan->dma = &nvchan->dma_master; - - /* Fence + kickoff */ - nouveau_fence_emit(nvpb->fence); - FIRE_RING_CH(chan); - - /* Allocate space for next push buffer */ - ret = nouveau_pushbuf_space(chan, min); - assert(!ret); - - return 0; -} - -static struct nouveau_pushbuf_bo * -nouveau_pushbuf_emit_buffer(struct nouveau_channel *chan, struct nouveau_bo *bo) -{ - struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf); - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - struct nouveau_pushbuf_bo *pbbo; - - if (nvbo->pending) - return nvbo->pending; - - if (nvpb->nr_buffers >= NOUVEAU_PUSHBUF_MAX_BUFFERS) - return NULL; - pbbo = nvpb->buffers + nvpb->nr_buffers++; - nvbo->pending = pbbo; - - nouveau_bo_ref(bo->device, bo->handle, &pbbo->bo); - pbbo->channel = chan; - pbbo->flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART; - pbbo->handled = 0; - return pbbo; -} - -int -nouveau_pushbuf_emit_reloc(struct nouveau_channel *chan, void *ptr, - struct nouveau_bo *bo, uint32_t data, uint32_t flags, - uint32_t vor, uint32_t tor) -{ - struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf); - struct nouveau_pushbuf_bo *pbbo; - struct nouveau_pushbuf_reloc *r; - - if (nvpb->nr_relocs >= NOUVEAU_PUSHBUF_MAX_RELOCS) - return -ENOMEM; - - pbbo = nouveau_pushbuf_emit_buffer(chan, bo); - if (!pbbo) - return -ENOMEM; - pbbo->flags |= (flags & NOUVEAU_BO_RDWR); - pbbo->flags &= (flags | NOUVEAU_BO_RDWR); - - r = nvpb->relocs + nvpb->nr_relocs++; - r->pbbo = pbbo; - r->ptr = ptr; - r->flags = flags; - r->data = data; - r->vor = vor; - r->tor = tor; - - if (flags & NOUVEAU_BO_DUMMY) - *(uint32_t *)ptr = 0; - else - *(uint32_t *)ptr = nouveau_pushbuf_calc_reloc(bo, r); - return 0; -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_resource.c b/src/gallium/winsys/dri/nouveau/nouveau_resource.c deleted file mode 100644 index 3bbcb5c45e..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_resource.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_local.h" - -int -nouveau_resource_init(struct nouveau_resource **heap, - unsigned start, unsigned size) -{ - struct nouveau_resource *r; - - r = calloc(1, sizeof(struct nouveau_resource)); - if (!r) - return 1; - - r->start = start; - r->size = size; - *heap = r; - return 0; -} - -int -nouveau_resource_alloc(struct nouveau_resource *heap, int size, void *priv, - struct nouveau_resource **res) -{ - struct nouveau_resource *r; - - if (!heap || !size || !res || *res) - return 1; - - while (heap) { - if (!heap->in_use && heap->size >= size) { - r = calloc(1, sizeof(struct nouveau_resource)); - if (!r) - return 1; - - r->start = (heap->start + heap->size) - size; - r->size = size; - r->in_use = 1; - r->priv = priv; - - heap->size -= size; - - r->next = heap->next; - if (heap->next) - heap->next->prev = r; - r->prev = heap; - heap->next = r; - - *res = r; - return 0; - } - - heap = heap->next; - } - - return 1; -} - -void -nouveau_resource_free(struct nouveau_resource **res) -{ - struct nouveau_resource *r; - - if (!res || !*res) - return; - r = *res; - *res = NULL; - - r->in_use = 0; - - if (r->next && !r->next->in_use) { - struct nouveau_resource *new = r->next; - - new->prev = r->prev; - if (r->prev) - r->prev->next = new; - new->size += r->size; - new->start = r->start; - - free(r); - r = new; - } - - if (r->prev && !r->prev->in_use) { - r->prev->next = r->next; - if (r->next) - r->next->prev = r->prev; - r->prev->size += r->size; - free(r); - } - -} diff --git a/src/gallium/winsys/dri/nouveau/nouveau_screen.c b/src/gallium/winsys/dri/nouveau/nouveau_screen.c deleted file mode 100644 index df1fe7e69b..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_screen.c +++ /dev/null @@ -1,310 +0,0 @@ -#include "utils.h" -#include "vblank.h" -#include "xmlpool.h" - -#include "pipe/p_context.h" -#include "state_tracker/st_public.h" -#include "state_tracker/st_cb_fbo.h" - -#include "nouveau_context.h" -#include "nouveau_drm.h" -#include "nouveau_dri.h" -#include "nouveau_local.h" -#include "nouveau_screen.h" -#include "nouveau_swapbuffers.h" - -#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 11 -#error nouveau_drm.h version does not match expected version -#endif - -/* Extension stuff, enabling of extensions handled by Gallium's GL state - * tracker. But, we still need to define the entry points we want. - */ -#define need_GL_ARB_fragment_program -#define need_GL_ARB_multisample -#define need_GL_ARB_occlusion_query -#define need_GL_ARB_point_parameters -#define need_GL_ARB_shader_objects -#define need_GL_ARB_texture_compression -#define need_GL_ARB_vertex_program -#define need_GL_ARB_vertex_shader -#define need_GL_ARB_vertex_buffer_object -#define need_GL_EXT_compiled_vertex_array -#define need_GL_EXT_fog_coord -#define need_GL_EXT_secondary_color -#define need_GL_EXT_framebuffer_object -#define need_GL_VERSION_2_0 -#define need_GL_VERSION_2_1 -#include "extension_helper.h" - -const struct dri_extension card_extensions[] = -{ - { "GL_ARB_multisample", GL_ARB_multisample_functions }, - { "GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions }, - { "GL_ARB_point_parameters", GL_ARB_point_parameters_functions }, - { "GL_ARB_shader_objects", GL_ARB_shader_objects_functions }, - { "GL_ARB_shading_language_100", GL_VERSION_2_0_functions }, - { "GL_ARB_shading_language_120", GL_VERSION_2_1_functions }, - { "GL_ARB_texture_compression", GL_ARB_texture_compression_functions }, - { "GL_ARB_vertex_program", GL_ARB_vertex_program_functions }, - { "GL_ARB_vertex_shader", GL_ARB_vertex_shader_functions }, - { "GL_ARB_vertex_buffer_object", GL_ARB_vertex_buffer_object_functions }, - { "GL_EXT_compiled_vertex_array", GL_EXT_compiled_vertex_array_functions }, - { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions }, - { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, - { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions }, - { NULL, 0 } -}; - -PUBLIC const char __driConfigOptions[] = -DRI_CONF_BEGIN -DRI_CONF_END; -static const GLuint __driNConfigOptions = 0; - -extern const struct dri_extension common_extensions[]; -extern const struct dri_extension nv40_extensions[]; - -static GLboolean -nouveau_screen_create(__DRIscreenPrivate *driScrnPriv) -{ - struct nouveau_dri *nv_dri = driScrnPriv->pDevPriv; - struct nouveau_screen *nv_screen; - int ret; - - if (driScrnPriv->devPrivSize != sizeof(struct nouveau_dri)) { - NOUVEAU_ERR("DRI struct mismatch between DDX/DRI\n"); - return GL_FALSE; - } - - nv_screen = CALLOC_STRUCT(nouveau_screen); - if (!nv_screen) - return GL_FALSE; - nv_screen->driScrnPriv = driScrnPriv; - driScrnPriv->private = (void *)nv_screen; - - driParseOptionInfo(&nv_screen->option_cache, - __driConfigOptions, __driNConfigOptions); - - if ((ret = nouveau_device_open_existing(&nv_screen->device, 0, - driScrnPriv->fd, 0))) { - NOUVEAU_ERR("Failed opening nouveau device: %d\n", ret); - return GL_FALSE; - } - - nv_screen->front_offset = nv_dri->front_offset; - nv_screen->front_pitch = nv_dri->front_pitch * (nv_dri->bpp / 8); - nv_screen->front_cpp = nv_dri->bpp / 8; - nv_screen->front_height = nv_dri->height; - - return GL_TRUE; -} - -static void -nouveau_screen_destroy(__DRIscreenPrivate *driScrnPriv) -{ - struct nouveau_screen *nv_screen = driScrnPriv->private; - - driScrnPriv->private = NULL; - FREE(nv_screen); -} - -static GLboolean -nouveau_create_buffer(__DRIscreenPrivate * driScrnPriv, - __DRIdrawablePrivate * driDrawPriv, - const __GLcontextModes *glVis, GLboolean pixmapBuffer) -{ - struct nouveau_framebuffer *nvfb; - enum pipe_format colour, depth, stencil; - - if (pixmapBuffer) - return GL_FALSE; - - nvfb = CALLOC_STRUCT(nouveau_framebuffer); - if (!nvfb) - return GL_FALSE; - - if (glVis->redBits == 5) - colour = PIPE_FORMAT_R5G6B5_UNORM; - else - colour = PIPE_FORMAT_A8R8G8B8_UNORM; - - if (glVis->depthBits == 16) - depth = PIPE_FORMAT_Z16_UNORM; - else if (glVis->depthBits == 24) - depth = PIPE_FORMAT_Z24S8_UNORM; - else - depth = PIPE_FORMAT_NONE; - - if (glVis->stencilBits == 8) - stencil = PIPE_FORMAT_Z24S8_UNORM; - else - stencil = PIPE_FORMAT_NONE; - - nvfb->stfb = st_create_framebuffer(glVis, colour, depth, stencil, - driDrawPriv->w, driDrawPriv->h, - (void*)nvfb); - if (!nvfb->stfb) { - free(nvfb); - return GL_FALSE; - } - - driDrawPriv->driverPrivate = (void *)nvfb; - return GL_TRUE; -} - -static void -nouveau_destroy_buffer(__DRIdrawablePrivate * driDrawPriv) -{ - struct nouveau_framebuffer *nvfb; - - nvfb = (struct nouveau_framebuffer *)driDrawPriv->driverPrivate; - st_unreference_framebuffer(&nvfb->stfb); - free(nvfb); -} - -static struct __DriverAPIRec -nouveau_api = { - .InitDriver = nouveau_screen_create, - .DestroyScreen = nouveau_screen_destroy, - .CreateContext = nouveau_context_create, - .DestroyContext = nouveau_context_destroy, - .CreateBuffer = nouveau_create_buffer, - .DestroyBuffer = nouveau_destroy_buffer, - .SwapBuffers = nouveau_swap_buffers, - .MakeCurrent = nouveau_context_bind, - .UnbindContext = nouveau_context_unbind, - .GetSwapInfo = NULL, - .GetMSC = NULL, - .WaitForMSC = NULL, - .WaitForSBC = NULL, - .SwapBuffersMSC = NULL, - .CopySubBuffer = nouveau_copy_sub_buffer, - .setTexOffset = NULL -}; - -static __GLcontextModes * -nouveau_fill_in_modes(unsigned pixel_bits, unsigned depth_bits, - unsigned stencil_bits, GLboolean have_back_buffer) -{ - __GLcontextModes * modes; - __GLcontextModes * m; - unsigned num_modes; - unsigned depth_buffer_factor; - unsigned back_buffer_factor; - int i; - - static const struct { - GLenum format; - GLenum type; - } fb_format_array[] = { - { GL_RGB , GL_UNSIGNED_SHORT_5_6_5 }, - { GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV }, - { GL_BGR , GL_UNSIGNED_INT_8_8_8_8_REV }, - }; - - /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't - * support pageflipping at all. - */ - static const GLenum back_buffer_modes[] = { - GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML - }; - - uint8_t depth_bits_array[4] = { 0, 16, 24, 24 }; - uint8_t stencil_bits_array[4] = { 0, 0, 0, 8 }; - uint8_t msaa_samples_array[1] = { 0 }; - - depth_buffer_factor = 4; - back_buffer_factor = (have_back_buffer) ? 3 : 1; - - num_modes = ((pixel_bits==16) ? 1 : 2) * - depth_buffer_factor * back_buffer_factor * 4; - modes = (*dri_interface->createContextModes)(num_modes, - sizeof(__GLcontextModes)); - m = modes; - - for (i=((pixel_bits==16)?0:1);i<((pixel_bits==16)?1:3);i++) { - if (!driFillInModes(&m, fb_format_array[i].format, - fb_format_array[i].type, - depth_bits_array, - stencil_bits_array, - depth_buffer_factor, - back_buffer_modes, - back_buffer_factor, - msaa_samples_array, 1, - GLX_TRUE_COLOR)) { - fprintf( stderr, "[%s:%u] Error creating FBConfig!\n", - __func__, __LINE__ ); - return NULL; - } - - if (!driFillInModes(&m, fb_format_array[i].format, - fb_format_array[i].type, - depth_bits_array, - stencil_bits_array, - depth_buffer_factor, - back_buffer_modes, - back_buffer_factor, - msaa_samples_array, 1, - GLX_DIRECT_COLOR)) { - fprintf( stderr, "[%s:%u] Error creating FBConfig!\n", - __func__, __LINE__ ); - return NULL; - } - } - - return modes; -} -PUBLIC void * -__driCreateNewScreen_20050727(__DRInativeDisplay *dpy, int scrn, - __DRIscreen *psc, const __GLcontextModes * modes, - const __DRIversion * ddx_version, - const __DRIversion * dri_version, - const __DRIversion * drm_version, - const __DRIframebuffer * frame_buffer, - void * pSAREA, int fd, int internal_api_version, - const __DRIinterfaceMethods * interface, - __GLcontextModes ** driver_modes) -{ - __DRIscreenPrivate *psp; - static const __DRIversion ddx_expected = - { 0, 0, NOUVEAU_DRM_HEADER_PATCHLEVEL }; - static const __DRIversion dri_expected = { 4, 0, 0 }; - static const __DRIversion drm_expected = - { 0, 0, NOUVEAU_DRM_HEADER_PATCHLEVEL }; - struct nouveau_dri *nv_dri = NULL; - - dri_interface = interface; - - if (!driCheckDriDdxDrmVersions2("nouveau", - dri_version, &dri_expected, - ddx_version, &ddx_expected, - drm_version, &drm_expected)) { - return NULL; - } - - if (drm_expected.patch != drm_version->patch) { - fprintf(stderr, "Incompatible DRM patch level.\n" - "Expected: %d\n" "Current : %d\n", - drm_expected.patch, drm_version->patch); - return NULL; - } - - psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL, - ddx_version, dri_version, drm_version, - frame_buffer, pSAREA, fd, - internal_api_version, - &nouveau_api); - if (psp == NULL) - return NULL; - nv_dri = psp->pDevPriv; - - *driver_modes = nouveau_fill_in_modes(nv_dri->bpp, - (nv_dri->bpp == 16) ? 16 : 24, - (nv_dri->bpp == 16) ? 0 : 8, - 1); - - driInitExtensions(NULL, card_extensions, GL_FALSE); - - return (void *)psp; -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_screen.h b/src/gallium/winsys/dri/nouveau/nouveau_screen.h deleted file mode 100644 index 388d6be9bb..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_screen.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __NOUVEAU_SCREEN_H__ -#define __NOUVEAU_SCREEN_H__ - -#include "xmlconfig.h" - -struct nouveau_screen { - __DRIscreenPrivate *driScrnPriv; - driOptionCache option_cache; - - struct nouveau_device *device; - - uint32_t front_offset; - uint32_t front_pitch; - uint32_t front_cpp; - uint32_t front_height; - - void *nvc; -}; - -#endif diff --git a/src/gallium/winsys/dri/nouveau/nouveau_swapbuffers.c b/src/gallium/winsys/dri/nouveau/nouveau_swapbuffers.c deleted file mode 100644 index 70e0104e83..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_swapbuffers.c +++ /dev/null @@ -1,86 +0,0 @@ -#include "main/glheader.h" -#include "glapi/glthread.h" -#include - -#include "pipe/p_context.h" -#include "state_tracker/st_public.h" -#include "state_tracker/st_context.h" -#include "state_tracker/st_cb_fbo.h" - -#include "nouveau_context.h" -#include "nouveau_local.h" -#include "nouveau_screen.h" -#include "nouveau_swapbuffers.h" - -void -nouveau_copy_buffer(__DRIdrawablePrivate *dPriv, struct pipe_surface *surf, - const drm_clip_rect_t *rect) -{ - struct nouveau_context *nv = dPriv->driContextPriv->driverPrivate; - drm_clip_rect_t *pbox; - int nbox, i; - - LOCK_HARDWARE(nv); - if (!dPriv->numClipRects) { - UNLOCK_HARDWARE(nv); - return; - } - pbox = dPriv->pClipRects; - nbox = dPriv->numClipRects; - - nv->surface_copy_prep(nv, nv->frontbuffer, surf); - for (i = 0; i < nbox; i++, pbox++) { - int sx, sy, dx, dy, w, h; - - sx = pbox->x1 - dPriv->x; - sy = pbox->y1 - dPriv->y; - dx = pbox->x1; - dy = pbox->y1; - w = pbox->x2 - pbox->x1; - h = pbox->y2 - pbox->y1; - - nv->surface_copy(nv, dx, dy, sx, sy, w, h); - } - - FIRE_RING(nv->nvc->channel); - UNLOCK_HARDWARE(nv); - - if (nv->last_stamp != dPriv->lastStamp) { - struct nouveau_framebuffer *nvfb = dPriv->driverPrivate; - st_resize_framebuffer(nvfb->stfb, dPriv->w, dPriv->h); - nv->last_stamp = dPriv->lastStamp; - } -} - -void -nouveau_copy_sub_buffer(__DRIdrawablePrivate *dPriv, int x, int y, int w, int h) -{ - struct nouveau_framebuffer *nvfb = dPriv->driverPrivate; - struct pipe_surface *surf; - - surf = st_get_framebuffer_surface(nvfb->stfb, ST_SURFACE_BACK_LEFT); - if (surf) { - drm_clip_rect_t rect; - rect.x1 = x; - rect.y1 = y; - rect.x2 = x + w; - rect.y2 = y + h; - - st_notify_swapbuffers(nvfb->stfb); - nouveau_copy_buffer(dPriv, surf, &rect); - } -} - -void -nouveau_swap_buffers(__DRIdrawablePrivate *dPriv) -{ - struct nouveau_framebuffer *nvfb = dPriv->driverPrivate; - struct pipe_surface *surf; - - surf = st_get_framebuffer_surface(nvfb->stfb, ST_SURFACE_BACK_LEFT); - if (surf) { - st_notify_swapbuffers(nvfb->stfb); - nouveau_copy_buffer(dPriv, surf, NULL); - } -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_swapbuffers.h b/src/gallium/winsys/dri/nouveau/nouveau_swapbuffers.h deleted file mode 100644 index 825d3da6da..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_swapbuffers.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __NOUVEAU_SWAPBUFFERS_H__ -#define __NOUVEAU_SWAPBUFFERS_H__ - -extern void nouveau_copy_buffer(__DRIdrawablePrivate *, struct pipe_surface *, - const drm_clip_rect_t *); -extern void nouveau_copy_sub_buffer(__DRIdrawablePrivate *, - int x, int y, int w, int h); -extern void nouveau_swap_buffers(__DRIdrawablePrivate *); - -#endif diff --git a/src/gallium/winsys/dri/nouveau/nouveau_winsys.c b/src/gallium/winsys/dri/nouveau/nouveau_winsys.c deleted file mode 100644 index 5eabbc8893..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_winsys.c +++ /dev/null @@ -1,158 +0,0 @@ -#include "pipe/p_util.h" - -#include "nouveau_context.h" -#include "nouveau_screen.h" -#include "nouveau_winsys_pipe.h" - -#include "nouveau/nouveau_winsys.h" - -static int -nouveau_pipe_notifier_alloc(struct nouveau_winsys *nvws, int count, - struct nouveau_notifier **notify) -{ - struct nouveau_context *nv = nvws->nv; - - return nouveau_notifier_alloc(nv->nvc->channel, nv->nvc->next_handle++, - count, notify); -} - -static int -nouveau_pipe_grobj_alloc(struct nouveau_winsys *nvws, int grclass, - struct nouveau_grobj **grobj) -{ - struct nouveau_context *nv = nvws->nv; - struct nouveau_channel *chan = nv->nvc->channel; - int ret; - - ret = nouveau_grobj_alloc(chan, nv->nvc->next_handle++, - grclass, grobj); - if (ret) - return ret; - - assert(nv->nvc->next_subchannel < 7); - BIND_RING(chan, *grobj, nv->nvc->next_subchannel++); - return 0; -} - -static int -nouveau_pipe_surface_copy(struct nouveau_winsys *nvws, struct pipe_surface *dst, - unsigned dx, unsigned dy, struct pipe_surface *src, - unsigned sx, unsigned sy, unsigned w, unsigned h) -{ - struct nouveau_context *nv = nvws->nv; - - if (nv->surface_copy_prep(nv, dst, src)) - return 1; - nv->surface_copy(nv, dx, dy, sx, sy, w, h); - nv->surface_copy_done(nv); - - return 0; -} - -static int -nouveau_pipe_surface_fill(struct nouveau_winsys *nvws, struct pipe_surface *dst, - unsigned dx, unsigned dy, unsigned w, unsigned h, - unsigned value) -{ - if (nvws->nv->surface_fill(nvws->nv, dst, dx, dy, w, h, value)) - return 1; - return 0; -} - -static int -nouveau_pipe_push_reloc(struct nouveau_winsys *nvws, void *ptr, - struct pipe_buffer *buf, uint32_t data, - uint32_t flags, uint32_t vor, uint32_t tor) -{ - return nouveau_pushbuf_emit_reloc(nvws->channel, ptr, - nouveau_buffer(buf)->bo, - data, flags, vor, tor); -} - -static int -nouveau_pipe_push_flush(struct nouveau_winsys *nvws, unsigned size, - struct pipe_fence_handle **fence) -{ - if (fence) { - struct nouveau_pushbuf *pb = nvws->channel->pushbuf; - struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(pb); - struct nouveau_fence *ref = NULL; - - nouveau_fence_ref(nvpb->fence, &ref); - *fence = (struct pipe_fence_handle *)ref; - } - - return nouveau_pushbuf_flush(nvws->channel, size); -} - -struct pipe_context * -nouveau_pipe_create(struct nouveau_context *nv) -{ - struct nouveau_channel_context *nvc = nv->nvc; - struct nouveau_winsys *nvws = CALLOC_STRUCT(nouveau_winsys); - struct pipe_screen *(*hws_create)(struct pipe_winsys *, - struct nouveau_winsys *); - struct pipe_context *(*hw_create)(struct pipe_screen *, unsigned); - struct pipe_winsys *ws; - unsigned chipset = nv->nv_screen->device->chipset; - - if (!nvws) - return NULL; - - switch (chipset & 0xf0) { - case 0x10: - case 0x20: - hws_create = nv10_screen_create; - hw_create = nv10_create; - break; - case 0x30: - hws_create = nv30_screen_create; - hw_create = nv30_create; - break; - case 0x40: - case 0x60: - hws_create = nv40_screen_create; - hw_create = nv40_create; - break; - case 0x50: - case 0x80: - case 0x90: - hws_create = nv50_screen_create; - hw_create = nv50_create; - break; - default: - NOUVEAU_ERR("Unknown chipset NV%02x\n", chipset); - return NULL; - } - - nvws->nv = nv; - nvws->channel = nv->nvc->channel; - - nvws->res_init = nouveau_resource_init; - nvws->res_alloc = nouveau_resource_alloc; - nvws->res_free = nouveau_resource_free; - - nvws->push_reloc = nouveau_pipe_push_reloc; - nvws->push_flush = nouveau_pipe_push_flush; - - nvws->grobj_alloc = nouveau_pipe_grobj_alloc; - nvws->grobj_free = nouveau_grobj_free; - - nvws->notifier_alloc = nouveau_pipe_notifier_alloc; - nvws->notifier_free = nouveau_notifier_free; - nvws->notifier_reset = nouveau_notifier_reset; - nvws->notifier_status = nouveau_notifier_status; - nvws->notifier_retval = nouveau_notifier_return_val; - nvws->notifier_wait = nouveau_notifier_wait_status; - - nvws->surface_copy = nouveau_pipe_surface_copy; - nvws->surface_fill = nouveau_pipe_surface_fill; - - ws = nouveau_create_pipe_winsys(nv); - - if (!nvc->pscreen) - nvc->pscreen = hws_create(ws, nvws); - nvc->pctx[nv->pctx_id] = hw_create(nvc->pscreen, nv->pctx_id); - return nvc->pctx[nv->pctx_id]; -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c b/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c deleted file mode 100644 index 8a2870a2ff..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.c +++ /dev/null @@ -1,205 +0,0 @@ -#include "pipe/p_winsys.h" -#include "pipe/p_defines.h" -#include "pipe/p_util.h" -#include "pipe/p_inlines.h" - -#include "nouveau_context.h" -#include "nouveau_local.h" -#include "nouveau_screen.h" -#include "nouveau_swapbuffers.h" -#include "nouveau_winsys_pipe.h" - -static void -nouveau_flush_frontbuffer(struct pipe_winsys *pws, struct pipe_surface *surf, - void *context_private) -{ - struct nouveau_context *nv = context_private; - __DRIdrawablePrivate *dPriv = nv->dri_drawable; - - nouveau_copy_buffer(dPriv, surf, NULL); -} - -static const char * -nouveau_get_name(struct pipe_winsys *pws) -{ - return "Nouveau/DRI"; -} - -static struct pipe_buffer * -nouveau_pipe_bo_create(struct pipe_winsys *pws, unsigned alignment, - unsigned usage, unsigned size) -{ - struct nouveau_pipe_winsys *nvpws = (struct nouveau_pipe_winsys *)pws; - struct nouveau_context *nv = nvpws->nv; - struct nouveau_device *dev = nv->nv_screen->device; - struct nouveau_pipe_buffer *nvbuf; - uint32_t flags; - - nvbuf = calloc(1, sizeof(*nvbuf)); - if (!nvbuf) - return NULL; - nvbuf->base.refcount = 1; - nvbuf->base.alignment = alignment; - nvbuf->base.usage = usage; - nvbuf->base.size = size; - - flags = NOUVEAU_BO_LOCAL; - - if (usage & PIPE_BUFFER_USAGE_PIXEL) { - if (usage & NOUVEAU_BUFFER_USAGE_TEXTURE) - flags |= NOUVEAU_BO_GART; - flags |= NOUVEAU_BO_VRAM; - - switch (dev->chipset & 0xf0) { - case 0x50: - case 0x80: - case 0x90: - flags |= NOUVEAU_BO_TILED; - if (usage & NOUVEAU_BUFFER_USAGE_ZETA) - flags |= NOUVEAU_BO_ZTILE; - break; - default: - break; - } - } - - if (usage & PIPE_BUFFER_USAGE_VERTEX) { - if (nv->cap.hw_vertex_buffer) - flags |= NOUVEAU_BO_GART; - } - - if (usage & PIPE_BUFFER_USAGE_INDEX) { - if (nv->cap.hw_index_buffer) - flags |= NOUVEAU_BO_GART; - } - - if (nouveau_bo_new(dev, flags, alignment, size, &nvbuf->bo)) { - free(nvbuf); - return NULL; - } - - return &nvbuf->base; -} - -static struct pipe_buffer * -nouveau_pipe_bo_user_create(struct pipe_winsys *pws, void *ptr, unsigned bytes) -{ - struct nouveau_pipe_winsys *nvpws = (struct nouveau_pipe_winsys *)pws; - struct nouveau_device *dev = nvpws->nv->nv_screen->device; - struct nouveau_pipe_buffer *nvbuf; - - nvbuf = calloc(1, sizeof(*nvbuf)); - if (!nvbuf) - return NULL; - nvbuf->base.refcount = 1; - nvbuf->base.size = bytes; - - if (nouveau_bo_user(dev, ptr, bytes, &nvbuf->bo)) { - free(nvbuf); - return NULL; - } - - return &nvbuf->base; -} - -static void -nouveau_pipe_bo_del(struct pipe_winsys *ws, struct pipe_buffer *buf) -{ - struct nouveau_pipe_buffer *nvbuf = nouveau_buffer(buf); - - nouveau_bo_del(&nvbuf->bo); - free(nvbuf); -} - -static void * -nouveau_pipe_bo_map(struct pipe_winsys *pws, struct pipe_buffer *buf, - unsigned flags) -{ - struct nouveau_pipe_buffer *nvbuf = nouveau_buffer(buf); - uint32_t map_flags = 0; - - if (flags & PIPE_BUFFER_USAGE_CPU_READ) - map_flags |= NOUVEAU_BO_RD; - if (flags & PIPE_BUFFER_USAGE_CPU_WRITE) - map_flags |= NOUVEAU_BO_WR; - - if (nouveau_bo_map(nvbuf->bo, map_flags)) - return NULL; - return nvbuf->bo->map; -} - -static void -nouveau_pipe_bo_unmap(struct pipe_winsys *pws, struct pipe_buffer *buf) -{ - struct nouveau_pipe_buffer *nvbuf = nouveau_buffer(buf); - - nouveau_bo_unmap(nvbuf->bo); -} - -static INLINE struct nouveau_fence * -nouveau_pipe_fence(struct pipe_fence_handle *pfence) -{ - return (struct nouveau_fence *)pfence; -} - -static void -nouveau_pipe_fence_reference(struct pipe_winsys *ws, - struct pipe_fence_handle **ptr, - struct pipe_fence_handle *pfence) -{ - nouveau_fence_ref((void *)pfence, (void *)ptr); -} - -static int -nouveau_pipe_fence_signalled(struct pipe_winsys *ws, - struct pipe_fence_handle *pfence, unsigned flag) -{ - struct nouveau_pipe_winsys *nvpws = (struct nouveau_pipe_winsys *)ws; - struct nouveau_fence *fence = nouveau_pipe_fence(pfence); - - if (nouveau_fence(fence)->signalled == 0) - nouveau_fence_flush(nvpws->nv->nvc->channel); - - return !nouveau_fence(fence)->signalled; -} - -static int -nouveau_pipe_fence_finish(struct pipe_winsys *ws, - struct pipe_fence_handle *pfence, unsigned flag) -{ - struct nouveau_fence *fence = nouveau_pipe_fence(pfence); - struct nouveau_fence *ref = NULL; - - nouveau_fence_ref(fence, &ref); - return nouveau_fence_wait(&ref); -} - -struct pipe_winsys * -nouveau_create_pipe_winsys(struct nouveau_context *nv) -{ - struct nouveau_pipe_winsys *nvpws; - struct pipe_winsys *pws; - - nvpws = CALLOC_STRUCT(nouveau_pipe_winsys); - if (!nvpws) - return NULL; - nvpws->nv = nv; - pws = &nvpws->pws; - - pws->flush_frontbuffer = nouveau_flush_frontbuffer; - - pws->buffer_create = nouveau_pipe_bo_create; - pws->buffer_destroy = nouveau_pipe_bo_del; - pws->user_buffer_create = nouveau_pipe_bo_user_create; - pws->buffer_map = nouveau_pipe_bo_map; - pws->buffer_unmap = nouveau_pipe_bo_unmap; - - pws->fence_reference = nouveau_pipe_fence_reference; - pws->fence_signalled = nouveau_pipe_fence_signalled; - pws->fence_finish = nouveau_pipe_fence_finish; - - pws->get_name = nouveau_get_name; - - return &nvpws->pws; -} - diff --git a/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.h b/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.h deleted file mode 100644 index 6a03ac0d77..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_winsys_pipe.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef NOUVEAU_PIPE_WINSYS_H -#define NOUVEAU_PIPE_WINSYS_H - -#include "pipe/p_context.h" -#include "pipe/p_winsys.h" -#include "nouveau_context.h" - -struct nouveau_pipe_buffer { - struct pipe_buffer base; - struct nouveau_bo *bo; -}; - -static inline struct nouveau_pipe_buffer * -nouveau_buffer(struct pipe_buffer *buf) -{ - return (struct nouveau_pipe_buffer *)buf; -} - -struct nouveau_pipe_winsys { - struct pipe_winsys pws; - - struct nouveau_context *nv; -}; - -extern struct pipe_winsys * -nouveau_create_pipe_winsys(struct nouveau_context *nv); - -struct pipe_context * -nouveau_create_softpipe(struct nouveau_context *nv); - -struct pipe_context * -nouveau_pipe_create(struct nouveau_context *nv); - -#endif diff --git a/src/gallium/winsys/dri/nouveau/nouveau_winsys_softpipe.c b/src/gallium/winsys/dri/nouveau/nouveau_winsys_softpipe.c deleted file mode 100644 index 704f6c7750..0000000000 --- a/src/gallium/winsys/dri/nouveau/nouveau_winsys_softpipe.c +++ /dev/null @@ -1,85 +0,0 @@ -/************************************************************************** - * - * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * - **************************************************************************/ -/* - * Authors: Keith Whitwell - */ - -#include "imports.h" - -#include "pipe/p_defines.h" -#include "pipe/p_format.h" -#include "softpipe/sp_winsys.h" - -#include "nouveau_context.h" -#include "nouveau_winsys_pipe.h" - -struct nouveau_softpipe_winsys { - struct softpipe_winsys sws; - struct nouveau_context *nv; -}; - -/** - * Return list of surface formats supported by this driver. - */ -static boolean -nouveau_is_format_supported(struct softpipe_winsys *sws, uint format) -{ - switch (format) { - case PIPE_FORMAT_A8R8G8B8_UNORM: - case PIPE_FORMAT_R5G6B5_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: - return TRUE; - default: - break; - }; - - return FALSE; -} - -struct pipe_context * -nouveau_create_softpipe(struct nouveau_context *nv) -{ - struct nouveau_softpipe_winsys *nvsws; - struct pipe_screen *pscreen; - struct pipe_winsys *ws; - - ws = nouveau_create_pipe_winsys(nv); - if (!ws) - return NULL; - pscreen = softpipe_create_screen(ws); - - nvsws = CALLOC_STRUCT(nouveau_softpipe_winsys); - if (!nvsws) - return NULL; - - nvsws->sws.is_format_supported = nouveau_is_format_supported; - nvsws->nv = nv; - - return softpipe_create(pscreen, ws, &nvsws->sws); -} - diff --git a/src/gallium/winsys/dri/nouveau/nv04_surface.c b/src/gallium/winsys/dri/nouveau/nv04_surface.c deleted file mode 100644 index 8fa3d106c8..0000000000 --- a/src/gallium/winsys/dri/nouveau/nv04_surface.c +++ /dev/null @@ -1,314 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_format.h" - -#include "nouveau_context.h" - -static INLINE int -nv04_surface_format(enum pipe_format format) -{ - switch (format) { - case PIPE_FORMAT_A8_UNORM: - return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8; - case PIPE_FORMAT_R5G6B5_UNORM: - return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5; - case PIPE_FORMAT_A8R8G8B8_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: - return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32; - default: - return -1; - } -} - -static INLINE int -nv04_rect_format(enum pipe_format format) -{ - switch (format) { - case PIPE_FORMAT_A8_UNORM: - return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; - case PIPE_FORMAT_R5G6B5_UNORM: - return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5; - case PIPE_FORMAT_A8R8G8B8_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: - return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; - default: - return -1; - } -} - -static void -nv04_surface_copy_m2mf(struct nouveau_context *nv, unsigned dx, unsigned dy, - unsigned sx, unsigned sy, unsigned w, unsigned h) -{ - struct nouveau_channel *chan = nv->nvc->channel; - struct pipe_surface *dst = nv->surf_dst; - struct pipe_surface *src = nv->surf_src; - unsigned dst_offset, src_offset; - - dst_offset = dst->offset + (dy * dst->stride) + (dx * dst->block.size); - src_offset = src->offset + (sy * src->stride) + (sx * src->block.size); - - while (h) { - int count = (h > 2047) ? 2047 : h; - - BEGIN_RING(chan, nv->nvc->NvM2MF, - NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); - OUT_RELOCl(chan, nouveau_buffer(src->buffer)->bo, src_offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD); - OUT_RELOCl(chan, nouveau_buffer(dst->buffer)->bo, dst_offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_WR); - OUT_RING (chan, src->stride); - OUT_RING (chan, dst->stride); - OUT_RING (chan, w * src->block.size); - OUT_RING (chan, count); - OUT_RING (chan, 0x0101); - OUT_RING (chan, 0); - - h -= count; - src_offset += src->stride * count; - dst_offset += dst->stride * count; - } -} - -static void -nv04_surface_copy_blit(struct nouveau_context *nv, unsigned dx, unsigned dy, - unsigned sx, unsigned sy, unsigned w, unsigned h) -{ - struct nouveau_channel *chan = nv->nvc->channel; - - BEGIN_RING(chan, nv->nvc->NvImageBlit, 0x0300, 3); - OUT_RING (chan, (sy << 16) | sx); - OUT_RING (chan, (dy << 16) | dx); - OUT_RING (chan, ( h << 16) | w); -} - -static int -nv04_surface_copy_prep(struct nouveau_context *nv, struct pipe_surface *dst, - struct pipe_surface *src) -{ - struct nouveau_channel *chan = nv->nvc->channel; - int format; - - if (src->format != dst->format) - return 1; - - /* NV_CONTEXT_SURFACES_2D has buffer alignment restrictions, fallback - * to NV_MEMORY_TO_MEMORY_FORMAT in this case. - */ - if ((src->offset & 63) || (dst->offset & 63)) { - BEGIN_RING(nv->nvc->channel, nv->nvc->NvM2MF, - NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2); - OUT_RELOCo(chan, nouveau_buffer(src->buffer)->bo, - NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - OUT_RELOCo(chan, nouveau_buffer(dst->buffer)->bo, - NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - - nv->surface_copy = nv04_surface_copy_m2mf; - nv->surf_dst = dst; - nv->surf_src = src; - return 0; - - } - - if ((format = nv04_surface_format(dst->format)) < 0) { - NOUVEAU_ERR("Bad surface format 0x%x\n", dst->format); - return 1; - } - nv->surface_copy = nv04_surface_copy_blit; - - BEGIN_RING(chan, nv->nvc->NvCtxSurf2D, - NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); - OUT_RELOCo(chan, nouveau_buffer(src->buffer)->bo, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - OUT_RELOCo(chan, nouveau_buffer(dst->buffer)->bo, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - - BEGIN_RING(chan, nv->nvc->NvCtxSurf2D, - NV04_CONTEXT_SURFACES_2D_FORMAT, 4); - OUT_RING (chan, format); - OUT_RING (chan, (dst->stride << 16) | src->stride); - OUT_RELOCl(chan, nouveau_buffer(src->buffer)->bo, src->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - OUT_RELOCl(chan, nouveau_buffer(dst->buffer)->bo, dst->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - - return 0; -} - -static void -nv04_surface_copy_done(struct nouveau_context *nv) -{ - FIRE_RING(nv->nvc->channel); -} - -static int -nv04_surface_fill(struct nouveau_context *nv, struct pipe_surface *dst, - unsigned dx, unsigned dy, unsigned w, unsigned h, - unsigned value) -{ - struct nouveau_channel *chan = nv->nvc->channel; - struct nouveau_grobj *surf2d = nv->nvc->NvCtxSurf2D; - struct nouveau_grobj *rect = nv->nvc->NvGdiRect; - int cs2d_format, gdirect_format; - - if ((cs2d_format = nv04_surface_format(dst->format)) < 0) { - NOUVEAU_ERR("Bad format = %d\n", dst->format); - return 1; - } - - if ((gdirect_format = nv04_rect_format(dst->format)) < 0) { - NOUVEAU_ERR("Bad format = %d\n", dst->format); - return 1; - } - - BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); - OUT_RELOCo(chan, nouveau_buffer(dst->buffer)->bo, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - OUT_RELOCo(chan, nouveau_buffer(dst->buffer)->bo, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4); - OUT_RING (chan, cs2d_format); - OUT_RING (chan, (dst->stride << 16) | dst->stride); - OUT_RELOCl(chan, nouveau_buffer(dst->buffer)->bo, dst->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - OUT_RELOCl(chan, nouveau_buffer(dst->buffer)->bo, dst->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - - BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT, 1); - OUT_RING (chan, gdirect_format); - BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR1_A, 1); - OUT_RING (chan, value); - BEGIN_RING(chan, rect, - NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT(0), 2); - OUT_RING (chan, (dx << 16) | dy); - OUT_RING (chan, ( w << 16) | h); - - FIRE_RING(chan); - return 0; -} - -int -nouveau_surface_channel_create_nv04(struct nouveau_channel_context *nvc) -{ - struct nouveau_channel *chan = nvc->channel; - unsigned chipset = nvc->channel->device->chipset, class; - int ret; - - if ((ret = nouveau_grobj_alloc(chan, nvc->next_handle++, 0x39, - &nvc->NvM2MF))) { - NOUVEAU_ERR("Error creating m2mf object: %d\n", ret); - return 1; - } - BIND_RING (chan, nvc->NvM2MF, nvc->next_subchannel++); - BEGIN_RING(chan, nvc->NvM2MF, - NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1); - OUT_RING (chan, nvc->sync_notifier->handle); - - class = chipset < 0x10 ? NV04_CONTEXT_SURFACES_2D : - NV10_CONTEXT_SURFACES_2D; - if ((ret = nouveau_grobj_alloc(chan, nvc->next_handle++, class, - &nvc->NvCtxSurf2D))) { - NOUVEAU_ERR("Error creating 2D surface object: %d\n", ret); - return 1; - } - BIND_RING (chan, nvc->NvCtxSurf2D, nvc->next_subchannel++); - BEGIN_RING(chan, nvc->NvCtxSurf2D, - NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); - OUT_RING (chan, nvc->channel->vram->handle); - OUT_RING (chan, nvc->channel->vram->handle); - - class = chipset < 0x10 ? NV04_IMAGE_BLIT : NV12_IMAGE_BLIT; - if ((ret = nouveau_grobj_alloc(chan, nvc->next_handle++, class, - &nvc->NvImageBlit))) { - NOUVEAU_ERR("Error creating blit object: %d\n", ret); - return 1; - } - BIND_RING (chan, nvc->NvImageBlit, nvc->next_subchannel++); - BEGIN_RING(chan, nvc->NvImageBlit, NV04_IMAGE_BLIT_DMA_NOTIFY, 1); - OUT_RING (chan, nvc->sync_notifier->handle); - BEGIN_RING(chan, nvc->NvImageBlit, NV04_IMAGE_BLIT_SURFACE, 1); - OUT_RING (chan, nvc->NvCtxSurf2D->handle); - BEGIN_RING(chan, nvc->NvImageBlit, NV04_IMAGE_BLIT_OPERATION, 1); - OUT_RING (chan, NV04_IMAGE_BLIT_OPERATION_SRCCOPY); - - class = NV04_GDI_RECTANGLE_TEXT; - if ((ret = nouveau_grobj_alloc(chan, nvc->next_handle++, class, - &nvc->NvGdiRect))) { - NOUVEAU_ERR("Error creating rect object: %d\n", ret); - return 1; - } - BIND_RING (chan, nvc->NvGdiRect, nvc->next_subchannel++); - BEGIN_RING(chan, nvc->NvGdiRect, NV04_GDI_RECTANGLE_TEXT_DMA_NOTIFY, 1); - OUT_RING (chan, nvc->sync_notifier->handle); - BEGIN_RING(chan, nvc->NvGdiRect, NV04_GDI_RECTANGLE_TEXT_SURFACE, 1); - OUT_RING (chan, nvc->NvCtxSurf2D->handle); - BEGIN_RING(chan, nvc->NvGdiRect, NV04_GDI_RECTANGLE_TEXT_OPERATION, 1); - OUT_RING (chan, NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY); - BEGIN_RING(chan, nvc->NvGdiRect, - NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT, 1); - OUT_RING (chan, NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_LE); - - switch (chipset & 0xf0) { - case 0x00: - case 0x10: - class = NV04_SWIZZLED_SURFACE; - break; - case 0x20: - class = NV20_SWIZZLED_SURFACE; - break; - case 0x30: - class = NV30_SWIZZLED_SURFACE; - break; - case 0x40: - case 0x60: - class = NV40_SWIZZLED_SURFACE; - break; - default: - /* Famous last words: this really can't happen.. */ - assert(0); - break; - } - - ret = nouveau_grobj_alloc(chan, nvc->next_handle++, class, - &nvc->NvSwzSurf); - if (ret) { - NOUVEAU_ERR("Error creating swizzled surface: %d\n", ret); - return 1; - } - - BIND_RING (chan, nvc->NvSwzSurf, nvc->next_subchannel++); - BEGIN_RING(chan, nvc->NvSwzSurf, NV04_SWIZZLED_SURFACE_DMA_NOTIFY, 1); - OUT_RING (chan, nvc->sync_notifier->handle); - BEGIN_RING(chan, nvc->NvSwzSurf, NV04_SWIZZLED_SURFACE_DMA_IMAGE, 1); - OUT_RING (chan, nvc->channel->vram->handle); - - if (chipset < 0x10) { - class = NV04_SCALED_IMAGE_FROM_MEMORY; - } else - if (chipset < 0x40) { - class = NV10_SCALED_IMAGE_FROM_MEMORY; - } else { - class = NV40_SCALED_IMAGE_FROM_MEMORY; - } - - ret = nouveau_grobj_alloc(chan, nvc->next_handle++, class, - &nvc->NvSIFM); - if (ret) { - NOUVEAU_ERR("Error creating scaled image object: %d\n", ret); - return 1; - } - - BIND_RING (chan, nvc->NvSIFM, nvc->next_subchannel++); - - return 0; -} - -int -nouveau_surface_init_nv04(struct nouveau_context *nv) -{ - nv->surface_copy_prep = nv04_surface_copy_prep; - nv->surface_copy = nv04_surface_copy_blit; - nv->surface_copy_done = nv04_surface_copy_done; - nv->surface_fill = nv04_surface_fill; - return 0; -} - diff --git a/src/gallium/winsys/dri/nouveau/nv50_surface.c b/src/gallium/winsys/dri/nouveau/nv50_surface.c deleted file mode 100644 index c8ab7f690f..0000000000 --- a/src/gallium/winsys/dri/nouveau/nv50_surface.c +++ /dev/null @@ -1,194 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_format.h" - -#include "nouveau_context.h" - -static INLINE int -nv50_format(enum pipe_format format) -{ - switch (format) { - case PIPE_FORMAT_A8R8G8B8_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: - return NV50_2D_DST_FORMAT_32BPP; - case PIPE_FORMAT_X8R8G8B8_UNORM: - return NV50_2D_DST_FORMAT_24BPP; - case PIPE_FORMAT_R5G6B5_UNORM: - return NV50_2D_DST_FORMAT_16BPP; - case PIPE_FORMAT_A8_UNORM: - return NV50_2D_DST_FORMAT_8BPP; - default: - return -1; - } -} - -static int -nv50_surface_set(struct nouveau_context *nv, struct pipe_surface *surf, int dst) -{ - struct nouveau_channel *chan = nv->nvc->channel; - struct nouveau_grobj *eng2d = nv->nvc->Nv2D; - struct nouveau_bo *bo = nouveau_buffer(surf->buffer)->bo; - int surf_format, mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT; - int flags = NOUVEAU_BO_VRAM | (dst ? NOUVEAU_BO_WR : NOUVEAU_BO_RD); - - surf_format = nv50_format(surf->format); - if (surf_format < 0) - return 1; - - if (!nouveau_bo(bo)->tiled) { - BEGIN_RING(chan, eng2d, mthd, 2); - OUT_RING (chan, surf_format); - OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, mthd + 0x14, 5); - OUT_RING (chan, surf->stride); - OUT_RING (chan, surf->width); - OUT_RING (chan, surf->height); - OUT_RELOCh(chan, bo, surf->offset, flags); - OUT_RELOCl(chan, bo, surf->offset, flags); - } else { - BEGIN_RING(chan, eng2d, mthd, 5); - OUT_RING (chan, surf_format); - OUT_RING (chan, 0); - OUT_RING (chan, 0); - OUT_RING (chan, 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, mthd + 0x18, 4); - OUT_RING (chan, surf->width); - OUT_RING (chan, surf->height); - OUT_RELOCh(chan, bo, surf->offset, flags); - OUT_RELOCl(chan, bo, surf->offset, flags); - } - -#if 0 - if (dst) { - BEGIN_RING(chan, eng2d, NV50_2D_CLIP_X, 4); - OUT_RING (chan, 0); - OUT_RING (chan, 0); - OUT_RING (chan, surf->width); - OUT_RING (chan, surf->height); - } -#endif - - return 0; -} - -static int -nv50_surface_copy_prep(struct nouveau_context *nv, - struct pipe_surface *dst, struct pipe_surface *src) -{ - int ret; - - assert(src->format == dst->format); - - ret = nv50_surface_set(nv, dst, 1); - if (ret) - return ret; - - ret = nv50_surface_set(nv, src, 0); - if (ret) - return ret; - - return 0; -} - -static void -nv50_surface_copy(struct nouveau_context *nv, unsigned dx, unsigned dy, - unsigned sx, unsigned sy, unsigned w, unsigned h) -{ - struct nouveau_channel *chan = nv->nvc->channel; - struct nouveau_grobj *eng2d = nv->nvc->Nv2D; - - BEGIN_RING(chan, eng2d, 0x088c, 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, NV50_2D_BLIT_DST_X, 4); - OUT_RING (chan, dx); - OUT_RING (chan, dy); - OUT_RING (chan, w); - OUT_RING (chan, h); - BEGIN_RING(chan, eng2d, 0x08c0, 4); - OUT_RING (chan, 0); - OUT_RING (chan, 1); - OUT_RING (chan, 0); - OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, 0x08d0, 4); - OUT_RING (chan, 0); - OUT_RING (chan, sx); - OUT_RING (chan, 0); - OUT_RING (chan, sy); -} - -static void -nv50_surface_copy_done(struct nouveau_context *nv) -{ - FIRE_RING(nv->nvc->channel); -} - -static int -nv50_surface_fill(struct nouveau_context *nv, struct pipe_surface *dst, - unsigned dx, unsigned dy, unsigned w, unsigned h, - unsigned value) -{ - struct nouveau_channel *chan = nv->nvc->channel; - struct nouveau_grobj *eng2d = nv->nvc->Nv2D; - int rect_format, ret; - - rect_format = nv50_format(dst->format); - if (rect_format < 0) - return 1; - - ret = nv50_surface_set(nv, dst, 1); - if (ret) - return ret; - - BEGIN_RING(chan, eng2d, 0x0580, 3); - OUT_RING (chan, 4); - OUT_RING (chan, rect_format); - OUT_RING (chan, value); - - BEGIN_RING(chan, eng2d, NV50_2D_RECT_X1, 4); - OUT_RING (chan, dx); - OUT_RING (chan, dy); - OUT_RING (chan, dx + w); - OUT_RING (chan, dy + h); - - FIRE_RING(chan); - return 0; -} - -int -nouveau_surface_channel_create_nv50(struct nouveau_channel_context *nvc) -{ - struct nouveau_channel *chan = nvc->channel; - struct nouveau_grobj *eng2d = NULL; - int ret; - - ret = nouveau_grobj_alloc(chan, nvc->next_handle++, NV50_2D, &eng2d); - if (ret) - return ret; - nvc->Nv2D = eng2d; - - BIND_RING (chan, eng2d, nvc->next_subchannel++); - BEGIN_RING(chan, eng2d, NV50_2D_DMA_NOTIFY, 4); - OUT_RING (chan, nvc->sync_notifier->handle); - OUT_RING (chan, chan->vram->handle); - OUT_RING (chan, chan->vram->handle); - OUT_RING (chan, chan->vram->handle); - BEGIN_RING(chan, eng2d, NV50_2D_OPERATION, 1); - OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY); - BEGIN_RING(chan, eng2d, 0x0290, 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, 0x0888, 1); - OUT_RING (chan, 1); - - return 0; -} - -int -nouveau_surface_init_nv50(struct nouveau_context *nv) -{ - nv->surface_copy_prep = nv50_surface_copy_prep; - nv->surface_copy = nv50_surface_copy; - nv->surface_copy_done = nv50_surface_copy_done; - nv->surface_fill = nv50_surface_fill; - return 0; -} - diff --git a/src/gallium/winsys/drm/nouveau/Makefile b/src/gallium/winsys/drm/nouveau/Makefile new file mode 100644 index 0000000000..be630ff6d1 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/Makefile @@ -0,0 +1,45 @@ + +TOP = ../../../../.. +include $(TOP)/configs/current + +LIBNAME = nouveau_dri.so + +MINIGLX_SOURCES = + +PIPE_DRIVERS = \ + $(TOP)/src/gallium/drivers/softpipe/libsoftpipe.a \ + $(TOP)/src/gallium/drivers/nv04/libnv04.a \ + $(TOP)/src/gallium/drivers/nv10/libnv10.a \ + $(TOP)/src/gallium/drivers/nv30/libnv30.a \ + $(TOP)/src/gallium/drivers/nv40/libnv40.a \ + $(TOP)/src/gallium/drivers/nv50/libnv50.a + +DRIVER_SOURCES = \ + nouveau_bo.c \ + nouveau_channel.c \ + nouveau_context.c \ + nouveau_device.c \ + nouveau_dma.c \ + nouveau_fence.c \ + nouveau_grobj.c \ + nouveau_lock.c \ + nouveau_notifier.c \ + nouveau_pushbuf.c \ + nouveau_resource.c \ + nouveau_screen.c \ + nouveau_swapbuffers.c \ + nouveau_winsys.c \ + nouveau_winsys_pipe.c \ + nouveau_winsys_softpipe.c \ + nv04_surface.c \ + nv50_surface.c + +C_SOURCES = \ + $(COMMON_GALLIUM_SOURCES) \ + $(DRIVER_SOURCES) + +ASM_SOURCES = + +include ../Makefile.template + +symlinks: diff --git a/src/gallium/winsys/drm/nouveau/nouveau_bo.c b/src/gallium/winsys/drm/nouveau/nouveau_bo.c new file mode 100644 index 0000000000..b5942994d9 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_bo.c @@ -0,0 +1,470 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include +#include +#include + +#include "nouveau_drmif.h" +#include "nouveau_dma.h" +#include "nouveau_local.h" + +static void +nouveau_mem_free(struct nouveau_device *dev, struct drm_nouveau_mem_alloc *ma, + void **map) +{ + struct nouveau_device_priv *nvdev = nouveau_device(dev); + struct drm_nouveau_mem_free mf; + + if (map && *map) { + drmUnmap(*map, ma->size); + *map = NULL; + } + + if (ma->size) { + mf.offset = ma->offset; + mf.flags = ma->flags; + drmCommandWrite(nvdev->fd, DRM_NOUVEAU_MEM_FREE, + &mf, sizeof(mf)); + ma->size = 0; + } +} + +static int +nouveau_mem_alloc(struct nouveau_device *dev, unsigned size, unsigned align, + uint32_t flags, struct drm_nouveau_mem_alloc *ma, void **map) +{ + struct nouveau_device_priv *nvdev = nouveau_device(dev); + int ret; + + ma->alignment = align; + ma->size = size; + ma->flags = flags; + if (map) + ma->flags |= NOUVEAU_MEM_MAPPED; + ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_MEM_ALLOC, ma, + sizeof(struct drm_nouveau_mem_alloc)); + if (ret) + return ret; + + if (map) { + ret = drmMap(nvdev->fd, ma->map_handle, ma->size, map); + if (ret) { + *map = NULL; + nouveau_mem_free(dev, ma, map); + return ret; + } + } + + return 0; +} + +static void +nouveau_bo_tmp_del(void *priv) +{ + struct nouveau_resource *r = priv; + + nouveau_fence_ref(NULL, (struct nouveau_fence **)&r->priv); + nouveau_resource_free(&r); +} + +static unsigned +nouveau_bo_tmp_max(struct nouveau_device_priv *nvdev) +{ + struct nouveau_resource *r = nvdev->sa_heap; + unsigned max = 0; + + while (r) { + if (r->in_use && !nouveau_fence(r->priv)->emitted) { + r = r->next; + continue; + } + + if (max < r->size) + max = r->size; + r = r->next; + } + + return max; +} + +static struct nouveau_resource * +nouveau_bo_tmp(struct nouveau_channel *chan, unsigned size, + struct nouveau_fence *fence) +{ + struct nouveau_device_priv *nvdev = nouveau_device(chan->device); + struct nouveau_resource *r = NULL; + struct nouveau_fence *ref = NULL; + + if (fence) + nouveau_fence_ref(fence, &ref); + else + nouveau_fence_new(chan, &ref); + assert(ref); + + while (nouveau_resource_alloc(nvdev->sa_heap, size, ref, &r)) { + if (nouveau_bo_tmp_max(nvdev) < size) { + nouveau_fence_ref(NULL, &ref); + return NULL; + } + + nouveau_fence_flush(chan); + } + nouveau_fence_signal_cb(ref, nouveau_bo_tmp_del, r); + + return r; +} + +int +nouveau_bo_init(struct nouveau_device *dev) +{ + struct nouveau_device_priv *nvdev = nouveau_device(dev); + int ret; + + ret = nouveau_mem_alloc(dev, 128*1024, 0, NOUVEAU_MEM_AGP | + NOUVEAU_MEM_PCI, &nvdev->sa, &nvdev->sa_map); + if (ret) + return ret; + + ret = nouveau_resource_init(&nvdev->sa_heap, 0, nvdev->sa.size); + if (ret) { + nouveau_mem_free(dev, &nvdev->sa, &nvdev->sa_map); + return ret; + } + + return 0; +} + +void +nouveau_bo_takedown(struct nouveau_device *dev) +{ + struct nouveau_device_priv *nvdev = nouveau_device(dev); + + nouveau_mem_free(dev, &nvdev->sa, &nvdev->sa_map); +} + +int +nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align, + int size, struct nouveau_bo **bo) +{ + struct nouveau_bo_priv *nvbo; + int ret; + + if (!dev || !bo || *bo) + return -EINVAL; + + nvbo = calloc(1, sizeof(struct nouveau_bo_priv)); + if (!nvbo) + return -ENOMEM; + nvbo->base.device = dev; + nvbo->base.size = size; + nvbo->base.handle = bo_to_ptr(nvbo); + nvbo->drm.alignment = align; + nvbo->refcount = 1; + + if (flags & NOUVEAU_BO_TILED) { + nvbo->tiled = 1; + if (flags & NOUVEAU_BO_ZTILE) + nvbo->tiled |= 2; + flags &= ~NOUVEAU_BO_TILED; + } + + ret = nouveau_bo_set_status(&nvbo->base, flags); + if (ret) { + free(nvbo); + return ret; + } + + *bo = &nvbo->base; + return 0; +} + +int +nouveau_bo_user(struct nouveau_device *dev, void *ptr, int size, + struct nouveau_bo **bo) +{ + struct nouveau_bo_priv *nvbo; + + if (!dev || !bo || *bo) + return -EINVAL; + + nvbo = calloc(1, sizeof(*nvbo)); + if (!nvbo) + return -ENOMEM; + nvbo->base.device = dev; + + nvbo->sysmem = ptr; + nvbo->user = 1; + + nvbo->base.size = size; + nvbo->base.offset = nvbo->drm.offset; + nvbo->base.handle = bo_to_ptr(nvbo); + nvbo->refcount = 1; + *bo = &nvbo->base; + return 0; +} + +int +nouveau_bo_ref(struct nouveau_device *dev, uint64_t handle, + struct nouveau_bo **bo) +{ + struct nouveau_bo_priv *nvbo = ptr_to_bo(handle); + + if (!dev || !bo || *bo) + return -EINVAL; + + nvbo->refcount++; + *bo = &nvbo->base; + return 0; +} + +static void +nouveau_bo_del_cb(void *priv) +{ + struct nouveau_bo_priv *nvbo = priv; + + nouveau_fence_ref(NULL, &nvbo->fence); + nouveau_mem_free(nvbo->base.device, &nvbo->drm, &nvbo->map); + if (nvbo->sysmem && !nvbo->user) + free(nvbo->sysmem); + free(nvbo); +} + +void +nouveau_bo_del(struct nouveau_bo **bo) +{ + struct nouveau_bo_priv *nvbo; + + if (!bo || !*bo) + return; + nvbo = nouveau_bo(*bo); + *bo = NULL; + + if (--nvbo->refcount) + return; + + if (nvbo->pending) + nouveau_pushbuf_flush(nvbo->pending->channel, 0); + + if (nvbo->fence) + nouveau_fence_signal_cb(nvbo->fence, nouveau_bo_del_cb, nvbo); + else + nouveau_bo_del_cb(nvbo); +} + +int +nouveau_bo_map(struct nouveau_bo *bo, uint32_t flags) +{ + struct nouveau_bo_priv *nvbo = nouveau_bo(bo); + + if (!nvbo) + return -EINVAL; + + if (nvbo->pending && + (nvbo->pending->flags & NOUVEAU_BO_WR || flags & NOUVEAU_BO_WR)) { + nouveau_pushbuf_flush(nvbo->pending->channel, 0); + } + + if (flags & NOUVEAU_BO_WR) + nouveau_fence_wait(&nvbo->fence); + else + nouveau_fence_wait(&nvbo->wr_fence); + + if (nvbo->sysmem) + bo->map = nvbo->sysmem; + else + bo->map = nvbo->map; + return 0; +} + +void +nouveau_bo_unmap(struct nouveau_bo *bo) +{ + bo->map = NULL; +} + +static int +nouveau_bo_upload(struct nouveau_bo_priv *nvbo) +{ + if (nvbo->fence) + nouveau_fence_wait(&nvbo->fence); + memcpy(nvbo->map, nvbo->sysmem, nvbo->drm.size); + return 0; +} + +int +nouveau_bo_set_status(struct nouveau_bo *bo, uint32_t flags) +{ + struct nouveau_bo_priv *nvbo = nouveau_bo(bo); + struct drm_nouveau_mem_alloc new; + void *new_map = NULL, *new_sysmem = NULL; + unsigned new_flags = 0, ret; + + assert(!bo->map); + + /* Check current memtype vs requested, if they match do nothing */ + if ((nvbo->drm.flags & NOUVEAU_MEM_FB) && (flags & NOUVEAU_BO_VRAM)) + return 0; + if ((nvbo->drm.flags & (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI)) && + (flags & NOUVEAU_BO_GART)) + return 0; + if (nvbo->drm.size == 0 && nvbo->sysmem && (flags & NOUVEAU_BO_LOCAL)) + return 0; + + memset(&new, 0x00, sizeof(new)); + + /* Allocate new memory */ + if (flags & NOUVEAU_BO_VRAM) + new_flags |= NOUVEAU_MEM_FB; + else + if (flags & NOUVEAU_BO_GART) + new_flags |= (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI); + + if (nvbo->tiled && flags) { + new_flags |= NOUVEAU_MEM_TILE; + if (nvbo->tiled & 2) + new_flags |= NOUVEAU_MEM_TILE_ZETA; + } + + if (new_flags) { + ret = nouveau_mem_alloc(bo->device, bo->size, + nvbo->drm.alignment, new_flags, + &new, &new_map); + if (ret) + return ret; + } else + if (!nvbo->user) { + new_sysmem = malloc(bo->size); + } + + /* Copy old -> new */ + /*XXX: use M2MF */ + if (nvbo->sysmem || nvbo->map) { + struct nouveau_pushbuf_bo *pbo = nvbo->pending; + nvbo->pending = NULL; + nouveau_bo_map(bo, NOUVEAU_BO_RD); + memcpy(new_map, bo->map, bo->size); + nouveau_bo_unmap(bo); + nvbo->pending = pbo; + } + + /* Free old memory */ + if (nvbo->fence) + nouveau_fence_wait(&nvbo->fence); + nouveau_mem_free(bo->device, &nvbo->drm, &nvbo->map); + if (nvbo->sysmem && !nvbo->user) + free(nvbo->sysmem); + + nvbo->drm = new; + nvbo->map = new_map; + if (!nvbo->user) + nvbo->sysmem = new_sysmem; + bo->flags = flags; + bo->offset = nvbo->drm.offset; + return 0; +} + +static int +nouveau_bo_validate_user(struct nouveau_channel *chan, struct nouveau_bo *bo, + struct nouveau_fence *fence, uint32_t flags) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + struct nouveau_device_priv *nvdev = nouveau_device(chan->device); + struct nouveau_bo_priv *nvbo = nouveau_bo(bo); + struct nouveau_resource *r; + + if (nvchan->user_charge + bo->size > nvdev->sa.size) + return 1; + + if (!(flags & NOUVEAU_BO_GART)) + return 1; + + r = nouveau_bo_tmp(chan, bo->size, fence); + if (!r) + return 1; + nvchan->user_charge += bo->size; + + memcpy(nvdev->sa_map + r->start, nvbo->sysmem, bo->size); + + nvbo->offset = nvdev->sa.offset + r->start; + nvbo->flags = NOUVEAU_BO_GART; + return 0; +} + +static int +nouveau_bo_validate_bo(struct nouveau_channel *chan, struct nouveau_bo *bo, + struct nouveau_fence *fence, uint32_t flags) +{ + struct nouveau_bo_priv *nvbo = nouveau_bo(bo); + int ret; + + ret = nouveau_bo_set_status(bo, flags); + if (ret) { + nouveau_fence_flush(chan); + + ret = nouveau_bo_set_status(bo, flags); + if (ret) + return ret; + } + + if (nvbo->user) + nouveau_bo_upload(nvbo); + + nvbo->offset = nvbo->drm.offset; + if (nvbo->drm.flags & (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI)) + nvbo->flags = NOUVEAU_BO_GART; + else + nvbo->flags = NOUVEAU_BO_VRAM; + + return 0; +} + +int +nouveau_bo_validate(struct nouveau_channel *chan, struct nouveau_bo *bo, + uint32_t flags) +{ + struct nouveau_bo_priv *nvbo = nouveau_bo(bo); + struct nouveau_fence *fence = nouveau_pushbuf(chan->pushbuf)->fence; + int ret; + + assert(bo->map == NULL); + + if (nvbo->user) { + ret = nouveau_bo_validate_user(chan, bo, fence, flags); + if (ret) { + ret = nouveau_bo_validate_bo(chan, bo, fence, flags); + if (ret) + return ret; + } + } else { + ret = nouveau_bo_validate_bo(chan, bo, fence, flags); + if (ret) + return ret; + } + + if (flags & NOUVEAU_BO_WR) + nouveau_fence_ref(fence, &nvbo->wr_fence); + nouveau_fence_ref(fence, &nvbo->fence); + return 0; +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_channel.c b/src/gallium/winsys/drm/nouveau/nouveau_channel.c new file mode 100644 index 0000000000..3b4dcd1ecf --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_channel.c @@ -0,0 +1,126 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include +#include + +#include "nouveau_drmif.h" +#include "nouveau_dma.h" + +int +nouveau_channel_alloc(struct nouveau_device *dev, uint32_t fb_ctxdma, + uint32_t tt_ctxdma, struct nouveau_channel **chan) +{ + struct nouveau_device_priv *nvdev = nouveau_device(dev); + struct nouveau_channel_priv *nvchan; + int ret; + + if (!nvdev || !chan || *chan) + return -EINVAL; + + nvchan = calloc(1, sizeof(struct nouveau_channel_priv)); + if (!nvchan) + return -ENOMEM; + nvchan->base.device = dev; + + nvchan->drm.fb_ctxdma_handle = fb_ctxdma; + nvchan->drm.tt_ctxdma_handle = tt_ctxdma; + ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_CHANNEL_ALLOC, + &nvchan->drm, sizeof(nvchan->drm)); + if (ret) { + free(nvchan); + return ret; + } + + nvchan->base.id = nvchan->drm.channel; + if (nouveau_grobj_ref(&nvchan->base, nvchan->drm.fb_ctxdma_handle, + &nvchan->base.vram) || + nouveau_grobj_ref(&nvchan->base, nvchan->drm.tt_ctxdma_handle, + &nvchan->base.gart)) { + nouveau_channel_free((void *)&nvchan); + return -EINVAL; + } + + ret = drmMap(nvdev->fd, nvchan->drm.ctrl, nvchan->drm.ctrl_size, + (void*)&nvchan->user); + if (ret) { + nouveau_channel_free((void *)&nvchan); + return ret; + } + nvchan->put = &nvchan->user[0x40/4]; + nvchan->get = &nvchan->user[0x44/4]; + nvchan->ref_cnt = &nvchan->user[0x48/4]; + + ret = drmMap(nvdev->fd, nvchan->drm.notifier, nvchan->drm.notifier_size, + (drmAddressPtr)&nvchan->notifier_block); + if (ret) { + nouveau_channel_free((void *)&nvchan); + return ret; + } + + ret = drmMap(nvdev->fd, nvchan->drm.cmdbuf, nvchan->drm.cmdbuf_size, + (void*)&nvchan->pushbuf); + if (ret) { + nouveau_channel_free((void *)&nvchan); + return ret; + } + + ret = nouveau_grobj_alloc(&nvchan->base, 0x00000000, 0x0030, + &nvchan->base.nullobj); + if (ret) { + nouveau_channel_free((void *)&nvchan); + return ret; + } + + nouveau_dma_channel_init(&nvchan->base); + nouveau_pushbuf_init(&nvchan->base); + + *chan = &nvchan->base; + return 0; +} + +void +nouveau_channel_free(struct nouveau_channel **chan) +{ + struct nouveau_channel_priv *nvchan; + struct nouveau_device_priv *nvdev; + struct drm_nouveau_channel_free cf; + + if (!chan || !*chan) + return; + nvchan = nouveau_channel(*chan); + *chan = NULL; + nvdev = nouveau_device(nvchan->base.device); + + FIRE_RING_CH(&nvchan->base); + + nouveau_grobj_free(&nvchan->base.vram); + nouveau_grobj_free(&nvchan->base.gart); + nouveau_grobj_free(&nvchan->base.nullobj); + + cf.channel = nvchan->drm.channel; + drmCommandWrite(nvdev->fd, DRM_NOUVEAU_CHANNEL_FREE, &cf, sizeof(cf)); + free(nvchan); +} + + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_context.c b/src/gallium/winsys/drm/nouveau/nouveau_context.c new file mode 100644 index 0000000000..74413c408f --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_context.c @@ -0,0 +1,346 @@ +#include "main/glheader.h" +#include "glapi/glthread.h" +#include +#include "utils.h" + +#include "state_tracker/st_public.h" +#include "state_tracker/st_context.h" +#include "pipe/p_defines.h" +#include "pipe/p_context.h" +#include "pipe/p_screen.h" + +#include "nouveau_context.h" +#include "nouveau_dri.h" +#include "nouveau_local.h" +#include "nouveau_screen.h" +#include "nouveau_winsys_pipe.h" + +#ifdef DEBUG +static const struct dri_debug_control debug_control[] = { + { "bo", DEBUG_BO }, + { NULL, 0 } +}; +int __nouveau_debug = 0; +#endif + +static void +nouveau_channel_context_destroy(struct nouveau_channel_context *nvc) +{ + nouveau_grobj_free(&nvc->NvCtxSurf2D); + nouveau_grobj_free(&nvc->NvImageBlit); + nouveau_grobj_free(&nvc->NvGdiRect); + nouveau_grobj_free(&nvc->NvM2MF); + nouveau_grobj_free(&nvc->Nv2D); + nouveau_grobj_free(&nvc->NvSwzSurf); + nouveau_grobj_free(&nvc->NvSIFM); + + nouveau_notifier_free(&nvc->sync_notifier); + + nouveau_channel_free(&nvc->channel); + + FREE(nvc); +} + +static struct nouveau_channel_context * +nouveau_channel_context_create(struct nouveau_device *dev) +{ + struct nouveau_channel_context *nvc; + int ret; + + nvc = CALLOC_STRUCT(nouveau_channel_context); + if (!nvc) + return NULL; + + if ((ret = nouveau_channel_alloc(dev, 0x8003d001, 0x8003d002, + &nvc->channel))) { + NOUVEAU_ERR("Error creating GPU channel: %d\n", ret); + nouveau_channel_context_destroy(nvc); + return NULL; + } + + nvc->next_handle = 0x80000000; + + if ((ret = nouveau_notifier_alloc(nvc->channel, nvc->next_handle++, 1, + &nvc->sync_notifier))) { + NOUVEAU_ERR("Error creating channel sync notifier: %d\n", ret); + nouveau_channel_context_destroy(nvc); + return NULL; + } + + switch (dev->chipset & 0xf0) { + case 0x50: + case 0x80: + case 0x90: + ret = nouveau_surface_channel_create_nv50(nvc); + break; + default: + ret = nouveau_surface_channel_create_nv04(nvc); + break; + } + + if (ret) { + NOUVEAU_ERR("Error initialising surface objects: %d\n", ret); + nouveau_channel_context_destroy(nvc); + return NULL; + } + + return nvc; +} + +GLboolean +nouveau_context_create(const __GLcontextModes *glVis, + __DRIcontextPrivate *driContextPriv, + void *sharedContextPrivate) +{ + __DRIscreenPrivate *driScrnPriv = driContextPriv->driScreenPriv; + struct nouveau_screen *nv_screen = driScrnPriv->private; + struct nouveau_context *nv = CALLOC_STRUCT(nouveau_context); + struct pipe_context *pipe = NULL; + struct st_context *st_share = NULL; + struct nouveau_channel_context *nvc = NULL; + struct nouveau_device *dev = nv_screen->device; + int i; + + if (sharedContextPrivate) { + st_share = ((struct nouveau_context *)sharedContextPrivate)->st; + } + + switch (dev->chipset & 0xf0) { + case 0x10: + case 0x20: + /* NV10 */ + case 0x30: + /* NV30 */ + case 0x40: + case 0x60: + /* NV40 */ + case 0x50: + case 0x80: + case 0x90: + /* G80 */ + break; + default: + NOUVEAU_ERR("Unsupported chipset: NV%02x\n", dev->chipset); + return GL_FALSE; + } + + driContextPriv->driverPrivate = (void *)nv; + nv->nv_screen = nv_screen; + nv->dri_screen = driScrnPriv; + + { + struct nouveau_device_priv *nvdev = nouveau_device(dev); + + nvdev->ctx = driContextPriv->hHWContext; + nvdev->lock = (drmLock *)&driScrnPriv->pSAREA->lock; + } + + driParseConfigFiles(&nv->dri_option_cache, &nv_screen->option_cache, + nv->dri_screen->myNum, "nouveau"); +#ifdef DEBUG + __nouveau_debug = driParseDebugString(getenv("NOUVEAU_DEBUG"), + debug_control); +#endif + + /*XXX: Hack up a fake region and buffer object for front buffer. + * This will go away with TTM, replaced with a simple reference + * of the front buffer handle passed to us by the DDX. + */ + { + struct pipe_surface *fb_surf; + struct nouveau_pipe_buffer *fb_buf; + struct nouveau_bo_priv *fb_bo; + + fb_bo = calloc(1, sizeof(struct nouveau_bo_priv)); + fb_bo->drm.offset = nv_screen->front_offset; + fb_bo->drm.flags = NOUVEAU_MEM_FB; + fb_bo->drm.size = nv_screen->front_pitch * + nv_screen->front_height; + fb_bo->refcount = 1; + fb_bo->base.flags = NOUVEAU_BO_PIN | NOUVEAU_BO_VRAM; + fb_bo->base.offset = fb_bo->drm.offset; + fb_bo->base.handle = (unsigned long)fb_bo; + fb_bo->base.size = fb_bo->drm.size; + fb_bo->base.device = nv_screen->device; + + fb_buf = calloc(1, sizeof(struct nouveau_pipe_buffer)); + fb_buf->bo = &fb_bo->base; + + fb_surf = calloc(1, sizeof(struct pipe_surface)); + if (nv_screen->front_cpp == 2) + fb_surf->format = PIPE_FORMAT_R5G6B5_UNORM; + else + fb_surf->format = PIPE_FORMAT_A8R8G8B8_UNORM; + pf_get_block(fb_surf->format, &fb_surf->block); + fb_surf->width = nv_screen->front_pitch / nv_screen->front_cpp; + fb_surf->height = nv_screen->front_height; + fb_surf->stride = fb_surf->width * fb_surf->block.size; + fb_surf->refcount = 1; + fb_surf->buffer = &fb_buf->base; + + nv->frontbuffer = fb_surf; + } + + /* Attempt to share a single channel between multiple contexts from + * a single process. + */ + nvc = nv_screen->nvc; + if (!nvc && st_share) { + struct nouveau_context *snv = st_share->pipe->priv; + if (snv) { + nvc = snv->nvc; + } + } + + /*XXX: temporary - disable multi-context/single-channel on pre-NV4x */ + switch (dev->chipset & 0xf0) { + case 0x40: + case 0x60: + /* NV40 class */ + case 0x50: + case 0x80: + case 0x90: + /* G80 class */ + break; + default: + nvc = NULL; + break; + } + + if (!nvc) { + nvc = nouveau_channel_context_create(dev); + if (!nvc) { + NOUVEAU_ERR("Failed initialising GPU context\n"); + return GL_FALSE; + } + nv_screen->nvc = nvc; + } + + nvc->refcount++; + nv->nvc = nvc; + + /* Find a free slot for a pipe context, allocate a new one if needed */ + nv->pctx_id = -1; + for (i = 0; i < nvc->nr_pctx; i++) { + if (nvc->pctx[i] == NULL) { + nv->pctx_id = i; + break; + } + } + + if (nv->pctx_id < 0) { + nv->pctx_id = nvc->nr_pctx++; + nvc->pctx = + realloc(nvc->pctx, + sizeof(struct pipe_context *) * nvc->nr_pctx); + } + + /* Create pipe */ + switch (dev->chipset & 0xf0) { + case 0x50: + case 0x80: + case 0x90: + if (nouveau_surface_init_nv50(nv)) + return GL_FALSE; + break; + default: + if (nouveau_surface_init_nv04(nv)) + return GL_FALSE; + break; + } + + if (!getenv("NOUVEAU_FORCE_SOFTPIPE")) { + struct pipe_screen *pscreen; + + pipe = nouveau_pipe_create(nv); + if (!pipe) + NOUVEAU_ERR("Couldn't create hw pipe\n"); + pscreen = nvc->pscreen; + + nv->cap.hw_vertex_buffer = + pscreen->get_param(pscreen, NOUVEAU_CAP_HW_VTXBUF); + nv->cap.hw_index_buffer = + pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF); + } + + if (!pipe) { + NOUVEAU_MSG("Using softpipe\n"); + pipe = nouveau_create_softpipe(nv); + if (!pipe) { + NOUVEAU_ERR("Error creating pipe, bailing\n"); + return GL_FALSE; + } + } + + pipe->priv = nv; + nv->st = st_create_context(pipe, glVis, st_share); + return GL_TRUE; +} + +void +nouveau_context_destroy(__DRIcontextPrivate *driContextPriv) +{ + struct nouveau_context *nv = driContextPriv->driverPrivate; + struct nouveau_channel_context *nvc = nv->nvc; + + assert(nv); + + st_finish(nv->st); + st_destroy_context(nv->st); + + if (nv->pctx_id >= 0) { + nvc->pctx[nv->pctx_id] = NULL; + if (--nvc->refcount <= 0) { + nouveau_channel_context_destroy(nvc); + nv->nv_screen->nvc = NULL; + } + } + + free(nv); +} + +GLboolean +nouveau_context_bind(__DRIcontextPrivate *driContextPriv, + __DRIdrawablePrivate *driDrawPriv, + __DRIdrawablePrivate *driReadPriv) +{ + struct nouveau_context *nv; + struct nouveau_framebuffer *draw, *read; + + if (!driContextPriv) { + st_make_current(NULL, NULL, NULL); + return GL_TRUE; + } + + nv = driContextPriv->driverPrivate; + draw = driDrawPriv->driverPrivate; + read = driReadPriv->driverPrivate; + + st_make_current(nv->st, draw->stfb, read->stfb); + + if ((nv->dri_drawable != driDrawPriv) || + (nv->last_stamp != driDrawPriv->lastStamp)) { + nv->dri_drawable = driDrawPriv; + st_resize_framebuffer(draw->stfb, driDrawPriv->w, + driDrawPriv->h); + nv->last_stamp = driDrawPriv->lastStamp; + } + + if (driDrawPriv != driReadPriv) { + st_resize_framebuffer(read->stfb, driReadPriv->w, + driReadPriv->h); + } + + return GL_TRUE; +} + +GLboolean +nouveau_context_unbind(__DRIcontextPrivate *driContextPriv) +{ + struct nouveau_context *nv = driContextPriv->driverPrivate; + (void)nv; + + st_flush(nv->st, 0, NULL); + return GL_TRUE; +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_context.h b/src/gallium/winsys/drm/nouveau/nouveau_context.h new file mode 100644 index 0000000000..77e2147a2c --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_context.h @@ -0,0 +1,113 @@ +#ifndef __NOUVEAU_CONTEXT_H__ +#define __NOUVEAU_CONTEXT_H__ + +#include "dri_util.h" +#include "xmlconfig.h" + +#include "nouveau/nouveau_winsys.h" +#include "nouveau_drmif.h" +#include "nouveau_dma.h" + +struct nouveau_framebuffer { + struct st_framebuffer *stfb; +}; + +struct nouveau_channel_context { + struct pipe_screen *pscreen; + int refcount; + + unsigned cur_pctx; + unsigned nr_pctx; + struct pipe_context **pctx; + + struct nouveau_channel *channel; + + struct nouveau_notifier *sync_notifier; + + /* Common */ + struct nouveau_grobj *NvM2MF; + /* NV04-NV40 */ + struct nouveau_grobj *NvCtxSurf2D; + struct nouveau_grobj *NvSwzSurf; + struct nouveau_grobj *NvImageBlit; + struct nouveau_grobj *NvGdiRect; + struct nouveau_grobj *NvSIFM; + /* G80 */ + struct nouveau_grobj *Nv2D; + + uint32_t next_handle; + uint32_t next_subchannel; + uint32_t next_sequence; +}; + +struct nouveau_context { + struct st_context *st; + + /* DRI stuff */ + __DRIscreenPrivate *dri_screen; + __DRIdrawablePrivate *dri_drawable; + unsigned int last_stamp; + driOptionCache dri_option_cache; + drm_context_t drm_context; + drmLock drm_lock; + GLboolean locked; + struct nouveau_screen *nv_screen; + struct pipe_surface *frontbuffer; + + struct { + int hw_vertex_buffer; + int hw_index_buffer; + } cap; + + /* Hardware context */ + struct nouveau_channel_context *nvc; + int pctx_id; + + /* pipe_surface accel */ + struct pipe_surface *surf_src, *surf_dst; + unsigned surf_src_offset, surf_dst_offset; + int (*surface_copy_prep)(struct nouveau_context *, + struct pipe_surface *dst, + struct pipe_surface *src); + void (*surface_copy)(struct nouveau_context *, unsigned dx, unsigned dy, + unsigned sx, unsigned sy, unsigned w, unsigned h); + void (*surface_copy_done)(struct nouveau_context *); + int (*surface_fill)(struct nouveau_context *, struct pipe_surface *, + unsigned, unsigned, unsigned, unsigned, unsigned); +}; + +extern GLboolean nouveau_context_create(const __GLcontextModes *, + __DRIcontextPrivate *, void *); +extern void nouveau_context_destroy(__DRIcontextPrivate *); +extern GLboolean nouveau_context_bind(__DRIcontextPrivate *, + __DRIdrawablePrivate *draw, + __DRIdrawablePrivate *read); +extern GLboolean nouveau_context_unbind(__DRIcontextPrivate *); + +#ifdef DEBUG +extern int __nouveau_debug; + +#define DEBUG_BO (1 << 0) + +#define DBG(flag, ...) do { \ + if (__nouveau_debug & (DEBUG_##flag)) \ + NOUVEAU_ERR(__VA_ARGS__); \ +} while(0) +#else +#define DBG(flag, ...) +#endif + +extern void LOCK_HARDWARE(struct nouveau_context *); +extern void UNLOCK_HARDWARE(struct nouveau_context *); + +extern int +nouveau_surface_channel_create_nv04(struct nouveau_channel_context *); +extern int +nouveau_surface_channel_create_nv50(struct nouveau_channel_context *); +extern int nouveau_surface_init_nv04(struct nouveau_context *); +extern int nouveau_surface_init_nv50(struct nouveau_context *); + +extern uint32_t *nouveau_pipe_dma_beginp(struct nouveau_grobj *, int, int); +extern void nouveau_pipe_dma_kickoff(struct nouveau_channel *); + +#endif diff --git a/src/gallium/winsys/drm/nouveau/nouveau_device.c b/src/gallium/winsys/drm/nouveau/nouveau_device.c new file mode 100644 index 0000000000..0b452fcd02 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_device.c @@ -0,0 +1,159 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include +#include + +#include "nouveau_drmif.h" + +int +nouveau_device_open_existing(struct nouveau_device **dev, int close, + int fd, drm_context_t ctx) +{ + struct nouveau_device_priv *nvdev; + int ret; + + if (!dev || *dev) + return -EINVAL; + + nvdev = calloc(1, sizeof(*nvdev)); + if (!nvdev) + return -ENOMEM; + nvdev->fd = fd; + nvdev->ctx = ctx; + nvdev->needs_close = close; + + drmCommandNone(nvdev->fd, DRM_NOUVEAU_CARD_INIT); + + if ((ret = nouveau_bo_init(&nvdev->base))) { + nouveau_device_close((void *)&nvdev); + return ret; + } + + { + uint64_t value; + + ret = nouveau_device_get_param(&nvdev->base, + NOUVEAU_GETPARAM_CHIPSET_ID, + &value); + if (ret) { + nouveau_device_close((void *)&nvdev); + return ret; + } + nvdev->base.chipset = value; + } + + *dev = &nvdev->base; + return 0; +} + +int +nouveau_device_open(struct nouveau_device **dev, const char *busid) +{ + drm_context_t ctx; + int fd, ret; + + if (!dev || *dev) + return -EINVAL; + + fd = drmOpen("nouveau", busid); + if (fd < 0) + return -EINVAL; + + ret = drmCreateContext(fd, &ctx); + if (ret) { + drmClose(fd); + return ret; + } + + ret = nouveau_device_open_existing(dev, 1, fd, ctx); + if (ret) { + drmDestroyContext(fd, ctx); + drmClose(fd); + return ret; + } + + return 0; +} + +void +nouveau_device_close(struct nouveau_device **dev) +{ + struct nouveau_device_priv *nvdev; + + if (dev || !*dev) + return; + nvdev = nouveau_device(*dev); + *dev = NULL; + + nouveau_bo_takedown(&nvdev->base); + + if (nvdev->needs_close) { + drmDestroyContext(nvdev->fd, nvdev->ctx); + drmClose(nvdev->fd); + } + free(nvdev); +} + +int +nouveau_device_get_param(struct nouveau_device *dev, + uint64_t param, uint64_t *value) +{ + struct nouveau_device_priv *nvdev = nouveau_device(dev); + struct drm_nouveau_getparam g; + int ret; + + if (!nvdev || !value) + return -EINVAL; + + g.param = param; + ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GETPARAM, + &g, sizeof(g)); + if (ret) + return ret; + + *value = g.value; + return 0; +} + +int +nouveau_device_set_param(struct nouveau_device *dev, + uint64_t param, uint64_t value) +{ + struct nouveau_device_priv *nvdev = nouveau_device(dev); + struct drm_nouveau_setparam s; + int ret; + + if (!nvdev) + return -EINVAL; + + s.param = param; + s.value = value; + ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_SETPARAM, + &s, sizeof(s)); + if (ret) + return ret; + + return 0; +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_dma.c b/src/gallium/winsys/drm/nouveau/nouveau_dma.c new file mode 100644 index 0000000000..f8a8ba04f6 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_dma.c @@ -0,0 +1,219 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include +#include + +#include "nouveau_drmif.h" +#include "nouveau_dma.h" +#include "nouveau_local.h" + +static inline uint32_t +READ_GET(struct nouveau_channel_priv *nvchan) +{ + return *nvchan->get; +} + +static inline void +WRITE_PUT(struct nouveau_channel_priv *nvchan, uint32_t val) +{ + uint32_t put = ((val << 2) + nvchan->dma->base); + volatile int dum; + + NOUVEAU_DMA_BARRIER; + dum = READ_GET(nvchan); + + *nvchan->put = put; + nvchan->dma->put = val; +#ifdef NOUVEAU_DMA_TRACE + NOUVEAU_MSG("WRITE_PUT %d/0x%08x\n", nvchan->drm.channel, put); +#endif + + NOUVEAU_DMA_BARRIER; +} + +static inline int +LOCAL_GET(struct nouveau_dma_priv *dma, uint32_t *val) +{ + uint32_t get = *val; + + if (get >= dma->base && get <= (dma->base + (dma->max << 2))) { + *val = (get - dma->base) >> 2; + return 1; + } + + return 0; +} + +void +nouveau_dma_channel_init(struct nouveau_channel *chan) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + int i; + + nvchan->dma = &nvchan->dma_master; + nvchan->dma->base = nvchan->drm.put_base; + nvchan->dma->cur = nvchan->dma->put = 0; + nvchan->dma->max = (nvchan->drm.cmdbuf_size >> 2) - 2; + nvchan->dma->free = nvchan->dma->max - nvchan->dma->cur; + + RING_SPACE_CH(chan, RING_SKIPS); + for (i = 0; i < RING_SKIPS; i++) + OUT_RING_CH(chan, 0); +} + +#define CHECK_TIMEOUT() do { \ + if ((NOUVEAU_TIME_MSEC() - t_start) > NOUVEAU_DMA_TIMEOUT) \ + return - EBUSY; \ +} while(0) + +int +nouveau_dma_wait(struct nouveau_channel *chan, int size) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + struct nouveau_dma_priv *dma = nvchan->dma; + uint32_t get, t_start; + + FIRE_RING_CH(chan); + + t_start = NOUVEAU_TIME_MSEC(); + while (dma->free < size) { + CHECK_TIMEOUT(); + + get = READ_GET(nvchan); + if (!LOCAL_GET(dma, &get)) + continue; + + if (dma->put >= get) { + dma->free = dma->max - dma->cur; + + if (dma->free < size) { +#ifdef NOUVEAU_DMA_DEBUG + dma->push_free = 1; +#endif + OUT_RING_CH(chan, 0x20000000 | dma->base); + if (get <= RING_SKIPS) { + /*corner case - will be idle*/ + if (dma->put <= RING_SKIPS) + WRITE_PUT(nvchan, + RING_SKIPS + 1); + + do { + CHECK_TIMEOUT(); + get = READ_GET(nvchan); + if (!LOCAL_GET(dma, &get)) + get = 0; + } while (get <= RING_SKIPS); + } + + WRITE_PUT(nvchan, RING_SKIPS); + dma->cur = dma->put = RING_SKIPS; + dma->free = get - (RING_SKIPS + 1); + } + } else { + dma->free = get - dma->cur - 1; + } + } + + return 0; +} + +#ifdef NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF +static void +nouveau_dma_parse_pushbuf(struct nouveau_channel *chan, int get, int put) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + unsigned mthd_count = 0; + + while (get != put) { + uint32_t gpuget = (get << 2) + nvchan->drm.put_base; + uint32_t data; + + if (get < 0 || get >= nvchan->drm.cmdbuf_size) { + NOUVEAU_ERR("DMA_PT 0x%08x\n", gpuget); + assert(0); + } + data = nvchan->pushbuf[get++]; + + if (mthd_count) { + NOUVEAU_MSG("0x%08x 0x%08x\n", gpuget, data); + mthd_count--; + continue; + } + + switch (data & 0x60000000) { + case 0x00000000: + mthd_count = (data >> 18) & 0x7ff; + NOUVEAU_MSG("0x%08x 0x%08x MTHD " + "Sc %d Mthd 0x%04x Size %d\n", + gpuget, data, (data>>13) & 7, data & 0x1ffc, + mthd_count); + break; + case 0x20000000: + get = (data & 0x1ffffffc) >> 2; + NOUVEAU_MSG("0x%08x 0x%08x JUMP 0x%08x\n", + gpuget, data, data & 0x1ffffffc); + continue; + case 0x40000000: + mthd_count = (data >> 18) & 0x7ff; + NOUVEAU_MSG("0x%08x 0x%08x NINC " + "Sc %d Mthd 0x%04x Size %d\n", + gpuget, data, (data>>13) & 7, data & 0x1ffc, + mthd_count); + break; + case 0x60000000: + /* DMA_OPCODE_CALL apparently, doesn't seem to work on + * my NV40 at least.. + */ + /* fall-through */ + default: + NOUVEAU_MSG("DMA_PUSHER 0x%08x 0x%08x\n", + gpuget, data); + assert(0); + } + } +} +#endif + +void +nouveau_dma_kickoff(struct nouveau_channel *chan) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + struct nouveau_dma_priv *dma = nvchan->dma; + + if (dma->cur == dma->put) + return; + +#ifdef NOUVEAU_DMA_DEBUG + if (dma->push_free) { + NOUVEAU_ERR("Packet incomplete: %d left\n", dma->push_free); + return; + } +#endif + +#ifdef NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF + nouveau_dma_parse_pushbuf(chan, dma->put, dma->cur); +#endif + + WRITE_PUT(nvchan, dma->cur); +} diff --git a/src/gallium/winsys/drm/nouveau/nouveau_dma.h b/src/gallium/winsys/drm/nouveau/nouveau_dma.h new file mode 100644 index 0000000000..cfa6d26e82 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_dma.h @@ -0,0 +1,143 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifndef __NOUVEAU_DMA_H__ +#define __NOUVEAU_DMA_H__ + +#include +#include "nouveau_drmif.h" +#include "nouveau_local.h" + +#define RING_SKIPS 8 + +extern int nouveau_dma_wait(struct nouveau_channel *chan, int size); +extern void nouveau_dma_subc_bind(struct nouveau_grobj *); +extern void nouveau_dma_channel_init(struct nouveau_channel *); +extern void nouveau_dma_kickoff(struct nouveau_channel *); + +#ifdef NOUVEAU_DMA_DEBUG +static char faulty[1024]; +#endif + +static inline void +nouveau_dma_out(struct nouveau_channel *chan, uint32_t data) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + struct nouveau_dma_priv *dma = nvchan->dma; + +#ifdef NOUVEAU_DMA_DEBUG + if (dma->push_free == 0) { + NOUVEAU_ERR("No space left in packet at %s\n", faulty); + return; + } + dma->push_free--; +#endif +#ifdef NOUVEAU_DMA_TRACE + { + uint32_t offset = (dma->cur << 2) + dma->base; + NOUVEAU_MSG("\tOUT_RING %d/0x%08x -> 0x%08x\n", + nvchan->drm.channel, offset, data); + } +#endif + nvchan->pushbuf[dma->cur + (dma->base - nvchan->drm.put_base)/4] = data; + dma->cur++; +} + +static inline void +nouveau_dma_outp(struct nouveau_channel *chan, uint32_t *ptr, int size) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + struct nouveau_dma_priv *dma = nvchan->dma; + (void)dma; + +#ifdef NOUVEAU_DMA_DEBUG + if (dma->push_free < size) { + NOUVEAU_ERR("Packet too small. Free=%d, Need=%d\n", + dma->push_free, size); + return; + } +#endif +#ifdef NOUVEAU_DMA_TRACE + while (size--) { + nouveau_dma_out(chan, *ptr); + ptr++; + } +#else + memcpy(&nvchan->pushbuf[dma->cur], ptr, size << 2); +#ifdef NOUVEAU_DMA_DEBUG + dma->push_free -= size; +#endif + dma->cur += size; +#endif +} + +static inline void +nouveau_dma_space(struct nouveau_channel *chan, int size) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + struct nouveau_dma_priv *dma = nvchan->dma; + + if (dma->free < size) { + if (nouveau_dma_wait(chan, size) && chan->hang_notify) + chan->hang_notify(chan); + } + dma->free -= size; +#ifdef NOUVEAU_DMA_DEBUG + dma->push_free = size; +#endif +} + +static inline void +nouveau_dma_begin(struct nouveau_channel *chan, struct nouveau_grobj *grobj, + int method, int size, const char* file, int line) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + struct nouveau_dma_priv *dma = nvchan->dma; + (void)dma; + +#ifdef NOUVEAU_DMA_TRACE + NOUVEAU_MSG("BEGIN_RING %d/%08x/%d/0x%04x/%d\n", nvchan->drm.channel, + grobj->handle, grobj->subc, method, size); +#endif + +#ifdef NOUVEAU_DMA_DEBUG + if (dma->push_free) { + NOUVEAU_ERR("Previous packet incomplete: %d left at %s\n", + dma->push_free, faulty); + return; + } + sprintf(faulty,"%s:%d",file,line); +#endif + + nouveau_dma_space(chan, (size + 1)); + nouveau_dma_out(chan, (size << 18) | (grobj->subc << 13) | method); +} + +#define RING_SPACE_CH(ch,sz) nouveau_dma_space((ch), (sz)) +#define BEGIN_RING_CH(ch,gr,m,sz) nouveau_dma_begin((ch), (gr), (m), (sz), __FUNCTION__, __LINE__ ) +#define OUT_RING_CH(ch, data) nouveau_dma_out((ch), (data)) +#define OUT_RINGp_CH(ch,ptr,dwords) nouveau_dma_outp((ch), (void*)(ptr), \ + (dwords)) +#define FIRE_RING_CH(ch) nouveau_dma_kickoff((ch)) +#define WAIT_RING_CH(ch,sz) nouveau_dma_wait((ch), (sz)) + +#endif diff --git a/src/gallium/winsys/drm/nouveau/nouveau_dri.h b/src/gallium/winsys/drm/nouveau/nouveau_dri.h new file mode 100644 index 0000000000..1207c2d609 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_dri.h @@ -0,0 +1,28 @@ +#ifndef _NOUVEAU_DRI_ +#define _NOUVEAU_DRI_ + +#include "xf86drm.h" +#include "drm.h" +#include "nouveau_drm.h" + +struct nouveau_dri { + uint32_t device_id; /**< \brief PCI device ID */ + uint32_t width; /**< \brief width in pixels of display */ + uint32_t height; /**< \brief height in scanlines of display */ + uint32_t depth; /**< \brief depth of display (8, 15, 16, 24) */ + uint32_t bpp; /**< \brief bit depth of display (8, 16, 24, 32) */ + + uint32_t bus_type; /**< \brief ths bus type */ + uint32_t bus_mode; /**< \brief bus mode (used for AGP, maybe also for PCI-E ?) */ + + uint32_t front_offset; /**< \brief front buffer offset */ + uint32_t front_pitch; /**< \brief front buffer pitch */ + uint32_t back_offset; /**< \brief private back buffer offset */ + uint32_t back_pitch; /**< \brief private back buffer pitch */ + uint32_t depth_offset; /**< \brief private depth buffer offset */ + uint32_t depth_pitch; /**< \brief private depth buffer pitch */ + +}; + +#endif + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_drmif.h b/src/gallium/winsys/drm/nouveau/nouveau_drmif.h new file mode 100644 index 0000000000..dcd6a5eb0a --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_drmif.h @@ -0,0 +1,310 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifndef __NOUVEAU_DRMIF_H__ +#define __NOUVEAU_DRMIF_H__ + +#include +#include +#include + +#include "nouveau/nouveau_device.h" +#include "nouveau/nouveau_channel.h" +#include "nouveau/nouveau_grobj.h" +#include "nouveau/nouveau_notifier.h" +#include "nouveau/nouveau_bo.h" +#include "nouveau/nouveau_resource.h" +#include "nouveau/nouveau_pushbuf.h" + +struct nouveau_device_priv { + struct nouveau_device base; + + int fd; + drm_context_t ctx; + drmLock *lock; + int needs_close; + + struct drm_nouveau_mem_alloc sa; + void *sa_map; + struct nouveau_resource *sa_heap; +}; +#define nouveau_device(n) ((struct nouveau_device_priv *)(n)) + +extern int +nouveau_device_open_existing(struct nouveau_device **, int close, + int fd, drm_context_t ctx); + +extern int +nouveau_device_open(struct nouveau_device **, const char *busid); + +extern void +nouveau_device_close(struct nouveau_device **); + +extern int +nouveau_device_get_param(struct nouveau_device *, uint64_t param, uint64_t *v); + +extern int +nouveau_device_set_param(struct nouveau_device *, uint64_t param, uint64_t val); + +struct nouveau_fence { + struct nouveau_channel *channel; +}; + +struct nouveau_fence_cb { + struct nouveau_fence_cb *next; + void (*func)(void *); + void *priv; +}; + +struct nouveau_fence_priv { + struct nouveau_fence base; + int refcount; + + struct nouveau_fence *next; + struct nouveau_fence_cb *signal_cb; + + uint32_t sequence; + int emitted; + int signalled; +}; +#define nouveau_fence(n) ((struct nouveau_fence_priv *)(n)) + +extern int +nouveau_fence_new(struct nouveau_channel *, struct nouveau_fence **); + +extern int +nouveau_fence_ref(struct nouveau_fence *, struct nouveau_fence **); + +extern int +nouveau_fence_signal_cb(struct nouveau_fence *, void (*)(void *), void *); + +extern void +nouveau_fence_emit(struct nouveau_fence *); + +extern int +nouveau_fence_wait(struct nouveau_fence **); + +extern void +nouveau_fence_flush(struct nouveau_channel *); + +struct nouveau_pushbuf_reloc { + struct nouveau_pushbuf_bo *pbbo; + uint32_t *ptr; + uint32_t flags; + uint32_t data; + uint32_t vor; + uint32_t tor; +}; + +struct nouveau_pushbuf_bo { + struct nouveau_channel *channel; + struct nouveau_bo *bo; + unsigned flags; + unsigned handled; +}; + +#define NOUVEAU_PUSHBUF_MAX_BUFFERS 1024 +#define NOUVEAU_PUSHBUF_MAX_RELOCS 1024 +struct nouveau_pushbuf_priv { + struct nouveau_pushbuf base; + + struct nouveau_fence *fence; + + unsigned nop_jump; + unsigned start; + unsigned size; + + struct nouveau_pushbuf_bo *buffers; + unsigned nr_buffers; + struct nouveau_pushbuf_reloc *relocs; + unsigned nr_relocs; +}; +#define nouveau_pushbuf(n) ((struct nouveau_pushbuf_priv *)(n)) + +#define pbbo_to_ptr(o) ((uint64_t)(unsigned long)(o)) +#define ptr_to_pbbo(h) ((struct nouveau_pushbuf_bo *)(unsigned long)(h)) +#define pbrel_to_ptr(o) ((uint64_t)(unsigned long)(o)) +#define ptr_to_pbrel(h) ((struct nouveau_pushbuf_reloc *)(unsigned long)(h)) +#define bo_to_ptr(o) ((uint64_t)(unsigned long)(o)) +#define ptr_to_bo(h) ((struct nouveau_bo_priv *)(unsigned long)(h)) + +extern int +nouveau_pushbuf_init(struct nouveau_channel *); + +extern int +nouveau_pushbuf_flush(struct nouveau_channel *, unsigned min); + +extern int +nouveau_pushbuf_emit_reloc(struct nouveau_channel *, void *ptr, + struct nouveau_bo *, uint32_t data, uint32_t flags, + uint32_t vor, uint32_t tor); + +struct nouveau_dma_priv { + uint32_t base; + uint32_t max; + uint32_t cur; + uint32_t put; + uint32_t free; + + int push_free; +} dma; + +struct nouveau_channel_priv { + struct nouveau_channel base; + + struct drm_nouveau_channel_alloc drm; + + uint32_t *pushbuf; + void *notifier_block; + + volatile uint32_t *user; + volatile uint32_t *put; + volatile uint32_t *get; + volatile uint32_t *ref_cnt; + + struct nouveau_dma_priv dma_master; + struct nouveau_dma_priv dma_bufmgr; + struct nouveau_dma_priv *dma; + + struct nouveau_fence *fence_head; + struct nouveau_fence *fence_tail; + uint32_t fence_sequence; + + struct nouveau_pushbuf_priv pb; + + unsigned user_charge; +}; +#define nouveau_channel(n) ((struct nouveau_channel_priv *)(n)) + +extern int +nouveau_channel_alloc(struct nouveau_device *, uint32_t fb, uint32_t tt, + struct nouveau_channel **); + +extern void +nouveau_channel_free(struct nouveau_channel **); + +struct nouveau_grobj_priv { + struct nouveau_grobj base; +}; +#define nouveau_grobj(n) ((struct nouveau_grobj_priv *)(n)) + +extern int nouveau_grobj_alloc(struct nouveau_channel *, uint32_t handle, + int class, struct nouveau_grobj **); +extern int nouveau_grobj_ref(struct nouveau_channel *, uint32_t handle, + struct nouveau_grobj **); +extern void nouveau_grobj_free(struct nouveau_grobj **); + + +struct nouveau_notifier_priv { + struct nouveau_notifier base; + + struct drm_nouveau_notifierobj_alloc drm; + volatile void *map; +}; +#define nouveau_notifier(n) ((struct nouveau_notifier_priv *)(n)) + +extern int +nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle, int count, + struct nouveau_notifier **); + +extern void +nouveau_notifier_free(struct nouveau_notifier **); + +extern void +nouveau_notifier_reset(struct nouveau_notifier *, int id); + +extern uint32_t +nouveau_notifier_status(struct nouveau_notifier *, int id); + +extern uint32_t +nouveau_notifier_return_val(struct nouveau_notifier *, int id); + +extern int +nouveau_notifier_wait_status(struct nouveau_notifier *, int id, int status, + int timeout); + +struct nouveau_bo_priv { + struct nouveau_bo base; + + struct nouveau_pushbuf_bo *pending; + struct nouveau_fence *fence; + struct nouveau_fence *wr_fence; + + struct drm_nouveau_mem_alloc drm; + void *map; + + void *sysmem; + int user; + + int refcount; + + uint64_t offset; + uint64_t flags; + int tiled; +}; +#define nouveau_bo(n) ((struct nouveau_bo_priv *)(n)) + +extern int +nouveau_bo_init(struct nouveau_device *); + +extern void +nouveau_bo_takedown(struct nouveau_device *); + +extern int +nouveau_bo_new(struct nouveau_device *, uint32_t flags, int align, int size, + struct nouveau_bo **); + +extern int +nouveau_bo_user(struct nouveau_device *, void *ptr, int size, + struct nouveau_bo **); + +extern int +nouveau_bo_ref(struct nouveau_device *, uint64_t handle, struct nouveau_bo **); + +extern int +nouveau_bo_set_status(struct nouveau_bo *, uint32_t flags); + +extern void +nouveau_bo_del(struct nouveau_bo **); + +extern int +nouveau_bo_map(struct nouveau_bo *, uint32_t flags); + +extern void +nouveau_bo_unmap(struct nouveau_bo *); + +extern int +nouveau_bo_validate(struct nouveau_channel *, struct nouveau_bo *, + uint32_t flags); + +extern int +nouveau_resource_init(struct nouveau_resource **heap, unsigned start, + unsigned size); + +extern int +nouveau_resource_alloc(struct nouveau_resource *heap, int size, void *priv, + struct nouveau_resource **); + +extern void +nouveau_resource_free(struct nouveau_resource **); + +#endif diff --git a/src/gallium/winsys/drm/nouveau/nouveau_fence.c b/src/gallium/winsys/drm/nouveau/nouveau_fence.c new file mode 100644 index 0000000000..e7b0b4ff07 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_fence.c @@ -0,0 +1,214 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include +#include + +#include "nouveau_drmif.h" +#include "nouveau_dma.h" +#include "nouveau_local.h" + +static void +nouveau_fence_del_unsignalled(struct nouveau_fence *fence) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(fence->channel); + struct nouveau_fence *le; + + if (nvchan->fence_head == fence) { + nvchan->fence_head = nouveau_fence(fence)->next; + if (nvchan->fence_head == NULL) + nvchan->fence_tail = NULL; + return; + } + + le = nvchan->fence_head; + while (le && nouveau_fence(le)->next != fence) + le = nouveau_fence(le)->next; + assert(le && nouveau_fence(le)->next == fence); + nouveau_fence(le)->next = nouveau_fence(fence)->next; + if (nvchan->fence_tail == fence) + nvchan->fence_tail = le; +} + +static void +nouveau_fence_del(struct nouveau_fence **fence) +{ + struct nouveau_fence_priv *nvfence; + + if (!fence || !*fence) + return; + nvfence = nouveau_fence(*fence); + *fence = NULL; + + if (--nvfence->refcount) + return; + + if (nvfence->emitted && !nvfence->signalled) { + if (nvfence->signal_cb) { + nvfence->refcount++; + nouveau_fence_wait((void *)&nvfence); + return; + } + + nouveau_fence_del_unsignalled(&nvfence->base); + } + free(nvfence); +} + +int +nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **fence) +{ + struct nouveau_fence_priv *nvfence; + + if (!chan || !fence || *fence) + return -EINVAL; + + nvfence = calloc(1, sizeof(struct nouveau_fence_priv)); + if (!nvfence) + return -ENOMEM; + nvfence->base.channel = chan; + nvfence->refcount = 1; + + *fence = &nvfence->base; + return 0; +} + +int +nouveau_fence_ref(struct nouveau_fence *ref, struct nouveau_fence **fence) +{ + struct nouveau_fence_priv *nvfence; + + if (!fence) + return -EINVAL; + + if (*fence) { + nouveau_fence_del(fence); + *fence = NULL; + } + + if (ref) { + nvfence = nouveau_fence(ref); + nvfence->refcount++; + *fence = &nvfence->base; + } + + return 0; +} + +int +nouveau_fence_signal_cb(struct nouveau_fence *fence, void (*func)(void *), + void *priv) +{ + struct nouveau_fence_priv *nvfence = nouveau_fence(fence); + struct nouveau_fence_cb *cb; + + if (!nvfence || !func) + return -EINVAL; + + cb = malloc(sizeof(struct nouveau_fence_cb)); + if (!cb) + return -ENOMEM; + + cb->func = func; + cb->priv = priv; + cb->next = nvfence->signal_cb; + nvfence->signal_cb = cb; + return 0; +} + +void +nouveau_fence_emit(struct nouveau_fence *fence) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(fence->channel); + struct nouveau_fence_priv *nvfence = nouveau_fence(fence); + + nvfence->emitted = 1; + nvfence->sequence = ++nvchan->fence_sequence; + if (nvfence->sequence == 0xffffffff) + NOUVEAU_ERR("AII wrap unhandled\n"); + + /*XXX: assumes subc 0 is populated */ + RING_SPACE_CH(fence->channel, 2); + OUT_RING_CH (fence->channel, 0x00040050); + OUT_RING_CH (fence->channel, nvfence->sequence); + + if (nvchan->fence_tail) { + nouveau_fence(nvchan->fence_tail)->next = fence; + } else { + nvchan->fence_head = fence; + } + nvchan->fence_tail = fence; +} + +void +nouveau_fence_flush(struct nouveau_channel *chan) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + uint32_t sequence = *nvchan->ref_cnt; + + while (nvchan->fence_head) { + struct nouveau_fence_priv *nvfence; + + nvfence = nouveau_fence(nvchan->fence_head); + if (nvfence->sequence > sequence) + break; + nouveau_fence_del_unsignalled(&nvfence->base); + nvfence->signalled = 1; + + if (nvfence->signal_cb) { + struct nouveau_fence *fence = NULL; + + nouveau_fence_ref(&nvfence->base, &fence); + + while (nvfence->signal_cb) { + struct nouveau_fence_cb *cb; + + cb = nvfence->signal_cb; + nvfence->signal_cb = cb->next; + cb->func(cb->priv); + free(cb); + } + + nouveau_fence_ref(NULL, &fence); + } + } +} + +int +nouveau_fence_wait(struct nouveau_fence **fence) +{ + struct nouveau_fence_priv *nvfence; + + if (!fence || !*fence) + return -EINVAL; + nvfence = nouveau_fence(*fence); + + if (nvfence->emitted) { + while (!nvfence->signalled) + nouveau_fence_flush(nvfence->base.channel); + } + nouveau_fence_ref(NULL, fence); + + return 0; +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_grobj.c b/src/gallium/winsys/drm/nouveau/nouveau_grobj.c new file mode 100644 index 0000000000..51523897d5 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_grobj.c @@ -0,0 +1,107 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include + +#include "nouveau_drmif.h" + +int +nouveau_grobj_alloc(struct nouveau_channel *chan, uint32_t handle, + int class, struct nouveau_grobj **grobj) +{ + struct nouveau_device_priv *nvdev = nouveau_device(chan->device); + struct nouveau_grobj_priv *nvgrobj; + struct drm_nouveau_grobj_alloc g; + int ret; + + if (!nvdev || !grobj || *grobj) + return -EINVAL; + + nvgrobj = calloc(1, sizeof(*nvgrobj)); + if (!nvgrobj) + return -ENOMEM; + nvgrobj->base.channel = chan; + nvgrobj->base.handle = handle; + nvgrobj->base.grclass = class; + + g.channel = chan->id; + g.handle = handle; + g.class = class; + ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GROBJ_ALLOC, + &g, sizeof(g)); + if (ret) { + nouveau_grobj_free((void *)&nvgrobj); + return ret; + } + + *grobj = &nvgrobj->base; + return 0; +} + +int +nouveau_grobj_ref(struct nouveau_channel *chan, uint32_t handle, + struct nouveau_grobj **grobj) +{ + struct nouveau_grobj_priv *nvgrobj; + + if (!chan || !grobj || *grobj) + return -EINVAL; + + nvgrobj = calloc(1, sizeof(struct nouveau_grobj_priv)); + if (!nvgrobj) + return -ENOMEM; + nvgrobj->base.channel = chan; + nvgrobj->base.handle = handle; + nvgrobj->base.grclass = 0; + + *grobj = &nvgrobj->base; + return 0; +} + +void +nouveau_grobj_free(struct nouveau_grobj **grobj) +{ + struct nouveau_device_priv *nvdev; + struct nouveau_channel_priv *chan; + struct nouveau_grobj_priv *nvgrobj; + + if (!grobj || !*grobj) + return; + nvgrobj = nouveau_grobj(*grobj); + *grobj = NULL; + + + chan = nouveau_channel(nvgrobj->base.channel); + nvdev = nouveau_device(chan->base.device); + + if (nvgrobj->base.grclass) { + struct drm_nouveau_gpuobj_free f; + + f.channel = chan->drm.channel; + f.handle = nvgrobj->base.handle; + drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE, + &f, sizeof(f)); + } + free(nvgrobj); +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_local.h b/src/gallium/winsys/drm/nouveau/nouveau_local.h new file mode 100644 index 0000000000..e878a40803 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_local.h @@ -0,0 +1,117 @@ +#ifndef __NOUVEAU_LOCAL_H__ +#define __NOUVEAU_LOCAL_H__ + +#include "pipe/p_compiler.h" +#include "nouveau_winsys_pipe.h" +#include + +struct pipe_buffer; + +/* Debug output */ +#define NOUVEAU_MSG(fmt, args...) do { \ + fprintf(stdout, "nouveau: "fmt, ##args); \ + fflush(stdout); \ +} while(0) + +#define NOUVEAU_ERR(fmt, args...) do { \ + fprintf(stderr, "%s:%d - "fmt, __func__, __LINE__, ##args); \ + fflush(stderr); \ +} while(0) + +#define NOUVEAU_TIME_MSEC() 0 + +/* User FIFO control */ +//#define NOUVEAU_DMA_TRACE +//#define NOUVEAU_DMA_DEBUG +//#define NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF +#define NOUVEAU_DMA_BARRIER +#define NOUVEAU_DMA_TIMEOUT 2000 + +/* Push buffer access macros */ +static INLINE void +OUT_RING(struct nouveau_channel *chan, unsigned data) +{ + *(chan->pushbuf->cur++) = (data); +} + +static INLINE void +OUT_RINGp(struct nouveau_channel *chan, uint32_t *data, unsigned size) +{ + memcpy(chan->pushbuf->cur, data, size * 4); + chan->pushbuf->cur += size; +} + +static INLINE void +OUT_RINGf(struct nouveau_channel *chan, float f) +{ + union { uint32_t i; float f; } c; + c.f = f; + OUT_RING(chan, c.i); +} + +static INLINE void +BEGIN_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr, + unsigned mthd, unsigned size) +{ + if (chan->pushbuf->remaining < (size + 1)) + nouveau_pushbuf_flush(chan, (size + 1)); + OUT_RING(chan, (gr->subc << 13) | (size << 18) | mthd); + chan->pushbuf->remaining -= (size + 1); +} + +static INLINE void +FIRE_RING(struct nouveau_channel *chan) +{ + nouveau_pushbuf_flush(chan, 0); +} + +static INLINE void +BIND_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr, unsigned subc) +{ + gr->subc = subc; + BEGIN_RING(chan, gr, 0x0000, 1); + OUT_RING (chan, gr->handle); +} + +static INLINE void +OUT_RELOC(struct nouveau_channel *chan, struct nouveau_bo *bo, + unsigned data, unsigned flags, unsigned vor, unsigned tor) +{ + nouveau_pushbuf_emit_reloc(chan, chan->pushbuf->cur++, bo, + data, flags, vor, tor); +} + +/* Raw data + flags depending on FB/TT buffer */ +static INLINE void +OUT_RELOCd(struct nouveau_channel *chan, struct nouveau_bo *bo, + unsigned data, unsigned flags, unsigned vor, unsigned tor) +{ + OUT_RELOC(chan, bo, data, flags | NOUVEAU_BO_OR, vor, tor); +} + +/* FB/TT object handle */ +static INLINE void +OUT_RELOCo(struct nouveau_channel *chan, struct nouveau_bo *bo, + unsigned flags) +{ + OUT_RELOC(chan, bo, 0, flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); +} + +/* Low 32-bits of offset */ +static INLINE void +OUT_RELOCl(struct nouveau_channel *chan, struct nouveau_bo *bo, + unsigned delta, unsigned flags) +{ + OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_LOW, 0, 0); +} + +/* High 32-bits of offset */ +static INLINE void +OUT_RELOCh(struct nouveau_channel *chan, struct nouveau_bo *bo, + unsigned delta, unsigned flags) +{ + OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_HIGH, 0, 0); +} + +#endif diff --git a/src/gallium/winsys/drm/nouveau/nouveau_lock.c b/src/gallium/winsys/drm/nouveau/nouveau_lock.c new file mode 100644 index 0000000000..9adb9ac854 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_lock.c @@ -0,0 +1,94 @@ +/************************************************************************** + * + * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#include "main/glheader.h" +#include "glapi/glthread.h" +#include + +#include "nouveau_context.h" +#include "nouveau_screen.h" + +_glthread_DECLARE_STATIC_MUTEX( lockMutex ); + +static void +nouveau_contended_lock(struct nouveau_context *nv, GLuint flags) +{ + __DRIdrawablePrivate *dPriv = nv->dri_drawable; + __DRIscreenPrivate *sPriv = nv->dri_screen; + struct nouveau_screen *nv_screen = nv->nv_screen; + struct nouveau_device *dev = nv_screen->device; + struct nouveau_device_priv *nvdev = nouveau_device(dev); + + drmGetLock(nvdev->fd, nvdev->ctx, flags); + + /* If the window moved, may need to set a new cliprect now. + * + * NOTE: This releases and regains the hw lock, so all state + * checking must be done *after* this call: + */ + if (dPriv) + DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv); +} + +/* Lock the hardware and validate our state. + */ +void +LOCK_HARDWARE(struct nouveau_context *nv) +{ + struct nouveau_screen *nv_screen = nv->nv_screen; + struct nouveau_device *dev = nv_screen->device; + struct nouveau_device_priv *nvdev = nouveau_device(dev); + char __ret=0; + + _glthread_LOCK_MUTEX(lockMutex); + assert(!nv->locked); + + DRM_CAS(nvdev->lock, nvdev->ctx, + (DRM_LOCK_HELD | nvdev->ctx), __ret); + + if (__ret) + nouveau_contended_lock(nv, 0); + nv->locked = GL_TRUE; +} + + + /* Unlock the hardware using the global current context + */ +void +UNLOCK_HARDWARE(struct nouveau_context *nv) +{ + struct nouveau_screen *nv_screen = nv->nv_screen; + struct nouveau_device *dev = nv_screen->device; + struct nouveau_device_priv *nvdev = nouveau_device(dev); + + assert(nv->locked); + nv->locked = GL_FALSE; + + DRM_UNLOCK(nvdev->fd, nvdev->lock, nvdev->ctx); + + _glthread_UNLOCK_MUTEX(lockMutex); +} diff --git a/src/gallium/winsys/drm/nouveau/nouveau_notifier.c b/src/gallium/winsys/drm/nouveau/nouveau_notifier.c new file mode 100644 index 0000000000..01e8f38440 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_notifier.c @@ -0,0 +1,137 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include + +#include "nouveau_drmif.h" +#include "nouveau_local.h" + +#define NOTIFIER(__v) \ + struct nouveau_notifier_priv *nvnotify = nouveau_notifier(notifier); \ + volatile uint32_t *__v = (void*)nvnotify->map + (id * 32) + +int +nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle, + int count, struct nouveau_notifier **notifier) +{ + struct nouveau_notifier_priv *nvnotify; + int ret; + + if (!chan || !notifier || *notifier) + return -EINVAL; + + nvnotify = calloc(1, sizeof(struct nouveau_notifier_priv)); + if (!nvnotify) + return -ENOMEM; + nvnotify->base.channel = chan; + nvnotify->base.handle = handle; + + nvnotify->drm.channel = chan->id; + nvnotify->drm.handle = handle; + nvnotify->drm.count = count; + if ((ret = drmCommandWriteRead(nouveau_device(chan->device)->fd, + DRM_NOUVEAU_NOTIFIEROBJ_ALLOC, + &nvnotify->drm, + sizeof(nvnotify->drm)))) { + nouveau_notifier_free((void *)&nvnotify); + return ret; + } + + nvnotify->map = (void *)nouveau_channel(chan)->notifier_block + + nvnotify->drm.offset; + *notifier = &nvnotify->base; + return 0; +} + +void +nouveau_notifier_free(struct nouveau_notifier **notifier) +{ + + struct nouveau_notifier_priv *nvnotify; + struct nouveau_channel_priv *nvchan; + struct nouveau_device_priv *nvdev; + struct drm_nouveau_gpuobj_free f; + + if (!notifier || !*notifier) + return; + nvnotify = nouveau_notifier(*notifier); + *notifier = NULL; + + nvchan = nouveau_channel(nvnotify->base.channel); + nvdev = nouveau_device(nvchan->base.device); + + f.channel = nvchan->drm.channel; + f.handle = nvnotify->base.handle; + drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE, &f, sizeof(f)); + free(nvnotify); +} + +void +nouveau_notifier_reset(struct nouveau_notifier *notifier, int id) +{ + NOTIFIER(n); + + n[NV_NOTIFY_TIME_0 /4] = 0x00000000; + n[NV_NOTIFY_TIME_1 /4] = 0x00000000; + n[NV_NOTIFY_RETURN_VALUE/4] = 0x00000000; + n[NV_NOTIFY_STATE /4] = (NV_NOTIFY_STATE_STATUS_IN_PROCESS << + NV_NOTIFY_STATE_STATUS_SHIFT); +} + +uint32_t +nouveau_notifier_status(struct nouveau_notifier *notifier, int id) +{ + NOTIFIER(n); + + return n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT; +} + +uint32_t +nouveau_notifier_return_val(struct nouveau_notifier *notifier, int id) +{ + NOTIFIER(n); + + return n[NV_NOTIFY_RETURN_VALUE/4]; +} + +int +nouveau_notifier_wait_status(struct nouveau_notifier *notifier, int id, + int status, int timeout) +{ + NOTIFIER(n); + uint32_t time = 0, t_start = NOUVEAU_TIME_MSEC(); + + while (time <= timeout) { + uint32_t v; + + v = n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT; + if (v == status) + return 0; + + if (timeout) + time = NOUVEAU_TIME_MSEC() - t_start; + } + + return -EBUSY; +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_pushbuf.c b/src/gallium/winsys/drm/nouveau/nouveau_pushbuf.c new file mode 100644 index 0000000000..815046ba85 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_pushbuf.c @@ -0,0 +1,271 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include +#include + +#include "nouveau_drmif.h" +#include "nouveau_dma.h" + +#define PB_BUFMGR_DWORDS (4096 / 2) +#define PB_MIN_USER_DWORDS 2048 + +static int +nouveau_pushbuf_space(struct nouveau_channel *chan, unsigned min) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + struct nouveau_pushbuf_priv *nvpb = &nvchan->pb; + + assert((min + 1) <= nvchan->dma->max); + + /* Wait for enough space in push buffer */ + min = min < PB_MIN_USER_DWORDS ? PB_MIN_USER_DWORDS : min; + min += 1; /* a bit extra for the NOP */ + if (nvchan->dma->free < min) + WAIT_RING_CH(chan, min); + + /* Insert NOP, may turn into a jump later */ + RING_SPACE_CH(chan, 1); + nvpb->nop_jump = nvchan->dma->cur; + OUT_RING_CH(chan, 0); + + /* Any remaining space is available to the user */ + nvpb->start = nvchan->dma->cur; + nvpb->size = nvchan->dma->free; + nvpb->base.channel = chan; + nvpb->base.remaining = nvpb->size; + nvpb->base.cur = &nvchan->pushbuf[nvpb->start]; + + /* Create a new fence object for this "frame" */ + nouveau_fence_ref(NULL, &nvpb->fence); + nouveau_fence_new(chan, &nvpb->fence); + + return 0; +} + +int +nouveau_pushbuf_init(struct nouveau_channel *chan) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + struct nouveau_dma_priv *m = &nvchan->dma_master; + struct nouveau_dma_priv *b = &nvchan->dma_bufmgr; + int i; + + if (!nvchan) + return -EINVAL; + + /* Reassign last bit of push buffer for a "separate" bufmgr + * ring buffer + */ + m->max -= PB_BUFMGR_DWORDS; + m->free -= PB_BUFMGR_DWORDS; + + b->base = m->base + ((m->max + 2) << 2); + b->max = PB_BUFMGR_DWORDS - 2; + b->cur = b->put = 0; + b->free = b->max - b->cur; + + /* Some NOPs just to be safe + *XXX: RING_SKIPS + */ + nvchan->dma = b; + RING_SPACE_CH(chan, 8); + for (i = 0; i < 8; i++) + OUT_RING_CH(chan, 0); + nvchan->dma = m; + + nouveau_pushbuf_space(chan, 0); + chan->pushbuf = &nvchan->pb.base; + + nvchan->pb.buffers = calloc(NOUVEAU_PUSHBUF_MAX_BUFFERS, + sizeof(struct nouveau_pushbuf_bo)); + nvchan->pb.relocs = calloc(NOUVEAU_PUSHBUF_MAX_RELOCS, + sizeof(struct nouveau_pushbuf_reloc)); + return 0; +} + +static uint32_t +nouveau_pushbuf_calc_reloc(struct nouveau_bo *bo, + struct nouveau_pushbuf_reloc *r) +{ + uint32_t push; + + if (r->flags & NOUVEAU_BO_LOW) { + push = bo->offset + r->data; + } else + if (r->flags & NOUVEAU_BO_HIGH) { + push = (bo->offset + r->data) >> 32; + } else { + push = r->data; + } + + if (r->flags & NOUVEAU_BO_OR) { + if (bo->flags & NOUVEAU_BO_VRAM) + push |= r->vor; + else + push |= r->tor; + } + + return push; +} + +/* This would be our TTM "superioctl" */ +int +nouveau_pushbuf_flush(struct nouveau_channel *chan, unsigned min) +{ + struct nouveau_channel_priv *nvchan = nouveau_channel(chan); + struct nouveau_pushbuf_priv *nvpb = &nvchan->pb; + int ret, i; + + if (nvpb->base.remaining == nvpb->size) + return 0; + + nouveau_fence_flush(chan); + + nvpb->size -= nvpb->base.remaining; + nvchan->dma->cur += nvpb->size; + nvchan->dma->free -= nvpb->size; + assert(nvchan->dma->cur <= nvchan->dma->max); + + nvchan->dma = &nvchan->dma_bufmgr; + nvchan->pushbuf[nvpb->nop_jump] = 0x20000000 | + (nvchan->dma->base + (nvchan->dma->cur << 2)); + + /* Validate buffers + apply relocations */ + nvchan->user_charge = 0; + for (i = 0; i < nvpb->nr_relocs; i++) { + struct nouveau_pushbuf_reloc *r = &nvpb->relocs[i]; + struct nouveau_pushbuf_bo *pbbo = r->pbbo; + struct nouveau_bo *bo = pbbo->bo; + + /* Validated, mem matches presumed, no relocation necessary */ + if (pbbo->handled & 2) { + if (!(pbbo->handled & 1)) + assert(0); + continue; + } + + /* Not yet validated, do it now */ + if (!(pbbo->handled & 1)) { + ret = nouveau_bo_validate(chan, bo, pbbo->flags); + if (ret) { + assert(0); + return ret; + } + pbbo->handled |= 1; + + if (bo->offset == nouveau_bo(bo)->offset && + bo->flags == nouveau_bo(bo)->flags) { + pbbo->handled |= 2; + continue; + } + bo->offset = nouveau_bo(bo)->offset; + bo->flags = nouveau_bo(bo)->flags; + } + + /* Apply the relocation */ + *r->ptr = nouveau_pushbuf_calc_reloc(bo, r); + } + nvpb->nr_relocs = 0; + + /* Dereference all buffers on validate list */ + for (i = 0; i < nvpb->nr_buffers; i++) { + struct nouveau_pushbuf_bo *pbbo = &nvpb->buffers[i]; + + nouveau_bo(pbbo->bo)->pending = NULL; + nouveau_bo_del(&pbbo->bo); + } + nvpb->nr_buffers = 0; + + /* Switch back to user's ring */ + RING_SPACE_CH(chan, 1); + OUT_RING_CH(chan, 0x20000000 | ((nvpb->start << 2) + + nvchan->dma_master.base)); + nvchan->dma = &nvchan->dma_master; + + /* Fence + kickoff */ + nouveau_fence_emit(nvpb->fence); + FIRE_RING_CH(chan); + + /* Allocate space for next push buffer */ + ret = nouveau_pushbuf_space(chan, min); + assert(!ret); + + return 0; +} + +static struct nouveau_pushbuf_bo * +nouveau_pushbuf_emit_buffer(struct nouveau_channel *chan, struct nouveau_bo *bo) +{ + struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf); + struct nouveau_bo_priv *nvbo = nouveau_bo(bo); + struct nouveau_pushbuf_bo *pbbo; + + if (nvbo->pending) + return nvbo->pending; + + if (nvpb->nr_buffers >= NOUVEAU_PUSHBUF_MAX_BUFFERS) + return NULL; + pbbo = nvpb->buffers + nvpb->nr_buffers++; + nvbo->pending = pbbo; + + nouveau_bo_ref(bo->device, bo->handle, &pbbo->bo); + pbbo->channel = chan; + pbbo->flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART; + pbbo->handled = 0; + return pbbo; +} + +int +nouveau_pushbuf_emit_reloc(struct nouveau_channel *chan, void *ptr, + struct nouveau_bo *bo, uint32_t data, uint32_t flags, + uint32_t vor, uint32_t tor) +{ + struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf); + struct nouveau_pushbuf_bo *pbbo; + struct nouveau_pushbuf_reloc *r; + + if (nvpb->nr_relocs >= NOUVEAU_PUSHBUF_MAX_RELOCS) + return -ENOMEM; + + pbbo = nouveau_pushbuf_emit_buffer(chan, bo); + if (!pbbo) + return -ENOMEM; + pbbo->flags |= (flags & NOUVEAU_BO_RDWR); + pbbo->flags &= (flags | NOUVEAU_BO_RDWR); + + r = nvpb->relocs + nvpb->nr_relocs++; + r->pbbo = pbbo; + r->ptr = ptr; + r->flags = flags; + r->data = data; + r->vor = vor; + r->tor = tor; + + if (flags & NOUVEAU_BO_DUMMY) + *(uint32_t *)ptr = 0; + else + *(uint32_t *)ptr = nouveau_pushbuf_calc_reloc(bo, r); + return 0; +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_resource.c b/src/gallium/winsys/drm/nouveau/nouveau_resource.c new file mode 100644 index 0000000000..3bbcb5c45e --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_resource.c @@ -0,0 +1,116 @@ +/* + * Copyright 2007 Nouveau Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include +#include + +#include "nouveau_drmif.h" +#include "nouveau_local.h" + +int +nouveau_resource_init(struct nouveau_resource **heap, + unsigned start, unsigned size) +{ + struct nouveau_resource *r; + + r = calloc(1, sizeof(struct nouveau_resource)); + if (!r) + return 1; + + r->start = start; + r->size = size; + *heap = r; + return 0; +} + +int +nouveau_resource_alloc(struct nouveau_resource *heap, int size, void *priv, + struct nouveau_resource **res) +{ + struct nouveau_resource *r; + + if (!heap || !size || !res || *res) + return 1; + + while (heap) { + if (!heap->in_use && heap->size >= size) { + r = calloc(1, sizeof(struct nouveau_resource)); + if (!r) + return 1; + + r->start = (heap->start + heap->size) - size; + r->size = size; + r->in_use = 1; + r->priv = priv; + + heap->size -= size; + + r->next = heap->next; + if (heap->next) + heap->next->prev = r; + r->prev = heap; + heap->next = r; + + *res = r; + return 0; + } + + heap = heap->next; + } + + return 1; +} + +void +nouveau_resource_free(struct nouveau_resource **res) +{ + struct nouveau_resource *r; + + if (!res || !*res) + return; + r = *res; + *res = NULL; + + r->in_use = 0; + + if (r->next && !r->next->in_use) { + struct nouveau_resource *new = r->next; + + new->prev = r->prev; + if (r->prev) + r->prev->next = new; + new->size += r->size; + new->start = r->start; + + free(r); + r = new; + } + + if (r->prev && !r->prev->in_use) { + r->prev->next = r->next; + if (r->next) + r->next->prev = r->prev; + r->prev->size += r->size; + free(r); + } + +} diff --git a/src/gallium/winsys/drm/nouveau/nouveau_screen.c b/src/gallium/winsys/drm/nouveau/nouveau_screen.c new file mode 100644 index 0000000000..df1fe7e69b --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_screen.c @@ -0,0 +1,310 @@ +#include "utils.h" +#include "vblank.h" +#include "xmlpool.h" + +#include "pipe/p_context.h" +#include "state_tracker/st_public.h" +#include "state_tracker/st_cb_fbo.h" + +#include "nouveau_context.h" +#include "nouveau_drm.h" +#include "nouveau_dri.h" +#include "nouveau_local.h" +#include "nouveau_screen.h" +#include "nouveau_swapbuffers.h" + +#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 11 +#error nouveau_drm.h version does not match expected version +#endif + +/* Extension stuff, enabling of extensions handled by Gallium's GL state + * tracker. But, we still need to define the entry points we want. + */ +#define need_GL_ARB_fragment_program +#define need_GL_ARB_multisample +#define need_GL_ARB_occlusion_query +#define need_GL_ARB_point_parameters +#define need_GL_ARB_shader_objects +#define need_GL_ARB_texture_compression +#define need_GL_ARB_vertex_program +#define need_GL_ARB_vertex_shader +#define need_GL_ARB_vertex_buffer_object +#define need_GL_EXT_compiled_vertex_array +#define need_GL_EXT_fog_coord +#define need_GL_EXT_secondary_color +#define need_GL_EXT_framebuffer_object +#define need_GL_VERSION_2_0 +#define need_GL_VERSION_2_1 +#include "extension_helper.h" + +const struct dri_extension card_extensions[] = +{ + { "GL_ARB_multisample", GL_ARB_multisample_functions }, + { "GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions }, + { "GL_ARB_point_parameters", GL_ARB_point_parameters_functions }, + { "GL_ARB_shader_objects", GL_ARB_shader_objects_functions }, + { "GL_ARB_shading_language_100", GL_VERSION_2_0_functions }, + { "GL_ARB_shading_language_120", GL_VERSION_2_1_functions }, + { "GL_ARB_texture_compression", GL_ARB_texture_compression_functions }, + { "GL_ARB_vertex_program", GL_ARB_vertex_program_functions }, + { "GL_ARB_vertex_shader", GL_ARB_vertex_shader_functions }, + { "GL_ARB_vertex_buffer_object", GL_ARB_vertex_buffer_object_functions }, + { "GL_EXT_compiled_vertex_array", GL_EXT_compiled_vertex_array_functions }, + { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions }, + { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, + { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions }, + { NULL, 0 } +}; + +PUBLIC const char __driConfigOptions[] = +DRI_CONF_BEGIN +DRI_CONF_END; +static const GLuint __driNConfigOptions = 0; + +extern const struct dri_extension common_extensions[]; +extern const struct dri_extension nv40_extensions[]; + +static GLboolean +nouveau_screen_create(__DRIscreenPrivate *driScrnPriv) +{ + struct nouveau_dri *nv_dri = driScrnPriv->pDevPriv; + struct nouveau_screen *nv_screen; + int ret; + + if (driScrnPriv->devPrivSize != sizeof(struct nouveau_dri)) { + NOUVEAU_ERR("DRI struct mismatch between DDX/DRI\n"); + return GL_FALSE; + } + + nv_screen = CALLOC_STRUCT(nouveau_screen); + if (!nv_screen) + return GL_FALSE; + nv_screen->driScrnPriv = driScrnPriv; + driScrnPriv->private = (void *)nv_screen; + + driParseOptionInfo(&nv_screen->option_cache, + __driConfigOptions, __driNConfigOptions); + + if ((ret = nouveau_device_open_existing(&nv_screen->device, 0, + driScrnPriv->fd, 0))) { + NOUVEAU_ERR("Failed opening nouveau device: %d\n", ret); + return GL_FALSE; + } + + nv_screen->front_offset = nv_dri->front_offset; + nv_screen->front_pitch = nv_dri->front_pitch * (nv_dri->bpp / 8); + nv_screen->front_cpp = nv_dri->bpp / 8; + nv_screen->front_height = nv_dri->height; + + return GL_TRUE; +} + +static void +nouveau_screen_destroy(__DRIscreenPrivate *driScrnPriv) +{ + struct nouveau_screen *nv_screen = driScrnPriv->private; + + driScrnPriv->private = NULL; + FREE(nv_screen); +} + +static GLboolean +nouveau_create_buffer(__DRIscreenPrivate * driScrnPriv, + __DRIdrawablePrivate * driDrawPriv, + const __GLcontextModes *glVis, GLboolean pixmapBuffer) +{ + struct nouveau_framebuffer *nvfb; + enum pipe_format colour, depth, stencil; + + if (pixmapBuffer) + return GL_FALSE; + + nvfb = CALLOC_STRUCT(nouveau_framebuffer); + if (!nvfb) + return GL_FALSE; + + if (glVis->redBits == 5) + colour = PIPE_FORMAT_R5G6B5_UNORM; + else + colour = PIPE_FORMAT_A8R8G8B8_UNORM; + + if (glVis->depthBits == 16) + depth = PIPE_FORMAT_Z16_UNORM; + else if (glVis->depthBits == 24) + depth = PIPE_FORMAT_Z24S8_UNORM; + else + depth = PIPE_FORMAT_NONE; + + if (glVis->stencilBits == 8) + stencil = PIPE_FORMAT_Z24S8_UNORM; + else + stencil = PIPE_FORMAT_NONE; + + nvfb->stfb = st_create_framebuffer(glVis, colour, depth, stencil, + driDrawPriv->w, driDrawPriv->h, + (void*)nvfb); + if (!nvfb->stfb) { + free(nvfb); + return GL_FALSE; + } + + driDrawPriv->driverPrivate = (void *)nvfb; + return GL_TRUE; +} + +static void +nouveau_destroy_buffer(__DRIdrawablePrivate * driDrawPriv) +{ + struct nouveau_framebuffer *nvfb; + + nvfb = (struct nouveau_framebuffer *)driDrawPriv->driverPrivate; + st_unreference_framebuffer(&nvfb->stfb); + free(nvfb); +} + +static struct __DriverAPIRec +nouveau_api = { + .InitDriver = nouveau_screen_create, + .DestroyScreen = nouveau_screen_destroy, + .CreateContext = nouveau_context_create, + .DestroyContext = nouveau_context_destroy, + .CreateBuffer = nouveau_create_buffer, + .DestroyBuffer = nouveau_destroy_buffer, + .SwapBuffers = nouveau_swap_buffers, + .MakeCurrent = nouveau_context_bind, + .UnbindContext = nouveau_context_unbind, + .GetSwapInfo = NULL, + .GetMSC = NULL, + .WaitForMSC = NULL, + .WaitForSBC = NULL, + .SwapBuffersMSC = NULL, + .CopySubBuffer = nouveau_copy_sub_buffer, + .setTexOffset = NULL +}; + +static __GLcontextModes * +nouveau_fill_in_modes(unsigned pixel_bits, unsigned depth_bits, + unsigned stencil_bits, GLboolean have_back_buffer) +{ + __GLcontextModes * modes; + __GLcontextModes * m; + unsigned num_modes; + unsigned depth_buffer_factor; + unsigned back_buffer_factor; + int i; + + static const struct { + GLenum format; + GLenum type; + } fb_format_array[] = { + { GL_RGB , GL_UNSIGNED_SHORT_5_6_5 }, + { GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV }, + { GL_BGR , GL_UNSIGNED_INT_8_8_8_8_REV }, + }; + + /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't + * support pageflipping at all. + */ + static const GLenum back_buffer_modes[] = { + GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML + }; + + uint8_t depth_bits_array[4] = { 0, 16, 24, 24 }; + uint8_t stencil_bits_array[4] = { 0, 0, 0, 8 }; + uint8_t msaa_samples_array[1] = { 0 }; + + depth_buffer_factor = 4; + back_buffer_factor = (have_back_buffer) ? 3 : 1; + + num_modes = ((pixel_bits==16) ? 1 : 2) * + depth_buffer_factor * back_buffer_factor * 4; + modes = (*dri_interface->createContextModes)(num_modes, + sizeof(__GLcontextModes)); + m = modes; + + for (i=((pixel_bits==16)?0:1);i<((pixel_bits==16)?1:3);i++) { + if (!driFillInModes(&m, fb_format_array[i].format, + fb_format_array[i].type, + depth_bits_array, + stencil_bits_array, + depth_buffer_factor, + back_buffer_modes, + back_buffer_factor, + msaa_samples_array, 1, + GLX_TRUE_COLOR)) { + fprintf( stderr, "[%s:%u] Error creating FBConfig!\n", + __func__, __LINE__ ); + return NULL; + } + + if (!driFillInModes(&m, fb_format_array[i].format, + fb_format_array[i].type, + depth_bits_array, + stencil_bits_array, + depth_buffer_factor, + back_buffer_modes, + back_buffer_factor, + msaa_samples_array, 1, + GLX_DIRECT_COLOR)) { + fprintf( stderr, "[%s:%u] Error creating FBConfig!\n", + __func__, __LINE__ ); + return NULL; + } + } + + return modes; +} +PUBLIC void * +__driCreateNewScreen_20050727(__DRInativeDisplay *dpy, int scrn, + __DRIscreen *psc, const __GLcontextModes * modes, + const __DRIversion * ddx_version, + const __DRIversion * dri_version, + const __DRIversion * drm_version, + const __DRIframebuffer * frame_buffer, + void * pSAREA, int fd, int internal_api_version, + const __DRIinterfaceMethods * interface, + __GLcontextModes ** driver_modes) +{ + __DRIscreenPrivate *psp; + static const __DRIversion ddx_expected = + { 0, 0, NOUVEAU_DRM_HEADER_PATCHLEVEL }; + static const __DRIversion dri_expected = { 4, 0, 0 }; + static const __DRIversion drm_expected = + { 0, 0, NOUVEAU_DRM_HEADER_PATCHLEVEL }; + struct nouveau_dri *nv_dri = NULL; + + dri_interface = interface; + + if (!driCheckDriDdxDrmVersions2("nouveau", + dri_version, &dri_expected, + ddx_version, &ddx_expected, + drm_version, &drm_expected)) { + return NULL; + } + + if (drm_expected.patch != drm_version->patch) { + fprintf(stderr, "Incompatible DRM patch level.\n" + "Expected: %d\n" "Current : %d\n", + drm_expected.patch, drm_version->patch); + return NULL; + } + + psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL, + ddx_version, dri_version, drm_version, + frame_buffer, pSAREA, fd, + internal_api_version, + &nouveau_api); + if (psp == NULL) + return NULL; + nv_dri = psp->pDevPriv; + + *driver_modes = nouveau_fill_in_modes(nv_dri->bpp, + (nv_dri->bpp == 16) ? 16 : 24, + (nv_dri->bpp == 16) ? 0 : 8, + 1); + + driInitExtensions(NULL, card_extensions, GL_FALSE); + + return (void *)psp; +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_screen.h b/src/gallium/winsys/drm/nouveau/nouveau_screen.h new file mode 100644 index 0000000000..388d6be9bb --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_screen.h @@ -0,0 +1,20 @@ +#ifndef __NOUVEAU_SCREEN_H__ +#define __NOUVEAU_SCREEN_H__ + +#include "xmlconfig.h" + +struct nouveau_screen { + __DRIscreenPrivate *driScrnPriv; + driOptionCache option_cache; + + struct nouveau_device *device; + + uint32_t front_offset; + uint32_t front_pitch; + uint32_t front_cpp; + uint32_t front_height; + + void *nvc; +}; + +#endif diff --git a/src/gallium/winsys/drm/nouveau/nouveau_swapbuffers.c b/src/gallium/winsys/drm/nouveau/nouveau_swapbuffers.c new file mode 100644 index 0000000000..70e0104e83 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_swapbuffers.c @@ -0,0 +1,86 @@ +#include "main/glheader.h" +#include "glapi/glthread.h" +#include + +#include "pipe/p_context.h" +#include "state_tracker/st_public.h" +#include "state_tracker/st_context.h" +#include "state_tracker/st_cb_fbo.h" + +#include "nouveau_context.h" +#include "nouveau_local.h" +#include "nouveau_screen.h" +#include "nouveau_swapbuffers.h" + +void +nouveau_copy_buffer(__DRIdrawablePrivate *dPriv, struct pipe_surface *surf, + const drm_clip_rect_t *rect) +{ + struct nouveau_context *nv = dPriv->driContextPriv->driverPrivate; + drm_clip_rect_t *pbox; + int nbox, i; + + LOCK_HARDWARE(nv); + if (!dPriv->numClipRects) { + UNLOCK_HARDWARE(nv); + return; + } + pbox = dPriv->pClipRects; + nbox = dPriv->numClipRects; + + nv->surface_copy_prep(nv, nv->frontbuffer, surf); + for (i = 0; i < nbox; i++, pbox++) { + int sx, sy, dx, dy, w, h; + + sx = pbox->x1 - dPriv->x; + sy = pbox->y1 - dPriv->y; + dx = pbox->x1; + dy = pbox->y1; + w = pbox->x2 - pbox->x1; + h = pbox->y2 - pbox->y1; + + nv->surface_copy(nv, dx, dy, sx, sy, w, h); + } + + FIRE_RING(nv->nvc->channel); + UNLOCK_HARDWARE(nv); + + if (nv->last_stamp != dPriv->lastStamp) { + struct nouveau_framebuffer *nvfb = dPriv->driverPrivate; + st_resize_framebuffer(nvfb->stfb, dPriv->w, dPriv->h); + nv->last_stamp = dPriv->lastStamp; + } +} + +void +nouveau_copy_sub_buffer(__DRIdrawablePrivate *dPriv, int x, int y, int w, int h) +{ + struct nouveau_framebuffer *nvfb = dPriv->driverPrivate; + struct pipe_surface *surf; + + surf = st_get_framebuffer_surface(nvfb->stfb, ST_SURFACE_BACK_LEFT); + if (surf) { + drm_clip_rect_t rect; + rect.x1 = x; + rect.y1 = y; + rect.x2 = x + w; + rect.y2 = y + h; + + st_notify_swapbuffers(nvfb->stfb); + nouveau_copy_buffer(dPriv, surf, &rect); + } +} + +void +nouveau_swap_buffers(__DRIdrawablePrivate *dPriv) +{ + struct nouveau_framebuffer *nvfb = dPriv->driverPrivate; + struct pipe_surface *surf; + + surf = st_get_framebuffer_surface(nvfb->stfb, ST_SURFACE_BACK_LEFT); + if (surf) { + st_notify_swapbuffers(nvfb->stfb); + nouveau_copy_buffer(dPriv, surf, NULL); + } +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_swapbuffers.h b/src/gallium/winsys/drm/nouveau/nouveau_swapbuffers.h new file mode 100644 index 0000000000..825d3da6da --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_swapbuffers.h @@ -0,0 +1,10 @@ +#ifndef __NOUVEAU_SWAPBUFFERS_H__ +#define __NOUVEAU_SWAPBUFFERS_H__ + +extern void nouveau_copy_buffer(__DRIdrawablePrivate *, struct pipe_surface *, + const drm_clip_rect_t *); +extern void nouveau_copy_sub_buffer(__DRIdrawablePrivate *, + int x, int y, int w, int h); +extern void nouveau_swap_buffers(__DRIdrawablePrivate *); + +#endif diff --git a/src/gallium/winsys/drm/nouveau/nouveau_winsys.c b/src/gallium/winsys/drm/nouveau/nouveau_winsys.c new file mode 100644 index 0000000000..0878840dcc --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_winsys.c @@ -0,0 +1,158 @@ +#include "util/u_memory.h" + +#include "nouveau_context.h" +#include "nouveau_screen.h" +#include "nouveau_winsys_pipe.h" + +#include "nouveau/nouveau_winsys.h" + +static int +nouveau_pipe_notifier_alloc(struct nouveau_winsys *nvws, int count, + struct nouveau_notifier **notify) +{ + struct nouveau_context *nv = nvws->nv; + + return nouveau_notifier_alloc(nv->nvc->channel, nv->nvc->next_handle++, + count, notify); +} + +static int +nouveau_pipe_grobj_alloc(struct nouveau_winsys *nvws, int grclass, + struct nouveau_grobj **grobj) +{ + struct nouveau_context *nv = nvws->nv; + struct nouveau_channel *chan = nv->nvc->channel; + int ret; + + ret = nouveau_grobj_alloc(chan, nv->nvc->next_handle++, + grclass, grobj); + if (ret) + return ret; + + assert(nv->nvc->next_subchannel < 7); + BIND_RING(chan, *grobj, nv->nvc->next_subchannel++); + return 0; +} + +static int +nouveau_pipe_surface_copy(struct nouveau_winsys *nvws, struct pipe_surface *dst, + unsigned dx, unsigned dy, struct pipe_surface *src, + unsigned sx, unsigned sy, unsigned w, unsigned h) +{ + struct nouveau_context *nv = nvws->nv; + + if (nv->surface_copy_prep(nv, dst, src)) + return 1; + nv->surface_copy(nv, dx, dy, sx, sy, w, h); + nv->surface_copy_done(nv); + + return 0; +} + +static int +nouveau_pipe_surface_fill(struct nouveau_winsys *nvws, struct pipe_surface *dst, + unsigned dx, unsigned dy, unsigned w, unsigned h, + unsigned value) +{ + if (nvws->nv->surface_fill(nvws->nv, dst, dx, dy, w, h, value)) + return 1; + return 0; +} + +static int +nouveau_pipe_push_reloc(struct nouveau_winsys *nvws, void *ptr, + struct pipe_buffer *buf, uint32_t data, + uint32_t flags, uint32_t vor, uint32_t tor) +{ + return nouveau_pushbuf_emit_reloc(nvws->channel, ptr, + nouveau_buffer(buf)->bo, + data, flags, vor, tor); +} + +static int +nouveau_pipe_push_flush(struct nouveau_winsys *nvws, unsigned size, + struct pipe_fence_handle **fence) +{ + if (fence) { + struct nouveau_pushbuf *pb = nvws->channel->pushbuf; + struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(pb); + struct nouveau_fence *ref = NULL; + + nouveau_fence_ref(nvpb->fence, &ref); + *fence = (struct pipe_fence_handle *)ref; + } + + return nouveau_pushbuf_flush(nvws->channel, size); +} + +struct pipe_context * +nouveau_pipe_create(struct nouveau_context *nv) +{ + struct nouveau_channel_context *nvc = nv->nvc; + struct nouveau_winsys *nvws = CALLOC_STRUCT(nouveau_winsys); + struct pipe_screen *(*hws_create)(struct pipe_winsys *, + struct nouveau_winsys *); + struct pipe_context *(*hw_create)(struct pipe_screen *, unsigned); + struct pipe_winsys *ws; + unsigned chipset = nv->nv_screen->device->chipset; + + if (!nvws) + return NULL; + + switch (chipset & 0xf0) { + case 0x10: + case 0x20: + hws_create = nv10_screen_create; + hw_create = nv10_create; + break; + case 0x30: + hws_create = nv30_screen_create; + hw_create = nv30_create; + break; + case 0x40: + case 0x60: + hws_create = nv40_screen_create; + hw_create = nv40_create; + break; + case 0x50: + case 0x80: + case 0x90: + hws_create = nv50_screen_create; + hw_create = nv50_create; + break; + default: + NOUVEAU_ERR("Unknown chipset NV%02x\n", chipset); + return NULL; + } + + nvws->nv = nv; + nvws->channel = nv->nvc->channel; + + nvws->res_init = nouveau_resource_init; + nvws->res_alloc = nouveau_resource_alloc; + nvws->res_free = nouveau_resource_free; + + nvws->push_reloc = nouveau_pipe_push_reloc; + nvws->push_flush = nouveau_pipe_push_flush; + + nvws->grobj_alloc = nouveau_pipe_grobj_alloc; + nvws->grobj_free = nouveau_grobj_free; + + nvws->notifier_alloc = nouveau_pipe_notifier_alloc; + nvws->notifier_free = nouveau_notifier_free; + nvws->notifier_reset = nouveau_notifier_reset; + nvws->notifier_status = nouveau_notifier_status; + nvws->notifier_retval = nouveau_notifier_return_val; + nvws->notifier_wait = nouveau_notifier_wait_status; + + nvws->surface_copy = nouveau_pipe_surface_copy; + nvws->surface_fill = nouveau_pipe_surface_fill; + + ws = nouveau_create_pipe_winsys(nv); + + if (!nvc->pscreen) + nvc->pscreen = hws_create(ws, nvws); + nvc->pctx[nv->pctx_id] = hw_create(nvc->pscreen, nv->pctx_id); + return nvc->pctx[nv->pctx_id]; +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_winsys_pipe.c b/src/gallium/winsys/drm/nouveau/nouveau_winsys_pipe.c new file mode 100644 index 0000000000..5276806de6 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_winsys_pipe.c @@ -0,0 +1,206 @@ +#include "pipe/p_winsys.h" +#include "pipe/p_defines.h" +#include "pipe/p_inlines.h" + +#include "util/u_memory.h" + +#include "nouveau_context.h" +#include "nouveau_local.h" +#include "nouveau_screen.h" +#include "nouveau_swapbuffers.h" +#include "nouveau_winsys_pipe.h" + +static void +nouveau_flush_frontbuffer(struct pipe_winsys *pws, struct pipe_surface *surf, + void *context_private) +{ + struct nouveau_context *nv = context_private; + __DRIdrawablePrivate *dPriv = nv->dri_drawable; + + nouveau_copy_buffer(dPriv, surf, NULL); +} + +static const char * +nouveau_get_name(struct pipe_winsys *pws) +{ + return "Nouveau/DRI"; +} + +static struct pipe_buffer * +nouveau_pipe_bo_create(struct pipe_winsys *pws, unsigned alignment, + unsigned usage, unsigned size) +{ + struct nouveau_pipe_winsys *nvpws = (struct nouveau_pipe_winsys *)pws; + struct nouveau_context *nv = nvpws->nv; + struct nouveau_device *dev = nv->nv_screen->device; + struct nouveau_pipe_buffer *nvbuf; + uint32_t flags; + + nvbuf = calloc(1, sizeof(*nvbuf)); + if (!nvbuf) + return NULL; + nvbuf->base.refcount = 1; + nvbuf->base.alignment = alignment; + nvbuf->base.usage = usage; + nvbuf->base.size = size; + + flags = NOUVEAU_BO_LOCAL; + + if (usage & PIPE_BUFFER_USAGE_PIXEL) { + if (usage & NOUVEAU_BUFFER_USAGE_TEXTURE) + flags |= NOUVEAU_BO_GART; + flags |= NOUVEAU_BO_VRAM; + + switch (dev->chipset & 0xf0) { + case 0x50: + case 0x80: + case 0x90: + flags |= NOUVEAU_BO_TILED; + if (usage & NOUVEAU_BUFFER_USAGE_ZETA) + flags |= NOUVEAU_BO_ZTILE; + break; + default: + break; + } + } + + if (usage & PIPE_BUFFER_USAGE_VERTEX) { + if (nv->cap.hw_vertex_buffer) + flags |= NOUVEAU_BO_GART; + } + + if (usage & PIPE_BUFFER_USAGE_INDEX) { + if (nv->cap.hw_index_buffer) + flags |= NOUVEAU_BO_GART; + } + + if (nouveau_bo_new(dev, flags, alignment, size, &nvbuf->bo)) { + free(nvbuf); + return NULL; + } + + return &nvbuf->base; +} + +static struct pipe_buffer * +nouveau_pipe_bo_user_create(struct pipe_winsys *pws, void *ptr, unsigned bytes) +{ + struct nouveau_pipe_winsys *nvpws = (struct nouveau_pipe_winsys *)pws; + struct nouveau_device *dev = nvpws->nv->nv_screen->device; + struct nouveau_pipe_buffer *nvbuf; + + nvbuf = calloc(1, sizeof(*nvbuf)); + if (!nvbuf) + return NULL; + nvbuf->base.refcount = 1; + nvbuf->base.size = bytes; + + if (nouveau_bo_user(dev, ptr, bytes, &nvbuf->bo)) { + free(nvbuf); + return NULL; + } + + return &nvbuf->base; +} + +static void +nouveau_pipe_bo_del(struct pipe_winsys *ws, struct pipe_buffer *buf) +{ + struct nouveau_pipe_buffer *nvbuf = nouveau_buffer(buf); + + nouveau_bo_del(&nvbuf->bo); + free(nvbuf); +} + +static void * +nouveau_pipe_bo_map(struct pipe_winsys *pws, struct pipe_buffer *buf, + unsigned flags) +{ + struct nouveau_pipe_buffer *nvbuf = nouveau_buffer(buf); + uint32_t map_flags = 0; + + if (flags & PIPE_BUFFER_USAGE_CPU_READ) + map_flags |= NOUVEAU_BO_RD; + if (flags & PIPE_BUFFER_USAGE_CPU_WRITE) + map_flags |= NOUVEAU_BO_WR; + + if (nouveau_bo_map(nvbuf->bo, map_flags)) + return NULL; + return nvbuf->bo->map; +} + +static void +nouveau_pipe_bo_unmap(struct pipe_winsys *pws, struct pipe_buffer *buf) +{ + struct nouveau_pipe_buffer *nvbuf = nouveau_buffer(buf); + + nouveau_bo_unmap(nvbuf->bo); +} + +static INLINE struct nouveau_fence * +nouveau_pipe_fence(struct pipe_fence_handle *pfence) +{ + return (struct nouveau_fence *)pfence; +} + +static void +nouveau_pipe_fence_reference(struct pipe_winsys *ws, + struct pipe_fence_handle **ptr, + struct pipe_fence_handle *pfence) +{ + nouveau_fence_ref((void *)pfence, (void *)ptr); +} + +static int +nouveau_pipe_fence_signalled(struct pipe_winsys *ws, + struct pipe_fence_handle *pfence, unsigned flag) +{ + struct nouveau_pipe_winsys *nvpws = (struct nouveau_pipe_winsys *)ws; + struct nouveau_fence *fence = nouveau_pipe_fence(pfence); + + if (nouveau_fence(fence)->signalled == 0) + nouveau_fence_flush(nvpws->nv->nvc->channel); + + return !nouveau_fence(fence)->signalled; +} + +static int +nouveau_pipe_fence_finish(struct pipe_winsys *ws, + struct pipe_fence_handle *pfence, unsigned flag) +{ + struct nouveau_fence *fence = nouveau_pipe_fence(pfence); + struct nouveau_fence *ref = NULL; + + nouveau_fence_ref(fence, &ref); + return nouveau_fence_wait(&ref); +} + +struct pipe_winsys * +nouveau_create_pipe_winsys(struct nouveau_context *nv) +{ + struct nouveau_pipe_winsys *nvpws; + struct pipe_winsys *pws; + + nvpws = CALLOC_STRUCT(nouveau_pipe_winsys); + if (!nvpws) + return NULL; + nvpws->nv = nv; + pws = &nvpws->pws; + + pws->flush_frontbuffer = nouveau_flush_frontbuffer; + + pws->buffer_create = nouveau_pipe_bo_create; + pws->buffer_destroy = nouveau_pipe_bo_del; + pws->user_buffer_create = nouveau_pipe_bo_user_create; + pws->buffer_map = nouveau_pipe_bo_map; + pws->buffer_unmap = nouveau_pipe_bo_unmap; + + pws->fence_reference = nouveau_pipe_fence_reference; + pws->fence_signalled = nouveau_pipe_fence_signalled; + pws->fence_finish = nouveau_pipe_fence_finish; + + pws->get_name = nouveau_get_name; + + return &nvpws->pws; +} + diff --git a/src/gallium/winsys/drm/nouveau/nouveau_winsys_pipe.h b/src/gallium/winsys/drm/nouveau/nouveau_winsys_pipe.h new file mode 100644 index 0000000000..6a03ac0d77 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_winsys_pipe.h @@ -0,0 +1,34 @@ +#ifndef NOUVEAU_PIPE_WINSYS_H +#define NOUVEAU_PIPE_WINSYS_H + +#include "pipe/p_context.h" +#include "pipe/p_winsys.h" +#include "nouveau_context.h" + +struct nouveau_pipe_buffer { + struct pipe_buffer base; + struct nouveau_bo *bo; +}; + +static inline struct nouveau_pipe_buffer * +nouveau_buffer(struct pipe_buffer *buf) +{ + return (struct nouveau_pipe_buffer *)buf; +} + +struct nouveau_pipe_winsys { + struct pipe_winsys pws; + + struct nouveau_context *nv; +}; + +extern struct pipe_winsys * +nouveau_create_pipe_winsys(struct nouveau_context *nv); + +struct pipe_context * +nouveau_create_softpipe(struct nouveau_context *nv); + +struct pipe_context * +nouveau_pipe_create(struct nouveau_context *nv); + +#endif diff --git a/src/gallium/winsys/drm/nouveau/nouveau_winsys_softpipe.c b/src/gallium/winsys/drm/nouveau/nouveau_winsys_softpipe.c new file mode 100644 index 0000000000..704f6c7750 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nouveau_winsys_softpipe.c @@ -0,0 +1,85 @@ +/************************************************************************** + * + * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * + **************************************************************************/ +/* + * Authors: Keith Whitwell + */ + +#include "imports.h" + +#include "pipe/p_defines.h" +#include "pipe/p_format.h" +#include "softpipe/sp_winsys.h" + +#include "nouveau_context.h" +#include "nouveau_winsys_pipe.h" + +struct nouveau_softpipe_winsys { + struct softpipe_winsys sws; + struct nouveau_context *nv; +}; + +/** + * Return list of surface formats supported by this driver. + */ +static boolean +nouveau_is_format_supported(struct softpipe_winsys *sws, uint format) +{ + switch (format) { + case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_R5G6B5_UNORM: + case PIPE_FORMAT_Z24S8_UNORM: + return TRUE; + default: + break; + }; + + return FALSE; +} + +struct pipe_context * +nouveau_create_softpipe(struct nouveau_context *nv) +{ + struct nouveau_softpipe_winsys *nvsws; + struct pipe_screen *pscreen; + struct pipe_winsys *ws; + + ws = nouveau_create_pipe_winsys(nv); + if (!ws) + return NULL; + pscreen = softpipe_create_screen(ws); + + nvsws = CALLOC_STRUCT(nouveau_softpipe_winsys); + if (!nvsws) + return NULL; + + nvsws->sws.is_format_supported = nouveau_is_format_supported; + nvsws->nv = nv; + + return softpipe_create(pscreen, ws, &nvsws->sws); +} + diff --git a/src/gallium/winsys/drm/nouveau/nv04_surface.c b/src/gallium/winsys/drm/nouveau/nv04_surface.c new file mode 100644 index 0000000000..8fa3d106c8 --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nv04_surface.c @@ -0,0 +1,314 @@ +#include "pipe/p_context.h" +#include "pipe/p_format.h" + +#include "nouveau_context.h" + +static INLINE int +nv04_surface_format(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_A8_UNORM: + return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8; + case PIPE_FORMAT_R5G6B5_UNORM: + return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5; + case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_Z24S8_UNORM: + return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32; + default: + return -1; + } +} + +static INLINE int +nv04_rect_format(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_A8_UNORM: + return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; + case PIPE_FORMAT_R5G6B5_UNORM: + return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5; + case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_Z24S8_UNORM: + return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; + default: + return -1; + } +} + +static void +nv04_surface_copy_m2mf(struct nouveau_context *nv, unsigned dx, unsigned dy, + unsigned sx, unsigned sy, unsigned w, unsigned h) +{ + struct nouveau_channel *chan = nv->nvc->channel; + struct pipe_surface *dst = nv->surf_dst; + struct pipe_surface *src = nv->surf_src; + unsigned dst_offset, src_offset; + + dst_offset = dst->offset + (dy * dst->stride) + (dx * dst->block.size); + src_offset = src->offset + (sy * src->stride) + (sx * src->block.size); + + while (h) { + int count = (h > 2047) ? 2047 : h; + + BEGIN_RING(chan, nv->nvc->NvM2MF, + NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); + OUT_RELOCl(chan, nouveau_buffer(src->buffer)->bo, src_offset, + NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD); + OUT_RELOCl(chan, nouveau_buffer(dst->buffer)->bo, dst_offset, + NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_WR); + OUT_RING (chan, src->stride); + OUT_RING (chan, dst->stride); + OUT_RING (chan, w * src->block.size); + OUT_RING (chan, count); + OUT_RING (chan, 0x0101); + OUT_RING (chan, 0); + + h -= count; + src_offset += src->stride * count; + dst_offset += dst->stride * count; + } +} + +static void +nv04_surface_copy_blit(struct nouveau_context *nv, unsigned dx, unsigned dy, + unsigned sx, unsigned sy, unsigned w, unsigned h) +{ + struct nouveau_channel *chan = nv->nvc->channel; + + BEGIN_RING(chan, nv->nvc->NvImageBlit, 0x0300, 3); + OUT_RING (chan, (sy << 16) | sx); + OUT_RING (chan, (dy << 16) | dx); + OUT_RING (chan, ( h << 16) | w); +} + +static int +nv04_surface_copy_prep(struct nouveau_context *nv, struct pipe_surface *dst, + struct pipe_surface *src) +{ + struct nouveau_channel *chan = nv->nvc->channel; + int format; + + if (src->format != dst->format) + return 1; + + /* NV_CONTEXT_SURFACES_2D has buffer alignment restrictions, fallback + * to NV_MEMORY_TO_MEMORY_FORMAT in this case. + */ + if ((src->offset & 63) || (dst->offset & 63)) { + BEGIN_RING(nv->nvc->channel, nv->nvc->NvM2MF, + NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN, 2); + OUT_RELOCo(chan, nouveau_buffer(src->buffer)->bo, + NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RELOCo(chan, nouveau_buffer(dst->buffer)->bo, + NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + + nv->surface_copy = nv04_surface_copy_m2mf; + nv->surf_dst = dst; + nv->surf_src = src; + return 0; + + } + + if ((format = nv04_surface_format(dst->format)) < 0) { + NOUVEAU_ERR("Bad surface format 0x%x\n", dst->format); + return 1; + } + nv->surface_copy = nv04_surface_copy_blit; + + BEGIN_RING(chan, nv->nvc->NvCtxSurf2D, + NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); + OUT_RELOCo(chan, nouveau_buffer(src->buffer)->bo, + NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RELOCo(chan, nouveau_buffer(dst->buffer)->bo, + NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + + BEGIN_RING(chan, nv->nvc->NvCtxSurf2D, + NV04_CONTEXT_SURFACES_2D_FORMAT, 4); + OUT_RING (chan, format); + OUT_RING (chan, (dst->stride << 16) | src->stride); + OUT_RELOCl(chan, nouveau_buffer(src->buffer)->bo, src->offset, + NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RELOCl(chan, nouveau_buffer(dst->buffer)->bo, dst->offset, + NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + + return 0; +} + +static void +nv04_surface_copy_done(struct nouveau_context *nv) +{ + FIRE_RING(nv->nvc->channel); +} + +static int +nv04_surface_fill(struct nouveau_context *nv, struct pipe_surface *dst, + unsigned dx, unsigned dy, unsigned w, unsigned h, + unsigned value) +{ + struct nouveau_channel *chan = nv->nvc->channel; + struct nouveau_grobj *surf2d = nv->nvc->NvCtxSurf2D; + struct nouveau_grobj *rect = nv->nvc->NvGdiRect; + int cs2d_format, gdirect_format; + + if ((cs2d_format = nv04_surface_format(dst->format)) < 0) { + NOUVEAU_ERR("Bad format = %d\n", dst->format); + return 1; + } + + if ((gdirect_format = nv04_rect_format(dst->format)) < 0) { + NOUVEAU_ERR("Bad format = %d\n", dst->format); + return 1; + } + + BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); + OUT_RELOCo(chan, nouveau_buffer(dst->buffer)->bo, + NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + OUT_RELOCo(chan, nouveau_buffer(dst->buffer)->bo, + NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4); + OUT_RING (chan, cs2d_format); + OUT_RING (chan, (dst->stride << 16) | dst->stride); + OUT_RELOCl(chan, nouveau_buffer(dst->buffer)->bo, dst->offset, + NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + OUT_RELOCl(chan, nouveau_buffer(dst->buffer)->bo, dst->offset, + NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + + BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT, 1); + OUT_RING (chan, gdirect_format); + BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR1_A, 1); + OUT_RING (chan, value); + BEGIN_RING(chan, rect, + NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT(0), 2); + OUT_RING (chan, (dx << 16) | dy); + OUT_RING (chan, ( w << 16) | h); + + FIRE_RING(chan); + return 0; +} + +int +nouveau_surface_channel_create_nv04(struct nouveau_channel_context *nvc) +{ + struct nouveau_channel *chan = nvc->channel; + unsigned chipset = nvc->channel->device->chipset, class; + int ret; + + if ((ret = nouveau_grobj_alloc(chan, nvc->next_handle++, 0x39, + &nvc->NvM2MF))) { + NOUVEAU_ERR("Error creating m2mf object: %d\n", ret); + return 1; + } + BIND_RING (chan, nvc->NvM2MF, nvc->next_subchannel++); + BEGIN_RING(chan, nvc->NvM2MF, + NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1); + OUT_RING (chan, nvc->sync_notifier->handle); + + class = chipset < 0x10 ? NV04_CONTEXT_SURFACES_2D : + NV10_CONTEXT_SURFACES_2D; + if ((ret = nouveau_grobj_alloc(chan, nvc->next_handle++, class, + &nvc->NvCtxSurf2D))) { + NOUVEAU_ERR("Error creating 2D surface object: %d\n", ret); + return 1; + } + BIND_RING (chan, nvc->NvCtxSurf2D, nvc->next_subchannel++); + BEGIN_RING(chan, nvc->NvCtxSurf2D, + NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); + OUT_RING (chan, nvc->channel->vram->handle); + OUT_RING (chan, nvc->channel->vram->handle); + + class = chipset < 0x10 ? NV04_IMAGE_BLIT : NV12_IMAGE_BLIT; + if ((ret = nouveau_grobj_alloc(chan, nvc->next_handle++, class, + &nvc->NvImageBlit))) { + NOUVEAU_ERR("Error creating blit object: %d\n", ret); + return 1; + } + BIND_RING (chan, nvc->NvImageBlit, nvc->next_subchannel++); + BEGIN_RING(chan, nvc->NvImageBlit, NV04_IMAGE_BLIT_DMA_NOTIFY, 1); + OUT_RING (chan, nvc->sync_notifier->handle); + BEGIN_RING(chan, nvc->NvImageBlit, NV04_IMAGE_BLIT_SURFACE, 1); + OUT_RING (chan, nvc->NvCtxSurf2D->handle); + BEGIN_RING(chan, nvc->NvImageBlit, NV04_IMAGE_BLIT_OPERATION, 1); + OUT_RING (chan, NV04_IMAGE_BLIT_OPERATION_SRCCOPY); + + class = NV04_GDI_RECTANGLE_TEXT; + if ((ret = nouveau_grobj_alloc(chan, nvc->next_handle++, class, + &nvc->NvGdiRect))) { + NOUVEAU_ERR("Error creating rect object: %d\n", ret); + return 1; + } + BIND_RING (chan, nvc->NvGdiRect, nvc->next_subchannel++); + BEGIN_RING(chan, nvc->NvGdiRect, NV04_GDI_RECTANGLE_TEXT_DMA_NOTIFY, 1); + OUT_RING (chan, nvc->sync_notifier->handle); + BEGIN_RING(chan, nvc->NvGdiRect, NV04_GDI_RECTANGLE_TEXT_SURFACE, 1); + OUT_RING (chan, nvc->NvCtxSurf2D->handle); + BEGIN_RING(chan, nvc->NvGdiRect, NV04_GDI_RECTANGLE_TEXT_OPERATION, 1); + OUT_RING (chan, NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY); + BEGIN_RING(chan, nvc->NvGdiRect, + NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT, 1); + OUT_RING (chan, NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_LE); + + switch (chipset & 0xf0) { + case 0x00: + case 0x10: + class = NV04_SWIZZLED_SURFACE; + break; + case 0x20: + class = NV20_SWIZZLED_SURFACE; + break; + case 0x30: + class = NV30_SWIZZLED_SURFACE; + break; + case 0x40: + case 0x60: + class = NV40_SWIZZLED_SURFACE; + break; + default: + /* Famous last words: this really can't happen.. */ + assert(0); + break; + } + + ret = nouveau_grobj_alloc(chan, nvc->next_handle++, class, + &nvc->NvSwzSurf); + if (ret) { + NOUVEAU_ERR("Error creating swizzled surface: %d\n", ret); + return 1; + } + + BIND_RING (chan, nvc->NvSwzSurf, nvc->next_subchannel++); + BEGIN_RING(chan, nvc->NvSwzSurf, NV04_SWIZZLED_SURFACE_DMA_NOTIFY, 1); + OUT_RING (chan, nvc->sync_notifier->handle); + BEGIN_RING(chan, nvc->NvSwzSurf, NV04_SWIZZLED_SURFACE_DMA_IMAGE, 1); + OUT_RING (chan, nvc->channel->vram->handle); + + if (chipset < 0x10) { + class = NV04_SCALED_IMAGE_FROM_MEMORY; + } else + if (chipset < 0x40) { + class = NV10_SCALED_IMAGE_FROM_MEMORY; + } else { + class = NV40_SCALED_IMAGE_FROM_MEMORY; + } + + ret = nouveau_grobj_alloc(chan, nvc->next_handle++, class, + &nvc->NvSIFM); + if (ret) { + NOUVEAU_ERR("Error creating scaled image object: %d\n", ret); + return 1; + } + + BIND_RING (chan, nvc->NvSIFM, nvc->next_subchannel++); + + return 0; +} + +int +nouveau_surface_init_nv04(struct nouveau_context *nv) +{ + nv->surface_copy_prep = nv04_surface_copy_prep; + nv->surface_copy = nv04_surface_copy_blit; + nv->surface_copy_done = nv04_surface_copy_done; + nv->surface_fill = nv04_surface_fill; + return 0; +} + diff --git a/src/gallium/winsys/drm/nouveau/nv50_surface.c b/src/gallium/winsys/drm/nouveau/nv50_surface.c new file mode 100644 index 0000000000..c8ab7f690f --- /dev/null +++ b/src/gallium/winsys/drm/nouveau/nv50_surface.c @@ -0,0 +1,194 @@ +#include "pipe/p_context.h" +#include "pipe/p_format.h" + +#include "nouveau_context.h" + +static INLINE int +nv50_format(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_Z24S8_UNORM: + return NV50_2D_DST_FORMAT_32BPP; + case PIPE_FORMAT_X8R8G8B8_UNORM: + return NV50_2D_DST_FORMAT_24BPP; + case PIPE_FORMAT_R5G6B5_UNORM: + return NV50_2D_DST_FORMAT_16BPP; + case PIPE_FORMAT_A8_UNORM: + return NV50_2D_DST_FORMAT_8BPP; + default: + return -1; + } +} + +static int +nv50_surface_set(struct nouveau_context *nv, struct pipe_surface *surf, int dst) +{ + struct nouveau_channel *chan = nv->nvc->channel; + struct nouveau_grobj *eng2d = nv->nvc->Nv2D; + struct nouveau_bo *bo = nouveau_buffer(surf->buffer)->bo; + int surf_format, mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT; + int flags = NOUVEAU_BO_VRAM | (dst ? NOUVEAU_BO_WR : NOUVEAU_BO_RD); + + surf_format = nv50_format(surf->format); + if (surf_format < 0) + return 1; + + if (!nouveau_bo(bo)->tiled) { + BEGIN_RING(chan, eng2d, mthd, 2); + OUT_RING (chan, surf_format); + OUT_RING (chan, 1); + BEGIN_RING(chan, eng2d, mthd + 0x14, 5); + OUT_RING (chan, surf->stride); + OUT_RING (chan, surf->width); + OUT_RING (chan, surf->height); + OUT_RELOCh(chan, bo, surf->offset, flags); + OUT_RELOCl(chan, bo, surf->offset, flags); + } else { + BEGIN_RING(chan, eng2d, mthd, 5); + OUT_RING (chan, surf_format); + OUT_RING (chan, 0); + OUT_RING (chan, 0); + OUT_RING (chan, 1); + OUT_RING (chan, 0); + BEGIN_RING(chan, eng2d, mthd + 0x18, 4); + OUT_RING (chan, surf->width); + OUT_RING (chan, surf->height); + OUT_RELOCh(chan, bo, surf->offset, flags); + OUT_RELOCl(chan, bo, surf->offset, flags); + } + +#if 0 + if (dst) { + BEGIN_RING(chan, eng2d, NV50_2D_CLIP_X, 4); + OUT_RING (chan, 0); + OUT_RING (chan, 0); + OUT_RING (chan, surf->width); + OUT_RING (chan, surf->height); + } +#endif + + return 0; +} + +static int +nv50_surface_copy_prep(struct nouveau_context *nv, + struct pipe_surface *dst, struct pipe_surface *src) +{ + int ret; + + assert(src->format == dst->format); + + ret = nv50_surface_set(nv, dst, 1); + if (ret) + return ret; + + ret = nv50_surface_set(nv, src, 0); + if (ret) + return ret; + + return 0; +} + +static void +nv50_surface_copy(struct nouveau_context *nv, unsigned dx, unsigned dy, + unsigned sx, unsigned sy, unsigned w, unsigned h) +{ + struct nouveau_channel *chan = nv->nvc->channel; + struct nouveau_grobj *eng2d = nv->nvc->Nv2D; + + BEGIN_RING(chan, eng2d, 0x088c, 1); + OUT_RING (chan, 0); + BEGIN_RING(chan, eng2d, NV50_2D_BLIT_DST_X, 4); + OUT_RING (chan, dx); + OUT_RING (chan, dy); + OUT_RING (chan, w); + OUT_RING (chan, h); + BEGIN_RING(chan, eng2d, 0x08c0, 4); + OUT_RING (chan, 0); + OUT_RING (chan, 1); + OUT_RING (chan, 0); + OUT_RING (chan, 1); + BEGIN_RING(chan, eng2d, 0x08d0, 4); + OUT_RING (chan, 0); + OUT_RING (chan, sx); + OUT_RING (chan, 0); + OUT_RING (chan, sy); +} + +static void +nv50_surface_copy_done(struct nouveau_context *nv) +{ + FIRE_RING(nv->nvc->channel); +} + +static int +nv50_surface_fill(struct nouveau_context *nv, struct pipe_surface *dst, + unsigned dx, unsigned dy, unsigned w, unsigned h, + unsigned value) +{ + struct nouveau_channel *chan = nv->nvc->channel; + struct nouveau_grobj *eng2d = nv->nvc->Nv2D; + int rect_format, ret; + + rect_format = nv50_format(dst->format); + if (rect_format < 0) + return 1; + + ret = nv50_surface_set(nv, dst, 1); + if (ret) + return ret; + + BEGIN_RING(chan, eng2d, 0x0580, 3); + OUT_RING (chan, 4); + OUT_RING (chan, rect_format); + OUT_RING (chan, value); + + BEGIN_RING(chan, eng2d, NV50_2D_RECT_X1, 4); + OUT_RING (chan, dx); + OUT_RING (chan, dy); + OUT_RING (chan, dx + w); + OUT_RING (chan, dy + h); + + FIRE_RING(chan); + return 0; +} + +int +nouveau_surface_channel_create_nv50(struct nouveau_channel_context *nvc) +{ + struct nouveau_channel *chan = nvc->channel; + struct nouveau_grobj *eng2d = NULL; + int ret; + + ret = nouveau_grobj_alloc(chan, nvc->next_handle++, NV50_2D, &eng2d); + if (ret) + return ret; + nvc->Nv2D = eng2d; + + BIND_RING (chan, eng2d, nvc->next_subchannel++); + BEGIN_RING(chan, eng2d, NV50_2D_DMA_NOTIFY, 4); + OUT_RING (chan, nvc->sync_notifier->handle); + OUT_RING (chan, chan->vram->handle); + OUT_RING (chan, chan->vram->handle); + OUT_RING (chan, chan->vram->handle); + BEGIN_RING(chan, eng2d, NV50_2D_OPERATION, 1); + OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY); + BEGIN_RING(chan, eng2d, 0x0290, 1); + OUT_RING (chan, 0); + BEGIN_RING(chan, eng2d, 0x0888, 1); + OUT_RING (chan, 1); + + return 0; +} + +int +nouveau_surface_init_nv50(struct nouveau_context *nv) +{ + nv->surface_copy_prep = nv50_surface_copy_prep; + nv->surface_copy = nv50_surface_copy; + nv->surface_copy_done = nv50_surface_copy_done; + nv->surface_fill = nv50_surface_fill; + return 0; +} + -- cgit v1.2.3 From c10fb9579027ae34eda0c52acb353e8da5832495 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 4 Feb 2009 14:55:13 +1000 Subject: nouveau: link against libdrm_nouveau (installed with libdrm) --- src/gallium/drivers/nouveau/nouveau_bo.h | 53 - src/gallium/drivers/nouveau/nouveau_channel.h | 40 - src/gallium/drivers/nouveau/nouveau_class.h | 8006 -------------------- src/gallium/drivers/nouveau/nouveau_device.h | 30 - src/gallium/drivers/nouveau/nouveau_grobj.h | 35 - src/gallium/drivers/nouveau/nouveau_notifier.h | 43 - src/gallium/drivers/nouveau/nouveau_pushbuf.h | 32 - src/gallium/drivers/nouveau/nouveau_resource.h | 37 - src/gallium/drivers/nouveau/nouveau_stateobj.h | 5 +- src/gallium/drivers/nv50/nv50_state_validate.c | 12 +- src/gallium/drivers/nv50/nv50_tex.c | 6 +- src/gallium/winsys/drm/nouveau/common/Makefile | 13 +- src/gallium/winsys/drm/nouveau/common/nouveau_bo.c | 504 -- .../winsys/drm/nouveau/common/nouveau_channel.c | 126 - .../winsys/drm/nouveau/common/nouveau_context.c | 20 +- .../winsys/drm/nouveau/common/nouveau_context.h | 10 +- .../winsys/drm/nouveau/common/nouveau_device.c | 159 - .../winsys/drm/nouveau/common/nouveau_dma.c | 219 - .../winsys/drm/nouveau/common/nouveau_dma.h | 143 - .../winsys/drm/nouveau/common/nouveau_drmif.h | 313 - .../winsys/drm/nouveau/common/nouveau_fence.c | 217 - .../winsys/drm/nouveau/common/nouveau_grobj.c | 107 - .../winsys/drm/nouveau/common/nouveau_local.h | 96 - .../winsys/drm/nouveau/common/nouveau_notifier.c | 137 - .../winsys/drm/nouveau/common/nouveau_pushbuf.c | 270 - .../winsys/drm/nouveau/common/nouveau_resource.c | 116 - .../winsys/drm/nouveau/common/nouveau_winsys.c | 15 +- .../drm/nouveau/common/nouveau_winsys_pipe.c | 28 +- .../winsys/drm/nouveau/common/nv04_surface.c | 8 - .../winsys/drm/nouveau/common/nv50_surface.c | 3 +- src/gallium/winsys/drm/nouveau/dri/Makefile | 3 + .../winsys/drm/nouveau/dri/nouveau_context_dri.h | 2 - .../winsys/drm/nouveau/dri/nouveau_screen_dri.c | 2 +- 33 files changed, 48 insertions(+), 10762 deletions(-) delete mode 100644 src/gallium/drivers/nouveau/nouveau_bo.h delete mode 100644 src/gallium/drivers/nouveau/nouveau_channel.h delete mode 100644 src/gallium/drivers/nouveau/nouveau_class.h delete mode 100644 src/gallium/drivers/nouveau/nouveau_device.h delete mode 100644 src/gallium/drivers/nouveau/nouveau_grobj.h delete mode 100644 src/gallium/drivers/nouveau/nouveau_notifier.h delete mode 100644 src/gallium/drivers/nouveau/nouveau_pushbuf.h delete mode 100644 src/gallium/drivers/nouveau/nouveau_resource.h delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_bo.c delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_channel.c delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_device.c delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_dma.c delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_dma.h delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_drmif.h delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_fence.c delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_grobj.c delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_notifier.c delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_pushbuf.c delete mode 100644 src/gallium/winsys/drm/nouveau/common/nouveau_resource.c (limited to 'src/gallium/drivers/nouveau/nouveau_stateobj.h') diff --git a/src/gallium/drivers/nouveau/nouveau_bo.h b/src/gallium/drivers/nouveau/nouveau_bo.h deleted file mode 100644 index 65b138283c..0000000000 --- a/src/gallium/drivers/nouveau/nouveau_bo.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_BO_H__ -#define __NOUVEAU_BO_H__ - -/* Relocation/Buffer type flags */ -#define NOUVEAU_BO_VRAM (1 << 0) -#define NOUVEAU_BO_GART (1 << 1) -#define NOUVEAU_BO_RD (1 << 2) -#define NOUVEAU_BO_WR (1 << 3) -#define NOUVEAU_BO_RDWR (NOUVEAU_BO_RD | NOUVEAU_BO_WR) -#define NOUVEAU_BO_MAP (1 << 4) -#define NOUVEAU_BO_PIN (1 << 5) -#define NOUVEAU_BO_LOW (1 << 6) -#define NOUVEAU_BO_HIGH (1 << 7) -#define NOUVEAU_BO_OR (1 << 8) -#define NOUVEAU_BO_LOCAL (1 << 9) -#define NOUVEAU_BO_TILED (1 << 10) -#define NOUVEAU_BO_ZTILE (1 << 11) -#define NOUVEAU_BO_DUMMY (1 << 31) - -struct nouveau_bo { - struct nouveau_device *device; - uint64_t handle; - - uint64_t size; - void *map; - - uint32_t flags; - uint64_t offset; -}; - -#endif diff --git a/src/gallium/drivers/nouveau/nouveau_channel.h b/src/gallium/drivers/nouveau/nouveau_channel.h deleted file mode 100644 index cd99a676bd..0000000000 --- a/src/gallium/drivers/nouveau/nouveau_channel.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_CHANNEL_H__ -#define __NOUVEAU_CHANNEL_H__ - -struct nouveau_channel { - struct nouveau_device *device; - int id; - - struct nouveau_pushbuf *pushbuf; - - struct nouveau_grobj *nullobj; - struct nouveau_grobj *vram; - struct nouveau_grobj *gart; - - void *user_private; - void (*hang_notify)(struct nouveau_channel *); -}; - -#endif diff --git a/src/gallium/drivers/nouveau/nouveau_class.h b/src/gallium/drivers/nouveau/nouveau_class.h deleted file mode 100644 index 3df3d7b2b8..0000000000 --- a/src/gallium/drivers/nouveau/nouveau_class.h +++ /dev/null @@ -1,8006 +0,0 @@ -/************************************************************************* - - Autogenerated file, do not edit ! - -************************************************************************** - - Copyright (C) 2006-2008 : - Dmitry Baryshkov, - Laurent Carlier, - Matthieu Castet, - Dawid Gajownik, - Jeremy Kolb, - Stephane Loeuillet, - Patrice Mandin, - Stephane Marchesin, - Serge Martin, - Sylvain Munaut, - Simon Raffeiner, - Ben Skeggs, - Erik Waling, - koala_br, - -All Rights Reserved. - -Permission is hereby granted, free of charge, to any person obtaining -a copy of this software and associated documentation files (the -"Software"), to deal in the Software without restriction, including -without limitation the rights to use, copy, modify, merge, publish, -distribute, sublicense, and/or sell copies of the Software, and to -permit persons to whom the Software is furnished to do so, subject to -the following conditions: - -The above copyright notice and this permission notice (including the -next paragraph) shall be included in all copies or substantial -portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. -IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE -LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION -OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION -WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - -*************************************************************************/ - - -#ifndef NOUVEAU_REG_H -#define NOUVEAU_REG_H 1 - - -#define NV01_ROOT 0x00000001 - - - -#define NV01_CONTEXT_DMA 0x00000002 - - - -#define NV01_DEVICE 0x00000003 - - - -#define NV01_TIMER 0x00000004 - -#define NV01_TIMER_SYNCHRONIZE 0x00000100 -#define NV01_TIMER_STOP_ALARM 0x00000104 -#define NV01_TIMER_DMA_NOTIFY 0x00000180 -#define NV01_TIMER_TIME(x) (0x00000300+((x)*4)) -#define NV01_TIMER_TIME__SIZE 0x00000002 -#define NV01_TIMER_ALARM_NOTIFY 0x00000308 - - -#define NV_IMAGE_STENCIL 0x00000010 - -#define NV_IMAGE_STENCIL_NOTIFY 0x00000104 -#define NV_IMAGE_STENCIL_DMA_NOTIFY 0x00000180 -#define NV_IMAGE_STENCIL_IMAGE_OUTPUT 0x00000200 -#define NV_IMAGE_STENCIL_IMAGE_INPUT(x) (0x00000204+((x)*4)) -#define NV_IMAGE_STENCIL_IMAGE_INPUT__SIZE 0x00000002 - - -#define NV_IMAGE_BLEND_AND 0x00000011 - -#define NV_IMAGE_BLEND_AND_NOP 0x00000100 -#define NV_IMAGE_BLEND_AND_NOTIFY 0x00000104 -#define NV_IMAGE_BLEND_AND_DMA_NOTIFY 0x00000180 -#define NV_IMAGE_BLEND_AND_IMAGE_OUTPUT 0x00000200 -#define NV_IMAGE_BLEND_AND_BETA_INPUT 0x00000204 -#define NV_IMAGE_BLEND_AND_IMAGE_INPUT 0x00000208 - - -#define NV01_CONTEXT_BETA1 0x00000012 - -#define NV01_CONTEXT_BETA1_NOP 0x00000100 -#define NV01_CONTEXT_BETA1_NOTIFY 0x00000104 -#define NV01_CONTEXT_BETA1_DMA_NOTIFY 0x00000180 -#define NV01_CONTEXT_BETA1_BETA_1D31 0x00000300 - - -#define NV_IMAGE_ROP_AND 0x00000013 - -#define NV_IMAGE_ROP_AND_NOTIFY 0x00000104 -#define NV_IMAGE_ROP_AND_DMA_NOTIFY 0x00000180 -#define NV_IMAGE_ROP_AND_IMAGE_OUTPUT 0x00000200 -#define NV_IMAGE_ROP_AND_ROP_INPUT 0x00000204 -#define NV_IMAGE_ROP_AND_IMAGE_INPUT(x) (0x00000208+((x)*4)) -#define NV_IMAGE_ROP_AND_IMAGE_INPUT__SIZE 0x00000002 - - -#define NV_IMAGE_COLOR_KEY 0x00000015 - - - -#define NV01_CONTEXT_COLOR_KEY 0x00000017 - -#define NV01_CONTEXT_COLOR_KEY_NOP 0x00000100 -#define NV01_CONTEXT_COLOR_KEY_NOTIFY 0x00000104 -#define NV01_CONTEXT_COLOR_KEY_DMA_NOTIFY 0x00000180 -#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT 0x00000300 -#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16A8Y8 0x00000001 -#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X24Y8 0x00000002 -#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16A1R5G5B5 0x00000003 -#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X17R5G5B5 0x00000004 -#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_A8R8G8B8 0x00000005 -#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X8R8G8B8 0x00000006 -#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_A16Y16 0x00000007 -#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16Y16 0x00000008 -#define NV01_CONTEXT_COLOR_KEY_COLOR 0x00000304 - - -#define NV01_CONTEXT_PATTERN 0x00000018 - -#define NV01_CONTEXT_PATTERN_NOP 0x00000100 -#define NV01_CONTEXT_PATTERN_NOTIFY 0x00000104 -#define NV01_CONTEXT_PATTERN_DMA_NOTIFY 0x00000180 -#define NV01_CONTEXT_PATTERN_COLOR_FORMAT 0x00000300 -#define NV01_CONTEXT_PATTERN_MONOCHROME_FORMAT 0x00000304 -#define NV01_CONTEXT_PATTERN_SHAPE 0x00000308 -#define NV01_CONTEXT_PATTERN_COLOR(x) (0x00000310+((x)*4)) -#define NV01_CONTEXT_PATTERN_COLOR__SIZE 0x00000002 -#define NV01_CONTEXT_PATTERN_PATTERN(x) (0x00000318+((x)*4)) -#define NV01_CONTEXT_PATTERN_PATTERN__SIZE 0x00000002 - - -#define NV01_CONTEXT_CLIP_RECTANGLE 0x00000019 - -#define NV01_CONTEXT_CLIP_RECTANGLE_NOP 0x00000100 -#define NV01_CONTEXT_CLIP_RECTANGLE_NOTIFY 0x00000104 -#define NV01_CONTEXT_CLIP_RECTANGLE_DMA_NOTIFY 0x00000180 -#define NV01_CONTEXT_CLIP_RECTANGLE_POINT 0x00000300 -#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_X_SHIFT 0 -#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_X_MASK 0x0000ffff -#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_Y_SHIFT 16 -#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_Y_MASK 0xffff0000 -#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE 0x00000304 -#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_W_SHIFT 0 -#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_W_MASK 0x0000ffff -#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_H_SHIFT 16 -#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_H_MASK 0xffff0000 - - -#define NV01_RENDER_SOLID_LINE 0x0000001c - -#define NV01_RENDER_SOLID_LINE_NOP 0x00000100 -#define NV01_RENDER_SOLID_LINE_NOTIFY 0x00000104 -#define NV01_RENDER_SOLID_LINE_PATCH 0x0000010c -#define NV01_RENDER_SOLID_LINE_DMA_NOTIFY 0x00000180 -#define NV01_RENDER_SOLID_LINE_CLIP_RECTANGLE 0x00000184 -#define NV01_RENDER_SOLID_LINE_PATTERN 0x00000188 -#define NV01_RENDER_SOLID_LINE_ROP 0x0000018c -#define NV01_RENDER_SOLID_LINE_BETA1 0x00000190 -#define NV01_RENDER_SOLID_LINE_SURFACE 0x00000194 -#define NV01_RENDER_SOLID_LINE_OPERATION 0x000002fc -#define NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY_AND 0x00000000 -#define NV01_RENDER_SOLID_LINE_OPERATION_ROP_AND 0x00000001 -#define NV01_RENDER_SOLID_LINE_OPERATION_BLEND_AND 0x00000002 -#define NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY 0x00000003 -#define NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY_PREMULT 0x00000004 -#define NV01_RENDER_SOLID_LINE_OPERATION_BLEND_PREMULT 0x00000005 -#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT 0x00000300 -#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16A8Y8 0x00000001 -#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X24Y8 0x00000002 -#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16A1R5G5B5 0x00000003 -#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X17R5G5B5 0x00000004 -#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_A8R8G8B8 0x00000005 -#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X8R8G8B8 0x00000006 -#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_A16Y16 0x00000007 -#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16Y16 0x00000008 -#define NV01_RENDER_SOLID_LINE_COLOR 0x00000304 -#define NV01_RENDER_SOLID_LINE_LINE_POINT0(x) (0x00000400+((x)*8)) -#define NV01_RENDER_SOLID_LINE_LINE_POINT0__SIZE 0x00000010 -#define NV01_RENDER_SOLID_LINE_LINE_POINT0_X_SHIFT 0 -#define NV01_RENDER_SOLID_LINE_LINE_POINT0_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_LINE_LINE_POINT0_Y_SHIFT 16 -#define NV01_RENDER_SOLID_LINE_LINE_POINT0_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_LINE_LINE_POINT1(x) (0x00000404+((x)*8)) -#define NV01_RENDER_SOLID_LINE_LINE_POINT1__SIZE 0x00000010 -#define NV01_RENDER_SOLID_LINE_LINE_POINT1_X_SHIFT 0 -#define NV01_RENDER_SOLID_LINE_LINE_POINT1_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_LINE_LINE_POINT1_Y_SHIFT 16 -#define NV01_RENDER_SOLID_LINE_LINE_POINT1_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_X(x) (0x00000480+((x)*16)) -#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_X__SIZE 0x00000010 -#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_Y(x) (0x00000484+((x)*16)) -#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_Y__SIZE 0x00000010 -#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_X(x) (0x00000488+((x)*16)) -#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_X__SIZE 0x00000010 -#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_Y(x) (0x0000048c+((x)*16)) -#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_Y__SIZE 0x00000010 -#define NV01_RENDER_SOLID_LINE_POLYLINE(x) (0x00000500+((x)*4)) -#define NV01_RENDER_SOLID_LINE_POLYLINE__SIZE 0x00000020 -#define NV01_RENDER_SOLID_LINE_POLYLINE_X_SHIFT 0 -#define NV01_RENDER_SOLID_LINE_POLYLINE_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_LINE_POLYLINE_Y_SHIFT 16 -#define NV01_RENDER_SOLID_LINE_POLYLINE_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_X(x) (0x00000580+((x)*8)) -#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_X__SIZE 0x00000010 -#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_Y(x) (0x00000584+((x)*8)) -#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_Y__SIZE 0x00000010 -#define NV01_RENDER_SOLID_LINE_CPOLYLINE_COLOR(x) (0x00000600+((x)*8)) -#define NV01_RENDER_SOLID_LINE_CPOLYLINE_COLOR__SIZE 0x00000010 -#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT(x) (0x00000604+((x)*8)) -#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT__SIZE 0x00000010 -#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_X_SHIFT 0 -#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_Y_SHIFT 16 -#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_Y_MASK 0xffff0000 - - -#define NV01_RENDER_SOLID_TRIANGLE 0x0000001d - -#define NV01_RENDER_SOLID_TRIANGLE_NOP 0x00000100 -#define NV01_RENDER_SOLID_TRIANGLE_NOTIFY 0x00000104 -#define NV01_RENDER_SOLID_TRIANGLE_PATCH 0x0000010c -#define NV01_RENDER_SOLID_TRIANGLE_DMA_NOTIFY 0x00000180 -#define NV01_RENDER_SOLID_TRIANGLE_CLIP_RECTANGLE 0x00000184 -#define NV01_RENDER_SOLID_TRIANGLE_PATTERN 0x00000188 -#define NV01_RENDER_SOLID_TRIANGLE_ROP 0x0000018c -#define NV01_RENDER_SOLID_TRIANGLE_BETA1 0x00000190 -#define NV01_RENDER_SOLID_TRIANGLE_SURFACE 0x00000194 -#define NV01_RENDER_SOLID_TRIANGLE_OPERATION 0x000002fc -#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY_AND 0x00000000 -#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_ROP_AND 0x00000001 -#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_BLEND_AND 0x00000002 -#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY 0x00000003 -#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY_PREMULT 0x00000004 -#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_BLEND_PREMULT 0x00000005 -#define NV01_RENDER_SOLID_TRIANGLE_COLOR_FORMAT 0x00000300 -#define NV01_RENDER_SOLID_TRIANGLE_COLOR 0x00000304 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0 0x00000310 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_X_SHIFT 0 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_Y_SHIFT 16 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1 0x00000314 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_X_SHIFT 0 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_Y_SHIFT 16 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2 0x00000318 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_X_SHIFT 0 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_Y_SHIFT 16 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT0_X 0x00000320 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT0_Y 0x00000324 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT1_X 0x00000328 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT1_Y 0x0000032c -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT2_X 0x00000330 -#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT2_Y 0x00000334 -#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH(x) (0x00000400+((x)*4)) -#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH__SIZE 0x00000020 -#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_X_SHIFT 0 -#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_Y_SHIFT 16 -#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_X(x) (0x00000480+((x)*8)) -#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_X__SIZE 0x00000010 -#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_Y(x) (0x00000484+((x)*8)) -#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_Y__SIZE 0x00000010 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_COLOR(x) (0x00000500+((x)*16)) -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_COLOR__SIZE 0x00000008 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0(x) (0x00000504+((x)*16)) -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0__SIZE 0x00000008 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_X_SHIFT 0 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_Y_SHIFT 16 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1(x) (0x00000508+((x)*16)) -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1__SIZE 0x00000008 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_X_SHIFT 0 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_Y_SHIFT 16 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2(x) (0x0000050c+((x)*16)) -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2__SIZE 0x00000008 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_X_SHIFT 0 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_Y_SHIFT 16 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_COLOR(x) (0x00000580+((x)*8)) -#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_COLOR__SIZE 0x00000010 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT(x) (0x00000584+((x)*8)) -#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT__SIZE 0x00000010 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_X_SHIFT 0 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_Y_SHIFT 16 -#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_Y_MASK 0xffff0000 - - -#define NV01_RENDER_SOLID_RECTANGLE 0x0000001e - -#define NV01_RENDER_SOLID_RECTANGLE_NOP 0x00000100 -#define NV01_RENDER_SOLID_RECTANGLE_NOTIFY 0x00000104 -#define NV01_RENDER_SOLID_RECTANGLE_PATCH 0x0000010c -#define NV01_RENDER_SOLID_RECTANGLE_DMA_NOTIFY 0x00000180 -#define NV01_RENDER_SOLID_RECTANGLE_CLIP_RECTANGLE 0x00000184 -#define NV01_RENDER_SOLID_RECTANGLE_PATTERN 0x00000188 -#define NV01_RENDER_SOLID_RECTANGLE_ROP 0x0000018c -#define NV01_RENDER_SOLID_RECTANGLE_BETA1 0x00000190 -#define NV01_RENDER_SOLID_RECTANGLE_SURFACE 0x00000194 -#define NV01_RENDER_SOLID_RECTANGLE_OPERATION 0x000002fc -#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY_AND 0x00000000 -#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_ROP_AND 0x00000001 -#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_BLEND_AND 0x00000002 -#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY 0x00000003 -#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY_PREMULT 0x00000004 -#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_BLEND_PREMULT 0x00000005 -#define NV01_RENDER_SOLID_RECTANGLE_COLOR_FORMAT 0x00000300 -#define NV01_RENDER_SOLID_RECTANGLE_COLOR 0x00000304 -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT(x) (0x00000400+((x)*8)) -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT__SIZE 0x00000010 -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_X_SHIFT 0 -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_X_MASK 0x0000ffff -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_Y_SHIFT 16 -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_Y_MASK 0xffff0000 -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE(x) (0x00000404+((x)*8)) -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE__SIZE 0x00000010 -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_W_SHIFT 0 -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_W_MASK 0x0000ffff -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_H_SHIFT 16 -#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_H_MASK 0xffff0000 - - -#define NV01_IMAGE_BLIT 0x0000001f - -#define NV01_IMAGE_BLIT_NOP 0x00000100 -#define NV01_IMAGE_BLIT_NOTIFY 0x00000104 -#define NV01_IMAGE_BLIT_PATCH 0x0000010c -#define NV01_IMAGE_BLIT_DMA_NOTIFY 0x00000180 -#define NV01_IMAGE_BLIT_COLOR_KEY 0x00000184 -#define NV01_IMAGE_BLIT_CLIP_RECTANGLE 0x00000188 -#define NV01_IMAGE_BLIT_PATTERN 0x0000018c -#define NV01_IMAGE_BLIT_ROP 0x00000190 -#define NV01_IMAGE_BLIT_BETA1 0x00000194 -#define NV01_IMAGE_BLIT_SURFACE 0x0000019c -#define NV01_IMAGE_BLIT_OPERATION 0x000002fc -#define NV01_IMAGE_BLIT_IMAGE_INPUT 0x00000204 -#define NV01_IMAGE_BLIT_POINT_IN 0x00000300 -#define NV01_IMAGE_BLIT_POINT_IN_X_SHIFT 0 -#define NV01_IMAGE_BLIT_POINT_IN_X_MASK 0x0000ffff -#define NV01_IMAGE_BLIT_POINT_IN_Y_SHIFT 16 -#define NV01_IMAGE_BLIT_POINT_IN_Y_MASK 0xffff0000 -#define NV01_IMAGE_BLIT_POINT_OUT 0x00000304 -#define NV01_IMAGE_BLIT_POINT_OUT_X_SHIFT 0 -#define NV01_IMAGE_BLIT_POINT_OUT_X_MASK 0x0000ffff -#define NV01_IMAGE_BLIT_POINT_OUT_Y_SHIFT 16 -#define NV01_IMAGE_BLIT_POINT_OUT_Y_MASK 0xffff0000 -#define NV01_IMAGE_BLIT_SIZE 0x00000308 -#define NV01_IMAGE_BLIT_SIZE_W_SHIFT 0 -#define NV01_IMAGE_BLIT_SIZE_W_MASK 0x0000ffff -#define NV01_IMAGE_BLIT_SIZE_H_SHIFT 16 -#define NV01_IMAGE_BLIT_SIZE_H_MASK 0xffff0000 - - -#define NV01_IMAGE_FROM_CPU 0x00000021 - -#define NV01_IMAGE_FROM_CPU_NOP 0x00000100 -#define NV01_IMAGE_FROM_CPU_NOTIFY 0x00000104 -#define NV01_IMAGE_FROM_CPU_PATCH 0x0000010c -#define NV01_IMAGE_FROM_CPU_DMA_NOTIFY 0x00000180 -#define NV01_IMAGE_FROM_CPU_COLOR_KEY 0x00000184 -#define NV01_IMAGE_FROM_CPU_CLIP_RECTANGLE 0x00000188 -#define NV01_IMAGE_FROM_CPU_PATTERN 0x0000018c -#define NV01_IMAGE_FROM_CPU_ROP 0x00000190 -#define NV01_IMAGE_FROM_CPU_BETA1 0x00000194 -#define NV01_IMAGE_FROM_CPU_SURFACE 0x00000198 -#define NV01_IMAGE_FROM_CPU_OPERATION 0x000002fc -#define NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY_AND 0x00000000 -#define NV01_IMAGE_FROM_CPU_OPERATION_ROP_AND 0x00000001 -#define NV01_IMAGE_FROM_CPU_OPERATION_BLEND_AND 0x00000002 -#define NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY 0x00000003 -#define NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY_PREMULT 0x00000004 -#define NV01_IMAGE_FROM_CPU_OPERATION_BLEND_PREMULT 0x00000005 -#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT 0x00000300 -#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_Y8 0x00000001 -#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_A1R5G5B5 0x00000002 -#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_X1R5G5B5 0x00000003 -#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_A8R8G8B8 0x00000004 -#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_X8R8G8B8 0x00000005 -#define NV01_IMAGE_FROM_CPU_POINT 0x00000304 -#define NV01_IMAGE_FROM_CPU_POINT_X_SHIFT 0 -#define NV01_IMAGE_FROM_CPU_POINT_X_MASK 0x0000ffff -#define NV01_IMAGE_FROM_CPU_POINT_Y_SHIFT 16 -#define NV01_IMAGE_FROM_CPU_POINT_Y_MASK 0xffff0000 -#define NV01_IMAGE_FROM_CPU_SIZE_OUT 0x00000308 -#define NV01_IMAGE_FROM_CPU_SIZE_OUT_W_SHIFT 0 -#define NV01_IMAGE_FROM_CPU_SIZE_OUT_W_MASK 0x0000ffff -#define NV01_IMAGE_FROM_CPU_SIZE_OUT_H_SHIFT 16 -#define NV01_IMAGE_FROM_CPU_SIZE_OUT_H_MASK 0xffff0000 -#define NV01_IMAGE_FROM_CPU_SIZE_IN 0x0000030c -#define NV01_IMAGE_FROM_CPU_SIZE_IN_W_SHIFT 0 -#define NV01_IMAGE_FROM_CPU_SIZE_IN_W_MASK 0x0000ffff -#define NV01_IMAGE_FROM_CPU_SIZE_IN_H_SHIFT 16 -#define NV01_IMAGE_FROM_CPU_SIZE_IN_H_MASK 0xffff0000 -#define NV01_IMAGE_FROM_CPU_COLOR(x) (0x00000400+((x)*4)) -#define NV01_IMAGE_FROM_CPU_COLOR__SIZE 0x00000020 - - -#define NV01_NULL 0x00000030 - - - -#define NV03_STRETCHED_IMAGE_FROM_CPU 0x00000036 - -#define NV03_STRETCHED_IMAGE_FROM_CPU_NOP 0x00000100 -#define NV03_STRETCHED_IMAGE_FROM_CPU_NOTIFY 0x00000104 -#define NV03_STRETCHED_IMAGE_FROM_CPU_PATCH 0x0000010c -#define NV03_STRETCHED_IMAGE_FROM_CPU_DMA_NOTIFY 0x00000180 -#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR_KEY 0x00000184 -#define NV03_STRETCHED_IMAGE_FROM_CPU_PATTERN 0x00000188 -#define NV03_STRETCHED_IMAGE_FROM_CPU_ROP 0x0000018c -#define NV03_STRETCHED_IMAGE_FROM_CPU_BETA1 0x00000190 -#define NV03_STRETCHED_IMAGE_FROM_CPU_SURFACE 0x00000194 -#define NV03_STRETCHED_IMAGE_FROM_CPU_OPERATION 0x000002fc -#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR_FORMAT 0x00000300 -#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN 0x00000304 -#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_W_SHIFT 0 -#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_W_MASK 0x0000ffff -#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_H_SHIFT 16 -#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_H_MASK 0xffff0000 -#define NV03_STRETCHED_IMAGE_FROM_CPU_DX_DU 0x00000308 -#define NV03_STRETCHED_IMAGE_FROM_CPU_DY_DV 0x0000030c -#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT 0x00000310 -#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_X_SHIFT 0 -#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_X_MASK 0x0000ffff -#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_Y_SHIFT 16 -#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_Y_MASK 0xffff0000 -#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE 0x00000314 -#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_W_SHIFT 0 -#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_W_MASK 0x0000ffff -#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_H_SHIFT 16 -#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_H_MASK 0xffff0000 -#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4 0x00000318 -#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_X_SHIFT 0 -#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_X_MASK 0x0000ffff -#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_Y_SHIFT 16 -#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_Y_MASK 0xffff0000 -#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR(x) (0x00000400+((x)*4)) -#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR__SIZE 0x00000020 - - -#define NV03_SCALED_IMAGE_FROM_MEMORY 0x00000037 - -#define NV03_SCALED_IMAGE_FROM_MEMORY_NOP 0x00000100 -#define NV03_SCALED_IMAGE_FROM_MEMORY_NOTIFY 0x00000104 -#define NV03_SCALED_IMAGE_FROM_MEMORY_DMA_NOTIFY 0x00000180 -#define NV03_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE 0x00000184 -#define NV03_SCALED_IMAGE_FROM_MEMORY_PATTERN 0x00000188 -#define NV03_SCALED_IMAGE_FROM_MEMORY_ROP 0x0000018c -#define NV03_SCALED_IMAGE_FROM_MEMORY_BETA1 0x00000190 -#define NV03_SCALED_IMAGE_FROM_MEMORY_SURFACE 0x00000194 -#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT 0x00000300 -#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5 0x00000001 -#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X1R5G5B5 0x00000002 -#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8 0x00000003 -#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8 0x00000004 -#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_V8YB8U8YA8 0x00000005 -#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_YB8V8YA8U8 0x00000006 -#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5 0x00000007 -#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8 0x00000008 -#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_AY8 0x00000009 -#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION 0x00000304 -#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_AND 0x00000000 -#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_ROP_AND 0x00000001 -#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_AND 0x00000002 -#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY 0x00000003 -#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_PREMULT 0x00000004 -#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_PREMULT 0x00000005 -#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT 0x00000308 -#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_SHIFT 0 -#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_MASK 0x0000ffff -#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_SHIFT 16 -#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_MASK 0xffff0000 -#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE 0x0000030c -#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_SHIFT 0 -#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_MASK 0x0000ffff -#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_SHIFT 16 -#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_MASK 0xffff0000 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT 0x00000310 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_X_SHIFT 0 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_X_MASK 0x0000ffff -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_Y_SHIFT 16 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_POINT_Y_MASK 0xffff0000 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE 0x00000314 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_W_SHIFT 0 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_W_MASK 0x0000ffff -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_H_SHIFT 16 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_OUT_SIZE_H_MASK 0xffff0000 -#define NV03_SCALED_IMAGE_FROM_MEMORY_DELTA_DU_DX 0x00000318 -#define NV03_SCALED_IMAGE_FROM_MEMORY_DELTA_DV_DY 0x0000031c -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE 0x00000400 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_W_SHIFT 0 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_W_MASK 0x0000ffff -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_H_SHIFT 16 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_SIZE_H_MASK 0xffff0000 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT 0x00000404 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_PITCH_SHIFT 0 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_PITCH_MASK 0x0000ffff -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_SHIFT 16 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_MASK 0x00ff0000 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_CENTER 0x00010000 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_ORIGIN_CORNER 0x00020000 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_INTERPOLATOR_SHIFT 24 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_FORMAT_INTERPOLATOR_MASK 0xff000000 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_OFFSET 0x00000408 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT 0x0000040c -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_U_SHIFT 0 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_U_MASK 0x0000ffff -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_V_SHIFT 16 -#define NV03_SCALED_IMAGE_FROM_MEMORY_IMAGE_IN_POINT_V_MASK 0xffff0000 - - -#define NV04_DVD_SUBPICTURE 0x00000038 - -#define NV04_DVD_SUBPICTURE_NOP 0x00000100 -#define NV04_DVD_SUBPICTURE_NOTIFY 0x00000104 -#define NV04_DVD_SUBPICTURE_WAIT_FOR_IDLE 0x00000108 -#define NV04_DVD_SUBPICTURE_DMA_NOTIFY 0x00000180 -#define NV04_DVD_SUBPICTURE_DMA_OVERLAY 0x00000184 -#define NV04_DVD_SUBPICTURE_DMA_IMAGEIN 0x00000188 -#define NV04_DVD_SUBPICTURE_DMA_IMAGEOUT 0x0000018c -#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT 0x00000300 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_X_SHIFT 0 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_X_MASK 0x0000ffff -#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_Y_SHIFT 16 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_Y_MASK 0xffff0000 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE 0x00000304 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_W_SHIFT 0 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_W_MASK 0x0000ffff -#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_H_SHIFT 16 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_H_MASK 0xffff0000 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT 0x00000308 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_PITCH_SHIFT 0 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_PITCH_MASK 0x0000ffff -#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_COLOR_SHIFT 16 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_COLOR_MASK 0xffff0000 -#define NV04_DVD_SUBPICTURE_IMAGEOUT_OFFSET 0x0000030c -#define NV04_DVD_SUBPICTURE_IMAGEIN_DELTA_DU_DX 0x00000310 -#define NV04_DVD_SUBPICTURE_IMAGEIN_DELTA_DV_DY 0x00000314 -#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE 0x00000318 -#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_W_SHIFT 0 -#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_W_MASK 0x0000ffff -#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_H_SHIFT 16 -#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_H_MASK 0xffff0000 -#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT 0x0000031c -#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_PITCH_SHIFT 0 -#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_PITCH_MASK 0x0000ffff -#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_COLOR_SHIFT 16 -#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_COLOR_MASK 0xffff0000 -#define NV04_DVD_SUBPICTURE_IMAGEIN_OFFSET 0x00000320 -#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT 0x00000324 -#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_U_SHIFT 0 -#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_U_MASK 0x0000ffff -#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_V_SHIFT 16 -#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_V_MASK 0xffff0000 -#define NV04_DVD_SUBPICTURE_OVERLAY_DELTA_DU_DX 0x00000328 -#define NV04_DVD_SUBPICTURE_OVERLAY_DELTA_DV_DY 0x0000032c -#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE 0x00000330 -#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_W_SHIFT 0 -#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_W_MASK 0x0000ffff -#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_H_SHIFT 16 -#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_H_MASK 0xffff0000 -#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT 0x00000334 -#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_PITCH_SHIFT 0 -#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_PITCH_MASK 0x0000ffff -#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_COLOR_SHIFT 16 -#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_COLOR_MASK 0xffff0000 -#define NV04_DVD_SUBPICTURE_OVERLAY_OFFSET 0x00000338 -#define NV04_DVD_SUBPICTURE_OVERLAY_POINT 0x0000033c -#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_U_SHIFT 0 -#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_U_MASK 0x0000ffff -#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_V_SHIFT 16 -#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_V_MASK 0xffff0000 - - -#define NV04_MEMORY_TO_MEMORY_FORMAT 0x00000039 - -#define NV04_MEMORY_TO_MEMORY_FORMAT_NOP 0x00000100 -#define NV04_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104 -#define NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY 0x00000180 -#define NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN 0x00000184 -#define NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_OUT 0x00000188 -#define NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c -#define NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT 0x00000310 -#define NV04_MEMORY_TO_MEMORY_FORMAT_PITCH_IN 0x00000314 -#define NV04_MEMORY_TO_MEMORY_FORMAT_PITCH_OUT 0x00000318 -#define NV04_MEMORY_TO_MEMORY_FORMAT_LINE_LENGTH_IN 0x0000031c -#define NV04_MEMORY_TO_MEMORY_FORMAT_LINE_COUNT 0x00000320 -#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT 0x00000324 -#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_INPUT_INC_SHIFT 0 -#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_INPUT_INC_MASK 0x0000000f -#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_OUTPUT_INC_SHIFT 8 -#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_OUTPUT_INC_MASK 0x00000f00 -#define NV04_MEMORY_TO_MEMORY_FORMAT_BUF_NOTIFY 0x00000328 - - -#define NV01_MEMORY_LOCAL_BANKED 0x0000003d - - - -#define NV01_MAPPING_SYSTEM 0x0000003e - - - -#define NV03_MEMORY_LOCAL_CURSOR 0x0000003f - - - -#define NV01_MEMORY_LOCAL_LINEAR 0x00000040 - - - -#define NV01_MAPPING_LOCAL 0x00000041 - - - -#define NV04_CONTEXT_SURFACES_2D 0x00000042 - -#define NV04_CONTEXT_SURFACES_2D_NOP 0x00000100 -#define NV04_CONTEXT_SURFACES_2D_NOTIFY 0x00000104 -#define NV04_CONTEXT_SURFACES_2D_PM_TRIGGER 0x00000140 -#define NV04_CONTEXT_SURFACES_2D_DMA_NOTIFY 0x00000180 -#define NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE 0x00000184 -#define NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_DESTIN 0x00000188 -#define NV04_CONTEXT_SURFACES_2D_FORMAT 0x00000300 -#define NV04_CONTEXT_SURFACES_2D_FORMAT_Y8 0x00000001 -#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1R5G5B5_Z1R5G5B5 0x00000002 -#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1R5G5B5_X1R5G5B5 0x00000003 -#define NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5 0x00000004 -#define NV04_CONTEXT_SURFACES_2D_FORMAT_Y16 0x00000005 -#define NV04_CONTEXT_SURFACES_2D_FORMAT_X8R8G8B8_Z8R8G8B8 0x00000006 -#define NV04_CONTEXT_SURFACES_2D_FORMAT_X8R8G8B8_X8R8G8B8 0x00000007 -#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1A7R8G8B8_Z1A7R8G8B8 0x00000008 -#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1A7R8G8B8_X1A7R8G8B8 0x00000009 -#define NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8 0x0000000a -#define NV04_CONTEXT_SURFACES_2D_FORMAT_Y32 0x0000000b -#define NV04_CONTEXT_SURFACES_2D_PITCH 0x00000304 -#define NV04_CONTEXT_SURFACES_2D_PITCH_SOURCE_SHIFT 0 -#define NV04_CONTEXT_SURFACES_2D_PITCH_SOURCE_MASK 0x0000ffff -#define NV04_CONTEXT_SURFACES_2D_PITCH_DESTIN_SHIFT 16 -#define NV04_CONTEXT_SURFACES_2D_PITCH_DESTIN_MASK 0xffff0000 -#define NV04_CONTEXT_SURFACES_2D_OFFSET_SOURCE 0x00000308 -#define NV04_CONTEXT_SURFACES_2D_OFFSET_DESTIN 0x0000030c - - -#define NV03_CONTEXT_ROP 0x00000043 - -#define NV03_CONTEXT_ROP_NOP 0x00000100 -#define NV03_CONTEXT_ROP_NOTIFY 0x00000104 -#define NV03_CONTEXT_ROP_DMA_NOTIFY 0x00000180 -#define NV03_CONTEXT_ROP_ROP 0x00000300 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_SHIFT 0 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_MASK 0x0000000f -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_CLEAR 0x00000000 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NOR 0x00000001 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND_INVERTED 0x00000002 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_COPY_INVERTED 0x00000003 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND_REVERSE 0x00000004 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_INVERT 0x00000005 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_XOR 0x00000006 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NAND 0x00000007 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND 0x00000008 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_EQUI 0x00000009 -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NOOP 0x0000000a -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR_INVERTED 0x0000000b -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_COPY 0x0000000c -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR_REVERSE 0x0000000d -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR 0x0000000e -#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_SET 0x0000000f -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_SHIFT 4 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_MASK 0x000000f0 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_CLEAR 0x00000000 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NOR 0x00000010 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND_INVERTED 0x00000020 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_COPY_INVERTED 0x00000030 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND_REVERSE 0x00000040 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_INVERT 0x00000050 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_XOR 0x00000060 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NAND 0x00000070 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND 0x00000080 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_EQUI 0x00000090 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NOOP 0x000000a0 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR_INVERTED 0x000000b0 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_COPY 0x000000c0 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR_REVERSE 0x000000d0 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR 0x000000e0 -#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_SET 0x000000f0 - - -#define NV04_IMAGE_PATTERN 0x00000044 - -#define NV04_IMAGE_PATTERN_NOP 0x00000100 -#define NV04_IMAGE_PATTERN_NOTIFY 0x00000104 -#define NV04_IMAGE_PATTERN_DMA_NOTIFY 0x00000180 -#define NV04_IMAGE_PATTERN_COLOR_FORMAT 0x00000300 -#define NV04_IMAGE_PATTERN_COLOR_FORMAT_A16R5G6B5 0x00000001 -#define NV04_IMAGE_PATTERN_COLOR_FORMAT_X16A1R5G5B5 0x00000002 -#define NV04_IMAGE_PATTERN_COLOR_FORMAT_A8R8G8B8 0x00000003 -#define NV04_IMAGE_PATTERN_MONOCHROME_FORMAT 0x00000304 -#define NV04_IMAGE_PATTERN_MONOCHROME_FORMAT_CGA6 0x00000001 -#define NV04_IMAGE_PATTERN_MONOCHROME_FORMAT_LE 0x00000002 -#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE 0x00000308 -#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_8X8 0x00000000 -#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_64X1 0x00000001 -#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_1X64 0x00000002 -#define NV04_IMAGE_PATTERN_PATTERN_SELECT 0x0000030c -#define NV04_IMAGE_PATTERN_PATTERN_SELECT_MONO 0x00000001 -#define NV04_IMAGE_PATTERN_PATTERN_SELECT_COLOR 0x00000002 -#define NV04_IMAGE_PATTERN_MONOCHROME_COLOR0 0x00000310 -#define NV04_IMAGE_PATTERN_MONOCHROME_COLOR1 0x00000314 -#define NV04_IMAGE_PATTERN_MONOCHROME_PATTERN0 0x00000318 -#define NV04_IMAGE_PATTERN_MONOCHROME_PATTERN1 0x0000031c -#define NV04_IMAGE_PATTERN_PATTERN_Y8(x) (0x00000400+((x)*4)) -#define NV04_IMAGE_PATTERN_PATTERN_Y8__SIZE 0x00000010 -#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y0_SHIFT 0 -#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y0_MASK 0x000000ff -#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y1_SHIFT 8 -#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y1_MASK 0x0000ff00 -#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y2_SHIFT 16 -#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y2_MASK 0x00ff0000 -#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y3_SHIFT 24 -#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y3_MASK 0xff000000 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5(x) (0x00000500+((x)*4)) -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5__SIZE 0x00000020 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B0_SHIFT 0 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B0_MASK 0x0000001f -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G0_SHIFT 5 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G0_MASK 0x000007e0 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R0_SHIFT 11 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R0_MASK 0x0000f800 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B1_SHIFT 16 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B1_MASK 0x001f0000 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G1_SHIFT 21 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G1_MASK 0x07e00000 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R1_SHIFT 27 -#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R1_MASK 0xf8000000 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5(x) (0x00000600+((x)*4)) -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5__SIZE 0x00000020 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B0_SHIFT 0 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B0_MASK 0x0000001f -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G0_SHIFT 5 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G0_MASK 0x000003e0 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R0_SHIFT 10 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R0_MASK 0x00007c00 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B1_SHIFT 16 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B1_MASK 0x001f0000 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G1_SHIFT 21 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G1_MASK 0x03e00000 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R1_SHIFT 26 -#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R1_MASK 0x7c000000 -#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8(x) (0x00000700+((x)*4)) -#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8__SIZE 0x00000040 -#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_B_SHIFT 0 -#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_B_MASK 0x000000ff -#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_G_SHIFT 8 -#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_G_MASK 0x0000ff00 -#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_R_SHIFT 16 -#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_R_MASK 0x00ff0000 - - -#define NV03_VIDEO_LUT_CURSOR_DAC 0x00000046 - -#define NV03_VIDEO_LUT_CURSOR_DAC_SYNCHRONIZE 0x00000100 -#define NV03_VIDEO_LUT_CURSOR_DAC_STOP_IMAGE 0x00000104 -#define NV03_VIDEO_LUT_CURSOR_DAC_STOP_CURSOR 0x00000108 -#define NV03_VIDEO_LUT_CURSOR_DAC_STOP_DAC 0x0000010c -#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_NOTIFY 0x00000180 -#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_IMAGE(x) (0x00000184+((x)*4)) -#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_IMAGE__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_LUT(x) (0x0000018c+((x)*4)) -#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_LUT__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_CURSOR(x) (0x00000194+((x)*4)) -#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_CURSOR__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_GET 0x000002fc -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_OFFSET(x) (0x00000300+((x)*8)) -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_OFFSET__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT(x) (0x00000304+((x)*8)) -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_PITCH_SHIFT 0 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_PITCH_MASK 0x0000ffff -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_COLOR_SHIFT 16 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_COLOR_MASK 0x0fff0000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_NOTIFY_SHIFT 28 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_NOTIFY_MASK 0xf0000000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_OFFSET(x) (0x00000340+((x)*12)) -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_OFFSET__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT(x) (0x00000344+((x)*12)) -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_X_SHIFT 0 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_X_MASK 0x0000ffff -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_Y_SHIFT 16 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_Y_MASK 0xffff0000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_FORMAT(x) (0x00000348+((x)*12)) -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_FORMAT__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A 0x00000358 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_X_SHIFT 0 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_X_MASK 0x0000ffff -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_Y_SHIFT 16 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_Y_MASK 0xffff0000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE(x) (0x00000380+((x)*16)) -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_W_SHIFT 0 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_W_MASK 0x0000ffff -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_H_SHIFT 16 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_H_MASK 0xffff0000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC(x) (0x00000384+((x)*16)) -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_START_SHIFT 0 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_START_MASK 0x0000ffff -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_WIDTH_SHIFT 16 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_WIDTH_MASK 0x0fff0000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_POLARITY_SHIFT 28 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_POLARITY_MASK 0xf0000000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC(x) (0x00000388+((x)*16)) -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_START_SHIFT 0 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_START_MASK 0x0000ffff -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_WIDTH_SHIFT 16 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_WIDTH_MASK 0x0fff0000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_POLARITY_SHIFT 28 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_POLARITY_MASK 0xf0000000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE(x) (0x0000038c+((x)*16)) -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE__SIZE 0x00000002 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_WIDTH_SHIFT 0 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_WIDTH_MASK 0x0000ffff -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_HEIGHT_SHIFT 16 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_HEIGHT_MASK 0x0fff0000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_NOTIFY_SHIFT 28 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_NOTIFY_MASK 0xf0000000 -#define NV03_VIDEO_LUT_CURSOR_DAC_SET_PIXEL_CLOCK 0x000003a0 - - -#define NV03_DX3_TEXTURED_TRIANGLE 0x00000048 - -#define NV03_DX3_TEXTURED_TRIANGLE_NOP 0x00000100 -#define NV03_DX3_TEXTURED_TRIANGLE_NOTIFY 0x00000104 -#define NV03_DX3_TEXTURED_TRIANGLE_PATCH 0x0000010c -#define NV03_DX3_TEXTURED_TRIANGLE_DMA_NOTIFY 0x00000180 -#define NV03_DX3_TEXTURED_TRIANGLE_DMA_TEXTURE 0x00000184 -#define NV03_DX3_TEXTURED_TRIANGLE_CLIP_RECTANGLE 0x00000188 -#define NV03_DX3_TEXTURED_TRIANGLE_SURFACE 0x0000018c -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_OFFSET 0x00000304 -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT 0x00000308 -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_MASK_SHIFT 0 -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_MASK_MASK 0x0000ffff -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_ENABLE_SHIFT 16 -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_ENABLE_MASK 0x000f0000 -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_SHIFT 20 -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_MASK 0x00f00000 -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MIN_SHIFT 24 -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MIN_MASK 0x0f000000 -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MAX_SHIFT 28 -#define NV03_DX3_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MAX_MASK 0xf0000000 -#define NV03_DX3_TEXTURED_TRIANGLE_FILTER 0x0000030c -#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_X_SHIFT 0 -#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_X_MASK 0x0000001f -#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_Y_SHIFT 8 -#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SPREAD_Y_MASK 0x00001f00 -#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SIZE_ADJUST_SHIFT 16 -#define NV03_DX3_TEXTURED_TRIANGLE_FILTER_SIZE_ADJUST_MASK 0x00ff0000 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR 0x00000310 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_B_SHIFT 0 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_B_MASK 0x000000ff -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_G_SHIFT 8 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_G_MASK 0x0000ff00 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_R_SHIFT 16 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_R_MASK 0x00ff0000 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT 0x00000314 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_INTERPOLATOR_SHIFT 0 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_INTERPOLATOR_MASK 0x0000000f -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_U_SHIFT 4 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_U_MASK 0x00000030 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_V_SHIFT 6 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_V_MASK 0x000000c0 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_SOURCE_COLOR_SHIFT 8 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_SOURCE_COLOR_MASK 0x00000f00 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_CULLING_SHIFT 12 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_CULLING_MASK 0x00007000 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_PERSPECTIVE_ENABLE (1 << 15) -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_FUNC_SHIFT 16 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_FUNC_MASK 0x000f0000 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_WRITE_ENABLE_SHIFT 20 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_Z_WRITE_ENABLE_MASK 0x00f00000 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_COLOR_WRITE_ENABLE_SHIFT 24 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_COLOR_WRITE_ENABLE_MASK 0x07000000 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_ROP_SHIFT 27 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_ROP_MASK 0x18000000 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_BETA (1 << 29) -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_DST_BLEND (1 << 30) -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_SRC_BLEND (1 << 31) -#define NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL 0x00000318 -#define NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_REF_SHIFT 0 -#define NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_REF_MASK 0x000000ff -#define NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_FUNC_SHIFT 8 -#define NV03_DX3_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_FUNC_MASK 0xffffff00 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR(x) (0x00001000+((x)*32)) -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR__SIZE 0x00000040 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I0_SHIFT 0 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I0_MASK 0x0000000f -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I1_SHIFT 4 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I1_MASK 0x000000f0 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I2_SHIFT 8 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I2_MASK 0x00000f00 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I3_SHIFT 12 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I3_MASK 0x0000f000 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I4_SHIFT 16 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I4_MASK 0x000f0000 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I5_SHIFT 20 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_I5_MASK 0x00f00000 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_FOG_SHIFT 24 -#define NV03_DX3_TEXTURED_TRIANGLE_SPECULAR_FOG_MASK 0xff000000 -#define NV03_DX3_TEXTURED_TRIANGLE_COLOR(x) (0x00001004+((x)*32)) -#define NV03_DX3_TEXTURED_TRIANGLE_COLOR__SIZE 0x00000040 -#define NV03_DX3_TEXTURED_TRIANGLE_X(x) (0x00001008+((x)*32)) -#define NV03_DX3_TEXTURED_TRIANGLE_X__SIZE 0x00000040 -#define NV03_DX3_TEXTURED_TRIANGLE_Y(x) (0x0000100c+((x)*32)) -#define NV03_DX3_TEXTURED_TRIANGLE_Y__SIZE 0x00000040 -#define NV03_DX3_TEXTURED_TRIANGLE_Z(x) (0x00001010+((x)*32)) -#define NV03_DX3_TEXTURED_TRIANGLE_Z__SIZE 0x00000040 -#define NV03_DX3_TEXTURED_TRIANGLE_M(x) (0x00001014+((x)*32)) -#define NV03_DX3_TEXTURED_TRIANGLE_M__SIZE 0x00000040 -#define NV03_DX3_TEXTURED_TRIANGLE_U(x) (0x00001018+((x)*32)) -#define NV03_DX3_TEXTURED_TRIANGLE_U__SIZE 0x00000040 -#define NV03_DX3_TEXTURED_TRIANGLE_V(x) (0x0000101c+((x)*32)) -#define NV03_DX3_TEXTURED_TRIANGLE_V__SIZE 0x00000040 - - -#define NV04_GDI_RECTANGLE_TEXT 0x0000004a - -#define NV04_GDI_RECTANGLE_TEXT_NOP 0x00000100 -#define NV04_GDI_RECTANGLE_TEXT_NOTIFY 0x00000104 -#define NV04_GDI_RECTANGLE_TEXT_PATCH 0x0000010c -#define NV04_GDI_RECTANGLE_TEXT_PM_TRIGGER 0x00000140 -#define NV04_GDI_RECTANGLE_TEXT_DMA_NOTIFY 0x00000180 -#define NV04_GDI_RECTANGLE_TEXT_DMA_FONTS 0x00000184 -#define NV04_GDI_RECTANGLE_TEXT_PATTERN 0x00000188 -#define NV04_GDI_RECTANGLE_TEXT_ROP 0x0000018c -#define NV04_GDI_RECTANGLE_TEXT_BETA1 0x00000190 -#define NV04_GDI_RECTANGLE_TEXT_BETA4 0x00000194 -#define NV04_GDI_RECTANGLE_TEXT_SURFACE 0x00000198 -#define NV04_GDI_RECTANGLE_TEXT_OPERATION 0x000002fc -#define NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY_AND 0x00000000 -#define NV04_GDI_RECTANGLE_TEXT_OPERATION_ROP_AND 0x00000001 -#define NV04_GDI_RECTANGLE_TEXT_OPERATION_BLEND_AND 0x00000002 -#define NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY 0x00000003 -#define NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY_PREMULT 0x00000004 -#define NV04_GDI_RECTANGLE_TEXT_OPERATION_BLEND_PREMULT 0x00000005 -#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT 0x00000300 -#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5 0x00000001 -#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_X16A1R5G5B5 0x00000002 -#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8 0x00000003 -#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT 0x00000304 -#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_CGA6 0x00000001 -#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_LE 0x00000002 -#define NV04_GDI_RECTANGLE_TEXT_COLOR1_A 0x000003fc -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT(x) (0x00000400+((x)*8)) -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT__SIZE 0x00000020 -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE(x) (0x00000404+((x)*8)) -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE__SIZE 0x00000020 -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0 0x000005f4 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_L_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_L_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_T_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_T_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1 0x000005f8 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_R_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_R_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_B_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_B_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_COLOR1_B 0x000005fc -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0(x) (0x00000600+((x)*8)) -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0__SIZE 0x00000020 -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1(x) (0x00000604+((x)*8)) -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1__SIZE 0x00000020 -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0 0x000007ec -#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1 0x000007f0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_COLOR1_C 0x000007f4 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_C 0x000007f8 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_W_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_W_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_H_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_H_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_POINT_C 0x000007fc -#define NV04_GDI_RECTANGLE_TEXT_POINT_C_X_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_POINT_C_X_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_POINT_C_Y_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_POINT_C_Y_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C(x) (0x00000800+((x)*4)) -#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C__SIZE 0x00000080 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0 0x00000be4 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1 0x00000be8 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_COLOR0_E 0x00000bec -#define NV04_GDI_RECTANGLE_TEXT_COLOR1_E 0x00000bf0 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E 0x00000bf4 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E 0x00000bf8 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_POINT_E 0x00000bfc -#define NV04_GDI_RECTANGLE_TEXT_POINT_E_X_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_POINT_E_X_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_POINT_E_Y_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_POINT_E_Y_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E(x) (0x00000c00+((x)*4)) -#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E__SIZE 0x00000080 -#define NV04_GDI_RECTANGLE_TEXT_FONT_F 0x00000ff0 -#define NV04_GDI_RECTANGLE_TEXT_FONT_F_OFFSET_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_FONT_F_OFFSET_MASK 0x0fffffff -#define NV04_GDI_RECTANGLE_TEXT_FONT_F_PITCH_SHIFT 28 -#define NV04_GDI_RECTANGLE_TEXT_FONT_F_PITCH_MASK 0xf0000000 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0 0x00000ff4 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_L_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_L_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_T_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_T_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1 0x00000ff8 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_R_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_R_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_B_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_B_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_COLOR1_F 0x00000ffc -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F(x) (0x00001000+((x)*4)) -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F__SIZE 0x00000100 -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_INDEX_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_INDEX_MASK 0x000000ff -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_X_SHIFT 8 -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_X_MASK 0x000fff00 -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_Y_SHIFT 20 -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_Y_MASK 0xfff00000 -#define NV04_GDI_RECTANGLE_TEXT_FONT_G 0x000017f0 -#define NV04_GDI_RECTANGLE_TEXT_FONT_G_OFFSET_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_FONT_G_OFFSET_MASK 0x0fffffff -#define NV04_GDI_RECTANGLE_TEXT_FONT_G_PITCH_SHIFT 28 -#define NV04_GDI_RECTANGLE_TEXT_FONT_G_PITCH_MASK 0xf0000000 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0 0x000017f4 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_L_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_L_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_T_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_T_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1 0x000017f8 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_R_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_R_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_B_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_B_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_COLOR1_G 0x000017fc -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT(x) (0x00001800+((x)*8)) -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT__SIZE 0x00000100 -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_X_SHIFT 0 -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_X_MASK 0x0000ffff -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_Y_SHIFT 16 -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_Y_MASK 0xffff0000 -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_INDEX(x) (0x00001804+((x)*8)) -#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_INDEX__SIZE 0x00000100 - - -#define NV03_GDI_RECTANGLE_TEXT 0x0000004b - -#define NV03_GDI_RECTANGLE_TEXT_NOP 0x00000100 -#define NV03_GDI_RECTANGLE_TEXT_NOTIFY 0x00000104 -#define NV03_GDI_RECTANGLE_TEXT_DMA_NOTIFY 0x00000180 -#define NV03_GDI_RECTANGLE_TEXT_PATTERN 0x00000184 -#define NV03_GDI_RECTANGLE_TEXT_ROP 0x00000188 -#define NV03_GDI_RECTANGLE_TEXT_BETA1 0x0000018c -#define NV03_GDI_RECTANGLE_TEXT_SURFACE 0x00000190 -#define NV03_GDI_RECTANGLE_TEXT_OPERATION 0x000002fc -#define NV03_GDI_RECTANGLE_TEXT_COLOR_FORMAT 0x00000300 -#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT 0x00000304 -#define NV03_GDI_RECTANGLE_TEXT_COLOR1_A 0x000003fc -#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT 0x00000400 -#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE 0x00000404 -#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B 0x000007f4 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_L_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_L_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_T_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_T_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B 0x000007f8 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_R_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_R_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_B_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_B_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_COLOR1_B 0x000007fc -#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0 0x00000800 -#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1 0x00000804 -#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0 0x00000bec -#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1 0x00000bf0 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_COLOR1_C 0x00000bf4 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_C 0x00000bf8 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_W_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_W_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_H_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_H_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_POINT_C 0x00000bfc -#define NV03_GDI_RECTANGLE_TEXT_POINT_C_X_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_POINT_C_X_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_POINT_C_Y_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_POINT_C_Y_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C(x) (0x00000c00+((x)*4)) -#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C__SIZE 0x00000020 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0 0x00000fe8 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_L_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_L_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_T_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_T_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1 0x00000fec -#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_R_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_R_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_B_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_B_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_COLOR1_D 0x00000ff0 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D 0x00000ff4 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_W_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_W_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_H_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_H_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D 0x00000ff8 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_W_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_W_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_H_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_H_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_POINT_D 0x00000ffc -#define NV03_GDI_RECTANGLE_TEXT_POINT_D_X_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_POINT_D_X_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_POINT_D_Y_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_POINT_D_Y_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_D(x) (0x00001000+((x)*4)) -#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_D__SIZE 0x00000020 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0 0x000013e4 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1 0x000013e8 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_COLOR0_E 0x000013ec -#define NV03_GDI_RECTANGLE_TEXT_COLOR1_E 0x000013f0 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E 0x000013f4 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E 0x000013f8 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_POINT_E 0x000013fc -#define NV03_GDI_RECTANGLE_TEXT_POINT_E_X_SHIFT 0 -#define NV03_GDI_RECTANGLE_TEXT_POINT_E_X_MASK 0x0000ffff -#define NV03_GDI_RECTANGLE_TEXT_POINT_E_Y_SHIFT 16 -#define NV03_GDI_RECTANGLE_TEXT_POINT_E_Y_MASK 0xffff0000 -#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E(x) (0x00001400+((x)*4)) -#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E__SIZE 0x00000020 - - -#define NV04_SWIZZLED_SURFACE 0x00000052 - -#define NV04_SWIZZLED_SURFACE_NOP 0x00000100 -#define NV04_SWIZZLED_SURFACE_NOTIFY 0x00000104 -#define NV04_SWIZZLED_SURFACE_DMA_NOTIFY 0x00000180 -#define NV04_SWIZZLED_SURFACE_DMA_IMAGE 0x00000184 -#define NV04_SWIZZLED_SURFACE_FORMAT 0x00000300 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_SHIFT 0 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_MASK 0x000000ff -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y8 0x00000001 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1R5G5B5_Z1R5G5B5 0x00000002 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1R5G5B5_X1R5G5B5 0x00000003 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_R5G6B5 0x00000004 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y16 0x00000005 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X8R8G8B8_Z8R8G8B8 0x00000006 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X8R8G8B8_X8R8G8B8 0x00000007 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1A7R8G8B8_Z1A7R8G8B8 0x00000008 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1A7R8G8B8_X1A7R8G8B8 0x00000009 -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_A8R8G8B8 0x0000000a -#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y32 0x0000000b -#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT 16 -#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_MASK 0x00ff0000 -#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT 24 -#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_MASK 0xff000000 -#define NV04_SWIZZLED_SURFACE_OFFSET 0x00000304 - - -#define NV04_CONTEXT_SURFACES_3D 0x00000053 - -#define NV04_CONTEXT_SURFACES_3D_NOP 0x00000100 -#define NV04_CONTEXT_SURFACES_3D_NOTIFY 0x00000104 -#define NV04_CONTEXT_SURFACES_3D_DMA_NOTIFY 0x00000180 -#define NV04_CONTEXT_SURFACES_3D_DMA_COLOR 0x00000184 -#define NV04_CONTEXT_SURFACES_3D_DMA_ZETA 0x00000188 -#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL 0x000002f8 -#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_X_SHIFT 0 -#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_X_MASK 0x0000ffff -#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_W_SHIFT 16 -#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_W_MASK 0xffff0000 -#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL 0x000002fc -#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_Y_SHIFT 0 -#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_Y_MASK 0x0000ffff -#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_H_SHIFT 16 -#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_H_MASK 0xffff0000 -#define NV04_CONTEXT_SURFACES_3D_FORMAT 0x00000300 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_SHIFT 0 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_MASK 0x000000ff -#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1R5G5B5_Z1R5G5B5 0x00000001 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1R5G5B5_X1R5G5B5 0x00000002 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_R5G6B5 0x00000003 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X8R8G8B8_Z8R8G8B8 0x00000004 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X8R8G8B8_X8R8G8B8 0x00000005 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1A7R8G8B8_Z1A7R8G8B8 0x00000006 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1A7R8G8B8_X1A7R8G8B8 0x00000007 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_A8R8G8B8 0x00000008 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_SHIFT 8 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_MASK 0x0000ff00 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_PITCH 0x00000100 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_SWIZZLE 0x00000200 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_U_SHIFT 16 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_U_MASK 0x00ff0000 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_V_SHIFT 24 -#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_V_MASK 0xff000000 -#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE 0x00000304 -#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_W_SHIFT 0 -#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_W_MASK 0x0000ffff -#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_H_SHIFT 16 -#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_H_MASK 0xffff0000 -#define NV04_CONTEXT_SURFACES_3D_PITCH 0x00000308 -#define NV04_CONTEXT_SURFACES_3D_PITCH_COLOR_SHIFT 0 -#define NV04_CONTEXT_SURFACES_3D_PITCH_COLOR_MASK 0x0000ffff -#define NV04_CONTEXT_SURFACES_3D_PITCH_ZETA_SHIFT 16 -#define NV04_CONTEXT_SURFACES_3D_PITCH_ZETA_MASK 0xffff0000 -#define NV04_CONTEXT_SURFACES_3D_OFFSET_COLOR 0x0000030c -#define NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA 0x00000310 - - -#define NV04_DX5_TEXTURED_TRIANGLE 0x00000054 - -#define NV04_DX5_TEXTURED_TRIANGLE_NOP 0x00000100 -#define NV04_DX5_TEXTURED_TRIANGLE_NOTIFY 0x00000104 -#define NV04_DX5_TEXTURED_TRIANGLE_DMA_NOTIFY 0x00000180 -#define NV04_DX5_TEXTURED_TRIANGLE_DMA_A 0x00000184 -#define NV04_DX5_TEXTURED_TRIANGLE_DMA_B 0x00000188 -#define NV04_DX5_TEXTURED_TRIANGLE_SURFACE 0x0000018c -#define NV04_DX5_TEXTURED_TRIANGLE_COLORKEY 0x00000300 -#define NV04_DX5_TEXTURED_TRIANGLE_OFFSET 0x00000304 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT 0x00000308 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_DMA_SHIFT 0 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_DMA_MASK 0x00000003 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_KEY_MATCH_SHIFT 2 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_KEY_MATCH_MASK 0x0000000c -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_SHIFT 4 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_MASK 0x00000030 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_CENTER 0x00000010 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_CORNER 0x00000020 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_SHIFT 6 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_MASK 0x000000c0 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_CENTER 0x00000040 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_CORNER 0x00000080 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_SHIFT 8 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_MASK 0x00000f00 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_Y8 0x00000100 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_A1R5G5B5 0x00000200 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_X1R5G5B5 0x00000300 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_A4R4G4B4 0x00000400 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_R5G6B5 0x00000500 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_A8R8G8B8 0x00000600 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_COLOR_X8R8G8B8 0x00000700 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_MIPMAP_LEVELS_SHIFT 12 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_MIPMAP_LEVELS_MASK 0x0000f000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_U_SHIFT 16 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_U_MASK 0x000f0000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_V_SHIFT 20 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_V_MASK 0x00f00000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_SHIFT 24 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_MASK 0x07000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_REPEAT 0x01000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_MIRRORED_REPEAT 0x02000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP_TO_EDGE 0x03000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP_TO_BORDER 0x04000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP 0x05000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_WRAPU (1 << 27) -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_SHIFT 28 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_MASK 0x70000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_REPEAT 0x10000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_MIRRORED_REPEAT 0x20000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP_TO_EDGE 0x30000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP_TO_BORDER 0x40000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP 0x50000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FORMAT_WRAPV (1 << 31) -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER 0x0000030c -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_X_SHIFT 0 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_X_MASK 0x000000ff -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_Y_SHIFT 8 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_Y_MASK 0x00007f00 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MIPMAP_DITHER_ENABLE (1 << 15) -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MIPMAP_LODBIAS_SHIFT 16 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MIPMAP_LODBIAS_MASK 0x00ff0000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_SHIFT 24 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_MASK 0x07000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST 0x01000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR 0x02000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x03000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x04000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x05000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x06000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_ANISOTROPIC_MINIFY_ENABLE (1 << 27) -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_SHIFT 28 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_MASK 0x70000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_NEAREST 0x10000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_MAGNIFY_LINEAR 0x20000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FILTER_ANISOTROPIC_MAGNIFY_ENABLE (1 << 31) -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND 0x00000310 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_MAP_SHIFT 0 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_MAP_MASK 0x0000000f -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_MASK_BIT_SHIFT 4 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_MASK_BIT_MASK 0x00000030 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_SHIFT 6 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_MASK 0x000000c0 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_FLAT 0x00000040 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_GOURAUD 0x00000080 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_PHONG 0x000000c0 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_SHIFT 8 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_MASK 0x00000f00 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE_SHIFT 12 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE_MASK 0x0000f000 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_FOG_ENABLE_SHIFT 16 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_FOG_ENABLE_MASK 0x000f0000 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_ALPHA_ENABLE_SHIFT 20 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_ALPHA_ENABLE_MASK 0x00f00000 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SRC_SHIFT 24 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_SRC_MASK 0x0f000000 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_DST_SHIFT 28 -#define NV04_DX5_TEXTURED_TRIANGLE_BLEND_DST_MASK 0xf0000000 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL 0x00000314 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_REF_SHIFT 0 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_REF_MASK 0x000000ff -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_FUNC_SHIFT 8 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_FUNC_MASK 0x00000f00 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ALPHA_TEST_ENABLE (1 << 12) -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_ORIGIN (1 << 13) -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_ENABLE_SHIFT 14 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_ENABLE_MASK 0x0000c000 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FUNC_SHIFT 16 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FUNC_MASK 0x000f0000 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_SHIFT 20 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_MASK 0x00300000 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_DITHER_ENABLE (1 << 22) -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_PERSPECTIVE_ENABLE (1 << 23) -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_WRITE_ENABLE_SHIFT 24 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_WRITE_ENABLE_MASK 0x3f000000 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FORMAT_SHIFT 30 -#define NV04_DX5_TEXTURED_TRIANGLE_CONTROL_Z_FORMAT_MASK 0xc0000000 -#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR 0x00000318 -#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_B_SHIFT 0 -#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_B_MASK 0x000000ff -#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_G_SHIFT 8 -#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_G_MASK 0x0000ff00 -#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_R_SHIFT 16 -#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_R_MASK 0x00ff0000 -#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_A_SHIFT 24 -#define NV04_DX5_TEXTURED_TRIANGLE_FOGCOLOR_A_MASK 0xff000000 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(x) (0x00000400+((x)*32)) -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX__SIZE 0x00000010 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SY(x) (0x00000404+((x)*32)) -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SY__SIZE 0x00000010 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SZ(x) (0x00000408+((x)*32)) -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SZ__SIZE 0x00000010 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_RHW(x) (0x0000040c+((x)*32)) -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_RHW__SIZE 0x00000010 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR(x) (0x00000410+((x)*32)) -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR__SIZE 0x00000010 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_B_SHIFT 0 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_B_MASK 0x000000ff -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_G_SHIFT 8 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_G_MASK 0x0000ff00 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_R_SHIFT 16 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_R_MASK 0x00ff0000 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_A_SHIFT 24 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_COLOR_A_MASK 0xff000000 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR(x) (0x00000414+((x)*32)) -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR__SIZE 0x00000010 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_B_SHIFT 0 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_B_MASK 0x000000ff -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_G_SHIFT 8 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_G_MASK 0x0000ff00 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_R_SHIFT 16 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_R_MASK 0x00ff0000 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_FOG_SHIFT 24 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_FOG_MASK 0xff000000 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TU(x) (0x00000418+((x)*32)) -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TU__SIZE 0x00000010 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TV(x) (0x0000041c+((x)*32)) -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_TV__SIZE 0x00000010 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE(x) (0x00000600+((x)*4)) -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE__SIZE 0x00000040 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I0_SHIFT 0 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I0_MASK 0x0000000f -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I1_SHIFT 4 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I1_MASK 0x000000f0 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I2_SHIFT 8 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I2_MASK 0x00000f00 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I3_SHIFT 12 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I3_MASK 0x0000f000 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I4_SHIFT 16 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I4_MASK 0x000f0000 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I5_SHIFT 20 -#define NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_DRAWPRIMITIVE_I5_MASK 0x00f00000 - - -#define NV04_DX6_MULTITEX_TRIANGLE 0x00000055 - -#define NV04_DX6_MULTITEX_TRIANGLE_NOP 0x00000100 -#define NV04_DX6_MULTITEX_TRIANGLE_NOTIFY 0x00000104 -#define NV04_DX6_MULTITEX_TRIANGLE_DMA_NOTIFY 0x00000180 -#define NV04_DX6_MULTITEX_TRIANGLE_DMA_A 0x00000184 -#define NV04_DX6_MULTITEX_TRIANGLE_DMA_B 0x00000188 -#define NV04_DX6_MULTITEX_TRIANGLE_SURFACE 0x0000018c -#define NV04_DX6_MULTITEX_TRIANGLE_OFFSET(x) (0x00000308+((x)*4)) -#define NV04_DX6_MULTITEX_TRIANGLE_OFFSET__SIZE 0x00000002 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT(x) (0x00000310+((x)*4)) -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT__SIZE 0x00000002 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_DMA_SHIFT 0 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_DMA_MASK 0x0000000f -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_ZOH_SHIFT 4 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_ZOH_MASK 0x00000030 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_FOH_SHIFT 6 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ORIGIN_FOH_MASK 0x000000c0 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_COLOR_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_COLOR_MASK 0x00000f00 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_MIPMAP_LEVELS_SHIFT 12 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_MIPMAP_LEVELS_MASK 0x0000f000 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_U_SHIFT 16 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_U_MASK 0x000f0000 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_V_SHIFT 20 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_V_MASK 0x00f00000 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSU_SHIFT 24 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSU_MASK 0x07000000 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_WRAPU (1 << 27) -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSV_SHIFT 28 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_ADDRESSV_MASK 0x70000000 -#define NV04_DX6_MULTITEX_TRIANGLE_FORMAT_WRAPV (1 << 31) -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER(x) (0x00000318+((x)*4)) -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER__SIZE 0x00000002 -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_X_SHIFT 0 -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_X_MASK 0x000000ff -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_Y_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_Y_MASK 0x00007f00 -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MIPMAP_DITHER_ENABLE (1 << 15) -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MIPMAP_LODBIAS_SHIFT 16 -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MIPMAP_LODBIAS_MASK 0x00ff0000 -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MINIFY_SHIFT 24 -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MINIFY_MASK 0x07000000 -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_ANISOTROPIC_MINIFY_ENABLE (1 << 27) -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MAGNIFY_SHIFT 28 -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_MAGNIFY_MASK 0x70000000 -#define NV04_DX6_MULTITEX_TRIANGLE_FILTER_ANISOTROPIC_MAGNIFY_ENABLE (1 << 31) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA 0x00000320 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE0 (1 << 0) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA0 (1 << 1) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT0_SHIFT 2 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT0_MASK 0x000000fc -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE1 (1 << 8) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA1 (1 << 9) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT1_SHIFT 10 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT1_MASK 0x0000fc00 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE2 (1 << 16) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA2 (1 << 17) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT2_SHIFT 18 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT2_MASK 0x00fc0000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_INVERSE3 (1 << 24) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ALPHA3 (1 << 25) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT3_SHIFT 26 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_ARGUMENT3_MASK 0x1c000000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_OPERATION_SHIFT 29 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA_OPERATION_MASK 0xe0000000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR 0x00000324 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE0 (1 << 0) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA0 (1 << 1) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT0_SHIFT 2 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT0_MASK 0x000000fc -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE1 (1 << 8) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA1 (1 << 9) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT1_SHIFT 10 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT1_MASK 0x0000fc00 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE2 (1 << 16) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA2 (1 << 17) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT2_SHIFT 18 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT2_MASK 0x00fc0000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_INVERSE3 (1 << 24) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ALPHA3 (1 << 25) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT3_SHIFT 26 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_ARGUMENT3_MASK 0x1c000000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_OPERATION_SHIFT 29 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR_OPERATION_MASK 0xe0000000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA 0x0000032c -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE0 (1 << 0) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA0 (1 << 1) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT0_SHIFT 2 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT0_MASK 0x000000fc -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE1 (1 << 8) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA1 (1 << 9) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT1_SHIFT 10 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT1_MASK 0x0000fc00 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE2 (1 << 16) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA2 (1 << 17) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT2_SHIFT 18 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT2_MASK 0x00fc0000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_INVERSE3 (1 << 24) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ALPHA3 (1 << 25) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT3_SHIFT 26 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_ARGUMENT3_MASK 0x1c000000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_OPERATION_SHIFT 29 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA_OPERATION_MASK 0xe0000000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR 0x00000330 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE0 (1 << 0) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA0 (1 << 1) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT0_SHIFT 2 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT0_MASK 0x000000fc -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE1 (1 << 8) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA1 (1 << 9) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT1_SHIFT 10 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT1_MASK 0x0000fc00 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE2 (1 << 16) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA2 (1 << 17) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT2_SHIFT 18 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT2_MASK 0x00fc0000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_INVERSE3 (1 << 24) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ALPHA3 (1 << 25) -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT3_SHIFT 26 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_ARGUMENT3_MASK 0x1c000000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_OPERATION_SHIFT 29 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR_OPERATION_MASK 0xe0000000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR 0x00000334 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_B_SHIFT 0 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_B_MASK 0x000000ff -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_G_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_G_MASK 0x0000ff00 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_R_SHIFT 16 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_R_MASK 0x00ff0000 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_A_SHIFT 24 -#define NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR_A_MASK 0xff000000 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND 0x00000338 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_MASK_BIT_SHIFT 4 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_MASK_BIT_MASK 0x00000030 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_SHIFT 6 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_MASK 0x000000c0 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE_MASK 0x00000f00 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE_SHIFT 12 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE_MASK 0x0000f000 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_FOG_ENABLE_SHIFT 16 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_FOG_ENABLE_MASK 0x000f0000 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_ALPHA_ENABLE_SHIFT 20 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_ALPHA_ENABLE_MASK 0x00f00000 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SRC_SHIFT 24 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_SRC_MASK 0x0f000000 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_DST_SHIFT 28 -#define NV04_DX6_MULTITEX_TRIANGLE_BLEND_DST_MASK 0xf0000000 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0 0x0000033c -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_REF_SHIFT 0 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_REF_MASK 0x000000ff -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_FUNC_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_FUNC_MASK 0x00000f00 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_TEST_ENABLE (1 << 12) -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ORIGIN (1 << 13) -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_ENABLE_SHIFT 14 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_ENABLE_MASK 0x0000c000 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FUNC_SHIFT 16 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FUNC_MASK 0x000f0000 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_SHIFT 20 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_MASK 0x00300000 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_DITHER_ENABLE (1 << 22) -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_PERSPECTIVE_ENABLE (1 << 23) -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_WRITE_ENABLE (1 << 24) -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_STENCIL_WRITE_ENABLE (1 << 25) -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_ALPHA_WRITE_ENABLE (1 << 26) -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_RED_WRITE_ENABLE (1 << 27) -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_GREEN_WRITE_ENABLE (1 << 28) -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_BLUE_WRITE_ENABLE (1 << 29) -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FORMAT_SHIFT 30 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL0_Z_FORMAT_MASK 0xc0000000 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1 0x00000340 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_TEST_ENABLE_SHIFT 0 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_TEST_ENABLE_MASK 0x0000000f -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_FUNC_SHIFT 4 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_FUNC_MASK 0x000000f0 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_REF_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_REF_MASK 0x0000ff00 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_READ_SHIFT 16 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_READ_MASK 0x00ff0000 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_WRITE_SHIFT 24 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_WRITE_MASK 0xff000000 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2 0x00000344 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_FAIL_SHIFT 0 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_FAIL_MASK 0x0000000f -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZFAIL_SHIFT 4 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZFAIL_MASK 0x000000f0 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZPASS_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZPASS_MASK 0x00000f00 -#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR 0x00000348 -#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_B_SHIFT 0 -#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_B_MASK 0x000000ff -#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_G_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_G_MASK 0x0000ff00 -#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_R_SHIFT 16 -#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_R_MASK 0x00ff0000 -#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_A_SHIFT 24 -#define NV04_DX6_MULTITEX_TRIANGLE_FOGCOLOR_A_MASK 0xff000000 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SX(x) (0x00000400+((x)*40)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SX__SIZE 0x00000008 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SY(x) (0x00000404+((x)*40)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SY__SIZE 0x00000008 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SZ(x) (0x00000408+((x)*40)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SZ__SIZE 0x00000008 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_RHW(x) (0x0000040c+((x)*40)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_RHW__SIZE 0x00000008 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR(x) (0x00000410+((x)*40)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR__SIZE 0x00000008 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_B_SHIFT 0 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_B_MASK 0x000000ff -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_G_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_G_MASK 0x0000ff00 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_R_SHIFT 16 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_R_MASK 0x00ff0000 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_A_SHIFT 24 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_A_MASK 0xff000000 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR(x) (0x00000414+((x)*40)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR__SIZE 0x00000008 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_B_SHIFT 0 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_B_MASK 0x000000ff -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_G_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_G_MASK 0x0000ff00 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_R_SHIFT 16 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_R_MASK 0x00ff0000 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_FOG_SHIFT 24 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_FOG_MASK 0xff000000 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU0(x) (0x00000418+((x)*40)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU0__SIZE 0x00000008 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV0(x) (0x0000041c+((x)*40)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV0__SIZE 0x00000008 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU1(x) (0x00000420+((x)*40)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TU1__SIZE 0x00000008 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV1(x) (0x00000424+((x)*40)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_TV1__SIZE 0x00000008 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE(x) (0x00000540+((x)*4)) -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE__SIZE 0x00000030 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I0_SHIFT 0 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I0_MASK 0x0000000f -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I1_SHIFT 4 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I1_MASK 0x000000f0 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I2_SHIFT 8 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I2_MASK 0x00000f00 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I3_SHIFT 12 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I3_MASK 0x0000f000 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I4_SHIFT 16 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I4_MASK 0x000f0000 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I5_SHIFT 20 -#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I5_MASK 0x00f00000 - - -#define NV10_DX5_TEXTURED_TRIANGLE 0x00000094 - - - -#define NV10TCL 0x00000056 - -#define NV10TCL_NOP 0x00000100 -#define NV10TCL_NOTIFY 0x00000104 -#define NV10TCL_DMA_NOTIFY 0x00000180 -#define NV10TCL_DMA_IN_MEMORY0 0x00000184 -#define NV10TCL_DMA_IN_MEMORY1 0x00000188 -#define NV10TCL_DMA_VTXBUF0 0x0000018c -#define NV10TCL_DMA_IN_MEMORY2 0x00000194 -#define NV10TCL_DMA_IN_MEMORY3 0x00000198 -#define NV10TCL_RT_HORIZ 0x00000200 -#define NV10TCL_RT_HORIZ_X_SHIFT 0 -#define NV10TCL_RT_HORIZ_X_MASK 0x0000ffff -#define NV10TCL_RT_HORIZ_W_SHIFT 16 -#define NV10TCL_RT_HORIZ_W_MASK 0xffff0000 -#define NV10TCL_RT_VERT 0x00000204 -#define NV10TCL_RT_VERT_Y_SHIFT 0 -#define NV10TCL_RT_VERT_Y_MASK 0x0000ffff -#define NV10TCL_RT_VERT_H_SHIFT 16 -#define NV10TCL_RT_VERT_H_MASK 0xffff0000 -#define NV10TCL_RT_FORMAT 0x00000208 -#define NV10TCL_RT_FORMAT_TYPE_SHIFT 8 -#define NV10TCL_RT_FORMAT_TYPE_MASK 0x00000f00 -#define NV10TCL_RT_FORMAT_TYPE_LINEAR 0x00000100 -#define NV10TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200 -#define NV10TCL_RT_FORMAT_COLOR_SHIFT 0 -#define NV10TCL_RT_FORMAT_COLOR_MASK 0x0000001f -#define NV10TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003 -#define NV10TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005 -#define NV10TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008 -#define NV10TCL_RT_FORMAT_COLOR_B8 0x00000009 -#define NV10TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d -#define NV10TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f -#define NV10TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010 -#define NV10TCL_RT_PITCH 0x0000020c -#define NV10TCL_RT_PITCH_COLOR_PITCH_SHIFT 0 -#define NV10TCL_RT_PITCH_COLOR_PITCH_MASK 0x0000ffff -#define NV10TCL_RT_PITCH_ZETA_PITCH_SHIFT 16 -#define NV10TCL_RT_PITCH_ZETA_PITCH_MASK 0xffff0000 -#define NV10TCL_COLOR_OFFSET 0x00000210 -#define NV10TCL_ZETA_OFFSET 0x00000214 -#define NV10TCL_TX_OFFSET(x) (0x00000218+((x)*4)) -#define NV10TCL_TX_OFFSET__SIZE 0x00000002 -#define NV10TCL_TX_FORMAT(x) (0x00000220+((x)*4)) -#define NV10TCL_TX_FORMAT__SIZE 0x00000002 -#define NV10TCL_TX_FORMAT_DMA0 (1 << 0) -#define NV10TCL_TX_FORMAT_DMA1 (1 << 1) -#define NV10TCL_TX_FORMAT_CUBE_MAP (1 << 2) -#define NV10TCL_TX_FORMAT_FORMAT_SHIFT 7 -#define NV10TCL_TX_FORMAT_FORMAT_MASK 0x00000780 -#define NV10TCL_TX_FORMAT_FORMAT_L8 0x00000000 -#define NV10TCL_TX_FORMAT_FORMAT_A8 0x00000080 -#define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000100 -#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000180 -#define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000200 -#define NV10TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000280 -#define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000300 -#define NV10TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000380 -#define NV10TCL_TX_FORMAT_FORMAT_INDEX8 0x00000580 -#define NV10TCL_TX_FORMAT_FORMAT_DXT1 0x00000600 -#define NV10TCL_TX_FORMAT_FORMAT_DXT3 0x00000700 -#define NV10TCL_TX_FORMAT_FORMAT_DXT5 0x00000780 -#define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00000800 -#define NV10TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00000880 -#define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00000900 -#define NV10TCL_TX_FORMAT_FORMAT_L8_RECT 0x00000980 -#define NV10TCL_TX_FORMAT_FORMAT_A8L8 0x00000d00 -#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT2 0x00000d80 -#define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00000e80 -#define NV10TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00000f00 -#define NV10TCL_TX_FORMAT_FORMAT_L8A8_RECT 0x00001000 -#define NV10TCL_TX_FORMAT_FORMAT_DSDT 0x00001400 -#define NV10TCL_TX_FORMAT_FORMAT_A16 0x00001900 -#define NV10TCL_TX_FORMAT_FORMAT_HILO16 0x00001980 -#define NV10TCL_TX_FORMAT_FORMAT_A16_RECT 0x00001a80 -#define NV10TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00001b00 -#define NV10TCL_TX_FORMAT_FORMAT_HILO8 0x00002200 -#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00002280 -#define NV10TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00002300 -#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00002380 -#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00002500 -#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00002580 -#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00002600 -#define NV10TCL_TX_FORMAT_NPOT (1 << 11) -#define NV10TCL_TX_FORMAT_MIPMAP (1 << 15) -#define NV10TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 16 -#define NV10TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x000f0000 -#define NV10TCL_TX_FORMAT_BASE_SIZE_V_SHIFT 20 -#define NV10TCL_TX_FORMAT_BASE_SIZE_V_MASK 0x00f00000 -#define NV10TCL_TX_FORMAT_WRAP_S_SHIFT 24 -#define NV10TCL_TX_FORMAT_WRAP_S_MASK 0x0f000000 -#define NV10TCL_TX_FORMAT_WRAP_S_REPEAT 0x01000000 -#define NV10TCL_TX_FORMAT_WRAP_S_MIRRORED_REPEAT 0x02000000 -#define NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_EDGE 0x03000000 -#define NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_BORDER 0x04000000 -#define NV10TCL_TX_FORMAT_WRAP_S_CLAMP 0x05000000 -#define NV10TCL_TX_FORMAT_WRAP_T_SHIFT 28 -#define NV10TCL_TX_FORMAT_WRAP_T_MASK 0xf0000000 -#define NV10TCL_TX_FORMAT_WRAP_T_REPEAT 0x10000000 -#define NV10TCL_TX_FORMAT_WRAP_T_MIRRORED_REPEAT 0x20000000 -#define NV10TCL_TX_FORMAT_WRAP_T_CLAMP_TO_EDGE 0x30000000 -#define NV10TCL_TX_FORMAT_WRAP_T_CLAMP_TO_BORDER 0x40000000 -#define NV10TCL_TX_FORMAT_WRAP_T_CLAMP 0x50000000 -#define NV10TCL_TX_ENABLE(x) (0x00000228+((x)*4)) -#define NV10TCL_TX_ENABLE__SIZE 0x00000002 -#define NV10TCL_TX_ENABLE_ANISOTROPY_SHIFT 4 -#define NV10TCL_TX_ENABLE_ANISOTROPY_MASK 0x00000030 -#define NV10TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT 14 -#define NV10TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK 0x0003c000 -#define NV10TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT 26 -#define NV10TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK 0x3c000000 -#define NV10TCL_TX_ENABLE_ENABLE (1 << 30) -#define NV10TCL_TX_NPOT_PITCH(x) (0x00000230+((x)*4)) -#define NV10TCL_TX_NPOT_PITCH__SIZE 0x00000002 -#define NV10TCL_TX_NPOT_PITCH_PITCH_SHIFT 16 -#define NV10TCL_TX_NPOT_PITCH_PITCH_MASK 0xffff0000 -#define NV10TCL_TX_NPOT_SIZE(x) (0x00000240+((x)*4)) -#define NV10TCL_TX_NPOT_SIZE__SIZE 0x00000002 -#define NV10TCL_TX_NPOT_SIZE_H_SHIFT 0 -#define NV10TCL_TX_NPOT_SIZE_H_MASK 0x0000ffff -#define NV10TCL_TX_NPOT_SIZE_W_SHIFT 16 -#define NV10TCL_TX_NPOT_SIZE_W_MASK 0xffff0000 -#define NV10TCL_TX_FILTER(x) (0x00000248+((x)*4)) -#define NV10TCL_TX_FILTER__SIZE 0x00000002 -#define NV10TCL_TX_FILTER_LOD_BIAS_SHIFT 8 -#define NV10TCL_TX_FILTER_LOD_BIAS_MASK 0x00000f00 -#define NV10TCL_TX_FILTER_MINIFY_SHIFT 24 -#define NV10TCL_TX_FILTER_MINIFY_MASK 0x0f000000 -#define NV10TCL_TX_FILTER_MINIFY_NEAREST 0x01000000 -#define NV10TCL_TX_FILTER_MINIFY_LINEAR 0x02000000 -#define NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x03000000 -#define NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x04000000 -#define NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x05000000 -#define NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x06000000 -#define NV10TCL_TX_FILTER_MAGNIFY_SHIFT 28 -#define NV10TCL_TX_FILTER_MAGNIFY_MASK 0xf0000000 -#define NV10TCL_TX_FILTER_MAGNIFY_NEAREST 0x10000000 -#define NV10TCL_TX_FILTER_MAGNIFY_LINEAR 0x20000000 -#define NV10TCL_TX_PALETTE_OFFSET(x) (0x00000250+((x)*4)) -#define NV10TCL_TX_PALETTE_OFFSET__SIZE 0x00000002 -#define NV10TCL_RC_IN_ALPHA(x) (0x00000260+((x)*4)) -#define NV10TCL_RC_IN_ALPHA__SIZE 0x00000002 -#define NV10TCL_RC_IN_ALPHA_D_INPUT_SHIFT 0 -#define NV10TCL_RC_IN_ALPHA_D_INPUT_MASK 0x0000000f -#define NV10TCL_RC_IN_ALPHA_D_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV10TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV10TCL_RC_IN_ALPHA_D_INPUT_FOG 0x00000003 -#define NV10TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV10TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV10TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0_ARB 0x00000008 -#define NV10TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1_ARB 0x00000009 -#define NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE0_NV 0x0000000c -#define NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE1_NV 0x0000000d -#define NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV10TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F_NV 0x0000000f -#define NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE (1 << 4) -#define NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE 0x00000000 -#define NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA 0x00000010 -#define NV10TCL_RC_IN_ALPHA_D_MAPPING_SHIFT 5 -#define NV10TCL_RC_IN_ALPHA_D_MAPPING_MASK 0x000000e0 -#define NV10TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020 -#define NV10TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL_NV 0x00000040 -#define NV10TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE_NV 0x00000060 -#define NV10TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080 -#define NV10TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0 -#define NV10TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0 -#define NV10TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_SHIFT 8 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_MASK 0x00000f00 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_FOG 0x00000300 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0_ARB 0x00000800 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1_ARB 0x00000900 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE0_NV 0x00000c00 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE1_NV 0x00000d00 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV10TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE (1 << 12) -#define NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE 0x00000000 -#define NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV10TCL_RC_IN_ALPHA_C_MAPPING_SHIFT 13 -#define NV10TCL_RC_IN_ALPHA_C_MAPPING_MASK 0x0000e000 -#define NV10TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV10TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV10TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV10TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV10TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV10TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV10TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_SHIFT 16 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_MASK 0x000f0000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_FOG 0x00030000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0_ARB 0x00080000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1_ARB 0x00090000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE0_NV 0x000c0000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE1_NV 0x000d0000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV10TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE (1 << 20) -#define NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE 0x00000000 -#define NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV10TCL_RC_IN_ALPHA_B_MAPPING_SHIFT 21 -#define NV10TCL_RC_IN_ALPHA_B_MAPPING_MASK 0x00e00000 -#define NV10TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV10TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV10TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV10TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV10TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV10TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV10TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_SHIFT 24 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_MASK 0x0f000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_FOG 0x03000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0_ARB 0x08000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1_ARB 0x09000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE0_NV 0x0c000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE1_NV 0x0d000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV10TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE (1 << 28) -#define NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE 0x00000000 -#define NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV10TCL_RC_IN_ALPHA_A_MAPPING_SHIFT 29 -#define NV10TCL_RC_IN_ALPHA_A_MAPPING_MASK 0xe0000000 -#define NV10TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV10TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV10TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV10TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV10TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV10TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV10TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV10TCL_RC_IN_RGB(x) (0x00000268+((x)*4)) -#define NV10TCL_RC_IN_RGB__SIZE 0x00000002 -#define NV10TCL_RC_IN_RGB_D_INPUT_SHIFT 0 -#define NV10TCL_RC_IN_RGB_D_INPUT_MASK 0x0000000f -#define NV10TCL_RC_IN_RGB_D_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV10TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV10TCL_RC_IN_RGB_D_INPUT_FOG 0x00000003 -#define NV10TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV10TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV10TCL_RC_IN_RGB_D_INPUT_TEXTURE0_ARB 0x00000008 -#define NV10TCL_RC_IN_RGB_D_INPUT_TEXTURE1_ARB 0x00000009 -#define NV10TCL_RC_IN_RGB_D_INPUT_SPARE0_NV 0x0000000c -#define NV10TCL_RC_IN_RGB_D_INPUT_SPARE1_NV 0x0000000d -#define NV10TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV10TCL_RC_IN_RGB_D_INPUT_E_TIMES_F_NV 0x0000000f -#define NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE (1 << 4) -#define NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA 0x00000010 -#define NV10TCL_RC_IN_RGB_D_MAPPING_SHIFT 5 -#define NV10TCL_RC_IN_RGB_D_MAPPING_MASK 0x000000e0 -#define NV10TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020 -#define NV10TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL_NV 0x00000040 -#define NV10TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE_NV 0x00000060 -#define NV10TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080 -#define NV10TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0 -#define NV10TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0 -#define NV10TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0 -#define NV10TCL_RC_IN_RGB_C_INPUT_SHIFT 8 -#define NV10TCL_RC_IN_RGB_C_INPUT_MASK 0x00000f00 -#define NV10TCL_RC_IN_RGB_C_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV10TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV10TCL_RC_IN_RGB_C_INPUT_FOG 0x00000300 -#define NV10TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV10TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV10TCL_RC_IN_RGB_C_INPUT_TEXTURE0_ARB 0x00000800 -#define NV10TCL_RC_IN_RGB_C_INPUT_TEXTURE1_ARB 0x00000900 -#define NV10TCL_RC_IN_RGB_C_INPUT_SPARE0_NV 0x00000c00 -#define NV10TCL_RC_IN_RGB_C_INPUT_SPARE1_NV 0x00000d00 -#define NV10TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV10TCL_RC_IN_RGB_C_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE (1 << 12) -#define NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV10TCL_RC_IN_RGB_C_MAPPING_SHIFT 13 -#define NV10TCL_RC_IN_RGB_C_MAPPING_MASK 0x0000e000 -#define NV10TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV10TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV10TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV10TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV10TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV10TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV10TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV10TCL_RC_IN_RGB_B_INPUT_SHIFT 16 -#define NV10TCL_RC_IN_RGB_B_INPUT_MASK 0x000f0000 -#define NV10TCL_RC_IN_RGB_B_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV10TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV10TCL_RC_IN_RGB_B_INPUT_FOG 0x00030000 -#define NV10TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV10TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV10TCL_RC_IN_RGB_B_INPUT_TEXTURE0_ARB 0x00080000 -#define NV10TCL_RC_IN_RGB_B_INPUT_TEXTURE1_ARB 0x00090000 -#define NV10TCL_RC_IN_RGB_B_INPUT_SPARE0_NV 0x000c0000 -#define NV10TCL_RC_IN_RGB_B_INPUT_SPARE1_NV 0x000d0000 -#define NV10TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV10TCL_RC_IN_RGB_B_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE (1 << 20) -#define NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV10TCL_RC_IN_RGB_B_MAPPING_SHIFT 21 -#define NV10TCL_RC_IN_RGB_B_MAPPING_MASK 0x00e00000 -#define NV10TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV10TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV10TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV10TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV10TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV10TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV10TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV10TCL_RC_IN_RGB_A_INPUT_SHIFT 24 -#define NV10TCL_RC_IN_RGB_A_INPUT_MASK 0x0f000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_FOG 0x03000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_TEXTURE0_ARB 0x08000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_TEXTURE1_ARB 0x09000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_SPARE0_NV 0x0c000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_SPARE1_NV 0x0d000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV10TCL_RC_IN_RGB_A_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE (1 << 28) -#define NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV10TCL_RC_IN_RGB_A_MAPPING_SHIFT 29 -#define NV10TCL_RC_IN_RGB_A_MAPPING_MASK 0xe0000000 -#define NV10TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV10TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV10TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV10TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV10TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV10TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV10TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV10TCL_RC_COLOR(x) (0x00000270+((x)*4)) -#define NV10TCL_RC_COLOR__SIZE 0x00000002 -#define NV10TCL_RC_COLOR_B_SHIFT 0 -#define NV10TCL_RC_COLOR_B_MASK 0x000000ff -#define NV10TCL_RC_COLOR_G_SHIFT 8 -#define NV10TCL_RC_COLOR_G_MASK 0x0000ff00 -#define NV10TCL_RC_COLOR_R_SHIFT 16 -#define NV10TCL_RC_COLOR_R_MASK 0x00ff0000 -#define NV10TCL_RC_COLOR_A_SHIFT 24 -#define NV10TCL_RC_COLOR_A_MASK 0xff000000 -#define NV10TCL_RC_OUT_ALPHA(x) (0x00000278+((x)*4)) -#define NV10TCL_RC_OUT_ALPHA__SIZE 0x00000002 -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT 0 -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK 0x0000000f -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO 0x00000000 -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG 0x00000003 -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0_ARB 0x00000008 -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1_ARB 0x00000009 -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_NV 0x0000000c -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1_NV 0x0000000d -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F_NV 0x0000000f -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT 4 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK 0x000000f0 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO 0x00000000 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG 0x00000030 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0_ARB 0x00000080 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1_ARB 0x00000090 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_NV 0x000000c0 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1_NV 0x000000d0 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0 -#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F_NV 0x000000f0 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT 8 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK 0x00000f00 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO 0x00000000 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG 0x00000300 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0_ARB 0x00000800 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1_ARB 0x00000900 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_NV 0x00000c00 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1_NV 0x00000d00 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00 -#define NV10TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT (1 << 12) -#define NV10TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT (1 << 13) -#define NV10TCL_RC_OUT_ALPHA_MUX_SUM (1 << 14) -#define NV10TCL_RC_OUT_ALPHA_BIAS (1 << 15) -#define NV10TCL_RC_OUT_ALPHA_BIAS_NONE 0x00000000 -#define NV10TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000 -#define NV10TCL_RC_OUT_ALPHA_SCALE_SHIFT 17 -#define NV10TCL_RC_OUT_ALPHA_SCALE_MASK 0x00000000 -#define NV10TCL_RC_OUT_ALPHA_SCALE_NONE 0x00000000 -#define NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO_NV 0x00020000 -#define NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR_NV 0x00040000 -#define NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000 -#define NV10TCL_RC_OUT_RGB(x) (0x00000280+((x)*4)) -#define NV10TCL_RC_OUT_RGB__SIZE 0x00000002 -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT 0 -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_MASK 0x0000000f -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_ZERO 0x00000000 -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_FOG 0x00000003 -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0_ARB 0x00000008 -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1_ARB 0x00000009 -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_NV 0x0000000c -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1_NV 0x0000000d -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F_NV 0x0000000f -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT 4 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_MASK 0x000000f0 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_ZERO 0x00000000 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_FOG 0x00000030 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0_ARB 0x00000080 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1_ARB 0x00000090 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_NV 0x000000c0 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1_NV 0x000000d0 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0 -#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F_NV 0x000000f0 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT 8 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_MASK 0x00000f00 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO 0x00000000 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_FOG 0x00000300 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0_ARB 0x00000800 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1_ARB 0x00000900 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_NV 0x00000c00 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1_NV 0x00000d00 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00 -#define NV10TCL_RC_OUT_RGB_CD_DOT_PRODUCT (1 << 12) -#define NV10TCL_RC_OUT_RGB_AB_DOT_PRODUCT (1 << 13) -#define NV10TCL_RC_OUT_RGB_MUX_SUM (1 << 14) -#define NV10TCL_RC_OUT_RGB_BIAS (1 << 15) -#define NV10TCL_RC_OUT_RGB_BIAS_NONE 0x00000000 -#define NV10TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000 -#define NV10TCL_RC_OUT_RGB_SCALE_SHIFT 17 -#define NV10TCL_RC_OUT_RGB_SCALE_MASK 0x00000000 -#define NV10TCL_RC_OUT_RGB_SCALE_NONE 0x00000000 -#define NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO_NV 0x00020000 -#define NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR_NV 0x00040000 -#define NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000 -#define NV10TCL_RC_OUT_RGB_OPERATION_SHIFT 27 -#define NV10TCL_RC_OUT_RGB_OPERATION_MASK 0x38000000 -#define NV10TCL_RC_FINAL0 0x00000288 -#define NV10TCL_RC_FINAL0_D_INPUT_SHIFT 0 -#define NV10TCL_RC_FINAL0_D_INPUT_MASK 0x0000000f -#define NV10TCL_RC_FINAL0_D_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV10TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV10TCL_RC_FINAL0_D_INPUT_FOG 0x00000003 -#define NV10TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV10TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV10TCL_RC_FINAL0_D_INPUT_TEXTURE0_ARB 0x00000008 -#define NV10TCL_RC_FINAL0_D_INPUT_TEXTURE1_ARB 0x00000009 -#define NV10TCL_RC_FINAL0_D_INPUT_SPARE0_NV 0x0000000c -#define NV10TCL_RC_FINAL0_D_INPUT_SPARE1_NV 0x0000000d -#define NV10TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV10TCL_RC_FINAL0_D_INPUT_E_TIMES_F_NV 0x0000000f -#define NV10TCL_RC_FINAL0_D_COMPONENT_USAGE (1 << 4) -#define NV10TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA 0x00000010 -#define NV10TCL_RC_FINAL0_D_MAPPING_SHIFT 5 -#define NV10TCL_RC_FINAL0_D_MAPPING_MASK 0x000000e0 -#define NV10TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020 -#define NV10TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL_NV 0x00000040 -#define NV10TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE_NV 0x00000060 -#define NV10TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080 -#define NV10TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0 -#define NV10TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0 -#define NV10TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0 -#define NV10TCL_RC_FINAL0_C_INPUT_SHIFT 8 -#define NV10TCL_RC_FINAL0_C_INPUT_MASK 0x00000f00 -#define NV10TCL_RC_FINAL0_C_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV10TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV10TCL_RC_FINAL0_C_INPUT_FOG 0x00000300 -#define NV10TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV10TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV10TCL_RC_FINAL0_C_INPUT_TEXTURE0_ARB 0x00000800 -#define NV10TCL_RC_FINAL0_C_INPUT_TEXTURE1_ARB 0x00000900 -#define NV10TCL_RC_FINAL0_C_INPUT_SPARE0_NV 0x00000c00 -#define NV10TCL_RC_FINAL0_C_INPUT_SPARE1_NV 0x00000d00 -#define NV10TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV10TCL_RC_FINAL0_C_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV10TCL_RC_FINAL0_C_COMPONENT_USAGE (1 << 12) -#define NV10TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV10TCL_RC_FINAL0_C_MAPPING_SHIFT 13 -#define NV10TCL_RC_FINAL0_C_MAPPING_MASK 0x0000e000 -#define NV10TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV10TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV10TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV10TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV10TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV10TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV10TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV10TCL_RC_FINAL0_B_INPUT_SHIFT 16 -#define NV10TCL_RC_FINAL0_B_INPUT_MASK 0x000f0000 -#define NV10TCL_RC_FINAL0_B_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV10TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV10TCL_RC_FINAL0_B_INPUT_FOG 0x00030000 -#define NV10TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV10TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV10TCL_RC_FINAL0_B_INPUT_TEXTURE0_ARB 0x00080000 -#define NV10TCL_RC_FINAL0_B_INPUT_TEXTURE1_ARB 0x00090000 -#define NV10TCL_RC_FINAL0_B_INPUT_SPARE0_NV 0x000c0000 -#define NV10TCL_RC_FINAL0_B_INPUT_SPARE1_NV 0x000d0000 -#define NV10TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV10TCL_RC_FINAL0_B_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV10TCL_RC_FINAL0_B_COMPONENT_USAGE (1 << 20) -#define NV10TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV10TCL_RC_FINAL0_B_MAPPING_SHIFT 21 -#define NV10TCL_RC_FINAL0_B_MAPPING_MASK 0x00e00000 -#define NV10TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV10TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV10TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV10TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV10TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV10TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV10TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV10TCL_RC_FINAL0_A_INPUT_SHIFT 24 -#define NV10TCL_RC_FINAL0_A_INPUT_MASK 0x0f000000 -#define NV10TCL_RC_FINAL0_A_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV10TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV10TCL_RC_FINAL0_A_INPUT_FOG 0x03000000 -#define NV10TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV10TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV10TCL_RC_FINAL0_A_INPUT_TEXTURE0_ARB 0x08000000 -#define NV10TCL_RC_FINAL0_A_INPUT_TEXTURE1_ARB 0x09000000 -#define NV10TCL_RC_FINAL0_A_INPUT_SPARE0_NV 0x0c000000 -#define NV10TCL_RC_FINAL0_A_INPUT_SPARE1_NV 0x0d000000 -#define NV10TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV10TCL_RC_FINAL0_A_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV10TCL_RC_FINAL0_A_COMPONENT_USAGE (1 << 28) -#define NV10TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV10TCL_RC_FINAL0_A_MAPPING_SHIFT 29 -#define NV10TCL_RC_FINAL0_A_MAPPING_MASK 0xe0000000 -#define NV10TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV10TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV10TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV10TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV10TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV10TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV10TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV10TCL_RC_FINAL1 0x0000028c -#define NV10TCL_RC_FINAL1_COLOR_SUM_CLAMP (1 << 7) -#define NV10TCL_RC_FINAL1_G_INPUT_SHIFT 8 -#define NV10TCL_RC_FINAL1_G_INPUT_MASK 0x00000f00 -#define NV10TCL_RC_FINAL1_G_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV10TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV10TCL_RC_FINAL1_G_INPUT_FOG 0x00000300 -#define NV10TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV10TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV10TCL_RC_FINAL1_G_INPUT_TEXTURE0_ARB 0x00000800 -#define NV10TCL_RC_FINAL1_G_INPUT_TEXTURE1_ARB 0x00000900 -#define NV10TCL_RC_FINAL1_G_INPUT_SPARE0_NV 0x00000c00 -#define NV10TCL_RC_FINAL1_G_INPUT_SPARE1_NV 0x00000d00 -#define NV10TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV10TCL_RC_FINAL1_G_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV10TCL_RC_FINAL1_G_COMPONENT_USAGE (1 << 12) -#define NV10TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV10TCL_RC_FINAL1_G_MAPPING_SHIFT 13 -#define NV10TCL_RC_FINAL1_G_MAPPING_MASK 0x0000e000 -#define NV10TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV10TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV10TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV10TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV10TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV10TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV10TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV10TCL_RC_FINAL1_F_INPUT_SHIFT 16 -#define NV10TCL_RC_FINAL1_F_INPUT_MASK 0x000f0000 -#define NV10TCL_RC_FINAL1_F_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV10TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV10TCL_RC_FINAL1_F_INPUT_FOG 0x00030000 -#define NV10TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV10TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV10TCL_RC_FINAL1_F_INPUT_TEXTURE0_ARB 0x00080000 -#define NV10TCL_RC_FINAL1_F_INPUT_TEXTURE1_ARB 0x00090000 -#define NV10TCL_RC_FINAL1_F_INPUT_SPARE0_NV 0x000c0000 -#define NV10TCL_RC_FINAL1_F_INPUT_SPARE1_NV 0x000d0000 -#define NV10TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV10TCL_RC_FINAL1_F_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV10TCL_RC_FINAL1_F_COMPONENT_USAGE (1 << 20) -#define NV10TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV10TCL_RC_FINAL1_F_MAPPING_SHIFT 21 -#define NV10TCL_RC_FINAL1_F_MAPPING_MASK 0x00e00000 -#define NV10TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV10TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV10TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV10TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV10TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV10TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV10TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV10TCL_RC_FINAL1_E_INPUT_SHIFT 24 -#define NV10TCL_RC_FINAL1_E_INPUT_MASK 0x0f000000 -#define NV10TCL_RC_FINAL1_E_INPUT_ZERO 0x00000000 -#define NV10TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV10TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV10TCL_RC_FINAL1_E_INPUT_FOG 0x03000000 -#define NV10TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV10TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV10TCL_RC_FINAL1_E_INPUT_TEXTURE0_ARB 0x08000000 -#define NV10TCL_RC_FINAL1_E_INPUT_TEXTURE1_ARB 0x09000000 -#define NV10TCL_RC_FINAL1_E_INPUT_SPARE0_NV 0x0c000000 -#define NV10TCL_RC_FINAL1_E_INPUT_SPARE1_NV 0x0d000000 -#define NV10TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV10TCL_RC_FINAL1_E_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV10TCL_RC_FINAL1_E_COMPONENT_USAGE (1 << 28) -#define NV10TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB 0x00000000 -#define NV10TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV10TCL_RC_FINAL1_E_MAPPING_SHIFT 29 -#define NV10TCL_RC_FINAL1_E_MAPPING_MASK 0xe0000000 -#define NV10TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV10TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV10TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV10TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV10TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV10TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV10TCL_LIGHT_MODEL 0x00000294 -#define NV10TCL_LIGHT_MODEL_COLOR_CONTROL (1 << 1) -#define NV10TCL_LIGHT_MODEL_LOCAL_VIEWER (1 << 16) -#define NV10TCL_COLOR_MATERIAL_ENABLE 0x00000298 -#define NV10TCL_COLOR_MATERIAL_ENABLE_SPECULAR (1 << 0) -#define NV10TCL_COLOR_MATERIAL_ENABLE_DIFFUSE (1 << 1) -#define NV10TCL_COLOR_MATERIAL_ENABLE_AMBIENT (1 << 2) -#define NV10TCL_COLOR_MATERIAL_ENABLE_EMISSION (1 << 3) -#define NV10TCL_FOG_MODE 0x0000029c -#define NV10TCL_FOG_MODE_EXP 0x00000800 -#define NV10TCL_FOG_MODE_EXP_2 0x00000802 -#define NV10TCL_FOG_MODE_EXP2 0x00000803 -#define NV10TCL_FOG_MODE_LINEAR 0x00000804 -#define NV10TCL_FOG_MODE_LINEAR_2 0x00002601 -#define NV10TCL_FOG_COORD_DIST 0x000002a0 -#define NV10TCL_FOG_COORD_DIST_COORD_FALSE 0x00000000 -#define NV10TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_RADIAL_NV 0x00000001 -#define NV10TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_PLANE_ABSOLUTE_NV 0x00000002 -#define NV10TCL_FOG_COORD_DIST_COORD_FOG 0x00000003 -#define NV10TCL_FOG_ENABLE 0x000002a4 -#define NV10TCL_FOG_COLOR 0x000002a8 -#define NV10TCL_FOG_COLOR_R_SHIFT 0 -#define NV10TCL_FOG_COLOR_R_MASK 0x000000ff -#define NV10TCL_FOG_COLOR_G_SHIFT 8 -#define NV10TCL_FOG_COLOR_G_MASK 0x0000ff00 -#define NV10TCL_FOG_COLOR_B_SHIFT 16 -#define NV10TCL_FOG_COLOR_B_MASK 0x00ff0000 -#define NV10TCL_FOG_COLOR_A_SHIFT 24 -#define NV10TCL_FOG_COLOR_A_MASK 0xff000000 -#define NV10TCL_VIEWPORT_CLIP_MODE 0x000002b4 -#define NV10TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*4)) -#define NV10TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008 -#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_L_SHIFT 0 -#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_L_MASK 0x000007ff -#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_LEFT_ENABLE (1 << 11) -#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_R_SHIFT 16 -#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_R_MASK 0x07ff0000 -#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_RIGHT_ENABLE (1 << 27) -#define NV10TCL_VIEWPORT_CLIP_VERT(x) (0x000002e0+((x)*4)) -#define NV10TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008 -#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_T_SHIFT 0 -#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_T_MASK 0x000007ff -#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_TOP_ENABLE (1 << 11) -#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_B_SHIFT 16 -#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_B_MASK 0x07ff0000 -#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_BOTTOM_ENABLE (1 << 27) -#define NV10TCL_ALPHA_FUNC_ENABLE 0x00000300 -#define NV10TCL_BLEND_FUNC_ENABLE 0x00000304 -#define NV10TCL_CULL_FACE_ENABLE 0x00000308 -#define NV10TCL_DEPTH_TEST_ENABLE 0x0000030c -#define NV10TCL_DITHER_ENABLE 0x00000310 -#define NV10TCL_LIGHTING_ENABLE 0x00000314 -#define NV10TCL_POINT_PARAMETERS_ENABLE 0x00000318 -#define NV10TCL_POINT_SMOOTH_ENABLE 0x0000031c -#define NV10TCL_LINE_SMOOTH_ENABLE 0x00000320 -#define NV10TCL_POLYGON_SMOOTH_ENABLE 0x00000324 -#define NV10TCL_VERTEX_WEIGHT_ENABLE 0x00000328 -#define NV10TCL_STENCIL_ENABLE 0x0000032c -#define NV10TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000330 -#define NV10TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000334 -#define NV10TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000338 -#define NV10TCL_ALPHA_FUNC_FUNC 0x0000033c -#define NV10TCL_ALPHA_FUNC_FUNC_NEVER 0x00000200 -#define NV10TCL_ALPHA_FUNC_FUNC_LESS 0x00000201 -#define NV10TCL_ALPHA_FUNC_FUNC_EQUAL 0x00000202 -#define NV10TCL_ALPHA_FUNC_FUNC_LEQUAL 0x00000203 -#define NV10TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204 -#define NV10TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204 -#define NV10TCL_ALPHA_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV10TCL_ALPHA_FUNC_FUNC_GEQUAL 0x00000206 -#define NV10TCL_ALPHA_FUNC_FUNC_ALWAYS 0x00000207 -#define NV10TCL_ALPHA_FUNC_REF 0x00000340 -#define NV10TCL_BLEND_FUNC_SRC 0x00000344 -#define NV10TCL_BLEND_FUNC_SRC_ZERO 0x00000000 -#define NV10TCL_BLEND_FUNC_SRC_ONE 0x00000001 -#define NV10TCL_BLEND_FUNC_SRC_SRC_COLOR 0x00000300 -#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV10TCL_BLEND_FUNC_SRC_SRC_ALPHA 0x00000302 -#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV10TCL_BLEND_FUNC_SRC_DST_ALPHA 0x00000304 -#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV10TCL_BLEND_FUNC_SRC_DST_COLOR 0x00000306 -#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_COLOR 0x00000307 -#define NV10TCL_BLEND_FUNC_SRC_SRC_ALPHA_SATURATE 0x00000308 -#define NV10TCL_BLEND_FUNC_SRC_CONSTANT_COLOR 0x00008001 -#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV10TCL_BLEND_FUNC_SRC_CONSTANT_ALPHA 0x00008003 -#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV10TCL_BLEND_FUNC_DST 0x00000348 -#define NV10TCL_BLEND_FUNC_DST_ZERO 0x00000000 -#define NV10TCL_BLEND_FUNC_DST_ONE 0x00000001 -#define NV10TCL_BLEND_FUNC_DST_SRC_COLOR 0x00000300 -#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV10TCL_BLEND_FUNC_DST_SRC_ALPHA 0x00000302 -#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV10TCL_BLEND_FUNC_DST_DST_ALPHA 0x00000304 -#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV10TCL_BLEND_FUNC_DST_DST_COLOR 0x00000306 -#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_DST_COLOR 0x00000307 -#define NV10TCL_BLEND_FUNC_DST_SRC_ALPHA_SATURATE 0x00000308 -#define NV10TCL_BLEND_FUNC_DST_CONSTANT_COLOR 0x00008001 -#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV10TCL_BLEND_FUNC_DST_CONSTANT_ALPHA 0x00008003 -#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV10TCL_BLEND_COLOR 0x0000034c -#define NV10TCL_BLEND_COLOR_B_SHIFT 0 -#define NV10TCL_BLEND_COLOR_B_MASK 0x000000ff -#define NV10TCL_BLEND_COLOR_G_SHIFT 8 -#define NV10TCL_BLEND_COLOR_G_MASK 0x0000ff00 -#define NV10TCL_BLEND_COLOR_R_SHIFT 16 -#define NV10TCL_BLEND_COLOR_R_MASK 0x00ff0000 -#define NV10TCL_BLEND_COLOR_A_SHIFT 24 -#define NV10TCL_BLEND_COLOR_A_MASK 0xff000000 -#define NV10TCL_BLEND_EQUATION 0x00000350 -#define NV10TCL_BLEND_EQUATION_FUNC_ADD 0x00008006 -#define NV10TCL_BLEND_EQUATION_MIN 0x00008007 -#define NV10TCL_BLEND_EQUATION_MAX 0x00008008 -#define NV10TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a -#define NV10TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b -#define NV10TCL_DEPTH_FUNC 0x00000354 -#define NV10TCL_DEPTH_FUNC_NEVER 0x00000200 -#define NV10TCL_DEPTH_FUNC_LESS 0x00000201 -#define NV10TCL_DEPTH_FUNC_EQUAL 0x00000202 -#define NV10TCL_DEPTH_FUNC_LEQUAL 0x00000203 -#define NV10TCL_DEPTH_FUNC_GREATER 0x00000204 -#define NV10TCL_DEPTH_FUNC_GREATER 0x00000204 -#define NV10TCL_DEPTH_FUNC_NOTEQUAL 0x00000205 -#define NV10TCL_DEPTH_FUNC_GEQUAL 0x00000206 -#define NV10TCL_DEPTH_FUNC_ALWAYS 0x00000207 -#define NV10TCL_COLOR_MASK 0x00000358 -#define NV10TCL_COLOR_MASK_B (1 << 0) -#define NV10TCL_COLOR_MASK_G (1 << 8) -#define NV10TCL_COLOR_MASK_R (1 << 16) -#define NV10TCL_COLOR_MASK_A (1 << 24) -#define NV10TCL_DEPTH_WRITE_ENABLE 0x0000035c -#define NV10TCL_STENCIL_MASK 0x00000360 -#define NV10TCL_STENCIL_FUNC_FUNC 0x00000364 -#define NV10TCL_STENCIL_FUNC_FUNC_NEVER 0x00000200 -#define NV10TCL_STENCIL_FUNC_FUNC_LESS 0x00000201 -#define NV10TCL_STENCIL_FUNC_FUNC_EQUAL 0x00000202 -#define NV10TCL_STENCIL_FUNC_FUNC_LEQUAL 0x00000203 -#define NV10TCL_STENCIL_FUNC_FUNC_GREATER 0x00000204 -#define NV10TCL_STENCIL_FUNC_FUNC_GREATER 0x00000204 -#define NV10TCL_STENCIL_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV10TCL_STENCIL_FUNC_FUNC_GEQUAL 0x00000206 -#define NV10TCL_STENCIL_FUNC_FUNC_ALWAYS 0x00000207 -#define NV10TCL_STENCIL_FUNC_REF 0x00000368 -#define NV10TCL_STENCIL_FUNC_MASK 0x0000036c -#define NV10TCL_STENCIL_OP_FAIL 0x00000370 -#define NV10TCL_STENCIL_OP_FAIL_ZERO 0x00000000 -#define NV10TCL_STENCIL_OP_FAIL_INVERT 0x0000150a -#define NV10TCL_STENCIL_OP_FAIL_KEEP 0x00001e00 -#define NV10TCL_STENCIL_OP_FAIL_REPLACE 0x00001e01 -#define NV10TCL_STENCIL_OP_FAIL_INCR 0x00001e02 -#define NV10TCL_STENCIL_OP_FAIL_DECR 0x00001e03 -#define NV10TCL_STENCIL_OP_FAIL_INCR_WRAP 0x00008507 -#define NV10TCL_STENCIL_OP_FAIL_DECR_WRAP 0x00008508 -#define NV10TCL_STENCIL_OP_ZFAIL 0x00000374 -#define NV10TCL_STENCIL_OP_ZFAIL_ZERO 0x00000000 -#define NV10TCL_STENCIL_OP_ZFAIL_INVERT 0x0000150a -#define NV10TCL_STENCIL_OP_ZFAIL_KEEP 0x00001e00 -#define NV10TCL_STENCIL_OP_ZFAIL_REPLACE 0x00001e01 -#define NV10TCL_STENCIL_OP_ZFAIL_INCR 0x00001e02 -#define NV10TCL_STENCIL_OP_ZFAIL_DECR 0x00001e03 -#define NV10TCL_STENCIL_OP_ZFAIL_INCR_WRAP 0x00008507 -#define NV10TCL_STENCIL_OP_ZFAIL_DECR_WRAP 0x00008508 -#define NV10TCL_STENCIL_OP_ZPASS 0x00000378 -#define NV10TCL_STENCIL_OP_ZPASS_ZERO 0x00000000 -#define NV10TCL_STENCIL_OP_ZPASS_INVERT 0x0000150a -#define NV10TCL_STENCIL_OP_ZPASS_KEEP 0x00001e00 -#define NV10TCL_STENCIL_OP_ZPASS_REPLACE 0x00001e01 -#define NV10TCL_STENCIL_OP_ZPASS_INCR 0x00001e02 -#define NV10TCL_STENCIL_OP_ZPASS_DECR 0x00001e03 -#define NV10TCL_STENCIL_OP_ZPASS_INCR_WRAP 0x00008507 -#define NV10TCL_STENCIL_OP_ZPASS_DECR_WRAP 0x00008508 -#define NV10TCL_SHADE_MODEL 0x0000037c -#define NV10TCL_SHADE_MODEL_FLAT 0x00001d00 -#define NV10TCL_SHADE_MODEL_SMOOTH 0x00001d01 -#define NV10TCL_LINE_WIDTH 0x00000380 -#define NV10TCL_POLYGON_OFFSET_FACTOR 0x00000384 -#define NV10TCL_POLYGON_OFFSET_UNITS 0x00000388 -#define NV10TCL_POLYGON_MODE_FRONT 0x0000038c -#define NV10TCL_POLYGON_MODE_FRONT_POINT 0x00001b00 -#define NV10TCL_POLYGON_MODE_FRONT_LINE 0x00001b01 -#define NV10TCL_POLYGON_MODE_FRONT_FILL 0x00001b02 -#define NV10TCL_POLYGON_MODE_BACK 0x00000390 -#define NV10TCL_POLYGON_MODE_BACK_POINT 0x00001b00 -#define NV10TCL_POLYGON_MODE_BACK_LINE 0x00001b01 -#define NV10TCL_POLYGON_MODE_BACK_FILL 0x00001b02 -#define NV10TCL_DEPTH_RANGE_NEAR 0x00000394 -#define NV10TCL_DEPTH_RANGE_FAR 0x00000398 -#define NV10TCL_CULL_FACE 0x0000039c -#define NV10TCL_CULL_FACE_FRONT 0x00000404 -#define NV10TCL_CULL_FACE_BACK 0x00000405 -#define NV10TCL_CULL_FACE_FRONT_AND_BACK 0x00000408 -#define NV10TCL_FRONT_FACE 0x000003a0 -#define NV10TCL_FRONT_FACE_CW 0x00000900 -#define NV10TCL_FRONT_FACE_CCW 0x00000901 -#define NV10TCL_NORMALIZE_ENABLE 0x000003a4 -#define NV10TCL_COLOR_MATERIAL_R 0x000003a8 -#define NV10TCL_COLOR_MATERIAL_G 0x000003ac -#define NV10TCL_COLOR_MATERIAL_B 0x000003b0 -#define NV10TCL_COLOR_MATERIAL_A 0x000003b4 -#define NV10TCL_COLOR_CONTROL 0x000003b8 -#define NV10TCL_ENABLED_LIGHTS 0x000003bc -#define NV10TCL_ENABLED_LIGHTS_LIGHT0 (1 << 0) -#define NV10TCL_ENABLED_LIGHTS_LIGHT1 (1 << 2) -#define NV10TCL_ENABLED_LIGHTS_LIGHT2 (1 << 4) -#define NV10TCL_ENABLED_LIGHTS_LIGHT3 (1 << 6) -#define NV10TCL_ENABLED_LIGHTS_LIGHT4 (1 << 8) -#define NV10TCL_ENABLED_LIGHTS_LIGHT5 (1 << 10) -#define NV10TCL_ENABLED_LIGHTS_LIGHT6 (1 << 12) -#define NV10TCL_ENABLED_LIGHTS_LIGHT7 (1 << 14) -#define NV10TCL_TX_GEN_S(x) (0x000003c0+((x)*16)) -#define NV10TCL_TX_GEN_S__SIZE 0x00000002 -#define NV10TCL_TX_GEN_S_FALSE 0x00000000 -#define NV10TCL_TX_GEN_S_EYE_LINEAR 0x00002400 -#define NV10TCL_TX_GEN_S_OBJECT_LINEAR 0x00002401 -#define NV10TCL_TX_GEN_S_SPHERE_MAP 0x00002402 -#define NV10TCL_TX_GEN_S_NORMAL_MAP 0x00008511 -#define NV10TCL_TX_GEN_S_REFLECTION_MAP 0x00008512 -#define NV10TCL_TX_GEN_T(x) (0x000003c4+((x)*16)) -#define NV10TCL_TX_GEN_T__SIZE 0x00000002 -#define NV10TCL_TX_GEN_T_FALSE 0x00000000 -#define NV10TCL_TX_GEN_T_EYE_LINEAR 0x00002400 -#define NV10TCL_TX_GEN_T_OBJECT_LINEAR 0x00002401 -#define NV10TCL_TX_GEN_T_SPHERE_MAP 0x00002402 -#define NV10TCL_TX_GEN_T_NORMAL_MAP 0x00008511 -#define NV10TCL_TX_GEN_T_REFLECTION_MAP 0x00008512 -#define NV10TCL_TX_GEN_R(x) (0x000003c8+((x)*16)) -#define NV10TCL_TX_GEN_R__SIZE 0x00000002 -#define NV10TCL_TX_GEN_R_FALSE 0x00000000 -#define NV10TCL_TX_GEN_R_EYE_LINEAR 0x00002400 -#define NV10TCL_TX_GEN_R_OBJECT_LINEAR 0x00002401 -#define NV10TCL_TX_GEN_R_SPHERE_MAP 0x00002402 -#define NV10TCL_TX_GEN_R_NORMAL_MAP 0x00008511 -#define NV10TCL_TX_GEN_R_REFLECTION_MAP 0x00008512 -#define NV10TCL_TX_GEN_Q(x) (0x000003cc+((x)*16)) -#define NV10TCL_TX_GEN_Q__SIZE 0x00000002 -#define NV10TCL_TX_GEN_Q_FALSE 0x00000000 -#define NV10TCL_TX_GEN_Q_EYE_LINEAR 0x00002400 -#define NV10TCL_TX_GEN_Q_OBJECT_LINEAR 0x00002401 -#define NV10TCL_TX_GEN_Q_SPHERE_MAP 0x00002402 -#define NV10TCL_TX_GEN_Q_NORMAL_MAP 0x00008511 -#define NV10TCL_TX_GEN_Q_REFLECTION_MAP 0x00008512 -#define NV10TCL_TX_MATRIX_ENABLE(x) (0x000003e0+((x)*4)) -#define NV10TCL_TX_MATRIX_ENABLE__SIZE 0x00000002 -#define NV10TCL_VIEW_MATRIX_ENABLE 0x000003e8 -#define NV10TCL_VIEW_MATRIX_ENABLE_MODELVIEW1 (1 << 0) -#define NV10TCL_VIEW_MATRIX_ENABLE_MODELVIEW0 (1 << 1) -#define NV10TCL_VIEW_MATRIX_ENABLE_PROJECTION (1 << 2) -#define NV10TCL_POINT_SIZE 0x000003ec -#define NV10TCL_MODELVIEW0_MATRIX(x) (0x00000400+((x)*4)) -#define NV10TCL_MODELVIEW0_MATRIX__SIZE 0x00000010 -#define NV10TCL_MODELVIEW1_MATRIX(x) (0x00000440+((x)*4)) -#define NV10TCL_MODELVIEW1_MATRIX__SIZE 0x00000010 -#define NV10TCL_INVERSE_MODELVIEW0_MATRIX(x) (0x00000480+((x)*4)) -#define NV10TCL_INVERSE_MODELVIEW0_MATRIX__SIZE 0x00000010 -#define NV10TCL_INVERSE_MODELVIEW1_MATRIX(x) (0x000004c0+((x)*4)) -#define NV10TCL_INVERSE_MODELVIEW1_MATRIX__SIZE 0x00000010 -#define NV10TCL_PROJECTION_MATRIX(x) (0x00000500+((x)*4)) -#define NV10TCL_PROJECTION_MATRIX__SIZE 0x00000010 -#define NV10TCL_TX0_MATRIX(x) (0x00000540+((x)*4)) -#define NV10TCL_TX0_MATRIX__SIZE 0x00000010 -#define NV10TCL_TX1_MATRIX(x) (0x00000580+((x)*4)) -#define NV10TCL_TX1_MATRIX__SIZE 0x00000010 -#define NV10TCL_CLIP_PLANE_A(x) (0x00000600+((x)*16)) -#define NV10TCL_CLIP_PLANE_A__SIZE 0x00000008 -#define NV10TCL_CLIP_PLANE_B(x) (0x00000604+((x)*16)) -#define NV10TCL_CLIP_PLANE_B__SIZE 0x00000008 -#define NV10TCL_CLIP_PLANE_C(x) (0x00000608+((x)*16)) -#define NV10TCL_CLIP_PLANE_C__SIZE 0x00000008 -#define NV10TCL_CLIP_PLANE_D(x) (0x0000060c+((x)*16)) -#define NV10TCL_CLIP_PLANE_D__SIZE 0x00000008 -#define NV10TCL_FOG_EQUATION_CONSTANT 0x00000680 -#define NV10TCL_FOG_EQUATION_LINEAR 0x00000684 -#define NV10TCL_FOG_EQUATION_QUADRATIC 0x00000688 -#define NV10TCL_FRONT_MATERIAL_SHININESS(x) (0x000006a0+((x)*4)) -#define NV10TCL_FRONT_MATERIAL_SHININESS__SIZE 0x00000006 -#define NV10TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x000006c4 -#define NV10TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x000006c8 -#define NV10TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x000006cc -#define NV10TCL_VIEWPORT_SCALE_X 0x000006e8 -#define NV10TCL_VIEWPORT_SCALE_Y 0x000006ec -#define NV10TCL_VIEWPORT_SCALE_Z 0x000006f0 -#define NV10TCL_VIEWPORT_SCALE_W 0x000006f4 -#define NV10TCL_POINT_PARAMETER(x) (0x000006f8+((x)*4)) -#define NV10TCL_POINT_PARAMETER__SIZE 0x00000008 -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(x) (0x00000800+((x)*128)) -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R__SIZE 0x00000008 -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(x) (0x00000804+((x)*128)) -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G__SIZE 0x00000008 -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(x) (0x00000808+((x)*128)) -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B__SIZE 0x00000008 -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(x) (0x0000080c+((x)*128)) -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R__SIZE 0x00000008 -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(x) (0x00000810+((x)*128)) -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G__SIZE 0x00000008 -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(x) (0x00000814+((x)*128)) -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B__SIZE 0x00000008 -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(x) (0x00000818+((x)*128)) -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R__SIZE 0x00000008 -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(x) (0x0000081c+((x)*128)) -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G__SIZE 0x00000008 -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(x) (0x00000820+((x)*128)) -#define NV10TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B__SIZE 0x00000008 -#define NV10TCL_LIGHT_HALF_VECTOR_X(x) (0x00000828+((x)*128)) -#define NV10TCL_LIGHT_HALF_VECTOR_X__SIZE 0x00000008 -#define NV10TCL_LIGHT_HALF_VECTOR_Y(x) (0x0000082c+((x)*128)) -#define NV10TCL_LIGHT_HALF_VECTOR_Y__SIZE 0x00000008 -#define NV10TCL_LIGHT_HALF_VECTOR_Z(x) (0x00000830+((x)*128)) -#define NV10TCL_LIGHT_HALF_VECTOR_Z__SIZE 0x00000008 -#define NV10TCL_LIGHT_DIRECTION_X(x) (0x00000834+((x)*128)) -#define NV10TCL_LIGHT_DIRECTION_X__SIZE 0x00000008 -#define NV10TCL_LIGHT_DIRECTION_Y(x) (0x00000838+((x)*128)) -#define NV10TCL_LIGHT_DIRECTION_Y__SIZE 0x00000008 -#define NV10TCL_LIGHT_DIRECTION_Z(x) (0x0000083c+((x)*128)) -#define NV10TCL_LIGHT_DIRECTION_Z__SIZE 0x00000008 -#define NV10TCL_LIGHT_SPOT_CUTOFF_A(x) (0x00000840+((x)*128)) -#define NV10TCL_LIGHT_SPOT_CUTOFF_A__SIZE 0x00000008 -#define NV10TCL_LIGHT_SPOT_CUTOFF_B(x) (0x00000844+((x)*128)) -#define NV10TCL_LIGHT_SPOT_CUTOFF_B__SIZE 0x00000008 -#define NV10TCL_LIGHT_SPOT_CUTOFF_C(x) (0x00000848+((x)*128)) -#define NV10TCL_LIGHT_SPOT_CUTOFF_C__SIZE 0x00000008 -#define NV10TCL_LIGHT_SPOT_DIR_X(x) (0x0000084c+((x)*128)) -#define NV10TCL_LIGHT_SPOT_DIR_X__SIZE 0x00000008 -#define NV10TCL_LIGHT_SPOT_DIR_Y(x) (0x00000850+((x)*128)) -#define NV10TCL_LIGHT_SPOT_DIR_Y__SIZE 0x00000008 -#define NV10TCL_LIGHT_SPOT_DIR_Z(x) (0x00000854+((x)*128)) -#define NV10TCL_LIGHT_SPOT_DIR_Z__SIZE 0x00000008 -#define NV10TCL_LIGHT_SPOT_CUTOFF_D(x) (0x00000858+((x)*128)) -#define NV10TCL_LIGHT_SPOT_CUTOFF_D__SIZE 0x00000008 -#define NV10TCL_LIGHT_POSITION_X(x) (0x0000085c+((x)*128)) -#define NV10TCL_LIGHT_POSITION_X__SIZE 0x00000008 -#define NV10TCL_LIGHT_POSITION_Y(x) (0x00000860+((x)*128)) -#define NV10TCL_LIGHT_POSITION_Y__SIZE 0x00000008 -#define NV10TCL_LIGHT_POSITION_Z(x) (0x00000864+((x)*128)) -#define NV10TCL_LIGHT_POSITION_Z__SIZE 0x00000008 -#define NV10TCL_LIGHT_ATTENUATION_CONSTANT(x) (0x00000868+((x)*128)) -#define NV10TCL_LIGHT_ATTENUATION_CONSTANT__SIZE 0x00000008 -#define NV10TCL_LIGHT_ATTENUATION_LINEAR(x) (0x0000086c+((x)*128)) -#define NV10TCL_LIGHT_ATTENUATION_LINEAR__SIZE 0x00000008 -#define NV10TCL_LIGHT_ATTENUATION_QUADRATIC(x) (0x00000870+((x)*128)) -#define NV10TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE 0x00000008 -#define NV10TCL_VERTEX_POS_3F_X 0x00000c00 -#define NV10TCL_VERTEX_POS_3F_Y 0x00000c04 -#define NV10TCL_VERTEX_POS_3F_Z 0x00000c08 -#define NV10TCL_VERTEX_POS_4F_X 0x00000c18 -#define NV10TCL_VERTEX_POS_4F_Y 0x00000c1c -#define NV10TCL_VERTEX_POS_4F_Z 0x00000c20 -#define NV10TCL_VERTEX_POS_4F_W 0x00000c24 -#define NV10TCL_VERTEX_NOR_3F_X 0x00000c30 -#define NV10TCL_VERTEX_NOR_3F_Y 0x00000c34 -#define NV10TCL_VERTEX_NOR_3F_Z 0x00000c38 -#define NV10TCL_VERTEX_NOR_3I_XY 0x00000c40 -#define NV10TCL_VERTEX_NOR_3I_XY_X_SHIFT 0 -#define NV10TCL_VERTEX_NOR_3I_XY_X_MASK 0x0000ffff -#define NV10TCL_VERTEX_NOR_3I_XY_Y_SHIFT 16 -#define NV10TCL_VERTEX_NOR_3I_XY_Y_MASK 0xffff0000 -#define NV10TCL_VERTEX_NOR_3I_Z 0x00000c44 -#define NV10TCL_VERTEX_NOR_3I_Z_Z_SHIFT 0 -#define NV10TCL_VERTEX_NOR_3I_Z_Z_MASK 0x0000ffff -#define NV10TCL_VERTEX_COL_4F_R 0x00000c50 -#define NV10TCL_VERTEX_COL_4F_G 0x00000c54 -#define NV10TCL_VERTEX_COL_4F_B 0x00000c58 -#define NV10TCL_VERTEX_COL_4F_A 0x00000c5c -#define NV10TCL_VERTEX_COL_3F_R 0x00000c60 -#define NV10TCL_VERTEX_COL_3F_G 0x00000c64 -#define NV10TCL_VERTEX_COL_3F_B 0x00000c68 -#define NV10TCL_VERTEX_COL_4I 0x00000c6c -#define NV10TCL_VERTEX_COL_4I_R_SHIFT 0 -#define NV10TCL_VERTEX_COL_4I_R_MASK 0x000000ff -#define NV10TCL_VERTEX_COL_4I_G_SHIFT 8 -#define NV10TCL_VERTEX_COL_4I_G_MASK 0x0000ff00 -#define NV10TCL_VERTEX_COL_4I_B_SHIFT 16 -#define NV10TCL_VERTEX_COL_4I_B_MASK 0x00ff0000 -#define NV10TCL_VERTEX_COL_4I_A_SHIFT 24 -#define NV10TCL_VERTEX_COL_4I_A_MASK 0xff000000 -#define NV10TCL_VERTEX_COL2_3F_R 0x00000c80 -#define NV10TCL_VERTEX_COL2_3F_G 0x00000c84 -#define NV10TCL_VERTEX_COL2_3F_B 0x00000c88 -#define NV10TCL_VERTEX_COL2_3I 0x00000c8c -#define NV10TCL_VERTEX_COL2_3I_R_SHIFT 0 -#define NV10TCL_VERTEX_COL2_3I_R_MASK 0x000000ff -#define NV10TCL_VERTEX_COL2_3I_G_SHIFT 8 -#define NV10TCL_VERTEX_COL2_3I_G_MASK 0x0000ff00 -#define NV10TCL_VERTEX_COL2_3I_B_SHIFT 16 -#define NV10TCL_VERTEX_COL2_3I_B_MASK 0x00ff0000 -#define NV10TCL_VERTEX_TX0_2F_S 0x00000c90 -#define NV10TCL_VERTEX_TX0_2F_T 0x00000c94 -#define NV10TCL_VERTEX_TX0_2I 0x00000c98 -#define NV10TCL_VERTEX_TX0_2I_S_SHIFT 0 -#define NV10TCL_VERTEX_TX0_2I_S_MASK 0x0000ffff -#define NV10TCL_VERTEX_TX0_2I_T_SHIFT 16 -#define NV10TCL_VERTEX_TX0_2I_T_MASK 0xffff0000 -#define NV10TCL_VERTEX_TX0_4F_S 0x00000ca0 -#define NV10TCL_VERTEX_TX0_4F_T 0x00000ca4 -#define NV10TCL_VERTEX_TX0_4F_R 0x00000ca8 -#define NV10TCL_VERTEX_TX0_4F_Q 0x00000cac -#define NV10TCL_VERTEX_TX0_4I_ST 0x00000cb0 -#define NV10TCL_VERTEX_TX0_4I_ST_S_SHIFT 0 -#define NV10TCL_VERTEX_TX0_4I_ST_S_MASK 0x0000ffff -#define NV10TCL_VERTEX_TX0_4I_ST_T_SHIFT 16 -#define NV10TCL_VERTEX_TX0_4I_ST_T_MASK 0xffff0000 -#define NV10TCL_VERTEX_TX0_4I_RQ 0x00000cb4 -#define NV10TCL_VERTEX_TX0_4I_RQ_R_SHIFT 0 -#define NV10TCL_VERTEX_TX0_4I_RQ_R_MASK 0x0000ffff -#define NV10TCL_VERTEX_TX0_4I_RQ_Q_SHIFT 16 -#define NV10TCL_VERTEX_TX0_4I_RQ_Q_MASK 0xffff0000 -#define NV10TCL_VERTEX_TX1_2F_S 0x00000cb8 -#define NV10TCL_VERTEX_TX1_2F_T 0x00000cbc -#define NV10TCL_VERTEX_TX1_2I 0x00000cc0 -#define NV10TCL_VERTEX_TX1_2I_S_SHIFT 0 -#define NV10TCL_VERTEX_TX1_2I_S_MASK 0x0000ffff -#define NV10TCL_VERTEX_TX1_2I_T_SHIFT 16 -#define NV10TCL_VERTEX_TX1_2I_T_MASK 0xffff0000 -#define NV10TCL_VERTEX_TX1_4F_S 0x00000cc8 -#define NV10TCL_VERTEX_TX1_4F_T 0x00000ccc -#define NV10TCL_VERTEX_TX1_4F_R 0x00000cd0 -#define NV10TCL_VERTEX_TX1_4F_Q 0x00000cd4 -#define NV10TCL_VERTEX_TX1_4I_ST 0x00000cd8 -#define NV10TCL_VERTEX_TX1_4I_ST_S_SHIFT 0 -#define NV10TCL_VERTEX_TX1_4I_ST_S_MASK 0x0000ffff -#define NV10TCL_VERTEX_TX1_4I_ST_T_SHIFT 16 -#define NV10TCL_VERTEX_TX1_4I_ST_T_MASK 0xffff0000 -#define NV10TCL_VERTEX_TX1_4I_RQ 0x00000cdc -#define NV10TCL_VERTEX_TX1_4I_RQ_R_SHIFT 0 -#define NV10TCL_VERTEX_TX1_4I_RQ_R_MASK 0x0000ffff -#define NV10TCL_VERTEX_TX1_4I_RQ_Q_SHIFT 16 -#define NV10TCL_VERTEX_TX1_4I_RQ_Q_MASK 0xffff0000 -#define NV10TCL_VERTEX_FOG_1F 0x00000ce0 -#define NV10TCL_VERTEX_WGH_1F 0x00000ce4 -#define NV10TCL_EDGEFLAG_ENABLE 0x00000cec -#define NV10TCL_VERTEX_ARRAY_VALIDATE 0x00000cf0 -#define NV10TCL_VERTEX_ARRAY_ATTRIB_OFFSET(x) (0x00000d00+((x)*8)) -#define NV10TCL_VERTEX_ARRAY_ATTRIB_OFFSET__SIZE 0x00000008 -#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT(x) (0x00000d04+((x)*8)) -#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT__SIZE 0x00000008 -#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_TYPE_SHIFT 0 -#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_TYPE_MASK 0x0000000f -#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_FIELDS_SHIFT 4 -#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_FIELDS_MASK 0x000000f0 -#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_STRIDE_SHIFT 8 -#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_STRIDE_MASK 0x0000ff00 -#define NV10TCL_VERTEX_ARRAY_OFFSET_POS 0x00000d00 -#define NV10TCL_VERTEX_ARRAY_FORMAT_POS 0x00000d04 -#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_SHIFT 0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_MASK 0x0000000f -#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_FIELDS_SHIFT 4 -#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_FIELDS_MASK 0x000000f0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_STRIDE_SHIFT 8 -#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_STRIDE_MASK 0x0000ff00 -#define NV10TCL_VERTEX_ARRAY_OFFSET_COL 0x00000d08 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL 0x00000d0c -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_TYPE_SHIFT 0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_TYPE_MASK 0x0000000f -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_FIELDS_SHIFT 4 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_FIELDS_MASK 0x000000f0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_STRIDE_SHIFT 8 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL_STRIDE_MASK 0x0000ff00 -#define NV10TCL_VERTEX_ARRAY_OFFSET_COL2 0x00000d10 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2 0x00000d14 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_TYPE_SHIFT 0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_TYPE_MASK 0x0000000f -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_FIELDS_SHIFT 4 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_FIELDS_MASK 0x000000f0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_STRIDE_SHIFT 8 -#define NV10TCL_VERTEX_ARRAY_FORMAT_COL2_STRIDE_MASK 0x0000ff00 -#define NV10TCL_VERTEX_ARRAY_OFFSET_TX0 0x00000d18 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0 0x00000d1c -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_TYPE_SHIFT 0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_TYPE_MASK 0x0000000f -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_FIELDS_SHIFT 4 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_FIELDS_MASK 0x000000f0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_STRIDE_SHIFT 8 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX0_STRIDE_MASK 0x0000ff00 -#define NV10TCL_VERTEX_ARRAY_OFFSET_TX1 0x00000d20 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1 0x00000d24 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_TYPE_SHIFT 0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_TYPE_MASK 0x0000000f -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_FIELDS_SHIFT 4 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_FIELDS_MASK 0x000000f0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_STRIDE_SHIFT 8 -#define NV10TCL_VERTEX_ARRAY_FORMAT_TX1_STRIDE_MASK 0x0000ff00 -#define NV10TCL_VERTEX_ARRAY_OFFSET_NOR 0x00000d28 -#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR 0x00000d2c -#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_TYPE_SHIFT 0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_TYPE_MASK 0x0000000f -#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_FIELDS_SHIFT 4 -#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_FIELDS_MASK 0x000000f0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_STRIDE_SHIFT 8 -#define NV10TCL_VERTEX_ARRAY_FORMAT_NOR_STRIDE_MASK 0x0000ff00 -#define NV10TCL_VERTEX_ARRAY_OFFSET_WGH 0x00000d30 -#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH 0x00000d34 -#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_TYPE_SHIFT 0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_TYPE_MASK 0x0000000f -#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_FIELDS_SHIFT 4 -#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_FIELDS_MASK 0x000000f0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_STRIDE_SHIFT 8 -#define NV10TCL_VERTEX_ARRAY_FORMAT_WGH_STRIDE_MASK 0x0000ff00 -#define NV10TCL_VERTEX_ARRAY_OFFSET_FOG 0x00000d38 -#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG 0x00000d3c -#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_TYPE_SHIFT 0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_TYPE_MASK 0x0000000f -#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_FIELDS_SHIFT 4 -#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_FIELDS_MASK 0x000000f0 -#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_STRIDE_SHIFT 8 -#define NV10TCL_VERTEX_ARRAY_FORMAT_FOG_STRIDE_MASK 0x0000ff00 -#define NV10TCL_VERTEX_BEGIN_END 0x00000dfc -#define NV10TCL_VERTEX_BEGIN_END_STOP 0x00000000 -#define NV10TCL_VERTEX_BEGIN_END_POINTS 0x00000001 -#define NV10TCL_VERTEX_BEGIN_END_LINES 0x00000002 -#define NV10TCL_VERTEX_BEGIN_END_LINE_LOOP 0x00000003 -#define NV10TCL_VERTEX_BEGIN_END_LINE_STRIP 0x00000004 -#define NV10TCL_VERTEX_BEGIN_END_TRIANGLES 0x00000005 -#define NV10TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP 0x00000006 -#define NV10TCL_VERTEX_BEGIN_END_TRIANGLE_FAN 0x00000007 -#define NV10TCL_VERTEX_BEGIN_END_QUADS 0x00000008 -#define NV10TCL_VERTEX_BEGIN_END_QUAD_STRIP 0x00000009 -#define NV10TCL_VERTEX_BEGIN_END_POLYGON 0x0000000a -#define NV10TCL_VB_ELEMENT_U16 0x00000e00 -#define NV10TCL_VB_ELEMENT_U16_I0_SHIFT 0 -#define NV10TCL_VB_ELEMENT_U16_I0_MASK 0x0000ffff -#define NV10TCL_VB_ELEMENT_U16_I1_SHIFT 16 -#define NV10TCL_VB_ELEMENT_U16_I1_MASK 0xffff0000 -#define NV10TCL_VB_ELEMENT_U32 0x00001100 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END 0x000013fc -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_STOP 0x00000000 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_POINTS 0x00000001 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_LINES 0x00000002 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_LINE_LOOP 0x00000003 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_LINE_STRIP 0x00000004 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLES 0x00000005 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLE_STRIP 0x00000006 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLE_FAN 0x00000007 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_QUADS 0x00000008 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_QUAD_STRIP 0x00000009 -#define NV10TCL_VERTEX_BUFFER_BEGIN_END_POLYGON 0x0000000a -#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS 0x00001400 -#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_FIRST_SHIFT 0 -#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_FIRST_MASK 0x0000ffff -#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_LAST_SHIFT 24 -#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_LAST_MASK 0xff000000 -#define NV10TCL_VERTEX_ARRAY_DATA 0x00001800 - - -#define NV04_CONTEXT_COLOR_KEY 0x00000057 - - - -#define NV03_CONTEXT_SURFACES_2D 0x00000058 - -#define NV03_CONTEXT_SURFACES_2D_SYNCHRONIZE 0x00000100 -#define NV03_CONTEXT_SURFACES_2D_DMA_NOTIFY 0x00000180 -#define NV03_CONTEXT_SURFACES_2D_DMA_SOURCE 0x00000184 -#define NV03_CONTEXT_SURFACES_2D_DMA_DESTIN 0x00000188 -#define NV03_CONTEXT_SURFACES_2D_COLOR_FORMAT 0x00000300 -#define NV03_CONTEXT_SURFACES_2D_PITCH 0x00000304 -#define NV03_CONTEXT_SURFACES_2D_PITCH_SOURCE_SHIFT 0 -#define NV03_CONTEXT_SURFACES_2D_PITCH_SOURCE_MASK 0x0000ffff -#define NV03_CONTEXT_SURFACES_2D_PITCH_DESTIN_SHIFT 16 -#define NV03_CONTEXT_SURFACES_2D_PITCH_DESTIN_MASK 0xffff0000 -#define NV03_CONTEXT_SURFACES_2D_OFFSET_SOURCE 0x00000308 -#define NV03_CONTEXT_SURFACES_2D_OFFSET_DESTIN 0x0000030c - - -#define NV03_CONTEXT_SURFACES_3D 0x0000005a - -#define NV03_CONTEXT_SURFACES_3D_SYNCHRONIZE 0x00000100 -#define NV03_CONTEXT_SURFACES_3D_DMA_NOTIFY 0x00000180 -#define NV03_CONTEXT_SURFACES_3D_DMA_SURFACE 0x00000184 -#define NV03_CONTEXT_SURFACES_3D_PITCH 0x00000300 -#define NV03_CONTEXT_SURFACES_3D_OFFSET_COLOR 0x00000304 -#define NV03_CONTEXT_SURFACES_3D_OFFSET_ZETA 0x00000308 - - -#define NV04_RENDER_SOLID_LINE 0x0000005c - -#define NV04_RENDER_SOLID_LINE_SURFACE 0x00000198 - - -#define NV04_RENDER_SOLID_TRIANGLE 0x0000005d - - - -#define NV04_RENDER_SOLID_RECTANGLE 0x0000005e - -#define NV04_RENDER_SOLID_RECTANGLE_SURFACE 0x00000198 - - -#define NV04_IMAGE_BLIT 0x0000005f - -#define NV04_IMAGE_BLIT_NOP 0x00000100 -#define NV04_IMAGE_BLIT_NOTIFY 0x00000104 -#define NV04_IMAGE_BLIT_DMA_NOTIFY 0x00000180 -#define NV04_IMAGE_BLIT_COLOR_KEY 0x00000184 -#define NV04_IMAGE_BLIT_CLIP_RECTANGLE 0x00000188 -#define NV04_IMAGE_BLIT_PATTERN 0x0000018c -#define NV04_IMAGE_BLIT_ROP 0x00000190 -#define NV04_IMAGE_BLIT_BETA4 0x00000198 -#define NV04_IMAGE_BLIT_SURFACE 0x0000019c -#define NV04_IMAGE_BLIT_OPERATION 0x000002fc -#define NV04_IMAGE_BLIT_OPERATION_SRCCOPY_AND 0x00000000 -#define NV04_IMAGE_BLIT_OPERATION_ROP_AND 0x00000001 -#define NV04_IMAGE_BLIT_OPERATION_BLEND_AND 0x00000002 -#define NV04_IMAGE_BLIT_OPERATION_SRCCOPY 0x00000003 -#define NV04_IMAGE_BLIT_OPERATION_SRCCOPY_PREMULT 0x00000004 -#define NV04_IMAGE_BLIT_OPERATION_BLEND_PREMULT 0x00000005 - - -#define NV04_INDEXED_IMAGE_FROM_CPU 0x00000060 - -#define NV04_INDEXED_IMAGE_FROM_CPU_NOP 0x00000100 -#define NV04_INDEXED_IMAGE_FROM_CPU_NOTIFY 0x00000104 -#define NV04_INDEXED_IMAGE_FROM_CPU_PATCH 0x0000010c -#define NV04_INDEXED_IMAGE_FROM_CPU_DMA_NOTIFY 0x00000180 -#define NV04_INDEXED_IMAGE_FROM_CPU_DMA_LUT 0x00000184 -#define NV04_INDEXED_IMAGE_FROM_CPU_COLOR_FORMAT 0x000003e8 -#define NV04_INDEXED_IMAGE_FROM_CPU_INDEX_FORMAT 0x000003ec -#define NV04_INDEXED_IMAGE_FROM_CPU_LUT_OFFSET 0x000003f0 -#define NV04_INDEXED_IMAGE_FROM_CPU_POINT 0x000003f4 -#define NV04_INDEXED_IMAGE_FROM_CPU_SIZE_OUT 0x000003f8 -#define NV04_INDEXED_IMAGE_FROM_CPU_SIZE_IN 0x000003fc -#define NV04_INDEXED_IMAGE_FROM_CPU_COLOR 0x00000400 - - -#define NV04_IMAGE_FROM_CPU 0x00000061 - -#define NV04_IMAGE_FROM_CPU_BETA4 0x00000198 -#define NV04_IMAGE_FROM_CPU_SURFACE 0x0000019c - - -#define NV10_CONTEXT_SURFACES_2D 0x00000062 - - - -#define NV05_SCALED_IMAGE_FROM_MEMORY 0x00000063 - -#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION 0x000002fc -#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_DITHER 0x00000000 -#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE 0x00000001 -#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_SUBTR_TRUNCATE 0x00000002 - - -#define NV01_IMAGE_SRCCOPY_AND 0x00000064 - -#define NV01_IMAGE_SRCCOPY_AND_NOTIFY 0x00000104 -#define NV01_IMAGE_SRCCOPY_AND_DMA_NOTIFY 0x00000180 -#define NV01_IMAGE_SRCCOPY_AND_IMAGE_OUTPUT 0x00000200 -#define NV01_IMAGE_SRCCOPY_AND_IMAGE_INPUT 0x00000204 - - -#define NV05_INDEXED_IMAGE_FROM_CPU 0x00000064 - -#define NV05_INDEXED_IMAGE_FROM_CPU_COLOR_KEY 0x00000188 -#define NV05_INDEXED_IMAGE_FROM_CPU_CLIP_RECTANGLE 0x0000018c -#define NV05_INDEXED_IMAGE_FROM_CPU_PATTERN 0x00000190 -#define NV05_INDEXED_IMAGE_FROM_CPU_ROP 0x00000194 -#define NV05_INDEXED_IMAGE_FROM_CPU_BETA1 0x00000198 -#define NV05_INDEXED_IMAGE_FROM_CPU_BETA4 0x0000019c -#define NV05_INDEXED_IMAGE_FROM_CPU_SURFACE 0x000001a0 -#define NV05_INDEXED_IMAGE_FROM_CPU_COLOR_CONVERSION 0x000003e0 -#define NV05_INDEXED_IMAGE_FROM_CPU_OPERATION 0x000003e4 -#define NV05_INDEXED_IMAGE_FROM_CPU_INDICES 0x00000400 - - -#define NV05_IMAGE_FROM_CPU 0x00000065 - -#define NV05_IMAGE_FROM_CPU_BETA4 0x00000198 -#define NV05_IMAGE_FROM_CPU_SURFACE 0x0000019c - - -#define NV05_STRETCHED_IMAGE_FROM_CPU 0x00000066 - -#define NV05_STRETCHED_IMAGE_FROM_CPU_BETA4 0x00000194 -#define NV05_STRETCHED_IMAGE_FROM_CPU_SURFACE 0x00000198 -#define NV05_STRETCHED_IMAGE_FROM_CPU_COLOR_CONVERSION 0x000002f8 - - -#define NV04_IMAGE_BLEND_PREMULT 0x00000067 - -#define NV04_IMAGE_BLEND_PREMULT_NOP 0x00000100 -#define NV04_IMAGE_BLEND_PREMULT_NOTIFY 0x00000104 -#define NV04_IMAGE_BLEND_PREMULT_DMA_NOTIFY 0x00000180 -#define NV04_IMAGE_BLEND_PREMULT_IMAGE_OUTPUT 0x00000200 -#define NV04_IMAGE_BLEND_PREMULT_BETA_INPUT 0x00000204 -#define NV04_IMAGE_BLEND_PREMULT_IMAGE_INPUT 0x00000208 - - -#define NV03_CHANNEL_PIO 0x0000006a - - - -#define NV03_CHANNEL_DMA 0x0000006b - - - -#define NV04_BETA_SOLID 0x00000072 - -#define NV04_BETA_SOLID_NOP 0x00000100 -#define NV04_BETA_SOLID_NOTIFY 0x00000104 -#define NV04_BETA_SOLID_DMA_NOTIFY 0x00000180 -#define NV04_BETA_SOLID_BETA_OUTPUT 0x00000200 -#define NV04_BETA_SOLID_BETA_FACTOR 0x00000300 - - -#define NV04_STRETCHED_IMAGE_FROM_CPU 0x00000076 - - - -#define NV04_SCALED_IMAGE_FROM_MEMORY 0x00000077 - -#define NV04_SCALED_IMAGE_FROM_MEMORY_NOP 0x00000100 -#define NV04_SCALED_IMAGE_FROM_MEMORY_NOTIFY 0x00000104 -#define NV04_SCALED_IMAGE_FROM_MEMORY_DMA_NOTIFY 0x00000180 -#define NV04_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE 0x00000184 -#define NV04_SCALED_IMAGE_FROM_MEMORY_PATTERN 0x00000188 -#define NV04_SCALED_IMAGE_FROM_MEMORY_ROP 0x0000018c -#define NV04_SCALED_IMAGE_FROM_MEMORY_BETA1 0x00000190 -#define NV04_SCALED_IMAGE_FROM_MEMORY_BETA4 0x00000194 -#define NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE 0x00000198 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION 0x000002fc -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_DITHER 0x00000000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE 0x00000001 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_SUBTR_TRUNCATE 0x00000002 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT 0x00000300 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5 0x00000001 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X1R5G5B5 0x00000002 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8 0x00000003 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8 0x00000004 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_V8YB8U8YA8 0x00000005 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_YB8V8YA8U8 0x00000006 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5 0x00000007 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8 0x00000008 -#define NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_AY8 0x00000009 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION 0x00000304 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_AND 0x00000000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_ROP_AND 0x00000001 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_AND 0x00000002 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY 0x00000003 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_PREMULT 0x00000004 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_PREMULT 0x00000005 -#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT 0x00000308 -#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_SHIFT 0 -#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_MASK 0x0000ffff -#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_SHIFT 16 -#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_MASK 0xffff0000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE 0x0000030c -#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_SHIFT 0 -#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_MASK 0x0000ffff -#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_SHIFT 16 -#define NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_MASK 0xffff0000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT 0x00000310 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_X_SHIFT 0 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_X_MASK 0x0000ffff -#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_SHIFT 16 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_MASK 0xffff0000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE 0x00000314 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_W_SHIFT 0 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_W_MASK 0x0000ffff -#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_SHIFT 16 -#define NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_MASK 0xffff0000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_DU_DX 0x00000318 -#define NV04_SCALED_IMAGE_FROM_MEMORY_DV_DY 0x0000031c -#define NV04_SCALED_IMAGE_FROM_MEMORY_SIZE 0x00000400 -#define NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_W_SHIFT 0 -#define NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_W_MASK 0x0000ffff -#define NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_H_SHIFT 16 -#define NV04_SCALED_IMAGE_FROM_MEMORY_SIZE_H_MASK 0xffff0000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT 0x00000404 -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_PITCH_SHIFT 0 -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_PITCH_MASK 0x0000ffff -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_SHIFT 16 -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_MASK 0x00ff0000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER 0x00010000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CORNER 0x00020000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_SHIFT 24 -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_MASK 0xff000000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE 0x00000000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_BILINEAR 0x01000000 -#define NV04_SCALED_IMAGE_FROM_MEMORY_ADDRESS 0x00000408 -#define NV04_SCALED_IMAGE_FROM_MEMORY_POINT 0x0000040c -#define NV04_SCALED_IMAGE_FROM_MEMORY_POINT_X_SHIFT 0 -#define NV04_SCALED_IMAGE_FROM_MEMORY_POINT_X_MASK 0x0000ffff -#define NV04_SCALED_IMAGE_FROM_MEMORY_POINT_Y_SHIFT 16 -#define NV04_SCALED_IMAGE_FROM_MEMORY_POINT_Y_MASK 0xffff0000 - - -#define NV10_TEXTURE_FROM_CPU 0x0000007b - -#define NV10_TEXTURE_FROM_CPU_NOP 0x00000100 -#define NV10_TEXTURE_FROM_CPU_NOTIFY 0x00000104 -#define NV10_TEXTURE_FROM_CPU_WAIT_FOR_IDLE 0x00000108 -#define NV10_TEXTURE_FROM_CPU_PM_TRIGGER 0x00000140 -#define NV10_TEXTURE_FROM_CPU_DMA_NOTIFY 0x00000180 -#define NV10_TEXTURE_FROM_CPU_SURFACE 0x00000184 -#define NV10_TEXTURE_FROM_CPU_COLOR_FORMAT 0x00000300 -#define NV10_TEXTURE_FROM_CPU_POINT 0x00000304 -#define NV10_TEXTURE_FROM_CPU_POINT_X_SHIFT 0 -#define NV10_TEXTURE_FROM_CPU_POINT_X_MASK 0x0000ffff -#define NV10_TEXTURE_FROM_CPU_POINT_Y_SHIFT 16 -#define NV10_TEXTURE_FROM_CPU_POINT_Y_MASK 0xffff0000 -#define NV10_TEXTURE_FROM_CPU_SIZE 0x00000308 -#define NV10_TEXTURE_FROM_CPU_SIZE_W_SHIFT 0 -#define NV10_TEXTURE_FROM_CPU_SIZE_W_MASK 0x0000ffff -#define NV10_TEXTURE_FROM_CPU_SIZE_H_SHIFT 16 -#define NV10_TEXTURE_FROM_CPU_SIZE_H_MASK 0xffff0000 -#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL 0x0000030c -#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_X_SHIFT 0 -#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_X_MASK 0x0000ffff -#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_W_SHIFT 16 -#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_W_MASK 0xffff0000 -#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL 0x00000310 -#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_Y_SHIFT 0 -#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_Y_MASK 0x0000ffff -#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_H_SHIFT 16 -#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_H_MASK 0xffff0000 -#define NV10_TEXTURE_FROM_CPU_COLOR(x) (0x00000400+((x)*4)) -#define NV10_TEXTURE_FROM_CPU_COLOR__SIZE 0x00000700 - - -#define NV10_VIDEO_DISPLAY 0x0000007c - - - -#define NV10_DVD_SUBPICTURE 0x00000088 - - - -#define NV10_SCALED_IMAGE_FROM_MEMORY 0x00000089 - -#define NV10_SCALED_IMAGE_FROM_MEMORY_WAIT_FOR_IDLE 0x00000108 - - -#define NV10_IMAGE_FROM_CPU 0x0000008a - -#define NV10_IMAGE_FROM_CPU_COLOR_CONVERSION 0x000002f8 - - -#define NV10_CONTEXT_SURFACES_3D 0x00000093 - - - -#define NV10_DX5_TEXTURE_TRIANGLE 0x00000094 - - - -#define NV10_DX6_MULTI_TEXTURE_TRIANGLE 0x00000095 - - - -#define NV11TCL 0x00000096 - -#define NV11TCL_COLOR_LOGIC_OP_ENABLE 0x00000d40 -#define NV11TCL_COLOR_LOGIC_OP_OP 0x00000d44 -#define NV11TCL_COLOR_LOGIC_OP_OP_CLEAR 0x00001500 -#define NV11TCL_COLOR_LOGIC_OP_OP_AND 0x00001501 -#define NV11TCL_COLOR_LOGIC_OP_OP_AND_REVERSE 0x00001502 -#define NV11TCL_COLOR_LOGIC_OP_OP_COPY 0x00001503 -#define NV11TCL_COLOR_LOGIC_OP_OP_AND_INVERTED 0x00001504 -#define NV11TCL_COLOR_LOGIC_OP_OP_NOOP 0x00001505 -#define NV11TCL_COLOR_LOGIC_OP_OP_XOR 0x00001506 -#define NV11TCL_COLOR_LOGIC_OP_OP_OR 0x00001507 -#define NV11TCL_COLOR_LOGIC_OP_OP_NOR 0x00001508 -#define NV11TCL_COLOR_LOGIC_OP_OP_EQUIV 0x00001509 -#define NV11TCL_COLOR_LOGIC_OP_OP_INVERT 0x0000150a -#define NV11TCL_COLOR_LOGIC_OP_OP_OR_REVERSE 0x0000150b -#define NV11TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED 0x0000150c -#define NV11TCL_COLOR_LOGIC_OP_OP_OR_INVERTED 0x0000150d -#define NV11TCL_COLOR_LOGIC_OP_OP_NAND 0x0000150e -#define NV11TCL_COLOR_LOGIC_OP_OP_SET 0x0000150f - - -#define NV20TCL 0x00000097 - -#define NV20TCL_NOP 0x00000100 -#define NV20TCL_NOTIFY 0x00000104 -#define NV20TCL_DMA_NOTIFY 0x00000180 -#define NV20TCL_DMA_TEXTURE0 0x00000184 -#define NV20TCL_DMA_TEXTURE1 0x00000188 -#define NV20TCL_DMA_COLOR 0x00000194 -#define NV20TCL_DMA_ZETA 0x00000198 -#define NV20TCL_DMA_VTXBUF0 0x0000019c -#define NV20TCL_DMA_VTXBUF1 0x000001a0 -#define NV20TCL_DMA_FENCE 0x000001a4 -#define NV20TCL_DMA_QUERY 0x000001a8 -#define NV20TCL_RT_HORIZ 0x00000200 -#define NV20TCL_RT_HORIZ_X_SHIFT 0 -#define NV20TCL_RT_HORIZ_X_MASK 0x0000ffff -#define NV20TCL_RT_HORIZ_W_SHIFT 16 -#define NV20TCL_RT_HORIZ_W_MASK 0xffff0000 -#define NV20TCL_RT_VERT 0x00000204 -#define NV20TCL_RT_VERT_Y_SHIFT 0 -#define NV20TCL_RT_VERT_Y_MASK 0x0000ffff -#define NV20TCL_RT_VERT_H_SHIFT 16 -#define NV20TCL_RT_VERT_H_MASK 0xffff0000 -#define NV20TCL_RT_FORMAT 0x00000208 -#define NV20TCL_RT_FORMAT_TYPE_SHIFT 8 -#define NV20TCL_RT_FORMAT_TYPE_MASK 0x00000f00 -#define NV20TCL_RT_FORMAT_TYPE_LINEAR 0x00000100 -#define NV20TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200 -#define NV20TCL_RT_FORMAT_COLOR_SHIFT 0 -#define NV20TCL_RT_FORMAT_COLOR_MASK 0x0000001f -#define NV20TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003 -#define NV20TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005 -#define NV20TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008 -#define NV20TCL_RT_FORMAT_COLOR_B8 0x00000009 -#define NV20TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d -#define NV20TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f -#define NV20TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010 -#define NV20TCL_RT_PITCH 0x0000020c -#define NV20TCL_RT_PITCH_COLOR_PITCH_SHIFT 0 -#define NV20TCL_RT_PITCH_COLOR_PITCH_MASK 0x0000ffff -#define NV20TCL_RT_PITCH_ZETA_PITCH_SHIFT 16 -#define NV20TCL_RT_PITCH_ZETA_PITCH_MASK 0xffff0000 -#define NV20TCL_COLOR_OFFSET 0x00000210 -#define NV20TCL_ZETA_OFFSET 0x00000214 -#define NV20TCL_RC_IN_ALPHA(x) (0x00000260+((x)*4)) -#define NV20TCL_RC_IN_ALPHA__SIZE 0x00000008 -#define NV20TCL_RC_IN_ALPHA_D_INPUT_SHIFT 0 -#define NV20TCL_RC_IN_ALPHA_D_INPUT_MASK 0x0000000f -#define NV20TCL_RC_IN_ALPHA_D_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV20TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV20TCL_RC_IN_ALPHA_D_INPUT_FOG 0x00000003 -#define NV20TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV20TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV20TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0_ARB 0x00000008 -#define NV20TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1_ARB 0x00000009 -#define NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE0_NV 0x0000000c -#define NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE1_NV 0x0000000d -#define NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV20TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F_NV 0x0000000f -#define NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE (1 << 4) -#define NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE 0x00000000 -#define NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA 0x00000010 -#define NV20TCL_RC_IN_ALPHA_D_MAPPING_SHIFT 5 -#define NV20TCL_RC_IN_ALPHA_D_MAPPING_MASK 0x000000e0 -#define NV20TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020 -#define NV20TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL_NV 0x00000040 -#define NV20TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE_NV 0x00000060 -#define NV20TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080 -#define NV20TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0 -#define NV20TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0 -#define NV20TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_SHIFT 8 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_MASK 0x00000f00 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_FOG 0x00000300 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0_ARB 0x00000800 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1_ARB 0x00000900 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE0_NV 0x00000c00 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE1_NV 0x00000d00 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV20TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE (1 << 12) -#define NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE 0x00000000 -#define NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV20TCL_RC_IN_ALPHA_C_MAPPING_SHIFT 13 -#define NV20TCL_RC_IN_ALPHA_C_MAPPING_MASK 0x0000e000 -#define NV20TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV20TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV20TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV20TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV20TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV20TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV20TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_SHIFT 16 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_MASK 0x000f0000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_FOG 0x00030000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0_ARB 0x00080000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1_ARB 0x00090000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE0_NV 0x000c0000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE1_NV 0x000d0000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV20TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE (1 << 20) -#define NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE 0x00000000 -#define NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV20TCL_RC_IN_ALPHA_B_MAPPING_SHIFT 21 -#define NV20TCL_RC_IN_ALPHA_B_MAPPING_MASK 0x00e00000 -#define NV20TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV20TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV20TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV20TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV20TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV20TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV20TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_SHIFT 24 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_MASK 0x0f000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_FOG 0x03000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0_ARB 0x08000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1_ARB 0x09000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE0_NV 0x0c000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE1_NV 0x0d000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV20TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE (1 << 28) -#define NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE 0x00000000 -#define NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV20TCL_RC_IN_ALPHA_A_MAPPING_SHIFT 29 -#define NV20TCL_RC_IN_ALPHA_A_MAPPING_MASK 0xe0000000 -#define NV20TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV20TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV20TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV20TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV20TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV20TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV20TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV20TCL_RC_FINAL0 0x00000288 -#define NV20TCL_RC_FINAL0_D_INPUT_SHIFT 0 -#define NV20TCL_RC_FINAL0_D_INPUT_MASK 0x0000000f -#define NV20TCL_RC_FINAL0_D_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV20TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV20TCL_RC_FINAL0_D_INPUT_FOG 0x00000003 -#define NV20TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV20TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV20TCL_RC_FINAL0_D_INPUT_TEXTURE0_ARB 0x00000008 -#define NV20TCL_RC_FINAL0_D_INPUT_TEXTURE1_ARB 0x00000009 -#define NV20TCL_RC_FINAL0_D_INPUT_SPARE0_NV 0x0000000c -#define NV20TCL_RC_FINAL0_D_INPUT_SPARE1_NV 0x0000000d -#define NV20TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV20TCL_RC_FINAL0_D_INPUT_E_TIMES_F_NV 0x0000000f -#define NV20TCL_RC_FINAL0_D_COMPONENT_USAGE (1 << 4) -#define NV20TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA 0x00000010 -#define NV20TCL_RC_FINAL0_D_MAPPING_SHIFT 5 -#define NV20TCL_RC_FINAL0_D_MAPPING_MASK 0x000000e0 -#define NV20TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020 -#define NV20TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL_NV 0x00000040 -#define NV20TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE_NV 0x00000060 -#define NV20TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080 -#define NV20TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0 -#define NV20TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0 -#define NV20TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0 -#define NV20TCL_RC_FINAL0_C_INPUT_SHIFT 8 -#define NV20TCL_RC_FINAL0_C_INPUT_MASK 0x00000f00 -#define NV20TCL_RC_FINAL0_C_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV20TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV20TCL_RC_FINAL0_C_INPUT_FOG 0x00000300 -#define NV20TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV20TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV20TCL_RC_FINAL0_C_INPUT_TEXTURE0_ARB 0x00000800 -#define NV20TCL_RC_FINAL0_C_INPUT_TEXTURE1_ARB 0x00000900 -#define NV20TCL_RC_FINAL0_C_INPUT_SPARE0_NV 0x00000c00 -#define NV20TCL_RC_FINAL0_C_INPUT_SPARE1_NV 0x00000d00 -#define NV20TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV20TCL_RC_FINAL0_C_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV20TCL_RC_FINAL0_C_COMPONENT_USAGE (1 << 12) -#define NV20TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV20TCL_RC_FINAL0_C_MAPPING_SHIFT 13 -#define NV20TCL_RC_FINAL0_C_MAPPING_MASK 0x0000e000 -#define NV20TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV20TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV20TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV20TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV20TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV20TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV20TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV20TCL_RC_FINAL0_B_INPUT_SHIFT 16 -#define NV20TCL_RC_FINAL0_B_INPUT_MASK 0x000f0000 -#define NV20TCL_RC_FINAL0_B_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV20TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV20TCL_RC_FINAL0_B_INPUT_FOG 0x00030000 -#define NV20TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV20TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV20TCL_RC_FINAL0_B_INPUT_TEXTURE0_ARB 0x00080000 -#define NV20TCL_RC_FINAL0_B_INPUT_TEXTURE1_ARB 0x00090000 -#define NV20TCL_RC_FINAL0_B_INPUT_SPARE0_NV 0x000c0000 -#define NV20TCL_RC_FINAL0_B_INPUT_SPARE1_NV 0x000d0000 -#define NV20TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV20TCL_RC_FINAL0_B_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV20TCL_RC_FINAL0_B_COMPONENT_USAGE (1 << 20) -#define NV20TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV20TCL_RC_FINAL0_B_MAPPING_SHIFT 21 -#define NV20TCL_RC_FINAL0_B_MAPPING_MASK 0x00e00000 -#define NV20TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV20TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV20TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV20TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV20TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV20TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV20TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV20TCL_RC_FINAL0_A_INPUT_SHIFT 24 -#define NV20TCL_RC_FINAL0_A_INPUT_MASK 0x0f000000 -#define NV20TCL_RC_FINAL0_A_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV20TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV20TCL_RC_FINAL0_A_INPUT_FOG 0x03000000 -#define NV20TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV20TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV20TCL_RC_FINAL0_A_INPUT_TEXTURE0_ARB 0x08000000 -#define NV20TCL_RC_FINAL0_A_INPUT_TEXTURE1_ARB 0x09000000 -#define NV20TCL_RC_FINAL0_A_INPUT_SPARE0_NV 0x0c000000 -#define NV20TCL_RC_FINAL0_A_INPUT_SPARE1_NV 0x0d000000 -#define NV20TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV20TCL_RC_FINAL0_A_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV20TCL_RC_FINAL0_A_COMPONENT_USAGE (1 << 28) -#define NV20TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV20TCL_RC_FINAL0_A_MAPPING_SHIFT 29 -#define NV20TCL_RC_FINAL0_A_MAPPING_MASK 0xe0000000 -#define NV20TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV20TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV20TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV20TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV20TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV20TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV20TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV20TCL_RC_FINAL1 0x0000028c -#define NV20TCL_RC_FINAL1_COLOR_SUM_CLAMP (1 << 7) -#define NV20TCL_RC_FINAL1_G_INPUT_SHIFT 8 -#define NV20TCL_RC_FINAL1_G_INPUT_MASK 0x00000f00 -#define NV20TCL_RC_FINAL1_G_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV20TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV20TCL_RC_FINAL1_G_INPUT_FOG 0x00000300 -#define NV20TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV20TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV20TCL_RC_FINAL1_G_INPUT_TEXTURE0_ARB 0x00000800 -#define NV20TCL_RC_FINAL1_G_INPUT_TEXTURE1_ARB 0x00000900 -#define NV20TCL_RC_FINAL1_G_INPUT_SPARE0_NV 0x00000c00 -#define NV20TCL_RC_FINAL1_G_INPUT_SPARE1_NV 0x00000d00 -#define NV20TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV20TCL_RC_FINAL1_G_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV20TCL_RC_FINAL1_G_COMPONENT_USAGE (1 << 12) -#define NV20TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV20TCL_RC_FINAL1_G_MAPPING_SHIFT 13 -#define NV20TCL_RC_FINAL1_G_MAPPING_MASK 0x0000e000 -#define NV20TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV20TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV20TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV20TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV20TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV20TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV20TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV20TCL_RC_FINAL1_F_INPUT_SHIFT 16 -#define NV20TCL_RC_FINAL1_F_INPUT_MASK 0x000f0000 -#define NV20TCL_RC_FINAL1_F_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV20TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV20TCL_RC_FINAL1_F_INPUT_FOG 0x00030000 -#define NV20TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV20TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV20TCL_RC_FINAL1_F_INPUT_TEXTURE0_ARB 0x00080000 -#define NV20TCL_RC_FINAL1_F_INPUT_TEXTURE1_ARB 0x00090000 -#define NV20TCL_RC_FINAL1_F_INPUT_SPARE0_NV 0x000c0000 -#define NV20TCL_RC_FINAL1_F_INPUT_SPARE1_NV 0x000d0000 -#define NV20TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV20TCL_RC_FINAL1_F_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV20TCL_RC_FINAL1_F_COMPONENT_USAGE (1 << 20) -#define NV20TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV20TCL_RC_FINAL1_F_MAPPING_SHIFT 21 -#define NV20TCL_RC_FINAL1_F_MAPPING_MASK 0x00e00000 -#define NV20TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV20TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV20TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV20TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV20TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV20TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV20TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV20TCL_RC_FINAL1_E_INPUT_SHIFT 24 -#define NV20TCL_RC_FINAL1_E_INPUT_MASK 0x0f000000 -#define NV20TCL_RC_FINAL1_E_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV20TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV20TCL_RC_FINAL1_E_INPUT_FOG 0x03000000 -#define NV20TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV20TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV20TCL_RC_FINAL1_E_INPUT_TEXTURE0_ARB 0x08000000 -#define NV20TCL_RC_FINAL1_E_INPUT_TEXTURE1_ARB 0x09000000 -#define NV20TCL_RC_FINAL1_E_INPUT_SPARE0_NV 0x0c000000 -#define NV20TCL_RC_FINAL1_E_INPUT_SPARE1_NV 0x0d000000 -#define NV20TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV20TCL_RC_FINAL1_E_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV20TCL_RC_FINAL1_E_COMPONENT_USAGE (1 << 28) -#define NV20TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV20TCL_RC_FINAL1_E_MAPPING_SHIFT 29 -#define NV20TCL_RC_FINAL1_E_MAPPING_MASK 0xe0000000 -#define NV20TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV20TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV20TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV20TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV20TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV20TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV20TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV20TCL_LIGHT_CONTROL 0x00000294 -#define NV20TCL_FOG_MODE 0x0000029c -#define NV20TCL_FOG_MODE_EXP 0x00000800 -#define NV20TCL_FOG_MODE_EXP_2 0x00000802 -#define NV20TCL_FOG_MODE_EXP2 0x00000803 -#define NV20TCL_FOG_MODE_LINEAR 0x00000804 -#define NV20TCL_FOG_MODE_LINEAR_2 0x00002601 -#define NV20TCL_FOG_COORD_DIST 0x000002a0 -#define NV20TCL_FOG_COORD_DIST_COORD_FALSE 0x00000000 -#define NV20TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_RADIAL_NV 0x00000001 -#define NV20TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_PLANE_ABSOLUTE_NV 0x00000002 -#define NV20TCL_FOG_COORD_DIST_COORD_FOG 0x00000003 -#define NV20TCL_FOG_ENABLE 0x000002a4 -#define NV20TCL_FOG_COLOR 0x000002a8 -#define NV20TCL_FOG_COLOR_R_SHIFT 0 -#define NV20TCL_FOG_COLOR_R_MASK 0x000000ff -#define NV20TCL_FOG_COLOR_G_SHIFT 8 -#define NV20TCL_FOG_COLOR_G_MASK 0x0000ff00 -#define NV20TCL_FOG_COLOR_B_SHIFT 16 -#define NV20TCL_FOG_COLOR_B_MASK 0x00ff0000 -#define NV20TCL_FOG_COLOR_A_SHIFT 24 -#define NV20TCL_FOG_COLOR_A_MASK 0xff000000 -#define NV20TCL_VIEWPORT_CLIP_MODE 0x000002b4 -#define NV20TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*4)) -#define NV20TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008 -#define NV20TCL_VIEWPORT_CLIP_VERT(x) (0x000002e0+((x)*4)) -#define NV20TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008 -#define NV20TCL_ALPHA_FUNC_ENABLE 0x00000300 -#define NV20TCL_BLEND_FUNC_ENABLE 0x00000304 -#define NV20TCL_CULL_FACE_ENABLE 0x00000308 -#define NV20TCL_DEPTH_TEST_ENABLE 0x0000030c -#define NV20TCL_DITHER_ENABLE 0x00000310 -#define NV20TCL_LIGHTING_ENABLE 0x00000314 -#define NV20TCL_POINT_PARAMETERS_ENABLE 0x00000318 -#define NV20TCL_POINT_SMOOTH_ENABLE 0x0000031c -#define NV20TCL_LINE_SMOOTH_ENABLE 0x00000320 -#define NV20TCL_POLYGON_SMOOTH_ENABLE 0x00000324 -#define NV20TCL_STENCIL_ENABLE 0x0000032c -#define NV20TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000330 -#define NV20TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000334 -#define NV20TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000338 -#define NV20TCL_ALPHA_FUNC_FUNC 0x0000033c -#define NV20TCL_ALPHA_FUNC_FUNC_NEVER 0x00000200 -#define NV20TCL_ALPHA_FUNC_FUNC_LESS 0x00000201 -#define NV20TCL_ALPHA_FUNC_FUNC_EQUAL 0x00000202 -#define NV20TCL_ALPHA_FUNC_FUNC_LEQUAL 0x00000203 -#define NV20TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204 -#define NV20TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204 -#define NV20TCL_ALPHA_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV20TCL_ALPHA_FUNC_FUNC_GEQUAL 0x00000206 -#define NV20TCL_ALPHA_FUNC_FUNC_ALWAYS 0x00000207 -#define NV20TCL_ALPHA_FUNC_REF 0x00000340 -#define NV20TCL_BLEND_FUNC_SRC 0x00000344 -#define NV20TCL_BLEND_FUNC_SRC_ZERO 0x00000000 -#define NV20TCL_BLEND_FUNC_SRC_ONE 0x00000001 -#define NV20TCL_BLEND_FUNC_SRC_SRC_COLOR 0x00000300 -#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV20TCL_BLEND_FUNC_SRC_SRC_ALPHA 0x00000302 -#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV20TCL_BLEND_FUNC_SRC_DST_ALPHA 0x00000304 -#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV20TCL_BLEND_FUNC_SRC_DST_COLOR 0x00000306 -#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_COLOR 0x00000307 -#define NV20TCL_BLEND_FUNC_SRC_SRC_ALPHA_SATURATE 0x00000308 -#define NV20TCL_BLEND_FUNC_SRC_CONSTANT_COLOR 0x00008001 -#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV20TCL_BLEND_FUNC_SRC_CONSTANT_ALPHA 0x00008003 -#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV20TCL_BLEND_FUNC_DST 0x00000348 -#define NV20TCL_BLEND_FUNC_DST_ZERO 0x00000000 -#define NV20TCL_BLEND_FUNC_DST_ONE 0x00000001 -#define NV20TCL_BLEND_FUNC_DST_SRC_COLOR 0x00000300 -#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV20TCL_BLEND_FUNC_DST_SRC_ALPHA 0x00000302 -#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV20TCL_BLEND_FUNC_DST_DST_ALPHA 0x00000304 -#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV20TCL_BLEND_FUNC_DST_DST_COLOR 0x00000306 -#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_DST_COLOR 0x00000307 -#define NV20TCL_BLEND_FUNC_DST_SRC_ALPHA_SATURATE 0x00000308 -#define NV20TCL_BLEND_FUNC_DST_CONSTANT_COLOR 0x00008001 -#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV20TCL_BLEND_FUNC_DST_CONSTANT_ALPHA 0x00008003 -#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV20TCL_BLEND_COLOR 0x0000034c -#define NV20TCL_BLEND_COLOR_B_SHIFT 0 -#define NV20TCL_BLEND_COLOR_B_MASK 0x000000ff -#define NV20TCL_BLEND_COLOR_G_SHIFT 8 -#define NV20TCL_BLEND_COLOR_G_MASK 0x0000ff00 -#define NV20TCL_BLEND_COLOR_R_SHIFT 16 -#define NV20TCL_BLEND_COLOR_R_MASK 0x00ff0000 -#define NV20TCL_BLEND_COLOR_A_SHIFT 24 -#define NV20TCL_BLEND_COLOR_A_MASK 0xff000000 -#define NV20TCL_BLEND_EQUATION 0x00000350 -#define NV20TCL_BLEND_EQUATION_FUNC_ADD 0x00008006 -#define NV20TCL_BLEND_EQUATION_MIN 0x00008007 -#define NV20TCL_BLEND_EQUATION_MAX 0x00008008 -#define NV20TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a -#define NV20TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b -#define NV20TCL_DEPTH_FUNC 0x00000354 -#define NV20TCL_DEPTH_FUNC_NEVER 0x00000200 -#define NV20TCL_DEPTH_FUNC_LESS 0x00000201 -#define NV20TCL_DEPTH_FUNC_EQUAL 0x00000202 -#define NV20TCL_DEPTH_FUNC_LEQUAL 0x00000203 -#define NV20TCL_DEPTH_FUNC_GREATER 0x00000204 -#define NV20TCL_DEPTH_FUNC_GREATER 0x00000204 -#define NV20TCL_DEPTH_FUNC_NOTEQUAL 0x00000205 -#define NV20TCL_DEPTH_FUNC_GEQUAL 0x00000206 -#define NV20TCL_DEPTH_FUNC_ALWAYS 0x00000207 -#define NV20TCL_COLOR_MASK 0x00000358 -#define NV20TCL_COLOR_MASK_B (1 << 0) -#define NV20TCL_COLOR_MASK_G (1 << 8) -#define NV20TCL_COLOR_MASK_R (1 << 16) -#define NV20TCL_COLOR_MASK_A (1 << 24) -#define NV20TCL_DEPTH_WRITE_ENABLE 0x0000035c -#define NV20TCL_STENCIL_MASK 0x00000360 -#define NV20TCL_STENCIL_FUNC_FUNC 0x00000364 -#define NV20TCL_STENCIL_FUNC_FUNC_NEVER 0x00000200 -#define NV20TCL_STENCIL_FUNC_FUNC_LESS 0x00000201 -#define NV20TCL_STENCIL_FUNC_FUNC_EQUAL 0x00000202 -#define NV20TCL_STENCIL_FUNC_FUNC_LEQUAL 0x00000203 -#define NV20TCL_STENCIL_FUNC_FUNC_GREATER 0x00000204 -#define NV20TCL_STENCIL_FUNC_FUNC_GREATER 0x00000204 -#define NV20TCL_STENCIL_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV20TCL_STENCIL_FUNC_FUNC_GEQUAL 0x00000206 -#define NV20TCL_STENCIL_FUNC_FUNC_ALWAYS 0x00000207 -#define NV20TCL_STENCIL_FUNC_REF 0x00000368 -#define NV20TCL_STENCIL_FUNC_MASK 0x0000036c -#define NV20TCL_STENCIL_OP_FAIL 0x00000370 -#define NV20TCL_STENCIL_OP_FAIL_ZERO 0x00000000 -#define NV20TCL_STENCIL_OP_FAIL_INVERT 0x0000150a -#define NV20TCL_STENCIL_OP_FAIL_KEEP 0x00001e00 -#define NV20TCL_STENCIL_OP_FAIL_REPLACE 0x00001e01 -#define NV20TCL_STENCIL_OP_FAIL_INCR 0x00001e02 -#define NV20TCL_STENCIL_OP_FAIL_DECR 0x00001e03 -#define NV20TCL_STENCIL_OP_FAIL_INCR_WRAP 0x00008507 -#define NV20TCL_STENCIL_OP_FAIL_DECR_WRAP 0x00008508 -#define NV20TCL_STENCIL_OP_ZFAIL 0x00000374 -#define NV20TCL_STENCIL_OP_ZFAIL_ZERO 0x00000000 -#define NV20TCL_STENCIL_OP_ZFAIL_INVERT 0x0000150a -#define NV20TCL_STENCIL_OP_ZFAIL_KEEP 0x00001e00 -#define NV20TCL_STENCIL_OP_ZFAIL_REPLACE 0x00001e01 -#define NV20TCL_STENCIL_OP_ZFAIL_INCR 0x00001e02 -#define NV20TCL_STENCIL_OP_ZFAIL_DECR 0x00001e03 -#define NV20TCL_STENCIL_OP_ZFAIL_INCR_WRAP 0x00008507 -#define NV20TCL_STENCIL_OP_ZFAIL_DECR_WRAP 0x00008508 -#define NV20TCL_STENCIL_OP_ZPASS 0x00000378 -#define NV20TCL_STENCIL_OP_ZPASS_ZERO 0x00000000 -#define NV20TCL_STENCIL_OP_ZPASS_INVERT 0x0000150a -#define NV20TCL_STENCIL_OP_ZPASS_KEEP 0x00001e00 -#define NV20TCL_STENCIL_OP_ZPASS_REPLACE 0x00001e01 -#define NV20TCL_STENCIL_OP_ZPASS_INCR 0x00001e02 -#define NV20TCL_STENCIL_OP_ZPASS_DECR 0x00001e03 -#define NV20TCL_STENCIL_OP_ZPASS_INCR_WRAP 0x00008507 -#define NV20TCL_STENCIL_OP_ZPASS_DECR_WRAP 0x00008508 -#define NV20TCL_SHADE_MODEL 0x0000037c -#define NV20TCL_SHADE_MODEL_FLAT 0x00001d00 -#define NV20TCL_SHADE_MODEL_SMOOTH 0x00001d01 -#define NV20TCL_LINE_WIDTH 0x00000380 -#define NV20TCL_POLYGON_OFFSET_FACTOR 0x00000384 -#define NV20TCL_POLYGON_OFFSET_UNITS 0x00000388 -#define NV20TCL_POLYGON_MODE_FRONT 0x0000038c -#define NV20TCL_POLYGON_MODE_FRONT_POINT 0x00001b00 -#define NV20TCL_POLYGON_MODE_FRONT_LINE 0x00001b01 -#define NV20TCL_POLYGON_MODE_FRONT_FILL 0x00001b02 -#define NV20TCL_POLYGON_MODE_BACK 0x00000390 -#define NV20TCL_POLYGON_MODE_BACK_POINT 0x00001b00 -#define NV20TCL_POLYGON_MODE_BACK_LINE 0x00001b01 -#define NV20TCL_POLYGON_MODE_BACK_FILL 0x00001b02 -#define NV20TCL_DEPTH_RANGE_NEAR 0x00000394 -#define NV20TCL_DEPTH_RANGE_FAR 0x00000398 -#define NV20TCL_CULL_FACE 0x0000039c -#define NV20TCL_CULL_FACE_FRONT 0x00000404 -#define NV20TCL_CULL_FACE_BACK 0x00000405 -#define NV20TCL_CULL_FACE_FRONT_AND_BACK 0x00000408 -#define NV20TCL_FRONT_FACE 0x000003a0 -#define NV20TCL_FRONT_FACE_CW 0x00000900 -#define NV20TCL_FRONT_FACE_CCW 0x00000901 -#define NV20TCL_NORMALIZE_ENABLE 0x000003a4 -#define NV20TCL_COLOR_MATERIAL_FRONT_R 0x000003a8 -#define NV20TCL_COLOR_MATERIAL_FRONT_G 0x000003ac -#define NV20TCL_COLOR_MATERIAL_FRONT_B 0x000003b0 -#define NV20TCL_COLOR_MATERIAL_FRONT_A 0x000003b4 -#define NV20TCL_SEPARATE_SPECULAR_ENABLE 0x000003b8 -#define NV20TCL_ENABLED_LIGHTS 0x000003bc -#define NV20TCL_TX_GEN_S(x) (0x000003c0+((x)*16)) -#define NV20TCL_TX_GEN_S__SIZE 0x00000004 -#define NV20TCL_TX_GEN_S_FALSE 0x00000000 -#define NV20TCL_TX_GEN_S_EYE_LINEAR 0x00002400 -#define NV20TCL_TX_GEN_S_OBJECT_LINEAR 0x00002401 -#define NV20TCL_TX_GEN_S_SPHERE_MAP 0x00002402 -#define NV20TCL_TX_GEN_S_NORMAL_MAP 0x00008511 -#define NV20TCL_TX_GEN_S_REFLECTION_MAP 0x00008512 -#define NV20TCL_TX_GEN_T(x) (0x000003c4+((x)*16)) -#define NV20TCL_TX_GEN_T__SIZE 0x00000004 -#define NV20TCL_TX_GEN_T_FALSE 0x00000000 -#define NV20TCL_TX_GEN_T_EYE_LINEAR 0x00002400 -#define NV20TCL_TX_GEN_T_OBJECT_LINEAR 0x00002401 -#define NV20TCL_TX_GEN_T_SPHERE_MAP 0x00002402 -#define NV20TCL_TX_GEN_T_NORMAL_MAP 0x00008511 -#define NV20TCL_TX_GEN_T_REFLECTION_MAP 0x00008512 -#define NV20TCL_TX_GEN_R(x) (0x000003c8+((x)*16)) -#define NV20TCL_TX_GEN_R__SIZE 0x00000004 -#define NV20TCL_TX_GEN_R_FALSE 0x00000000 -#define NV20TCL_TX_GEN_R_EYE_LINEAR 0x00002400 -#define NV20TCL_TX_GEN_R_OBJECT_LINEAR 0x00002401 -#define NV20TCL_TX_GEN_R_SPHERE_MAP 0x00002402 -#define NV20TCL_TX_GEN_R_NORMAL_MAP 0x00008511 -#define NV20TCL_TX_GEN_R_REFLECTION_MAP 0x00008512 -#define NV20TCL_TX_GEN_Q(x) (0x000003cc+((x)*16)) -#define NV20TCL_TX_GEN_Q__SIZE 0x00000004 -#define NV20TCL_TX_GEN_Q_FALSE 0x00000000 -#define NV20TCL_TX_GEN_Q_EYE_LINEAR 0x00002400 -#define NV20TCL_TX_GEN_Q_OBJECT_LINEAR 0x00002401 -#define NV20TCL_TX_GEN_Q_SPHERE_MAP 0x00002402 -#define NV20TCL_TX_GEN_Q_NORMAL_MAP 0x00008511 -#define NV20TCL_TX_GEN_Q_REFLECTION_MAP 0x00008512 -#define NV20TCL_TX_MATRIX_ENABLE(x) (0x00000420+((x)*4)) -#define NV20TCL_TX_MATRIX_ENABLE__SIZE 0x00000004 -#define NV20TCL_POINT_SIZE 0x0000043c -#define NV20TCL_MODELVIEW0_MATRIX(x) (0x00000480+((x)*4)) -#define NV20TCL_MODELVIEW0_MATRIX__SIZE 0x00000010 -#define NV20TCL_MODELVIEW1_MATRIX(x) (0x000004c0+((x)*4)) -#define NV20TCL_MODELVIEW1_MATRIX__SIZE 0x00000010 -#define NV20TCL_MODELVIEW2_MATRIX(x) (0x00000500+((x)*4)) -#define NV20TCL_MODELVIEW2_MATRIX__SIZE 0x00000010 -#define NV20TCL_MODELVIEW3_MATRIX(x) (0x00000540+((x)*4)) -#define NV20TCL_MODELVIEW3_MATRIX__SIZE 0x00000010 -#define NV20TCL_INVERSE_MODELVIEW0_MATRIX(x) (0x00000580+((x)*4)) -#define NV20TCL_INVERSE_MODELVIEW0_MATRIX__SIZE 0x00000010 -#define NV20TCL_INVERSE_MODELVIEW1_MATRIX(x) (0x000005c0+((x)*4)) -#define NV20TCL_INVERSE_MODELVIEW1_MATRIX__SIZE 0x00000010 -#define NV20TCL_INVERSE_MODELVIEW2_MATRIX(x) (0x00000600+((x)*4)) -#define NV20TCL_INVERSE_MODELVIEW2_MATRIX__SIZE 0x00000010 -#define NV20TCL_INVERSE_MODELVIEW3_MATRIX(x) (0x00000640+((x)*4)) -#define NV20TCL_INVERSE_MODELVIEW3_MATRIX__SIZE 0x00000010 -#define NV20TCL_PROJECTION_MATRIX(x) (0x00000680+((x)*4)) -#define NV20TCL_PROJECTION_MATRIX__SIZE 0x00000010 -#define NV20TCL_TX0_MATRIX(x) (0x000006c0+((x)*4)) -#define NV20TCL_TX0_MATRIX__SIZE 0x00000010 -#define NV20TCL_TX1_MATRIX(x) (0x00000700+((x)*4)) -#define NV20TCL_TX1_MATRIX__SIZE 0x00000010 -#define NV20TCL_TX2_MATRIX(x) (0x00000740+((x)*4)) -#define NV20TCL_TX2_MATRIX__SIZE 0x00000010 -#define NV20TCL_TX3_MATRIX(x) (0x00000780+((x)*4)) -#define NV20TCL_TX3_MATRIX__SIZE 0x00000010 -#define NV20TCL_TX0_CLIP_PLANE_A(x) (0x00000840+((x)*16)) -#define NV20TCL_TX0_CLIP_PLANE_A__SIZE 0x00000004 -#define NV20TCL_TX0_CLIP_PLANE_B(x) (0x00000844+((x)*16)) -#define NV20TCL_TX0_CLIP_PLANE_B__SIZE 0x00000004 -#define NV20TCL_TX0_CLIP_PLANE_C(x) (0x00000848+((x)*16)) -#define NV20TCL_TX0_CLIP_PLANE_C__SIZE 0x00000004 -#define NV20TCL_TX0_CLIP_PLANE_D(x) (0x0000084c+((x)*16)) -#define NV20TCL_TX0_CLIP_PLANE_D__SIZE 0x00000004 -#define NV20TCL_TX1_CLIP_PLANE_A(x) (0x00000880+((x)*16)) -#define NV20TCL_TX1_CLIP_PLANE_A__SIZE 0x00000004 -#define NV20TCL_TX1_CLIP_PLANE_B(x) (0x00000884+((x)*16)) -#define NV20TCL_TX1_CLIP_PLANE_B__SIZE 0x00000004 -#define NV20TCL_TX1_CLIP_PLANE_C(x) (0x00000888+((x)*16)) -#define NV20TCL_TX1_CLIP_PLANE_C__SIZE 0x00000004 -#define NV20TCL_TX1_CLIP_PLANE_D(x) (0x0000088c+((x)*16)) -#define NV20TCL_TX1_CLIP_PLANE_D__SIZE 0x00000004 -#define NV20TCL_TX2_CLIP_PLANE_A(x) (0x000008c0+((x)*16)) -#define NV20TCL_TX2_CLIP_PLANE_A__SIZE 0x00000004 -#define NV20TCL_TX2_CLIP_PLANE_B(x) (0x000008c4+((x)*16)) -#define NV20TCL_TX2_CLIP_PLANE_B__SIZE 0x00000004 -#define NV20TCL_TX2_CLIP_PLANE_C(x) (0x000008c8+((x)*16)) -#define NV20TCL_TX2_CLIP_PLANE_C__SIZE 0x00000004 -#define NV20TCL_TX2_CLIP_PLANE_D(x) (0x000008cc+((x)*16)) -#define NV20TCL_TX2_CLIP_PLANE_D__SIZE 0x00000004 -#define NV20TCL_TX3_CLIP_PLANE_A(x) (0x00000900+((x)*16)) -#define NV20TCL_TX3_CLIP_PLANE_A__SIZE 0x00000004 -#define NV20TCL_TX3_CLIP_PLANE_B(x) (0x00000904+((x)*16)) -#define NV20TCL_TX3_CLIP_PLANE_B__SIZE 0x00000004 -#define NV20TCL_TX3_CLIP_PLANE_C(x) (0x00000908+((x)*16)) -#define NV20TCL_TX3_CLIP_PLANE_C__SIZE 0x00000004 -#define NV20TCL_TX3_CLIP_PLANE_D(x) (0x0000090c+((x)*16)) -#define NV20TCL_TX3_CLIP_PLANE_D__SIZE 0x00000004 -#define NV20TCL_FOG_EQUATION_CONSTANT 0x000009c0 -#define NV20TCL_FOG_EQUATION_LINEAR 0x000009c4 -#define NV20TCL_FOG_EQUATION_QUADRATIC 0x000009c8 -#define NV20TCL_FRONT_MATERIAL_SHININESS(x) (0x000009e0+((x)*4)) -#define NV20TCL_FRONT_MATERIAL_SHININESS__SIZE 0x00000006 -#define NV20TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x00000a10 -#define NV20TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x00000a14 -#define NV20TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x00000a18 -#define NV20TCL_VIEWPORT_SCALE0_X 0x00000a20 -#define NV20TCL_VIEWPORT_SCALE0_Y 0x00000a24 -#define NV20TCL_VIEWPORT_SCALE0_Z 0x00000a28 -#define NV20TCL_VIEWPORT_SCALE0_W 0x00000a2c -#define NV20TCL_POINT_PARAMETER(x) (0x00000a30+((x)*4)) -#define NV20TCL_POINT_PARAMETER__SIZE 0x00000008 -#define NV20TCL_RC_CONSTANT_COLOR0(x) (0x00000a60+((x)*4)) -#define NV20TCL_RC_CONSTANT_COLOR0__SIZE 0x00000008 -#define NV20TCL_RC_CONSTANT_COLOR0_B_SHIFT 0 -#define NV20TCL_RC_CONSTANT_COLOR0_B_MASK 0x000000ff -#define NV20TCL_RC_CONSTANT_COLOR0_G_SHIFT 8 -#define NV20TCL_RC_CONSTANT_COLOR0_G_MASK 0x0000ff00 -#define NV20TCL_RC_CONSTANT_COLOR0_R_SHIFT 16 -#define NV20TCL_RC_CONSTANT_COLOR0_R_MASK 0x00ff0000 -#define NV20TCL_RC_CONSTANT_COLOR0_A_SHIFT 24 -#define NV20TCL_RC_CONSTANT_COLOR0_A_MASK 0xff000000 -#define NV20TCL_RC_CONSTANT_COLOR1(x) (0x00000a80+((x)*4)) -#define NV20TCL_RC_CONSTANT_COLOR1__SIZE 0x00000008 -#define NV20TCL_RC_CONSTANT_COLOR1_B_SHIFT 0 -#define NV20TCL_RC_CONSTANT_COLOR1_B_MASK 0x000000ff -#define NV20TCL_RC_CONSTANT_COLOR1_G_SHIFT 8 -#define NV20TCL_RC_CONSTANT_COLOR1_G_MASK 0x0000ff00 -#define NV20TCL_RC_CONSTANT_COLOR1_R_SHIFT 16 -#define NV20TCL_RC_CONSTANT_COLOR1_R_MASK 0x00ff0000 -#define NV20TCL_RC_CONSTANT_COLOR1_A_SHIFT 24 -#define NV20TCL_RC_CONSTANT_COLOR1_A_MASK 0xff000000 -#define NV20TCL_RC_OUT_ALPHA(x) (0x00000aa0+((x)*4)) -#define NV20TCL_RC_OUT_ALPHA__SIZE 0x00000008 -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT 0 -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK 0x0000000f -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO 0x00000000 -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG 0x00000003 -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0_ARB 0x00000008 -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1_ARB 0x00000009 -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_NV 0x0000000c -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1_NV 0x0000000d -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F_NV 0x0000000f -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT 4 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK 0x000000f0 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO 0x00000000 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG 0x00000030 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0_ARB 0x00000080 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1_ARB 0x00000090 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_NV 0x000000c0 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1_NV 0x000000d0 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0 -#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F_NV 0x000000f0 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT 8 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK 0x00000f00 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO 0x00000000 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG 0x00000300 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0_ARB 0x00000800 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1_ARB 0x00000900 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_NV 0x00000c00 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1_NV 0x00000d00 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00 -#define NV20TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT (1 << 12) -#define NV20TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT (1 << 13) -#define NV20TCL_RC_OUT_ALPHA_MUX_SUM (1 << 14) -#define NV20TCL_RC_OUT_ALPHA_BIAS (1 << 15) -#define NV20TCL_RC_OUT_ALPHA_BIAS_NONE 0x00000000 -#define NV20TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000 -#define NV20TCL_RC_OUT_ALPHA_SCALE_SHIFT 17 -#define NV20TCL_RC_OUT_ALPHA_SCALE_MASK 0x00000000 -#define NV20TCL_RC_OUT_ALPHA_SCALE_NONE 0x00000000 -#define NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO_NV 0x00020000 -#define NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR_NV 0x00040000 -#define NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000 -#define NV20TCL_RC_IN_RGB(x) (0x00000ac0+((x)*4)) -#define NV20TCL_RC_IN_RGB__SIZE 0x00000008 -#define NV20TCL_RC_IN_RGB_D_INPUT_SHIFT 0 -#define NV20TCL_RC_IN_RGB_D_INPUT_MASK 0x0000000f -#define NV20TCL_RC_IN_RGB_D_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV20TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV20TCL_RC_IN_RGB_D_INPUT_FOG 0x00000003 -#define NV20TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV20TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV20TCL_RC_IN_RGB_D_INPUT_TEXTURE0_ARB 0x00000008 -#define NV20TCL_RC_IN_RGB_D_INPUT_TEXTURE1_ARB 0x00000009 -#define NV20TCL_RC_IN_RGB_D_INPUT_SPARE0_NV 0x0000000c -#define NV20TCL_RC_IN_RGB_D_INPUT_SPARE1_NV 0x0000000d -#define NV20TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV20TCL_RC_IN_RGB_D_INPUT_E_TIMES_F_NV 0x0000000f -#define NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE (1 << 4) -#define NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA 0x00000010 -#define NV20TCL_RC_IN_RGB_D_MAPPING_SHIFT 5 -#define NV20TCL_RC_IN_RGB_D_MAPPING_MASK 0x000000e0 -#define NV20TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020 -#define NV20TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL_NV 0x00000040 -#define NV20TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE_NV 0x00000060 -#define NV20TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080 -#define NV20TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0 -#define NV20TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0 -#define NV20TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0 -#define NV20TCL_RC_IN_RGB_C_INPUT_SHIFT 8 -#define NV20TCL_RC_IN_RGB_C_INPUT_MASK 0x00000f00 -#define NV20TCL_RC_IN_RGB_C_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV20TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV20TCL_RC_IN_RGB_C_INPUT_FOG 0x00000300 -#define NV20TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV20TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV20TCL_RC_IN_RGB_C_INPUT_TEXTURE0_ARB 0x00000800 -#define NV20TCL_RC_IN_RGB_C_INPUT_TEXTURE1_ARB 0x00000900 -#define NV20TCL_RC_IN_RGB_C_INPUT_SPARE0_NV 0x00000c00 -#define NV20TCL_RC_IN_RGB_C_INPUT_SPARE1_NV 0x00000d00 -#define NV20TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV20TCL_RC_IN_RGB_C_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE (1 << 12) -#define NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV20TCL_RC_IN_RGB_C_MAPPING_SHIFT 13 -#define NV20TCL_RC_IN_RGB_C_MAPPING_MASK 0x0000e000 -#define NV20TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV20TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV20TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV20TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV20TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV20TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV20TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV20TCL_RC_IN_RGB_B_INPUT_SHIFT 16 -#define NV20TCL_RC_IN_RGB_B_INPUT_MASK 0x000f0000 -#define NV20TCL_RC_IN_RGB_B_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV20TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV20TCL_RC_IN_RGB_B_INPUT_FOG 0x00030000 -#define NV20TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV20TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV20TCL_RC_IN_RGB_B_INPUT_TEXTURE0_ARB 0x00080000 -#define NV20TCL_RC_IN_RGB_B_INPUT_TEXTURE1_ARB 0x00090000 -#define NV20TCL_RC_IN_RGB_B_INPUT_SPARE0_NV 0x000c0000 -#define NV20TCL_RC_IN_RGB_B_INPUT_SPARE1_NV 0x000d0000 -#define NV20TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV20TCL_RC_IN_RGB_B_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE (1 << 20) -#define NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV20TCL_RC_IN_RGB_B_MAPPING_SHIFT 21 -#define NV20TCL_RC_IN_RGB_B_MAPPING_MASK 0x00e00000 -#define NV20TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV20TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV20TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV20TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV20TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV20TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV20TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV20TCL_RC_IN_RGB_A_INPUT_SHIFT 24 -#define NV20TCL_RC_IN_RGB_A_INPUT_MASK 0x0f000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_ZERO 0x00000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_FOG 0x03000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_TEXTURE0_ARB 0x08000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_TEXTURE1_ARB 0x09000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_SPARE0_NV 0x0c000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_SPARE1_NV 0x0d000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV20TCL_RC_IN_RGB_A_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE (1 << 28) -#define NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB 0x00000000 -#define NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV20TCL_RC_IN_RGB_A_MAPPING_SHIFT 29 -#define NV20TCL_RC_IN_RGB_A_MAPPING_MASK 0xe0000000 -#define NV20TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV20TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV20TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV20TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV20TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV20TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV20TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV20TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV20TCL_VIEWPORT_SCALE1_X 0x00000af0 -#define NV20TCL_VIEWPORT_SCALE1_Y 0x00000af4 -#define NV20TCL_VIEWPORT_SCALE1_Z 0x00000af8 -#define NV20TCL_VIEWPORT_SCALE1_W 0x00000afc -#define NV20TCL_VP_UPLOAD_INST(x) (0x00000b00+((x)*4)) -#define NV20TCL_VP_UPLOAD_INST__SIZE 0x00000004 -#define NV20TCL_VP_UPLOAD_CONST(x) (0x00000b80+((x)*4)) -#define NV20TCL_VP_UPLOAD_CONST__SIZE 0x00000004 -#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_R(x) (0x00000c00+((x)*64)) -#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_R__SIZE 0x00000008 -#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_G(x) (0x00000c04+((x)*64)) -#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_G__SIZE 0x00000008 -#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_B(x) (0x00000c08+((x)*64)) -#define NV20TCL_LIGHT_BACK_SIDE_PRODUCT_AMBIENT_B__SIZE 0x00000008 -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(x) (0x00001000+((x)*128)) -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R__SIZE 0x00000008 -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(x) (0x00001004+((x)*128)) -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G__SIZE 0x00000008 -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(x) (0x00001008+((x)*128)) -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B__SIZE 0x00000008 -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(x) (0x0000100c+((x)*128)) -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R__SIZE 0x00000008 -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(x) (0x00001010+((x)*128)) -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G__SIZE 0x00000008 -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(x) (0x00001014+((x)*128)) -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B__SIZE 0x00000008 -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(x) (0x00001018+((x)*128)) -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R__SIZE 0x00000008 -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(x) (0x0000101c+((x)*128)) -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G__SIZE 0x00000008 -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(x) (0x00001020+((x)*128)) -#define NV20TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B__SIZE 0x00000008 -#define NV20TCL_LIGHT_HALF_VECTOR_X(x) (0x00001028+((x)*128)) -#define NV20TCL_LIGHT_HALF_VECTOR_X__SIZE 0x00000008 -#define NV20TCL_LIGHT_HALF_VECTOR_Y(x) (0x0000102c+((x)*128)) -#define NV20TCL_LIGHT_HALF_VECTOR_Y__SIZE 0x00000008 -#define NV20TCL_LIGHT_HALF_VECTOR_Z(x) (0x00001030+((x)*128)) -#define NV20TCL_LIGHT_HALF_VECTOR_Z__SIZE 0x00000008 -#define NV20TCL_LIGHT_DIRECTION_X(x) (0x00001034+((x)*128)) -#define NV20TCL_LIGHT_DIRECTION_X__SIZE 0x00000008 -#define NV20TCL_LIGHT_DIRECTION_Y(x) (0x00001038+((x)*128)) -#define NV20TCL_LIGHT_DIRECTION_Y__SIZE 0x00000008 -#define NV20TCL_LIGHT_DIRECTION_Z(x) (0x0000103c+((x)*128)) -#define NV20TCL_LIGHT_DIRECTION_Z__SIZE 0x00000008 -#define NV20TCL_LIGHT_POSITION_X(x) (0x0000105c+((x)*128)) -#define NV20TCL_LIGHT_POSITION_X__SIZE 0x00000008 -#define NV20TCL_LIGHT_POSITION_Y(x) (0x00001060+((x)*128)) -#define NV20TCL_LIGHT_POSITION_Y__SIZE 0x00000008 -#define NV20TCL_LIGHT_POSITION_Z(x) (0x00001064+((x)*128)) -#define NV20TCL_LIGHT_POSITION_Z__SIZE 0x00000008 -#define NV20TCL_LIGHT_CONSTANT_ATTENUATION(x) (0x00001068+((x)*128)) -#define NV20TCL_LIGHT_CONSTANT_ATTENUATION__SIZE 0x00000008 -#define NV20TCL_LIGHT_LINEAR_ATTENUATION(x) (0x0000106c+((x)*128)) -#define NV20TCL_LIGHT_LINEAR_ATTENUATION__SIZE 0x00000008 -#define NV20TCL_LIGHT_QUADRATIC_ATTENUATION(x) (0x00001070+((x)*128)) -#define NV20TCL_LIGHT_QUADRATIC_ATTENUATION__SIZE 0x00000008 -#define NV20TCL_POLYGON_STIPPLE_ENABLE 0x0000147c -#define NV20TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4)) -#define NV20TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020 -#define NV20TCL_VERTEX_POS_3F_X 0x00001500 -#define NV20TCL_VERTEX_POS_3F_Y 0x00001504 -#define NV20TCL_VERTEX_POS_3F_Z 0x00001508 -#define NV20TCL_VERTEX_POS_4F_X 0x00001518 -#define NV20TCL_VERTEX_POS_4F_Y 0x0000151c -#define NV20TCL_VERTEX_POS_4F_Z 0x00001520 -#define NV20TCL_VERTEX_POS_3I_XY 0x00001528 -#define NV20TCL_VERTEX_POS_3I_XY_X_SHIFT 0 -#define NV20TCL_VERTEX_POS_3I_XY_X_MASK 0x0000ffff -#define NV20TCL_VERTEX_POS_3I_XY_Y_SHIFT 16 -#define NV20TCL_VERTEX_POS_3I_XY_Y_MASK 0xffff0000 -#define NV20TCL_VERTEX_POS_3I_Z 0x0000152c -#define NV20TCL_VERTEX_POS_3I_Z_Z_SHIFT 0 -#define NV20TCL_VERTEX_POS_3I_Z_Z_MASK 0x0000ffff -#define NV20TCL_VERTEX_NOR_3F_X 0x00001530 -#define NV20TCL_VERTEX_NOR_3F_Y 0x00001534 -#define NV20TCL_VERTEX_NOR_3F_Z 0x00001538 -#define NV20TCL_VERTEX_NOR_3I_XY 0x00001540 -#define NV20TCL_VERTEX_NOR_3I_XY_X_SHIFT 0 -#define NV20TCL_VERTEX_NOR_3I_XY_X_MASK 0x0000ffff -#define NV20TCL_VERTEX_NOR_3I_XY_Y_SHIFT 16 -#define NV20TCL_VERTEX_NOR_3I_XY_Y_MASK 0xffff0000 -#define NV20TCL_VERTEX_NOR_3I_Z 0x00001544 -#define NV20TCL_VERTEX_NOR_3I_Z_Z_SHIFT 0 -#define NV20TCL_VERTEX_NOR_3I_Z_Z_MASK 0x0000ffff -#define NV20TCL_VERTEX_COL_4F_X 0x00001550 -#define NV20TCL_VERTEX_COL_4F_Y 0x00001554 -#define NV20TCL_VERTEX_COL_4F_Z 0x00001558 -#define NV20TCL_VERTEX_COL_4F_W 0x0000155c -#define NV20TCL_VERTEX_COL_3F_X 0x00001560 -#define NV20TCL_VERTEX_COL_3F_Y 0x00001564 -#define NV20TCL_VERTEX_COL_3F_Z 0x00001568 -#define NV20TCL_VERTEX_COL_4I 0x0000156c -#define NV20TCL_VERTEX_COL_4I_R_SHIFT 0 -#define NV20TCL_VERTEX_COL_4I_R_MASK 0x000000ff -#define NV20TCL_VERTEX_COL_4I_G_SHIFT 8 -#define NV20TCL_VERTEX_COL_4I_G_MASK 0x0000ff00 -#define NV20TCL_VERTEX_COL_4I_B_SHIFT 16 -#define NV20TCL_VERTEX_COL_4I_B_MASK 0x00ff0000 -#define NV20TCL_VERTEX_COL_4I_A_SHIFT 24 -#define NV20TCL_VERTEX_COL_4I_A_MASK 0xff000000 -#define NV20TCL_VERTEX_COL2_3F_X 0x00001580 -#define NV20TCL_VERTEX_COL2_3F_Y 0x00001584 -#define NV20TCL_VERTEX_COL2_3F_Z 0x00001588 -#define NV20TCL_VERTEX_COL2_4I 0x0000158c -#define NV20TCL_VERTEX_COL2_4I_R_SHIFT 0 -#define NV20TCL_VERTEX_COL2_4I_R_MASK 0x000000ff -#define NV20TCL_VERTEX_COL2_4I_G_SHIFT 8 -#define NV20TCL_VERTEX_COL2_4I_G_MASK 0x0000ff00 -#define NV20TCL_VERTEX_COL2_4I_B_SHIFT 16 -#define NV20TCL_VERTEX_COL2_4I_B_MASK 0x00ff0000 -#define NV20TCL_VERTEX_COL2_4I_A_SHIFT 24 -#define NV20TCL_VERTEX_COL2_4I_A_MASK 0xff000000 -#define NV20TCL_VERTEX_TX0_2F_S 0x00001590 -#define NV20TCL_VERTEX_TX0_2F_T 0x00001594 -#define NV20TCL_VERTEX_TX0_2I 0x00001598 -#define NV20TCL_VERTEX_TX0_2I_S_SHIFT 0 -#define NV20TCL_VERTEX_TX0_2I_S_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX0_2I_T_SHIFT 16 -#define NV20TCL_VERTEX_TX0_2I_T_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX0_4F_S 0x000015a0 -#define NV20TCL_VERTEX_TX0_4F_T 0x000015a4 -#define NV20TCL_VERTEX_TX0_4F_R 0x000015a8 -#define NV20TCL_VERTEX_TX0_4F_Q 0x000015ac -#define NV20TCL_VERTEX_TX0_4I_ST 0x000015b0 -#define NV20TCL_VERTEX_TX0_4I_ST_S_SHIFT 0 -#define NV20TCL_VERTEX_TX0_4I_ST_S_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX0_4I_ST_T_SHIFT 16 -#define NV20TCL_VERTEX_TX0_4I_ST_T_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX0_4I_RQ 0x000015b4 -#define NV20TCL_VERTEX_TX0_4I_RQ_R_SHIFT 0 -#define NV20TCL_VERTEX_TX0_4I_RQ_R_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX0_4I_RQ_Q_SHIFT 16 -#define NV20TCL_VERTEX_TX0_4I_RQ_Q_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX1_2F_S 0x000015b8 -#define NV20TCL_VERTEX_TX1_2F_T 0x000015bc -#define NV20TCL_VERTEX_TX1_2I 0x000015c0 -#define NV20TCL_VERTEX_TX1_2I_S_SHIFT 0 -#define NV20TCL_VERTEX_TX1_2I_S_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX1_2I_T_SHIFT 16 -#define NV20TCL_VERTEX_TX1_2I_T_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX1_4F_S 0x000015c8 -#define NV20TCL_VERTEX_TX1_4F_T 0x000015cc -#define NV20TCL_VERTEX_TX1_4F_R 0x000015d0 -#define NV20TCL_VERTEX_TX1_4F_Q 0x000015d4 -#define NV20TCL_VERTEX_TX1_4I_ST 0x000015d8 -#define NV20TCL_VERTEX_TX1_4I_ST_S_SHIFT 0 -#define NV20TCL_VERTEX_TX1_4I_ST_S_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX1_4I_ST_T_SHIFT 16 -#define NV20TCL_VERTEX_TX1_4I_ST_T_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX1_4I_RQ 0x000015dc -#define NV20TCL_VERTEX_TX1_4I_RQ_R_SHIFT 0 -#define NV20TCL_VERTEX_TX1_4I_RQ_R_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX1_4I_RQ_Q_SHIFT 16 -#define NV20TCL_VERTEX_TX1_4I_RQ_Q_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX2_2F_S 0x000015e0 -#define NV20TCL_VERTEX_TX2_2F_T 0x000015e4 -#define NV20TCL_VERTEX_TX2_2I 0x000015e8 -#define NV20TCL_VERTEX_TX2_2I_S_SHIFT 0 -#define NV20TCL_VERTEX_TX2_2I_S_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX2_2I_T_SHIFT 16 -#define NV20TCL_VERTEX_TX2_2I_T_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX2_4F_S 0x000015f0 -#define NV20TCL_VERTEX_TX2_4F_T 0x000015f4 -#define NV20TCL_VERTEX_TX2_4F_R 0x000015f8 -#define NV20TCL_VERTEX_TX2_4F_Q 0x000015fc -#define NV20TCL_VERTEX_TX2_4I_ST 0x00001600 -#define NV20TCL_VERTEX_TX2_4I_ST_S_SHIFT 0 -#define NV20TCL_VERTEX_TX2_4I_ST_S_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX2_4I_ST_T_SHIFT 16 -#define NV20TCL_VERTEX_TX2_4I_ST_T_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX2_4I_RQ 0x00001604 -#define NV20TCL_VERTEX_TX2_4I_RQ_R_SHIFT 0 -#define NV20TCL_VERTEX_TX2_4I_RQ_R_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX2_4I_RQ_Q_SHIFT 16 -#define NV20TCL_VERTEX_TX2_4I_RQ_Q_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX3_2F_S 0x00001608 -#define NV20TCL_VERTEX_TX3_2F_T 0x0000160c -#define NV20TCL_VERTEX_TX3_2I 0x00001610 -#define NV20TCL_VERTEX_TX3_2I_S_SHIFT 0 -#define NV20TCL_VERTEX_TX3_2I_S_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX3_2I_T_SHIFT 16 -#define NV20TCL_VERTEX_TX3_2I_T_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX3_4F_S 0x00001620 -#define NV20TCL_VERTEX_TX3_4F_T 0x00001624 -#define NV20TCL_VERTEX_TX3_4F_R 0x00001628 -#define NV20TCL_VERTEX_TX3_4F_Q 0x0000162c -#define NV20TCL_VERTEX_TX3_4I_ST 0x00001630 -#define NV20TCL_VERTEX_TX3_4I_ST_S_SHIFT 0 -#define NV20TCL_VERTEX_TX3_4I_ST_S_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX3_4I_ST_T_SHIFT 16 -#define NV20TCL_VERTEX_TX3_4I_ST_T_MASK 0xffff0000 -#define NV20TCL_VERTEX_TX3_4I_RQ 0x00001634 -#define NV20TCL_VERTEX_TX3_4I_RQ_R_SHIFT 0 -#define NV20TCL_VERTEX_TX3_4I_RQ_R_MASK 0x0000ffff -#define NV20TCL_VERTEX_TX3_4I_RQ_Q_SHIFT 16 -#define NV20TCL_VERTEX_TX3_4I_RQ_Q_MASK 0xffff0000 -#define NV20TCL_VERTEX_FOG_1F 0x00001698 -#define NV20TCL_EDGEFLAG_ENABLE 0x000016bc -#define NV20TCL_VTXBUF_ADDRESS(x) (0x00001720+((x)*4)) -#define NV20TCL_VTXBUF_ADDRESS__SIZE 0x00000010 -#define NV20TCL_VTXBUF_ADDRESS_DMA1 (1 << 31) -#define NV20TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0 -#define NV20TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff -#define NV20TCL_VTXFMT(x) (0x00001760+((x)*4)) -#define NV20TCL_VTXFMT__SIZE 0x00000010 -#define NV20TCL_VTXFMT_TYPE_SHIFT 0 -#define NV20TCL_VTXFMT_TYPE_MASK 0x0000000f -#define NV20TCL_VTXFMT_TYPE_FLOAT 0x00000002 -#define NV20TCL_VTXFMT_TYPE_UBYTE 0x00000004 -#define NV20TCL_VTXFMT_TYPE_USHORT 0x00000005 -#define NV20TCL_VTXFMT_SIZE_SHIFT 4 -#define NV20TCL_VTXFMT_SIZE_MASK 0x000000f0 -#define NV20TCL_VTXFMT_STRIDE_SHIFT 8 -#define NV20TCL_VTXFMT_STRIDE_MASK 0x0000ff00 -#define NV20TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x000017a0 -#define NV20TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x000017a4 -#define NV20TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x000017a8 -#define NV20TCL_COLOR_MATERIAL_BACK_A 0x000017ac -#define NV20TCL_COLOR_MATERIAL_BACK_R 0x000017b0 -#define NV20TCL_COLOR_MATERIAL_BACK_G 0x000017b4 -#define NV20TCL_COLOR_MATERIAL_BACK_B 0x000017b8 -#define NV20TCL_COLOR_LOGIC_OP_ENABLE 0x000017bc -#define NV20TCL_COLOR_LOGIC_OP_OP 0x000017c0 -#define NV20TCL_COLOR_LOGIC_OP_OP_CLEAR 0x00001500 -#define NV20TCL_COLOR_LOGIC_OP_OP_AND 0x00001501 -#define NV20TCL_COLOR_LOGIC_OP_OP_AND_REVERSE 0x00001502 -#define NV20TCL_COLOR_LOGIC_OP_OP_COPY 0x00001503 -#define NV20TCL_COLOR_LOGIC_OP_OP_AND_INVERTED 0x00001504 -#define NV20TCL_COLOR_LOGIC_OP_OP_NOOP 0x00001505 -#define NV20TCL_COLOR_LOGIC_OP_OP_XOR 0x00001506 -#define NV20TCL_COLOR_LOGIC_OP_OP_OR 0x00001507 -#define NV20TCL_COLOR_LOGIC_OP_OP_NOR 0x00001508 -#define NV20TCL_COLOR_LOGIC_OP_OP_EQUIV 0x00001509 -#define NV20TCL_COLOR_LOGIC_OP_OP_INVERT 0x0000150a -#define NV20TCL_COLOR_LOGIC_OP_OP_OR_REVERSE 0x0000150b -#define NV20TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED 0x0000150c -#define NV20TCL_COLOR_LOGIC_OP_OP_OR_INVERTED 0x0000150d -#define NV20TCL_COLOR_LOGIC_OP_OP_NAND 0x0000150e -#define NV20TCL_COLOR_LOGIC_OP_OP_SET 0x0000150f -#define NV20TCL_LIGHT_MODEL_TWO_SIDE_ENABLE 0x000017c4 -#define NV20TCL_TX_SHADER_CULL_MODE 0x000017f8 -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_S (1 << 0) -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_S_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_S_LESS 0x00000001 -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_T (1 << 1) -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_T_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_T_LESS 0x00000002 -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_R (1 << 2) -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_R_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_R_LESS 0x00000004 -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_Q (1 << 3) -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_Q_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX0_Q_LESS 0x00000008 -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_S (1 << 4) -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_S_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_S_LESS 0x00000010 -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_T (1 << 5) -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_T_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_T_LESS 0x00000020 -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_R (1 << 6) -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_R_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_R_LESS 0x00000040 -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_Q (1 << 7) -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_Q_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX1_Q_LESS 0x00000080 -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_S (1 << 8) -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_S_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_S_LESS 0x00000100 -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_T (1 << 9) -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_T_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_T_LESS 0x00000200 -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_R (1 << 10) -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_R_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_R_LESS 0x00000400 -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_Q (1 << 11) -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_Q_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX2_Q_LESS 0x00000800 -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_S (1 << 12) -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_S_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_S_LESS 0x00001000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_T (1 << 13) -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_T_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_T_LESS 0x00002000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_R (1 << 14) -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_R_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_R_LESS 0x00004000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_Q (1 << 15) -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_Q_GEQUAL 0x00000000 -#define NV20TCL_TX_SHADER_CULL_MODE_TX3_Q_LESS 0x00008000 -#define NV20TCL_VERTEX_BEGIN_END 0x000017fc -#define NV20TCL_VERTEX_BEGIN_END_STOP 0x00000000 -#define NV20TCL_VERTEX_BEGIN_END_POINTS 0x00000001 -#define NV20TCL_VERTEX_BEGIN_END_LINES 0x00000002 -#define NV20TCL_VERTEX_BEGIN_END_LINE_LOOP 0x00000003 -#define NV20TCL_VERTEX_BEGIN_END_LINE_STRIP 0x00000004 -#define NV20TCL_VERTEX_BEGIN_END_TRIANGLES 0x00000005 -#define NV20TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP 0x00000006 -#define NV20TCL_VERTEX_BEGIN_END_TRIANGLE_FAN 0x00000007 -#define NV20TCL_VERTEX_BEGIN_END_QUADS 0x00000008 -#define NV20TCL_VERTEX_BEGIN_END_QUAD_STRIP 0x00000009 -#define NV20TCL_VERTEX_BEGIN_END_POLYGON 0x0000000a -#define NV20TCL_VB_ELEMENT_U16 0x00001800 -#define NV20TCL_VB_ELEMENT_U16_I0_SHIFT 0 -#define NV20TCL_VB_ELEMENT_U16_I0_MASK 0x0000ffff -#define NV20TCL_VB_ELEMENT_U16_I1_SHIFT 16 -#define NV20TCL_VB_ELEMENT_U16_I1_MASK 0xffff0000 -#define NV20TCL_VB_VERTEX_BATCH 0x00001810 -#define NV20TCL_VB_VERTEX_BATCH_OFFSET_SHIFT 0 -#define NV20TCL_VB_VERTEX_BATCH_OFFSET_MASK 0x00ffffff -#define NV20TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24 -#define NV20TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000 -#define NV20TCL_VERTEX_DATA 0x00001818 -#define NV20TCL_TX_SHADER_CONST_EYE_X 0x0000181c -#define NV20TCL_TX_SHADER_CONST_EYE_Y 0x00001820 -#define NV20TCL_TX_SHADER_CONST_EYE_Z 0x00001824 -#define NV20TCL_VTX_ATTR_4F_X(x) (0x00001a00+((x)*16)) -#define NV20TCL_VTX_ATTR_4F_X__SIZE 0x00000010 -#define NV20TCL_VTX_ATTR_4F_Y(x) (0x00001a04+((x)*16)) -#define NV20TCL_VTX_ATTR_4F_Y__SIZE 0x00000010 -#define NV20TCL_VTX_ATTR_4F_Z(x) (0x00001a08+((x)*16)) -#define NV20TCL_VTX_ATTR_4F_Z__SIZE 0x00000010 -#define NV20TCL_VTX_ATTR_4F_W(x) (0x00001a0c+((x)*16)) -#define NV20TCL_VTX_ATTR_4F_W__SIZE 0x00000010 -#define NV20TCL_TX_OFFSET(x) (0x00001b00+((x)*64)) -#define NV20TCL_TX_OFFSET__SIZE 0x00000004 -#define NV20TCL_TX_FORMAT(x) (0x00001b04+((x)*64)) -#define NV20TCL_TX_FORMAT__SIZE 0x00000004 -#define NV20TCL_TX_FORMAT_DMA0 (1 << 0) -#define NV20TCL_TX_FORMAT_DMA1 (1 << 1) -#define NV20TCL_TX_FORMAT_CUBIC (1 << 2) -#define NV20TCL_TX_FORMAT_NO_BORDER (1 << 3) -#define NV20TCL_TX_FORMAT_DIMS_SHIFT 4 -#define NV20TCL_TX_FORMAT_DIMS_MASK 0x000000f0 -#define NV20TCL_TX_FORMAT_DIMS_1D 0x00000010 -#define NV20TCL_TX_FORMAT_DIMS_2D 0x00000020 -#define NV20TCL_TX_FORMAT_DIMS_3D 0x00000030 -#define NV20TCL_TX_FORMAT_FORMAT_SHIFT 8 -#define NV20TCL_TX_FORMAT_FORMAT_MASK 0x0000ff00 -#define NV20TCL_TX_FORMAT_FORMAT_L8 0x00000000 -#define NV20TCL_TX_FORMAT_FORMAT_A8 0x00000100 -#define NV20TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000200 -#define NV20TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000300 -#define NV20TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000400 -#define NV20TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000500 -#define NV20TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000600 -#define NV20TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000700 -#define NV20TCL_TX_FORMAT_FORMAT_INDEX8 0x00000b00 -#define NV20TCL_TX_FORMAT_FORMAT_DXT1 0x00000c00 -#define NV20TCL_TX_FORMAT_FORMAT_DXT3 0x00000e00 -#define NV20TCL_TX_FORMAT_FORMAT_DXT5 0x00000f00 -#define NV20TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00001000 -#define NV20TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00001100 -#define NV20TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00001200 -#define NV20TCL_TX_FORMAT_FORMAT_L8_RECT 0x00001300 -#define NV20TCL_TX_FORMAT_FORMAT_A8L8 0x00001a00 -#define NV20TCL_TX_FORMAT_FORMAT_A8_RECT2 0x00001b00 -#define NV20TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00001d00 -#define NV20TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00001e00 -#define NV20TCL_TX_FORMAT_FORMAT_L8A8_RECT 0x00002000 -#define NV20TCL_TX_FORMAT_FORMAT_DSDT 0x00002800 -#define NV20TCL_TX_FORMAT_FORMAT_A16 0x00003200 -#define NV20TCL_TX_FORMAT_FORMAT_HILO16 0x00003300 -#define NV20TCL_TX_FORMAT_FORMAT_A16_RECT 0x00003500 -#define NV20TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00003600 -#define NV20TCL_TX_FORMAT_FORMAT_HILO8 0x00004400 -#define NV20TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00004500 -#define NV20TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00004600 -#define NV20TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00004700 -#define NV20TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00004a00 -#define NV20TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00004b00 -#define NV20TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00004c00 -#define NV20TCL_TX_FORMAT_MIPMAP (1 << 19) -#define NV20TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 20 -#define NV20TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x00f00000 -#define NV20TCL_TX_FORMAT_BASE_SIZE_V_SHIFT 24 -#define NV20TCL_TX_FORMAT_BASE_SIZE_V_MASK 0x0f000000 -#define NV20TCL_TX_FORMAT_BASE_SIZE_W_SHIFT 28 -#define NV20TCL_TX_FORMAT_BASE_SIZE_W_MASK 0xf0000000 -#define NV20TCL_TX_WRAP(x) (0x00001b08+((x)*64)) -#define NV20TCL_TX_WRAP__SIZE 0x00000004 -#define NV20TCL_TX_WRAP_S_SHIFT 0 -#define NV20TCL_TX_WRAP_S_MASK 0x000000ff -#define NV20TCL_TX_WRAP_S_REPEAT 0x00000001 -#define NV20TCL_TX_WRAP_S_MIRRORED_REPEAT 0x00000002 -#define NV20TCL_TX_WRAP_S_CLAMP_TO_EDGE 0x00000003 -#define NV20TCL_TX_WRAP_S_CLAMP_TO_BORDER 0x00000004 -#define NV20TCL_TX_WRAP_S_CLAMP 0x00000005 -#define NV20TCL_TX_WRAP_T_SHIFT 8 -#define NV20TCL_TX_WRAP_T_MASK 0x00000f00 -#define NV20TCL_TX_WRAP_T_REPEAT 0x00000100 -#define NV20TCL_TX_WRAP_T_MIRRORED_REPEAT 0x00000200 -#define NV20TCL_TX_WRAP_T_CLAMP_TO_EDGE 0x00000300 -#define NV20TCL_TX_WRAP_T_CLAMP_TO_BORDER 0x00000400 -#define NV20TCL_TX_WRAP_T_CLAMP 0x00000500 -#define NV20TCL_TX_WRAP_R_SHIFT 16 -#define NV20TCL_TX_WRAP_R_MASK 0x000f0000 -#define NV20TCL_TX_WRAP_R_REPEAT 0x00010000 -#define NV20TCL_TX_WRAP_R_MIRRORED_REPEAT 0x00020000 -#define NV20TCL_TX_WRAP_R_CLAMP_TO_EDGE 0x00030000 -#define NV20TCL_TX_WRAP_R_CLAMP_TO_BORDER 0x00040000 -#define NV20TCL_TX_WRAP_R_CLAMP 0x00050000 -#define NV20TCL_TX_ENABLE(x) (0x00001b0c+((x)*64)) -#define NV20TCL_TX_ENABLE__SIZE 0x00000004 -#define NV20TCL_TX_ENABLE_ANISO_SHIFT 4 -#define NV20TCL_TX_ENABLE_ANISO_MASK 0x00000030 -#define NV20TCL_TX_ENABLE_ANISO_NONE 0x00000000 -#define NV20TCL_TX_ENABLE_ANISO_2X 0x00000010 -#define NV20TCL_TX_ENABLE_ANISO_4X 0x00000020 -#define NV20TCL_TX_ENABLE_ANISO_8X 0x00000030 -#define NV20TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT 14 -#define NV20TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK 0x0003c000 -#define NV20TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT 26 -#define NV20TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK 0x3c000000 -#define NV20TCL_TX_ENABLE_ENABLE (1 << 30) -#define NV20TCL_TX_SWIZZLE(x) (0x00001b10+((x)*64)) -#define NV20TCL_TX_SWIZZLE__SIZE 0x00000004 -#define NV20TCL_TX_SWIZZLE_RECT_PITCH_SHIFT 16 -#define NV20TCL_TX_SWIZZLE_RECT_PITCH_MASK 0xffff0000 -#define NV20TCL_TX_FILTER(x) (0x00001b14+((x)*64)) -#define NV20TCL_TX_FILTER__SIZE 0x00000004 -#define NV20TCL_TX_FILTER_LOD_BIAS_SHIFT 8 -#define NV20TCL_TX_FILTER_LOD_BIAS_MASK 0x00000f00 -#define NV20TCL_TX_FILTER_MINIFY_SHIFT 16 -#define NV20TCL_TX_FILTER_MINIFY_MASK 0x000f0000 -#define NV20TCL_TX_FILTER_MINIFY_NEAREST 0x00010000 -#define NV20TCL_TX_FILTER_MINIFY_LINEAR 0x00020000 -#define NV20TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x00030000 -#define NV20TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x00040000 -#define NV20TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x00050000 -#define NV20TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x00060000 -#define NV20TCL_TX_FILTER_MAGNIFY_SHIFT 24 -#define NV20TCL_TX_FILTER_MAGNIFY_MASK 0x0f000000 -#define NV20TCL_TX_FILTER_MAGNIFY_NEAREST 0x01000000 -#define NV20TCL_TX_FILTER_MAGNIFY_LINEAR 0x02000000 -#define NV20TCL_TX_NPOT_SIZE(x) (0x00001b1c+((x)*64)) -#define NV20TCL_TX_NPOT_SIZE__SIZE 0x00000004 -#define NV20TCL_TX_NPOT_SIZE_H_SHIFT 0 -#define NV20TCL_TX_NPOT_SIZE_H_MASK 0x0000ffff -#define NV20TCL_TX_NPOT_SIZE_W_SHIFT 16 -#define NV20TCL_TX_NPOT_SIZE_W_MASK 0xffff0000 -#define NV20TCL_TX_PALETTE_OFFSET(x) (0x00001b20+((x)*64)) -#define NV20TCL_TX_PALETTE_OFFSET__SIZE 0x00000004 -#define NV20TCL_TX_BORDER_COLOR(x) (0x00001b24+((x)*64)) -#define NV20TCL_TX_BORDER_COLOR__SIZE 0x00000004 -#define NV20TCL_TX_BORDER_COLOR_B_SHIFT 0 -#define NV20TCL_TX_BORDER_COLOR_B_MASK 0x000000ff -#define NV20TCL_TX_BORDER_COLOR_G_SHIFT 8 -#define NV20TCL_TX_BORDER_COLOR_G_MASK 0x0000ff00 -#define NV20TCL_TX_BORDER_COLOR_R_SHIFT 16 -#define NV20TCL_TX_BORDER_COLOR_R_MASK 0x00ff0000 -#define NV20TCL_TX_BORDER_COLOR_A_SHIFT 24 -#define NV20TCL_TX_BORDER_COLOR_A_MASK 0xff000000 -#define NV20TCL_TX_SHADER_OFFSET_MATRIX00(x) (0x00001b28+((x)*64)) -#define NV20TCL_TX_SHADER_OFFSET_MATRIX00__SIZE 0x00000004 -#define NV20TCL_TX_SHADER_OFFSET_MATRIX01(x) (0x00001b2c+((x)*64)) -#define NV20TCL_TX_SHADER_OFFSET_MATRIX01__SIZE 0x00000004 -#define NV20TCL_TX_SHADER_OFFSET_MATRIX11(x) (0x00001b30+((x)*64)) -#define NV20TCL_TX_SHADER_OFFSET_MATRIX11__SIZE 0x00000004 -#define NV20TCL_TX_SHADER_OFFSET_MATRIX10(x) (0x00001b34+((x)*64)) -#define NV20TCL_TX_SHADER_OFFSET_MATRIX10__SIZE 0x00000004 -#define NV20TCL_DEPTH_UNK17D8 0x00001d78 -#define NV20TCL_DEPTH_UNK17D8_CLAMP_SHIFT 4 -#define NV20TCL_DEPTH_UNK17D8_CLAMP_MASK 0x000000f0 -#define NV20TCL_MULTISAMPLE_CONTROL 0x00001d7c -#define NV20TCL_CLEAR_DEPTH_VALUE 0x00001d8c -#define NV20TCL_CLEAR_VALUE 0x00001d90 -#define NV20TCL_CLEAR_BUFFERS 0x00001d94 -#define NV20TCL_CLEAR_BUFFERS_COLOR_A (1 << 7) -#define NV20TCL_CLEAR_BUFFERS_COLOR_B (1 << 6) -#define NV20TCL_CLEAR_BUFFERS_COLOR_G (1 << 5) -#define NV20TCL_CLEAR_BUFFERS_COLOR_R (1 << 4) -#define NV20TCL_CLEAR_BUFFERS_STENCIL (1 << 1) -#define NV20TCL_CLEAR_BUFFERS_DEPTH (1 << 0) -#define NV20TCL_RC_COLOR0 0x00001e20 -#define NV20TCL_RC_COLOR0_B_SHIFT 0 -#define NV20TCL_RC_COLOR0_B_MASK 0x000000ff -#define NV20TCL_RC_COLOR0_G_SHIFT 8 -#define NV20TCL_RC_COLOR0_G_MASK 0x0000ff00 -#define NV20TCL_RC_COLOR0_R_SHIFT 16 -#define NV20TCL_RC_COLOR0_R_MASK 0x00ff0000 -#define NV20TCL_RC_COLOR0_A_SHIFT 24 -#define NV20TCL_RC_COLOR0_A_MASK 0xff000000 -#define NV20TCL_RC_COLOR1 0x00001e24 -#define NV20TCL_RC_COLOR1_B_SHIFT 0 -#define NV20TCL_RC_COLOR1_B_MASK 0x000000ff -#define NV20TCL_RC_COLOR1_G_SHIFT 8 -#define NV20TCL_RC_COLOR1_G_MASK 0x0000ff00 -#define NV20TCL_RC_COLOR1_R_SHIFT 16 -#define NV20TCL_RC_COLOR1_R_MASK 0x00ff0000 -#define NV20TCL_RC_COLOR1_A_SHIFT 24 -#define NV20TCL_RC_COLOR1_A_MASK 0xff000000 -#define NV20TCL_BACK_MATERIAL_SHININESS(x) (0x00001e28+((x)*4)) -#define NV20TCL_BACK_MATERIAL_SHININESS__SIZE 0x00000006 -#define NV20TCL_RC_OUT_RGB(x) (0x00001e40+((x)*4)) -#define NV20TCL_RC_OUT_RGB__SIZE 0x00000008 -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT 0 -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_MASK 0x0000000f -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_ZERO 0x00000000 -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_FOG 0x00000003 -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0_ARB 0x00000008 -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1_ARB 0x00000009 -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_NV 0x0000000c -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1_NV 0x0000000d -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F_NV 0x0000000f -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT 4 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_MASK 0x000000f0 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_ZERO 0x00000000 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_FOG 0x00000030 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0_ARB 0x00000080 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1_ARB 0x00000090 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_NV 0x000000c0 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1_NV 0x000000d0 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0 -#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F_NV 0x000000f0 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT 8 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_MASK 0x00000f00 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO 0x00000000 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_FOG 0x00000300 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0_ARB 0x00000800 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1_ARB 0x00000900 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_NV 0x00000c00 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1_NV 0x00000d00 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00 -#define NV20TCL_RC_OUT_RGB_CD_DOT_PRODUCT (1 << 12) -#define NV20TCL_RC_OUT_RGB_AB_DOT_PRODUCT (1 << 13) -#define NV20TCL_RC_OUT_RGB_MUX_SUM (1 << 14) -#define NV20TCL_RC_OUT_RGB_BIAS (1 << 15) -#define NV20TCL_RC_OUT_RGB_BIAS_NONE 0x00000000 -#define NV20TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000 -#define NV20TCL_RC_OUT_RGB_SCALE_SHIFT 17 -#define NV20TCL_RC_OUT_RGB_SCALE_MASK 0x00000000 -#define NV20TCL_RC_OUT_RGB_SCALE_NONE 0x00000000 -#define NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO_NV 0x00020000 -#define NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR_NV 0x00040000 -#define NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000 -#define NV20TCL_RC_ENABLE 0x00001e60 -#define NV20TCL_RC_ENABLE_NUM_COMBINERS_SHIFT 0 -#define NV20TCL_RC_ENABLE_NUM_COMBINERS_MASK 0x0000000f -#define NV20TCL_TX_RCOMP 0x00001e6c -#define NV20TCL_TX_RCOMP_NEVER 0x00000000 -#define NV20TCL_TX_RCOMP_GREATER 0x00000001 -#define NV20TCL_TX_RCOMP_EQUAL 0x00000002 -#define NV20TCL_TX_RCOMP_GEQUAL 0x00000003 -#define NV20TCL_TX_RCOMP_LESS 0x00000004 -#define NV20TCL_TX_RCOMP_NOTEQUAL 0x00000005 -#define NV20TCL_TX_RCOMP_LEQUAL 0x00000006 -#define NV20TCL_TX_RCOMP_ALWAYS 0x00000007 -#define NV20TCL_TX_SHADER_OP 0x00001e70 -#define NV20TCL_TX_SHADER_OP_TX0_SHIFT 0 -#define NV20TCL_TX_SHADER_OP_TX0_MASK 0x0000001f -#define NV20TCL_TX_SHADER_OP_TX0_NONE 0x00000000 -#define NV20TCL_TX_SHADER_OP_TX0_TEXTURE_2D 0x00000001 -#define NV20TCL_TX_SHADER_OP_TX0_PASS_THROUGH 0x00000004 -#define NV20TCL_TX_SHADER_OP_TX0_CULL_FRAGMENT 0x00000005 -#define NV20TCL_TX_SHADER_OP_TX0_OFFSET_TEXTURE_2D 0x00000006 -#define NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT_TEXTURE_2D 0x00000009 -#define NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT_DEPTH_REPLACE 0x0000000a -#define NV20TCL_TX_SHADER_OP_TX0_DEPENDANT_AR_TEXTURE_2D 0x0000000f -#define NV20TCL_TX_SHADER_OP_TX0_DEPENDANT_GB_TEXTURE_2D 0x00000010 -#define NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT 0x00000011 -#define NV20TCL_TX_SHADER_OP_TX1_SHIFT 5 -#define NV20TCL_TX_SHADER_OP_TX1_MASK 0x000003e0 -#define NV20TCL_TX_SHADER_OP_TX1_NONE 0x00000000 -#define NV20TCL_TX_SHADER_OP_TX1_TEXTURE_2D 0x00000020 -#define NV20TCL_TX_SHADER_OP_TX1_PASS_THROUGH 0x00000080 -#define NV20TCL_TX_SHADER_OP_TX1_CULL_FRAGMENT 0x000000a0 -#define NV20TCL_TX_SHADER_OP_TX1_OFFSET_TEXTURE_2D 0x000000c0 -#define NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT_TEXTURE_2D 0x00000120 -#define NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT_DEPTH_REPLACE 0x00000140 -#define NV20TCL_TX_SHADER_OP_TX1_DEPENDANT_AR_TEXTURE_2D 0x000001e0 -#define NV20TCL_TX_SHADER_OP_TX1_DEPENDANT_GB_TEXTURE_2D 0x00000200 -#define NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT 0x00000220 -#define NV20TCL_TX_SHADER_OP_TX2_SHIFT 10 -#define NV20TCL_TX_SHADER_OP_TX2_MASK 0x00007c00 -#define NV20TCL_TX_SHADER_OP_TX2_NONE 0x00000000 -#define NV20TCL_TX_SHADER_OP_TX2_TEXTURE_2D 0x00000400 -#define NV20TCL_TX_SHADER_OP_TX2_PASS_THROUGH 0x00001000 -#define NV20TCL_TX_SHADER_OP_TX2_CULL_FRAGMENT 0x00001400 -#define NV20TCL_TX_SHADER_OP_TX2_OFFSET_TEXTURE_2D 0x00001800 -#define NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT_TEXTURE_2D 0x00002400 -#define NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT_DEPTH_REPLACE 0x00002800 -#define NV20TCL_TX_SHADER_OP_TX2_DEPENDANT_AR_TEXTURE_2D 0x00003c00 -#define NV20TCL_TX_SHADER_OP_TX2_DEPENDANT_GB_TEXTURE_2D 0x00004000 -#define NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT 0x00004400 -#define NV20TCL_TX_SHADER_OP_TX3_SHIFT 15 -#define NV20TCL_TX_SHADER_OP_TX3_MASK 0x000f8000 -#define NV20TCL_TX_SHADER_OP_TX3_NONE 0x00000000 -#define NV20TCL_TX_SHADER_OP_TX3_TEXTURE_2D 0x00008000 -#define NV20TCL_TX_SHADER_OP_TX3_PASS_THROUGH 0x00020000 -#define NV20TCL_TX_SHADER_OP_TX3_CULL_FRAGMENT 0x00028000 -#define NV20TCL_TX_SHADER_OP_TX3_OFFSET_TEXTURE_2D 0x00030000 -#define NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT_TEXTURE_2D 0x00048000 -#define NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT_DEPTH_REPLACE 0x00050000 -#define NV20TCL_TX_SHADER_OP_TX3_DEPENDANT_AR_TEXTURE_2D 0x00078000 -#define NV20TCL_TX_SHADER_OP_TX3_DEPENDANT_GB_TEXTURE_2D 0x00080000 -#define NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT 0x00088000 -#define NV20TCL_TX_SHADER_DOTMAPPING 0x00001e74 -#define NV20TCL_TX_SHADER_DOTMAPPING_TX0_SHIFT 0 -#define NV20TCL_TX_SHADER_DOTMAPPING_TX0_MASK 0x0000000f -#define NV20TCL_TX_SHADER_DOTMAPPING_TX1_SHIFT 4 -#define NV20TCL_TX_SHADER_DOTMAPPING_TX1_MASK 0x000000f0 -#define NV20TCL_TX_SHADER_DOTMAPPING_TX2_SHIFT 8 -#define NV20TCL_TX_SHADER_DOTMAPPING_TX2_MASK 0x00000f00 -#define NV20TCL_TX_SHADER_DOTMAPPING_TX3_SHIFT 12 -#define NV20TCL_TX_SHADER_DOTMAPPING_TX3_MASK 0x0000f000 -#define NV20TCL_TX_SHADER_PREVIOUS 0x00001e78 -#define NV20TCL_TX_SHADER_PREVIOUS_TX0_SHIFT 8 -#define NV20TCL_TX_SHADER_PREVIOUS_TX0_MASK 0x00000f00 -#define NV20TCL_TX_SHADER_PREVIOUS_TX1_SHIFT 12 -#define NV20TCL_TX_SHADER_PREVIOUS_TX1_MASK 0x0000f000 -#define NV20TCL_TX_SHADER_PREVIOUS_TX2_SHIFT 16 -#define NV20TCL_TX_SHADER_PREVIOUS_TX2_MASK 0x00030000 -#define NV20TCL_TX_SHADER_PREVIOUS_TX3_SHIFT 20 -#define NV20TCL_TX_SHADER_PREVIOUS_TX3_MASK 0x00300000 -#define NV20TCL_ENGINE 0x00001e94 -#define NV20TCL_ENGINE_VP (1 << 1) -#define NV20TCL_ENGINE_FIXED (1 << 2) -#define NV20TCL_VP_UPLOAD_FROM_ID 0x00001e9c -#define NV20TCL_VP_START_FROM_ID 0x00001ea0 -#define NV20TCL_VP_UPLOAD_CONST_ID 0x00001ea4 -#define NV20TCL_VIEWPORT_TRANSLATE_X 0x00001f00 -#define NV20TCL_VIEWPORT_TRANSLATE_Y 0x00001f04 -#define NV20TCL_VIEWPORT_TRANSLATE_Z 0x00001f08 -#define NV20TCL_VIEWPORT_TRANSLATE_W 0x00001f0c - - -#define NV17TCL 0x00000099 - -#define NV17TCL_DMA_IN_MEMORY4 0x000001ac -#define NV17TCL_DMA_IN_MEMORY5 0x000001b0 -#define NV17TCL_COLOR_MASK_ENABLE 0x000002bc -#define NV17TCL_LMA_DEPTH_BUFFER_PITCH 0x00000d5c -#define NV17TCL_LMA_DEPTH_BUFFER_OFFSET 0x00000d60 -#define NV17TCL_LMA_DEPTH_FILL_VALUE 0x00000d68 -#define NV17TCL_LMA_DEPTH_BUFFER_CLEAR 0x00000d6c -#define NV17TCL_LMA_DEPTH_ENABLE 0x00001658 - - -#define NV20_SWIZZLED_SURFACE 0x0000009e - - - -#define NV12_IMAGE_BLIT 0x0000009f - - - -#define NV30_CONTEXT_SURFACES_2D 0x00000362 - - - -#define NV30_STRETCHED_IMAGE_FROM_CPU 0x00000366 - - - -#define NV30_TEXTURE_FROM_CPU 0x0000037b - - - -#define NV30_SCALED_IMAGE_FROM_MEMORY 0x00000389 - - - -#define NV30_IMAGE_FROM_CPU 0x0000038a - - - -#define NV30TCL 0x00000397 - - - -#define NV30_SWIZZLED_SURFACE 0x0000039e - - - -#define NV35TCL 0x00000497 - - - -#define NV25TCL 0x00000597 - -#define NV25TCL_DMA_IN_MEMORY4 0x0000019c -#define NV25TCL_DMA_IN_MEMORY5 0x000001a0 -#define NV25TCL_DMA_IN_MEMORY8 0x000001ac -#define NV25TCL_DMA_IN_MEMORY9 0x000001b0 - - -#define NV34TCL 0x00000697 - -#define NV34TCL_NOP 0x00000100 -#define NV34TCL_NOTIFY 0x00000104 -#define NV34TCL_DMA_NOTIFY 0x00000180 -#define NV34TCL_DMA_TEXTURE0 0x00000184 -#define NV34TCL_DMA_TEXTURE1 0x00000188 -#define NV34TCL_DMA_COLOR1 0x0000018c -#define NV34TCL_DMA_COLOR0 0x00000194 -#define NV34TCL_DMA_ZETA 0x00000198 -#define NV34TCL_DMA_VTXBUF0 0x0000019c -#define NV34TCL_DMA_VTXBUF1 0x000001a0 -#define NV34TCL_DMA_FENCE 0x000001a4 -#define NV34TCL_DMA_QUERY 0x000001a8 -#define NV34TCL_DMA_IN_MEMORY7 0x000001ac -#define NV34TCL_DMA_IN_MEMORY8 0x000001b0 -#define NV34TCL_RT_HORIZ 0x00000200 -#define NV34TCL_RT_HORIZ_X_SHIFT 0 -#define NV34TCL_RT_HORIZ_X_MASK 0x0000ffff -#define NV34TCL_RT_HORIZ_W_SHIFT 16 -#define NV34TCL_RT_HORIZ_W_MASK 0xffff0000 -#define NV34TCL_RT_VERT 0x00000204 -#define NV34TCL_RT_VERT_Y_SHIFT 0 -#define NV34TCL_RT_VERT_Y_MASK 0x0000ffff -#define NV34TCL_RT_VERT_H_SHIFT 16 -#define NV34TCL_RT_VERT_H_MASK 0xffff0000 -#define NV34TCL_RT_FORMAT 0x00000208 -#define NV34TCL_RT_FORMAT_TYPE_SHIFT 8 -#define NV34TCL_RT_FORMAT_TYPE_MASK 0x00000f00 -#define NV34TCL_RT_FORMAT_TYPE_LINEAR 0x00000100 -#define NV34TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200 -#define NV34TCL_RT_FORMAT_ZETA_SHIFT 5 -#define NV34TCL_RT_FORMAT_ZETA_MASK 0x000000e0 -#define NV34TCL_RT_FORMAT_ZETA_Z16 0x00000020 -#define NV34TCL_RT_FORMAT_ZETA_Z24S8 0x00000040 -#define NV34TCL_RT_FORMAT_COLOR_SHIFT 0 -#define NV34TCL_RT_FORMAT_COLOR_MASK 0x0000001f -#define NV34TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003 -#define NV34TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005 -#define NV34TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008 -#define NV34TCL_RT_FORMAT_COLOR_B8 0x00000009 -#define NV34TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d -#define NV34TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f -#define NV34TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010 -#define NV34TCL_COLOR0_PITCH 0x0000020c -#define NV34TCL_COLOR0_PITCH_COLOR0_SHIFT 0 -#define NV34TCL_COLOR0_PITCH_COLOR0_MASK 0x0000ffff -#define NV34TCL_COLOR0_PITCH_ZETA_SHIFT 16 -#define NV34TCL_COLOR0_PITCH_ZETA_MASK 0xffff0000 -#define NV34TCL_COLOR0_OFFSET 0x00000210 -#define NV34TCL_ZETA_OFFSET 0x00000214 -#define NV34TCL_COLOR1_OFFSET 0x00000218 -#define NV34TCL_COLOR1_PITCH 0x0000021c -#define NV34TCL_RT_ENABLE 0x00000220 -#define NV34TCL_RT_ENABLE_MRT (1 << 4) -#define NV34TCL_RT_ENABLE_COLOR1 (1 << 1) -#define NV34TCL_RT_ENABLE_COLOR0 (1 << 0) -#define NV34TCL_LMA_DEPTH_PITCH 0x0000022c -#define NV34TCL_LMA_DEPTH_OFFSET 0x00000230 -#define NV34TCL_TX_UNITS_ENABLE 0x0000023c -#define NV34TCL_TX_UNITS_ENABLE_TX0 (1 << 0) -#define NV34TCL_TX_UNITS_ENABLE_TX1 (1 << 1) -#define NV34TCL_TX_UNITS_ENABLE_TX2 (1 << 2) -#define NV34TCL_TX_UNITS_ENABLE_TX3 (1 << 3) -#define NV34TCL_TX_UNITS_ENABLE_TX4 (1 << 4) -#define NV34TCL_TX_UNITS_ENABLE_TX5 (1 << 5) -#define NV34TCL_TX_UNITS_ENABLE_TX6 (1 << 6) -#define NV34TCL_TX_UNITS_ENABLE_TX7 (1 << 7) -#define NV34TCL_TX_MATRIX_ENABLE(x) (0x00000240+((x)*4)) -#define NV34TCL_TX_MATRIX_ENABLE__SIZE 0x00000008 -#define NV34TCL_VIEWPORT_TX_ORIGIN 0x000002b8 -#define NV34TCL_VIEWPORT_TX_ORIGIN_X_SHIFT 0 -#define NV34TCL_VIEWPORT_TX_ORIGIN_X_MASK 0x0000ffff -#define NV34TCL_VIEWPORT_TX_ORIGIN_Y_SHIFT 16 -#define NV34TCL_VIEWPORT_TX_ORIGIN_Y_MASK 0xffff0000 -#define NV34TCL_VIEWPORT_CLIP_MODE 0x000002bc -#define NV34TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*8)) -#define NV34TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008 -#define NV34TCL_VIEWPORT_CLIP_HORIZ_L_SHIFT 0 -#define NV34TCL_VIEWPORT_CLIP_HORIZ_L_MASK 0x0000ffff -#define NV34TCL_VIEWPORT_CLIP_HORIZ_R_SHIFT 16 -#define NV34TCL_VIEWPORT_CLIP_HORIZ_R_MASK 0xffff0000 -#define NV34TCL_VIEWPORT_CLIP_VERT(x) (0x000002c4+((x)*8)) -#define NV34TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008 -#define NV34TCL_VIEWPORT_CLIP_VERT_T_SHIFT 0 -#define NV34TCL_VIEWPORT_CLIP_VERT_T_MASK 0x0000ffff -#define NV34TCL_VIEWPORT_CLIP_VERT_D_SHIFT 16 -#define NV34TCL_VIEWPORT_CLIP_VERT_D_MASK 0xffff0000 -#define NV34TCL_DITHER_ENABLE 0x00000300 -#define NV34TCL_ALPHA_FUNC_ENABLE 0x00000304 -#define NV34TCL_ALPHA_FUNC_FUNC 0x00000308 -#define NV34TCL_ALPHA_FUNC_FUNC_NEVER 0x00000200 -#define NV34TCL_ALPHA_FUNC_FUNC_LESS 0x00000201 -#define NV34TCL_ALPHA_FUNC_FUNC_EQUAL 0x00000202 -#define NV34TCL_ALPHA_FUNC_FUNC_LEQUAL 0x00000203 -#define NV34TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204 -#define NV34TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204 -#define NV34TCL_ALPHA_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV34TCL_ALPHA_FUNC_FUNC_GEQUAL 0x00000206 -#define NV34TCL_ALPHA_FUNC_FUNC_ALWAYS 0x00000207 -#define NV34TCL_ALPHA_FUNC_REF 0x0000030c -#define NV34TCL_BLEND_FUNC_ENABLE 0x00000310 -#define NV34TCL_BLEND_FUNC_SRC 0x00000314 -#define NV34TCL_BLEND_FUNC_SRC_RGB_SHIFT 0 -#define NV34TCL_BLEND_FUNC_SRC_RGB_MASK 0x0000ffff -#define NV34TCL_BLEND_FUNC_SRC_RGB_ZERO 0x00000000 -#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE 0x00000001 -#define NV34TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR 0x00000300 -#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV34TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA 0x00000302 -#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV34TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA 0x00000304 -#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV34TCL_BLEND_FUNC_SRC_RGB_DST_COLOR 0x00000306 -#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR 0x00000307 -#define NV34TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE 0x00000308 -#define NV34TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR 0x00008001 -#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV34TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA 0x00008003 -#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SHIFT 16 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_MASK 0xffff0000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ZERO 0x00000000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE 0x00010000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR 0x03000000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA 0x03020000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA 0x03040000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR 0x03060000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR 0x03070000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE 0x03080000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR 0x80010000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA 0x80030000 -#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000 -#define NV34TCL_BLEND_FUNC_DST 0x00000318 -#define NV34TCL_BLEND_FUNC_DST_RGB_SHIFT 0 -#define NV34TCL_BLEND_FUNC_DST_RGB_MASK 0x0000ffff -#define NV34TCL_BLEND_FUNC_DST_RGB_ZERO 0x00000000 -#define NV34TCL_BLEND_FUNC_DST_RGB_ONE 0x00000001 -#define NV34TCL_BLEND_FUNC_DST_RGB_SRC_COLOR 0x00000300 -#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV34TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA 0x00000302 -#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV34TCL_BLEND_FUNC_DST_RGB_DST_ALPHA 0x00000304 -#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV34TCL_BLEND_FUNC_DST_RGB_DST_COLOR 0x00000306 -#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR 0x00000307 -#define NV34TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE 0x00000308 -#define NV34TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR 0x00008001 -#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV34TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA 0x00008003 -#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_SHIFT 16 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_MASK 0xffff0000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_ZERO 0x00000000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE 0x00010000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR 0x03000000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA 0x03020000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA 0x03040000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR 0x03060000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR 0x03070000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE 0x03080000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR 0x80010000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x80030000 -#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000 -#define NV34TCL_BLEND_COLOR 0x0000031c -#define NV34TCL_BLEND_COLOR_B_SHIFT 0 -#define NV34TCL_BLEND_COLOR_B_MASK 0x000000ff -#define NV34TCL_BLEND_COLOR_G_SHIFT 8 -#define NV34TCL_BLEND_COLOR_G_MASK 0x0000ff00 -#define NV34TCL_BLEND_COLOR_R_SHIFT 16 -#define NV34TCL_BLEND_COLOR_R_MASK 0x00ff0000 -#define NV34TCL_BLEND_COLOR_A_SHIFT 24 -#define NV34TCL_BLEND_COLOR_A_MASK 0xff000000 -#define NV34TCL_BLEND_EQUATION 0x00000320 -#define NV34TCL_BLEND_EQUATION_FUNC_ADD 0x00008006 -#define NV34TCL_BLEND_EQUATION_MIN 0x00008007 -#define NV34TCL_BLEND_EQUATION_MAX 0x00008008 -#define NV34TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a -#define NV34TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b -#define NV34TCL_COLOR_MASK 0x00000324 -#define NV34TCL_COLOR_MASK_B_SHIFT 0 -#define NV34TCL_COLOR_MASK_B_MASK 0x000000ff -#define NV34TCL_COLOR_MASK_G_SHIFT 8 -#define NV34TCL_COLOR_MASK_G_MASK 0x0000ff00 -#define NV34TCL_COLOR_MASK_R_SHIFT 16 -#define NV34TCL_COLOR_MASK_R_MASK 0x00ff0000 -#define NV34TCL_COLOR_MASK_A_SHIFT 24 -#define NV34TCL_COLOR_MASK_A_MASK 0xff000000 -#define NV34TCL_STENCIL_BACK_ENABLE 0x00000328 -#define NV34TCL_STENCIL_BACK_MASK 0x0000032c -#define NV34TCL_STENCIL_BACK_FUNC_FUNC 0x00000330 -#define NV34TCL_STENCIL_BACK_FUNC_FUNC_NEVER 0x00000200 -#define NV34TCL_STENCIL_BACK_FUNC_FUNC_LESS 0x00000201 -#define NV34TCL_STENCIL_BACK_FUNC_FUNC_EQUAL 0x00000202 -#define NV34TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL 0x00000203 -#define NV34TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204 -#define NV34TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204 -#define NV34TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV34TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL 0x00000206 -#define NV34TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS 0x00000207 -#define NV34TCL_STENCIL_BACK_FUNC_REF 0x00000334 -#define NV34TCL_STENCIL_BACK_FUNC_MASK 0x00000338 -#define NV34TCL_STENCIL_BACK_OP_FAIL 0x0000033c -#define NV34TCL_STENCIL_BACK_OP_FAIL_ZERO 0x00000000 -#define NV34TCL_STENCIL_BACK_OP_FAIL_INVERT 0x0000150a -#define NV34TCL_STENCIL_BACK_OP_FAIL_KEEP 0x00001e00 -#define NV34TCL_STENCIL_BACK_OP_FAIL_REPLACE 0x00001e01 -#define NV34TCL_STENCIL_BACK_OP_FAIL_INCR 0x00001e02 -#define NV34TCL_STENCIL_BACK_OP_FAIL_DECR 0x00001e03 -#define NV34TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP 0x00008507 -#define NV34TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP 0x00008508 -#define NV34TCL_STENCIL_BACK_OP_ZFAIL 0x00000340 -#define NV34TCL_STENCIL_BACK_OP_ZFAIL_ZERO 0x00000000 -#define NV34TCL_STENCIL_BACK_OP_ZFAIL_INVERT 0x0000150a -#define NV34TCL_STENCIL_BACK_OP_ZFAIL_KEEP 0x00001e00 -#define NV34TCL_STENCIL_BACK_OP_ZFAIL_REPLACE 0x00001e01 -#define NV34TCL_STENCIL_BACK_OP_ZFAIL_INCR 0x00001e02 -#define NV34TCL_STENCIL_BACK_OP_ZFAIL_DECR 0x00001e03 -#define NV34TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP 0x00008507 -#define NV34TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP 0x00008508 -#define NV34TCL_STENCIL_BACK_OP_ZPASS 0x00000344 -#define NV34TCL_STENCIL_BACK_OP_ZPASS_ZERO 0x00000000 -#define NV34TCL_STENCIL_BACK_OP_ZPASS_INVERT 0x0000150a -#define NV34TCL_STENCIL_BACK_OP_ZPASS_KEEP 0x00001e00 -#define NV34TCL_STENCIL_BACK_OP_ZPASS_REPLACE 0x00001e01 -#define NV34TCL_STENCIL_BACK_OP_ZPASS_INCR 0x00001e02 -#define NV34TCL_STENCIL_BACK_OP_ZPASS_DECR 0x00001e03 -#define NV34TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP 0x00008507 -#define NV34TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP 0x00008508 -#define NV34TCL_STENCIL_FRONT_ENABLE 0x00000348 -#define NV34TCL_STENCIL_FRONT_MASK 0x0000034c -#define NV34TCL_STENCIL_FRONT_FUNC_FUNC 0x00000350 -#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_NEVER 0x00000200 -#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_LESS 0x00000201 -#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL 0x00000202 -#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL 0x00000203 -#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204 -#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204 -#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL 0x00000206 -#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS 0x00000207 -#define NV34TCL_STENCIL_FRONT_FUNC_REF 0x00000354 -#define NV34TCL_STENCIL_FRONT_FUNC_MASK 0x00000358 -#define NV34TCL_STENCIL_FRONT_OP_FAIL 0x0000035c -#define NV34TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000 -#define NV34TCL_STENCIL_FRONT_OP_FAIL_INVERT 0x0000150a -#define NV34TCL_STENCIL_FRONT_OP_FAIL_KEEP 0x00001e00 -#define NV34TCL_STENCIL_FRONT_OP_FAIL_REPLACE 0x00001e01 -#define NV34TCL_STENCIL_FRONT_OP_FAIL_INCR 0x00001e02 -#define NV34TCL_STENCIL_FRONT_OP_FAIL_DECR 0x00001e03 -#define NV34TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP 0x00008507 -#define NV34TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP 0x00008508 -#define NV34TCL_STENCIL_FRONT_OP_ZFAIL 0x00000360 -#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_ZERO 0x00000000 -#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INVERT 0x0000150a -#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_KEEP 0x00001e00 -#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE 0x00001e01 -#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR 0x00001e02 -#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR 0x00001e03 -#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP 0x00008507 -#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP 0x00008508 -#define NV34TCL_STENCIL_FRONT_OP_ZPASS 0x00000364 -#define NV34TCL_STENCIL_FRONT_OP_ZPASS_ZERO 0x00000000 -#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INVERT 0x0000150a -#define NV34TCL_STENCIL_FRONT_OP_ZPASS_KEEP 0x00001e00 -#define NV34TCL_STENCIL_FRONT_OP_ZPASS_REPLACE 0x00001e01 -#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR 0x00001e02 -#define NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR 0x00001e03 -#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP 0x00008507 -#define NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP 0x00008508 -#define NV34TCL_SHADE_MODEL 0x00000368 -#define NV34TCL_SHADE_MODEL_FLAT 0x00001d00 -#define NV34TCL_SHADE_MODEL_SMOOTH 0x00001d01 -#define NV34TCL_FOG_ENABLE 0x0000036c -#define NV34TCL_FOG_COLOR 0x00000370 -#define NV34TCL_FOG_COLOR_R_SHIFT 0 -#define NV34TCL_FOG_COLOR_R_MASK 0x000000ff -#define NV34TCL_FOG_COLOR_G_SHIFT 8 -#define NV34TCL_FOG_COLOR_G_MASK 0x0000ff00 -#define NV34TCL_FOG_COLOR_B_SHIFT 16 -#define NV34TCL_FOG_COLOR_B_MASK 0x00ff0000 -#define NV34TCL_FOG_COLOR_A_SHIFT 24 -#define NV34TCL_FOG_COLOR_A_MASK 0xff000000 -#define NV34TCL_COLOR_LOGIC_OP_ENABLE 0x00000374 -#define NV34TCL_COLOR_LOGIC_OP_OP 0x00000378 -#define NV34TCL_COLOR_LOGIC_OP_OP_CLEAR 0x00001500 -#define NV34TCL_COLOR_LOGIC_OP_OP_AND 0x00001501 -#define NV34TCL_COLOR_LOGIC_OP_OP_AND_REVERSE 0x00001502 -#define NV34TCL_COLOR_LOGIC_OP_OP_COPY 0x00001503 -#define NV34TCL_COLOR_LOGIC_OP_OP_AND_INVERTED 0x00001504 -#define NV34TCL_COLOR_LOGIC_OP_OP_NOOP 0x00001505 -#define NV34TCL_COLOR_LOGIC_OP_OP_XOR 0x00001506 -#define NV34TCL_COLOR_LOGIC_OP_OP_OR 0x00001507 -#define NV34TCL_COLOR_LOGIC_OP_OP_NOR 0x00001508 -#define NV34TCL_COLOR_LOGIC_OP_OP_EQUIV 0x00001509 -#define NV34TCL_COLOR_LOGIC_OP_OP_INVERT 0x0000150a -#define NV34TCL_COLOR_LOGIC_OP_OP_OR_REVERSE 0x0000150b -#define NV34TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED 0x0000150c -#define NV34TCL_COLOR_LOGIC_OP_OP_OR_INVERTED 0x0000150d -#define NV34TCL_COLOR_LOGIC_OP_OP_NAND 0x0000150e -#define NV34TCL_COLOR_LOGIC_OP_OP_SET 0x0000150f -#define NV34TCL_NORMALIZE_ENABLE 0x0000037c -#define NV34TCL_COLOR_MATERIAL 0x00000390 -#define NV34TCL_COLOR_MATERIAL_FRONT_EMISSION_ENABLE (1 << 0) -#define NV34TCL_COLOR_MATERIAL_FRONT_AMBIENT_ENABLE (1 << 2) -#define NV34TCL_COLOR_MATERIAL_FRONT_DIFFUSE_ENABLE (1 << 4) -#define NV34TCL_COLOR_MATERIAL_FRONT_SPECULAR_ENABLE (1 << 6) -#define NV34TCL_COLOR_MATERIAL_BACK_EMISSION_ENABLE (1 << 8) -#define NV34TCL_COLOR_MATERIAL_BACK_AMBIENT_ENABLE (1 << 10) -#define NV34TCL_COLOR_MATERIAL_BACK_DIFFUSE_ENABLE (1 << 12) -#define NV34TCL_COLOR_MATERIAL_BACK_SPECULAR_ENABLE (1 << 14) -#define NV34TCL_DEPTH_RANGE_NEAR 0x00000394 -#define NV34TCL_DEPTH_RANGE_FAR 0x00000398 -#define NV34TCL_COLOR_MATERIAL_FRONT_R 0x000003a0 -#define NV34TCL_COLOR_MATERIAL_FRONT_G 0x000003a4 -#define NV34TCL_COLOR_MATERIAL_FRONT_B 0x000003a8 -#define NV34TCL_COLOR_MATERIAL_FRONT_A 0x000003b4 -#define NV34TCL_LINE_WIDTH 0x000003b8 -#define NV34TCL_LINE_SMOOTH_ENABLE 0x000003bc -#define NV34TCL_TX_GEN_S(x) (0x00000400+((x)*16)) -#define NV34TCL_TX_GEN_S__SIZE 0x00000008 -#define NV34TCL_TX_GEN_S_FALSE 0x00000000 -#define NV34TCL_TX_GEN_S_EYE_LINEAR 0x00002400 -#define NV34TCL_TX_GEN_S_OBJECT_LINEAR 0x00002401 -#define NV34TCL_TX_GEN_S_SPHERE_MAP 0x00002402 -#define NV34TCL_TX_GEN_S_NORMAL_MAP 0x00008511 -#define NV34TCL_TX_GEN_S_REFLECTION_MAP 0x00008512 -#define NV34TCL_TX_GEN_T(x) (0x00000404+((x)*16)) -#define NV34TCL_TX_GEN_T__SIZE 0x00000008 -#define NV34TCL_TX_GEN_T_FALSE 0x00000000 -#define NV34TCL_TX_GEN_T_EYE_LINEAR 0x00002400 -#define NV34TCL_TX_GEN_T_OBJECT_LINEAR 0x00002401 -#define NV34TCL_TX_GEN_T_SPHERE_MAP 0x00002402 -#define NV34TCL_TX_GEN_T_NORMAL_MAP 0x00008511 -#define NV34TCL_TX_GEN_T_REFLECTION_MAP 0x00008512 -#define NV34TCL_TX_GEN_R(x) (0x00000408+((x)*16)) -#define NV34TCL_TX_GEN_R__SIZE 0x00000008 -#define NV34TCL_TX_GEN_R_FALSE 0x00000000 -#define NV34TCL_TX_GEN_R_EYE_LINEAR 0x00002400 -#define NV34TCL_TX_GEN_R_OBJECT_LINEAR 0x00002401 -#define NV34TCL_TX_GEN_R_SPHERE_MAP 0x00002402 -#define NV34TCL_TX_GEN_R_NORMAL_MAP 0x00008511 -#define NV34TCL_TX_GEN_R_REFLECTION_MAP 0x00008512 -#define NV34TCL_TX_GEN_Q(x) (0x0000040c+((x)*16)) -#define NV34TCL_TX_GEN_Q__SIZE 0x00000008 -#define NV34TCL_TX_GEN_Q_FALSE 0x00000000 -#define NV34TCL_TX_GEN_Q_EYE_LINEAR 0x00002400 -#define NV34TCL_TX_GEN_Q_OBJECT_LINEAR 0x00002401 -#define NV34TCL_TX_GEN_Q_SPHERE_MAP 0x00002402 -#define NV34TCL_TX_GEN_Q_NORMAL_MAP 0x00008511 -#define NV34TCL_TX_GEN_Q_REFLECTION_MAP 0x00008512 -#define NV34TCL_MODELVIEW_MATRIX(x) (0x00000480+((x)*4)) -#define NV34TCL_MODELVIEW_MATRIX__SIZE 0x00000010 -#define NV34TCL_INVERSE_MODELVIEW_MATRIX(x) (0x00000580+((x)*4)) -#define NV34TCL_INVERSE_MODELVIEW_MATRIX__SIZE 0x0000000c -#define NV34TCL_PROJECTION_MATRIX(x) (0x00000680+((x)*4)) -#define NV34TCL_PROJECTION_MATRIX__SIZE 0x00000010 -#define NV34TCL_TX0_MATRIX(x) (0x000006c0+((x)*4)) -#define NV34TCL_TX0_MATRIX__SIZE 0x00000010 -#define NV34TCL_TX1_MATRIX(x) (0x00000700+((x)*4)) -#define NV34TCL_TX1_MATRIX__SIZE 0x00000010 -#define NV34TCL_TX2_MATRIX(x) (0x00000740+((x)*4)) -#define NV34TCL_TX2_MATRIX__SIZE 0x00000010 -#define NV34TCL_TX3_MATRIX(x) (0x00000780+((x)*4)) -#define NV34TCL_TX3_MATRIX__SIZE 0x00000010 -#define NV34TCL_TX4_MATRIX(x) (0x000007c0+((x)*4)) -#define NV34TCL_TX4_MATRIX__SIZE 0x00000010 -#define NV34TCL_TX5_MATRIX(x) (0x00000800+((x)*4)) -#define NV34TCL_TX5_MATRIX__SIZE 0x00000010 -#define NV34TCL_TX6_MATRIX(x) (0x00000840+((x)*4)) -#define NV34TCL_TX6_MATRIX__SIZE 0x00000010 -#define NV34TCL_TX7_MATRIX(x) (0x00000880+((x)*4)) -#define NV34TCL_TX7_MATRIX__SIZE 0x00000010 -#define NV34TCL_SCISSOR_HORIZ 0x000008c0 -#define NV34TCL_SCISSOR_HORIZ_X_SHIFT 0 -#define NV34TCL_SCISSOR_HORIZ_X_MASK 0x0000ffff -#define NV34TCL_SCISSOR_HORIZ_W_SHIFT 16 -#define NV34TCL_SCISSOR_HORIZ_W_MASK 0xffff0000 -#define NV34TCL_SCISSOR_VERT 0x000008c4 -#define NV34TCL_SCISSOR_VERT_Y_SHIFT 0 -#define NV34TCL_SCISSOR_VERT_Y_MASK 0x0000ffff -#define NV34TCL_SCISSOR_VERT_H_SHIFT 16 -#define NV34TCL_SCISSOR_VERT_H_MASK 0xffff0000 -#define NV34TCL_FOG_COORD_DIST 0x000008c8 -#define NV34TCL_FOG_COORD_DIST_COORD_FALSE 0x00000000 -#define NV34TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_RADIAL_NV 0x00000001 -#define NV34TCL_FOG_COORD_DIST_COORD_FRAGMENT_DEPTH_DISTANCE_EYE_PLANE_ABSOLUTE_NV 0x00000002 -#define NV34TCL_FOG_COORD_DIST_COORD_FOG 0x00000003 -#define NV34TCL_FOG_MODE 0x000008cc -#define NV34TCL_FOG_MODE_EXP 0x00000800 -#define NV34TCL_FOG_MODE_EXP_2 0x00000802 -#define NV34TCL_FOG_MODE_EXP2 0x00000803 -#define NV34TCL_FOG_MODE_LINEAR 0x00000804 -#define NV34TCL_FOG_MODE_LINEAR_2 0x00002601 -#define NV34TCL_FOG_EQUATION_CONSTANT 0x000008d0 -#define NV34TCL_FOG_EQUATION_LINEAR 0x000008d4 -#define NV34TCL_FOG_EQUATION_QUADRATIC 0x000008d8 -#define NV34TCL_FP_ACTIVE_PROGRAM 0x000008e4 -#define NV34TCL_FP_ACTIVE_PROGRAM_DMA0 (1 << 0) -#define NV34TCL_FP_ACTIVE_PROGRAM_DMA1 (1 << 1) -#define NV34TCL_FP_ACTIVE_PROGRAM_OFFSET_SHIFT 2 -#define NV34TCL_FP_ACTIVE_PROGRAM_OFFSET_MASK 0xfffffffc -#define NV34TCL_RC_COLOR0 0x000008ec -#define NV34TCL_RC_COLOR0_B_SHIFT 0 -#define NV34TCL_RC_COLOR0_B_MASK 0x000000ff -#define NV34TCL_RC_COLOR0_G_SHIFT 8 -#define NV34TCL_RC_COLOR0_G_MASK 0x0000ff00 -#define NV34TCL_RC_COLOR0_R_SHIFT 16 -#define NV34TCL_RC_COLOR0_R_MASK 0x00ff0000 -#define NV34TCL_RC_COLOR0_A_SHIFT 24 -#define NV34TCL_RC_COLOR0_A_MASK 0xff000000 -#define NV34TCL_RC_COLOR1 0x000008f0 -#define NV34TCL_RC_COLOR1_B_SHIFT 0 -#define NV34TCL_RC_COLOR1_B_MASK 0x000000ff -#define NV34TCL_RC_COLOR1_G_SHIFT 8 -#define NV34TCL_RC_COLOR1_G_MASK 0x0000ff00 -#define NV34TCL_RC_COLOR1_R_SHIFT 16 -#define NV34TCL_RC_COLOR1_R_MASK 0x00ff0000 -#define NV34TCL_RC_COLOR1_A_SHIFT 24 -#define NV34TCL_RC_COLOR1_A_MASK 0xff000000 -#define NV34TCL_RC_FINAL0 0x000008f4 -#define NV34TCL_RC_FINAL0_D_INPUT_SHIFT 0 -#define NV34TCL_RC_FINAL0_D_INPUT_MASK 0x0000000f -#define NV34TCL_RC_FINAL0_D_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV34TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV34TCL_RC_FINAL0_D_INPUT_FOG 0x00000003 -#define NV34TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV34TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV34TCL_RC_FINAL0_D_INPUT_TEXTURE0_ARB 0x00000008 -#define NV34TCL_RC_FINAL0_D_INPUT_TEXTURE1_ARB 0x00000009 -#define NV34TCL_RC_FINAL0_D_INPUT_SPARE0_NV 0x0000000c -#define NV34TCL_RC_FINAL0_D_INPUT_SPARE1_NV 0x0000000d -#define NV34TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV34TCL_RC_FINAL0_D_INPUT_E_TIMES_F_NV 0x0000000f -#define NV34TCL_RC_FINAL0_D_COMPONENT_USAGE (1 << 4) -#define NV34TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA 0x00000010 -#define NV34TCL_RC_FINAL0_D_MAPPING_SHIFT 5 -#define NV34TCL_RC_FINAL0_D_MAPPING_MASK 0x000000e0 -#define NV34TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020 -#define NV34TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL_NV 0x00000040 -#define NV34TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE_NV 0x00000060 -#define NV34TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080 -#define NV34TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0 -#define NV34TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0 -#define NV34TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0 -#define NV34TCL_RC_FINAL0_C_INPUT_SHIFT 8 -#define NV34TCL_RC_FINAL0_C_INPUT_MASK 0x00000f00 -#define NV34TCL_RC_FINAL0_C_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV34TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV34TCL_RC_FINAL0_C_INPUT_FOG 0x00000300 -#define NV34TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV34TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV34TCL_RC_FINAL0_C_INPUT_TEXTURE0_ARB 0x00000800 -#define NV34TCL_RC_FINAL0_C_INPUT_TEXTURE1_ARB 0x00000900 -#define NV34TCL_RC_FINAL0_C_INPUT_SPARE0_NV 0x00000c00 -#define NV34TCL_RC_FINAL0_C_INPUT_SPARE1_NV 0x00000d00 -#define NV34TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV34TCL_RC_FINAL0_C_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV34TCL_RC_FINAL0_C_COMPONENT_USAGE (1 << 12) -#define NV34TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV34TCL_RC_FINAL0_C_MAPPING_SHIFT 13 -#define NV34TCL_RC_FINAL0_C_MAPPING_MASK 0x0000e000 -#define NV34TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV34TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV34TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV34TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV34TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV34TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV34TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV34TCL_RC_FINAL0_B_INPUT_SHIFT 16 -#define NV34TCL_RC_FINAL0_B_INPUT_MASK 0x000f0000 -#define NV34TCL_RC_FINAL0_B_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV34TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV34TCL_RC_FINAL0_B_INPUT_FOG 0x00030000 -#define NV34TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV34TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV34TCL_RC_FINAL0_B_INPUT_TEXTURE0_ARB 0x00080000 -#define NV34TCL_RC_FINAL0_B_INPUT_TEXTURE1_ARB 0x00090000 -#define NV34TCL_RC_FINAL0_B_INPUT_SPARE0_NV 0x000c0000 -#define NV34TCL_RC_FINAL0_B_INPUT_SPARE1_NV 0x000d0000 -#define NV34TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV34TCL_RC_FINAL0_B_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV34TCL_RC_FINAL0_B_COMPONENT_USAGE (1 << 20) -#define NV34TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV34TCL_RC_FINAL0_B_MAPPING_SHIFT 21 -#define NV34TCL_RC_FINAL0_B_MAPPING_MASK 0x00e00000 -#define NV34TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV34TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV34TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV34TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV34TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV34TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV34TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV34TCL_RC_FINAL0_A_INPUT_SHIFT 24 -#define NV34TCL_RC_FINAL0_A_INPUT_MASK 0x0f000000 -#define NV34TCL_RC_FINAL0_A_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV34TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV34TCL_RC_FINAL0_A_INPUT_FOG 0x03000000 -#define NV34TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV34TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV34TCL_RC_FINAL0_A_INPUT_TEXTURE0_ARB 0x08000000 -#define NV34TCL_RC_FINAL0_A_INPUT_TEXTURE1_ARB 0x09000000 -#define NV34TCL_RC_FINAL0_A_INPUT_SPARE0_NV 0x0c000000 -#define NV34TCL_RC_FINAL0_A_INPUT_SPARE1_NV 0x0d000000 -#define NV34TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV34TCL_RC_FINAL0_A_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV34TCL_RC_FINAL0_A_COMPONENT_USAGE (1 << 28) -#define NV34TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV34TCL_RC_FINAL0_A_MAPPING_SHIFT 29 -#define NV34TCL_RC_FINAL0_A_MAPPING_MASK 0xe0000000 -#define NV34TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV34TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV34TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV34TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV34TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV34TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV34TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV34TCL_RC_FINAL1 0x000008f8 -#define NV34TCL_RC_FINAL1_COLOR_SUM_CLAMP (1 << 7) -#define NV34TCL_RC_FINAL1_G_INPUT_SHIFT 8 -#define NV34TCL_RC_FINAL1_G_INPUT_MASK 0x00000f00 -#define NV34TCL_RC_FINAL1_G_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV34TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV34TCL_RC_FINAL1_G_INPUT_FOG 0x00000300 -#define NV34TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV34TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV34TCL_RC_FINAL1_G_INPUT_TEXTURE0_ARB 0x00000800 -#define NV34TCL_RC_FINAL1_G_INPUT_TEXTURE1_ARB 0x00000900 -#define NV34TCL_RC_FINAL1_G_INPUT_SPARE0_NV 0x00000c00 -#define NV34TCL_RC_FINAL1_G_INPUT_SPARE1_NV 0x00000d00 -#define NV34TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV34TCL_RC_FINAL1_G_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV34TCL_RC_FINAL1_G_COMPONENT_USAGE (1 << 12) -#define NV34TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV34TCL_RC_FINAL1_G_MAPPING_SHIFT 13 -#define NV34TCL_RC_FINAL1_G_MAPPING_MASK 0x0000e000 -#define NV34TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV34TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV34TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV34TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV34TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV34TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV34TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV34TCL_RC_FINAL1_F_INPUT_SHIFT 16 -#define NV34TCL_RC_FINAL1_F_INPUT_MASK 0x000f0000 -#define NV34TCL_RC_FINAL1_F_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV34TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV34TCL_RC_FINAL1_F_INPUT_FOG 0x00030000 -#define NV34TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV34TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV34TCL_RC_FINAL1_F_INPUT_TEXTURE0_ARB 0x00080000 -#define NV34TCL_RC_FINAL1_F_INPUT_TEXTURE1_ARB 0x00090000 -#define NV34TCL_RC_FINAL1_F_INPUT_SPARE0_NV 0x000c0000 -#define NV34TCL_RC_FINAL1_F_INPUT_SPARE1_NV 0x000d0000 -#define NV34TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV34TCL_RC_FINAL1_F_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV34TCL_RC_FINAL1_F_COMPONENT_USAGE (1 << 20) -#define NV34TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV34TCL_RC_FINAL1_F_MAPPING_SHIFT 21 -#define NV34TCL_RC_FINAL1_F_MAPPING_MASK 0x00e00000 -#define NV34TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV34TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV34TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV34TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV34TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV34TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV34TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV34TCL_RC_FINAL1_E_INPUT_SHIFT 24 -#define NV34TCL_RC_FINAL1_E_INPUT_MASK 0x0f000000 -#define NV34TCL_RC_FINAL1_E_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV34TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV34TCL_RC_FINAL1_E_INPUT_FOG 0x03000000 -#define NV34TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV34TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV34TCL_RC_FINAL1_E_INPUT_TEXTURE0_ARB 0x08000000 -#define NV34TCL_RC_FINAL1_E_INPUT_TEXTURE1_ARB 0x09000000 -#define NV34TCL_RC_FINAL1_E_INPUT_SPARE0_NV 0x0c000000 -#define NV34TCL_RC_FINAL1_E_INPUT_SPARE1_NV 0x0d000000 -#define NV34TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV34TCL_RC_FINAL1_E_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV34TCL_RC_FINAL1_E_COMPONENT_USAGE (1 << 28) -#define NV34TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV34TCL_RC_FINAL1_E_MAPPING_SHIFT 29 -#define NV34TCL_RC_FINAL1_E_MAPPING_MASK 0xe0000000 -#define NV34TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV34TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV34TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV34TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV34TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV34TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV34TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV34TCL_RC_ENABLE 0x000008fc -#define NV34TCL_RC_ENABLE_NUM_COMBINERS_SHIFT 0 -#define NV34TCL_RC_ENABLE_NUM_COMBINERS_MASK 0x0000000f -#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR0_SHIFT 12 -#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR0_MASK 0x0000f000 -#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR1_SHIFT 16 -#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR1_MASK 0x000f0000 -#define NV34TCL_RC_IN_ALPHA(x) (0x00000900+((x)*32)) -#define NV34TCL_RC_IN_ALPHA__SIZE 0x00000008 -#define NV34TCL_RC_IN_ALPHA_D_INPUT_SHIFT 0 -#define NV34TCL_RC_IN_ALPHA_D_INPUT_MASK 0x0000000f -#define NV34TCL_RC_IN_ALPHA_D_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV34TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV34TCL_RC_IN_ALPHA_D_INPUT_FOG 0x00000003 -#define NV34TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV34TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV34TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0_ARB 0x00000008 -#define NV34TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1_ARB 0x00000009 -#define NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE0_NV 0x0000000c -#define NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE1_NV 0x0000000d -#define NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV34TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F_NV 0x0000000f -#define NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE (1 << 4) -#define NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE 0x00000000 -#define NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA 0x00000010 -#define NV34TCL_RC_IN_ALPHA_D_MAPPING_SHIFT 5 -#define NV34TCL_RC_IN_ALPHA_D_MAPPING_MASK 0x000000e0 -#define NV34TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020 -#define NV34TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL_NV 0x00000040 -#define NV34TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE_NV 0x00000060 -#define NV34TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080 -#define NV34TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0 -#define NV34TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0 -#define NV34TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_SHIFT 8 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_MASK 0x00000f00 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_FOG 0x00000300 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0_ARB 0x00000800 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1_ARB 0x00000900 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE0_NV 0x00000c00 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE1_NV 0x00000d00 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV34TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE (1 << 12) -#define NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE 0x00000000 -#define NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV34TCL_RC_IN_ALPHA_C_MAPPING_SHIFT 13 -#define NV34TCL_RC_IN_ALPHA_C_MAPPING_MASK 0x0000e000 -#define NV34TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV34TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV34TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV34TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV34TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV34TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV34TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_SHIFT 16 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_MASK 0x000f0000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_FOG 0x00030000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0_ARB 0x00080000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1_ARB 0x00090000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE0_NV 0x000c0000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE1_NV 0x000d0000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV34TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE (1 << 20) -#define NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE 0x00000000 -#define NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV34TCL_RC_IN_ALPHA_B_MAPPING_SHIFT 21 -#define NV34TCL_RC_IN_ALPHA_B_MAPPING_MASK 0x00e00000 -#define NV34TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV34TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV34TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV34TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV34TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV34TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV34TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_SHIFT 24 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_MASK 0x0f000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_FOG 0x03000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0_ARB 0x08000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1_ARB 0x09000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE0_NV 0x0c000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE1_NV 0x0d000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV34TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE (1 << 28) -#define NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE 0x00000000 -#define NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV34TCL_RC_IN_ALPHA_A_MAPPING_SHIFT 29 -#define NV34TCL_RC_IN_ALPHA_A_MAPPING_MASK 0xe0000000 -#define NV34TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV34TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV34TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV34TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV34TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV34TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV34TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV34TCL_RC_IN_RGB(x) (0x00000904+((x)*32)) -#define NV34TCL_RC_IN_RGB__SIZE 0x00000008 -#define NV34TCL_RC_IN_RGB_D_INPUT_SHIFT 0 -#define NV34TCL_RC_IN_RGB_D_INPUT_MASK 0x0000000f -#define NV34TCL_RC_IN_RGB_D_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV34TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV34TCL_RC_IN_RGB_D_INPUT_FOG 0x00000003 -#define NV34TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV34TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV34TCL_RC_IN_RGB_D_INPUT_TEXTURE0_ARB 0x00000008 -#define NV34TCL_RC_IN_RGB_D_INPUT_TEXTURE1_ARB 0x00000009 -#define NV34TCL_RC_IN_RGB_D_INPUT_SPARE0_NV 0x0000000c -#define NV34TCL_RC_IN_RGB_D_INPUT_SPARE1_NV 0x0000000d -#define NV34TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV34TCL_RC_IN_RGB_D_INPUT_E_TIMES_F_NV 0x0000000f -#define NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE (1 << 4) -#define NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA 0x00000010 -#define NV34TCL_RC_IN_RGB_D_MAPPING_SHIFT 5 -#define NV34TCL_RC_IN_RGB_D_MAPPING_MASK 0x000000e0 -#define NV34TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT_NV 0x00000020 -#define NV34TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL_NV 0x00000040 -#define NV34TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE_NV 0x00000060 -#define NV34TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL_NV 0x00000080 -#define NV34TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE_NV 0x000000a0 -#define NV34TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY_NV 0x000000c0 -#define NV34TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE_NV 0x000000e0 -#define NV34TCL_RC_IN_RGB_C_INPUT_SHIFT 8 -#define NV34TCL_RC_IN_RGB_C_INPUT_MASK 0x00000f00 -#define NV34TCL_RC_IN_RGB_C_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV34TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV34TCL_RC_IN_RGB_C_INPUT_FOG 0x00000300 -#define NV34TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV34TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV34TCL_RC_IN_RGB_C_INPUT_TEXTURE0_ARB 0x00000800 -#define NV34TCL_RC_IN_RGB_C_INPUT_TEXTURE1_ARB 0x00000900 -#define NV34TCL_RC_IN_RGB_C_INPUT_SPARE0_NV 0x00000c00 -#define NV34TCL_RC_IN_RGB_C_INPUT_SPARE1_NV 0x00000d00 -#define NV34TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV34TCL_RC_IN_RGB_C_INPUT_E_TIMES_F_NV 0x00000f00 -#define NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE (1 << 12) -#define NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA 0x00001000 -#define NV34TCL_RC_IN_RGB_C_MAPPING_SHIFT 13 -#define NV34TCL_RC_IN_RGB_C_MAPPING_MASK 0x0000e000 -#define NV34TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT_NV 0x00002000 -#define NV34TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL_NV 0x00004000 -#define NV34TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE_NV 0x00006000 -#define NV34TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL_NV 0x00008000 -#define NV34TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE_NV 0x0000a000 -#define NV34TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY_NV 0x0000c000 -#define NV34TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE_NV 0x0000e000 -#define NV34TCL_RC_IN_RGB_B_INPUT_SHIFT 16 -#define NV34TCL_RC_IN_RGB_B_INPUT_MASK 0x000f0000 -#define NV34TCL_RC_IN_RGB_B_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0_NV 0x00010000 -#define NV34TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1_NV 0x00020000 -#define NV34TCL_RC_IN_RGB_B_INPUT_FOG 0x00030000 -#define NV34TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR_NV 0x00040000 -#define NV34TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR_NV 0x00050000 -#define NV34TCL_RC_IN_RGB_B_INPUT_TEXTURE0_ARB 0x00080000 -#define NV34TCL_RC_IN_RGB_B_INPUT_TEXTURE1_ARB 0x00090000 -#define NV34TCL_RC_IN_RGB_B_INPUT_SPARE0_NV 0x000c0000 -#define NV34TCL_RC_IN_RGB_B_INPUT_SPARE1_NV 0x000d0000 -#define NV34TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000e0000 -#define NV34TCL_RC_IN_RGB_B_INPUT_E_TIMES_F_NV 0x000f0000 -#define NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE (1 << 20) -#define NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA 0x00100000 -#define NV34TCL_RC_IN_RGB_B_MAPPING_SHIFT 21 -#define NV34TCL_RC_IN_RGB_B_MAPPING_MASK 0x00e00000 -#define NV34TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT_NV 0x00200000 -#define NV34TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL_NV 0x00400000 -#define NV34TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE_NV 0x00600000 -#define NV34TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL_NV 0x00800000 -#define NV34TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE_NV 0x00a00000 -#define NV34TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY_NV 0x00c00000 -#define NV34TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE_NV 0x00e00000 -#define NV34TCL_RC_IN_RGB_A_INPUT_SHIFT 24 -#define NV34TCL_RC_IN_RGB_A_INPUT_MASK 0x0f000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_ZERO 0x00000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0_NV 0x01000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1_NV 0x02000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_FOG 0x03000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR_NV 0x04000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR_NV 0x05000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_TEXTURE0_ARB 0x08000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_TEXTURE1_ARB 0x09000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_SPARE0_NV 0x0c000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_SPARE1_NV 0x0d000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0e000000 -#define NV34TCL_RC_IN_RGB_A_INPUT_E_TIMES_F_NV 0x0f000000 -#define NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE (1 << 28) -#define NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB 0x00000000 -#define NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA 0x10000000 -#define NV34TCL_RC_IN_RGB_A_MAPPING_SHIFT 29 -#define NV34TCL_RC_IN_RGB_A_MAPPING_MASK 0xe0000000 -#define NV34TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY_NV 0x00000000 -#define NV34TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT_NV 0x20000000 -#define NV34TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL_NV 0x40000000 -#define NV34TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE_NV 0x60000000 -#define NV34TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL_NV 0x80000000 -#define NV34TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE_NV 0xa0000000 -#define NV34TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY_NV 0xc0000000 -#define NV34TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE_NV 0xe0000000 -#define NV34TCL_RC_CONSTANT_COLOR0(x) (0x00000908+((x)*32)) -#define NV34TCL_RC_CONSTANT_COLOR0__SIZE 0x00000008 -#define NV34TCL_RC_CONSTANT_COLOR0_B_SHIFT 0 -#define NV34TCL_RC_CONSTANT_COLOR0_B_MASK 0x000000ff -#define NV34TCL_RC_CONSTANT_COLOR0_G_SHIFT 8 -#define NV34TCL_RC_CONSTANT_COLOR0_G_MASK 0x0000ff00 -#define NV34TCL_RC_CONSTANT_COLOR0_R_SHIFT 16 -#define NV34TCL_RC_CONSTANT_COLOR0_R_MASK 0x00ff0000 -#define NV34TCL_RC_CONSTANT_COLOR0_A_SHIFT 24 -#define NV34TCL_RC_CONSTANT_COLOR0_A_MASK 0xff000000 -#define NV34TCL_RC_CONSTANT_COLOR1(x) (0x0000090c+((x)*32)) -#define NV34TCL_RC_CONSTANT_COLOR1__SIZE 0x00000008 -#define NV34TCL_RC_CONSTANT_COLOR1_B_SHIFT 0 -#define NV34TCL_RC_CONSTANT_COLOR1_B_MASK 0x000000ff -#define NV34TCL_RC_CONSTANT_COLOR1_G_SHIFT 8 -#define NV34TCL_RC_CONSTANT_COLOR1_G_MASK 0x0000ff00 -#define NV34TCL_RC_CONSTANT_COLOR1_R_SHIFT 16 -#define NV34TCL_RC_CONSTANT_COLOR1_R_MASK 0x00ff0000 -#define NV34TCL_RC_CONSTANT_COLOR1_A_SHIFT 24 -#define NV34TCL_RC_CONSTANT_COLOR1_A_MASK 0xff000000 -#define NV34TCL_RC_OUT_ALPHA(x) (0x00000910+((x)*32)) -#define NV34TCL_RC_OUT_ALPHA__SIZE 0x00000008 -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT 0 -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK 0x0000000f -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO 0x00000000 -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG 0x00000003 -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0_ARB 0x00000008 -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1_ARB 0x00000009 -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_NV 0x0000000c -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1_NV 0x0000000d -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F_NV 0x0000000f -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT 4 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK 0x000000f0 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO 0x00000000 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG 0x00000030 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0_ARB 0x00000080 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1_ARB 0x00000090 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_NV 0x000000c0 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1_NV 0x000000d0 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0 -#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F_NV 0x000000f0 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT 8 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK 0x00000f00 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO 0x00000000 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG 0x00000300 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0_ARB 0x00000800 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1_ARB 0x00000900 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_NV 0x00000c00 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1_NV 0x00000d00 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00 -#define NV34TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT (1 << 12) -#define NV34TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT (1 << 13) -#define NV34TCL_RC_OUT_ALPHA_MUX_SUM (1 << 14) -#define NV34TCL_RC_OUT_ALPHA_BIAS (1 << 15) -#define NV34TCL_RC_OUT_ALPHA_BIAS_NONE 0x00000000 -#define NV34TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000 -#define NV34TCL_RC_OUT_ALPHA_SCALE_SHIFT 17 -#define NV34TCL_RC_OUT_ALPHA_SCALE_MASK 0x00000000 -#define NV34TCL_RC_OUT_ALPHA_SCALE_NONE 0x00000000 -#define NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO_NV 0x00020000 -#define NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR_NV 0x00040000 -#define NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000 -#define NV34TCL_RC_OUT_RGB(x) (0x00000914+((x)*32)) -#define NV34TCL_RC_OUT_RGB__SIZE 0x00000008 -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT 0 -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_MASK 0x0000000f -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_ZERO 0x00000000 -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0_NV 0x00000001 -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1_NV 0x00000002 -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_FOG 0x00000003 -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR_NV 0x00000004 -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR_NV 0x00000005 -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0_ARB 0x00000008 -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1_ARB 0x00000009 -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_NV 0x0000000c -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1_NV 0x0000000d -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x0000000e -#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F_NV 0x0000000f -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT 4 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_MASK 0x000000f0 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_ZERO 0x00000000 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0_NV 0x00000010 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1_NV 0x00000020 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_FOG 0x00000030 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR_NV 0x00000040 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR_NV 0x00000050 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0_ARB 0x00000080 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1_ARB 0x00000090 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_NV 0x000000c0 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1_NV 0x000000d0 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x000000e0 -#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F_NV 0x000000f0 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT 8 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_MASK 0x00000f00 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO 0x00000000 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0_NV 0x00000100 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1_NV 0x00000200 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_FOG 0x00000300 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR_NV 0x00000400 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR_NV 0x00000500 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0_ARB 0x00000800 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1_ARB 0x00000900 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_NV 0x00000c00 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1_NV 0x00000d00 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR_NV 0x00000e00 -#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F_NV 0x00000f00 -#define NV34TCL_RC_OUT_RGB_CD_DOT_PRODUCT (1 << 12) -#define NV34TCL_RC_OUT_RGB_AB_DOT_PRODUCT (1 << 13) -#define NV34TCL_RC_OUT_RGB_MUX_SUM (1 << 14) -#define NV34TCL_RC_OUT_RGB_BIAS (1 << 15) -#define NV34TCL_RC_OUT_RGB_BIAS_NONE 0x00000000 -#define NV34TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF_NV 0x00008000 -#define NV34TCL_RC_OUT_RGB_SCALE_SHIFT 17 -#define NV34TCL_RC_OUT_RGB_SCALE_MASK 0x00000000 -#define NV34TCL_RC_OUT_RGB_SCALE_NONE 0x00000000 -#define NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO_NV 0x00020000 -#define NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR_NV 0x00040000 -#define NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF_NV 0x00060000 -#define NV34TCL_VIEWPORT_HORIZ 0x00000a00 -#define NV34TCL_VIEWPORT_HORIZ_X_SHIFT 0 -#define NV34TCL_VIEWPORT_HORIZ_X_MASK 0x0000ffff -#define NV34TCL_VIEWPORT_HORIZ_W_SHIFT 16 -#define NV34TCL_VIEWPORT_HORIZ_W_MASK 0xffff0000 -#define NV34TCL_VIEWPORT_VERT 0x00000a04 -#define NV34TCL_VIEWPORT_VERT_Y_SHIFT 0 -#define NV34TCL_VIEWPORT_VERT_Y_MASK 0x0000ffff -#define NV34TCL_VIEWPORT_VERT_H_SHIFT 16 -#define NV34TCL_VIEWPORT_VERT_H_MASK 0xffff0000 -#define NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x00000a10 -#define NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x00000a14 -#define NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x00000a18 -#define NV34TCL_VIEWPORT_TRANSLATE_X 0x00000a20 -#define NV34TCL_VIEWPORT_TRANSLATE_Y 0x00000a24 -#define NV34TCL_VIEWPORT_TRANSLATE_Z 0x00000a28 -#define NV34TCL_VIEWPORT_TRANSLATE_W 0x00000a2c -#define NV34TCL_VIEWPORT_SCALE_X 0x00000a30 -#define NV34TCL_VIEWPORT_SCALE_Y 0x00000a34 -#define NV34TCL_VIEWPORT_SCALE_Z 0x00000a38 -#define NV34TCL_VIEWPORT_SCALE_W 0x00000a3c -#define NV34TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000a60 -#define NV34TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000a64 -#define NV34TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000a68 -#define NV34TCL_DEPTH_FUNC 0x00000a6c -#define NV34TCL_DEPTH_FUNC_NEVER 0x00000200 -#define NV34TCL_DEPTH_FUNC_LESS 0x00000201 -#define NV34TCL_DEPTH_FUNC_EQUAL 0x00000202 -#define NV34TCL_DEPTH_FUNC_LEQUAL 0x00000203 -#define NV34TCL_DEPTH_FUNC_GREATER 0x00000204 -#define NV34TCL_DEPTH_FUNC_GREATER 0x00000204 -#define NV34TCL_DEPTH_FUNC_NOTEQUAL 0x00000205 -#define NV34TCL_DEPTH_FUNC_GEQUAL 0x00000206 -#define NV34TCL_DEPTH_FUNC_ALWAYS 0x00000207 -#define NV34TCL_DEPTH_WRITE_ENABLE 0x00000a70 -#define NV34TCL_DEPTH_TEST_ENABLE 0x00000a74 -#define NV34TCL_POLYGON_OFFSET_FACTOR 0x00000a78 -#define NV34TCL_POLYGON_OFFSET_UNITS 0x00000a7c -#define NV34TCL_VTX_ATTR_3I_XY(x) (0x00000a80+((x)*8)) -#define NV34TCL_VTX_ATTR_3I_XY__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_3I_XY_X_SHIFT 0 -#define NV34TCL_VTX_ATTR_3I_XY_X_MASK 0x0000ffff -#define NV34TCL_VTX_ATTR_3I_XY_Y_SHIFT 16 -#define NV34TCL_VTX_ATTR_3I_XY_Y_MASK 0xffff0000 -#define NV34TCL_VTX_ATTR_3I_Z(x) (0x00000a84+((x)*8)) -#define NV34TCL_VTX_ATTR_3I_Z__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_3I_Z_Z_SHIFT 0 -#define NV34TCL_VTX_ATTR_3I_Z_Z_MASK 0x0000ffff -#define NV34TCL_VP_UPLOAD_INST(x) (0x00000b80+((x)*4)) -#define NV34TCL_VP_UPLOAD_INST__SIZE 0x00000004 -#define NV34TCL_TX0_CLIP_PLANE_A(x) (0x00000e00+((x)*16)) -#define NV34TCL_TX0_CLIP_PLANE_A__SIZE 0x00000004 -#define NV34TCL_TX0_CLIP_PLANE_B(x) (0x00000e04+((x)*16)) -#define NV34TCL_TX0_CLIP_PLANE_B__SIZE 0x00000004 -#define NV34TCL_TX0_CLIP_PLANE_C(x) (0x00000e08+((x)*16)) -#define NV34TCL_TX0_CLIP_PLANE_C__SIZE 0x00000004 -#define NV34TCL_TX0_CLIP_PLANE_D(x) (0x00000e0c+((x)*16)) -#define NV34TCL_TX0_CLIP_PLANE_D__SIZE 0x00000004 -#define NV34TCL_TX1_CLIP_PLANE_A(x) (0x00000e40+((x)*16)) -#define NV34TCL_TX1_CLIP_PLANE_A__SIZE 0x00000004 -#define NV34TCL_TX1_CLIP_PLANE_B(x) (0x00000e44+((x)*16)) -#define NV34TCL_TX1_CLIP_PLANE_B__SIZE 0x00000004 -#define NV34TCL_TX1_CLIP_PLANE_C(x) (0x00000e48+((x)*16)) -#define NV34TCL_TX1_CLIP_PLANE_C__SIZE 0x00000004 -#define NV34TCL_TX1_CLIP_PLANE_D(x) (0x00000e4c+((x)*16)) -#define NV34TCL_TX1_CLIP_PLANE_D__SIZE 0x00000004 -#define NV34TCL_TX2_CLIP_PLANE_A(x) (0x00000e80+((x)*16)) -#define NV34TCL_TX2_CLIP_PLANE_A__SIZE 0x00000004 -#define NV34TCL_TX2_CLIP_PLANE_B(x) (0x00000e84+((x)*16)) -#define NV34TCL_TX2_CLIP_PLANE_B__SIZE 0x00000004 -#define NV34TCL_TX2_CLIP_PLANE_C(x) (0x00000e88+((x)*16)) -#define NV34TCL_TX2_CLIP_PLANE_C__SIZE 0x00000004 -#define NV34TCL_TX2_CLIP_PLANE_D(x) (0x00000e8c+((x)*16)) -#define NV34TCL_TX2_CLIP_PLANE_D__SIZE 0x00000004 -#define NV34TCL_TX3_CLIP_PLANE_A(x) (0x00000ec0+((x)*16)) -#define NV34TCL_TX3_CLIP_PLANE_A__SIZE 0x00000004 -#define NV34TCL_TX3_CLIP_PLANE_B(x) (0x00000ec4+((x)*16)) -#define NV34TCL_TX3_CLIP_PLANE_B__SIZE 0x00000004 -#define NV34TCL_TX3_CLIP_PLANE_C(x) (0x00000ec8+((x)*16)) -#define NV34TCL_TX3_CLIP_PLANE_C__SIZE 0x00000004 -#define NV34TCL_TX3_CLIP_PLANE_D(x) (0x00000ecc+((x)*16)) -#define NV34TCL_TX3_CLIP_PLANE_D__SIZE 0x00000004 -#define NV34TCL_TX4_CLIP_PLANE_A(x) (0x00000f00+((x)*16)) -#define NV34TCL_TX4_CLIP_PLANE_A__SIZE 0x00000004 -#define NV34TCL_TX4_CLIP_PLANE_B(x) (0x00000f04+((x)*16)) -#define NV34TCL_TX4_CLIP_PLANE_B__SIZE 0x00000004 -#define NV34TCL_TX4_CLIP_PLANE_C(x) (0x00000f08+((x)*16)) -#define NV34TCL_TX4_CLIP_PLANE_C__SIZE 0x00000004 -#define NV34TCL_TX4_CLIP_PLANE_D(x) (0x00000f0c+((x)*16)) -#define NV34TCL_TX4_CLIP_PLANE_D__SIZE 0x00000004 -#define NV34TCL_TX5_CLIP_PLANE_A(x) (0x00000f40+((x)*16)) -#define NV34TCL_TX5_CLIP_PLANE_A__SIZE 0x00000004 -#define NV34TCL_TX5_CLIP_PLANE_B(x) (0x00000f44+((x)*16)) -#define NV34TCL_TX5_CLIP_PLANE_B__SIZE 0x00000004 -#define NV34TCL_TX5_CLIP_PLANE_C(x) (0x00000f48+((x)*16)) -#define NV34TCL_TX5_CLIP_PLANE_C__SIZE 0x00000004 -#define NV34TCL_TX5_CLIP_PLANE_D(x) (0x00000f4c+((x)*16)) -#define NV34TCL_TX5_CLIP_PLANE_D__SIZE 0x00000004 -#define NV34TCL_TX6_CLIP_PLANE_A(x) (0x00000f80+((x)*16)) -#define NV34TCL_TX6_CLIP_PLANE_A__SIZE 0x00000004 -#define NV34TCL_TX6_CLIP_PLANE_B(x) (0x00000f84+((x)*16)) -#define NV34TCL_TX6_CLIP_PLANE_B__SIZE 0x00000004 -#define NV34TCL_TX6_CLIP_PLANE_C(x) (0x00000f88+((x)*16)) -#define NV34TCL_TX6_CLIP_PLANE_C__SIZE 0x00000004 -#define NV34TCL_TX6_CLIP_PLANE_D(x) (0x00000f8c+((x)*16)) -#define NV34TCL_TX6_CLIP_PLANE_D__SIZE 0x00000004 -#define NV34TCL_TX7_CLIP_PLANE_A(x) (0x00000fc0+((x)*16)) -#define NV34TCL_TX7_CLIP_PLANE_A__SIZE 0x00000004 -#define NV34TCL_TX7_CLIP_PLANE_B(x) (0x00000fc4+((x)*16)) -#define NV34TCL_TX7_CLIP_PLANE_B__SIZE 0x00000004 -#define NV34TCL_TX7_CLIP_PLANE_C(x) (0x00000fc8+((x)*16)) -#define NV34TCL_TX7_CLIP_PLANE_C__SIZE 0x00000004 -#define NV34TCL_TX7_CLIP_PLANE_D(x) (0x00000fcc+((x)*16)) -#define NV34TCL_TX7_CLIP_PLANE_D__SIZE 0x00000004 -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(x) (0x00001000+((x)*64)) -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R__SIZE 0x00000008 -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(x) (0x00001004+((x)*64)) -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G__SIZE 0x00000008 -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(x) (0x00001008+((x)*64)) -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B__SIZE 0x00000008 -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(x) (0x0000100c+((x)*64)) -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R__SIZE 0x00000008 -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(x) (0x00001010+((x)*64)) -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G__SIZE 0x00000008 -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(x) (0x00001014+((x)*64)) -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B__SIZE 0x00000008 -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(x) (0x00001018+((x)*64)) -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R__SIZE 0x00000008 -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(x) (0x0000101c+((x)*64)) -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G__SIZE 0x00000008 -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(x) (0x00001020+((x)*64)) -#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B__SIZE 0x00000008 -#define NV34TCL_LIGHT_HALF_VECTOR_X(x) (0x00001028+((x)*64)) -#define NV34TCL_LIGHT_HALF_VECTOR_X__SIZE 0x00000008 -#define NV34TCL_LIGHT_HALF_VECTOR_Y(x) (0x0000102c+((x)*64)) -#define NV34TCL_LIGHT_HALF_VECTOR_Y__SIZE 0x00000008 -#define NV34TCL_LIGHT_HALF_VECTOR_Z(x) (0x00001030+((x)*64)) -#define NV34TCL_LIGHT_HALF_VECTOR_Z__SIZE 0x00000008 -#define NV34TCL_LIGHT_DIRECTION_X(x) (0x00001034+((x)*64)) -#define NV34TCL_LIGHT_DIRECTION_X__SIZE 0x00000008 -#define NV34TCL_LIGHT_DIRECTION_Y(x) (0x00001038+((x)*64)) -#define NV34TCL_LIGHT_DIRECTION_Y__SIZE 0x00000008 -#define NV34TCL_LIGHT_DIRECTION_Z(x) (0x0000103c+((x)*64)) -#define NV34TCL_LIGHT_DIRECTION_Z__SIZE 0x00000008 -#define NV34TCL_LIGHT_SPOT_CUTOFF_A(x) (0x00001200+((x)*64)) -#define NV34TCL_LIGHT_SPOT_CUTOFF_A__SIZE 0x00000008 -#define NV34TCL_LIGHT_SPOT_CUTOFF_B(x) (0x00001204+((x)*64)) -#define NV34TCL_LIGHT_SPOT_CUTOFF_B__SIZE 0x00000008 -#define NV34TCL_LIGHT_SPOT_CUTOFF_C(x) (0x00001208+((x)*64)) -#define NV34TCL_LIGHT_SPOT_CUTOFF_C__SIZE 0x00000008 -#define NV34TCL_LIGHT_SPOT_DIR_X(x) (0x0000120c+((x)*64)) -#define NV34TCL_LIGHT_SPOT_DIR_X__SIZE 0x00000008 -#define NV34TCL_LIGHT_SPOT_DIR_Y(x) (0x00001210+((x)*64)) -#define NV34TCL_LIGHT_SPOT_DIR_Y__SIZE 0x00000008 -#define NV34TCL_LIGHT_SPOT_DIR_Z(x) (0x00001214+((x)*64)) -#define NV34TCL_LIGHT_SPOT_DIR_Z__SIZE 0x00000008 -#define NV34TCL_LIGHT_SPOT_CUTOFF_D(x) (0x00001218+((x)*64)) -#define NV34TCL_LIGHT_SPOT_CUTOFF_D__SIZE 0x00000008 -#define NV34TCL_LIGHT_POSITION_X(x) (0x0000121c+((x)*64)) -#define NV34TCL_LIGHT_POSITION_X__SIZE 0x00000008 -#define NV34TCL_LIGHT_POSITION_Y(x) (0x00001220+((x)*64)) -#define NV34TCL_LIGHT_POSITION_Y__SIZE 0x00000008 -#define NV34TCL_LIGHT_POSITION_Z(x) (0x00001224+((x)*64)) -#define NV34TCL_LIGHT_POSITION_Z__SIZE 0x00000008 -#define NV34TCL_LIGHT_ATTENUATION_CONSTANT(x) (0x00001228+((x)*64)) -#define NV34TCL_LIGHT_ATTENUATION_CONSTANT__SIZE 0x00000008 -#define NV34TCL_LIGHT_ATTENUATION_LINEAR(x) (0x0000122c+((x)*64)) -#define NV34TCL_LIGHT_ATTENUATION_LINEAR__SIZE 0x00000008 -#define NV34TCL_LIGHT_ATTENUATION_QUADRATIC(x) (0x00001230+((x)*64)) -#define NV34TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE 0x00000008 -#define NV34TCL_FRONT_MATERIAL_SHININESS(x) (0x00001400+((x)*4)) -#define NV34TCL_FRONT_MATERIAL_SHININESS__SIZE 0x00000006 -#define NV34TCL_ENABLED_LIGHTS 0x00001420 -#define NV34TCL_FP_REG_CONTROL 0x00001450 -#define NV34TCL_FP_REG_CONTROL_UNK1_SHIFT 16 -#define NV34TCL_FP_REG_CONTROL_UNK1_MASK 0xffff0000 -#define NV34TCL_FP_REG_CONTROL_UNK0_SHIFT 0 -#define NV34TCL_FP_REG_CONTROL_UNK0_MASK 0x0000ffff -#define NV34TCL_VP_CLIP_PLANES_ENABLE 0x00001478 -#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE0 (1 << 1) -#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE1 (1 << 5) -#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE2 (1 << 9) -#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE3 (1 << 13) -#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE4 (1 << 17) -#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE5 (1 << 21) -#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE6 (1 << 25) -#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE7 (1 << 29) -#define NV34TCL_POLYGON_STIPPLE_ENABLE 0x0000147c -#define NV34TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4)) -#define NV34TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020 -#define NV34TCL_VTX_ATTR_3F_X(x) (0x00001500+((x)*16)) -#define NV34TCL_VTX_ATTR_3F_X__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_3F_Y(x) (0x00001504+((x)*16)) -#define NV34TCL_VTX_ATTR_3F_Y__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_3F_Z(x) (0x00001508+((x)*16)) -#define NV34TCL_VTX_ATTR_3F_Z__SIZE 0x00000010 -#define NV34TCL_VP_CLIP_PLANE_A(x) (0x00001600+((x)*16)) -#define NV34TCL_VP_CLIP_PLANE_A__SIZE 0x00000006 -#define NV34TCL_VP_CLIP_PLANE_B(x) (0x00001604+((x)*16)) -#define NV34TCL_VP_CLIP_PLANE_B__SIZE 0x00000006 -#define NV34TCL_VP_CLIP_PLANE_C(x) (0x00001608+((x)*16)) -#define NV34TCL_VP_CLIP_PLANE_C__SIZE 0x00000006 -#define NV34TCL_VP_CLIP_PLANE_D(x) (0x0000160c+((x)*16)) -#define NV34TCL_VP_CLIP_PLANE_D__SIZE 0x00000006 -#define NV34TCL_VTXBUF_ADDRESS(x) (0x00001680+((x)*4)) -#define NV34TCL_VTXBUF_ADDRESS__SIZE 0x00000010 -#define NV34TCL_VTXBUF_ADDRESS_DMA1 (1 << 31) -#define NV34TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0 -#define NV34TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff -#define NV34TCL_VTXFMT(x) (0x00001740+((x)*4)) -#define NV34TCL_VTXFMT__SIZE 0x00000010 -#define NV34TCL_VTXFMT_TYPE_SHIFT 0 -#define NV34TCL_VTXFMT_TYPE_MASK 0x0000000f -#define NV34TCL_VTXFMT_TYPE_FLOAT 0x00000002 -#define NV34TCL_VTXFMT_TYPE_UBYTE 0x00000004 -#define NV34TCL_VTXFMT_TYPE_USHORT 0x00000005 -#define NV34TCL_VTXFMT_SIZE_SHIFT 4 -#define NV34TCL_VTXFMT_SIZE_MASK 0x000000f0 -#define NV34TCL_VTXFMT_STRIDE_SHIFT 8 -#define NV34TCL_VTXFMT_STRIDE_MASK 0x0000ff00 -#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x000017a0 -#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x000017a4 -#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x000017a8 -#define NV34TCL_COLOR_MATERIAL_BACK_R 0x000017b0 -#define NV34TCL_COLOR_MATERIAL_BACK_G 0x000017b4 -#define NV34TCL_COLOR_MATERIAL_BACK_B 0x000017b8 -#define NV34TCL_COLOR_MATERIAL_BACK_A 0x000017c0 -#define NV34TCL_QUERY_RESET 0x000017c8 -#define NV34TCL_QUERY_UNK17CC 0x000017cc -#define NV34TCL_QUERY_GET 0x00001800 -#define NV34TCL_QUERY_GET_UNK24_SHIFT 24 -#define NV34TCL_QUERY_GET_UNK24_MASK 0xff000000 -#define NV34TCL_QUERY_GET_OFFSET_SHIFT 0 -#define NV34TCL_QUERY_GET_OFFSET_MASK 0x00ffffff -#define NV34TCL_VERTEX_BEGIN_END 0x00001808 -#define NV34TCL_VERTEX_BEGIN_END_STOP 0x00000000 -#define NV34TCL_VERTEX_BEGIN_END_POINTS 0x00000001 -#define NV34TCL_VERTEX_BEGIN_END_LINES 0x00000002 -#define NV34TCL_VERTEX_BEGIN_END_LINE_LOOP 0x00000003 -#define NV34TCL_VERTEX_BEGIN_END_LINE_STRIP 0x00000004 -#define NV34TCL_VERTEX_BEGIN_END_TRIANGLES 0x00000005 -#define NV34TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP 0x00000006 -#define NV34TCL_VERTEX_BEGIN_END_TRIANGLE_FAN 0x00000007 -#define NV34TCL_VERTEX_BEGIN_END_QUADS 0x00000008 -#define NV34TCL_VERTEX_BEGIN_END_QUAD_STRIP 0x00000009 -#define NV34TCL_VERTEX_BEGIN_END_POLYGON 0x0000000a -#define NV34TCL_VB_ELEMENT_U16 0x0000180c -#define NV34TCL_VB_ELEMENT_U16_I0_SHIFT 0 -#define NV34TCL_VB_ELEMENT_U16_I0_MASK 0x0000ffff -#define NV34TCL_VB_ELEMENT_U16_I1_SHIFT 16 -#define NV34TCL_VB_ELEMENT_U16_I1_MASK 0xffff0000 -#define NV34TCL_VB_ELEMENT_U32 0x00001810 -#define NV34TCL_VB_VERTEX_BATCH 0x00001814 -#define NV34TCL_VB_VERTEX_BATCH_OFFSET_SHIFT 0 -#define NV34TCL_VB_VERTEX_BATCH_OFFSET_MASK 0x00ffffff -#define NV34TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24 -#define NV34TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000 -#define NV34TCL_VERTEX_DATA 0x00001818 -#define NV34TCL_IDXBUF_ADDRESS 0x0000181c -#define NV34TCL_IDXBUF_FORMAT 0x00001820 -#define NV34TCL_IDXBUF_FORMAT_TYPE_SHIFT 4 -#define NV34TCL_IDXBUF_FORMAT_TYPE_MASK 0x000000f0 -#define NV34TCL_IDXBUF_FORMAT_TYPE_U32 0x00000000 -#define NV34TCL_IDXBUF_FORMAT_TYPE_U16 0x00000010 -#define NV34TCL_IDXBUF_FORMAT_DMA1 (1 << 0) -#define NV34TCL_VB_INDEX_BATCH 0x00001824 -#define NV34TCL_VB_INDEX_BATCH_COUNT_SHIFT 24 -#define NV34TCL_VB_INDEX_BATCH_COUNT_MASK 0xff000000 -#define NV34TCL_VB_INDEX_BATCH_START_SHIFT 0 -#define NV34TCL_VB_INDEX_BATCH_START_MASK 0x00ffffff -#define NV34TCL_POLYGON_MODE_FRONT 0x00001828 -#define NV34TCL_POLYGON_MODE_FRONT_POINT 0x00001b00 -#define NV34TCL_POLYGON_MODE_FRONT_LINE 0x00001b01 -#define NV34TCL_POLYGON_MODE_FRONT_FILL 0x00001b02 -#define NV34TCL_POLYGON_MODE_BACK 0x0000182c -#define NV34TCL_POLYGON_MODE_BACK_POINT 0x00001b00 -#define NV34TCL_POLYGON_MODE_BACK_LINE 0x00001b01 -#define NV34TCL_POLYGON_MODE_BACK_FILL 0x00001b02 -#define NV34TCL_CULL_FACE 0x00001830 -#define NV34TCL_CULL_FACE_FRONT 0x00000404 -#define NV34TCL_CULL_FACE_BACK 0x00000405 -#define NV34TCL_CULL_FACE_FRONT_AND_BACK 0x00000408 -#define NV34TCL_FRONT_FACE 0x00001834 -#define NV34TCL_FRONT_FACE_CW 0x00000900 -#define NV34TCL_FRONT_FACE_CCW 0x00000901 -#define NV34TCL_POLYGON_SMOOTH_ENABLE 0x00001838 -#define NV34TCL_CULL_FACE_ENABLE 0x0000183c -#define NV34TCL_TX_PALETTE_OFFSET(x) (0x00001840+((x)*4)) -#define NV34TCL_TX_PALETTE_OFFSET__SIZE 0x00000004 -#define NV34TCL_VTX_ATTR_2F_X(x) (0x00001880+((x)*8)) -#define NV34TCL_VTX_ATTR_2F_X__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_2F_Y(x) (0x00001884+((x)*8)) -#define NV34TCL_VTX_ATTR_2F_Y__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_2I(x) (0x00001900+((x)*4)) -#define NV34TCL_VTX_ATTR_2I__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_2I_X_SHIFT 0 -#define NV34TCL_VTX_ATTR_2I_X_MASK 0x0000ffff -#define NV34TCL_VTX_ATTR_2I_Y_SHIFT 16 -#define NV34TCL_VTX_ATTR_2I_Y_MASK 0xffff0000 -#define NV34TCL_VTX_ATTR_4UB(x) (0x00001940+((x)*4)) -#define NV34TCL_VTX_ATTR_4UB__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_4UB_X_SHIFT 0 -#define NV34TCL_VTX_ATTR_4UB_X_MASK 0x000000ff -#define NV34TCL_VTX_ATTR_4UB_Y_SHIFT 8 -#define NV34TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00 -#define NV34TCL_VTX_ATTR_4UB_Z_SHIFT 16 -#define NV34TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000 -#define NV34TCL_VTX_ATTR_4UB_W_SHIFT 24 -#define NV34TCL_VTX_ATTR_4UB_W_MASK 0xff000000 -#define NV34TCL_VTX_ATTR_4I_XY(x) (0x00001980+((x)*8)) -#define NV34TCL_VTX_ATTR_4I_XY__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_4I_XY_X_SHIFT 0 -#define NV34TCL_VTX_ATTR_4I_XY_X_MASK 0x0000ffff -#define NV34TCL_VTX_ATTR_4I_XY_Y_SHIFT 16 -#define NV34TCL_VTX_ATTR_4I_XY_Y_MASK 0xffff0000 -#define NV34TCL_VTX_ATTR_4I_ZW(x) (0x00001984+((x)*8)) -#define NV34TCL_VTX_ATTR_4I_ZW__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_4I_ZW_Z_SHIFT 0 -#define NV34TCL_VTX_ATTR_4I_ZW_Z_MASK 0x0000ffff -#define NV34TCL_VTX_ATTR_4I_ZW_W_SHIFT 16 -#define NV34TCL_VTX_ATTR_4I_ZW_W_MASK 0xffff0000 -#define NV34TCL_TX_OFFSET(x) (0x00001a00+((x)*32)) -#define NV34TCL_TX_OFFSET__SIZE 0x00000004 -#define NV34TCL_TX_FORMAT(x) (0x00001a04+((x)*32)) -#define NV34TCL_TX_FORMAT__SIZE 0x00000004 -#define NV34TCL_TX_FORMAT_DMA0 (1 << 0) -#define NV34TCL_TX_FORMAT_DMA1 (1 << 1) -#define NV34TCL_TX_FORMAT_CUBIC (1 << 2) -#define NV34TCL_TX_FORMAT_NO_BORDER (1 << 3) -#define NV34TCL_TX_FORMAT_DIMS_SHIFT 4 -#define NV34TCL_TX_FORMAT_DIMS_MASK 0x000000f0 -#define NV34TCL_TX_FORMAT_DIMS_1D 0x00000010 -#define NV34TCL_TX_FORMAT_DIMS_2D 0x00000020 -#define NV34TCL_TX_FORMAT_DIMS_3D 0x00000030 -#define NV34TCL_TX_FORMAT_FORMAT_SHIFT 8 -#define NV34TCL_TX_FORMAT_FORMAT_MASK 0x0000ff00 -#define NV34TCL_TX_FORMAT_FORMAT_L8 0x00000000 -#define NV34TCL_TX_FORMAT_FORMAT_A8 0x00000100 -#define NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000200 -#define NV34TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000300 -#define NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000400 -#define NV34TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000500 -#define NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000600 -#define NV34TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000700 -#define NV34TCL_TX_FORMAT_FORMAT_INDEX8 0x00000b00 -#define NV34TCL_TX_FORMAT_FORMAT_DXT1 0x00000c00 -#define NV34TCL_TX_FORMAT_FORMAT_DXT3 0x00000e00 -#define NV34TCL_TX_FORMAT_FORMAT_DXT5 0x00000f00 -#define NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00001000 -#define NV34TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00001100 -#define NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00001200 -#define NV34TCL_TX_FORMAT_FORMAT_L8_RECT 0x00001300 -#define NV34TCL_TX_FORMAT_FORMAT_A8L8 0x00001a00 -#define NV34TCL_TX_FORMAT_FORMAT_A8_RECT2 0x00001b00 -#define NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00001d00 -#define NV34TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00001e00 -#define NV34TCL_TX_FORMAT_FORMAT_L8A8_RECT 0x00002000 -#define NV34TCL_TX_FORMAT_FORMAT_DSDT 0x00002800 -#define NV34TCL_TX_FORMAT_FORMAT_A16 0x00003200 -#define NV34TCL_TX_FORMAT_FORMAT_HILO16 0x00003300 -#define NV34TCL_TX_FORMAT_FORMAT_A16_RECT 0x00003500 -#define NV34TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00003600 -#define NV34TCL_TX_FORMAT_FORMAT_HILO8 0x00004400 -#define NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00004500 -#define NV34TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00004600 -#define NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00004700 -#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00004a00 -#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00004b00 -#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00004c00 -#define NV34TCL_TX_FORMAT_MIPMAP (1 << 19) -#define NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 20 -#define NV34TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x00f00000 -#define NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT 24 -#define NV34TCL_TX_FORMAT_BASE_SIZE_V_MASK 0x0f000000 -#define NV34TCL_TX_FORMAT_BASE_SIZE_W_SHIFT 28 -#define NV34TCL_TX_FORMAT_BASE_SIZE_W_MASK 0xf0000000 -#define NV34TCL_TX_WRAP(x) (0x00001a08+((x)*32)) -#define NV34TCL_TX_WRAP__SIZE 0x00000004 -#define NV34TCL_TX_WRAP_S_SHIFT 0 -#define NV34TCL_TX_WRAP_S_MASK 0x000000ff -#define NV34TCL_TX_WRAP_S_REPEAT 0x00000001 -#define NV34TCL_TX_WRAP_S_MIRRORED_REPEAT 0x00000002 -#define NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE 0x00000003 -#define NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER 0x00000004 -#define NV34TCL_TX_WRAP_S_CLAMP 0x00000005 -#define NV34TCL_TX_WRAP_T_SHIFT 8 -#define NV34TCL_TX_WRAP_T_MASK 0x00000f00 -#define NV34TCL_TX_WRAP_T_REPEAT 0x00000100 -#define NV34TCL_TX_WRAP_T_MIRRORED_REPEAT 0x00000200 -#define NV34TCL_TX_WRAP_T_CLAMP_TO_EDGE 0x00000300 -#define NV34TCL_TX_WRAP_T_CLAMP_TO_BORDER 0x00000400 -#define NV34TCL_TX_WRAP_T_CLAMP 0x00000500 -#define NV34TCL_TX_WRAP_EXPAND_NORMAL_SHIFT 12 -#define NV34TCL_TX_WRAP_EXPAND_NORMAL_MASK 0x0000f000 -#define NV34TCL_TX_WRAP_R_SHIFT 16 -#define NV34TCL_TX_WRAP_R_MASK 0x000f0000 -#define NV34TCL_TX_WRAP_R_REPEAT 0x00010000 -#define NV34TCL_TX_WRAP_R_MIRRORED_REPEAT 0x00020000 -#define NV34TCL_TX_WRAP_R_CLAMP_TO_EDGE 0x00030000 -#define NV34TCL_TX_WRAP_R_CLAMP_TO_BORDER 0x00040000 -#define NV34TCL_TX_WRAP_R_CLAMP 0x00050000 -#define NV34TCL_TX_WRAP_RCOMP_SHIFT 28 -#define NV34TCL_TX_WRAP_RCOMP_MASK 0xf0000000 -#define NV34TCL_TX_WRAP_RCOMP_NEVER 0x00000000 -#define NV34TCL_TX_WRAP_RCOMP_GREATER 0x10000000 -#define NV34TCL_TX_WRAP_RCOMP_EQUAL 0x20000000 -#define NV34TCL_TX_WRAP_RCOMP_GEQUAL 0x30000000 -#define NV34TCL_TX_WRAP_RCOMP_LESS 0x40000000 -#define NV34TCL_TX_WRAP_RCOMP_NOTEQUAL 0x50000000 -#define NV34TCL_TX_WRAP_RCOMP_LEQUAL 0x60000000 -#define NV34TCL_TX_WRAP_RCOMP_ALWAYS 0x70000000 -#define NV34TCL_TX_ENABLE(x) (0x00001a0c+((x)*32)) -#define NV34TCL_TX_ENABLE__SIZE 0x00000004 -#define NV34TCL_TX_ENABLE_ANISO_SHIFT 4 -#define NV34TCL_TX_ENABLE_ANISO_MASK 0x00000030 -#define NV34TCL_TX_ENABLE_ANISO_NONE 0x00000000 -#define NV34TCL_TX_ENABLE_ANISO_2X 0x00000010 -#define NV34TCL_TX_ENABLE_ANISO_4X 0x00000020 -#define NV34TCL_TX_ENABLE_ANISO_8X 0x00000030 -#define NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT 14 -#define NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK 0x0003c000 -#define NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT 26 -#define NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK 0x3c000000 -#define NV34TCL_TX_ENABLE_ENABLE (1 << 30) -#define NV34TCL_TX_SWIZZLE(x) (0x00001a10+((x)*32)) -#define NV34TCL_TX_SWIZZLE__SIZE 0x00000004 -#define NV34TCL_TX_SWIZZLE_S0_X_SHIFT 14 -#define NV34TCL_TX_SWIZZLE_S0_X_MASK 0x0000c000 -#define NV34TCL_TX_SWIZZLE_S0_X_ZERO 0x00000000 -#define NV34TCL_TX_SWIZZLE_S0_X_ONE 0x00004000 -#define NV34TCL_TX_SWIZZLE_S0_X_S1 0x00008000 -#define NV34TCL_TX_SWIZZLE_S0_Y_SHIFT 12 -#define NV34TCL_TX_SWIZZLE_S0_Y_MASK 0x00003000 -#define NV34TCL_TX_SWIZZLE_S0_Y_ZERO 0x00000000 -#define NV34TCL_TX_SWIZZLE_S0_Y_ONE 0x00001000 -#define NV34TCL_TX_SWIZZLE_S0_Y_S1 0x00002000 -#define NV34TCL_TX_SWIZZLE_S0_Z_SHIFT 10 -#define NV34TCL_TX_SWIZZLE_S0_Z_MASK 0x00000c00 -#define NV34TCL_TX_SWIZZLE_S0_Z_ZERO 0x00000000 -#define NV34TCL_TX_SWIZZLE_S0_Z_ONE 0x00000400 -#define NV34TCL_TX_SWIZZLE_S0_Z_S1 0x00000800 -#define NV34TCL_TX_SWIZZLE_S0_W_SHIFT 8 -#define NV34TCL_TX_SWIZZLE_S0_W_MASK 0x00000300 -#define NV34TCL_TX_SWIZZLE_S0_W_ZERO 0x00000000 -#define NV34TCL_TX_SWIZZLE_S0_W_ONE 0x00000100 -#define NV34TCL_TX_SWIZZLE_S0_W_S1 0x00000200 -#define NV34TCL_TX_SWIZZLE_S1_X_SHIFT 6 -#define NV34TCL_TX_SWIZZLE_S1_X_MASK 0x000000c0 -#define NV34TCL_TX_SWIZZLE_S1_X_W 0x00000000 -#define NV34TCL_TX_SWIZZLE_S1_X_Z 0x00000040 -#define NV34TCL_TX_SWIZZLE_S1_X_Y 0x00000080 -#define NV34TCL_TX_SWIZZLE_S1_X_X 0x000000c0 -#define NV34TCL_TX_SWIZZLE_S1_Y_SHIFT 4 -#define NV34TCL_TX_SWIZZLE_S1_Y_MASK 0x00000030 -#define NV34TCL_TX_SWIZZLE_S1_Y_W 0x00000000 -#define NV34TCL_TX_SWIZZLE_S1_Y_Z 0x00000010 -#define NV34TCL_TX_SWIZZLE_S1_Y_Y 0x00000020 -#define NV34TCL_TX_SWIZZLE_S1_Y_X 0x00000030 -#define NV34TCL_TX_SWIZZLE_S1_Z_SHIFT 2 -#define NV34TCL_TX_SWIZZLE_S1_Z_MASK 0x0000000c -#define NV34TCL_TX_SWIZZLE_S1_Z_W 0x00000000 -#define NV34TCL_TX_SWIZZLE_S1_Z_Z 0x00000004 -#define NV34TCL_TX_SWIZZLE_S1_Z_Y 0x00000008 -#define NV34TCL_TX_SWIZZLE_S1_Z_X 0x0000000c -#define NV34TCL_TX_SWIZZLE_S1_W_SHIFT 0 -#define NV34TCL_TX_SWIZZLE_S1_W_MASK 0x00000003 -#define NV34TCL_TX_SWIZZLE_S1_W_W 0x00000000 -#define NV34TCL_TX_SWIZZLE_S1_W_Z 0x00000001 -#define NV34TCL_TX_SWIZZLE_S1_W_Y 0x00000002 -#define NV34TCL_TX_SWIZZLE_S1_W_X 0x00000003 -#define NV34TCL_TX_SWIZZLE_RECT_PITCH_SHIFT 16 -#define NV34TCL_TX_SWIZZLE_RECT_PITCH_MASK 0xffff0000 -#define NV34TCL_TX_FILTER(x) (0x00001a14+((x)*32)) -#define NV34TCL_TX_FILTER__SIZE 0x00000004 -#define NV34TCL_TX_FILTER_LOD_BIAS_SHIFT 8 -#define NV34TCL_TX_FILTER_LOD_BIAS_MASK 0x00000f00 -#define NV34TCL_TX_FILTER_MINIFY_SHIFT 16 -#define NV34TCL_TX_FILTER_MINIFY_MASK 0x000f0000 -#define NV34TCL_TX_FILTER_MINIFY_NEAREST 0x00010000 -#define NV34TCL_TX_FILTER_MINIFY_LINEAR 0x00020000 -#define NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x00030000 -#define NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x00040000 -#define NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x00050000 -#define NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x00060000 -#define NV34TCL_TX_FILTER_MAGNIFY_SHIFT 24 -#define NV34TCL_TX_FILTER_MAGNIFY_MASK 0x0f000000 -#define NV34TCL_TX_FILTER_MAGNIFY_NEAREST 0x01000000 -#define NV34TCL_TX_FILTER_MAGNIFY_LINEAR 0x02000000 -#define NV34TCL_TX_FILTER_SIGNED_BLUE (1 << 28) -#define NV34TCL_TX_FILTER_SIGNED_GREEN (1 << 29) -#define NV34TCL_TX_FILTER_SIGNED_RED (1 << 30) -#define NV34TCL_TX_FILTER_SIGNED_ALPHA (1 << 31) -#define NV34TCL_TX_NPOT_SIZE(x) (0x00001a18+((x)*32)) -#define NV34TCL_TX_NPOT_SIZE__SIZE 0x00000004 -#define NV34TCL_TX_NPOT_SIZE_H_SHIFT 0 -#define NV34TCL_TX_NPOT_SIZE_H_MASK 0x0000ffff -#define NV34TCL_TX_NPOT_SIZE_W_SHIFT 16 -#define NV34TCL_TX_NPOT_SIZE_W_MASK 0xffff0000 -#define NV34TCL_TX_BORDER_COLOR(x) (0x00001a1c+((x)*32)) -#define NV34TCL_TX_BORDER_COLOR__SIZE 0x00000004 -#define NV34TCL_TX_BORDER_COLOR_B_SHIFT 0 -#define NV34TCL_TX_BORDER_COLOR_B_MASK 0x000000ff -#define NV34TCL_TX_BORDER_COLOR_G_SHIFT 8 -#define NV34TCL_TX_BORDER_COLOR_G_MASK 0x0000ff00 -#define NV34TCL_TX_BORDER_COLOR_R_SHIFT 16 -#define NV34TCL_TX_BORDER_COLOR_R_MASK 0x00ff0000 -#define NV34TCL_TX_BORDER_COLOR_A_SHIFT 24 -#define NV34TCL_TX_BORDER_COLOR_A_MASK 0xff000000 -#define NV34TCL_VTX_ATTR_4F_X(x) (0x00001c00+((x)*16)) -#define NV34TCL_VTX_ATTR_4F_X__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_4F_Y(x) (0x00001c04+((x)*16)) -#define NV34TCL_VTX_ATTR_4F_Y__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_4F_Z(x) (0x00001c08+((x)*16)) -#define NV34TCL_VTX_ATTR_4F_Z__SIZE 0x00000010 -#define NV34TCL_VTX_ATTR_4F_W(x) (0x00001c0c+((x)*16)) -#define NV34TCL_VTX_ATTR_4F_W__SIZE 0x00000010 -#define NV34TCL_FP_CONTROL 0x00001d60 -#define NV34TCL_FP_CONTROL_USES_KIL (1 << 7) -#define NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_SHIFT 0 -#define NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_MASK 0x0000000f -#define NV34TCL_DEPTH_UNK17D8 0x00001d78 -#define NV34TCL_DEPTH_UNK17D8_CLAMP_SHIFT 4 -#define NV34TCL_DEPTH_UNK17D8_CLAMP_MASK 0x000000f0 -#define NV34TCL_MULTISAMPLE_CONTROL 0x00001d7c -#define NV34TCL_MULTISAMPLE_CONTROL_ENABLE (1 << 0) -#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_ALPHA_TO_COVERAGE (1 << 4) -#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_ALPHA_TO_ONE (1 << 8) -#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_COVERAGE_SHIFT 16 -#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_COVERAGE_MASK 0xffff0000 -#define NV34TCL_CLEAR_DEPTH_VALUE 0x00001d8c -#define NV34TCL_CLEAR_COLOR_VALUE 0x00001d90 -#define NV34TCL_CLEAR_COLOR_VALUE_B_SHIFT 0 -#define NV34TCL_CLEAR_COLOR_VALUE_B_MASK 0x000000ff -#define NV34TCL_CLEAR_COLOR_VALUE_G_SHIFT 8 -#define NV34TCL_CLEAR_COLOR_VALUE_G_MASK 0x0000ff00 -#define NV34TCL_CLEAR_COLOR_VALUE_R_SHIFT 16 -#define NV34TCL_CLEAR_COLOR_VALUE_R_MASK 0x00ff0000 -#define NV34TCL_CLEAR_COLOR_VALUE_A_SHIFT 24 -#define NV34TCL_CLEAR_COLOR_VALUE_A_MASK 0xff000000 -#define NV34TCL_CLEAR_BUFFERS 0x00001d94 -#define NV34TCL_CLEAR_BUFFERS_COLOR_A (1 << 7) -#define NV34TCL_CLEAR_BUFFERS_COLOR_B (1 << 6) -#define NV34TCL_CLEAR_BUFFERS_COLOR_G (1 << 5) -#define NV34TCL_CLEAR_BUFFERS_COLOR_R (1 << 4) -#define NV34TCL_CLEAR_BUFFERS_STENCIL (1 << 1) -#define NV34TCL_CLEAR_BUFFERS_DEPTH (1 << 0) -#define NV34TCL_DO_VERTICES 0x00001dac -#define NV34TCL_LINE_STIPPLE_ENABLE 0x00001db4 -#define NV34TCL_LINE_STIPPLE_PATTERN 0x00001db8 -#define NV34TCL_LINE_STIPPLE_PATTERN_FACTOR_SHIFT 0 -#define NV34TCL_LINE_STIPPLE_PATTERN_FACTOR_MASK 0x0000ffff -#define NV34TCL_LINE_STIPPLE_PATTERN_PATTERN_SHIFT 16 -#define NV34TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK 0xffff0000 -#define NV34TCL_BACK_MATERIAL_SHININESS(x) (0x00001e20+((x)*4)) -#define NV34TCL_BACK_MATERIAL_SHININESS__SIZE 0x00000006 -#define NV34TCL_VTX_ATTR_1F(x) (0x00001e40+((x)*4)) -#define NV34TCL_VTX_ATTR_1F__SIZE 0x00000010 -#define NV34TCL_ENGINE 0x00001e94 -#define NV34TCL_ENGINE_FP (1 << 0) -#define NV34TCL_ENGINE_VP (1 << 1) -#define NV34TCL_ENGINE_FIXED (1 << 2) -#define NV34TCL_VP_UPLOAD_FROM_ID 0x00001e9c -#define NV34TCL_VP_START_FROM_ID 0x00001ea0 -#define NV34TCL_POINT_PARAMETERS(x) (0x00001ec0+((x)*4)) -#define NV34TCL_POINT_PARAMETERS__SIZE 0x00000008 -#define NV34TCL_POINT_SIZE 0x00001ee0 -#define NV34TCL_POINT_PARAMETERS_ENABLE 0x00001ee4 -#define NV34TCL_POINT_SPRITE 0x00001ee8 -#define NV34TCL_POINT_SPRITE_ENABLE (1 << 0) -#define NV34TCL_POINT_SPRITE_R_MODE_SHIFT 1 -#define NV34TCL_POINT_SPRITE_R_MODE_MASK 0x00000006 -#define NV34TCL_POINT_SPRITE_R_MODE_ZERO 0x00000000 -#define NV34TCL_POINT_SPRITE_R_MODE_R 0x00000002 -#define NV34TCL_POINT_SPRITE_R_MODE_S 0x00000004 -#define NV34TCL_POINT_SPRITE_COORD_REPLACE (1 << 11) -#define NV34TCL_VP_UPLOAD_CONST_ID 0x00001efc -#define NV34TCL_VP_UPLOAD_CONST_X(x) (0x00001f00+((x)*16)) -#define NV34TCL_VP_UPLOAD_CONST_X__SIZE 0x00000004 -#define NV34TCL_VP_UPLOAD_CONST_Y(x) (0x00001f04+((x)*16)) -#define NV34TCL_VP_UPLOAD_CONST_Y__SIZE 0x00000004 -#define NV34TCL_VP_UPLOAD_CONST_Z(x) (0x00001f08+((x)*16)) -#define NV34TCL_VP_UPLOAD_CONST_Z__SIZE 0x00000004 -#define NV34TCL_VP_UPLOAD_CONST_W(x) (0x00001f0c+((x)*16)) -#define NV34TCL_VP_UPLOAD_CONST_W__SIZE 0x00000004 -#define NV34TCL_UNK1f80(x) (0x00001f80+((x)*4)) -#define NV34TCL_UNK1f80__SIZE 0x00000010 - - -#define NV40_CONTEXT_SURFACES_2D 0x00003062 - - - -#define NV40_STRETCHED_IMAGE_FROM_CPU 0x00003066 - - - -#define NV40_TEXTURE_FROM_CPU 0x0000307b - - - -#define NV40_SCALED_IMAGE_FROM_MEMORY 0x00003089 - - - -#define NV40_IMAGE_FROM_CPU 0x0000308a - - - -#define NV40_SWIZZLED_SURFACE 0x0000309e - - - -#define NV40TCL 0x00004097 - -#define NV40TCL_REF_CNT 0x00000050 -#define NV40TCL_NOP 0x00000100 -#define NV40TCL_NOTIFY 0x00000104 -#define NV40TCL_DMA_NOTIFY 0x00000180 -#define NV40TCL_DMA_TEXTURE0 0x00000184 -#define NV40TCL_DMA_TEXTURE1 0x00000188 -#define NV40TCL_DMA_COLOR1 0x0000018c -#define NV40TCL_DMA_COLOR0 0x00000194 -#define NV40TCL_DMA_ZETA 0x00000198 -#define NV40TCL_DMA_VTXBUF0 0x0000019c -#define NV40TCL_DMA_VTXBUF1 0x000001a0 -#define NV40TCL_DMA_FENCE 0x000001a4 -#define NV40TCL_DMA_QUERY 0x000001a8 -#define NV40TCL_DMA_UNK01AC 0x000001ac -#define NV40TCL_DMA_UNK01B0 0x000001b0 -#define NV40TCL_DMA_COLOR2 0x000001b4 -#define NV40TCL_DMA_COLOR3 0x000001b8 -#define NV40TCL_RT_HORIZ 0x00000200 -#define NV40TCL_RT_HORIZ_W_SHIFT 16 -#define NV40TCL_RT_HORIZ_W_MASK 0xffff0000 -#define NV40TCL_RT_HORIZ_X_SHIFT 0 -#define NV40TCL_RT_HORIZ_X_MASK 0x0000ffff -#define NV40TCL_RT_VERT 0x00000204 -#define NV40TCL_RT_VERT_H_SHIFT 16 -#define NV40TCL_RT_VERT_H_MASK 0xffff0000 -#define NV40TCL_RT_VERT_Y_SHIFT 0 -#define NV40TCL_RT_VERT_Y_MASK 0x0000ffff -#define NV40TCL_RT_FORMAT 0x00000208 -#define NV40TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT 24 -#define NV40TCL_RT_FORMAT_LOG2_HEIGHT_MASK 0xff000000 -#define NV40TCL_RT_FORMAT_LOG2_WIDTH_SHIFT 16 -#define NV40TCL_RT_FORMAT_LOG2_WIDTH_MASK 0x00ff0000 -#define NV40TCL_RT_FORMAT_TYPE_SHIFT 8 -#define NV40TCL_RT_FORMAT_TYPE_MASK 0x00000f00 -#define NV40TCL_RT_FORMAT_TYPE_LINEAR 0x00000100 -#define NV40TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200 -#define NV40TCL_RT_FORMAT_ZETA_SHIFT 5 -#define NV40TCL_RT_FORMAT_ZETA_MASK 0x000000e0 -#define NV40TCL_RT_FORMAT_ZETA_Z16 0x00000020 -#define NV40TCL_RT_FORMAT_ZETA_Z24S8 0x00000040 -#define NV40TCL_RT_FORMAT_COLOR_SHIFT 0 -#define NV40TCL_RT_FORMAT_COLOR_MASK 0x0000001f -#define NV40TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003 -#define NV40TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005 -#define NV40TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008 -#define NV40TCL_RT_FORMAT_COLOR_B8 0x00000009 -#define NV40TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d -#define NV40TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f -#define NV40TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010 -#define NV40TCL_COLOR0_PITCH 0x0000020c -#define NV40TCL_COLOR0_OFFSET 0x00000210 -#define NV40TCL_ZETA_OFFSET 0x00000214 -#define NV40TCL_COLOR1_OFFSET 0x00000218 -#define NV40TCL_COLOR1_PITCH 0x0000021c -#define NV40TCL_RT_ENABLE 0x00000220 -#define NV40TCL_RT_ENABLE_MRT (1 << 4) -#define NV40TCL_RT_ENABLE_COLOR3 (1 << 3) -#define NV40TCL_RT_ENABLE_COLOR2 (1 << 2) -#define NV40TCL_RT_ENABLE_COLOR1 (1 << 1) -#define NV40TCL_RT_ENABLE_COLOR0 (1 << 0) -#define NV40TCL_ZETA_PITCH 0x0000022c -#define NV40TCL_COLOR2_PITCH 0x00000280 -#define NV40TCL_COLOR3_PITCH 0x00000284 -#define NV40TCL_COLOR2_OFFSET 0x00000288 -#define NV40TCL_COLOR3_OFFSET 0x0000028c -#define NV40TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*8)) -#define NV40TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008 -#define NV40TCL_VIEWPORT_CLIP_VERT(x) (0x000002c4+((x)*8)) -#define NV40TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008 -#define NV40TCL_DITHER_ENABLE 0x00000300 -#define NV40TCL_ALPHA_TEST_ENABLE 0x00000304 -#define NV40TCL_ALPHA_TEST_FUNC 0x00000308 -#define NV40TCL_ALPHA_TEST_FUNC_NEVER 0x00000200 -#define NV40TCL_ALPHA_TEST_FUNC_LESS 0x00000201 -#define NV40TCL_ALPHA_TEST_FUNC_EQUAL 0x00000202 -#define NV40TCL_ALPHA_TEST_FUNC_LEQUAL 0x00000203 -#define NV40TCL_ALPHA_TEST_FUNC_GREATER 0x00000204 -#define NV40TCL_ALPHA_TEST_FUNC_GREATER 0x00000204 -#define NV40TCL_ALPHA_TEST_FUNC_NOTEQUAL 0x00000205 -#define NV40TCL_ALPHA_TEST_FUNC_GEQUAL 0x00000206 -#define NV40TCL_ALPHA_TEST_FUNC_ALWAYS 0x00000207 -#define NV40TCL_ALPHA_TEST_REF 0x0000030c -#define NV40TCL_BLEND_ENABLE 0x00000310 -#define NV40TCL_BLEND_FUNC_SRC 0x00000314 -#define NV40TCL_BLEND_FUNC_SRC_RGB_SHIFT 0 -#define NV40TCL_BLEND_FUNC_SRC_RGB_MASK 0x0000ffff -#define NV40TCL_BLEND_FUNC_SRC_RGB_ZERO 0x00000000 -#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE 0x00000001 -#define NV40TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR 0x00000300 -#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV40TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA 0x00000302 -#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV40TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA 0x00000304 -#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV40TCL_BLEND_FUNC_SRC_RGB_DST_COLOR 0x00000306 -#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR 0x00000307 -#define NV40TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE 0x00000308 -#define NV40TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR 0x00008001 -#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV40TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA 0x00008003 -#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SHIFT 16 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_MASK 0xffff0000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ZERO 0x00000000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE 0x00010000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR 0x03000000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA 0x03020000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA 0x03040000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR 0x03060000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR 0x03070000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE 0x03080000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR 0x80010000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA 0x80030000 -#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000 -#define NV40TCL_BLEND_FUNC_DST 0x00000318 -#define NV40TCL_BLEND_FUNC_DST_RGB_SHIFT 0 -#define NV40TCL_BLEND_FUNC_DST_RGB_MASK 0x0000ffff -#define NV40TCL_BLEND_FUNC_DST_RGB_ZERO 0x00000000 -#define NV40TCL_BLEND_FUNC_DST_RGB_ONE 0x00000001 -#define NV40TCL_BLEND_FUNC_DST_RGB_SRC_COLOR 0x00000300 -#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV40TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA 0x00000302 -#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV40TCL_BLEND_FUNC_DST_RGB_DST_ALPHA 0x00000304 -#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV40TCL_BLEND_FUNC_DST_RGB_DST_COLOR 0x00000306 -#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR 0x00000307 -#define NV40TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE 0x00000308 -#define NV40TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR 0x00008001 -#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV40TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA 0x00008003 -#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_SHIFT 16 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_MASK 0xffff0000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_ZERO 0x00000000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE 0x00010000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR 0x03000000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA 0x03020000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA 0x03040000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR 0x03060000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR 0x03070000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE 0x03080000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR 0x80010000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x80030000 -#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000 -#define NV40TCL_BLEND_COLOR 0x0000031c -#define NV40TCL_BLEND_EQUATION 0x00000320 -#define NV40TCL_BLEND_EQUATION_RGB_SHIFT 0 -#define NV40TCL_BLEND_EQUATION_RGB_MASK 0x0000ffff -#define NV40TCL_BLEND_EQUATION_RGB_FUNC_ADD 0x00008006 -#define NV40TCL_BLEND_EQUATION_RGB_MIN 0x00008007 -#define NV40TCL_BLEND_EQUATION_RGB_MAX 0x00008008 -#define NV40TCL_BLEND_EQUATION_RGB_FUNC_SUBTRACT 0x0000800a -#define NV40TCL_BLEND_EQUATION_RGB_FUNC_REVERSE_SUBTRACT 0x0000800b -#define NV40TCL_BLEND_EQUATION_ALPHA_SHIFT 16 -#define NV40TCL_BLEND_EQUATION_ALPHA_MASK 0xffff0000 -#define NV40TCL_BLEND_EQUATION_ALPHA_FUNC_ADD 0x80060000 -#define NV40TCL_BLEND_EQUATION_ALPHA_MIN 0x80070000 -#define NV40TCL_BLEND_EQUATION_ALPHA_MAX 0x80080000 -#define NV40TCL_BLEND_EQUATION_ALPHA_FUNC_SUBTRACT 0x800a0000 -#define NV40TCL_BLEND_EQUATION_ALPHA_FUNC_REVERSE_SUBTRACT 0x800b0000 -#define NV40TCL_COLOR_MASK 0x00000324 -#define NV40TCL_COLOR_MASK_BUFFER0_B_SHIFT 0 -#define NV40TCL_COLOR_MASK_BUFFER0_B_MASK 0x000000ff -#define NV40TCL_COLOR_MASK_BUFFER0_G_SHIFT 8 -#define NV40TCL_COLOR_MASK_BUFFER0_G_MASK 0x0000ff00 -#define NV40TCL_COLOR_MASK_BUFFER0_R_SHIFT 16 -#define NV40TCL_COLOR_MASK_BUFFER0_R_MASK 0x00ff0000 -#define NV40TCL_COLOR_MASK_BUFFER0_A_SHIFT 24 -#define NV40TCL_COLOR_MASK_BUFFER0_A_MASK 0xff000000 -#define NV40TCL_STENCIL_FRONT_ENABLE 0x00000328 -#define NV40TCL_STENCIL_FRONT_MASK 0x0000032c -#define NV40TCL_STENCIL_FRONT_FUNC_FUNC 0x00000330 -#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_NEVER 0x00000200 -#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_LESS 0x00000201 -#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL 0x00000202 -#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL 0x00000203 -#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204 -#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204 -#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL 0x00000206 -#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS 0x00000207 -#define NV40TCL_STENCIL_FRONT_FUNC_REF 0x00000334 -#define NV40TCL_STENCIL_FRONT_FUNC_MASK 0x00000338 -#define NV40TCL_STENCIL_FRONT_OP_FAIL 0x0000033c -#define NV40TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000 -#define NV40TCL_STENCIL_FRONT_OP_FAIL_INVERT 0x0000150a -#define NV40TCL_STENCIL_FRONT_OP_FAIL_KEEP 0x00001e00 -#define NV40TCL_STENCIL_FRONT_OP_FAIL_REPLACE 0x00001e01 -#define NV40TCL_STENCIL_FRONT_OP_FAIL_INCR 0x00001e02 -#define NV40TCL_STENCIL_FRONT_OP_FAIL_DECR 0x00001e03 -#define NV40TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP 0x00008507 -#define NV40TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP 0x00008508 -#define NV40TCL_STENCIL_FRONT_OP_ZFAIL 0x00000340 -#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_ZERO 0x00000000 -#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_INVERT 0x0000150a -#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_KEEP 0x00001e00 -#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE 0x00001e01 -#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_INCR 0x00001e02 -#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_DECR 0x00001e03 -#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP 0x00008507 -#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP 0x00008508 -#define NV40TCL_STENCIL_FRONT_OP_ZPASS 0x00000344 -#define NV40TCL_STENCIL_FRONT_OP_ZPASS_ZERO 0x00000000 -#define NV40TCL_STENCIL_FRONT_OP_ZPASS_INVERT 0x0000150a -#define NV40TCL_STENCIL_FRONT_OP_ZPASS_KEEP 0x00001e00 -#define NV40TCL_STENCIL_FRONT_OP_ZPASS_REPLACE 0x00001e01 -#define NV40TCL_STENCIL_FRONT_OP_ZPASS_INCR 0x00001e02 -#define NV40TCL_STENCIL_FRONT_OP_ZPASS_DECR 0x00001e03 -#define NV40TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP 0x00008507 -#define NV40TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP 0x00008508 -#define NV40TCL_STENCIL_BACK_ENABLE 0x00000348 -#define NV40TCL_STENCIL_BACK_MASK 0x0000034c -#define NV40TCL_STENCIL_BACK_FUNC_FUNC 0x00000350 -#define NV40TCL_STENCIL_BACK_FUNC_FUNC_NEVER 0x00000200 -#define NV40TCL_STENCIL_BACK_FUNC_FUNC_LESS 0x00000201 -#define NV40TCL_STENCIL_BACK_FUNC_FUNC_EQUAL 0x00000202 -#define NV40TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL 0x00000203 -#define NV40TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204 -#define NV40TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204 -#define NV40TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV40TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL 0x00000206 -#define NV40TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS 0x00000207 -#define NV40TCL_STENCIL_BACK_FUNC_REF 0x00000354 -#define NV40TCL_STENCIL_BACK_FUNC_MASK 0x00000358 -#define NV40TCL_STENCIL_BACK_OP_FAIL 0x0000035c -#define NV40TCL_STENCIL_BACK_OP_FAIL_ZERO 0x00000000 -#define NV40TCL_STENCIL_BACK_OP_FAIL_INVERT 0x0000150a -#define NV40TCL_STENCIL_BACK_OP_FAIL_KEEP 0x00001e00 -#define NV40TCL_STENCIL_BACK_OP_FAIL_REPLACE 0x00001e01 -#define NV40TCL_STENCIL_BACK_OP_FAIL_INCR 0x00001e02 -#define NV40TCL_STENCIL_BACK_OP_FAIL_DECR 0x00001e03 -#define NV40TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP 0x00008507 -#define NV40TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP 0x00008508 -#define NV40TCL_STENCIL_BACK_OP_ZFAIL 0x00000360 -#define NV40TCL_STENCIL_BACK_OP_ZFAIL_ZERO 0x00000000 -#define NV40TCL_STENCIL_BACK_OP_ZFAIL_INVERT 0x0000150a -#define NV40TCL_STENCIL_BACK_OP_ZFAIL_KEEP 0x00001e00 -#define NV40TCL_STENCIL_BACK_OP_ZFAIL_REPLACE 0x00001e01 -#define NV40TCL_STENCIL_BACK_OP_ZFAIL_INCR 0x00001e02 -#define NV40TCL_STENCIL_BACK_OP_ZFAIL_DECR 0x00001e03 -#define NV40TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP 0x00008507 -#define NV40TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP 0x00008508 -#define NV40TCL_STENCIL_BACK_OP_ZPASS 0x00000364 -#define NV40TCL_STENCIL_BACK_OP_ZPASS_ZERO 0x00000000 -#define NV40TCL_STENCIL_BACK_OP_ZPASS_INVERT 0x0000150a -#define NV40TCL_STENCIL_BACK_OP_ZPASS_KEEP 0x00001e00 -#define NV40TCL_STENCIL_BACK_OP_ZPASS_REPLACE 0x00001e01 -#define NV40TCL_STENCIL_BACK_OP_ZPASS_INCR 0x00001e02 -#define NV40TCL_STENCIL_BACK_OP_ZPASS_DECR 0x00001e03 -#define NV40TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP 0x00008507 -#define NV40TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP 0x00008508 -#define NV40TCL_SHADE_MODEL 0x00000368 -#define NV40TCL_SHADE_MODEL_FLAT 0x00001d00 -#define NV40TCL_SHADE_MODEL_SMOOTH 0x00001d01 -#define NV40TCL_MRT_COLOR_MASK 0x00000370 -#define NV40TCL_MRT_COLOR_MASK_BUFFER1_A (1 << 4) -#define NV40TCL_MRT_COLOR_MASK_BUFFER1_R (1 << 5) -#define NV40TCL_MRT_COLOR_MASK_BUFFER1_G (1 << 6) -#define NV40TCL_MRT_COLOR_MASK_BUFFER1_B (1 << 7) -#define NV40TCL_MRT_COLOR_MASK_BUFFER2_A (1 << 8) -#define NV40TCL_MRT_COLOR_MASK_BUFFER2_R (1 << 9) -#define NV40TCL_MRT_COLOR_MASK_BUFFER2_G (1 << 10) -#define NV40TCL_MRT_COLOR_MASK_BUFFER2_B (1 << 11) -#define NV40TCL_MRT_COLOR_MASK_BUFFER3_A (1 << 12) -#define NV40TCL_MRT_COLOR_MASK_BUFFER3_R (1 << 13) -#define NV40TCL_MRT_COLOR_MASK_BUFFER3_G (1 << 14) -#define NV40TCL_MRT_COLOR_MASK_BUFFER3_B (1 << 15) -#define NV40TCL_COLOR_LOGIC_OP_ENABLE 0x00000374 -#define NV40TCL_COLOR_LOGIC_OP 0x00000378 -#define NV40TCL_COLOR_LOGIC_OP_CLEAR 0x00001500 -#define NV40TCL_COLOR_LOGIC_OP_AND 0x00001501 -#define NV40TCL_COLOR_LOGIC_OP_AND_REVERSE 0x00001502 -#define NV40TCL_COLOR_LOGIC_OP_COPY 0x00001503 -#define NV40TCL_COLOR_LOGIC_OP_AND_INVERTED 0x00001504 -#define NV40TCL_COLOR_LOGIC_OP_NOOP 0x00001505 -#define NV40TCL_COLOR_LOGIC_OP_XOR 0x00001506 -#define NV40TCL_COLOR_LOGIC_OP_OR 0x00001507 -#define NV40TCL_COLOR_LOGIC_OP_NOR 0x00001508 -#define NV40TCL_COLOR_LOGIC_OP_EQUIV 0x00001509 -#define NV40TCL_COLOR_LOGIC_OP_INVERT 0x0000150a -#define NV40TCL_COLOR_LOGIC_OP_OR_REVERSE 0x0000150b -#define NV40TCL_COLOR_LOGIC_OP_COPY_INVERTED 0x0000150c -#define NV40TCL_COLOR_LOGIC_OP_OR_INVERTED 0x0000150d -#define NV40TCL_COLOR_LOGIC_OP_NAND 0x0000150e -#define NV40TCL_COLOR_LOGIC_OP_SET 0x0000150f -#define NV40TCL_DEPTH_RANGE_NEAR 0x00000394 -#define NV40TCL_DEPTH_RANGE_FAR 0x00000398 -#define NV40TCL_LINE_WIDTH 0x000003b8 -#define NV40TCL_LINE_SMOOTH_ENABLE 0x000003bc -#define NV40TCL_UNK03C0(x) (0x000003c0+((x)*4)) -#define NV40TCL_UNK03C0__SIZE 0x00000010 -#define NV40TCL_UNK0400(x) (0x00000400+((x)*4)) -#define NV40TCL_UNK0400__SIZE 0x00000010 -#define NV40TCL_UNK0440(x) (0x00000440+((x)*4)) -#define NV40TCL_UNK0440__SIZE 0x00000020 -#define NV40TCL_SCISSOR_HORIZ 0x000008c0 -#define NV40TCL_SCISSOR_HORIZ_X_SHIFT 0 -#define NV40TCL_SCISSOR_HORIZ_X_MASK 0x0000ffff -#define NV40TCL_SCISSOR_HORIZ_W_SHIFT 16 -#define NV40TCL_SCISSOR_HORIZ_W_MASK 0xffff0000 -#define NV40TCL_SCISSOR_VERT 0x000008c4 -#define NV40TCL_SCISSOR_VERT_Y_SHIFT 0 -#define NV40TCL_SCISSOR_VERT_Y_MASK 0x0000ffff -#define NV40TCL_SCISSOR_VERT_H_SHIFT 16 -#define NV40TCL_SCISSOR_VERT_H_MASK 0xffff0000 -#define NV40TCL_FOG_MODE 0x000008cc -#define NV40TCL_FOG_EQUATION_CONSTANT 0x000008d0 -#define NV40TCL_FOG_EQUATION_LINEAR 0x000008d4 -#define NV40TCL_FOG_EQUATION_QUADRATIC 0x000008d8 -#define NV40TCL_FP_ADDRESS 0x000008e4 -#define NV40TCL_FP_ADDRESS_OFFSET_SHIFT 8 -#define NV40TCL_FP_ADDRESS_OFFSET_MASK 0xffffff00 -#define NV40TCL_FP_ADDRESS_DMA1 (1 << 1) -#define NV40TCL_FP_ADDRESS_DMA0 (1 << 0) -#define NV40TCL_VIEWPORT_HORIZ 0x00000a00 -#define NV40TCL_VIEWPORT_HORIZ_W_SHIFT 16 -#define NV40TCL_VIEWPORT_HORIZ_W_MASK 0xffff0000 -#define NV40TCL_VIEWPORT_HORIZ_X_SHIFT 0 -#define NV40TCL_VIEWPORT_HORIZ_X_MASK 0x0000ffff -#define NV40TCL_VIEWPORT_VERT 0x00000a04 -#define NV40TCL_VIEWPORT_VERT_H_SHIFT 16 -#define NV40TCL_VIEWPORT_VERT_H_MASK 0xffff0000 -#define NV40TCL_VIEWPORT_VERT_Y_SHIFT 0 -#define NV40TCL_VIEWPORT_VERT_Y_MASK 0x0000ffff -#define NV40TCL_VIEWPORT_TRANSLATE_X 0x00000a20 -#define NV40TCL_VIEWPORT_TRANSLATE_Y 0x00000a24 -#define NV40TCL_VIEWPORT_TRANSLATE_Z 0x00000a28 -#define NV40TCL_VIEWPORT_TRANSLATE_W 0x00000a2c -#define NV40TCL_VIEWPORT_SCALE_X 0x00000a30 -#define NV40TCL_VIEWPORT_SCALE_Y 0x00000a34 -#define NV40TCL_VIEWPORT_SCALE_Z 0x00000a38 -#define NV40TCL_VIEWPORT_SCALE_W 0x00000a3c -#define NV40TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000a60 -#define NV40TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000a64 -#define NV40TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000a68 -#define NV40TCL_DEPTH_FUNC 0x00000a6c -#define NV40TCL_DEPTH_FUNC_NEVER 0x00000200 -#define NV40TCL_DEPTH_FUNC_LESS 0x00000201 -#define NV40TCL_DEPTH_FUNC_EQUAL 0x00000202 -#define NV40TCL_DEPTH_FUNC_LEQUAL 0x00000203 -#define NV40TCL_DEPTH_FUNC_GREATER 0x00000204 -#define NV40TCL_DEPTH_FUNC_GREATER 0x00000204 -#define NV40TCL_DEPTH_FUNC_NOTEQUAL 0x00000205 -#define NV40TCL_DEPTH_FUNC_GEQUAL 0x00000206 -#define NV40TCL_DEPTH_FUNC_ALWAYS 0x00000207 -#define NV40TCL_DEPTH_WRITE_ENABLE 0x00000a70 -#define NV40TCL_DEPTH_TEST_ENABLE 0x00000a74 -#define NV40TCL_POLYGON_OFFSET_FACTOR 0x00000a78 -#define NV40TCL_POLYGON_OFFSET_UNITS 0x00000a7c -#define NV40TCL_VTX_ATTR_3I_XY(x) (0x00000a80+((x)*8)) -#define NV40TCL_VTX_ATTR_3I_XY__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_3I_XY_X_SHIFT 0 -#define NV40TCL_VTX_ATTR_3I_XY_X_MASK 0x0000ffff -#define NV40TCL_VTX_ATTR_3I_XY_Y_SHIFT 16 -#define NV40TCL_VTX_ATTR_3I_XY_Y_MASK 0xffff0000 -#define NV40TCL_VTX_ATTR_3I_Z(x) (0x00000a84+((x)*8)) -#define NV40TCL_VTX_ATTR_3I_Z__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_3I_Z_Z_SHIFT 0 -#define NV40TCL_VTX_ATTR_3I_Z_Z_MASK 0x0000ffff -#define NV40TCL_UNK0B40(x) (0x00000b40+((x)*4)) -#define NV40TCL_UNK0B40__SIZE 0x00000008 -#define NV40TCL_VP_UPLOAD_INST(x) (0x00000b80+((x)*4)) -#define NV40TCL_VP_UPLOAD_INST__SIZE 0x00000004 -#define NV40TCL_CLIP_PLANE_ENABLE 0x00001478 -#define NV40TCL_CLIP_PLANE_ENABLE_PLANE0 (1 << 1) -#define NV40TCL_CLIP_PLANE_ENABLE_PLANE1 (1 << 5) -#define NV40TCL_CLIP_PLANE_ENABLE_PLANE2 (1 << 9) -#define NV40TCL_CLIP_PLANE_ENABLE_PLANE3 (1 << 13) -#define NV40TCL_CLIP_PLANE_ENABLE_PLANE4 (1 << 17) -#define NV40TCL_CLIP_PLANE_ENABLE_PLANE5 (1 << 21) -#define NV40TCL_POLYGON_STIPPLE_ENABLE 0x0000147c -#define NV40TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4)) -#define NV40TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020 -#define NV40TCL_VTX_ATTR_3F_X(x) (0x00001500+((x)*16)) -#define NV40TCL_VTX_ATTR_3F_X__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_3F_Y(x) (0x00001504+((x)*16)) -#define NV40TCL_VTX_ATTR_3F_Y__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_3F_Z(x) (0x00001508+((x)*16)) -#define NV40TCL_VTX_ATTR_3F_Z__SIZE 0x00000010 -#define NV40TCL_VTXBUF_ADDRESS(x) (0x00001680+((x)*4)) -#define NV40TCL_VTXBUF_ADDRESS__SIZE 0x00000010 -#define NV40TCL_VTXBUF_ADDRESS_DMA1 (1 << 31) -#define NV40TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0 -#define NV40TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff -#define NV40TCL_VTX_CACHE_INVALIDATE 0x00001714 -#define NV40TCL_VTXFMT(x) (0x00001740+((x)*4)) -#define NV40TCL_VTXFMT__SIZE 0x00000010 -#define NV40TCL_VTXFMT_TYPE_SHIFT 0 -#define NV40TCL_VTXFMT_TYPE_MASK 0x0000000f -#define NV40TCL_VTXFMT_TYPE_FLOAT 0x00000002 -#define NV40TCL_VTXFMT_TYPE_UBYTE 0x00000004 -#define NV40TCL_VTXFMT_TYPE_USHORT 0x00000005 -#define NV40TCL_VTXFMT_SIZE_SHIFT 4 -#define NV40TCL_VTXFMT_SIZE_MASK 0x000000f0 -#define NV40TCL_VTXFMT_STRIDE_SHIFT 8 -#define NV40TCL_VTXFMT_STRIDE_MASK 0x0000ff00 -#define NV40TCL_QUERY_RESET 0x000017c8 -#define NV40TCL_QUERY_UNK17CC 0x000017cc -#define NV40TCL_QUERY_GET 0x00001800 -#define NV40TCL_QUERY_GET_UNK24_SHIFT 24 -#define NV40TCL_QUERY_GET_UNK24_MASK 0xff000000 -#define NV40TCL_QUERY_GET_OFFSET_SHIFT 0 -#define NV40TCL_QUERY_GET_OFFSET_MASK 0x00ffffff -#define NV40TCL_BEGIN_END 0x00001808 -#define NV40TCL_BEGIN_END_STOP 0x00000000 -#define NV40TCL_BEGIN_END_POINTS 0x00000001 -#define NV40TCL_BEGIN_END_LINES 0x00000002 -#define NV40TCL_BEGIN_END_LINE_LOOP 0x00000003 -#define NV40TCL_BEGIN_END_LINE_STRIP 0x00000004 -#define NV40TCL_BEGIN_END_TRIANGLES 0x00000005 -#define NV40TCL_BEGIN_END_TRIANGLE_STRIP 0x00000006 -#define NV40TCL_BEGIN_END_TRIANGLE_FAN 0x00000007 -#define NV40TCL_BEGIN_END_QUADS 0x00000008 -#define NV40TCL_BEGIN_END_QUAD_STRIP 0x00000009 -#define NV40TCL_BEGIN_END_POLYGON 0x0000000a -#define NV40TCL_VB_ELEMENT_U16 0x0000180c -#define NV40TCL_VB_ELEMENT_U16_1_SHIFT 16 -#define NV40TCL_VB_ELEMENT_U16_1_MASK 0xffff0000 -#define NV40TCL_VB_ELEMENT_U16_0_SHIFT 0 -#define NV40TCL_VB_ELEMENT_U16_0_MASK 0x0000ffff -#define NV40TCL_VB_ELEMENT_U32 0x00001810 -#define NV40TCL_VB_VERTEX_BATCH 0x00001814 -#define NV40TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24 -#define NV40TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000 -#define NV40TCL_VB_VERTEX_BATCH_START_SHIFT 0 -#define NV40TCL_VB_VERTEX_BATCH_START_MASK 0x00ffffff -#define NV40TCL_VERTEX_DATA 0x00001818 -#define NV40TCL_IDXBUF_ADDRESS 0x0000181c -#define NV40TCL_IDXBUF_FORMAT 0x00001820 -#define NV40TCL_IDXBUF_FORMAT_TYPE_SHIFT 4 -#define NV40TCL_IDXBUF_FORMAT_TYPE_MASK 0x000000f0 -#define NV40TCL_IDXBUF_FORMAT_TYPE_U32 0x00000000 -#define NV40TCL_IDXBUF_FORMAT_TYPE_U16 0x00000010 -#define NV40TCL_IDXBUF_FORMAT_DMA1 (1 << 0) -#define NV40TCL_VB_INDEX_BATCH 0x00001824 -#define NV40TCL_VB_INDEX_BATCH_COUNT_SHIFT 24 -#define NV40TCL_VB_INDEX_BATCH_COUNT_MASK 0xff000000 -#define NV40TCL_VB_INDEX_BATCH_START_SHIFT 0 -#define NV40TCL_VB_INDEX_BATCH_START_MASK 0x00ffffff -#define NV40TCL_POLYGON_MODE_FRONT 0x00001828 -#define NV40TCL_POLYGON_MODE_FRONT_POINT 0x00001b00 -#define NV40TCL_POLYGON_MODE_FRONT_LINE 0x00001b01 -#define NV40TCL_POLYGON_MODE_FRONT_FILL 0x00001b02 -#define NV40TCL_POLYGON_MODE_BACK 0x0000182c -#define NV40TCL_POLYGON_MODE_BACK_POINT 0x00001b00 -#define NV40TCL_POLYGON_MODE_BACK_LINE 0x00001b01 -#define NV40TCL_POLYGON_MODE_BACK_FILL 0x00001b02 -#define NV40TCL_CULL_FACE 0x00001830 -#define NV40TCL_CULL_FACE_FRONT 0x00000404 -#define NV40TCL_CULL_FACE_BACK 0x00000405 -#define NV40TCL_CULL_FACE_FRONT_AND_BACK 0x00000408 -#define NV40TCL_FRONT_FACE 0x00001834 -#define NV40TCL_FRONT_FACE_CW 0x00000900 -#define NV40TCL_FRONT_FACE_CCW 0x00000901 -#define NV40TCL_POLYGON_SMOOTH_ENABLE 0x00001838 -#define NV40TCL_CULL_FACE_ENABLE 0x0000183c -#define NV40TCL_TEX_SIZE1(x) (0x00001840+((x)*4)) -#define NV40TCL_TEX_SIZE1__SIZE 0x00000008 -#define NV40TCL_TEX_SIZE1_DEPTH_SHIFT 20 -#define NV40TCL_TEX_SIZE1_DEPTH_MASK 0xfff00000 -#define NV40TCL_TEX_SIZE1_PITCH_SHIFT 0 -#define NV40TCL_TEX_SIZE1_PITCH_MASK 0x0000ffff -#define NV40TCL_VTX_ATTR_2F_X(x) (0x00001880+((x)*8)) -#define NV40TCL_VTX_ATTR_2F_X__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_2F_Y(x) (0x00001884+((x)*8)) -#define NV40TCL_VTX_ATTR_2F_Y__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_2I(x) (0x00001900+((x)*4)) -#define NV40TCL_VTX_ATTR_2I__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_2I_X_SHIFT 0 -#define NV40TCL_VTX_ATTR_2I_X_MASK 0x0000ffff -#define NV40TCL_VTX_ATTR_2I_Y_SHIFT 16 -#define NV40TCL_VTX_ATTR_2I_Y_MASK 0xffff0000 -#define NV40TCL_VTX_ATTR_4UB(x) (0x00001940+((x)*4)) -#define NV40TCL_VTX_ATTR_4UB__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_4UB_X_SHIFT 0 -#define NV40TCL_VTX_ATTR_4UB_X_MASK 0x000000ff -#define NV40TCL_VTX_ATTR_4UB_Y_SHIFT 8 -#define NV40TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00 -#define NV40TCL_VTX_ATTR_4UB_Z_SHIFT 16 -#define NV40TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000 -#define NV40TCL_VTX_ATTR_4UB_W_SHIFT 24 -#define NV40TCL_VTX_ATTR_4UB_W_MASK 0xff000000 -#define NV40TCL_VTX_ATTR_4I_XY(x) (0x00001980+((x)*8)) -#define NV40TCL_VTX_ATTR_4I_XY__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_4I_XY_X_SHIFT 0 -#define NV40TCL_VTX_ATTR_4I_XY_X_MASK 0x0000ffff -#define NV40TCL_VTX_ATTR_4I_XY_Y_SHIFT 16 -#define NV40TCL_VTX_ATTR_4I_XY_Y_MASK 0xffff0000 -#define NV40TCL_VTX_ATTR_4I_ZW(x) (0x00001984+((x)*8)) -#define NV40TCL_VTX_ATTR_4I_ZW__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_4I_ZW_Z_SHIFT 0 -#define NV40TCL_VTX_ATTR_4I_ZW_Z_MASK 0x0000ffff -#define NV40TCL_VTX_ATTR_4I_ZW_W_SHIFT 16 -#define NV40TCL_VTX_ATTR_4I_ZW_W_MASK 0xffff0000 -#define NV40TCL_TEX_OFFSET(x) (0x00001a00+((x)*32)) -#define NV40TCL_TEX_OFFSET__SIZE 0x00000010 -#define NV40TCL_TEX_FORMAT(x) (0x00001a04+((x)*32)) -#define NV40TCL_TEX_FORMAT__SIZE 0x00000010 -#define NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT 16 -#define NV40TCL_TEX_FORMAT_MIPMAP_COUNT_MASK 0x000f0000 -#define NV40TCL_TEX_FORMAT_RECT (1 << 14) -#define NV40TCL_TEX_FORMAT_LINEAR (1 << 13) -#define NV40TCL_TEX_FORMAT_FORMAT_SHIFT 8 -#define NV40TCL_TEX_FORMAT_FORMAT_MASK 0x00001f00 -#define NV40TCL_TEX_FORMAT_FORMAT_L8 0x00000100 -#define NV40TCL_TEX_FORMAT_FORMAT_A1R5G5B5 0x00000200 -#define NV40TCL_TEX_FORMAT_FORMAT_A4R4G4B4 0x00000300 -#define NV40TCL_TEX_FORMAT_FORMAT_R5G6B5 0x00000400 -#define NV40TCL_TEX_FORMAT_FORMAT_A8R8G8B8 0x00000500 -#define NV40TCL_TEX_FORMAT_FORMAT_DXT1 0x00000600 -#define NV40TCL_TEX_FORMAT_FORMAT_DXT3 0x00000700 -#define NV40TCL_TEX_FORMAT_FORMAT_DXT5 0x00000800 -#define NV40TCL_TEX_FORMAT_FORMAT_A8L8 0x00000b00 -#define NV40TCL_TEX_FORMAT_FORMAT_Z24 0x00001000 -#define NV40TCL_TEX_FORMAT_FORMAT_Z16 0x00001200 -#define NV40TCL_TEX_FORMAT_FORMAT_A16 0x00001400 -#define NV40TCL_TEX_FORMAT_FORMAT_A16L16 0x00001500 -#define NV40TCL_TEX_FORMAT_FORMAT_HILO8 0x00001800 -#define NV40TCL_TEX_FORMAT_FORMAT_RGBA16F 0x00001a00 -#define NV40TCL_TEX_FORMAT_FORMAT_RGBA32F 0x00001b00 -#define NV40TCL_TEX_FORMAT_DIMS_SHIFT 4 -#define NV40TCL_TEX_FORMAT_DIMS_MASK 0x000000f0 -#define NV40TCL_TEX_FORMAT_DIMS_1D 0x00000010 -#define NV40TCL_TEX_FORMAT_DIMS_2D 0x00000020 -#define NV40TCL_TEX_FORMAT_DIMS_3D 0x00000030 -#define NV40TCL_TEX_FORMAT_NO_BORDER (1 << 3) -#define NV40TCL_TEX_FORMAT_CUBIC (1 << 2) -#define NV40TCL_TEX_FORMAT_DMA1 (1 << 1) -#define NV40TCL_TEX_FORMAT_DMA0 (1 << 0) -#define NV40TCL_TEX_WRAP(x) (0x00001a08+((x)*32)) -#define NV40TCL_TEX_WRAP__SIZE 0x00000010 -#define NV40TCL_TEX_WRAP_S_SHIFT 0 -#define NV40TCL_TEX_WRAP_S_MASK 0x000000ff -#define NV40TCL_TEX_WRAP_S_REPEAT 0x00000001 -#define NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT 0x00000002 -#define NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE 0x00000003 -#define NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER 0x00000004 -#define NV40TCL_TEX_WRAP_S_CLAMP 0x00000005 -#define NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE 0x00000006 -#define NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER 0x00000007 -#define NV40TCL_TEX_WRAP_S_MIRROR_CLAMP 0x00000008 -#define NV40TCL_TEX_WRAP_T_SHIFT 8 -#define NV40TCL_TEX_WRAP_T_MASK 0x00000f00 -#define NV40TCL_TEX_WRAP_T_REPEAT 0x00000100 -#define NV40TCL_TEX_WRAP_T_MIRRORED_REPEAT 0x00000200 -#define NV40TCL_TEX_WRAP_T_CLAMP_TO_EDGE 0x00000300 -#define NV40TCL_TEX_WRAP_T_CLAMP_TO_BORDER 0x00000400 -#define NV40TCL_TEX_WRAP_T_CLAMP 0x00000500 -#define NV40TCL_TEX_WRAP_T_MIRROR_CLAMP_TO_EDGE 0x00000600 -#define NV40TCL_TEX_WRAP_T_MIRROR_CLAMP_TO_BORDER 0x00000700 -#define NV40TCL_TEX_WRAP_T_MIRROR_CLAMP 0x00000800 -#define NV40TCL_TEX_WRAP_EXPAND_NORMAL_SHIFT 12 -#define NV40TCL_TEX_WRAP_EXPAND_NORMAL_MASK 0x0000f000 -#define NV40TCL_TEX_WRAP_R_SHIFT 16 -#define NV40TCL_TEX_WRAP_R_MASK 0x00ff0000 -#define NV40TCL_TEX_WRAP_R_REPEAT 0x00010000 -#define NV40TCL_TEX_WRAP_R_MIRRORED_REPEAT 0x00020000 -#define NV40TCL_TEX_WRAP_R_CLAMP_TO_EDGE 0x00030000 -#define NV40TCL_TEX_WRAP_R_CLAMP_TO_BORDER 0x00040000 -#define NV40TCL_TEX_WRAP_R_CLAMP 0x00050000 -#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP_TO_EDGE 0x00060000 -#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP_TO_BORDER 0x00070000 -#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP 0x00080000 -#define NV40TCL_TEX_WRAP_RCOMP_SHIFT 28 -#define NV40TCL_TEX_WRAP_RCOMP_MASK 0xf0000000 -#define NV40TCL_TEX_WRAP_RCOMP_NEVER 0x00000000 -#define NV40TCL_TEX_WRAP_RCOMP_GREATER 0x10000000 -#define NV40TCL_TEX_WRAP_RCOMP_EQUAL 0x20000000 -#define NV40TCL_TEX_WRAP_RCOMP_GEQUAL 0x30000000 -#define NV40TCL_TEX_WRAP_RCOMP_LESS 0x40000000 -#define NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL 0x50000000 -#define NV40TCL_TEX_WRAP_RCOMP_LEQUAL 0x60000000 -#define NV40TCL_TEX_WRAP_RCOMP_ALWAYS 0x70000000 -#define NV40TCL_TEX_ENABLE(x) (0x00001a0c+((x)*32)) -#define NV40TCL_TEX_ENABLE__SIZE 0x00000010 -#define NV40TCL_TEX_ENABLE_ENABLE (1 << 31) -#define NV40TCL_TEX_ENABLE_MIPMAP_MIN_LOD_SHIFT 27 -#define NV40TCL_TEX_ENABLE_MIPMAP_MIN_LOD_MASK 0x38000000 -#define NV40TCL_TEX_ENABLE_MIPMAP_MAX_LOD_SHIFT 15 -#define NV40TCL_TEX_ENABLE_MIPMAP_MAX_LOD_MASK 0x00038000 -#define NV40TCL_TEX_ENABLE_ANISO_SHIFT 4 -#define NV40TCL_TEX_ENABLE_ANISO_MASK 0x000000f0 -#define NV40TCL_TEX_ENABLE_ANISO_NONE 0x00000000 -#define NV40TCL_TEX_ENABLE_ANISO_2X 0x00000010 -#define NV40TCL_TEX_ENABLE_ANISO_4X 0x00000020 -#define NV40TCL_TEX_ENABLE_ANISO_6X 0x00000030 -#define NV40TCL_TEX_ENABLE_ANISO_8X 0x00000040 -#define NV40TCL_TEX_ENABLE_ANISO_10X 0x00000050 -#define NV40TCL_TEX_ENABLE_ANISO_12X 0x00000060 -#define NV40TCL_TEX_ENABLE_ANISO_16X 0x00000070 -#define NV40TCL_TEX_SWIZZLE(x) (0x00001a10+((x)*32)) -#define NV40TCL_TEX_SWIZZLE__SIZE 0x00000010 -#define NV40TCL_TEX_SWIZZLE_S0_X_SHIFT 14 -#define NV40TCL_TEX_SWIZZLE_S0_X_MASK 0x0000c000 -#define NV40TCL_TEX_SWIZZLE_S0_X_ZERO 0x00000000 -#define NV40TCL_TEX_SWIZZLE_S0_X_ONE 0x00004000 -#define NV40TCL_TEX_SWIZZLE_S0_X_S1 0x00008000 -#define NV40TCL_TEX_SWIZZLE_S0_Y_SHIFT 12 -#define NV40TCL_TEX_SWIZZLE_S0_Y_MASK 0x00003000 -#define NV40TCL_TEX_SWIZZLE_S0_Y_ZERO 0x00000000 -#define NV40TCL_TEX_SWIZZLE_S0_Y_ONE 0x00001000 -#define NV40TCL_TEX_SWIZZLE_S0_Y_S1 0x00002000 -#define NV40TCL_TEX_SWIZZLE_S0_Z_SHIFT 10 -#define NV40TCL_TEX_SWIZZLE_S0_Z_MASK 0x00000c00 -#define NV40TCL_TEX_SWIZZLE_S0_Z_ZERO 0x00000000 -#define NV40TCL_TEX_SWIZZLE_S0_Z_ONE 0x00000400 -#define NV40TCL_TEX_SWIZZLE_S0_Z_S1 0x00000800 -#define NV40TCL_TEX_SWIZZLE_S0_W_SHIFT 8 -#define NV40TCL_TEX_SWIZZLE_S0_W_MASK 0x00000300 -#define NV40TCL_TEX_SWIZZLE_S0_W_ZERO 0x00000000 -#define NV40TCL_TEX_SWIZZLE_S0_W_ONE 0x00000100 -#define NV40TCL_TEX_SWIZZLE_S0_W_S1 0x00000200 -#define NV40TCL_TEX_SWIZZLE_S1_X_SHIFT 6 -#define NV40TCL_TEX_SWIZZLE_S1_X_MASK 0x000000c0 -#define NV40TCL_TEX_SWIZZLE_S1_X_W 0x00000000 -#define NV40TCL_TEX_SWIZZLE_S1_X_Z 0x00000040 -#define NV40TCL_TEX_SWIZZLE_S1_X_Y 0x00000080 -#define NV40TCL_TEX_SWIZZLE_S1_X_X 0x000000c0 -#define NV40TCL_TEX_SWIZZLE_S1_Y_SHIFT 4 -#define NV40TCL_TEX_SWIZZLE_S1_Y_MASK 0x00000030 -#define NV40TCL_TEX_SWIZZLE_S1_Y_W 0x00000000 -#define NV40TCL_TEX_SWIZZLE_S1_Y_Z 0x00000010 -#define NV40TCL_TEX_SWIZZLE_S1_Y_Y 0x00000020 -#define NV40TCL_TEX_SWIZZLE_S1_Y_X 0x00000030 -#define NV40TCL_TEX_SWIZZLE_S1_Z_SHIFT 2 -#define NV40TCL_TEX_SWIZZLE_S1_Z_MASK 0x0000000c -#define NV40TCL_TEX_SWIZZLE_S1_Z_W 0x00000000 -#define NV40TCL_TEX_SWIZZLE_S1_Z_Z 0x00000004 -#define NV40TCL_TEX_SWIZZLE_S1_Z_Y 0x00000008 -#define NV40TCL_TEX_SWIZZLE_S1_Z_X 0x0000000c -#define NV40TCL_TEX_SWIZZLE_S1_W_SHIFT 0 -#define NV40TCL_TEX_SWIZZLE_S1_W_MASK 0x00000003 -#define NV40TCL_TEX_SWIZZLE_S1_W_W 0x00000000 -#define NV40TCL_TEX_SWIZZLE_S1_W_Z 0x00000001 -#define NV40TCL_TEX_SWIZZLE_S1_W_Y 0x00000002 -#define NV40TCL_TEX_SWIZZLE_S1_W_X 0x00000003 -#define NV40TCL_TEX_FILTER(x) (0x00001a14+((x)*32)) -#define NV40TCL_TEX_FILTER__SIZE 0x00000010 -#define NV40TCL_TEX_FILTER_SIGNED_ALPHA (1 << 31) -#define NV40TCL_TEX_FILTER_SIGNED_RED (1 << 30) -#define NV40TCL_TEX_FILTER_SIGNED_GREEN (1 << 29) -#define NV40TCL_TEX_FILTER_SIGNED_BLUE (1 << 28) -#define NV40TCL_TEX_FILTER_MIN_SHIFT 16 -#define NV40TCL_TEX_FILTER_MIN_MASK 0x000f0000 -#define NV40TCL_TEX_FILTER_MIN_NEAREST 0x00010000 -#define NV40TCL_TEX_FILTER_MIN_LINEAR 0x00020000 -#define NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST 0x00030000 -#define NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST 0x00040000 -#define NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR 0x00050000 -#define NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR 0x00060000 -#define NV40TCL_TEX_FILTER_MAG_SHIFT 24 -#define NV40TCL_TEX_FILTER_MAG_MASK 0x0f000000 -#define NV40TCL_TEX_FILTER_MAG_NEAREST 0x01000000 -#define NV40TCL_TEX_FILTER_MAG_LINEAR 0x02000000 -#define NV40TCL_TEX_SIZE0(x) (0x00001a18+((x)*32)) -#define NV40TCL_TEX_SIZE0__SIZE 0x00000010 -#define NV40TCL_TEX_SIZE0_H_SHIFT 0 -#define NV40TCL_TEX_SIZE0_H_MASK 0x0000ffff -#define NV40TCL_TEX_SIZE0_W_SHIFT 16 -#define NV40TCL_TEX_SIZE0_W_MASK 0xffff0000 -#define NV40TCL_TEX_BORDER_COLOR(x) (0x00001a1c+((x)*32)) -#define NV40TCL_TEX_BORDER_COLOR__SIZE 0x00000010 -#define NV40TCL_TEX_BORDER_COLOR_B_SHIFT 0 -#define NV40TCL_TEX_BORDER_COLOR_B_MASK 0x000000ff -#define NV40TCL_TEX_BORDER_COLOR_G_SHIFT 8 -#define NV40TCL_TEX_BORDER_COLOR_G_MASK 0x0000ff00 -#define NV40TCL_TEX_BORDER_COLOR_R_SHIFT 16 -#define NV40TCL_TEX_BORDER_COLOR_R_MASK 0x00ff0000 -#define NV40TCL_TEX_BORDER_COLOR_A_SHIFT 24 -#define NV40TCL_TEX_BORDER_COLOR_A_MASK 0xff000000 -#define NV40TCL_VTX_ATTR_4F_X(x) (0x00001c00+((x)*16)) -#define NV40TCL_VTX_ATTR_4F_X__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_4F_Y(x) (0x00001c04+((x)*16)) -#define NV40TCL_VTX_ATTR_4F_Y__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_4F_Z(x) (0x00001c08+((x)*16)) -#define NV40TCL_VTX_ATTR_4F_Z__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_4F_W(x) (0x00001c0c+((x)*16)) -#define NV40TCL_VTX_ATTR_4F_W__SIZE 0x00000010 -#define NV40TCL_FP_CONTROL 0x00001d60 -#define NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT 24 -#define NV40TCL_FP_CONTROL_TEMP_COUNT_MASK 0xff000000 -#define NV40TCL_FP_CONTROL_KIL (1 << 7) -#define NV40TCL_MULTISAMPLE_CONTROL 0x00001d7c -#define NV40TCL_CLEAR_VALUE_DEPTH 0x00001d8c -#define NV40TCL_CLEAR_VALUE_COLOR 0x00001d90 -#define NV40TCL_CLEAR_BUFFERS 0x00001d94 -#define NV40TCL_CLEAR_BUFFERS_COLOR_A (1 << 7) -#define NV40TCL_CLEAR_BUFFERS_COLOR_B (1 << 6) -#define NV40TCL_CLEAR_BUFFERS_COLOR_G (1 << 5) -#define NV40TCL_CLEAR_BUFFERS_COLOR_R (1 << 4) -#define NV40TCL_CLEAR_BUFFERS_STENCIL (1 << 1) -#define NV40TCL_CLEAR_BUFFERS_DEPTH (1 << 0) -#define NV40TCL_LINE_STIPPLE_ENABLE 0x00001db4 -#define NV40TCL_LINE_STIPPLE_PATTERN 0x00001db8 -#define NV40TCL_LINE_STIPPLE_PATTERN_FACTOR_SHIFT 0 -#define NV40TCL_LINE_STIPPLE_PATTERN_FACTOR_MASK 0x0000ffff -#define NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_SHIFT 16 -#define NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK 0xffff0000 -#define NV40TCL_VTX_ATTR_1F(x) (0x00001e40+((x)*4)) -#define NV40TCL_VTX_ATTR_1F__SIZE 0x00000010 -#define NV40TCL_VP_UPLOAD_FROM_ID 0x00001e9c -#define NV40TCL_VP_START_FROM_ID 0x00001ea0 -#define NV40TCL_POINT_SIZE 0x00001ee0 -#define NV40TCL_POINT_SPRITE 0x00001ee8 -#define NV40TCL_VP_UPLOAD_CONST_ID 0x00001efc -#define NV40TCL_VP_UPLOAD_CONST_X(x) (0x00001f00+((x)*16)) -#define NV40TCL_VP_UPLOAD_CONST_X__SIZE 0x00000004 -#define NV40TCL_VP_UPLOAD_CONST_Y(x) (0x00001f04+((x)*16)) -#define NV40TCL_VP_UPLOAD_CONST_Y__SIZE 0x00000004 -#define NV40TCL_VP_UPLOAD_CONST_Z(x) (0x00001f08+((x)*16)) -#define NV40TCL_VP_UPLOAD_CONST_Z__SIZE 0x00000004 -#define NV40TCL_VP_UPLOAD_CONST_W(x) (0x00001f0c+((x)*16)) -#define NV40TCL_VP_UPLOAD_CONST_W__SIZE 0x00000004 -#define NV40TCL_TEX_CACHE_CTL 0x00001fd8 -#define NV40TCL_VP_ATTRIB_EN 0x00001ff0 -#define NV40TCL_VP_RESULT_EN 0x00001ff4 - - -#define NV44TCL 0x00004497 - - - -#define NV50_2D 0x0000502d - -#define NV50_2D_NOP 0x00000100 -#define NV50_2D_NOTIFY 0x00000104 -#define NV50_2D_DMA_NOTIFY 0x00000180 -#define NV50_2D_DMA_IN_MEMORY0 0x00000184 -#define NV50_2D_DMA_IN_MEMORY1 0x00000188 -#define NV50_2D_DMA_IN_MEMORY2 0x0000018c -#define NV50_2D_DST_FORMAT 0x00000200 -#define NV50_2D_DST_FORMAT_32BPP 0x000000cf -#define NV50_2D_DST_FORMAT_24BPP 0x000000e6 -#define NV50_2D_DST_FORMAT_16BPP 0x000000e8 -#define NV50_2D_DST_FORMAT_8BPP 0x000000f3 -#define NV50_2D_DST_FORMAT_15BPP 0x000000f8 -#define NV50_2D_DST_PITCH 0x00000214 -#define NV50_2D_DST_WIDTH 0x00000218 -#define NV50_2D_DST_HEIGHT 0x0000021c -#define NV50_2D_DST_ADDRESS_HIGH 0x00000220 -#define NV50_2D_DST_ADDRESS_LOW 0x00000224 -#define NV50_2D_SRC_FORMAT 0x00000230 -#define NV50_2D_SRC_FORMAT_32BPP 0x000000cf -#define NV50_2D_SRC_FORMAT_24BPP 0x000000e6 -#define NV50_2D_SRC_FORMAT_16BPP 0x000000e8 -#define NV50_2D_SRC_FORMAT_8BPP 0x000000f3 -#define NV50_2D_SRC_FORMAT_15BPP 0x000000f8 -#define NV50_2D_SRC_PITCH 0x00000244 -#define NV50_2D_SRC_WIDTH 0x00000248 -#define NV50_2D_SRC_HEIGHT 0x0000024c -#define NV50_2D_SRC_ADDRESS_HIGH 0x00000250 -#define NV50_2D_SRC_ADDRESS_LOW 0x00000254 -#define NV50_2D_CLIP_X 0x00000280 -#define NV50_2D_CLIP_Y 0x00000284 -#define NV50_2D_CLIP_Z 0x00000288 -#define NV50_2D_CLIP_W 0x0000028c -#define NV50_2D_ROP 0x000002a0 -#define NV50_2D_OPERATION 0x000002ac -#define NV50_2D_OPERATION_SRCCOPY_AND 0x00000000 -#define NV50_2D_OPERATION_ROP_AND 0x00000001 -#define NV50_2D_OPERATION_BLEND_AND 0x00000002 -#define NV50_2D_OPERATION_SRCCOPY 0x00000003 -#define NV50_2D_OPERATION_SRCCOPY_PREMULT 0x00000004 -#define NV50_2D_OPERATION_BLEND_PREMULT 0x00000005 -#define NV50_2D_PATTERN_FORMAT 0x000002e8 -#define NV50_2D_PATTERN_FORMAT_16BPP 0x00000000 -#define NV50_2D_PATTERN_FORMAT_15BPP 0x00000001 -#define NV50_2D_PATTERN_FORMAT_32BPP 0x00000002 -#define NV50_2D_PATTERN_FORMAT_8BPP 0x00000003 -#define NV50_2D_PATTERN_COLOR(x) (0x000002f0+((x)*4)) -#define NV50_2D_PATTERN_COLOR__SIZE 0x00000002 -#define NV50_2D_PATTERN_BITMAP(x) (0x000002f8+((x)*4)) -#define NV50_2D_PATTERN_BITMAP__SIZE 0x00000002 -#define NV50_2D_RECT_FORMAT 0x00000584 -#define NV50_2D_RECT_FORMAT_32BPP 0x000000cf -#define NV50_2D_RECT_FORMAT_24BPP 0x000000e6 -#define NV50_2D_RECT_FORMAT_16BPP 0x000000e8 -#define NV50_2D_RECT_FORMAT_8BPP 0x000000f3 -#define NV50_2D_RECT_FORMAT_15BPP 0x000000f8 -#define NV50_2D_RECT_COLOR 0x00000588 -#define NV50_2D_RECT_X1 0x00000600 -#define NV50_2D_RECT_Y1 0x00000604 -#define NV50_2D_RECT_X2 0x00000608 -#define NV50_2D_RECT_Y2 0x0000060c -#define NV50_2D_SIFC_UNK0800 0x00000800 -#define NV50_2D_SIFC_FORMAT 0x00000804 -#define NV50_2D_SIFC_FORMAT_32BPP 0x000000cf -#define NV50_2D_SIFC_FORMAT_24BPP 0x000000e6 -#define NV50_2D_SIFC_FORMAT_16BPP 0x000000e8 -#define NV50_2D_SIFC_FORMAT_8BPP 0x000000f3 -#define NV50_2D_SIFC_FORMAT_15BPP 0x000000f8 -#define NV50_2D_SIFC_WIDTH 0x00000838 -#define NV50_2D_SIFC_HEIGHT 0x0000083c -#define NV50_2D_SIFC_SCALE_UNK0840 0x00000840 -#define NV50_2D_SIFC_SCALE_UNK0844 0x00000844 -#define NV50_2D_SIFC_SCALE_UNK0848 0x00000848 -#define NV50_2D_SIFC_SCALE_UNK084C 0x0000084c -#define NV50_2D_SIFC_UNK0850 0x00000850 -#define NV50_2D_SIFC_DST_X 0x00000854 -#define NV50_2D_SIFC_UNK0858 0x00000858 -#define NV50_2D_SIFC_DST_Y 0x0000085c -#define NV50_2D_SIFC_DATA 0x00000860 -#define NV50_2D_BLIT_DST_X 0x000008b0 -#define NV50_2D_BLIT_DST_Y 0x000008b4 -#define NV50_2D_BLIT_DST_W 0x000008b8 -#define NV50_2D_BLIT_DST_H 0x000008bc -#define NV50_2D_BLIT_SRC_X 0x000008d4 -#define NV50_2D_BLIT_SRC_Y 0x000008dc - - -#define NV50_MEMORY_TO_MEMORY_FORMAT 0x00005039 - -#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH 0x00000238 -#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH 0x0000023c - - -#define NV50TCL 0x00005097 - -#define NV50TCL_NOP 0x00000100 -#define NV50TCL_NOTIFY 0x00000104 -#define NV50TCL_DMA_NOTIFY 0x00000180 -#define NV50TCL_DMA_UNK0(x) (0x00000184+((x)*4)) -#define NV50TCL_DMA_UNK0__SIZE 0x0000000b -#define NV50TCL_DMA_UNK1(x) (0x000001c0+((x)*4)) -#define NV50TCL_DMA_UNK1__SIZE 0x00000008 -#define NV50TCL_RT_ADDRESS_HIGH(x) (0x00000200+((x)*32)) -#define NV50TCL_RT_ADDRESS_HIGH__SIZE 0x00000008 -#define NV50TCL_RT_ADDRESS_LOW(x) (0x00000204+((x)*32)) -#define NV50TCL_RT_ADDRESS_LOW__SIZE 0x00000008 -#define NV50TCL_RT_FORMAT(x) (0x00000208+((x)*32)) -#define NV50TCL_RT_FORMAT__SIZE 0x00000008 -#define NV50TCL_RT_FORMAT_32BPP 0x000000cf -#define NV50TCL_RT_FORMAT_24BPP 0x000000e6 -#define NV50TCL_RT_FORMAT_16BPP 0x000000e8 -#define NV50TCL_RT_FORMAT_8BPP 0x000000f3 -#define NV50TCL_RT_FORMAT_15BPP 0x000000f8 -#define NV50TCL_RT_TILE_UNK(x) (0x0000020c+((x)*32)) -#define NV50TCL_RT_TILE_UNK__SIZE 0x00000008 -#define NV50TCL_RT_UNK4(x) (0x00000210+((x)*32)) -#define NV50TCL_RT_UNK4__SIZE 0x00000008 -#define NV50TCL_VTX_ATTR_1F(x) (0x00000300+((x)*4)) -#define NV50TCL_VTX_ATTR_1F__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_2F_X(x) (0x00000380+((x)*8)) -#define NV50TCL_VTX_ATTR_2F_X__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_2F_Y(x) (0x00000384+((x)*8)) -#define NV50TCL_VTX_ATTR_2F_Y__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_3F_X(x) (0x00000400+((x)*16)) -#define NV50TCL_VTX_ATTR_3F_X__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_3F_Y(x) (0x00000404+((x)*16)) -#define NV50TCL_VTX_ATTR_3F_Y__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_3F_Z(x) (0x00000408+((x)*16)) -#define NV50TCL_VTX_ATTR_3F_Z__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_3F_W(x) (0x0000040c+((x)*16)) -#define NV50TCL_VTX_ATTR_3F_W__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_4F_X(x) (0x00000500+((x)*16)) -#define NV50TCL_VTX_ATTR_4F_X__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_4F_Y(x) (0x00000504+((x)*16)) -#define NV50TCL_VTX_ATTR_4F_Y__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_4F_Z(x) (0x00000508+((x)*16)) -#define NV50TCL_VTX_ATTR_4F_Z__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_4F_W(x) (0x0000050c+((x)*16)) -#define NV50TCL_VTX_ATTR_4F_W__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_2I(x) (0x00000680+((x)*4)) -#define NV50TCL_VTX_ATTR_2I__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_2I_X_SHIFT 0 -#define NV50TCL_VTX_ATTR_2I_X_MASK 0x0000ffff -#define NV50TCL_VTX_ATTR_2I_Y_SHIFT 16 -#define NV50TCL_VTX_ATTR_2I_Y_MASK 0xffff0000 -#define NV50TCL_VTX_ATTR_4I_0(x) (0x00000700+((x)*8)) -#define NV50TCL_VTX_ATTR_4I_0__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_4I_0_X_SHIFT 0 -#define NV50TCL_VTX_ATTR_4I_0_X_MASK 0x0000ffff -#define NV50TCL_VTX_ATTR_4I_0_Y_SHIFT 16 -#define NV50TCL_VTX_ATTR_4I_0_Y_MASK 0xffff0000 -#define NV50TCL_VTX_ATTR_4I_1(x) (0x00000704+((x)*8)) -#define NV50TCL_VTX_ATTR_4I_1__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_4I_1_Z_SHIFT 0 -#define NV50TCL_VTX_ATTR_4I_1_Z_MASK 0x0000ffff -#define NV50TCL_VTX_ATTR_4I_1_W_SHIFT 16 -#define NV50TCL_VTX_ATTR_4I_1_W_MASK 0xffff0000 -#define NV50TCL_VTX_ATTR_4NI_0(x) (0x00000780+((x)*8)) -#define NV50TCL_VTX_ATTR_4NI_0__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_4NI_0_X_SHIFT 0 -#define NV50TCL_VTX_ATTR_4NI_0_X_MASK 0x0000ffff -#define NV50TCL_VTX_ATTR_4NI_0_Y_SHIFT 16 -#define NV50TCL_VTX_ATTR_4NI_0_Y_MASK 0xffff0000 -#define NV50TCL_VTX_ATTR_4NI_1(x) (0x00000784+((x)*8)) -#define NV50TCL_VTX_ATTR_4NI_1__SIZE 0x00000010 -#define NV50TCL_VTX_ATTR_4NI_1_Z_SHIFT 0 -#define NV50TCL_VTX_ATTR_4NI_1_Z_MASK 0x0000ffff -#define NV50TCL_VTX_ATTR_4NI_1_W_SHIFT 16 -#define NV50TCL_VTX_ATTR_4NI_1_W_MASK 0xffff0000 -#define NV50TCL_VERTEX_ARRAY_FORMAT(x) (0x00000900+((x)*16)) -#define NV50TCL_VERTEX_ARRAY_FORMAT__SIZE 0x00000010 -#define NV50TCL_VIEWPORT_UNK0(x) (0x00000a00+((x)*4)) -#define NV50TCL_VIEWPORT_UNK0__SIZE 0x00000003 -#define NV50TCL_VIEWPORT_UNK1(x) (0x00000a0c+((x)*4)) -#define NV50TCL_VIEWPORT_UNK1__SIZE 0x00000003 -#define NV50TCL_VIEWPORT_HORIZ 0x00000c00 -#define NV50TCL_VIEWPORT_HORIZ_X_SHIFT 0 -#define NV50TCL_VIEWPORT_HORIZ_X_MASK 0x0000ffff -#define NV50TCL_VIEWPORT_HORIZ_W_SHIFT 16 -#define NV50TCL_VIEWPORT_HORIZ_W_MASK 0xffff0000 -#define NV50TCL_VIEWPORT_VERT 0x00000c04 -#define NV50TCL_VIEWPORT_VERT_Y_SHIFT 0 -#define NV50TCL_VIEWPORT_VERT_Y_MASK 0x0000ffff -#define NV50TCL_VIEWPORT_VERT_H_SHIFT 16 -#define NV50TCL_VIEWPORT_VERT_H_MASK 0xffff0000 -#define NV50TCL_DEPTH_RANGE_NEAR 0x00000c08 -#define NV50TCL_DEPTH_RANGE_FAR 0x00000c0c -#define NV50TCL_VIEWPORT_CLIP_HORIZ(x) (0x00000d00+((x)*8)) -#define NV50TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008 -#define NV50TCL_VIEWPORT_CLIP_VERT(x) (0x00000d04+((x)*8)) -#define NV50TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008 -#define NV50TCL_VERTEX_BUFFER_FIRST 0x00000d74 -#define NV50TCL_VERTEX_BUFFER_COUNT 0x00000d78 -#define NV50TCL_CLEAR_COLOR(x) (0x00000d80+((x)*4)) -#define NV50TCL_CLEAR_COLOR__SIZE 0x00000004 -#define NV50TCL_CLEAR_DEPTH 0x00000d90 -#define NV50TCL_CLEAR_STENCIL 0x00000da0 -#define NV50TCL_POLYGON_MODE_FRONT 0x00000dac -#define NV50TCL_POLYGON_MODE_FRONT_POINT 0x00001b00 -#define NV50TCL_POLYGON_MODE_FRONT_LINE 0x00001b01 -#define NV50TCL_POLYGON_MODE_FRONT_FILL 0x00001b02 -#define NV50TCL_POLYGON_MODE_BACK 0x00000db0 -#define NV50TCL_POLYGON_MODE_BACK_POINT 0x00001b00 -#define NV50TCL_POLYGON_MODE_BACK_LINE 0x00001b01 -#define NV50TCL_POLYGON_MODE_BACK_FILL 0x00001b02 -#define NV50TCL_POLYGON_SMOOTH_ENABLE 0x00000db4 -#define NV50TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000dc0 -#define NV50TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000dc4 -#define NV50TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000dc8 -#define NV50TCL_SCISSOR_HORIZ 0x00000e04 -#define NV50TCL_SCISSOR_HORIZ_L_SHIFT 0 -#define NV50TCL_SCISSOR_HORIZ_L_MASK 0x0000ffff -#define NV50TCL_SCISSOR_HORIZ_R_SHIFT 16 -#define NV50TCL_SCISSOR_HORIZ_R_MASK 0xffff0000 -#define NV50TCL_SCISSOR_VERT 0x00000e08 -#define NV50TCL_SCISSOR_VERT_T_SHIFT 0 -#define NV50TCL_SCISSOR_VERT_T_MASK 0x0000ffff -#define NV50TCL_SCISSOR_VERT_B_SHIFT 16 -#define NV50TCL_SCISSOR_VERT_B_MASK 0xffff0000 -#define NV50TCL_CB_ADDR 0x00000f00 -#define NV50TCL_CB_ADDR_ID_SHIFT 8 -#define NV50TCL_CB_ADDR_ID_MASK 0xffffff00 -#define NV50TCL_CB_ADDR_BUFFER_SHIFT 0 -#define NV50TCL_CB_ADDR_BUFFER_MASK 0x000000ff -#define NV50TCL_CB_DATA(x) (0x00000f04+((x)*4)) -#define NV50TCL_CB_DATA__SIZE 0x00000010 -#define NV50TCL_STENCIL_FRONT_FUNC_REF 0x00000f54 -#define NV50TCL_STENCIL_FRONT_MASK 0x00000f58 -#define NV50TCL_STENCIL_FRONT_FUNC_MASK 0x00000f5c -#define NV50TCL_GP_ADDRESS_HIGH 0x00000f70 -#define NV50TCL_GP_ADDRESS_LOW 0x00000f74 -#define NV50TCL_VP_ADDRESS_HIGH 0x00000f7c -#define NV50TCL_VP_ADDRESS_LOW 0x00000f80 -#define NV50TCL_FP_ADDRESS_HIGH 0x00000fa4 -#define NV50TCL_FP_ADDRESS_LOW 0x00000fa8 -#define NV50TCL_ZETA_ADDRESS_HIGH 0x00000fe0 -#define NV50TCL_ZETA_ADDRESS_LOW 0x00000fe4 -#define NV50TCL_UNKFF4 0x00000ff4 -#define NV50TCL_UNKFF4_W_SHIFT 16 -#define NV50TCL_UNKFF4_W_MASK 0xffff0000 -#define NV50TCL_UNKFF8 0x00000ff8 -#define NV50TCL_UNKFF8_H_SHIFT 16 -#define NV50TCL_UNKFF8_H_MASK 0xffff0000 -#define NV50TCL_RT_HORIZ(x) (0x00001240+((x)*8)) -#define NV50TCL_RT_HORIZ__SIZE 0x00000008 -#define NV50TCL_RT_VERT(x) (0x00001244+((x)*8)) -#define NV50TCL_RT_VERT__SIZE 0x00000008 -#define NV50TCL_CB_DEF_ADDRESS_HIGH 0x00001280 -#define NV50TCL_CB_DEF_ADDRESS_LOW 0x00001284 -#define NV50TCL_CB_DEF_SET 0x00001288 -#define NV50TCL_CB_DEF_SET_SIZE_SHIFT 0 -#define NV50TCL_CB_DEF_SET_SIZE_MASK 0x0000ffff -#define NV50TCL_CB_DEF_SET_BUFFER_SHIFT 16 -#define NV50TCL_CB_DEF_SET_BUFFER_MASK 0xffff0000 -#define NV50TCL_DEPTH_TEST_ENABLE 0x000012cc -#define NV50TCL_SHADE_MODEL 0x000012d4 -#define NV50TCL_SHADE_MODEL_FLAT 0x00001d00 -#define NV50TCL_SHADE_MODEL_SMOOTH 0x00001d01 -#define NV50TCL_DEPTH_WRITE_ENABLE 0x000012e8 -#define NV50TCL_ALPHA_TEST_ENABLE 0x000012ec -#define NV50TCL_DEPTH_TEST_FUNC 0x0000130c -#define NV50TCL_DEPTH_TEST_FUNC_NEVER 0x00000200 -#define NV50TCL_DEPTH_TEST_FUNC_LESS 0x00000201 -#define NV50TCL_DEPTH_TEST_FUNC_EQUAL 0x00000202 -#define NV50TCL_DEPTH_TEST_FUNC_LEQUAL 0x00000203 -#define NV50TCL_DEPTH_TEST_FUNC_GREATER 0x00000204 -#define NV50TCL_DEPTH_TEST_FUNC_GREATER 0x00000204 -#define NV50TCL_DEPTH_TEST_FUNC_NOTEQUAL 0x00000205 -#define NV50TCL_DEPTH_TEST_FUNC_GEQUAL 0x00000206 -#define NV50TCL_DEPTH_TEST_FUNC_ALWAYS 0x00000207 -#define NV50TCL_ALPHA_TEST_REF 0x00001310 -#define NV50TCL_ALPHA_TEST_FUNC 0x00001314 -#define NV50TCL_ALPHA_TEST_FUNC_NEVER 0x00000200 -#define NV50TCL_ALPHA_TEST_FUNC_LESS 0x00000201 -#define NV50TCL_ALPHA_TEST_FUNC_EQUAL 0x00000202 -#define NV50TCL_ALPHA_TEST_FUNC_LEQUAL 0x00000203 -#define NV50TCL_ALPHA_TEST_FUNC_GREATER 0x00000204 -#define NV50TCL_ALPHA_TEST_FUNC_GREATER 0x00000204 -#define NV50TCL_ALPHA_TEST_FUNC_NOTEQUAL 0x00000205 -#define NV50TCL_ALPHA_TEST_FUNC_GEQUAL 0x00000206 -#define NV50TCL_ALPHA_TEST_FUNC_ALWAYS 0x00000207 -#define NV50TCL_BLEND_COLOR(x) (0x0000131c+((x)*4)) -#define NV50TCL_BLEND_COLOR__SIZE 0x00000004 -#define NV50TCL_BLEND_EQUATION_RGB 0x00001340 -#define NV50TCL_BLEND_EQUATION_RGB_FUNC_ADD 0x00008006 -#define NV50TCL_BLEND_EQUATION_RGB_MIN 0x00008007 -#define NV50TCL_BLEND_EQUATION_RGB_MAX 0x00008008 -#define NV50TCL_BLEND_EQUATION_RGB_FUNC_SUBTRACT 0x0000800a -#define NV50TCL_BLEND_EQUATION_RGB_FUNC_REVERSE_SUBTRACT 0x0000800b -#define NV50TCL_BLEND_FUNC_SRC_RGB 0x00001344 -#define NV50TCL_BLEND_FUNC_SRC_RGB_ZERO 0x00000000 -#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE 0x00000001 -#define NV50TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR 0x00000300 -#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV50TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA 0x00000302 -#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV50TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA 0x00000304 -#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV50TCL_BLEND_FUNC_SRC_RGB_DST_COLOR 0x00000306 -#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR 0x00000307 -#define NV50TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE 0x00000308 -#define NV50TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR 0x00008001 -#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV50TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA 0x00008003 -#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV50TCL_BLEND_FUNC_DST_RGB 0x00001348 -#define NV50TCL_BLEND_FUNC_DST_RGB_ZERO 0x00000000 -#define NV50TCL_BLEND_FUNC_DST_RGB_ONE 0x00000001 -#define NV50TCL_BLEND_FUNC_DST_RGB_SRC_COLOR 0x00000300 -#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV50TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA 0x00000302 -#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV50TCL_BLEND_FUNC_DST_RGB_DST_ALPHA 0x00000304 -#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV50TCL_BLEND_FUNC_DST_RGB_DST_COLOR 0x00000306 -#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR 0x00000307 -#define NV50TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE 0x00000308 -#define NV50TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR 0x00008001 -#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV50TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA 0x00008003 -#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV50TCL_BLEND_EQUATION_ALPHA 0x0000134c -#define NV50TCL_BLEND_EQUATION_ALPHA_FUNC_ADD 0x00008006 -#define NV50TCL_BLEND_EQUATION_ALPHA_MIN 0x00008007 -#define NV50TCL_BLEND_EQUATION_ALPHA_MAX 0x00008008 -#define NV50TCL_BLEND_EQUATION_ALPHA_FUNC_SUBTRACT 0x0000800a -#define NV50TCL_BLEND_EQUATION_ALPHA_FUNC_REVERSE_SUBTRACT 0x0000800b -#define NV50TCL_BLEND_FUNC_SRC_ALPHA 0x00001350 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ZERO 0x00000000 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE 0x00000001 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR 0x00000300 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA 0x00000302 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA 0x00000304 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR 0x00000306 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR 0x00000307 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE 0x00000308 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR 0x00008001 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA 0x00008003 -#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV50TCL_BLEND_FUNC_DST_ALPHA 0x00001358 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_ZERO 0x00000000 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE 0x00000001 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR 0x00000300 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR 0x00000301 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA 0x00000302 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA 0x00000303 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA 0x00000304 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA 0x00000305 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR 0x00000306 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR 0x00000307 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE 0x00000308 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR 0x00008001 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x00008002 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x00008003 -#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x00008004 -#define NV50TCL_BLEND_ENABLE(x) (0x00001360+((x)*4)) -#define NV50TCL_BLEND_ENABLE__SIZE 0x00000008 -#define NV50TCL_STENCIL_BACK_ENABLE 0x00001380 -#define NV50TCL_STENCIL_BACK_OP_FAIL 0x00001384 -#define NV50TCL_STENCIL_BACK_OP_FAIL_ZERO 0x00000000 -#define NV50TCL_STENCIL_BACK_OP_FAIL_INVERT 0x0000150a -#define NV50TCL_STENCIL_BACK_OP_FAIL_KEEP 0x00001e00 -#define NV50TCL_STENCIL_BACK_OP_FAIL_REPLACE 0x00001e01 -#define NV50TCL_STENCIL_BACK_OP_FAIL_INCR 0x00001e02 -#define NV50TCL_STENCIL_BACK_OP_FAIL_DECR 0x00001e03 -#define NV50TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP 0x00008507 -#define NV50TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP 0x00008508 -#define NV50TCL_STENCIL_BACK_OP_ZFAIL 0x00001388 -#define NV50TCL_STENCIL_BACK_OP_ZFAIL_ZERO 0x00000000 -#define NV50TCL_STENCIL_BACK_OP_ZFAIL_INVERT 0x0000150a -#define NV50TCL_STENCIL_BACK_OP_ZFAIL_KEEP 0x00001e00 -#define NV50TCL_STENCIL_BACK_OP_ZFAIL_REPLACE 0x00001e01 -#define NV50TCL_STENCIL_BACK_OP_ZFAIL_INCR 0x00001e02 -#define NV50TCL_STENCIL_BACK_OP_ZFAIL_DECR 0x00001e03 -#define NV50TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP 0x00008507 -#define NV50TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP 0x00008508 -#define NV50TCL_STENCIL_BACK_OP_ZPASS 0x0000138c -#define NV50TCL_STENCIL_BACK_OP_ZPASS_ZERO 0x00000000 -#define NV50TCL_STENCIL_BACK_OP_ZPASS_INVERT 0x0000150a -#define NV50TCL_STENCIL_BACK_OP_ZPASS_KEEP 0x00001e00 -#define NV50TCL_STENCIL_BACK_OP_ZPASS_REPLACE 0x00001e01 -#define NV50TCL_STENCIL_BACK_OP_ZPASS_INCR 0x00001e02 -#define NV50TCL_STENCIL_BACK_OP_ZPASS_DECR 0x00001e03 -#define NV50TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP 0x00008507 -#define NV50TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP 0x00008508 -#define NV50TCL_STENCIL_BACK_FUNC_FUNC 0x00001390 -#define NV50TCL_STENCIL_BACK_FUNC_FUNC_NEVER 0x00000200 -#define NV50TCL_STENCIL_BACK_FUNC_FUNC_LESS 0x00000201 -#define NV50TCL_STENCIL_BACK_FUNC_FUNC_EQUAL 0x00000202 -#define NV50TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL 0x00000203 -#define NV50TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204 -#define NV50TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204 -#define NV50TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV50TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL 0x00000206 -#define NV50TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS 0x00000207 -#define NV50TCL_STENCIL_BACK_FUNC_REF 0x00001394 -#define NV50TCL_STENCIL_BACK_MASK 0x00001398 -#define NV50TCL_STENCIL_BACK_FUNC_MASK 0x0000139c -#define NV50TCL_LINE_WIDTH 0x000013b0 -#define NV50TCL_VP_START_ID 0x0000140c -#define NV50TCL_GP_START_ID 0x00001410 -#define NV50TCL_FP_START_ID 0x00001414 -#define NV50TCL_POINT_SIZE 0x00001518 -#define NV50TCL_TSC_ADDRESS_HIGH 0x0000155c -#define NV50TCL_TSC_ADDRESS_LOW 0x00001560 -#define NV50TCL_POLYGON_OFFSET_FACTOR 0x0000156c -#define NV50TCL_LINE_SMOOTH_ENABLE 0x00001570 -#define NV50TCL_TIC_ADDRESS_HIGH 0x00001574 -#define NV50TCL_TIC_ADDRESS_LOW 0x00001578 -#define NV50TCL_STENCIL_FRONT_ENABLE 0x00001594 -#define NV50TCL_STENCIL_FRONT_OP_FAIL 0x00001598 -#define NV50TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000 -#define NV50TCL_STENCIL_FRONT_OP_FAIL_INVERT 0x0000150a -#define NV50TCL_STENCIL_FRONT_OP_FAIL_KEEP 0x00001e00 -#define NV50TCL_STENCIL_FRONT_OP_FAIL_REPLACE 0x00001e01 -#define NV50TCL_STENCIL_FRONT_OP_FAIL_INCR 0x00001e02 -#define NV50TCL_STENCIL_FRONT_OP_FAIL_DECR 0x00001e03 -#define NV50TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP 0x00008507 -#define NV50TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP 0x00008508 -#define NV50TCL_STENCIL_FRONT_OP_ZFAIL 0x0000159c -#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_ZERO 0x00000000 -#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_INVERT 0x0000150a -#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_KEEP 0x00001e00 -#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE 0x00001e01 -#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_INCR 0x00001e02 -#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_DECR 0x00001e03 -#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP 0x00008507 -#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP 0x00008508 -#define NV50TCL_STENCIL_FRONT_OP_ZPASS 0x000015a0 -#define NV50TCL_STENCIL_FRONT_OP_ZPASS_ZERO 0x00000000 -#define NV50TCL_STENCIL_FRONT_OP_ZPASS_INVERT 0x0000150a -#define NV50TCL_STENCIL_FRONT_OP_ZPASS_KEEP 0x00001e00 -#define NV50TCL_STENCIL_FRONT_OP_ZPASS_REPLACE 0x00001e01 -#define NV50TCL_STENCIL_FRONT_OP_ZPASS_INCR 0x00001e02 -#define NV50TCL_STENCIL_FRONT_OP_ZPASS_DECR 0x00001e03 -#define NV50TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP 0x00008507 -#define NV50TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP 0x00008508 -#define NV50TCL_STENCIL_FRONT_FUNC_FUNC 0x000015a4 -#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_NEVER 0x00000200 -#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_LESS 0x00000201 -#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL 0x00000202 -#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL 0x00000203 -#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204 -#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204 -#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL 0x00000205 -#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL 0x00000206 -#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS 0x00000207 -#define NV50TCL_POLYGON_OFFSET_UNITS 0x000015bc -#define NV50TCL_VERTEX_BEGIN 0x000015dc -#define NV50TCL_VERTEX_BEGIN_POINTS 0x00000000 -#define NV50TCL_VERTEX_BEGIN_LINES 0x00000001 -#define NV50TCL_VERTEX_BEGIN_LINE_LOOP 0x00000002 -#define NV50TCL_VERTEX_BEGIN_LINE_STRIP 0x00000003 -#define NV50TCL_VERTEX_BEGIN_TRIANGLES 0x00000004 -#define NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP 0x00000005 -#define NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN 0x00000006 -#define NV50TCL_VERTEX_BEGIN_QUADS 0x00000007 -#define NV50TCL_VERTEX_BEGIN_QUAD_STRIP 0x00000008 -#define NV50TCL_VERTEX_BEGIN_POLYGON 0x00000009 -#define NV50TCL_VERTEX_END 0x000015e0 -#define NV50TCL_VERTEX_DATA 0x00001640 -#define NV50TCL_VP_ATTR_EN_0 0x00001650 -#define NV50TCL_VP_ATTR_EN_0_7_SHIFT 28 -#define NV50TCL_VP_ATTR_EN_0_7_MASK 0xf0000000 -#define NV50TCL_VP_ATTR_EN_0_7_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_0_7_XNNN 0x10000000 -#define NV50TCL_VP_ATTR_EN_0_7_NYNN 0x20000000 -#define NV50TCL_VP_ATTR_EN_0_7_XYNN 0x30000000 -#define NV50TCL_VP_ATTR_EN_0_7_NNZN 0x40000000 -#define NV50TCL_VP_ATTR_EN_0_7_XNZN 0x50000000 -#define NV50TCL_VP_ATTR_EN_0_7_NYZN 0x60000000 -#define NV50TCL_VP_ATTR_EN_0_7_XYZN 0x70000000 -#define NV50TCL_VP_ATTR_EN_0_7_NNNW 0x80000000 -#define NV50TCL_VP_ATTR_EN_0_7_XNNW 0x90000000 -#define NV50TCL_VP_ATTR_EN_0_7_NYNW 0xa0000000 -#define NV50TCL_VP_ATTR_EN_0_7_XYNW 0xb0000000 -#define NV50TCL_VP_ATTR_EN_0_7_NNZW 0xc0000000 -#define NV50TCL_VP_ATTR_EN_0_7_XNZW 0xd0000000 -#define NV50TCL_VP_ATTR_EN_0_7_NYZW 0xe0000000 -#define NV50TCL_VP_ATTR_EN_0_7_XYZW 0xf0000000 -#define NV50TCL_VP_ATTR_EN_0_6_SHIFT 24 -#define NV50TCL_VP_ATTR_EN_0_6_MASK 0x0f000000 -#define NV50TCL_VP_ATTR_EN_0_6_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_0_6_XNNN 0x01000000 -#define NV50TCL_VP_ATTR_EN_0_6_NYNN 0x02000000 -#define NV50TCL_VP_ATTR_EN_0_6_XYNN 0x03000000 -#define NV50TCL_VP_ATTR_EN_0_6_NNZN 0x04000000 -#define NV50TCL_VP_ATTR_EN_0_6_XNZN 0x05000000 -#define NV50TCL_VP_ATTR_EN_0_6_NYZN 0x06000000 -#define NV50TCL_VP_ATTR_EN_0_6_XYZN 0x07000000 -#define NV50TCL_VP_ATTR_EN_0_6_NNNW 0x08000000 -#define NV50TCL_VP_ATTR_EN_0_6_XNNW 0x09000000 -#define NV50TCL_VP_ATTR_EN_0_6_NYNW 0x0a000000 -#define NV50TCL_VP_ATTR_EN_0_6_XYNW 0x0b000000 -#define NV50TCL_VP_ATTR_EN_0_6_NNZW 0x0c000000 -#define NV50TCL_VP_ATTR_EN_0_6_XNZW 0x0d000000 -#define NV50TCL_VP_ATTR_EN_0_6_NYZW 0x0e000000 -#define NV50TCL_VP_ATTR_EN_0_6_XYZW 0x0f000000 -#define NV50TCL_VP_ATTR_EN_0_5_SHIFT 20 -#define NV50TCL_VP_ATTR_EN_0_5_MASK 0x00f00000 -#define NV50TCL_VP_ATTR_EN_0_5_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_0_5_XNNN 0x00100000 -#define NV50TCL_VP_ATTR_EN_0_5_NYNN 0x00200000 -#define NV50TCL_VP_ATTR_EN_0_5_XYNN 0x00300000 -#define NV50TCL_VP_ATTR_EN_0_5_NNZN 0x00400000 -#define NV50TCL_VP_ATTR_EN_0_5_XNZN 0x00500000 -#define NV50TCL_VP_ATTR_EN_0_5_NYZN 0x00600000 -#define NV50TCL_VP_ATTR_EN_0_5_XYZN 0x00700000 -#define NV50TCL_VP_ATTR_EN_0_5_NNNW 0x00800000 -#define NV50TCL_VP_ATTR_EN_0_5_XNNW 0x00900000 -#define NV50TCL_VP_ATTR_EN_0_5_NYNW 0x00a00000 -#define NV50TCL_VP_ATTR_EN_0_5_XYNW 0x00b00000 -#define NV50TCL_VP_ATTR_EN_0_5_NNZW 0x00c00000 -#define NV50TCL_VP_ATTR_EN_0_5_XNZW 0x00d00000 -#define NV50TCL_VP_ATTR_EN_0_5_NYZW 0x00e00000 -#define NV50TCL_VP_ATTR_EN_0_5_XYZW 0x00f00000 -#define NV50TCL_VP_ATTR_EN_0_4_SHIFT 16 -#define NV50TCL_VP_ATTR_EN_0_4_MASK 0x000f0000 -#define NV50TCL_VP_ATTR_EN_0_4_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_0_4_XNNN 0x00010000 -#define NV50TCL_VP_ATTR_EN_0_4_NYNN 0x00020000 -#define NV50TCL_VP_ATTR_EN_0_4_XYNN 0x00030000 -#define NV50TCL_VP_ATTR_EN_0_4_NNZN 0x00040000 -#define NV50TCL_VP_ATTR_EN_0_4_XNZN 0x00050000 -#define NV50TCL_VP_ATTR_EN_0_4_NYZN 0x00060000 -#define NV50TCL_VP_ATTR_EN_0_4_XYZN 0x00070000 -#define NV50TCL_VP_ATTR_EN_0_4_NNNW 0x00080000 -#define NV50TCL_VP_ATTR_EN_0_4_XNNW 0x00090000 -#define NV50TCL_VP_ATTR_EN_0_4_NYNW 0x000a0000 -#define NV50TCL_VP_ATTR_EN_0_4_XYNW 0x000b0000 -#define NV50TCL_VP_ATTR_EN_0_4_NNZW 0x000c0000 -#define NV50TCL_VP_ATTR_EN_0_4_XNZW 0x000d0000 -#define NV50TCL_VP_ATTR_EN_0_4_NYZW 0x000e0000 -#define NV50TCL_VP_ATTR_EN_0_4_XYZW 0x000f0000 -#define NV50TCL_VP_ATTR_EN_0_3_SHIFT 12 -#define NV50TCL_VP_ATTR_EN_0_3_MASK 0x0000f000 -#define NV50TCL_VP_ATTR_EN_0_3_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_0_3_XNNN 0x00001000 -#define NV50TCL_VP_ATTR_EN_0_3_NYNN 0x00002000 -#define NV50TCL_VP_ATTR_EN_0_3_XYNN 0x00003000 -#define NV50TCL_VP_ATTR_EN_0_3_NNZN 0x00004000 -#define NV50TCL_VP_ATTR_EN_0_3_XNZN 0x00005000 -#define NV50TCL_VP_ATTR_EN_0_3_NYZN 0x00006000 -#define NV50TCL_VP_ATTR_EN_0_3_XYZN 0x00007000 -#define NV50TCL_VP_ATTR_EN_0_3_NNNW 0x00008000 -#define NV50TCL_VP_ATTR_EN_0_3_XNNW 0x00009000 -#define NV50TCL_VP_ATTR_EN_0_3_NYNW 0x0000a000 -#define NV50TCL_VP_ATTR_EN_0_3_XYNW 0x0000b000 -#define NV50TCL_VP_ATTR_EN_0_3_NNZW 0x0000c000 -#define NV50TCL_VP_ATTR_EN_0_3_XNZW 0x0000d000 -#define NV50TCL_VP_ATTR_EN_0_3_NYZW 0x0000e000 -#define NV50TCL_VP_ATTR_EN_0_3_XYZW 0x0000f000 -#define NV50TCL_VP_ATTR_EN_0_2_SHIFT 8 -#define NV50TCL_VP_ATTR_EN_0_2_MASK 0x00000f00 -#define NV50TCL_VP_ATTR_EN_0_2_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_0_2_XNNN 0x00000100 -#define NV50TCL_VP_ATTR_EN_0_2_NYNN 0x00000200 -#define NV50TCL_VP_ATTR_EN_0_2_XYNN 0x00000300 -#define NV50TCL_VP_ATTR_EN_0_2_NNZN 0x00000400 -#define NV50TCL_VP_ATTR_EN_0_2_XNZN 0x00000500 -#define NV50TCL_VP_ATTR_EN_0_2_NYZN 0x00000600 -#define NV50TCL_VP_ATTR_EN_0_2_XYZN 0x00000700 -#define NV50TCL_VP_ATTR_EN_0_2_NNNW 0x00000800 -#define NV50TCL_VP_ATTR_EN_0_2_XNNW 0x00000900 -#define NV50TCL_VP_ATTR_EN_0_2_NYNW 0x00000a00 -#define NV50TCL_VP_ATTR_EN_0_2_XYNW 0x00000b00 -#define NV50TCL_VP_ATTR_EN_0_2_NNZW 0x00000c00 -#define NV50TCL_VP_ATTR_EN_0_2_XNZW 0x00000d00 -#define NV50TCL_VP_ATTR_EN_0_2_NYZW 0x00000e00 -#define NV50TCL_VP_ATTR_EN_0_2_XYZW 0x00000f00 -#define NV50TCL_VP_ATTR_EN_0_1_SHIFT 4 -#define NV50TCL_VP_ATTR_EN_0_1_MASK 0x000000f0 -#define NV50TCL_VP_ATTR_EN_0_1_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_0_1_XNNN 0x00000010 -#define NV50TCL_VP_ATTR_EN_0_1_NYNN 0x00000020 -#define NV50TCL_VP_ATTR_EN_0_1_XYNN 0x00000030 -#define NV50TCL_VP_ATTR_EN_0_1_NNZN 0x00000040 -#define NV50TCL_VP_ATTR_EN_0_1_XNZN 0x00000050 -#define NV50TCL_VP_ATTR_EN_0_1_NYZN 0x00000060 -#define NV50TCL_VP_ATTR_EN_0_1_XYZN 0x00000070 -#define NV50TCL_VP_ATTR_EN_0_1_NNNW 0x00000080 -#define NV50TCL_VP_ATTR_EN_0_1_XNNW 0x00000090 -#define NV50TCL_VP_ATTR_EN_0_1_NYNW 0x000000a0 -#define NV50TCL_VP_ATTR_EN_0_1_XYNW 0x000000b0 -#define NV50TCL_VP_ATTR_EN_0_1_NNZW 0x000000c0 -#define NV50TCL_VP_ATTR_EN_0_1_XNZW 0x000000d0 -#define NV50TCL_VP_ATTR_EN_0_1_NYZW 0x000000e0 -#define NV50TCL_VP_ATTR_EN_0_1_XYZW 0x000000f0 -#define NV50TCL_VP_ATTR_EN_0_0_SHIFT 0 -#define NV50TCL_VP_ATTR_EN_0_0_MASK 0x0000000f -#define NV50TCL_VP_ATTR_EN_0_0_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_0_0_XNNN 0x00000001 -#define NV50TCL_VP_ATTR_EN_0_0_NYNN 0x00000002 -#define NV50TCL_VP_ATTR_EN_0_0_XYNN 0x00000003 -#define NV50TCL_VP_ATTR_EN_0_0_NNZN 0x00000004 -#define NV50TCL_VP_ATTR_EN_0_0_XNZN 0x00000005 -#define NV50TCL_VP_ATTR_EN_0_0_NYZN 0x00000006 -#define NV50TCL_VP_ATTR_EN_0_0_XYZN 0x00000007 -#define NV50TCL_VP_ATTR_EN_0_0_NNNW 0x00000008 -#define NV50TCL_VP_ATTR_EN_0_0_XNNW 0x00000009 -#define NV50TCL_VP_ATTR_EN_0_0_NYNW 0x0000000a -#define NV50TCL_VP_ATTR_EN_0_0_XYNW 0x0000000b -#define NV50TCL_VP_ATTR_EN_0_0_NNZW 0x0000000c -#define NV50TCL_VP_ATTR_EN_0_0_XNZW 0x0000000d -#define NV50TCL_VP_ATTR_EN_0_0_NYZW 0x0000000e -#define NV50TCL_VP_ATTR_EN_0_0_XYZW 0x0000000f -#define NV50TCL_VP_ATTR_EN_1 0x00001654 -#define NV50TCL_VP_ATTR_EN_1_15_SHIFT 28 -#define NV50TCL_VP_ATTR_EN_1_15_MASK 0xf0000000 -#define NV50TCL_VP_ATTR_EN_1_15_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_1_15_XNNN 0x10000000 -#define NV50TCL_VP_ATTR_EN_1_15_NYNN 0x20000000 -#define NV50TCL_VP_ATTR_EN_1_15_XYNN 0x30000000 -#define NV50TCL_VP_ATTR_EN_1_15_NNZN 0x40000000 -#define NV50TCL_VP_ATTR_EN_1_15_XNZN 0x50000000 -#define NV50TCL_VP_ATTR_EN_1_15_NYZN 0x60000000 -#define NV50TCL_VP_ATTR_EN_1_15_XYZN 0x70000000 -#define NV50TCL_VP_ATTR_EN_1_15_NNNW 0x80000000 -#define NV50TCL_VP_ATTR_EN_1_15_XNNW 0x90000000 -#define NV50TCL_VP_ATTR_EN_1_15_NYNW 0xa0000000 -#define NV50TCL_VP_ATTR_EN_1_15_XYNW 0xb0000000 -#define NV50TCL_VP_ATTR_EN_1_15_NNZW 0xc0000000 -#define NV50TCL_VP_ATTR_EN_1_15_XNZW 0xd0000000 -#define NV50TCL_VP_ATTR_EN_1_15_NYZW 0xe0000000 -#define NV50TCL_VP_ATTR_EN_1_15_XYZW 0xf0000000 -#define NV50TCL_VP_ATTR_EN_1_14_SHIFT 24 -#define NV50TCL_VP_ATTR_EN_1_14_MASK 0x0f000000 -#define NV50TCL_VP_ATTR_EN_1_14_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_1_14_XNNN 0x01000000 -#define NV50TCL_VP_ATTR_EN_1_14_NYNN 0x02000000 -#define NV50TCL_VP_ATTR_EN_1_14_XYNN 0x03000000 -#define NV50TCL_VP_ATTR_EN_1_14_NNZN 0x04000000 -#define NV50TCL_VP_ATTR_EN_1_14_XNZN 0x05000000 -#define NV50TCL_VP_ATTR_EN_1_14_NYZN 0x06000000 -#define NV50TCL_VP_ATTR_EN_1_14_XYZN 0x07000000 -#define NV50TCL_VP_ATTR_EN_1_14_NNNW 0x08000000 -#define NV50TCL_VP_ATTR_EN_1_14_XNNW 0x09000000 -#define NV50TCL_VP_ATTR_EN_1_14_NYNW 0x0a000000 -#define NV50TCL_VP_ATTR_EN_1_14_XYNW 0x0b000000 -#define NV50TCL_VP_ATTR_EN_1_14_NNZW 0x0c000000 -#define NV50TCL_VP_ATTR_EN_1_14_XNZW 0x0d000000 -#define NV50TCL_VP_ATTR_EN_1_14_NYZW 0x0e000000 -#define NV50TCL_VP_ATTR_EN_1_14_XYZW 0x0f000000 -#define NV50TCL_VP_ATTR_EN_1_13_SHIFT 20 -#define NV50TCL_VP_ATTR_EN_1_13_MASK 0x00f00000 -#define NV50TCL_VP_ATTR_EN_1_13_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_1_13_XNNN 0x00100000 -#define NV50TCL_VP_ATTR_EN_1_13_NYNN 0x00200000 -#define NV50TCL_VP_ATTR_EN_1_13_XYNN 0x00300000 -#define NV50TCL_VP_ATTR_EN_1_13_NNZN 0x00400000 -#define NV50TCL_VP_ATTR_EN_1_13_XNZN 0x00500000 -#define NV50TCL_VP_ATTR_EN_1_13_NYZN 0x00600000 -#define NV50TCL_VP_ATTR_EN_1_13_XYZN 0x00700000 -#define NV50TCL_VP_ATTR_EN_1_13_NNNW 0x00800000 -#define NV50TCL_VP_ATTR_EN_1_13_XNNW 0x00900000 -#define NV50TCL_VP_ATTR_EN_1_13_NYNW 0x00a00000 -#define NV50TCL_VP_ATTR_EN_1_13_XYNW 0x00b00000 -#define NV50TCL_VP_ATTR_EN_1_13_NNZW 0x00c00000 -#define NV50TCL_VP_ATTR_EN_1_13_XNZW 0x00d00000 -#define NV50TCL_VP_ATTR_EN_1_13_NYZW 0x00e00000 -#define NV50TCL_VP_ATTR_EN_1_13_XYZW 0x00f00000 -#define NV50TCL_VP_ATTR_EN_1_12_SHIFT 16 -#define NV50TCL_VP_ATTR_EN_1_12_MASK 0x000f0000 -#define NV50TCL_VP_ATTR_EN_1_12_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_1_12_XNNN 0x00010000 -#define NV50TCL_VP_ATTR_EN_1_12_NYNN 0x00020000 -#define NV50TCL_VP_ATTR_EN_1_12_XYNN 0x00030000 -#define NV50TCL_VP_ATTR_EN_1_12_NNZN 0x00040000 -#define NV50TCL_VP_ATTR_EN_1_12_XNZN 0x00050000 -#define NV50TCL_VP_ATTR_EN_1_12_NYZN 0x00060000 -#define NV50TCL_VP_ATTR_EN_1_12_XYZN 0x00070000 -#define NV50TCL_VP_ATTR_EN_1_12_NNNW 0x00080000 -#define NV50TCL_VP_ATTR_EN_1_12_XNNW 0x00090000 -#define NV50TCL_VP_ATTR_EN_1_12_NYNW 0x000a0000 -#define NV50TCL_VP_ATTR_EN_1_12_XYNW 0x000b0000 -#define NV50TCL_VP_ATTR_EN_1_12_NNZW 0x000c0000 -#define NV50TCL_VP_ATTR_EN_1_12_XNZW 0x000d0000 -#define NV50TCL_VP_ATTR_EN_1_12_NYZW 0x000e0000 -#define NV50TCL_VP_ATTR_EN_1_12_XYZW 0x000f0000 -#define NV50TCL_VP_ATTR_EN_1_11_SHIFT 12 -#define NV50TCL_VP_ATTR_EN_1_11_MASK 0x0000f000 -#define NV50TCL_VP_ATTR_EN_1_11_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_1_11_XNNN 0x00001000 -#define NV50TCL_VP_ATTR_EN_1_11_NYNN 0x00002000 -#define NV50TCL_VP_ATTR_EN_1_11_XYNN 0x00003000 -#define NV50TCL_VP_ATTR_EN_1_11_NNZN 0x00004000 -#define NV50TCL_VP_ATTR_EN_1_11_XNZN 0x00005000 -#define NV50TCL_VP_ATTR_EN_1_11_NYZN 0x00006000 -#define NV50TCL_VP_ATTR_EN_1_11_XYZN 0x00007000 -#define NV50TCL_VP_ATTR_EN_1_11_NNNW 0x00008000 -#define NV50TCL_VP_ATTR_EN_1_11_XNNW 0x00009000 -#define NV50TCL_VP_ATTR_EN_1_11_NYNW 0x0000a000 -#define NV50TCL_VP_ATTR_EN_1_11_XYNW 0x0000b000 -#define NV50TCL_VP_ATTR_EN_1_11_NNZW 0x0000c000 -#define NV50TCL_VP_ATTR_EN_1_11_XNZW 0x0000d000 -#define NV50TCL_VP_ATTR_EN_1_11_NYZW 0x0000e000 -#define NV50TCL_VP_ATTR_EN_1_11_XYZW 0x0000f000 -#define NV50TCL_VP_ATTR_EN_1_10_SHIFT 8 -#define NV50TCL_VP_ATTR_EN_1_10_MASK 0x00000f00 -#define NV50TCL_VP_ATTR_EN_1_10_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_1_10_XNNN 0x00000100 -#define NV50TCL_VP_ATTR_EN_1_10_NYNN 0x00000200 -#define NV50TCL_VP_ATTR_EN_1_10_XYNN 0x00000300 -#define NV50TCL_VP_ATTR_EN_1_10_NNZN 0x00000400 -#define NV50TCL_VP_ATTR_EN_1_10_XNZN 0x00000500 -#define NV50TCL_VP_ATTR_EN_1_10_NYZN 0x00000600 -#define NV50TCL_VP_ATTR_EN_1_10_XYZN 0x00000700 -#define NV50TCL_VP_ATTR_EN_1_10_NNNW 0x00000800 -#define NV50TCL_VP_ATTR_EN_1_10_XNNW 0x00000900 -#define NV50TCL_VP_ATTR_EN_1_10_NYNW 0x00000a00 -#define NV50TCL_VP_ATTR_EN_1_10_XYNW 0x00000b00 -#define NV50TCL_VP_ATTR_EN_1_10_NNZW 0x00000c00 -#define NV50TCL_VP_ATTR_EN_1_10_XNZW 0x00000d00 -#define NV50TCL_VP_ATTR_EN_1_10_NYZW 0x00000e00 -#define NV50TCL_VP_ATTR_EN_1_10_XYZW 0x00000f00 -#define NV50TCL_VP_ATTR_EN_1_9_SHIFT 4 -#define NV50TCL_VP_ATTR_EN_1_9_MASK 0x000000f0 -#define NV50TCL_VP_ATTR_EN_1_9_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_1_9_XNNN 0x00000010 -#define NV50TCL_VP_ATTR_EN_1_9_NYNN 0x00000020 -#define NV50TCL_VP_ATTR_EN_1_9_XYNN 0x00000030 -#define NV50TCL_VP_ATTR_EN_1_9_NNZN 0x00000040 -#define NV50TCL_VP_ATTR_EN_1_9_XNZN 0x00000050 -#define NV50TCL_VP_ATTR_EN_1_9_NYZN 0x00000060 -#define NV50TCL_VP_ATTR_EN_1_9_XYZN 0x00000070 -#define NV50TCL_VP_ATTR_EN_1_9_NNNW 0x00000080 -#define NV50TCL_VP_ATTR_EN_1_9_XNNW 0x00000090 -#define NV50TCL_VP_ATTR_EN_1_9_NYNW 0x000000a0 -#define NV50TCL_VP_ATTR_EN_1_9_XYNW 0x000000b0 -#define NV50TCL_VP_ATTR_EN_1_9_NNZW 0x000000c0 -#define NV50TCL_VP_ATTR_EN_1_9_XNZW 0x000000d0 -#define NV50TCL_VP_ATTR_EN_1_9_NYZW 0x000000e0 -#define NV50TCL_VP_ATTR_EN_1_9_XYZW 0x000000f0 -#define NV50TCL_VP_ATTR_EN_1_8_SHIFT 0 -#define NV50TCL_VP_ATTR_EN_1_8_MASK 0x0000000f -#define NV50TCL_VP_ATTR_EN_1_8_NONE 0x00000000 -#define NV50TCL_VP_ATTR_EN_1_8_XNNN 0x00000001 -#define NV50TCL_VP_ATTR_EN_1_8_NYNN 0x00000002 -#define NV50TCL_VP_ATTR_EN_1_8_XYNN 0x00000003 -#define NV50TCL_VP_ATTR_EN_1_8_NNZN 0x00000004 -#define NV50TCL_VP_ATTR_EN_1_8_XNZN 0x00000005 -#define NV50TCL_VP_ATTR_EN_1_8_NYZN 0x00000006 -#define NV50TCL_VP_ATTR_EN_1_8_XYZN 0x00000007 -#define NV50TCL_VP_ATTR_EN_1_8_NNNW 0x00000008 -#define NV50TCL_VP_ATTR_EN_1_8_XNNW 0x00000009 -#define NV50TCL_VP_ATTR_EN_1_8_NYNW 0x0000000a -#define NV50TCL_VP_ATTR_EN_1_8_XYNW 0x0000000b -#define NV50TCL_VP_ATTR_EN_1_8_NNZW 0x0000000c -#define NV50TCL_VP_ATTR_EN_1_8_XNZW 0x0000000d -#define NV50TCL_VP_ATTR_EN_1_8_NYZW 0x0000000e -#define NV50TCL_VP_ATTR_EN_1_8_XYZW 0x0000000f -#define NV50TCL_LINE_STIPPLE_ENABLE 0x0000166c -#define NV50TCL_LINE_STIPPLE_PATTERN 0x00001680 -#define NV50TCL_POLYGON_STIPPLE_ENABLE 0x0000168c -#define NV50TCL_VP_REG_HPOS 0x000016bc -#define NV50TCL_VP_REG_HPOS_X_SHIFT 0 -#define NV50TCL_VP_REG_HPOS_X_MASK 0x000000ff -#define NV50TCL_VP_REG_HPOS_Y_SHIFT 8 -#define NV50TCL_VP_REG_HPOS_Y_MASK 0x0000ff00 -#define NV50TCL_VP_REG_HPOS_Z_SHIFT 16 -#define NV50TCL_VP_REG_HPOS_Z_MASK 0x00ff0000 -#define NV50TCL_VP_REG_HPOS_W_SHIFT 24 -#define NV50TCL_VP_REG_HPOS_W_MASK 0xff000000 -#define NV50TCL_VP_REG_COL0 0x000016c0 -#define NV50TCL_VP_REG_COL0_X_SHIFT 0 -#define NV50TCL_VP_REG_COL0_X_MASK 0x000000ff -#define NV50TCL_VP_REG_COL0_Y_SHIFT 8 -#define NV50TCL_VP_REG_COL0_Y_MASK 0x0000ff00 -#define NV50TCL_VP_REG_COL0_Z_SHIFT 16 -#define NV50TCL_VP_REG_COL0_Z_MASK 0x00ff0000 -#define NV50TCL_VP_REG_COL0_W_SHIFT 24 -#define NV50TCL_VP_REG_COL0_W_MASK 0xff000000 -#define NV50TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001700+((x)*4)) -#define NV50TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020 -#define NV50TCL_CULL_FACE_ENABLE 0x00001918 -#define NV50TCL_FRONT_FACE 0x0000191c -#define NV50TCL_FRONT_FACE_CW 0x00000900 -#define NV50TCL_FRONT_FACE_CCW 0x00000901 -#define NV50TCL_CULL_FACE 0x00001920 -#define NV50TCL_CULL_FACE_FRONT 0x00000404 -#define NV50TCL_CULL_FACE_BACK 0x00000405 -#define NV50TCL_CULL_FACE_FRONT_AND_BACK 0x00000408 -#define NV50TCL_LOGIC_OP_ENABLE 0x000019c4 -#define NV50TCL_LOGIC_OP 0x000019c8 -#define NV50TCL_LOGIC_OP_CLEAR 0x00001500 -#define NV50TCL_LOGIC_OP_AND 0x00001501 -#define NV50TCL_LOGIC_OP_AND_REVERSE 0x00001502 -#define NV50TCL_LOGIC_OP_COPY 0x00001503 -#define NV50TCL_LOGIC_OP_AND_INVERTED 0x00001504 -#define NV50TCL_LOGIC_OP_NOOP 0x00001505 -#define NV50TCL_LOGIC_OP_XOR 0x00001506 -#define NV50TCL_LOGIC_OP_OR 0x00001507 -#define NV50TCL_LOGIC_OP_NOR 0x00001508 -#define NV50TCL_LOGIC_OP_EQUIV 0x00001509 -#define NV50TCL_LOGIC_OP_INVERT 0x0000150a -#define NV50TCL_LOGIC_OP_OR_REVERSE 0x0000150b -#define NV50TCL_LOGIC_OP_COPY_INVERTED 0x0000150c -#define NV50TCL_LOGIC_OP_OR_INVERTED 0x0000150d -#define NV50TCL_LOGIC_OP_NAND 0x0000150e -#define NV50TCL_LOGIC_OP_SET 0x0000150f -#define NV50TCL_CLEAR_BUFFERS 0x000019d0 -#define NV50TCL_COLOR_MASK(x) (0x00001a00+((x)*4)) -#define NV50TCL_COLOR_MASK__SIZE 0x00000008 -#define NV50TCL_COLOR_MASK_R_SHIFT 0 -#define NV50TCL_COLOR_MASK_R_MASK 0x0000000f -#define NV50TCL_COLOR_MASK_G_SHIFT 4 -#define NV50TCL_COLOR_MASK_G_MASK 0x000000f0 -#define NV50TCL_COLOR_MASK_B_SHIFT 8 -#define NV50TCL_COLOR_MASK_B_MASK 0x00000f00 -#define NV50TCL_COLOR_MASK_A_SHIFT 12 -#define NV50TCL_COLOR_MASK_A_MASK 0x0000f000 - - -#define NV50_COMPUTE 0x000050c0 - -#define NV50_COMPUTE_DMA_UNK0 0x000001a0 -#define NV50_COMPUTE_DMA_STATUS 0x000001a4 -#define NV50_COMPUTE_DMA_UNK1 0x000001b8 -#define NV50_COMPUTE_DMA_UNK2 0x000001bc -#define NV50_COMPUTE_DMA_UNK3 0x000001c0 -#define NV50_COMPUTE_UNK4_HIGH 0x00000210 -#define NV50_COMPUTE_UNK4_LOW 0x00000214 -#define NV50_COMPUTE_UNK5_HIGH 0x00000218 -#define NV50_COMPUTE_UNK5_LOW 0x0000021c -#define NV50_COMPUTE_UNK6_HIGH 0x00000294 -#define NV50_COMPUTE_UNK6_LOW 0x00000298 -#define NV50_COMPUTE_CONST_BASE_HIGH 0x000002a4 -#define NV50_COMPUTE_CONST_BASE_LO 0x000002a8 -#define NV50_COMPUTE_CONST_SIZE_SEG 0x000002ac -#define NV50_COMPUTE_REG_COUNT 0x000002c0 -#define NV50_COMPUTE_STATUS_HIGH 0x00000310 -#define NV50_COMPUTE_STATUS_LOW 0x00000314 -#define NV50_COMPUTE_EXECUTE 0x0000031c -#define NV50_COMPUTE_USER_PARAM_COUNT 0x00000374 -#define NV50_COMPUTE_GRIDDIM_YX 0x000003a4 -#define NV50_COMPUTE_SHARED_SIZE 0x000003a8 -#define NV50_COMPUTE_BLOCKDIM_YX 0x000003ac -#define NV50_COMPUTE_BLOCKDIM_Z 0x000003b0 -#define NV50_COMPUTE_CALL_ADDRESS 0x000003b4 -#define NV50_COMPUTE_GLOBAL_BASE_HIGH(x) (0x00000400+((x)*32)) -#define NV50_COMPUTE_GLOBAL_BASE_HIGH__SIZE 0x00000010 -#define NV50_COMPUTE_GLOBAL_BASE_LOW(x) (0x00000404+((x)*32)) -#define NV50_COMPUTE_GLOBAL_BASE_LOW__SIZE 0x00000010 -#define NV50_COMPUTE_GLOBAL_LIMIT_HIGH(x) (0x00000408+((x)*32)) -#define NV50_COMPUTE_GLOBAL_LIMIT_HIGH__SIZE 0x00000010 -#define NV50_COMPUTE_GLOBAL_LIMIT_LOW(x) (0x0000040c+((x)*32)) -#define NV50_COMPUTE_GLOBAL_LIMIT_LOW__SIZE 0x00000010 -#define NV50_COMPUTE_GLOBAL_UNK(x) (0x00000410+((x)*32)) -#define NV50_COMPUTE_GLOBAL_UNK__SIZE 0x00000010 -#define NV50_COMPUTE_USER_PARAM(x) (0x00000600+((x)*4)) -#define NV50_COMPUTE_USER_PARAM__SIZE 0x00000040 - - -#define NV54TCL 0x00008297 - - - -#endif /* NOUVEAU_REG_H */ diff --git a/src/gallium/drivers/nouveau/nouveau_device.h b/src/gallium/drivers/nouveau/nouveau_device.h deleted file mode 100644 index e25e89fedd..0000000000 --- a/src/gallium/drivers/nouveau/nouveau_device.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_DEVICE_H__ -#define __NOUVEAU_DEVICE_H__ - -struct nouveau_device { - unsigned chipset; -}; - -#endif diff --git a/src/gallium/drivers/nouveau/nouveau_grobj.h b/src/gallium/drivers/nouveau/nouveau_grobj.h deleted file mode 100644 index 8f5abf9051..0000000000 --- a/src/gallium/drivers/nouveau/nouveau_grobj.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_GROBJ_H__ -#define __NOUVEAU_GROBJ_H__ - -#include "nouveau_channel.h" - -struct nouveau_grobj { - struct nouveau_channel *channel; - int grclass; - uint32_t handle; - int subc; -}; - -#endif diff --git a/src/gallium/drivers/nouveau/nouveau_notifier.h b/src/gallium/drivers/nouveau/nouveau_notifier.h deleted file mode 100644 index 35adde1e32..0000000000 --- a/src/gallium/drivers/nouveau/nouveau_notifier.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_NOTIFIER_H__ -#define __NOUVEAU_NOTIFIER_H__ - -#define NV_NOTIFIER_SIZE 32 -#define NV_NOTIFY_TIME_0 0x00000000 -#define NV_NOTIFY_TIME_1 0x00000004 -#define NV_NOTIFY_RETURN_VALUE 0x00000008 -#define NV_NOTIFY_STATE 0x0000000C -#define NV_NOTIFY_STATE_STATUS_MASK 0xFF000000 -#define NV_NOTIFY_STATE_STATUS_SHIFT 24 -#define NV_NOTIFY_STATE_STATUS_COMPLETED 0x00 -#define NV_NOTIFY_STATE_STATUS_IN_PROCESS 0x01 -#define NV_NOTIFY_STATE_ERROR_CODE_MASK 0x0000FFFF -#define NV_NOTIFY_STATE_ERROR_CODE_SHIFT 0 - -struct nouveau_notifier { - struct nouveau_channel *channel; - uint32_t handle; -}; - -#endif diff --git a/src/gallium/drivers/nouveau/nouveau_pushbuf.h b/src/gallium/drivers/nouveau/nouveau_pushbuf.h deleted file mode 100644 index 1909765098..0000000000 --- a/src/gallium/drivers/nouveau/nouveau_pushbuf.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_PUSHBUF_H__ -#define __NOUVEAU_PUSHBUF_H__ - -struct nouveau_pushbuf { - struct nouveau_channel *channel; - unsigned remaining; - uint32_t *cur; -}; - -#endif diff --git a/src/gallium/drivers/nouveau/nouveau_resource.h b/src/gallium/drivers/nouveau/nouveau_resource.h deleted file mode 100644 index 1af7961d30..0000000000 --- a/src/gallium/drivers/nouveau/nouveau_resource.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_RESOURCE_H__ -#define __NOUVEAU_RESOURCE_H__ - -struct nouveau_resource { - struct nouveau_resource *prev; - struct nouveau_resource *next; - - int in_use; - void *priv; - - unsigned int start; - unsigned int size; -}; - -#endif diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index 729988b095..4ae4ff4940 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -147,8 +147,9 @@ so_emit_reloc_markers(struct nouveau_winsys *nvws, struct nouveau_stateobj *so) struct nouveau_stateobj_reloc *r = &so->reloc[i]; nvws->push_reloc(nvws, pb->cur++, r->bo, r->packet, - (r->flags & - (NOUVEAU_BO_VRAM | NOUVEAU_BO_GART)) | + (r->flags & (NOUVEAU_BO_VRAM | + NOUVEAU_BO_GART | + NOUVEAU_BO_RDWR)) | NOUVEAU_BO_DUMMY, 0, 0); nvws->push_reloc(nvws, pb->cur++, r->bo, r->data, r->flags | NOUVEAU_BO_DUMMY, r->vor, r->tor); diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c index 602d76ac74..948112ffa9 100644 --- a/src/gallium/drivers/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nv50/nv50_state_validate.c @@ -47,9 +47,11 @@ nv50_state_validate_fb(struct nv50_context *nv50) so_method(so, tesla, NV50TCL_RT_ADDRESS_HIGH(i), 5); so_reloc (so, nv50_surface_buffer(fb->cbufs[i]), fb->cbufs[i]->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH, 0, 0); + NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH | + NOUVEAU_BO_RDWR, 0, 0); so_reloc (so, nv50_surface_buffer(fb->cbufs[i]), fb->cbufs[i]->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW, 0, 0); + NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW | + NOUVEAU_BO_RDWR, 0, 0); switch (fb->cbufs[i]->format) { case PIPE_FORMAT_A8R8G8B8_UNORM: so_data(so, 0xcf); @@ -82,9 +84,11 @@ nv50_state_validate_fb(struct nv50_context *nv50) so_method(so, tesla, NV50TCL_ZETA_ADDRESS_HIGH, 5); so_reloc (so, nv50_surface_buffer(fb->zsbuf), fb->zsbuf->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH, 0, 0); + NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH | + NOUVEAU_BO_RDWR, 0, 0); so_reloc (so, nv50_surface_buffer(fb->zsbuf), fb->zsbuf->offset, - NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW, 0, 0); + NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW | + NOUVEAU_BO_RDWR, 0, 0); switch (fb->zsbuf->format) { case PIPE_FORMAT_Z24S8_UNORM: so_data(so, 0x16); diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c index 239407c92b..675f9b20cb 100644 --- a/src/gallium/drivers/nv50/nv50_tex.c +++ b/src/gallium/drivers/nv50/nv50_tex.c @@ -117,13 +117,15 @@ nv50_tex_construct(struct nouveau_stateobj *so, struct nv50_miptree *mt) return 1; } - so_reloc(so, mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW, 0, 0); + so_reloc(so, mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW | + NOUVEAU_BO_RD, 0, 0); so_data (so, 0xd0005000); so_data (so, 0x00300000); so_data (so, mt->base.width[0]); so_data (so, (mt->base.depth[0] << 16) | mt->base.height[0]); so_data (so, 0x03000000); - so_reloc(so, mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH, 0, 0); + so_reloc(so, mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH | + NOUVEAU_BO_RD, 0, 0); return 0; } diff --git a/src/gallium/winsys/drm/nouveau/common/Makefile b/src/gallium/winsys/drm/nouveau/common/Makefile index 06f558959d..9bc5c42585 100644 --- a/src/gallium/winsys/drm/nouveau/common/Makefile +++ b/src/gallium/winsys/drm/nouveau/common/Makefile @@ -4,17 +4,8 @@ include $(TOP)/configs/current LIBNAME = nouveaudrm C_SOURCES = \ - nouveau_bo.c \ - nouveau_channel.c \ - nouveau_context.c \ - nouveau_device.c \ - nouveau_dma.c \ - nouveau_fence.c \ - nouveau_grobj.c \ + nouveau_context.c \ nouveau_lock.c \ - nouveau_notifier.c \ - nouveau_pushbuf.c \ - nouveau_resource.c \ nouveau_screen.c \ nouveau_winsys.c \ nouveau_winsys_pipe.c \ @@ -27,6 +18,8 @@ include ./Makefile.template DRIVER_DEFINES = $(shell pkg-config libdrm --cflags \ && pkg-config libdrm --atleast-version=2.3.1 \ + && pkg-config libdrm_nouveau --exact-version=0.5 \ + && pkg-config libdrm_nouveau --cflags \ && echo "-DDRM_VBLANK_FLIP=DRM_VBLANK_FLIP") symlinks: diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_bo.c b/src/gallium/winsys/drm/nouveau/common/nouveau_bo.c deleted file mode 100644 index 76b98bed67..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_bo.c +++ /dev/null @@ -1,504 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_dma.h" -#include "nouveau_local.h" - -static void -nouveau_mem_free(struct nouveau_device *dev, struct drm_nouveau_mem_alloc *ma, - void **map) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - struct drm_nouveau_mem_free mf; - - if (map && *map) { - drmUnmap(*map, ma->size); - *map = NULL; - } - - if (ma->size) { - mf.offset = ma->offset; - mf.flags = ma->flags; - drmCommandWrite(nvdev->fd, DRM_NOUVEAU_MEM_FREE, - &mf, sizeof(mf)); - ma->size = 0; - } -} - -static int -nouveau_mem_alloc(struct nouveau_device *dev, unsigned size, unsigned align, - uint32_t flags, struct drm_nouveau_mem_alloc *ma, void **map) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - int ret; - - ma->alignment = align; - ma->size = size; - ma->flags = flags; - if (map) - ma->flags |= NOUVEAU_MEM_MAPPED; - ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_MEM_ALLOC, ma, - sizeof(struct drm_nouveau_mem_alloc)); - if (ret) - return ret; - - if (map) { - ret = drmMap(nvdev->fd, ma->map_handle, ma->size, map); - if (ret) { - *map = NULL; - nouveau_mem_free(dev, ma, map); - return ret; - } - } - - return 0; -} - -static void -nouveau_bo_tmp_del(void *priv) -{ - struct nouveau_resource *r = priv; - - nouveau_fence_ref(NULL, (struct nouveau_fence **)&r->priv); - nouveau_resource_free(&r); -} - -static unsigned -nouveau_bo_tmp_max(struct nouveau_device_priv *nvdev) -{ - struct nouveau_resource *r = nvdev->sa_heap; - unsigned max = 0; - - while (r) { - if (r->in_use && !nouveau_fence(r->priv)->emitted) { - r = r->next; - continue; - } - - if (max < r->size) - max = r->size; - r = r->next; - } - - return max; -} - -static struct nouveau_resource * -nouveau_bo_tmp(struct nouveau_channel *chan, unsigned size, - struct nouveau_fence *fence) -{ - struct nouveau_device_priv *nvdev = nouveau_device(chan->device); - struct nouveau_resource *r = NULL; - struct nouveau_fence *ref = NULL; - - if (fence) - nouveau_fence_ref(fence, &ref); - else - nouveau_fence_new(chan, &ref); - assert(ref); - - while (nouveau_resource_alloc(nvdev->sa_heap, size, ref, &r)) { - if (nouveau_bo_tmp_max(nvdev) < size) { - nouveau_fence_ref(NULL, &ref); - return NULL; - } - - nouveau_fence_flush(chan); - } - nouveau_fence_signal_cb(ref, nouveau_bo_tmp_del, r); - - return r; -} - -int -nouveau_bo_init(struct nouveau_device *dev) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - int ret; - - ret = nouveau_mem_alloc(dev, 128*1024, 0, NOUVEAU_MEM_AGP | - NOUVEAU_MEM_PCI, &nvdev->sa, &nvdev->sa_map); - if (ret) - return ret; - - ret = nouveau_resource_init(&nvdev->sa_heap, 0, nvdev->sa.size); - if (ret) { - nouveau_mem_free(dev, &nvdev->sa, &nvdev->sa_map); - return ret; - } - - return 0; -} - -void -nouveau_bo_takedown(struct nouveau_device *dev) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - - nouveau_mem_free(dev, &nvdev->sa, &nvdev->sa_map); -} - -int -nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align, - int size, struct nouveau_bo **bo) -{ - struct nouveau_bo_priv *nvbo; - int ret; - - if (!dev || !bo || *bo) - return -EINVAL; - - nvbo = calloc(1, sizeof(struct nouveau_bo_priv)); - if (!nvbo) - return -ENOMEM; - nvbo->base.device = dev; - nvbo->base.size = size; - nvbo->base.handle = bo_to_ptr(nvbo); - nvbo->drm.alignment = align; - nvbo->refcount = 1; - - if (flags & NOUVEAU_BO_TILED) { - nvbo->tiled = 1; - if (flags & NOUVEAU_BO_ZTILE) - nvbo->tiled |= 2; - flags &= ~NOUVEAU_BO_TILED; - } - - ret = nouveau_bo_set_status(&nvbo->base, flags); - if (ret) { - free(nvbo); - return ret; - } - - *bo = &nvbo->base; - return 0; -} - -int -nouveau_bo_user(struct nouveau_device *dev, void *ptr, int size, - struct nouveau_bo **bo) -{ - struct nouveau_bo_priv *nvbo; - - if (!dev || !bo || *bo) - return -EINVAL; - - nvbo = calloc(1, sizeof(*nvbo)); - if (!nvbo) - return -ENOMEM; - nvbo->base.device = dev; - - nvbo->sysmem = ptr; - nvbo->user = 1; - - nvbo->base.size = size; - nvbo->base.offset = nvbo->drm.offset; - nvbo->base.handle = bo_to_ptr(nvbo); - nvbo->refcount = 1; - *bo = &nvbo->base; - return 0; -} - -int -nouveau_bo_ref(struct nouveau_device *dev, uint64_t handle, - struct nouveau_bo **bo) -{ - struct nouveau_bo_priv *nvbo = ptr_to_bo(handle); - - if (!dev || !bo || *bo) - return -EINVAL; - - nvbo->refcount++; - *bo = &nvbo->base; - return 0; -} - -static void -nouveau_bo_del_cb(void *priv) -{ - struct nouveau_bo_priv *nvbo = priv; - - nouveau_fence_ref(NULL, &nvbo->fence); - nouveau_mem_free(nvbo->base.device, &nvbo->drm, &nvbo->map); - if (nvbo->sysmem && !nvbo->user) - free(nvbo->sysmem); - free(nvbo); -} - -void -nouveau_bo_del(struct nouveau_bo **bo) -{ - struct nouveau_bo_priv *nvbo; - - if (!bo || !*bo) - return; - nvbo = nouveau_bo(*bo); - *bo = NULL; - - if (--nvbo->refcount) - return; - - if (nvbo->pending) - nouveau_pushbuf_flush(nvbo->pending->channel, 0); - - if (nvbo->fence) - nouveau_fence_signal_cb(nvbo->fence, nouveau_bo_del_cb, nvbo); - else - nouveau_bo_del_cb(nvbo); -} - -int -nouveau_bo_busy(struct nouveau_bo *bo, uint32_t flags) -{ - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - struct nouveau_fence *fence; - - if (!nvbo) - return -EINVAL; - - /* If the buffer is pending it must be busy, unless - * both are RD, in which case we can allow access */ - if (nvbo->pending) { - if ((nvbo->pending->flags & NOUVEAU_BO_RDWR) == NOUVEAU_BO_RD && - (flags & NOUVEAU_BO_RDWR) == NOUVEAU_BO_RD) - return 0; - else - return 1; - } - - if (flags & NOUVEAU_BO_WR) - fence = nvbo->fence; - else - fence = nvbo->wr_fence; - - /* If the buffer is not pending and doesn't have a fence - * that conflicts with our flags then it can't be busy - */ - if (!fence) - return 0; - else - /* If the fence is signalled the buffer is not busy, else is busy */ - return !nouveau_fence(fence)->signalled; -} - -int -nouveau_bo_map(struct nouveau_bo *bo, uint32_t flags) -{ - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - - if (!nvbo) - return -EINVAL; - - if (nvbo->pending && - (nvbo->pending->flags & NOUVEAU_BO_WR || flags & NOUVEAU_BO_WR)) { - nouveau_pushbuf_flush(nvbo->pending->channel, 0); - } - - if (flags & NOUVEAU_BO_WR) - nouveau_fence_wait(&nvbo->fence); - else - nouveau_fence_wait(&nvbo->wr_fence); - - if (nvbo->sysmem) - bo->map = nvbo->sysmem; - else - bo->map = nvbo->map; - return 0; -} - -void -nouveau_bo_unmap(struct nouveau_bo *bo) -{ - bo->map = NULL; -} - -static int -nouveau_bo_upload(struct nouveau_bo_priv *nvbo) -{ - if (nvbo->fence) - nouveau_fence_wait(&nvbo->fence); - memcpy(nvbo->map, nvbo->sysmem, nvbo->drm.size); - return 0; -} - -int -nouveau_bo_set_status(struct nouveau_bo *bo, uint32_t flags) -{ - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - struct drm_nouveau_mem_alloc new; - void *new_map = NULL, *new_sysmem = NULL; - unsigned new_flags = 0, ret; - - assert(!bo->map); - - /* Check current memtype vs requested, if they match do nothing */ - if ((nvbo->drm.flags & NOUVEAU_MEM_FB) && (flags & NOUVEAU_BO_VRAM)) - return 0; - if ((nvbo->drm.flags & (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI)) && - (flags & NOUVEAU_BO_GART)) - return 0; - if (nvbo->drm.size == 0 && nvbo->sysmem && (flags & NOUVEAU_BO_LOCAL)) - return 0; - - memset(&new, 0x00, sizeof(new)); - - /* Allocate new memory */ - if (flags & NOUVEAU_BO_VRAM) - new_flags |= NOUVEAU_MEM_FB; - else - if (flags & NOUVEAU_BO_GART) - new_flags |= (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI); - - if (nvbo->tiled && flags) { - new_flags |= NOUVEAU_MEM_TILE; - if (nvbo->tiled & 2) - new_flags |= NOUVEAU_MEM_TILE_ZETA; - } - - if (new_flags) { - ret = nouveau_mem_alloc(bo->device, bo->size, - nvbo->drm.alignment, new_flags, - &new, &new_map); - if (ret) - return ret; - } else - if (!nvbo->user) { - new_sysmem = malloc(bo->size); - } - - /* Copy old -> new */ - /*XXX: use M2MF */ - if (nvbo->sysmem || nvbo->map) { - struct nouveau_pushbuf_bo *pbo = nvbo->pending; - nvbo->pending = NULL; - nouveau_bo_map(bo, NOUVEAU_BO_RD); - memcpy(new_map, bo->map, bo->size); - nouveau_bo_unmap(bo); - nvbo->pending = pbo; - } - - /* Free old memory */ - if (nvbo->fence) - nouveau_fence_wait(&nvbo->fence); - nouveau_mem_free(bo->device, &nvbo->drm, &nvbo->map); - if (nvbo->sysmem && !nvbo->user) - free(nvbo->sysmem); - - nvbo->drm = new; - nvbo->map = new_map; - if (!nvbo->user) - nvbo->sysmem = new_sysmem; - bo->flags = flags; - bo->offset = nvbo->drm.offset; - return 0; -} - -static int -nouveau_bo_validate_user(struct nouveau_channel *chan, struct nouveau_bo *bo, - struct nouveau_fence *fence, uint32_t flags) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_device_priv *nvdev = nouveau_device(chan->device); - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - struct nouveau_resource *r; - - if (nvchan->user_charge + bo->size > nvdev->sa.size) - return 1; - - if (!(flags & NOUVEAU_BO_GART)) - return 1; - - r = nouveau_bo_tmp(chan, bo->size, fence); - if (!r) - return 1; - nvchan->user_charge += bo->size; - - memcpy(nvdev->sa_map + r->start, nvbo->sysmem, bo->size); - - nvbo->offset = nvdev->sa.offset + r->start; - nvbo->flags = NOUVEAU_BO_GART; - return 0; -} - -static int -nouveau_bo_validate_bo(struct nouveau_channel *chan, struct nouveau_bo *bo, - struct nouveau_fence *fence, uint32_t flags) -{ - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - int ret; - - ret = nouveau_bo_set_status(bo, flags); - if (ret) { - nouveau_fence_flush(chan); - - ret = nouveau_bo_set_status(bo, flags); - if (ret) - return ret; - } - - if (nvbo->user) - nouveau_bo_upload(nvbo); - - nvbo->offset = nvbo->drm.offset; - if (nvbo->drm.flags & (NOUVEAU_MEM_AGP | NOUVEAU_MEM_PCI)) - nvbo->flags = NOUVEAU_BO_GART; - else - nvbo->flags = NOUVEAU_BO_VRAM; - - return 0; -} - -int -nouveau_bo_validate(struct nouveau_channel *chan, struct nouveau_bo *bo, - uint32_t flags) -{ - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - struct nouveau_fence *fence = nouveau_pushbuf(chan->pushbuf)->fence; - int ret; - - assert(bo->map == NULL); - - if (nvbo->user) { - ret = nouveau_bo_validate_user(chan, bo, fence, flags); - if (ret) { - ret = nouveau_bo_validate_bo(chan, bo, fence, flags); - if (ret) - return ret; - } - } else { - ret = nouveau_bo_validate_bo(chan, bo, fence, flags); - if (ret) - return ret; - } - - if (flags & NOUVEAU_BO_WR) - nouveau_fence_ref(fence, &nvbo->wr_fence); - nouveau_fence_ref(fence, &nvbo->fence); - return 0; -} - diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_channel.c b/src/gallium/winsys/drm/nouveau/common/nouveau_channel.c deleted file mode 100644 index b7298131c1..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_channel.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include -#include -#include "nouveau_drmif.h" -#include "nouveau_dma.h" - -int -nouveau_channel_alloc(struct nouveau_device *dev, uint32_t fb_ctxdma, - uint32_t tt_ctxdma, struct nouveau_channel **chan) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - struct nouveau_channel_priv *nvchan; - int ret; - - if (!nvdev || !chan || *chan) - return -EINVAL; - - nvchan = CALLOC_STRUCT(nouveau_channel_priv); - if (!nvchan) - return -ENOMEM; - nvchan->base.device = dev; - - nvchan->drm.fb_ctxdma_handle = fb_ctxdma; - nvchan->drm.tt_ctxdma_handle = tt_ctxdma; - ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_CHANNEL_ALLOC, - &nvchan->drm, sizeof(nvchan->drm)); - if (ret) { - FREE(nvchan); - return ret; - } - - nvchan->base.id = nvchan->drm.channel; - if (nouveau_grobj_ref(&nvchan->base, nvchan->drm.fb_ctxdma_handle, - &nvchan->base.vram) || - nouveau_grobj_ref(&nvchan->base, nvchan->drm.tt_ctxdma_handle, - &nvchan->base.gart)) { - nouveau_channel_free((void *)&nvchan); - return -EINVAL; - } - - ret = drmMap(nvdev->fd, nvchan->drm.ctrl, nvchan->drm.ctrl_size, - (void*)&nvchan->user); - if (ret) { - nouveau_channel_free((void *)&nvchan); - return ret; - } - nvchan->put = &nvchan->user[0x40/4]; - nvchan->get = &nvchan->user[0x44/4]; - nvchan->ref_cnt = &nvchan->user[0x48/4]; - - ret = drmMap(nvdev->fd, nvchan->drm.notifier, nvchan->drm.notifier_size, - (drmAddressPtr)&nvchan->notifier_block); - if (ret) { - nouveau_channel_free((void *)&nvchan); - return ret; - } - - ret = drmMap(nvdev->fd, nvchan->drm.cmdbuf, nvchan->drm.cmdbuf_size, - (void*)&nvchan->pushbuf); - if (ret) { - nouveau_channel_free((void *)&nvchan); - return ret; - } - - ret = nouveau_grobj_alloc(&nvchan->base, 0x00000000, 0x0030, - &nvchan->base.nullobj); - if (ret) { - nouveau_channel_free((void *)&nvchan); - return ret; - } - - nouveau_dma_channel_init(&nvchan->base); - nouveau_pushbuf_init(&nvchan->base); - - *chan = &nvchan->base; - return 0; -} - -void -nouveau_channel_free(struct nouveau_channel **chan) -{ - struct nouveau_channel_priv *nvchan; - struct nouveau_device_priv *nvdev; - struct drm_nouveau_channel_free cf; - - if (!chan || !*chan) - return; - nvchan = nouveau_channel(*chan); - *chan = NULL; - nvdev = nouveau_device(nvchan->base.device); - - FIRE_RING_CH(&nvchan->base); - - nouveau_grobj_free(&nvchan->base.vram); - nouveau_grobj_free(&nvchan->base.gart); - nouveau_grobj_free(&nvchan->base.nullobj); - - FREE(nvchan->pb.buffers); - FREE(nvchan->pb.relocs); - cf.channel = nvchan->drm.channel; - drmCommandWrite(nvdev->fd, DRM_NOUVEAU_CHANNEL_FREE, &cf, sizeof(cf)); - FREE(nvchan); -} diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_context.c b/src/gallium/winsys/drm/nouveau/common/nouveau_context.c index e093877381..de4a90e25f 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_context.c +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_context.c @@ -43,7 +43,7 @@ nouveau_channel_context_create(struct nouveau_device *dev) return NULL; } - nvc->next_handle = 0x80000000; + nvc->next_handle = 0x88000000; if ((ret = nouveau_notifier_alloc(nvc->channel, nvc->next_handle++, 1, &nvc->sync_notifier))) { @@ -120,22 +120,12 @@ nouveau_context_init(struct nouveau_screen *nv_screen, { struct pipe_surface *fb_surf; struct nouveau_pipe_buffer *fb_buf; - struct nouveau_bo_priv *fb_bo; - - fb_bo = calloc(1, sizeof(struct nouveau_bo_priv)); - fb_bo->drm.offset = nv_screen->front_offset; - fb_bo->drm.flags = NOUVEAU_MEM_FB; - fb_bo->drm.size = nv_screen->front_pitch * - nv_screen->front_height; - fb_bo->refcount = 1; - fb_bo->base.flags = NOUVEAU_BO_PIN | NOUVEAU_BO_VRAM; - fb_bo->base.offset = fb_bo->drm.offset; - fb_bo->base.handle = (unsigned long)fb_bo; - fb_bo->base.size = fb_bo->drm.size; - fb_bo->base.device = nv_screen->device; fb_buf = calloc(1, sizeof(struct nouveau_pipe_buffer)); - fb_buf->bo = &fb_bo->base; + + nouveau_bo_fake(dev, nv_screen->front_offset, NOUVEAU_BO_VRAM, + nv_screen->front_pitch*nv_screen->front_height, + NULL, &fb_buf->bo); fb_surf = calloc(1, sizeof(struct pipe_surface)); if (nv_screen->front_cpp == 2) diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_context.h b/src/gallium/winsys/drm/nouveau/common/nouveau_context.h index b1bdb01bdf..d7199db3de 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_context.h +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_context.h @@ -3,7 +3,14 @@ #include "nouveau/nouveau_winsys.h" #include "nouveau_drmif.h" -#include "nouveau_dma.h" +#include "nouveau_device.h" +#include "nouveau_channel.h" +#include "nouveau_pushbuf.h" +#include "nouveau_bo.h" +#include "nouveau_grobj.h" +#include "nouveau_notifier.h" +#include "nouveau_class.h" +#include "nouveau_local.h" struct nouveau_channel_context { struct pipe_screen *pscreen; @@ -29,7 +36,6 @@ struct nouveau_channel_context { struct nouveau_grobj *Nv2D; uint32_t next_handle; - uint32_t next_subchannel; uint32_t next_sequence; }; diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_device.c b/src/gallium/winsys/drm/nouveau/common/nouveau_device.c deleted file mode 100644 index 92b57b834b..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_device.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include -#include -#include "nouveau_drmif.h" - -int -nouveau_device_open_existing(struct nouveau_device **dev, int close, - int fd, drm_context_t ctx) -{ - struct nouveau_device_priv *nvdev; - int ret; - - if (!dev || *dev) - return -EINVAL; - - nvdev = CALLOC_STRUCT(nouveau_device_priv); - if (!nvdev) - return -ENOMEM; - nvdev->fd = fd; - nvdev->ctx = ctx; - nvdev->needs_close = close; - - drmCommandNone(nvdev->fd, DRM_NOUVEAU_CARD_INIT); - - if ((ret = nouveau_bo_init(&nvdev->base))) { - nouveau_device_close((void *)&nvdev); - return ret; - } - - { - uint64_t value; - - ret = nouveau_device_get_param(&nvdev->base, - NOUVEAU_GETPARAM_CHIPSET_ID, - &value); - if (ret) { - nouveau_device_close((void *)&nvdev); - return ret; - } - nvdev->base.chipset = value; - } - - *dev = &nvdev->base; - return 0; -} - -int -nouveau_device_open(struct nouveau_device **dev, const char *busid) -{ - drm_context_t ctx; - int fd, ret; - - if (!dev || *dev) - return -EINVAL; - - fd = drmOpen("nouveau", busid); - if (fd < 0) - return -EINVAL; - - ret = drmCreateContext(fd, &ctx); - if (ret) { - drmClose(fd); - return ret; - } - - ret = nouveau_device_open_existing(dev, 1, fd, ctx); - if (ret) { - drmDestroyContext(fd, ctx); - drmClose(fd); - return ret; - } - - return 0; -} - -void -nouveau_device_close(struct nouveau_device **dev) -{ - struct nouveau_device_priv *nvdev; - - if (dev || !*dev) - return; - nvdev = nouveau_device(*dev); - *dev = NULL; - - nouveau_bo_takedown(&nvdev->base); - - if (nvdev->needs_close) { - drmDestroyContext(nvdev->fd, nvdev->ctx); - drmClose(nvdev->fd); - } - FREE(nvdev); -} - -int -nouveau_device_get_param(struct nouveau_device *dev, - uint64_t param, uint64_t *value) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - struct drm_nouveau_getparam g; - int ret; - - if (!nvdev || !value) - return -EINVAL; - - g.param = param; - ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GETPARAM, - &g, sizeof(g)); - if (ret) - return ret; - - *value = g.value; - return 0; -} - -int -nouveau_device_set_param(struct nouveau_device *dev, - uint64_t param, uint64_t value) -{ - struct nouveau_device_priv *nvdev = nouveau_device(dev); - struct drm_nouveau_setparam s; - int ret; - - if (!nvdev) - return -EINVAL; - - s.param = param; - s.value = value; - ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_SETPARAM, - &s, sizeof(s)); - if (ret) - return ret; - - return 0; -} - diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_dma.c b/src/gallium/winsys/drm/nouveau/common/nouveau_dma.c deleted file mode 100644 index f8a8ba04f6..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_dma.c +++ /dev/null @@ -1,219 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_dma.h" -#include "nouveau_local.h" - -static inline uint32_t -READ_GET(struct nouveau_channel_priv *nvchan) -{ - return *nvchan->get; -} - -static inline void -WRITE_PUT(struct nouveau_channel_priv *nvchan, uint32_t val) -{ - uint32_t put = ((val << 2) + nvchan->dma->base); - volatile int dum; - - NOUVEAU_DMA_BARRIER; - dum = READ_GET(nvchan); - - *nvchan->put = put; - nvchan->dma->put = val; -#ifdef NOUVEAU_DMA_TRACE - NOUVEAU_MSG("WRITE_PUT %d/0x%08x\n", nvchan->drm.channel, put); -#endif - - NOUVEAU_DMA_BARRIER; -} - -static inline int -LOCAL_GET(struct nouveau_dma_priv *dma, uint32_t *val) -{ - uint32_t get = *val; - - if (get >= dma->base && get <= (dma->base + (dma->max << 2))) { - *val = (get - dma->base) >> 2; - return 1; - } - - return 0; -} - -void -nouveau_dma_channel_init(struct nouveau_channel *chan) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - int i; - - nvchan->dma = &nvchan->dma_master; - nvchan->dma->base = nvchan->drm.put_base; - nvchan->dma->cur = nvchan->dma->put = 0; - nvchan->dma->max = (nvchan->drm.cmdbuf_size >> 2) - 2; - nvchan->dma->free = nvchan->dma->max - nvchan->dma->cur; - - RING_SPACE_CH(chan, RING_SKIPS); - for (i = 0; i < RING_SKIPS; i++) - OUT_RING_CH(chan, 0); -} - -#define CHECK_TIMEOUT() do { \ - if ((NOUVEAU_TIME_MSEC() - t_start) > NOUVEAU_DMA_TIMEOUT) \ - return - EBUSY; \ -} while(0) - -int -nouveau_dma_wait(struct nouveau_channel *chan, int size) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - uint32_t get, t_start; - - FIRE_RING_CH(chan); - - t_start = NOUVEAU_TIME_MSEC(); - while (dma->free < size) { - CHECK_TIMEOUT(); - - get = READ_GET(nvchan); - if (!LOCAL_GET(dma, &get)) - continue; - - if (dma->put >= get) { - dma->free = dma->max - dma->cur; - - if (dma->free < size) { -#ifdef NOUVEAU_DMA_DEBUG - dma->push_free = 1; -#endif - OUT_RING_CH(chan, 0x20000000 | dma->base); - if (get <= RING_SKIPS) { - /*corner case - will be idle*/ - if (dma->put <= RING_SKIPS) - WRITE_PUT(nvchan, - RING_SKIPS + 1); - - do { - CHECK_TIMEOUT(); - get = READ_GET(nvchan); - if (!LOCAL_GET(dma, &get)) - get = 0; - } while (get <= RING_SKIPS); - } - - WRITE_PUT(nvchan, RING_SKIPS); - dma->cur = dma->put = RING_SKIPS; - dma->free = get - (RING_SKIPS + 1); - } - } else { - dma->free = get - dma->cur - 1; - } - } - - return 0; -} - -#ifdef NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF -static void -nouveau_dma_parse_pushbuf(struct nouveau_channel *chan, int get, int put) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - unsigned mthd_count = 0; - - while (get != put) { - uint32_t gpuget = (get << 2) + nvchan->drm.put_base; - uint32_t data; - - if (get < 0 || get >= nvchan->drm.cmdbuf_size) { - NOUVEAU_ERR("DMA_PT 0x%08x\n", gpuget); - assert(0); - } - data = nvchan->pushbuf[get++]; - - if (mthd_count) { - NOUVEAU_MSG("0x%08x 0x%08x\n", gpuget, data); - mthd_count--; - continue; - } - - switch (data & 0x60000000) { - case 0x00000000: - mthd_count = (data >> 18) & 0x7ff; - NOUVEAU_MSG("0x%08x 0x%08x MTHD " - "Sc %d Mthd 0x%04x Size %d\n", - gpuget, data, (data>>13) & 7, data & 0x1ffc, - mthd_count); - break; - case 0x20000000: - get = (data & 0x1ffffffc) >> 2; - NOUVEAU_MSG("0x%08x 0x%08x JUMP 0x%08x\n", - gpuget, data, data & 0x1ffffffc); - continue; - case 0x40000000: - mthd_count = (data >> 18) & 0x7ff; - NOUVEAU_MSG("0x%08x 0x%08x NINC " - "Sc %d Mthd 0x%04x Size %d\n", - gpuget, data, (data>>13) & 7, data & 0x1ffc, - mthd_count); - break; - case 0x60000000: - /* DMA_OPCODE_CALL apparently, doesn't seem to work on - * my NV40 at least.. - */ - /* fall-through */ - default: - NOUVEAU_MSG("DMA_PUSHER 0x%08x 0x%08x\n", - gpuget, data); - assert(0); - } - } -} -#endif - -void -nouveau_dma_kickoff(struct nouveau_channel *chan) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - - if (dma->cur == dma->put) - return; - -#ifdef NOUVEAU_DMA_DEBUG - if (dma->push_free) { - NOUVEAU_ERR("Packet incomplete: %d left\n", dma->push_free); - return; - } -#endif - -#ifdef NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF - nouveau_dma_parse_pushbuf(chan, dma->put, dma->cur); -#endif - - WRITE_PUT(nvchan, dma->cur); -} diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_dma.h b/src/gallium/winsys/drm/nouveau/common/nouveau_dma.h deleted file mode 100644 index cfa6d26e82..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_dma.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_DMA_H__ -#define __NOUVEAU_DMA_H__ - -#include -#include "nouveau_drmif.h" -#include "nouveau_local.h" - -#define RING_SKIPS 8 - -extern int nouveau_dma_wait(struct nouveau_channel *chan, int size); -extern void nouveau_dma_subc_bind(struct nouveau_grobj *); -extern void nouveau_dma_channel_init(struct nouveau_channel *); -extern void nouveau_dma_kickoff(struct nouveau_channel *); - -#ifdef NOUVEAU_DMA_DEBUG -static char faulty[1024]; -#endif - -static inline void -nouveau_dma_out(struct nouveau_channel *chan, uint32_t data) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - -#ifdef NOUVEAU_DMA_DEBUG - if (dma->push_free == 0) { - NOUVEAU_ERR("No space left in packet at %s\n", faulty); - return; - } - dma->push_free--; -#endif -#ifdef NOUVEAU_DMA_TRACE - { - uint32_t offset = (dma->cur << 2) + dma->base; - NOUVEAU_MSG("\tOUT_RING %d/0x%08x -> 0x%08x\n", - nvchan->drm.channel, offset, data); - } -#endif - nvchan->pushbuf[dma->cur + (dma->base - nvchan->drm.put_base)/4] = data; - dma->cur++; -} - -static inline void -nouveau_dma_outp(struct nouveau_channel *chan, uint32_t *ptr, int size) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - (void)dma; - -#ifdef NOUVEAU_DMA_DEBUG - if (dma->push_free < size) { - NOUVEAU_ERR("Packet too small. Free=%d, Need=%d\n", - dma->push_free, size); - return; - } -#endif -#ifdef NOUVEAU_DMA_TRACE - while (size--) { - nouveau_dma_out(chan, *ptr); - ptr++; - } -#else - memcpy(&nvchan->pushbuf[dma->cur], ptr, size << 2); -#ifdef NOUVEAU_DMA_DEBUG - dma->push_free -= size; -#endif - dma->cur += size; -#endif -} - -static inline void -nouveau_dma_space(struct nouveau_channel *chan, int size) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - - if (dma->free < size) { - if (nouveau_dma_wait(chan, size) && chan->hang_notify) - chan->hang_notify(chan); - } - dma->free -= size; -#ifdef NOUVEAU_DMA_DEBUG - dma->push_free = size; -#endif -} - -static inline void -nouveau_dma_begin(struct nouveau_channel *chan, struct nouveau_grobj *grobj, - int method, int size, const char* file, int line) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *dma = nvchan->dma; - (void)dma; - -#ifdef NOUVEAU_DMA_TRACE - NOUVEAU_MSG("BEGIN_RING %d/%08x/%d/0x%04x/%d\n", nvchan->drm.channel, - grobj->handle, grobj->subc, method, size); -#endif - -#ifdef NOUVEAU_DMA_DEBUG - if (dma->push_free) { - NOUVEAU_ERR("Previous packet incomplete: %d left at %s\n", - dma->push_free, faulty); - return; - } - sprintf(faulty,"%s:%d",file,line); -#endif - - nouveau_dma_space(chan, (size + 1)); - nouveau_dma_out(chan, (size << 18) | (grobj->subc << 13) | method); -} - -#define RING_SPACE_CH(ch,sz) nouveau_dma_space((ch), (sz)) -#define BEGIN_RING_CH(ch,gr,m,sz) nouveau_dma_begin((ch), (gr), (m), (sz), __FUNCTION__, __LINE__ ) -#define OUT_RING_CH(ch, data) nouveau_dma_out((ch), (data)) -#define OUT_RINGp_CH(ch,ptr,dwords) nouveau_dma_outp((ch), (void*)(ptr), \ - (dwords)) -#define FIRE_RING_CH(ch) nouveau_dma_kickoff((ch)) -#define WAIT_RING_CH(ch,sz) nouveau_dma_wait((ch), (sz)) - -#endif diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_drmif.h b/src/gallium/winsys/drm/nouveau/common/nouveau_drmif.h deleted file mode 100644 index 5f72800676..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_drmif.h +++ /dev/null @@ -1,313 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef __NOUVEAU_DRMIF_H__ -#define __NOUVEAU_DRMIF_H__ - -#include -#include -#include - -#include "nouveau/nouveau_device.h" -#include "nouveau/nouveau_channel.h" -#include "nouveau/nouveau_grobj.h" -#include "nouveau/nouveau_notifier.h" -#include "nouveau/nouveau_bo.h" -#include "nouveau/nouveau_resource.h" -#include "nouveau/nouveau_pushbuf.h" - -struct nouveau_device_priv { - struct nouveau_device base; - - int fd; - drm_context_t ctx; - drmLock *lock; - int needs_close; - - struct drm_nouveau_mem_alloc sa; - void *sa_map; - struct nouveau_resource *sa_heap; -}; -#define nouveau_device(n) ((struct nouveau_device_priv *)(n)) - -extern int -nouveau_device_open_existing(struct nouveau_device **, int close, - int fd, drm_context_t ctx); - -extern int -nouveau_device_open(struct nouveau_device **, const char *busid); - -extern void -nouveau_device_close(struct nouveau_device **); - -extern int -nouveau_device_get_param(struct nouveau_device *, uint64_t param, uint64_t *v); - -extern int -nouveau_device_set_param(struct nouveau_device *, uint64_t param, uint64_t val); - -struct nouveau_fence { - struct nouveau_channel *channel; -}; - -struct nouveau_fence_cb { - struct nouveau_fence_cb *next; - void (*func)(void *); - void *priv; -}; - -struct nouveau_fence_priv { - struct nouveau_fence base; - int refcount; - - struct nouveau_fence *next; - struct nouveau_fence_cb *signal_cb; - - uint32_t sequence; - int emitted; - int signalled; -}; -#define nouveau_fence(n) ((struct nouveau_fence_priv *)(n)) - -extern int -nouveau_fence_new(struct nouveau_channel *, struct nouveau_fence **); - -extern int -nouveau_fence_ref(struct nouveau_fence *, struct nouveau_fence **); - -extern int -nouveau_fence_signal_cb(struct nouveau_fence *, void (*)(void *), void *); - -extern void -nouveau_fence_emit(struct nouveau_fence *); - -extern int -nouveau_fence_wait(struct nouveau_fence **); - -extern void -nouveau_fence_flush(struct nouveau_channel *); - -struct nouveau_pushbuf_reloc { - struct nouveau_pushbuf_bo *pbbo; - uint32_t *ptr; - uint32_t flags; - uint32_t data; - uint32_t vor; - uint32_t tor; -}; - -struct nouveau_pushbuf_bo { - struct nouveau_channel *channel; - struct nouveau_bo *bo; - unsigned flags; - unsigned handled; -}; - -#define NOUVEAU_PUSHBUF_MAX_BUFFERS 1024 -#define NOUVEAU_PUSHBUF_MAX_RELOCS 1024 -struct nouveau_pushbuf_priv { - struct nouveau_pushbuf base; - - struct nouveau_fence *fence; - - unsigned nop_jump; - unsigned start; - unsigned size; - - struct nouveau_pushbuf_bo *buffers; - unsigned nr_buffers; - struct nouveau_pushbuf_reloc *relocs; - unsigned nr_relocs; -}; -#define nouveau_pushbuf(n) ((struct nouveau_pushbuf_priv *)(n)) - -#define pbbo_to_ptr(o) ((uint64_t)(unsigned long)(o)) -#define ptr_to_pbbo(h) ((struct nouveau_pushbuf_bo *)(unsigned long)(h)) -#define pbrel_to_ptr(o) ((uint64_t)(unsigned long)(o)) -#define ptr_to_pbrel(h) ((struct nouveau_pushbuf_reloc *)(unsigned long)(h)) -#define bo_to_ptr(o) ((uint64_t)(unsigned long)(o)) -#define ptr_to_bo(h) ((struct nouveau_bo_priv *)(unsigned long)(h)) - -extern int -nouveau_pushbuf_init(struct nouveau_channel *); - -extern int -nouveau_pushbuf_flush(struct nouveau_channel *, unsigned min); - -extern int -nouveau_pushbuf_emit_reloc(struct nouveau_channel *, void *ptr, - struct nouveau_bo *, uint32_t data, uint32_t flags, - uint32_t vor, uint32_t tor); - -struct nouveau_dma_priv { - uint32_t base; - uint32_t max; - uint32_t cur; - uint32_t put; - uint32_t free; - - int push_free; -} dma; - -struct nouveau_channel_priv { - struct nouveau_channel base; - - struct drm_nouveau_channel_alloc drm; - - uint32_t *pushbuf; - void *notifier_block; - - volatile uint32_t *user; - volatile uint32_t *put; - volatile uint32_t *get; - volatile uint32_t *ref_cnt; - - struct nouveau_dma_priv dma_master; - struct nouveau_dma_priv dma_bufmgr; - struct nouveau_dma_priv *dma; - - struct nouveau_fence *fence_head; - struct nouveau_fence *fence_tail; - uint32_t fence_sequence; - - struct nouveau_pushbuf_priv pb; - - unsigned user_charge; -}; -#define nouveau_channel(n) ((struct nouveau_channel_priv *)(n)) - -extern int -nouveau_channel_alloc(struct nouveau_device *, uint32_t fb, uint32_t tt, - struct nouveau_channel **); - -extern void -nouveau_channel_free(struct nouveau_channel **); - -struct nouveau_grobj_priv { - struct nouveau_grobj base; -}; -#define nouveau_grobj(n) ((struct nouveau_grobj_priv *)(n)) - -extern int nouveau_grobj_alloc(struct nouveau_channel *, uint32_t handle, - int class, struct nouveau_grobj **); -extern int nouveau_grobj_ref(struct nouveau_channel *, uint32_t handle, - struct nouveau_grobj **); -extern void nouveau_grobj_free(struct nouveau_grobj **); - - -struct nouveau_notifier_priv { - struct nouveau_notifier base; - - struct drm_nouveau_notifierobj_alloc drm; - volatile void *map; -}; -#define nouveau_notifier(n) ((struct nouveau_notifier_priv *)(n)) - -extern int -nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle, int count, - struct nouveau_notifier **); - -extern void -nouveau_notifier_free(struct nouveau_notifier **); - -extern void -nouveau_notifier_reset(struct nouveau_notifier *, int id); - -extern uint32_t -nouveau_notifier_status(struct nouveau_notifier *, int id); - -extern uint32_t -nouveau_notifier_return_val(struct nouveau_notifier *, int id); - -extern int -nouveau_notifier_wait_status(struct nouveau_notifier *, int id, int status, - int timeout); - -struct nouveau_bo_priv { - struct nouveau_bo base; - - struct nouveau_pushbuf_bo *pending; - struct nouveau_fence *fence; - struct nouveau_fence *wr_fence; - - struct drm_nouveau_mem_alloc drm; - void *map; - - void *sysmem; - int user; - - int refcount; - - uint64_t offset; - uint64_t flags; - int tiled; -}; -#define nouveau_bo(n) ((struct nouveau_bo_priv *)(n)) - -extern int -nouveau_bo_init(struct nouveau_device *); - -extern void -nouveau_bo_takedown(struct nouveau_device *); - -extern int -nouveau_bo_new(struct nouveau_device *, uint32_t flags, int align, int size, - struct nouveau_bo **); - -extern int -nouveau_bo_user(struct nouveau_device *, void *ptr, int size, - struct nouveau_bo **); - -extern int -nouveau_bo_ref(struct nouveau_device *, uint64_t handle, struct nouveau_bo **); - -extern int -nouveau_bo_set_status(struct nouveau_bo *, uint32_t flags); - -extern void -nouveau_bo_del(struct nouveau_bo **); - -extern int -nouveau_bo_busy(struct nouveau_bo *bo, uint32_t flags); - -extern int -nouveau_bo_map(struct nouveau_bo *, uint32_t flags); - -extern void -nouveau_bo_unmap(struct nouveau_bo *); - -extern int -nouveau_bo_validate(struct nouveau_channel *, struct nouveau_bo *, - uint32_t flags); - -extern int -nouveau_resource_init(struct nouveau_resource **heap, unsigned start, - unsigned size); - -extern int -nouveau_resource_alloc(struct nouveau_resource *heap, int size, void *priv, - struct nouveau_resource **); - -extern void -nouveau_resource_free(struct nouveau_resource **); - -#endif diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_fence.c b/src/gallium/winsys/drm/nouveau/common/nouveau_fence.c deleted file mode 100644 index 451011e112..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_fence.c +++ /dev/null @@ -1,217 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_dma.h" -#include "nouveau_local.h" - -static void -nouveau_fence_del_unsignalled(struct nouveau_fence *fence) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(fence->channel); - struct nouveau_fence *le; - - if (nvchan->fence_head == fence) { - nvchan->fence_head = nouveau_fence(fence)->next; - if (nvchan->fence_head == NULL) - nvchan->fence_tail = NULL; - return; - } - - le = nvchan->fence_head; - while (le && nouveau_fence(le)->next != fence) - le = nouveau_fence(le)->next; - assert(le && nouveau_fence(le)->next == fence); - nouveau_fence(le)->next = nouveau_fence(fence)->next; - if (nvchan->fence_tail == fence) - nvchan->fence_tail = le; -} - -static void -nouveau_fence_del(struct nouveau_fence **fence) -{ - struct nouveau_fence_priv *nvfence; - - if (!fence || !*fence) - return; - nvfence = nouveau_fence(*fence); - *fence = NULL; - - if (--nvfence->refcount) - return; - - if (nvfence->emitted && !nvfence->signalled) { - if (nvfence->signal_cb) { - nvfence->refcount++; - nouveau_fence_wait((void *)&nvfence); - return; - } - - nouveau_fence_del_unsignalled(&nvfence->base); - } - free(nvfence); -} - -int -nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **fence) -{ - struct nouveau_fence_priv *nvfence; - - if (!chan || !fence || *fence) - return -EINVAL; - - nvfence = calloc(1, sizeof(struct nouveau_fence_priv)); - if (!nvfence) - return -ENOMEM; - nvfence->base.channel = chan; - nvfence->refcount = 1; - - *fence = &nvfence->base; - return 0; -} - -int -nouveau_fence_ref(struct nouveau_fence *ref, struct nouveau_fence **fence) -{ - struct nouveau_fence_priv *nvfence; - - if (!fence) - return -EINVAL; - - if (*fence) { - nouveau_fence_del(fence); - *fence = NULL; - } - - if (ref) { - nvfence = nouveau_fence(ref); - nvfence->refcount++; - *fence = &nvfence->base; - } - - return 0; -} - -int -nouveau_fence_signal_cb(struct nouveau_fence *fence, void (*func)(void *), - void *priv) -{ - struct nouveau_fence_priv *nvfence = nouveau_fence(fence); - struct nouveau_fence_cb *cb; - - if (!nvfence || !func) - return -EINVAL; - - cb = malloc(sizeof(struct nouveau_fence_cb)); - if (!cb) - return -ENOMEM; - - cb->func = func; - cb->priv = priv; - cb->next = nvfence->signal_cb; - nvfence->signal_cb = cb; - return 0; -} - -void -nouveau_fence_emit(struct nouveau_fence *fence) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(fence->channel); - struct nouveau_fence_priv *nvfence = nouveau_fence(fence); - - nvfence->emitted = 1; - nvfence->sequence = ++nvchan->fence_sequence; - if (nvfence->sequence == 0xffffffff) - NOUVEAU_ERR("AII wrap unhandled\n"); - - /*XXX: assumes subc 0 is populated */ - /* Not the way to fence on nv4 */ - if (nvchan->base.device->chipset >= 0x10) { - RING_SPACE_CH(fence->channel, 2); - OUT_RING_CH (fence->channel, 0x00040050); - OUT_RING_CH (fence->channel, nvfence->sequence); - } - - if (nvchan->fence_tail) { - nouveau_fence(nvchan->fence_tail)->next = fence; - } else { - nvchan->fence_head = fence; - } - nvchan->fence_tail = fence; -} - -void -nouveau_fence_flush(struct nouveau_channel *chan) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - uint32_t sequence = *nvchan->ref_cnt; - - while (nvchan->fence_head) { - struct nouveau_fence_priv *nvfence; - - nvfence = nouveau_fence(nvchan->fence_head); - if (nvfence->sequence > sequence) - break; - nouveau_fence_del_unsignalled(&nvfence->base); - nvfence->signalled = 1; - - if (nvfence->signal_cb) { - struct nouveau_fence *fence = NULL; - - nouveau_fence_ref(&nvfence->base, &fence); - - while (nvfence->signal_cb) { - struct nouveau_fence_cb *cb; - - cb = nvfence->signal_cb; - nvfence->signal_cb = cb->next; - cb->func(cb->priv); - free(cb); - } - - nouveau_fence_ref(NULL, &fence); - } - } -} - -int -nouveau_fence_wait(struct nouveau_fence **fence) -{ - struct nouveau_fence_priv *nvfence; - - if (!fence || !*fence) - return -EINVAL; - nvfence = nouveau_fence(*fence); - - if (nvfence->emitted) { - while (!nvfence->signalled) - nouveau_fence_flush(nvfence->base.channel); - } - nouveau_fence_ref(NULL, fence); - - return 0; -} - diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_grobj.c b/src/gallium/winsys/drm/nouveau/common/nouveau_grobj.c deleted file mode 100644 index fb430a25b8..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_grobj.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include -#include "nouveau_drmif.h" - -int -nouveau_grobj_alloc(struct nouveau_channel *chan, uint32_t handle, - int class, struct nouveau_grobj **grobj) -{ - struct nouveau_device_priv *nvdev = nouveau_device(chan->device); - struct nouveau_grobj_priv *nvgrobj; - struct drm_nouveau_grobj_alloc g; - int ret; - - if (!nvdev || !grobj || *grobj) - return -EINVAL; - - nvgrobj = CALLOC_STRUCT(nouveau_grobj_priv); - if (!nvgrobj) - return -ENOMEM; - nvgrobj->base.channel = chan; - nvgrobj->base.handle = handle; - nvgrobj->base.grclass = class; - - g.channel = chan->id; - g.handle = handle; - g.class = class; - ret = drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GROBJ_ALLOC, - &g, sizeof(g)); - if (ret) { - nouveau_grobj_free((void *)&nvgrobj); - return ret; - } - - *grobj = &nvgrobj->base; - return 0; -} - -int -nouveau_grobj_ref(struct nouveau_channel *chan, uint32_t handle, - struct nouveau_grobj **grobj) -{ - struct nouveau_grobj_priv *nvgrobj; - - if (!chan || !grobj || *grobj) - return -EINVAL; - - nvgrobj = CALLOC_STRUCT(nouveau_grobj_priv); - if (!nvgrobj) - return -ENOMEM; - nvgrobj->base.channel = chan; - nvgrobj->base.handle = handle; - nvgrobj->base.grclass = 0; - - *grobj = &nvgrobj->base; - return 0; -} - -void -nouveau_grobj_free(struct nouveau_grobj **grobj) -{ - struct nouveau_device_priv *nvdev; - struct nouveau_channel_priv *chan; - struct nouveau_grobj_priv *nvgrobj; - - if (!grobj || !*grobj) - return; - nvgrobj = nouveau_grobj(*grobj); - *grobj = NULL; - - - chan = nouveau_channel(nvgrobj->base.channel); - nvdev = nouveau_device(chan->base.device); - - if (nvgrobj->base.grclass) { - struct drm_nouveau_gpuobj_free f; - - f.channel = chan->drm.channel; - f.handle = nvgrobj->base.handle; - drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE, - &f, sizeof(f)); - } - FREE(nvgrobj); -} - diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_local.h b/src/gallium/winsys/drm/nouveau/common/nouveau_local.h index 877c7a8c47..11175bce7a 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_local.h +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_local.h @@ -16,100 +16,4 @@ fflush(stderr); \ } while(0) -#define NOUVEAU_TIME_MSEC() 0 - -/* User FIFO control */ -//#define NOUVEAU_DMA_TRACE -//#define NOUVEAU_DMA_DEBUG -//#define NOUVEAU_DMA_DUMP_POSTRELOC_PUSHBUF -#define NOUVEAU_DMA_BARRIER -#define NOUVEAU_DMA_TIMEOUT 2000 - -/* Push buffer access macros */ -static INLINE void -OUT_RING(struct nouveau_channel *chan, unsigned data) -{ - *(chan->pushbuf->cur++) = (data); -} - -static INLINE void -OUT_RINGp(struct nouveau_channel *chan, uint32_t *data, unsigned size) -{ - memcpy(chan->pushbuf->cur, data, size * 4); - chan->pushbuf->cur += size; -} - -static INLINE void -OUT_RINGf(struct nouveau_channel *chan, float f) -{ - union { uint32_t i; float f; } c; - c.f = f; - OUT_RING(chan, c.i); -} - -static INLINE void -BEGIN_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr, - unsigned mthd, unsigned size) -{ - if (chan->pushbuf->remaining < (size + 1)) - nouveau_pushbuf_flush(chan, (size + 1)); - OUT_RING(chan, (gr->subc << 13) | (size << 18) | mthd); - chan->pushbuf->remaining -= (size + 1); -} - -static INLINE void -FIRE_RING(struct nouveau_channel *chan) -{ - nouveau_pushbuf_flush(chan, 0); -} - -static INLINE void -BIND_RING(struct nouveau_channel *chan, struct nouveau_grobj *gr, unsigned subc) -{ - gr->subc = subc; - BEGIN_RING(chan, gr, 0x0000, 1); - OUT_RING (chan, gr->handle); -} - -static INLINE void -OUT_RELOC(struct nouveau_channel *chan, struct nouveau_bo *bo, - unsigned data, unsigned flags, unsigned vor, unsigned tor) -{ - nouveau_pushbuf_emit_reloc(chan, chan->pushbuf->cur++, bo, - data, flags, vor, tor); -} - -/* Raw data + flags depending on FB/TT buffer */ -static INLINE void -OUT_RELOCd(struct nouveau_channel *chan, struct nouveau_bo *bo, - unsigned data, unsigned flags, unsigned vor, unsigned tor) -{ - OUT_RELOC(chan, bo, data, flags | NOUVEAU_BO_OR, vor, tor); -} - -/* FB/TT object handle */ -static INLINE void -OUT_RELOCo(struct nouveau_channel *chan, struct nouveau_bo *bo, - unsigned flags) -{ - OUT_RELOC(chan, bo, 0, flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); -} - -/* Low 32-bits of offset */ -static INLINE void -OUT_RELOCl(struct nouveau_channel *chan, struct nouveau_bo *bo, - unsigned delta, unsigned flags) -{ - OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_LOW, 0, 0); -} - -/* High 32-bits of offset */ -static INLINE void -OUT_RELOCh(struct nouveau_channel *chan, struct nouveau_bo *bo, - unsigned delta, unsigned flags) -{ - OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_HIGH, 0, 0); -} - #endif diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_notifier.c b/src/gallium/winsys/drm/nouveau/common/nouveau_notifier.c deleted file mode 100644 index 01e8f38440..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_notifier.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include - -#include "nouveau_drmif.h" -#include "nouveau_local.h" - -#define NOTIFIER(__v) \ - struct nouveau_notifier_priv *nvnotify = nouveau_notifier(notifier); \ - volatile uint32_t *__v = (void*)nvnotify->map + (id * 32) - -int -nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle, - int count, struct nouveau_notifier **notifier) -{ - struct nouveau_notifier_priv *nvnotify; - int ret; - - if (!chan || !notifier || *notifier) - return -EINVAL; - - nvnotify = calloc(1, sizeof(struct nouveau_notifier_priv)); - if (!nvnotify) - return -ENOMEM; - nvnotify->base.channel = chan; - nvnotify->base.handle = handle; - - nvnotify->drm.channel = chan->id; - nvnotify->drm.handle = handle; - nvnotify->drm.count = count; - if ((ret = drmCommandWriteRead(nouveau_device(chan->device)->fd, - DRM_NOUVEAU_NOTIFIEROBJ_ALLOC, - &nvnotify->drm, - sizeof(nvnotify->drm)))) { - nouveau_notifier_free((void *)&nvnotify); - return ret; - } - - nvnotify->map = (void *)nouveau_channel(chan)->notifier_block + - nvnotify->drm.offset; - *notifier = &nvnotify->base; - return 0; -} - -void -nouveau_notifier_free(struct nouveau_notifier **notifier) -{ - - struct nouveau_notifier_priv *nvnotify; - struct nouveau_channel_priv *nvchan; - struct nouveau_device_priv *nvdev; - struct drm_nouveau_gpuobj_free f; - - if (!notifier || !*notifier) - return; - nvnotify = nouveau_notifier(*notifier); - *notifier = NULL; - - nvchan = nouveau_channel(nvnotify->base.channel); - nvdev = nouveau_device(nvchan->base.device); - - f.channel = nvchan->drm.channel; - f.handle = nvnotify->base.handle; - drmCommandWrite(nvdev->fd, DRM_NOUVEAU_GPUOBJ_FREE, &f, sizeof(f)); - free(nvnotify); -} - -void -nouveau_notifier_reset(struct nouveau_notifier *notifier, int id) -{ - NOTIFIER(n); - - n[NV_NOTIFY_TIME_0 /4] = 0x00000000; - n[NV_NOTIFY_TIME_1 /4] = 0x00000000; - n[NV_NOTIFY_RETURN_VALUE/4] = 0x00000000; - n[NV_NOTIFY_STATE /4] = (NV_NOTIFY_STATE_STATUS_IN_PROCESS << - NV_NOTIFY_STATE_STATUS_SHIFT); -} - -uint32_t -nouveau_notifier_status(struct nouveau_notifier *notifier, int id) -{ - NOTIFIER(n); - - return n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT; -} - -uint32_t -nouveau_notifier_return_val(struct nouveau_notifier *notifier, int id) -{ - NOTIFIER(n); - - return n[NV_NOTIFY_RETURN_VALUE/4]; -} - -int -nouveau_notifier_wait_status(struct nouveau_notifier *notifier, int id, - int status, int timeout) -{ - NOTIFIER(n); - uint32_t time = 0, t_start = NOUVEAU_TIME_MSEC(); - - while (time <= timeout) { - uint32_t v; - - v = n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT; - if (v == status) - return 0; - - if (timeout) - time = NOUVEAU_TIME_MSEC() - t_start; - } - - return -EBUSY; -} - diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_pushbuf.c b/src/gallium/winsys/drm/nouveau/common/nouveau_pushbuf.c deleted file mode 100644 index 7c094eb795..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_pushbuf.c +++ /dev/null @@ -1,270 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include -#include -#include "nouveau_drmif.h" -#include "nouveau_dma.h" - -#define PB_BUFMGR_DWORDS (4096 / 2) -#define PB_MIN_USER_DWORDS 2048 - -static int -nouveau_pushbuf_space(struct nouveau_channel *chan, unsigned min) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_pushbuf_priv *nvpb = &nvchan->pb; - - assert((min + 1) <= nvchan->dma->max); - - /* Wait for enough space in push buffer */ - min = min < PB_MIN_USER_DWORDS ? PB_MIN_USER_DWORDS : min; - min += 1; /* a bit extra for the NOP */ - if (nvchan->dma->free < min) - WAIT_RING_CH(chan, min); - - /* Insert NOP, may turn into a jump later */ - RING_SPACE_CH(chan, 1); - nvpb->nop_jump = nvchan->dma->cur; - OUT_RING_CH(chan, 0); - - /* Any remaining space is available to the user */ - nvpb->start = nvchan->dma->cur; - nvpb->size = nvchan->dma->free; - nvpb->base.channel = chan; - nvpb->base.remaining = nvpb->size; - nvpb->base.cur = &nvchan->pushbuf[nvpb->start]; - - /* Create a new fence object for this "frame" */ - nouveau_fence_ref(NULL, &nvpb->fence); - nouveau_fence_new(chan, &nvpb->fence); - - return 0; -} - -int -nouveau_pushbuf_init(struct nouveau_channel *chan) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_dma_priv *m = &nvchan->dma_master; - struct nouveau_dma_priv *b = &nvchan->dma_bufmgr; - int i; - - if (!nvchan) - return -EINVAL; - - /* Reassign last bit of push buffer for a "separate" bufmgr - * ring buffer - */ - m->max -= PB_BUFMGR_DWORDS; - m->free -= PB_BUFMGR_DWORDS; - - b->base = m->base + ((m->max + 2) << 2); - b->max = PB_BUFMGR_DWORDS - 2; - b->cur = b->put = 0; - b->free = b->max - b->cur; - - /* Some NOPs just to be safe - *XXX: RING_SKIPS - */ - nvchan->dma = b; - RING_SPACE_CH(chan, 8); - for (i = 0; i < 8; i++) - OUT_RING_CH(chan, 0); - nvchan->dma = m; - - nouveau_pushbuf_space(chan, 0); - chan->pushbuf = &nvchan->pb.base; - - nvchan->pb.buffers = CALLOC(NOUVEAU_PUSHBUF_MAX_BUFFERS, - sizeof(struct nouveau_pushbuf_bo)); - nvchan->pb.relocs = CALLOC(NOUVEAU_PUSHBUF_MAX_RELOCS, - sizeof(struct nouveau_pushbuf_reloc)); - return 0; -} - -static uint32_t -nouveau_pushbuf_calc_reloc(struct nouveau_bo *bo, - struct nouveau_pushbuf_reloc *r) -{ - uint32_t push; - - if (r->flags & NOUVEAU_BO_LOW) { - push = bo->offset + r->data; - } else - if (r->flags & NOUVEAU_BO_HIGH) { - push = (bo->offset + r->data) >> 32; - } else { - push = r->data; - } - - if (r->flags & NOUVEAU_BO_OR) { - if (bo->flags & NOUVEAU_BO_VRAM) - push |= r->vor; - else - push |= r->tor; - } - - return push; -} - -/* This would be our TTM "superioctl" */ -int -nouveau_pushbuf_flush(struct nouveau_channel *chan, unsigned min) -{ - struct nouveau_channel_priv *nvchan = nouveau_channel(chan); - struct nouveau_pushbuf_priv *nvpb = &nvchan->pb; - int ret, i; - - if (nvpb->base.remaining == nvpb->size) - return 0; - - nouveau_fence_flush(chan); - - nvpb->size -= nvpb->base.remaining; - nvchan->dma->cur += nvpb->size; - nvchan->dma->free -= nvpb->size; - assert(nvchan->dma->cur <= nvchan->dma->max); - - nvchan->dma = &nvchan->dma_bufmgr; - nvchan->pushbuf[nvpb->nop_jump] = 0x20000000 | - (nvchan->dma->base + (nvchan->dma->cur << 2)); - - /* Validate buffers + apply relocations */ - nvchan->user_charge = 0; - for (i = 0; i < nvpb->nr_relocs; i++) { - struct nouveau_pushbuf_reloc *r = &nvpb->relocs[i]; - struct nouveau_pushbuf_bo *pbbo = r->pbbo; - struct nouveau_bo *bo = pbbo->bo; - - /* Validated, mem matches presumed, no relocation necessary */ - if (pbbo->handled & 2) { - if (!(pbbo->handled & 1)) - assert(0); - continue; - } - - /* Not yet validated, do it now */ - if (!(pbbo->handled & 1)) { - ret = nouveau_bo_validate(chan, bo, pbbo->flags); - if (ret) { - assert(0); - return ret; - } - pbbo->handled |= 1; - - if (bo->offset == nouveau_bo(bo)->offset && - bo->flags == nouveau_bo(bo)->flags) { - pbbo->handled |= 2; - continue; - } - bo->offset = nouveau_bo(bo)->offset; - bo->flags = nouveau_bo(bo)->flags; - } - - /* Apply the relocation */ - *r->ptr = nouveau_pushbuf_calc_reloc(bo, r); - } - nvpb->nr_relocs = 0; - - /* Dereference all buffers on validate list */ - for (i = 0; i < nvpb->nr_buffers; i++) { - struct nouveau_pushbuf_bo *pbbo = &nvpb->buffers[i]; - - nouveau_bo(pbbo->bo)->pending = NULL; - nouveau_bo_del(&pbbo->bo); - } - nvpb->nr_buffers = 0; - - /* Switch back to user's ring */ - RING_SPACE_CH(chan, 1); - OUT_RING_CH(chan, 0x20000000 | ((nvpb->start << 2) + - nvchan->dma_master.base)); - nvchan->dma = &nvchan->dma_master; - - /* Fence + kickoff */ - nouveau_fence_emit(nvpb->fence); - FIRE_RING_CH(chan); - - /* Allocate space for next push buffer */ - ret = nouveau_pushbuf_space(chan, min); - assert(!ret); - - return 0; -} - -static struct nouveau_pushbuf_bo * -nouveau_pushbuf_emit_buffer(struct nouveau_channel *chan, struct nouveau_bo *bo) -{ - struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf); - struct nouveau_bo_priv *nvbo = nouveau_bo(bo); - struct nouveau_pushbuf_bo *pbbo; - - if (nvbo->pending) - return nvbo->pending; - - if (nvpb->nr_buffers >= NOUVEAU_PUSHBUF_MAX_BUFFERS) - return NULL; - pbbo = nvpb->buffers + nvpb->nr_buffers++; - nvbo->pending = pbbo; - - nouveau_bo_ref(bo->device, bo->handle, &pbbo->bo); - pbbo->channel = chan; - pbbo->flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART; - pbbo->handled = 0; - return pbbo; -} - -int -nouveau_pushbuf_emit_reloc(struct nouveau_channel *chan, void *ptr, - struct nouveau_bo *bo, uint32_t data, uint32_t flags, - uint32_t vor, uint32_t tor) -{ - struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf); - struct nouveau_pushbuf_bo *pbbo; - struct nouveau_pushbuf_reloc *r; - - if (nvpb->nr_relocs >= NOUVEAU_PUSHBUF_MAX_RELOCS) - return -ENOMEM; - - pbbo = nouveau_pushbuf_emit_buffer(chan, bo); - if (!pbbo) - return -ENOMEM; - pbbo->flags |= (flags & NOUVEAU_BO_RDWR); - pbbo->flags &= (flags | NOUVEAU_BO_RDWR); - - r = nvpb->relocs + nvpb->nr_relocs++; - r->pbbo = pbbo; - r->ptr = ptr; - r->flags = flags; - r->data = data; - r->vor = vor; - r->tor = tor; - - if (flags & NOUVEAU_BO_DUMMY) - *(uint32_t *)ptr = 0; - else - *(uint32_t *)ptr = nouveau_pushbuf_calc_reloc(bo, r); - return 0; -} diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_resource.c b/src/gallium/winsys/drm/nouveau/common/nouveau_resource.c deleted file mode 100644 index 766fd279fe..0000000000 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_resource.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright 2007 Nouveau Project - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include -#include -#include -#include "nouveau_drmif.h" -#include "nouveau_local.h" - -int -nouveau_resource_init(struct nouveau_resource **heap, - unsigned start, unsigned size) -{ - struct nouveau_resource *r; - - r = CALLOC_STRUCT(nouveau_resource); - if (!r) - return 1; - - r->start = start; - r->size = size; - *heap = r; - return 0; -} - -int -nouveau_resource_alloc(struct nouveau_resource *heap, int size, void *priv, - struct nouveau_resource **res) -{ - struct nouveau_resource *r; - - if (!heap || !size || !res || *res) - return 1; - - while (heap) { - if (!heap->in_use && heap->size >= size) { - r = CALLOC_STRUCT(nouveau_resource); - if (!r) - return 1; - - r->start = (heap->start + heap->size) - size; - r->size = size; - r->in_use = 1; - r->priv = priv; - - heap->size -= size; - - r->next = heap->next; - if (heap->next) - heap->next->prev = r; - r->prev = heap; - heap->next = r; - - *res = r; - return 0; - } - - heap = heap->next; - } - - return 1; -} - -void -nouveau_resource_free(struct nouveau_resource **res) -{ - struct nouveau_resource *r; - - if (!res || !*res) - return; - r = *res; - *res = NULL; - - r->in_use = 0; - - if (r->next && !r->next->in_use) { - struct nouveau_resource *new = r->next; - - new->prev = r->prev; - if (r->prev) - r->prev->next = new; - new->size += r->size; - new->start = r->start; - - free(r); - r = new; - } - - if (r->prev && !r->prev->in_use) { - r->prev->next = r->next; - if (r->next) - r->next->prev = r->prev; - r->prev->size += r->size; - FREE(r); - } - -} diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_winsys.c b/src/gallium/winsys/drm/nouveau/common/nouveau_winsys.c index 722694e4a4..3b2b86cd40 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_winsys.c +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_winsys.c @@ -29,8 +29,9 @@ nouveau_pipe_grobj_alloc(struct nouveau_winsys *nvws, int grclass, if (ret) return ret; - assert(nv->nvc->next_subchannel < 7); - BIND_RING(chan, *grobj, nv->nvc->next_subchannel++); + BEGIN_RING(chan, *grobj, 0x0000, 1); + OUT_RING (chan, (*grobj)->handle); + (*grobj)->bound = NOUVEAU_GROBJ_BOUND_EXPLICIT; return 0; } @@ -73,14 +74,8 @@ static int nouveau_pipe_push_flush(struct nouveau_winsys *nvws, unsigned size, struct pipe_fence_handle **fence) { - if (fence) { - struct nouveau_pushbuf *pb = nvws->channel->pushbuf; - struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(pb); - struct nouveau_fence *ref = NULL; - - nouveau_fence_ref(nvpb->fence, &ref); - *fence = (struct pipe_fence_handle *)ref; - } + if (fence) + *fence = NULL; return nouveau_pushbuf_flush(nvws->channel, size); } diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_winsys_pipe.c b/src/gallium/winsys/drm/nouveau/common/nouveau_winsys_pipe.c index 8e889b9f36..6f79e0800a 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_winsys_pipe.c +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_winsys_pipe.c @@ -105,7 +105,7 @@ nouveau_pipe_bo_del(struct pipe_winsys *ws, struct pipe_buffer *buf) { struct nouveau_pipe_buffer *nvbuf = nouveau_buffer(buf); - nouveau_bo_del(&nvbuf->bo); + nouveau_bo_ref(NULL, &nvbuf->bo); FREE(nvbuf); } @@ -121,6 +121,7 @@ nouveau_pipe_bo_map(struct pipe_winsys *pws, struct pipe_buffer *buf, if (flags & PIPE_BUFFER_USAGE_CPU_WRITE) map_flags |= NOUVEAU_BO_WR; +#if 0 if (flags & PIPE_BUFFER_USAGE_DISCARD && !(flags & PIPE_BUFFER_USAGE_CPU_READ) && nouveau_bo_busy(nvbuf->bo, map_flags)) { @@ -131,10 +132,11 @@ nouveau_pipe_bo_map(struct pipe_winsys *pws, struct pipe_buffer *buf, uint32_t flags = nouveau_flags_from_usage(nv, buf->usage); if (!nouveau_bo_new(dev, flags, buf->alignment, buf->size, &rename)) { - nouveau_bo_del(&nvbuf->bo); + nouveau_bo_ref(NULL, &nvbuf->bo); nvbuf->bo = rename; } } +#endif if (nouveau_bo_map(nvbuf->bo, map_flags)) return NULL; @@ -149,42 +151,26 @@ nouveau_pipe_bo_unmap(struct pipe_winsys *pws, struct pipe_buffer *buf) nouveau_bo_unmap(nvbuf->bo); } -static INLINE struct nouveau_fence * -nouveau_pipe_fence(struct pipe_fence_handle *pfence) -{ - return (struct nouveau_fence *)pfence; -} - static void nouveau_pipe_fence_reference(struct pipe_winsys *ws, struct pipe_fence_handle **ptr, struct pipe_fence_handle *pfence) { - nouveau_fence_ref((void *)pfence, (void *)ptr); + *ptr = pfence; } static int nouveau_pipe_fence_signalled(struct pipe_winsys *ws, struct pipe_fence_handle *pfence, unsigned flag) { - struct nouveau_pipe_winsys *nvpws = (struct nouveau_pipe_winsys *)ws; - struct nouveau_fence *fence = nouveau_pipe_fence(pfence); - - if (nouveau_fence(fence)->signalled == 0) - nouveau_fence_flush(nvpws->nv->nvc->channel); - - return !nouveau_fence(fence)->signalled; + return 0; } static int nouveau_pipe_fence_finish(struct pipe_winsys *ws, struct pipe_fence_handle *pfence, unsigned flag) { - struct nouveau_fence *fence = nouveau_pipe_fence(pfence); - struct nouveau_fence *ref = NULL; - - nouveau_fence_ref(fence, &ref); - return nouveau_fence_wait(&ref); + return 0; } static void diff --git a/src/gallium/winsys/drm/nouveau/common/nv04_surface.c b/src/gallium/winsys/drm/nouveau/common/nv04_surface.c index e9a8a2ac1c..b83f3475df 100644 --- a/src/gallium/winsys/drm/nouveau/common/nv04_surface.c +++ b/src/gallium/winsys/drm/nouveau/common/nv04_surface.c @@ -354,7 +354,6 @@ nouveau_surface_channel_create_nv04(struct nouveau_channel_context *nvc) NOUVEAU_ERR("Error creating m2mf object: %d\n", ret); return 1; } - BIND_RING (chan, nvc->NvM2MF, nvc->next_subchannel++); BEGIN_RING(chan, nvc->NvM2MF, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1); OUT_RING (chan, nvc->sync_notifier->handle); @@ -366,7 +365,6 @@ nouveau_surface_channel_create_nv04(struct nouveau_channel_context *nvc) NOUVEAU_ERR("Error creating 2D surface object: %d\n", ret); return 1; } - BIND_RING (chan, nvc->NvCtxSurf2D, nvc->next_subchannel++); BEGIN_RING(chan, nvc->NvCtxSurf2D, NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE, 2); OUT_RING (chan, nvc->channel->vram->handle); @@ -378,7 +376,6 @@ nouveau_surface_channel_create_nv04(struct nouveau_channel_context *nvc) NOUVEAU_ERR("Error creating blit object: %d\n", ret); return 1; } - BIND_RING (chan, nvc->NvImageBlit, nvc->next_subchannel++); BEGIN_RING(chan, nvc->NvImageBlit, NV04_IMAGE_BLIT_DMA_NOTIFY, 1); OUT_RING (chan, nvc->sync_notifier->handle); BEGIN_RING(chan, nvc->NvImageBlit, NV04_IMAGE_BLIT_SURFACE, 1); @@ -392,7 +389,6 @@ nouveau_surface_channel_create_nv04(struct nouveau_channel_context *nvc) NOUVEAU_ERR("Error creating rect object: %d\n", ret); return 1; } - BIND_RING (chan, nvc->NvGdiRect, nvc->next_subchannel++); BEGIN_RING(chan, nvc->NvGdiRect, NV04_GDI_RECTANGLE_TEXT_DMA_NOTIFY, 1); OUT_RING (chan, nvc->sync_notifier->handle); BEGIN_RING(chan, nvc->NvGdiRect, NV04_GDI_RECTANGLE_TEXT_SURFACE, 1); @@ -431,8 +427,6 @@ nouveau_surface_channel_create_nv04(struct nouveau_channel_context *nvc) return 1; } - BIND_RING (chan, nvc->NvSwzSurf, nvc->next_subchannel++); - if (chipset < 0x10) { class = NV04_SCALED_IMAGE_FROM_MEMORY; } else @@ -449,8 +443,6 @@ nouveau_surface_channel_create_nv04(struct nouveau_channel_context *nvc) return 1; } - BIND_RING (chan, nvc->NvSIFM, nvc->next_subchannel++); - return 0; } diff --git a/src/gallium/winsys/drm/nouveau/common/nv50_surface.c b/src/gallium/winsys/drm/nouveau/common/nv50_surface.c index c8ab7f690f..d16f3a97d5 100644 --- a/src/gallium/winsys/drm/nouveau/common/nv50_surface.c +++ b/src/gallium/winsys/drm/nouveau/common/nv50_surface.c @@ -34,7 +34,7 @@ nv50_surface_set(struct nouveau_context *nv, struct pipe_surface *surf, int dst) if (surf_format < 0) return 1; - if (!nouveau_bo(bo)->tiled) { + if (!bo->tiled) { BEGIN_RING(chan, eng2d, mthd, 2); OUT_RING (chan, surf_format); OUT_RING (chan, 1); @@ -166,7 +166,6 @@ nouveau_surface_channel_create_nv50(struct nouveau_channel_context *nvc) return ret; nvc->Nv2D = eng2d; - BIND_RING (chan, eng2d, nvc->next_subchannel++); BEGIN_RING(chan, eng2d, NV50_2D_DMA_NOTIFY, 4); OUT_RING (chan, nvc->sync_notifier->handle); OUT_RING (chan, chan->vram->handle); diff --git a/src/gallium/winsys/drm/nouveau/dri/Makefile b/src/gallium/winsys/drm/nouveau/dri/Makefile index e129e42e97..3f3553b61d 100644 --- a/src/gallium/winsys/drm/nouveau/dri/Makefile +++ b/src/gallium/winsys/drm/nouveau/dri/Makefile @@ -26,6 +26,9 @@ C_SOURCES = \ ASM_SOURCES = +DRIVER_DEFINES = $(shell pkg-config libdrm_nouveau --cflags) +DRI_LIB_DEPS += $(shell pkg-config libdrm_nouveau --libs) + include ../../Makefile.template symlinks: diff --git a/src/gallium/winsys/drm/nouveau/dri/nouveau_context_dri.h b/src/gallium/winsys/drm/nouveau/dri/nouveau_context_dri.h index 8257790d47..64cf326411 100644 --- a/src/gallium/winsys/drm/nouveau/dri/nouveau_context_dri.h +++ b/src/gallium/winsys/drm/nouveau/dri/nouveau_context_dri.h @@ -5,8 +5,6 @@ #include #include #include "../common/nouveau_context.h" -#include "../common/nouveau_drmif.h" -#include "../common/nouveau_dma.h" struct nouveau_framebuffer { struct st_framebuffer *stfb; diff --git a/src/gallium/winsys/drm/nouveau/dri/nouveau_screen_dri.c b/src/gallium/winsys/drm/nouveau/dri/nouveau_screen_dri.c index 1d7c92376f..964a9028aa 100644 --- a/src/gallium/winsys/drm/nouveau/dri/nouveau_screen_dri.c +++ b/src/gallium/winsys/drm/nouveau/dri/nouveau_screen_dri.c @@ -12,7 +12,7 @@ #include "nouveau_screen_dri.h" #include "nouveau_swapbuffers.h" -#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 11 +#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 12 #error nouveau_drm.h version does not match expected version #endif -- cgit v1.2.3