From 52a68dd9eb1d347aa01ce09db9375793d0d0ceaf Mon Sep 17 00:00:00 2001 From: Stephane Marchesin Date: Tue, 8 Jul 2008 01:06:18 +0200 Subject: nv04. --- src/gallium/drivers/nv04/nv04_state_emit.c | 156 +++++++++++++++++++++++++++++ 1 file changed, 156 insertions(+) create mode 100644 src/gallium/drivers/nv04/nv04_state_emit.c (limited to 'src/gallium/drivers/nv04/nv04_state_emit.c') diff --git a/src/gallium/drivers/nv04/nv04_state_emit.c b/src/gallium/drivers/nv04/nv04_state_emit.c new file mode 100644 index 0000000000..0ad40a092e --- /dev/null +++ b/src/gallium/drivers/nv04/nv04_state_emit.c @@ -0,0 +1,156 @@ +#include "nv04_context.h" +#include "nv04_state.h" + +static void nv04_vertex_layout(struct pipe_context* pipe) +{ + struct nv04_context *nv04 = nv04_context(pipe); + struct nv04_fragment_program *fp = nv04->fragprog.current; + uint32_t src = 0; + int i; + struct vertex_info vinfo; + + memset(&vinfo, 0, sizeof(vinfo)); + + for (i = 0; i < fp->info.num_inputs; i++) { + switch (i) { + case TGSI_SEMANTIC_POSITION: + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, src++); + break; + case TGSI_SEMANTIC_COLOR: + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, src++); + break; + default: + case TGSI_SEMANTIC_GENERIC: + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, src++); + break; + case TGSI_SEMANTIC_FOG: + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, src++); + break; + } + } + draw_compute_vertex_size(&vinfo); +} + +static uint32_t nv04_blend_func(uint32_t f) +{ + switch ( f ) { + case PIPE_BLENDFACTOR_ZERO: return 0x1; + case PIPE_BLENDFACTOR_ONE: return 0x2; + case PIPE_BLENDFACTOR_SRC_COLOR: return 0x3; + case PIPE_BLENDFACTOR_INV_SRC_COLOR: return 0x4; + case PIPE_BLENDFACTOR_SRC_ALPHA: return 0x5; + case PIPE_BLENDFACTOR_INV_SRC_ALPHA: return 0x6; + case PIPE_BLENDFACTOR_DST_ALPHA: return 0x7; + case PIPE_BLENDFACTOR_INV_DST_ALPHA: return 0x8; + case PIPE_BLENDFACTOR_DST_COLOR: return 0x9; + case PIPE_BLENDFACTOR_INV_DST_COLOR: return 0xA; + case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE: return 0xB; + } + NOUVEAU_MSG("Unable to find the blend function 0x%x\n",f); + return 0; +} + +static void nv04_emit_control(struct nv04_context* nv04) +{ + uint32_t control = nv04->dsa->control; + + BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_CONTROL, 1); + OUT_RING(control); +} + +static void nv04_emit_blend(struct nv04_context* nv04) +{ + uint32_t blend; + + blend=0x4; // texture MODULATE_ALPHA + blend|=0x20; // alpha is MSB + blend|=(2<<6); // flat shading + blend|=(1<<8); // persp correct + blend|=(0<<16); // no fog + blend|=(nv04->blend->b_enable<<20); + blend|=(nv04_blend_func(nv04->blend->b_src)<<24); + blend|=(nv04_blend_func(nv04->blend->b_dst)<<28); + + BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_BLEND, 1); + OUT_RING(blend); +} + +static void nv04_emit_sampler(struct nv04_context *nv04, int unit) +{ + struct nv04_miptree *nv04mt = nv04->tex_miptree[unit]; + struct pipe_texture *pt = &nv04mt->base; + + BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_OFFSET, 3); + OUT_RELOCl(nv04mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD); + OUT_RELOCd(nv04mt->buffer, (nv04->fragtex.format | nv04->sampler[unit]->format), NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_OR | NOUVEAU_BO_RD, 1/*VRAM*/,2/*TT*/); + OUT_RING(nv04->sampler[unit]->filter); +} + +void +nv04_emit_hw_state(struct nv04_context *nv04) +{ + int i; + + if (nv04->dirty & NV04_NEW_VERTPROG) { + //nv04_vertprog_bind(nv04, nv04->vertprog.current); + nv04->dirty &= ~NV04_NEW_VERTPROG; + } + + if (nv04->dirty & NV04_NEW_FRAGPROG) { + nv04_fragprog_bind(nv04, nv04->fragprog.current); + /*XXX: clear NV04_NEW_FRAGPROG if no new program uploaded */ + nv04->dirty_samplers |= (1<<10); + nv04->dirty_samplers = 0; + } + + if (nv04->dirty & NV04_NEW_CONTROL) { + nv04->dirty &= ~NV04_NEW_CONTROL; + + BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_CONTROL, 1); + OUT_RING(nv04->dsa->control); + } + + if (nv04->dirty & NV04_NEW_BLEND) { + nv04->dirty &= ~NV04_NEW_BLEND; + + nv04_emit_blend(nv04); + } + + if (nv04->dirty & NV04_NEW_SAMPLER) { + nv04->dirty &= ~NV04_NEW_SAMPLER; + + nv04_emit_sampler(nv04, 0); + } + + if (nv04->dirty & NV04_NEW_VIEWPORT) { + nv04->dirty &= ~NV04_NEW_VIEWPORT; +// nv04_state_emit_viewport(nv04); + } + + /* Emit relocs for every referenced buffer. + * This is to ensure the bufmgr has an accurate idea of how + * the buffer is used. This isn't very efficient, but we don't + * seem to take a significant performance hit. Will be improved + * at some point. Vertex arrays are emitted by nv04_vbo.c + */ + + /* Render target */ +/* BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_PITCH, 2); + OUT_RING(rt->stride|(zeta->stride<<16)); + OUT_RELOCl(rt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + if (fb->zsbuf) { + BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA, 1); + OUT_RELOCl(zeta->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + }*/ + + /* Texture images */ + for (i = 0; i < 1; i++) { + if (!(nv04->fp_samplers & (1 << i))) + continue; + struct nv04_miptree *nv04mt = nv04->tex_miptree[i]; + BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_OFFSET, 2); + OUT_RELOCl(nv04mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD); + OUT_RELOCd(nv04mt->buffer, (nv04->fragtex.format | nv04->sampler[i]->format), NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_OR | NOUVEAU_BO_RD, 1/*VRAM*/,2/*TT*/); + } +} + -- cgit v1.2.3 From 4035e0f8989754ee7d31212e69d6461f1bbff008 Mon Sep 17 00:00:00 2001 From: Stephane Marchesin Date: Mon, 2 Feb 2009 02:12:46 +0100 Subject: nv04: some old changes I had lying around. --- src/gallium/drivers/nv04/nv04_context.c | 5 +- src/gallium/drivers/nv04/nv04_context.h | 17 ++-- src/gallium/drivers/nv04/nv04_miptree.c | 93 +++++++++++++--------- src/gallium/drivers/nv04/nv04_screen.c | 7 ++ src/gallium/drivers/nv04/nv04_state.c | 81 +++++-------------- src/gallium/drivers/nv04/nv04_state.h | 5 +- src/gallium/drivers/nv04/nv04_state_emit.c | 80 +++++++++++++++++-- src/gallium/drivers/nv04/nv04_vbo.c | 15 +++- .../winsys/drm/nouveau/common/nouveau_context.c | 2 + .../winsys/drm/nouveau/common/nouveau_fence.c | 9 ++- .../winsys/drm/nouveau/common/nouveau_winsys.c | 4 + 11 files changed, 197 insertions(+), 121 deletions(-) (limited to 'src/gallium/drivers/nv04/nv04_state_emit.c') diff --git a/src/gallium/drivers/nv04/nv04_context.c b/src/gallium/drivers/nv04/nv04_context.c index 9f75253363..7e4ee004b0 100644 --- a/src/gallium/drivers/nv04/nv04_context.c +++ b/src/gallium/drivers/nv04/nv04_context.c @@ -35,8 +35,9 @@ nv04_set_edgeflags(struct pipe_context *pipe, const unsigned *bitfield) static boolean nv04_init_hwctx(struct nv04_context *nv04) { - BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_NOTIFY, 1); - OUT_RING(0); + // requires a valid handle +// BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_NOTIFY, 1); +// OUT_RING(0); BEGIN_RING(fahrenheit, NV04_DX5_TEXTURED_TRIANGLE_NOP, 1); OUT_RING(0); diff --git a/src/gallium/drivers/nv04/nv04_context.h b/src/gallium/drivers/nv04/nv04_context.h index 3e6a085270..2842b2c90d 100644 --- a/src/gallium/drivers/nv04/nv04_context.h +++ b/src/gallium/drivers/nv04/nv04_context.h @@ -34,6 +34,8 @@ #define NV04_NEW_CONTROL (1 << 5) #define NV04_NEW_VIEWPORT (1 << 6) #define NV04_NEW_SAMPLER (1 << 7) +#define NV04_NEW_FRAMEBUFFER (1 << 8) +#define NV04_NEW_VTXARRAYS (1 << 9) struct nv04_context { struct pipe_context pipe; @@ -61,8 +63,9 @@ struct nv04_context { unsigned vp_samplers; uint32_t rt_enable; - struct pipe_buffer *rt[4]; - struct pipe_buffer *zeta; + struct pipe_framebuffer_state *framebuffer; + struct pipe_surface *rt; + struct pipe_surface *zeta; struct { struct pipe_buffer *buffer; @@ -75,6 +78,9 @@ struct nv04_context { unsigned delta; } vb[16]; + float *constbuf[PIPE_SHADER_TYPES][32][4]; + unsigned constbuf_nr[PIPE_SHADER_TYPES]; + struct vertex_info vertex_info; struct { @@ -94,9 +100,8 @@ struct nv04_context { struct pipe_buffer *constant_buf; } fragprog; - struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; - unsigned num_vertex_buffers; - unsigned num_vertex_elements; + struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; + struct pipe_vertex_element vtxelt[PIPE_MAX_ATTRIBS]; struct pipe_viewport_state viewport; }; @@ -109,7 +114,7 @@ nv04_context(struct pipe_context *pipe) extern void nv04_init_state_functions(struct nv04_context *nv04); extern void nv04_init_surface_functions(struct nv04_context *nv04); -extern void nv04_init_miptree_functions(struct pipe_screen *screen); +extern void nv04_screen_init_miptree_functions(struct pipe_screen *screen); /* nv04_clear.c */ extern void nv04_clear(struct pipe_context *pipe, struct pipe_surface *ps, diff --git a/src/gallium/drivers/nv04/nv04_miptree.c b/src/gallium/drivers/nv04/nv04_miptree.c index 094c38256b..01cb8ecbf3 100644 --- a/src/gallium/drivers/nv04/nv04_miptree.c +++ b/src/gallium/drivers/nv04/nv04_miptree.c @@ -11,7 +11,7 @@ nv04_miptree_layout(struct nv04_miptree *nv04mt) struct pipe_texture *pt = &nv04mt->base; uint width = pt->width[0], height = pt->height[0]; uint offset = 0; - int nr_faces, l, f; + int nr_faces, l; nr_faces = 1; @@ -22,31 +22,26 @@ nv04_miptree_layout(struct nv04_miptree *nv04mt) pt->nblocksx[l] = pf_get_nblocksx(&pt->block, width); pt->nblocksy[l] = pf_get_nblocksy(&pt->block, height); - nv04mt->level[l].pitch = pt->width[0] * pt->block.size; + nv04mt->level[l].pitch = pt->width[0]; nv04mt->level[l].pitch = (nv04mt->level[l].pitch + 63) & ~63; - nv04mt->level[l].image_offset = - CALLOC(nr_faces, sizeof(unsigned)); - width = MAX2(1, width >> 1); height = MAX2(1, height >> 1); - } - for (f = 0; f < nr_faces; f++) { - for (l = 0; l <= pt->last_level; l++) { - nv04mt->level[l].image_offset[f] = offset; - offset += nv04mt->level[l].pitch * pt->height[l]; - } + for (l = 0; l <= pt->last_level; l++) { + + nv04mt->level[l].image_offset = offset; + offset += nv04mt->level[l].pitch * pt->height[l]; } nv04mt->total_size = offset; } static struct pipe_texture * -nv04_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) +nv04_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) { - struct pipe_winsys *ws = screen->winsys; + struct pipe_winsys *ws = pscreen->winsys; struct nv04_miptree *mt; mt = MALLOC(sizeof(struct nv04_miptree)); @@ -54,13 +49,19 @@ nv04_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) return NULL; mt->base = *pt; mt->base.refcount = 1; - mt->base.screen = screen; + mt->base.screen = pscreen; + mt->shadow_tex = NULL; + mt->shadow_surface = NULL; + + //mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; nv04_miptree_layout(mt); - mt->buffer = ws->buffer_create(ws, 256, PIPE_BUFFER_USAGE_PIXEL, - mt->total_size); + mt->buffer = ws->buffer_create(ws, 256, PIPE_BUFFER_USAGE_PIXEL | + NOUVEAU_BUFFER_USAGE_TEXTURE, + mt->total_size); if (!mt->buffer) { + printf("failed %d byte alloc\n",mt->total_size); FREE(mt); return NULL; } @@ -69,22 +70,29 @@ nv04_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) } static void -nv04_miptree_release(struct pipe_screen *screen, struct pipe_texture **pt) +nv04_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **ppt) { - struct pipe_texture *mt = *pt; - - *pt = NULL; - if (--mt->refcount <= 0) { - struct nv04_miptree *nv04mt = (struct nv04_miptree *)mt; - int l; - - pipe_buffer_reference(screen, &nv04mt->buffer, NULL); - for (l = 0; l <= mt->last_level; l++) { - if (nv04mt->level[l].image_offset) - FREE(nv04mt->level[l].image_offset); - } - FREE(nv04mt); + struct pipe_texture *pt = *ppt; + struct nv04_miptree *mt = (struct nv04_miptree *)pt; + int l; + + *ppt = NULL; + if (--pt->refcount) + return; + + pipe_buffer_reference(pscreen, &mt->buffer, NULL); + for (l = 0; l <= pt->last_level; l++) { + if (mt->level[l].image_offset) + FREE(mt->level[l].image_offset); } + + if (mt->shadow_tex) { + assert(mt->shadow_surface); + pscreen->tex_surface_release(pscreen, &mt->shadow_surface); + nv04_miptree_release(pscreen, &mt->shadow_tex); + } + + FREE(mt); } static struct pipe_surface * @@ -92,7 +100,6 @@ nv04_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, unsigned face, unsigned level, unsigned zslice, unsigned flags) { - struct pipe_winsys *ws = pscreen->winsys; struct nv04_miptree *nv04mt = (struct nv04_miptree *)pt; struct pipe_surface *ps; @@ -102,19 +109,20 @@ nv04_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, pipe_texture_reference(&ps->texture, pt); pipe_buffer_reference(pscreen, &ps->buffer, nv04mt->buffer); ps->format = pt->format; - ps->block = pt->block; ps->width = pt->width[level]; ps->height = pt->height[level]; + ps->block = pt->block; ps->nblocksx = pt->nblocksx[level]; ps->nblocksy = pt->nblocksy[level]; ps->stride = nv04mt->level[level].pitch; + ps->usage = flags; + ps->status = PIPE_SURFACE_STATUS_DEFINED; ps->refcount = 1; + ps->face = face; + ps->level = level; + ps->zslice = zslice; - if (pt->target == PIPE_TEXTURE_CUBE) { - ps->offset = nv04mt->level[level].image_offset[face]; - } else { - ps->offset = nv04mt->level[level].image_offset[0]; - } + ps->offset = nv04mt->level[level].image_offset; return ps; } @@ -123,10 +131,19 @@ static void nv04_miptree_surface_del(struct pipe_screen *pscreen, struct pipe_surface **psurface) { + struct pipe_surface *ps = *psurface; + + *psurface = NULL; + if (--ps->refcount > 0) + return; + + pipe_texture_reference(&ps->texture, NULL); + pipe_buffer_reference(pscreen->winsys, &ps->buffer, NULL); + FREE(ps); } void -nv04_init_miptree_functions(struct pipe_screen *pscreen) +nv04_screen_init_miptree_functions(struct pipe_screen *pscreen) { pscreen->texture_create = nv04_miptree_create; pscreen->texture_release = nv04_miptree_release; diff --git a/src/gallium/drivers/nv04/nv04_screen.c b/src/gallium/drivers/nv04/nv04_screen.c index 65eacde6b2..0b282ae3a4 100644 --- a/src/gallium/drivers/nv04/nv04_screen.c +++ b/src/gallium/drivers/nv04/nv04_screen.c @@ -52,6 +52,13 @@ nv04_screen_get_param(struct pipe_screen *screen, int param) return 0; case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: return 0; + case PIPE_CAP_TEXTURE_MIRROR_CLAMP: + return 0; + case PIPE_CAP_TEXTURE_MIRROR_REPEAT: + return 1; + case NOUVEAU_CAP_HW_VTXBUF: + case NOUVEAU_CAP_HW_IDXBUF: + return 0; default: NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); return 0; diff --git a/src/gallium/drivers/nv04/nv04_state.c b/src/gallium/drivers/nv04/nv04_state.c index c07a86dd0e..87c635f962 100644 --- a/src/gallium/drivers/nv04/nv04_state.c +++ b/src/gallium/drivers/nv04/nv04_state.c @@ -334,14 +334,21 @@ nv04_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, const struct pipe_constant_buffer *buf ) { struct nv04_context *nv04 = nv04_context(pipe); - - if (shader == PIPE_SHADER_VERTEX) { - nv04->vertprog.constant_buf = buf->buffer; - nv04->dirty |= NV04_NEW_VERTPROG; - } else - if (shader == PIPE_SHADER_FRAGMENT) { - nv04->fragprog.constant_buf = buf->buffer; - nv04->dirty |= NV04_NEW_FRAGPROG; + struct pipe_winsys *ws = pipe->winsys; + + assert(shader < PIPE_SHADER_TYPES); + assert(index == 0); + + if (buf) { + void *mapped; + if (buf->buffer && buf->buffer->size && + (mapped = ws->buffer_map(ws, buf->buffer, PIPE_BUFFER_USAGE_CPU_READ))) + { + memcpy(nv04->constbuf[shader], mapped, buf->buffer->size); + nv04->constbuf_nr[shader] = + buf->buffer->size / (4 * sizeof(float)); + ws->buffer_unmap(ws, buf->buffer); + } } } @@ -350,53 +357,11 @@ nv04_set_framebuffer_state(struct pipe_context *pipe, const struct pipe_framebuffer_state *fb) { struct nv04_context *nv04 = nv04_context(pipe); - struct pipe_surface *rt, *zeta; - uint32_t rt_format, w, h; - int colour_format = 0, zeta_format = 0; - - w = fb->cbufs[0]->width; - h = fb->cbufs[0]->height; - colour_format = fb->cbufs[0]->format; - rt = fb->cbufs[0]; - - if (fb->zsbuf) { - if (colour_format) { - assert(w == fb->zsbuf->width); - assert(h == fb->zsbuf->height); - } else { - w = fb->zsbuf->width; - h = fb->zsbuf->height; - } - - zeta_format = fb->zsbuf->format; - zeta = fb->zsbuf; - } - - switch (colour_format) { - case PIPE_FORMAT_A8R8G8B8_UNORM: - case 0: - rt_format = 0x108; - break; - case PIPE_FORMAT_R5G6B5_UNORM: - rt_format = 0x103; - break; - default: - assert(0); - } - - BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_FORMAT, 1); - OUT_RING(rt_format); + + nv04->framebuffer = (struct pipe_framebuffer_state*)fb; - /* FIXME pitches have to be aligned ! */ - BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_PITCH, 2); - OUT_RING(rt->stride|(zeta->stride<<16)); - OUT_RELOCl(rt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - if (fb->zsbuf) { - BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA, 1); - OUT_RELOCl(zeta->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - } + nv04->dirty |= NV04_NEW_FRAMEBUFFER; } - static void nv04_set_polygon_stipple(struct pipe_context *pipe, const struct pipe_poly_stipple *stipple) @@ -433,10 +398,8 @@ nv04_set_vertex_buffers(struct pipe_context *pipe, unsigned count, { struct nv04_context *nv04 = nv04_context(pipe); - draw_flush(nv04->draw); - - memcpy(nv04->vertex_buffer, buffers, count * sizeof(buffers[0])); - nv04->num_vertex_buffers = count; + memcpy(nv04->vtxbuf, buffers, count * sizeof(buffers[0])); + nv04->dirty |= NV04_NEW_VTXARRAYS; draw_set_vertex_buffers(nv04->draw, count, buffers); } @@ -447,9 +410,9 @@ nv04_set_vertex_elements(struct pipe_context *pipe, unsigned count, { struct nv04_context *nv04 = nv04_context(pipe); - draw_flush(nv04->draw); + memcpy(nv04->vtxelt, elements, sizeof(*elements) * count); + nv04->dirty |= NV04_NEW_VTXARRAYS; - nv04->num_vertex_elements = count; draw_set_vertex_elements(nv04->draw, count, elements); } diff --git a/src/gallium/drivers/nv04/nv04_state.h b/src/gallium/drivers/nv04/nv04_state.h index 399f750dbe..15d4685ec1 100644 --- a/src/gallium/drivers/nv04/nv04_state.h +++ b/src/gallium/drivers/nv04/nv04_state.h @@ -35,9 +35,12 @@ struct nv04_miptree { struct pipe_buffer *buffer; uint total_size; + struct pipe_texture *shadow_tex; + struct pipe_surface *shadow_surface; + struct { uint pitch; - uint *image_offset; + uint image_offset; } level[PIPE_MAX_TEXTURE_LEVELS]; }; diff --git a/src/gallium/drivers/nv04/nv04_state_emit.c b/src/gallium/drivers/nv04/nv04_state_emit.c index 0ad40a092e..26491758a0 100644 --- a/src/gallium/drivers/nv04/nv04_state_emit.c +++ b/src/gallium/drivers/nv04/nv04_state_emit.c @@ -12,7 +12,9 @@ static void nv04_vertex_layout(struct pipe_context* pipe) memset(&vinfo, 0, sizeof(vinfo)); for (i = 0; i < fp->info.num_inputs; i++) { - switch (i) { + int isn = fp->info.input_semantic_name[i]; + int isi = fp->info.input_semantic_index[i]; + switch (isn) { case TGSI_SEMANTIC_POSITION: draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, src++); break; @@ -28,6 +30,8 @@ static void nv04_vertex_layout(struct pipe_context* pipe) break; } } + + printf("%d vertex input\n",fp->info.num_inputs); draw_compute_vertex_size(&vinfo); } @@ -86,6 +90,56 @@ static void nv04_emit_sampler(struct nv04_context *nv04, int unit) OUT_RING(nv04->sampler[unit]->filter); } +static void nv04_state_emit_framebuffer(struct nv04_context* nv04) +{ + struct pipe_framebuffer_state* fb = nv04->framebuffer; + struct pipe_surface *rt, *zeta; + uint32_t rt_format, w, h; + int colour_format = 0, zeta_format = 0; + + w = fb->cbufs[0]->width; + h = fb->cbufs[0]->height; + colour_format = fb->cbufs[0]->format; + rt = fb->cbufs[0]; + + if (fb->zsbuf) { + if (colour_format) { + assert(w == fb->zsbuf->width); + assert(h == fb->zsbuf->height); + } else { + w = fb->zsbuf->width; + h = fb->zsbuf->height; + } + + zeta_format = fb->zsbuf->format; + zeta = fb->zsbuf; + } + + switch (colour_format) { + case PIPE_FORMAT_A8R8G8B8_UNORM: + case 0: + rt_format = 0x108; + break; + case PIPE_FORMAT_R5G6B5_UNORM: + rt_format = 0x103; + break; + default: + assert(0); + } + + BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_FORMAT, 1); + OUT_RING(rt_format); + + /* FIXME pitches have to be aligned ! */ + BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_PITCH, 2); + OUT_RING(rt->stride|(zeta->stride<<16)); + OUT_RELOCl(rt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + if (fb->zsbuf) { + BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA, 1); + OUT_RELOCl(zeta->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + } +} + void nv04_emit_hw_state(struct nv04_context *nv04) { @@ -98,7 +152,7 @@ nv04_emit_hw_state(struct nv04_context *nv04) if (nv04->dirty & NV04_NEW_FRAGPROG) { nv04_fragprog_bind(nv04, nv04->fragprog.current); - /*XXX: clear NV04_NEW_FRAGPROG if no new program uploaded */ + nv04->dirty &= ~NV04_NEW_FRAGPROG; nv04->dirty_samplers |= (1<<10); nv04->dirty_samplers = 0; } @@ -116,6 +170,11 @@ nv04_emit_hw_state(struct nv04_context *nv04) nv04_emit_blend(nv04); } + if (nv04->dirty & NV04_NEW_VTXARRAYS) { + nv04->dirty &= ~NV04_NEW_VTXARRAYS; + nv04_vertex_layout(nv04); + } + if (nv04->dirty & NV04_NEW_SAMPLER) { nv04->dirty &= ~NV04_NEW_SAMPLER; @@ -127,6 +186,11 @@ nv04_emit_hw_state(struct nv04_context *nv04) // nv04_state_emit_viewport(nv04); } + if (nv04->dirty & NV04_NEW_FRAMEBUFFER) { + nv04->dirty &= ~NV04_NEW_FRAMEBUFFER; + nv04_state_emit_framebuffer(nv04); + } + /* Emit relocs for every referenced buffer. * This is to ensure the bufmgr has an accurate idea of how * the buffer is used. This isn't very efficient, but we don't @@ -135,13 +199,13 @@ nv04_emit_hw_state(struct nv04_context *nv04) */ /* Render target */ -/* BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_PITCH, 2); - OUT_RING(rt->stride|(zeta->stride<<16)); - OUT_RELOCl(rt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - if (fb->zsbuf) { + BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_PITCH, 2); + OUT_RING(nv04->rt->stride|(nv04->zeta->stride<<16)); + OUT_RELOCl(nv04->rt, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + if (nv04->zeta) { BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA, 1); - OUT_RELOCl(zeta->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - }*/ + OUT_RELOCl(nv04->zeta, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + } /* Texture images */ for (i = 0; i < 1; i++) { diff --git a/src/gallium/drivers/nv04/nv04_vbo.c b/src/gallium/drivers/nv04/nv04_vbo.c index 91f919d48e..d21a0e34f7 100644 --- a/src/gallium/drivers/nv04/nv04_vbo.c +++ b/src/gallium/drivers/nv04/nv04_vbo.c @@ -17,14 +17,16 @@ boolean nv04_draw_elements( struct pipe_context *pipe, struct draw_context *draw = nv04->draw; unsigned i; + nv04_emit_hw_state(nv04); + /* * Map vertex buffers */ for (i = 0; i < PIPE_MAX_ATTRIBS; i++) { - if (nv04->vertex_buffer[i].buffer) { + if (nv04->vtxbuf[i].buffer) { void *buf = pipe->winsys->buffer_map(pipe->winsys, - nv04->vertex_buffer[i].buffer, + nv04->vtxbuf[i].buffer, PIPE_BUFFER_USAGE_CPU_READ); draw_set_mapped_vertex_buffer(draw, i, buf); } @@ -41,6 +43,10 @@ boolean nv04_draw_elements( struct pipe_context *pipe, draw_set_mapped_element_buffer(draw, 0, NULL); } + draw_set_mapped_constant_buffer(draw, + nv04->constbuf[PIPE_SHADER_VERTEX], + nv04->constbuf_nr[PIPE_SHADER_VERTEX]); + /* draw! */ draw_arrays(nv04->draw, prim, start, count); @@ -48,8 +54,8 @@ boolean nv04_draw_elements( struct pipe_context *pipe, * unmap vertex/index buffers */ for (i = 0; i < PIPE_MAX_ATTRIBS; i++) { - if (nv04->vertex_buffer[i].buffer) { - pipe->winsys->buffer_unmap(pipe->winsys, nv04->vertex_buffer[i].buffer); + if (nv04->vtxbuf[i].buffer) { + pipe->winsys->buffer_unmap(pipe->winsys, nv04->vtxbuf[i].buffer); draw_set_mapped_vertex_buffer(draw, i, NULL); } } @@ -64,6 +70,7 @@ boolean nv04_draw_elements( struct pipe_context *pipe, boolean nv04_draw_arrays( struct pipe_context *pipe, unsigned prim, unsigned start, unsigned count) { + printf("coucou in draw arrays\n"); return nv04_draw_elements(pipe, NULL, 0, prim, start, count); } diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_context.c b/src/gallium/winsys/drm/nouveau/common/nouveau_context.c index 2f245046d4..e093877381 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_context.c +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_context.c @@ -84,6 +84,8 @@ nouveau_context_init(struct nouveau_screen *nv_screen, int i; switch (dev->chipset & 0xf0) { + case 0x00: + /* NV04 */ case 0x10: case 0x20: /* NV10 */ diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_fence.c b/src/gallium/winsys/drm/nouveau/common/nouveau_fence.c index e7b0b4ff07..451011e112 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_fence.c +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_fence.c @@ -148,9 +148,12 @@ nouveau_fence_emit(struct nouveau_fence *fence) NOUVEAU_ERR("AII wrap unhandled\n"); /*XXX: assumes subc 0 is populated */ - RING_SPACE_CH(fence->channel, 2); - OUT_RING_CH (fence->channel, 0x00040050); - OUT_RING_CH (fence->channel, nvfence->sequence); + /* Not the way to fence on nv4 */ + if (nvchan->base.device->chipset >= 0x10) { + RING_SPACE_CH(fence->channel, 2); + OUT_RING_CH (fence->channel, 0x00040050); + OUT_RING_CH (fence->channel, nvfence->sequence); + } if (nvchan->fence_tail) { nouveau_fence(nvchan->fence_tail)->next = fence; diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_winsys.c b/src/gallium/winsys/drm/nouveau/common/nouveau_winsys.c index 364340e1d3..722694e4a4 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_winsys.c +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_winsys.c @@ -100,6 +100,10 @@ nouveau_pipe_create(struct nouveau_context *nv) return NULL; switch (chipset & 0xf0) { + case 0x00: + hws_create = nv04_screen_create; + hw_create = nv04_create; + break; case 0x10: hws_create = nv10_screen_create; hw_create = nv10_create; -- cgit v1.2.3 From 5069bfed29bcee2c89c36c74c6d65d388eb7792e Mon Sep 17 00:00:00 2001 From: Zack Rusin Date: Mon, 2 Feb 2009 23:47:16 -0500 Subject: gallium: remove pipe_buffer from surfaces this change disassociates, at least from the driver perspective, the surface from buffer. surfaces are technically now views on the textures so make it so by hiding the buffer in the internals of textures. --- src/gallium/auxiliary/util/u_gen_mipmap.c | 36 +++++++++++----------- src/gallium/drivers/i915simple/i915_screen.c | 6 ++-- src/gallium/drivers/i915simple/i915_state_emit.c | 22 ++++++++----- src/gallium/drivers/i915simple/i915_surface.c | 9 ++++-- src/gallium/drivers/i915simple/i915_texture.c | 2 -- src/gallium/drivers/i965simple/brw_misc_state.c | 4 +-- src/gallium/drivers/i965simple/brw_surface.c | 9 ++++-- src/gallium/drivers/i965simple/brw_tex_layout.c | 1 - .../drivers/i965simple/brw_wm_surface_state.c | 3 +- src/gallium/drivers/nv04/nv04_miptree.c | 2 -- src/gallium/drivers/nv04/nv04_screen.c | 9 +++--- src/gallium/drivers/nv04/nv04_state_emit.c | 9 ++++-- src/gallium/drivers/nv10/nv10_miptree.c | 1 - src/gallium/drivers/nv10/nv10_screen.c | 6 ++-- src/gallium/drivers/nv10/nv10_state_emit.c | 7 +++-- src/gallium/drivers/nv20/nv20_miptree.c | 2 -- src/gallium/drivers/nv20/nv20_screen.c | 6 ++-- src/gallium/drivers/nv20/nv20_state_emit.c | 7 +++-- src/gallium/drivers/nv30/nv30_miptree.c | 2 -- src/gallium/drivers/nv30/nv30_screen.c | 6 ++-- src/gallium/drivers/nv30/nv30_state_fb.c | 16 ++++++---- src/gallium/drivers/nv40/nv40_miptree.c | 2 -- src/gallium/drivers/nv40/nv40_screen.c | 9 ++++-- src/gallium/drivers/nv40/nv40_state_fb.c | 27 ++++++++++------ src/gallium/drivers/nv50/nv50_context.h | 7 +++++ src/gallium/drivers/nv50/nv50_miptree.c | 6 +--- src/gallium/drivers/nv50/nv50_program.c | 2 +- src/gallium/drivers/nv50/nv50_state_validate.c | 8 ++--- src/gallium/drivers/nv50/nv50_surface.c | 4 +-- src/gallium/drivers/softpipe/sp_texture.c | 21 ++++++++----- src/gallium/drivers/softpipe/sp_tile_cache.c | 2 +- src/gallium/drivers/trace/tr_state.c | 1 - src/gallium/include/pipe/p_state.h | 1 - src/gallium/winsys/egl_xlib/egl_xlib.c | 5 +-- src/gallium/winsys/xlib/Makefile | 4 +-- src/gallium/winsys/xlib/xlib_brw_screen.c | 13 ++++++-- src/gallium/winsys/xlib/xlib_cell.c | 4 ++- src/gallium/winsys/xlib/xlib_softpipe.c | 8 +++-- src/mesa/state_tracker/st_cb_fbo.c | 1 - src/mesa/state_tracker/st_gen_mipmap.c | 12 ++++---- 40 files changed, 177 insertions(+), 125 deletions(-) (limited to 'src/gallium/drivers/nv04/nv04_state_emit.c') diff --git a/src/gallium/auxiliary/util/u_gen_mipmap.c b/src/gallium/auxiliary/util/u_gen_mipmap.c index 301a58ed7b..2b4cdab6cf 100644 --- a/src/gallium/auxiliary/util/u_gen_mipmap.c +++ b/src/gallium/auxiliary/util/u_gen_mipmap.c @@ -1125,19 +1125,19 @@ make_1d_mipmap(struct gen_mipmap_state *ctx, dstSurf = screen->get_tex_surface(screen, pt, face, dstLevel, zslice, PIPE_BUFFER_USAGE_CPU_WRITE); - srcMap = ((ubyte *) pipe_buffer_map(screen, srcSurf->buffer, - PIPE_BUFFER_USAGE_CPU_READ) + srcMap = ((ubyte *) pipe_surface_map(srcSurf, + PIPE_BUFFER_USAGE_CPU_READ) + srcSurf->offset); - dstMap = ((ubyte *) pipe_buffer_map(screen, dstSurf->buffer, - PIPE_BUFFER_USAGE_CPU_WRITE) + dstMap = ((ubyte *) pipe_surface_map(dstSurf, + PIPE_BUFFER_USAGE_CPU_WRITE) + dstSurf->offset); reduce_1d(pt->format, srcSurf->width, srcMap, dstSurf->width, dstMap); - pipe_buffer_unmap(screen, srcSurf->buffer); - pipe_buffer_unmap(screen, dstSurf->buffer); + pipe_surface_unmap(srcSurf); + pipe_surface_unmap(dstSurf); pipe_surface_reference(&srcSurf, NULL); pipe_surface_reference(&dstSurf, NULL); @@ -1168,11 +1168,11 @@ make_2d_mipmap(struct gen_mipmap_state *ctx, dstSurf = screen->get_tex_surface(screen, pt, face, dstLevel, zslice, PIPE_BUFFER_USAGE_CPU_WRITE); - srcMap = ((ubyte *) pipe_buffer_map(screen, srcSurf->buffer, - PIPE_BUFFER_USAGE_CPU_READ) + srcMap = ((ubyte *) pipe_surface_map(srcSurf, + PIPE_BUFFER_USAGE_CPU_READ) + srcSurf->offset); - dstMap = ((ubyte *) pipe_buffer_map(screen, dstSurf->buffer, - PIPE_BUFFER_USAGE_CPU_WRITE) + dstMap = ((ubyte *) pipe_surface_map(dstSurf, + PIPE_BUFFER_USAGE_CPU_WRITE) + dstSurf->offset); reduce_2d(pt->format, @@ -1181,8 +1181,8 @@ make_2d_mipmap(struct gen_mipmap_state *ctx, dstSurf->width, dstSurf->height, dstSurf->stride, dstMap); - pipe_buffer_unmap(screen, srcSurf->buffer); - pipe_buffer_unmap(screen, dstSurf->buffer); + pipe_surface_unmap(srcSurf); + pipe_surface_unmap(dstSurf); pipe_surface_reference(&srcSurf, NULL); pipe_surface_reference(&dstSurf, NULL); @@ -1212,11 +1212,11 @@ make_3d_mipmap(struct gen_mipmap_state *ctx, dstSurf = screen->get_tex_surface(screen, pt, face, dstLevel, zslice, PIPE_BUFFER_USAGE_CPU_WRITE); - srcMap = ((ubyte *) pipe_buffer_map(screen, srcSurf->buffer, - PIPE_BUFFER_USAGE_CPU_READ) + srcMap = ((ubyte *) pipe_surface_map(srcSurf, + PIPE_BUFFER_USAGE_CPU_READ) + srcSurf->offset); - dstMap = ((ubyte *) pipe_buffer_map(screen, dstSurf->buffer, - PIPE_BUFFER_USAGE_CPU_WRITE) + dstMap = ((ubyte *) pipe_surface_map(dstSurf, + PIPE_BUFFER_USAGE_CPU_WRITE) + dstSurf->offset); #if 0 @@ -1229,8 +1229,8 @@ make_3d_mipmap(struct gen_mipmap_state *ctx, (void) reduce_3d; #endif - pipe_buffer_unmap(screen, srcSurf->buffer); - pipe_buffer_unmap(screen, dstSurf->buffer); + pipe_surface_unmap(srcSurf); + pipe_surface_unmap(dstSurf); pipe_surface_reference(&srcSurf, NULL); pipe_surface_reference(&dstSurf, NULL); diff --git a/src/gallium/drivers/i915simple/i915_screen.c b/src/gallium/drivers/i915simple/i915_screen.c index 5bb127f3d5..39e48105b3 100644 --- a/src/gallium/drivers/i915simple/i915_screen.c +++ b/src/gallium/drivers/i915simple/i915_screen.c @@ -209,7 +209,8 @@ i915_surface_map( struct pipe_screen *screen, struct pipe_surface *surface, unsigned flags ) { - char *map = pipe_buffer_map( screen, surface->buffer, flags ); + struct i915_texture *tex = (struct i915_texture *)surface->texture; + char *map = pipe_buffer_map( screen, tex->buffer, flags ); if (map == NULL) return NULL; @@ -228,7 +229,8 @@ static void i915_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface) { - pipe_buffer_unmap( screen, surface->buffer ); + struct i915_texture *tex = (struct i915_texture *)surface->texture; + pipe_buffer_unmap( screen, tex->buffer ); } diff --git a/src/gallium/drivers/i915simple/i915_state_emit.c b/src/gallium/drivers/i915simple/i915_state_emit.c index 9bd6f92323..6558cf1c3e 100644 --- a/src/gallium/drivers/i915simple/i915_state_emit.c +++ b/src/gallium/drivers/i915simple/i915_state_emit.c @@ -213,18 +213,22 @@ i915_emit_hardware_state(struct i915_context *i915 ) if (cbuf_surface) { unsigned cpitch = cbuf_surface->stride; unsigned ctile = BUF_3D_USE_FENCE; - if (cbuf_surface->texture && - ((struct i915_texture*)(cbuf_surface->texture))->tiled) { + struct i915_texture *tex = (struct i915_texture *) + cbuf_surface->texture; + struct pipe_buffer *buffer = tex->buffer; + assert(tex); + + if (tex && tex->tiled) { ctile = BUF_3D_TILED_SURFACE; } OUT_BATCH(_3DSTATE_BUF_INFO_CMD); - OUT_BATCH(BUF_3D_ID_COLOR_BACK | + OUT_BATCH(BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(cpitch) | /* pitch in bytes */ ctile); - OUT_RELOC(cbuf_surface->buffer, + OUT_RELOC(tex->buffer, I915_BUFFER_ACCESS_WRITE, cbuf_surface->offset); } @@ -234,8 +238,12 @@ i915_emit_hardware_state(struct i915_context *i915 ) if (depth_surface) { unsigned zpitch = depth_surface->stride; unsigned ztile = BUF_3D_USE_FENCE; - if (depth_surface->texture && - ((struct i915_texture*)(depth_surface->texture))->tiled) { + struct i915_texture *tex = (struct i915_texture *) + depth_surface->texture; + struct pipe_buffer *buffer = tex->buffer; + assert(tex); + + if (tex && tex->tiled) { ztile = BUF_3D_TILED_SURFACE; } @@ -245,7 +253,7 @@ i915_emit_hardware_state(struct i915_context *i915 ) BUF_3D_PITCH(zpitch) | /* pitch in bytes */ ztile); - OUT_RELOC(depth_surface->buffer, + OUT_RELOC(tex->buffer, I915_BUFFER_ACCESS_WRITE, depth_surface->offset); } diff --git a/src/gallium/drivers/i915simple/i915_surface.c b/src/gallium/drivers/i915simple/i915_surface.c index 5ffdb76682..94e2deaf61 100644 --- a/src/gallium/drivers/i915simple/i915_surface.c +++ b/src/gallium/drivers/i915simple/i915_surface.c @@ -74,13 +74,15 @@ i915_surface_copy(struct pipe_context *pipe, pipe->screen->surface_unmap(pipe->screen, dst); } else { + struct i915_texture *dst_tex = (struct i915_texture *)dst->texture; + struct i915_texture *src_tex = (struct i915_texture *)src->texture; assert(dst->block.width == 1); assert(dst->block.height == 1); i915_copy_blit( i915_context(pipe), do_flip, dst->block.size, - (unsigned short) src->stride, src->buffer, src->offset, - (unsigned short) dst->stride, dst->buffer, dst->offset, + (unsigned short) src->stride, src_tex->buffer, src->offset, + (unsigned short) dst->stride, dst_tex->buffer, dst->offset, (short) srcx, (short) srcy, (short) dstx, (short) dsty, (short) width, (short) height ); } } @@ -102,12 +104,13 @@ i915_surface_fill(struct pipe_context *pipe, pipe->screen->surface_unmap(pipe->screen, dst); } else { + struct i915_texture *tex = (struct i915_texture *)dst->texture; assert(dst->block.width == 1); assert(dst->block.height == 1); i915_fill_blit( i915_context(pipe), dst->block.size, (unsigned short) dst->stride, - dst->buffer, dst->offset, + tex->buffer, dst->offset, (short) dstx, (short) dsty, (short) width, (short) height, value ); diff --git a/src/gallium/drivers/i915simple/i915_texture.c b/src/gallium/drivers/i915simple/i915_texture.c index 803ef3a187..b2ca3a2286 100644 --- a/src/gallium/drivers/i915simple/i915_texture.c +++ b/src/gallium/drivers/i915simple/i915_texture.c @@ -683,7 +683,6 @@ i915_get_tex_surface(struct pipe_screen *screen, if (ps) { ps->refcount = 1; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(screen, &ps->buffer, tex->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; @@ -755,7 +754,6 @@ i915_tex_surface_release(struct pipe_screen *screen, } pipe_texture_reference(&surf->texture, NULL); - pipe_buffer_reference(screen, &surf->buffer, NULL); FREE(surf); } diff --git a/src/gallium/drivers/i965simple/brw_misc_state.c b/src/gallium/drivers/i965simple/brw_misc_state.c index be812c5da9..99ff4403a5 100644 --- a/src/gallium/drivers/i965simple/brw_misc_state.c +++ b/src/gallium/drivers/i965simple/brw_misc_state.c @@ -223,7 +223,7 @@ static void upload_depthbuffer(struct brw_context *brw) OUT_BATCH(0); } else { unsigned int format; - + struct brw_texture *tex = (struct brw_texture *)depth_surface->texture; assert(depth_surface->block.width == 1); assert(depth_surface->block.height == 1); switch (depth_surface->block.size) { @@ -246,7 +246,7 @@ static void upload_depthbuffer(struct brw_context *brw) (BRW_TILEWALK_YMAJOR << 26) | // (depth_surface->region->tiled << 27) | (BRW_SURFACE_2D << 29)); - OUT_RELOC(depth_surface->buffer, + OUT_RELOC(tex->buffer, PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE, 0); OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) | ((depth_surface->stride/depth_surface->block.size - 1) << 6) | diff --git a/src/gallium/drivers/i965simple/brw_surface.c b/src/gallium/drivers/i965simple/brw_surface.c index 3159eba2fd..0a95dce194 100644 --- a/src/gallium/drivers/i965simple/brw_surface.c +++ b/src/gallium/drivers/i965simple/brw_surface.c @@ -74,13 +74,15 @@ brw_surface_copy(struct pipe_context *pipe, pipe->screen->surface_unmap(pipe->screen, dst); } else { + struct brw_texture *dst_tex = (struct brw_texture *)dst->texture; + struct brw_texture *src_tex = (struct brw_texture *)src->texture; assert(dst->block.width == 1); assert(dst->block.height == 1); brw_copy_blit(brw_context(pipe), do_flip, dst->block.size, - (short) src->stride/src->block.size, src->buffer, src->offset, FALSE, - (short) dst->stride/dst->block.size, dst->buffer, dst->offset, FALSE, + (short) src->stride/src->block.size, src_tex->buffer, src->offset, FALSE, + (short) dst->stride/dst->block.size, dst_tex->buffer, dst->offset, FALSE, (short) srcx, (short) srcy, (short) dstx, (short) dsty, (short) width, (short) height, PIPE_LOGICOP_COPY); } @@ -103,12 +105,13 @@ brw_surface_fill(struct pipe_context *pipe, pipe->screen->surface_unmap(pipe->screen, dst); } else { + struct brw_texture *tex = (struct brw_texture *)dst->texture; assert(dst->block.width == 1); assert(dst->block.height == 1); brw_fill_blit(brw_context(pipe), dst->block.size, (short) dst->stride/dst->block.size, - dst->buffer, dst->offset, FALSE, + tex->buffer, dst->offset, FALSE, (short) dstx, (short) dsty, (short) width, (short) height, value); diff --git a/src/gallium/drivers/i965simple/brw_tex_layout.c b/src/gallium/drivers/i965simple/brw_tex_layout.c index 6af0d5cf4b..448229ed4e 100644 --- a/src/gallium/drivers/i965simple/brw_tex_layout.c +++ b/src/gallium/drivers/i965simple/brw_tex_layout.c @@ -367,7 +367,6 @@ brw_get_tex_surface_screen(struct pipe_screen *screen, if (ps) { ps->refcount = 1; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(screen, &ps->buffer, tex->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; diff --git a/src/gallium/drivers/i965simple/brw_wm_surface_state.c b/src/gallium/drivers/i965simple/brw_wm_surface_state.c index 1a326f9918..1bab5bfdb3 100644 --- a/src/gallium/drivers/i965simple/brw_wm_surface_state.c +++ b/src/gallium/drivers/i965simple/brw_wm_surface_state.c @@ -193,6 +193,7 @@ static void upload_wm_surfaces(struct brw_context *brw ) /* BRW_NEW_FRAMEBUFFER */ struct pipe_surface *pipe_surface = brw->attribs.FrameBuffer.cbufs[0];/*fixme*/ + struct brw_texture *tex = (struct brw_texture *)pipe_surface->texture; memset(&surf, 0, sizeof(surf)); @@ -204,7 +205,7 @@ static void upload_wm_surfaces(struct brw_context *brw ) surf.ss0.surface_type = BRW_SURFACE_2D; - surf.ss1.base_addr = brw_buffer_offset( brw, pipe_surface->buffer ); + surf.ss1.base_addr = brw_buffer_offset( brw, tex->buffer ); surf.ss2.width = pipe_surface->width - 1; surf.ss2.height = pipe_surface->height - 1; diff --git a/src/gallium/drivers/nv04/nv04_miptree.c b/src/gallium/drivers/nv04/nv04_miptree.c index 01cb8ecbf3..0575dc0afc 100644 --- a/src/gallium/drivers/nv04/nv04_miptree.c +++ b/src/gallium/drivers/nv04/nv04_miptree.c @@ -107,7 +107,6 @@ nv04_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!ps) return NULL; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(pscreen, &ps->buffer, nv04mt->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; @@ -138,7 +137,6 @@ nv04_miptree_surface_del(struct pipe_screen *pscreen, return; pipe_texture_reference(&ps->texture, NULL); - pipe_buffer_reference(pscreen->winsys, &ps->buffer, NULL); FREE(ps); } diff --git a/src/gallium/drivers/nv04/nv04_screen.c b/src/gallium/drivers/nv04/nv04_screen.c index 2ae6784077..e5e3d4772a 100644 --- a/src/gallium/drivers/nv04/nv04_screen.c +++ b/src/gallium/drivers/nv04/nv04_screen.c @@ -1,4 +1,5 @@ #include "pipe/p_screen.h" +#include "pipe/p_inlines.h" #include "util/u_simple_screen.h" #include "nv04_context.h" @@ -122,10 +123,10 @@ static void * nv04_surface_map(struct pipe_screen *screen, struct pipe_surface *surface, unsigned flags ) { - struct pipe_winsys *ws = screen->winsys; void *map; + struct nv04_miptree *nv04mt = (struct nv04_miptree *)surface->texture; - map = ws->buffer_map(ws, surface->buffer, flags); + map = pipe_buffer_map(screen, nv04mt->buffer, flags); if (!map) return NULL; @@ -135,9 +136,9 @@ nv04_surface_map(struct pipe_screen *screen, struct pipe_surface *surface, static void nv04_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface) { - struct pipe_winsys *ws = screen->winsys; + struct nv04_miptree *nv04mt = (struct nv04_miptree *)surface->texture; - ws->buffer_unmap(ws, surface->buffer); + pipe_buffer_unmap(screen, nv04mt->buffer); } static void diff --git a/src/gallium/drivers/nv04/nv04_state_emit.c b/src/gallium/drivers/nv04/nv04_state_emit.c index 26491758a0..bd8ef1adbf 100644 --- a/src/gallium/drivers/nv04/nv04_state_emit.c +++ b/src/gallium/drivers/nv04/nv04_state_emit.c @@ -96,6 +96,7 @@ static void nv04_state_emit_framebuffer(struct nv04_context* nv04) struct pipe_surface *rt, *zeta; uint32_t rt_format, w, h; int colour_format = 0, zeta_format = 0; + struct nv04_miptree *nv04mt = 0; w = fb->cbufs[0]->width; h = fb->cbufs[0]->height; @@ -129,14 +130,16 @@ static void nv04_state_emit_framebuffer(struct nv04_context* nv04) BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_FORMAT, 1); OUT_RING(rt_format); - + + nv04mt = (struct nv04_miptree *)rt->texture; /* FIXME pitches have to be aligned ! */ BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_PITCH, 2); OUT_RING(rt->stride|(zeta->stride<<16)); - OUT_RELOCl(rt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + OUT_RELOCl(nv04mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); if (fb->zsbuf) { + nv04mt = (struct nv04_miptree *)zeta->texture; BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA, 1); - OUT_RELOCl(zeta->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + OUT_RELOCl(nv04mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); } } diff --git a/src/gallium/drivers/nv10/nv10_miptree.c b/src/gallium/drivers/nv10/nv10_miptree.c index f8c021261b..909278213e 100644 --- a/src/gallium/drivers/nv10/nv10_miptree.c +++ b/src/gallium/drivers/nv10/nv10_miptree.c @@ -114,7 +114,6 @@ nv10_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt, if (!ps) return NULL; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(screen, &ps->buffer, nv10mt->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; diff --git a/src/gallium/drivers/nv10/nv10_screen.c b/src/gallium/drivers/nv10/nv10_screen.c index 12516fd71e..2f945a193c 100644 --- a/src/gallium/drivers/nv10/nv10_screen.c +++ b/src/gallium/drivers/nv10/nv10_screen.c @@ -122,8 +122,9 @@ nv10_surface_map(struct pipe_screen *screen, struct pipe_surface *surface, { struct pipe_winsys *ws = screen->winsys; void *map; + struct nv10_miptree *nv10mt = (struct nv10_miptree *)surface->texture; - map = ws->buffer_map(ws, surface->buffer, flags); + map = ws->buffer_map(ws, nv10mt->buffer, flags); if (!map) return NULL; @@ -134,8 +135,9 @@ static void nv10_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface) { struct pipe_winsys *ws = screen->winsys; + struct nv10_miptree *nv10mt = (struct nv10_miptree *)surface->texture; - ws->buffer_unmap(ws, surface->buffer); + ws->buffer_unmap(ws, nv10mt->buffer); } static void diff --git a/src/gallium/drivers/nv10/nv10_state_emit.c b/src/gallium/drivers/nv10/nv10_state_emit.c index 46c7e1d753..5dec618b93 100644 --- a/src/gallium/drivers/nv10/nv10_state_emit.c +++ b/src/gallium/drivers/nv10/nv10_state_emit.c @@ -106,6 +106,7 @@ static void nv10_state_emit_framebuffer(struct nv10_context* nv10) struct pipe_surface *rt, *zeta = NULL; uint32_t rt_format, w, h; int colour_format = 0, zeta_format = 0; + struct nv10_miptree *nv10mt = 0; w = fb->cbufs[0]->width; h = fb->cbufs[0]->height; @@ -147,11 +148,13 @@ static void nv10_state_emit_framebuffer(struct nv10_context* nv10) OUT_RING (rt->stride | (rt->stride << 16)); } - nv10->rt[0] = rt->buffer; + nv10mt = (struct nv10_miptree *)rt->texture; + nv10->rt[0] = nv10mt->buffer; if (zeta_format) { - nv10->zeta = zeta->buffer; + nv10mt = (struct nv10_miptree *)zeta->texture; + nv10->zeta = nv10mt->buffer; } BEGIN_RING(celsius, NV10TCL_RT_HORIZ, 3); diff --git a/src/gallium/drivers/nv20/nv20_miptree.c b/src/gallium/drivers/nv20/nv20_miptree.c index d2038c391d..8e4cc80902 100644 --- a/src/gallium/drivers/nv20/nv20_miptree.c +++ b/src/gallium/drivers/nv20/nv20_miptree.c @@ -106,7 +106,6 @@ nv20_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt, if (!ps) return NULL; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(screen, &ps->buffer, nv20mt->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; @@ -141,7 +140,6 @@ nv20_miptree_surface_release(struct pipe_screen *pscreen, return; pipe_texture_reference(&ps->texture, NULL); - pipe_buffer_reference(pscreen, &ps->buffer, NULL); FREE(ps); } diff --git a/src/gallium/drivers/nv20/nv20_screen.c b/src/gallium/drivers/nv20/nv20_screen.c index f09b364b8d..c9171fa178 100644 --- a/src/gallium/drivers/nv20/nv20_screen.c +++ b/src/gallium/drivers/nv20/nv20_screen.c @@ -122,8 +122,9 @@ nv20_surface_map(struct pipe_screen *screen, struct pipe_surface *surface, { struct pipe_winsys *ws = screen->winsys; void *map; + struct nv20_miptree *nv20mt = (struct nv20_miptree *)surface->texture; - map = ws->buffer_map(ws, surface->buffer, flags); + map = ws->buffer_map(ws, nv20mt->buffer, flags); if (!map) return NULL; @@ -134,8 +135,9 @@ static void nv20_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface) { struct pipe_winsys *ws = screen->winsys; + struct nv20_miptree *nv20mt = (struct nv20_miptree *)surface->texture; - ws->buffer_unmap(ws, surface->buffer); + ws->buffer_unmap(ws, nv20mt->buffer); } static void diff --git a/src/gallium/drivers/nv20/nv20_state_emit.c b/src/gallium/drivers/nv20/nv20_state_emit.c index ea20078a50..0f4df9ca31 100644 --- a/src/gallium/drivers/nv20/nv20_state_emit.c +++ b/src/gallium/drivers/nv20/nv20_state_emit.c @@ -112,6 +112,7 @@ static void nv20_state_emit_framebuffer(struct nv20_context* nv20) struct pipe_surface *rt, *zeta = NULL; uint32_t rt_format, w, h; int colour_format = 0, zeta_format = 0; + struct nv20_miptree *nv20mt = 0; w = fb->cbufs[0]->width; h = fb->cbufs[0]->height; @@ -153,11 +154,13 @@ static void nv20_state_emit_framebuffer(struct nv20_context* nv20) OUT_RING (rt->stride | (rt->stride << 16)); } - nv20->rt[0] = rt->buffer; + nv20mt = (struct nv20_miptree *)rt->texture; + nv20->rt[0] = nv20mt->buffer; if (zeta_format) { - nv20->zeta = zeta->buffer; + nv20mt = (struct nv20_miptree *)zeta->texture; + nv20->zeta = nv20mt->buffer; } BEGIN_RING(kelvin, NV20TCL_RT_HORIZ, 3); diff --git a/src/gallium/drivers/nv30/nv30_miptree.c b/src/gallium/drivers/nv30/nv30_miptree.c index 79baac714c..c55756971b 100644 --- a/src/gallium/drivers/nv30/nv30_miptree.c +++ b/src/gallium/drivers/nv30/nv30_miptree.c @@ -143,7 +143,6 @@ nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!ps) return NULL; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(pscreen, &ps->buffer, nv30mt->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; @@ -181,7 +180,6 @@ nv30_miptree_surface_del(struct pipe_screen *pscreen, return; pipe_texture_reference(&ps->texture, NULL); - pipe_buffer_reference(pscreen, &ps->buffer, NULL); FREE(ps); } diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c index 0f10d914ad..9738436dc4 100644 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ b/src/gallium/drivers/nv30/nv30_screen.c @@ -134,6 +134,7 @@ nv30_surface_map(struct pipe_screen *screen, struct pipe_surface *surface, struct pipe_winsys *ws = screen->winsys; struct pipe_surface *surface_to_map; void *map; + struct nv30_miptree *nv30mt = (struct nv30_miptree *)surface->texture; if (!(surface->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { struct nv30_miptree *mt = (struct nv30_miptree *)surface->texture; @@ -162,7 +163,7 @@ nv30_surface_map(struct pipe_screen *screen, struct pipe_surface *surface, assert(surface_to_map); - map = ws->buffer_map(ws, surface_to_map->buffer, flags); + map = ws->buffer_map(ws, nv30mt->buffer, flags); if (!map) return NULL; @@ -174,6 +175,7 @@ nv30_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface) { struct pipe_winsys *ws = screen->winsys; struct pipe_surface *surface_to_unmap; + struct nv30_miptree *nv30mt = (struct nv30_miptree *)surface->texture; /* TODO: Copy from shadow just before push buffer is flushed instead. There are probably some programs that map/unmap excessively @@ -190,7 +192,7 @@ nv30_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface) assert(surface_to_unmap); - ws->buffer_unmap(ws, surface_to_unmap->buffer); + ws->buffer_unmap(ws, nv30mt->buffer); if (surface_to_unmap != surface) { struct nv30_screen *nvscreen = nv30_screen(screen); diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c b/src/gallium/drivers/nv30/nv30_state_fb.c index 8536acc570..77368cb205 100644 --- a/src/gallium/drivers/nv30/nv30_state_fb.c +++ b/src/gallium/drivers/nv30/nv30_state_fb.c @@ -12,6 +12,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; unsigned w = fb->width; unsigned h = fb->height; + struct nv30_miptree *nv30mt; rt_enable = 0; for (i = 0; i < fb->nr_cbufs; i++) { @@ -77,34 +78,37 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) pitch |= (pitch << 16); } + nv30mt = (struct nv30_miptree *)rt[0]->texture; so_method(so, nv30->screen->rankine, NV34TCL_DMA_COLOR0, 1); - so_reloc (so, rt[0]->buffer, 0, rt_flags | NOUVEAU_BO_OR, + so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR, nv30->nvws->channel->vram->handle, nv30->nvws->channel->gart->handle); so_method(so, nv30->screen->rankine, NV34TCL_COLOR0_PITCH, 2); so_data (so, pitch); - so_reloc (so, rt[0]->buffer, rt[0]->offset, rt_flags | + so_reloc (so, nv30mt->buffer, rt[0]->offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); } if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) { + nv30mt = (struct nv30_miptree *)rt[1]->texture; so_method(so, nv30->screen->rankine, NV34TCL_DMA_COLOR1, 1); - so_reloc (so, rt[1]->buffer, 0, rt_flags | NOUVEAU_BO_OR, + so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR, nv30->nvws->channel->vram->handle, nv30->nvws->channel->gart->handle); so_method(so, nv30->screen->rankine, NV34TCL_COLOR1_OFFSET, 2); - so_reloc (so, rt[1]->buffer, rt[1]->offset, rt_flags | + so_reloc (so, nv30mt->buffer, rt[1]->offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); so_data (so, rt[1]->stride); } if (zeta_format) { + nv30mt = (struct nv30_miptree *)zeta->texture; so_method(so, nv30->screen->rankine, NV34TCL_DMA_ZETA, 1); - so_reloc (so, zeta->buffer, 0, rt_flags | NOUVEAU_BO_OR, + so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR, nv30->nvws->channel->vram->handle, nv30->nvws->channel->gart->handle); so_method(so, nv30->screen->rankine, NV34TCL_ZETA_OFFSET, 1); - so_reloc (so, zeta->buffer, zeta->offset, rt_flags | + so_reloc (so, nv30mt->buffer, zeta->offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); /* TODO: allocate LMA depth buffer */ } diff --git a/src/gallium/drivers/nv40/nv40_miptree.c b/src/gallium/drivers/nv40/nv40_miptree.c index ba912ddcbb..b1fba11d2f 100644 --- a/src/gallium/drivers/nv40/nv40_miptree.c +++ b/src/gallium/drivers/nv40/nv40_miptree.c @@ -144,7 +144,6 @@ nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!ps) return NULL; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(pscreen, &ps->buffer, mt->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; @@ -182,7 +181,6 @@ nv40_miptree_surface_del(struct pipe_screen *pscreen, return; pipe_texture_reference(&ps->texture, NULL); - pipe_buffer_reference(pscreen, &ps->buffer, NULL); FREE(ps); } diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c index 46fe133d71..41d342d27d 100644 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ b/src/gallium/drivers/nv40/nv40_screen.c @@ -143,6 +143,7 @@ nv40_surface_map(struct pipe_screen *screen, struct pipe_surface *surface, struct pipe_winsys *ws = screen->winsys; struct pipe_surface *surface_to_map; void *map; + struct nv40_miptree *mt; if (!(surface->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { struct nv40_miptree *mt = (struct nv40_miptree *)surface->texture; @@ -170,8 +171,8 @@ nv40_surface_map(struct pipe_screen *screen, struct pipe_surface *surface, surface_to_map = surface; assert(surface_to_map); - - map = ws->buffer_map(ws, surface_to_map->buffer, flags); + mt = (struct nv40_miptree *)surface_to_map->texture; + map = ws->buffer_map(ws, mt->buffer, flags); if (!map) return NULL; @@ -183,6 +184,7 @@ nv40_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface) { struct pipe_winsys *ws = screen->winsys; struct pipe_surface *surface_to_unmap; + struct nv40_miptree *mt; /* TODO: Copy from shadow just before push buffer is flushed instead. There are probably some programs that map/unmap excessively @@ -199,7 +201,8 @@ nv40_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface) assert(surface_to_unmap); - ws->buffer_unmap(ws, surface_to_unmap->buffer); + mt = (struct nv40_miptree *)surface_to_unmap->texture; + ws->buffer_unmap(ws, mt->buffer); if (surface_to_unmap != surface) { struct nv40_screen *nvscreen = nv40_screen(screen); diff --git a/src/gallium/drivers/nv40/nv40_state_fb.c b/src/gallium/drivers/nv40/nv40_state_fb.c index a2e09e18a4..454abad31f 100644 --- a/src/gallium/drivers/nv40/nv40_state_fb.c +++ b/src/gallium/drivers/nv40/nv40_state_fb.c @@ -1,6 +1,13 @@ #include "nv40_context.h" #include "nouveau/nouveau_util.h" +static struct pipe_buffer * +nv40_surface_buffer(struct pipe_surface *surface) +{ + struct nv40_miptree *mt = (struct nv40_miptree *)surface->texture; + return mt->buffer; +} + static boolean nv40_state_framebuffer_validate(struct nv40_context *nv40) { @@ -71,33 +78,33 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) { so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR0, 1); - so_reloc (so, rt[0]->buffer, 0, rt_flags | NOUVEAU_BO_OR, + so_reloc (so, nv40_surface_buffer(rt[0]), 0, rt_flags | NOUVEAU_BO_OR, nv40->nvws->channel->vram->handle, nv40->nvws->channel->gart->handle); so_method(so, nv40->screen->curie, NV40TCL_COLOR0_PITCH, 2); so_data (so, rt[0]->stride); - so_reloc (so, rt[0]->buffer, rt[0]->offset, rt_flags | + so_reloc (so, nv40_surface_buffer(rt[0]), rt[0]->offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); } if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) { so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR1, 1); - so_reloc (so, rt[1]->buffer, 0, rt_flags | NOUVEAU_BO_OR, + so_reloc (so, nv40_surface_buffer(rt[1]), 0, rt_flags | NOUVEAU_BO_OR, nv40->nvws->channel->vram->handle, nv40->nvws->channel->gart->handle); so_method(so, nv40->screen->curie, NV40TCL_COLOR1_OFFSET, 2); - so_reloc (so, rt[1]->buffer, rt[1]->offset, rt_flags | + so_reloc (so, nv40_surface_buffer(rt[1]), rt[1]->offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); so_data (so, rt[1]->stride); } if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) { so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR2, 1); - so_reloc (so, rt[2]->buffer, 0, rt_flags | NOUVEAU_BO_OR, + so_reloc (so, nv40_surface_buffer(rt[2]), 0, rt_flags | NOUVEAU_BO_OR, nv40->nvws->channel->vram->handle, nv40->nvws->channel->gart->handle); so_method(so, nv40->screen->curie, NV40TCL_COLOR2_OFFSET, 1); - so_reloc (so, rt[2]->buffer, rt[2]->offset, rt_flags | + so_reloc (so, nv40_surface_buffer(rt[2]), rt[2]->offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); so_method(so, nv40->screen->curie, NV40TCL_COLOR2_PITCH, 1); so_data (so, rt[2]->stride); @@ -105,11 +112,11 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) { so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR3, 1); - so_reloc (so, rt[3]->buffer, 0, rt_flags | NOUVEAU_BO_OR, + so_reloc (so, nv40_surface_buffer(rt[3]), 0, rt_flags | NOUVEAU_BO_OR, nv40->nvws->channel->vram->handle, nv40->nvws->channel->gart->handle); so_method(so, nv40->screen->curie, NV40TCL_COLOR3_OFFSET, 1); - so_reloc (so, rt[3]->buffer, rt[3]->offset, rt_flags | + so_reloc (so, nv40_surface_buffer(rt[3]), rt[3]->offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); so_method(so, nv40->screen->curie, NV40TCL_COLOR3_PITCH, 1); so_data (so, rt[3]->stride); @@ -117,11 +124,11 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40) if (zeta_format) { so_method(so, nv40->screen->curie, NV40TCL_DMA_ZETA, 1); - so_reloc (so, zeta->buffer, 0, rt_flags | NOUVEAU_BO_OR, + so_reloc (so, nv40_surface_buffer(zeta), 0, rt_flags | NOUVEAU_BO_OR, nv40->nvws->channel->vram->handle, nv40->nvws->channel->gart->handle); so_method(so, nv40->screen->curie, NV40TCL_ZETA_OFFSET, 1); - so_reloc (so, zeta->buffer, zeta->offset, rt_flags | + so_reloc (so, nv40_surface_buffer(zeta), zeta->offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); so_method(so, nv40->screen->curie, NV40TCL_ZETA_PITCH, 1); so_data (so, zeta->stride); diff --git a/src/gallium/drivers/nv50/nv50_context.h b/src/gallium/drivers/nv50/nv50_context.h index 061a4c064b..6c9e18429a 100644 --- a/src/gallium/drivers/nv50/nv50_context.h +++ b/src/gallium/drivers/nv50/nv50_context.h @@ -99,6 +99,13 @@ nv50_surface(struct pipe_surface *pt) return (struct nv50_surface *)pt; } +static INLINE struct pipe_buffer * +nv50_surface_buffer(struct pipe_surface *surface) +{ + struct nv50_miptree *mt = (struct nv50_miptree *)surface->texture; + return mt->buffer; +} + struct nv50_state { unsigned dirty; diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c index 7770fcc3f2..c6e65c9816 100644 --- a/src/gallium/drivers/nv50/nv50_miptree.c +++ b/src/gallium/drivers/nv50/nv50_miptree.c @@ -179,7 +179,7 @@ nv50_miptree_sync(struct pipe_screen *pscreen, struct nv50_miptree *mt, } /* The reverse of the above */ -void +static void nv50_miptree_sync_cpu(struct pipe_screen *pscreen, struct nv50_miptree *mt, unsigned level, unsigned image) { @@ -232,7 +232,6 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!ps) return NULL; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(pscreen, &ps->buffer, mt->buffer); ps->format = pt->format; ps->width = pt->width[level]; ps->height = pt->height[level]; @@ -253,7 +252,6 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ps->offset = 0; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(pscreen, &ps->buffer, lvl->image[img]); if (flags & PIPE_BUFFER_USAGE_CPU_WRITE) mark_dirty(lvl->image_dirty_cpu, img); @@ -262,7 +260,6 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ps->offset = lvl->image_offset[img]; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(pscreen, &ps->buffer, mt->buffer); if (flags & PIPE_BUFFER_USAGE_GPU_WRITE) mark_dirty(lvl->image_dirty_gpu, img); @@ -282,7 +279,6 @@ nv50_miptree_surface_del(struct pipe_screen *pscreen, if (--ps->refcount <= 0) { pipe_texture_reference(&ps->texture, NULL); - pipe_buffer_reference(pscreen, &ps->buffer, NULL); FREE(s); } } diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c index 7686f746eb..b902c8cf53 100644 --- a/src/gallium/drivers/nv50/nv50_program.c +++ b/src/gallium/drivers/nv50/nv50_program.c @@ -970,7 +970,7 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok) } for (i = 0; i < inst->Instruction.NumSrcRegs; i++) { - struct tgsi_full_src_register *fs = &inst->FullSrcRegisters[i]; + const struct tgsi_full_src_register *fs = &inst->FullSrcRegisters[i]; if (fs->SrcRegister.File == TGSI_FILE_SAMPLER) unit = fs->SrcRegister.Index; diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c index 4dc4c04493..602d76ac74 100644 --- a/src/gallium/drivers/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nv50/nv50_state_validate.c @@ -46,9 +46,9 @@ nv50_state_validate_fb(struct nv50_context *nv50) so_data (so, fb->cbufs[i]->height); so_method(so, tesla, NV50TCL_RT_ADDRESS_HIGH(i), 5); - so_reloc (so, fb->cbufs[i]->buffer, fb->cbufs[i]->offset, + so_reloc (so, nv50_surface_buffer(fb->cbufs[i]), fb->cbufs[i]->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, fb->cbufs[i]->buffer, fb->cbufs[i]->offset, + so_reloc (so, nv50_surface_buffer(fb->cbufs[i]), fb->cbufs[i]->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW, 0, 0); switch (fb->cbufs[i]->format) { case PIPE_FORMAT_A8R8G8B8_UNORM: @@ -81,9 +81,9 @@ nv50_state_validate_fb(struct nv50_context *nv50) } so_method(so, tesla, NV50TCL_ZETA_ADDRESS_HIGH, 5); - so_reloc (so, fb->zsbuf->buffer, fb->zsbuf->offset, + so_reloc (so, nv50_surface_buffer(fb->zsbuf), fb->zsbuf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, fb->zsbuf->buffer, fb->zsbuf->offset, + so_reloc (so, nv50_surface_buffer(fb->zsbuf), fb->zsbuf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW, 0, 0); switch (fb->zsbuf->format) { case PIPE_FORMAT_Z24S8_UNORM: diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c index ed6602ba36..8ebbc84817 100644 --- a/src/gallium/drivers/nv50/nv50_surface.c +++ b/src/gallium/drivers/nv50/nv50_surface.c @@ -65,7 +65,7 @@ nv50_surface_map(struct pipe_screen *screen, struct pipe_surface *ps, { struct pipe_winsys *ws = screen->winsys; - return ws->buffer_map(ws, ps->buffer, flags); + return ws->buffer_map(ws, nv50_surface_buffer(ps), flags); } static void @@ -73,7 +73,7 @@ nv50_surface_unmap(struct pipe_screen *pscreen, struct pipe_surface *ps) { struct pipe_winsys *ws = pscreen->winsys; - ws->buffer_unmap(ws, ps->buffer); + ws->buffer_unmap(ws, nv50_surface_buffer(ps)); } void diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c index 5952378152..7af8398193 100644 --- a/src/gallium/drivers/softpipe/sp_texture.c +++ b/src/gallium/drivers/softpipe/sp_texture.c @@ -211,11 +211,9 @@ softpipe_get_tex_surface(struct pipe_screen *screen, assert(level <= pt->last_level); ps = CALLOC_STRUCT(pipe_surface); - ps->refcount = 1; if (ps) { - assert(ps->refcount); + ps->refcount = 1; pipe_texture_reference(&ps->texture, pt); - pipe_buffer_reference(screen, &ps->buffer, spt->buffer); ps->format = pt->format; ps->block = pt->block; ps->width = pt->width[level]; @@ -225,7 +223,7 @@ softpipe_get_tex_surface(struct pipe_screen *screen, ps->stride = spt->stride[level]; ps->offset = spt->level_offset[level]; ps->usage = usage; - + /* Because we are softpipe, anything that the state tracker * thought was going to be done with the GPU will actually get * done with the CPU. Let's adjust the flags to take that into @@ -274,8 +272,7 @@ softpipe_tex_surface_release(struct pipe_screen *screen, */ assert ((*s)->texture); if (--surf->refcount == 0) { - pipe_texture_reference(&surf->texture, NULL); - pipe_buffer_reference(screen, &surf->buffer, NULL); + pipe_texture_reference(&surf->texture, NULL); FREE(surf); } *s = NULL; @@ -288,13 +285,16 @@ softpipe_surface_map( struct pipe_screen *screen, unsigned flags ) { ubyte *map; + struct softpipe_texture *spt; if (flags & ~surface->usage) { assert(0); return NULL; } - map = pipe_buffer_map( screen, surface->buffer, flags ); + assert(surface->texture); + spt = softpipe_texture(surface->texture); + map = pipe_buffer_map(screen, spt->buffer, flags); if (map == NULL) return NULL; @@ -318,7 +318,12 @@ static void softpipe_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface) { - pipe_buffer_unmap( screen, surface->buffer ); + struct softpipe_texture *spt; + + assert(surface->texture); + spt = softpipe_texture(surface->texture); + + pipe_buffer_unmap( screen, spt->buffer ); } diff --git a/src/gallium/drivers/softpipe/sp_tile_cache.c b/src/gallium/drivers/softpipe/sp_tile_cache.c index 78b0efa46d..ab76009375 100644 --- a/src/gallium/drivers/softpipe/sp_tile_cache.c +++ b/src/gallium/drivers/softpipe/sp_tile_cache.c @@ -369,7 +369,7 @@ sp_flush_tile_cache(struct softpipe_context *softpipe, struct pipe_surface *ps = tc->surface; int inuse = 0, pos; - if (ps && ps->buffer) { + if (ps) { /* caching a drawing surface */ for (pos = 0; pos < NUM_ENTRIES; pos++) { struct softpipe_cached_tile *tile = tc->entries + pos; diff --git a/src/gallium/drivers/trace/tr_state.c b/src/gallium/drivers/trace/tr_state.c index b23ccc1a3d..524f2d6194 100644 --- a/src/gallium/drivers/trace/tr_state.c +++ b/src/gallium/drivers/trace/tr_state.c @@ -397,7 +397,6 @@ void trace_dump_surface(const struct pipe_surface *state) trace_dump_struct_begin("pipe_surface"); - trace_dump_member(ptr, state, buffer); trace_dump_member(format, state, format); trace_dump_member(uint, state, status); trace_dump_member(uint, state, clear_value); diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h index 13fa9ba848..dd0dfac238 100644 --- a/src/gallium/include/pipe/p_state.h +++ b/src/gallium/include/pipe/p_state.h @@ -276,7 +276,6 @@ struct pipe_sampler_state */ struct pipe_surface { - struct pipe_buffer *buffer; /**< surface's buffer/memory */ enum pipe_format format; /**< PIPE_FORMAT_x */ unsigned status; /**< PIPE_SURFACE_STATUS_x */ unsigned clear_value; /**< XXX may be temporary */ diff --git a/src/gallium/winsys/egl_xlib/egl_xlib.c b/src/gallium/winsys/egl_xlib/egl_xlib.c index 4876339107..c6b0e3d8c5 100644 --- a/src/gallium/winsys/egl_xlib/egl_xlib.c +++ b/src/gallium/winsys/egl_xlib/egl_xlib.c @@ -41,6 +41,7 @@ #include "pipe/internal/p_winsys_screen.h" #include "util/u_memory.h" #include "softpipe/sp_winsys.h" +#include "softpipe/sp_texture.h" #include "eglconfig.h" #include "eglconfigutil.h" @@ -292,7 +293,7 @@ display_surface(struct pipe_winsys *pws, assert(ximage->format); assert(ximage->bitmap_unit); - data = pws->buffer_map(pws, psurf->buffer, 0); + data = pws->buffer_map(pws, softpipe_texture(psurf->texture)->buffer, 0); /* update XImage's fields */ ximage->data = data; @@ -308,7 +309,7 @@ display_surface(struct pipe_winsys *pws, ximage->data = NULL; XDestroyImage(ximage); - pws->buffer_unmap(pws, psurf->buffer); + pws->buffer_unmap(pws, softpipe_texture(psurf->texture)->buffer); } diff --git a/src/gallium/winsys/xlib/Makefile b/src/gallium/winsys/xlib/Makefile index 5b71e6dc38..8c2892d49b 100644 --- a/src/gallium/winsys/xlib/Makefile +++ b/src/gallium/winsys/xlib/Makefile @@ -22,11 +22,11 @@ INCLUDE_DIRS = \ -I$(TOP)/src/gallium/state_trackers/glx/xlib \ -I$(TOP)/src/gallium/auxiliary -DEFINES = \ +DEFINES += \ -DGALLIUM_SOFTPIPE \ - -DGALLIUM_CELL \ -DGALLIUM_TRACE \ -DGALLIUM_BRW +#-DGALLIUM_CELL will be defined by the config */ XLIB_WINSYS_SOURCES = \ xlib.c \ diff --git a/src/gallium/winsys/xlib/xlib_brw_screen.c b/src/gallium/winsys/xlib/xlib_brw_screen.c index 5344c502ef..51740a9af6 100644 --- a/src/gallium/winsys/xlib/xlib_brw_screen.c +++ b/src/gallium/winsys/xlib/xlib_brw_screen.c @@ -42,12 +42,19 @@ #include "util/u_memory.h" #include "i965simple/brw_winsys.h" #include "i965simple/brw_screen.h" +#include "i965simple/brw_context.h" + #include "xlib_brw_aub.h" #include "xlib_brw.h" #include "xlib.h" - +static struct pipe_buffer * +buffer_from_surface(struct pipe_surface *surface) +{ + struct brw_texture *texture = (struct brw_texture *)surface; + return texture->buffer; +} struct aub_buffer { char *data; @@ -226,7 +233,7 @@ aub_flush_frontbuffer( struct pipe_winsys *winsys, // struct aub_pipe_winsys *iws = aub_pipe_winsys(winsys); brw_aub_dump_bmp( global_winsys->aubfile, surface, - aub_bo(surface->buffer)->offset ); + aub_bo(buffer_from_surface(surface))->offset ); } @@ -449,7 +456,7 @@ xlib_brw_display_surface(struct xmesa_buffer *b, { brw_aub_dump_bmp( global_winsys->aubfile, surf, - aub_bo(surf->buffer)->offset ); + aub_bo(buffer_from_surface(surf))->offset ); } diff --git a/src/gallium/winsys/xlib/xlib_cell.c b/src/gallium/winsys/xlib/xlib_cell.c index bf69593c5c..c87564f4dc 100644 --- a/src/gallium/winsys/xlib/xlib_cell.c +++ b/src/gallium/winsys/xlib/xlib_cell.c @@ -51,6 +51,7 @@ #include "cell/ppu/cell_context.h" #include "cell/ppu/cell_screen.h" #include "cell/ppu/cell_winsys.h" +#include "cell/ppu/cell_texture.h" /** @@ -164,7 +165,8 @@ static void xlib_cell_display_surface(struct xmesa_buffer *b, struct pipe_surface *surf) { XImage *ximage; - struct xm_buffer *xm_buf = xm_buffer(surf->buffer); + struct xm_buffer *xm_buf = xm_buffer( + cell_texture(surf->texture)->buffer); const uint tilesPerRow = (surf->width + TILE_SIZE - 1) / TILE_SIZE; uint x, y; diff --git a/src/gallium/winsys/xlib/xlib_softpipe.c b/src/gallium/winsys/xlib/xlib_softpipe.c index 01d24584e2..586e1dfca5 100644 --- a/src/gallium/winsys/xlib/xlib_softpipe.c +++ b/src/gallium/winsys/xlib/xlib_softpipe.c @@ -45,6 +45,7 @@ #include "util/u_math.h" #include "util/u_memory.h" #include "softpipe/sp_winsys.h" +#include "softpipe/sp_texture.h" #include "xlib.h" @@ -58,7 +59,7 @@ struct xm_buffer boolean userBuffer; /** Is this a user-space buffer? */ void *data; void *mapped; - + XImage *tempImage; int shm; XShmSegmentInfo shminfo; @@ -225,11 +226,12 @@ xm_buffer_destroy(struct pipe_winsys *pws, * by the XMesaBuffer. */ static void -xlib_softpipe_display_surface(struct xmesa_buffer *b, +xlib_softpipe_display_surface(struct xmesa_buffer *b, struct pipe_surface *surf) { XImage *ximage; - struct xm_buffer *xm_buf = xm_buffer(surf->buffer); + struct xm_buffer *xm_buf = xm_buffer( + softpipe_texture(surf->texture)->buffer); static boolean no_swap = 0; static boolean firsttime = 1; diff --git a/src/mesa/state_tracker/st_cb_fbo.c b/src/mesa/state_tracker/st_cb_fbo.c index d18946de7d..963ac902d2 100644 --- a/src/mesa/state_tracker/st_cb_fbo.c +++ b/src/mesa/state_tracker/st_cb_fbo.c @@ -171,7 +171,6 @@ st_renderbuffer_alloc_storage(GLcontext * ctx, struct gl_renderbuffer *rb, surface_usage ); assert(strb->surface->texture); - assert(strb->surface->buffer); assert(strb->surface->format); assert(strb->surface->block.size); assert(strb->surface->block.width); diff --git a/src/mesa/state_tracker/st_gen_mipmap.c b/src/mesa/state_tracker/st_gen_mipmap.c index 9e5c35072a..6a3455aaba 100644 --- a/src/mesa/state_tracker/st_gen_mipmap.c +++ b/src/mesa/state_tracker/st_gen_mipmap.c @@ -128,11 +128,11 @@ fallback_generate_mipmap(GLcontext *ctx, GLenum target, dstSurf = screen->get_tex_surface(screen, pt, face, dstLevel, zslice, PIPE_BUFFER_USAGE_CPU_WRITE); - srcData = (ubyte *) pipe_buffer_map(pipe->screen, srcSurf->buffer, - PIPE_BUFFER_USAGE_CPU_READ) + srcData = (ubyte *) pipe_surface_map(srcSurf, + PIPE_BUFFER_USAGE_CPU_READ) + srcSurf->offset; - dstData = (ubyte *) pipe_buffer_map(pipe->screen, dstSurf->buffer, - PIPE_BUFFER_USAGE_CPU_WRITE) + dstData = (ubyte *) pipe_surface_map(dstSurf, + PIPE_BUFFER_USAGE_CPU_WRITE) + dstSurf->offset; _mesa_generate_mipmap_level(target, datatype, comps, @@ -144,8 +144,8 @@ fallback_generate_mipmap(GLcontext *ctx, GLenum target, dstData, dstSurf->stride); /* stride in bytes */ - pipe_buffer_unmap(pipe->screen, srcSurf->buffer); - pipe_buffer_unmap(pipe->screen, dstSurf->buffer); + pipe_surface_unmap(srcSurf); + pipe_surface_unmap(dstSurf); pipe_surface_reference(&srcSurf, NULL); pipe_surface_reference(&dstSurf, NULL); -- cgit v1.2.3