From d673c92810636dcc6de33d3618d494ce9f5717c1 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Sat, 20 Feb 2010 18:34:00 +0100 Subject: nouveau: s/rankine/eng3d/g; s/curie/eng3d/g Result of running: perl -i -p -e 's/rankine/eng3d/g; s/curie/eng3d/g;' nv[34]0/*.[ch] This will allow to more easily unify nv30 and nv40. --- src/gallium/drivers/nv30/nv30_state_fb.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) (limited to 'src/gallium/drivers/nv30/nv30_state_fb.c') diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c b/src/gallium/drivers/nv30/nv30_state_fb.c index f7fe9833c7..23d17c0c60 100644 --- a/src/gallium/drivers/nv30/nv30_state_fb.c +++ b/src/gallium/drivers/nv30/nv30_state_fb.c @@ -6,7 +6,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) { struct pipe_framebuffer_state *fb = &nv30->framebuffer; struct nouveau_channel *chan = nv30->screen->base.channel; - struct nouveau_grobj *rankine = nv30->screen->rankine; + struct nouveau_grobj *eng3d = nv30->screen->eng3d; struct nv04_surface *rt[2], *zeta = NULL; uint32_t rt_enable = 0, rt_format = 0; int i, colour_format = 0, zeta_format = 0, depth_only = 0; @@ -110,10 +110,10 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) } nv30mt = (struct nv30_miptree *) rt0->base.texture; - so_method(so, rankine, NV34TCL_DMA_COLOR0, 1); + so_method(so, eng3d, NV34TCL_DMA_COLOR0, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, rankine, NV34TCL_COLOR0_PITCH, 2); + so_method(so, eng3d, NV34TCL_COLOR0_PITCH, 2); so_data (so, pitch); so_reloc (so, nouveau_bo(nv30mt->buffer), rt0->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); @@ -121,10 +121,10 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) { nv30mt = (struct nv30_miptree *)rt[1]->base.texture; - so_method(so, rankine, NV34TCL_DMA_COLOR1, 1); + so_method(so, eng3d, NV34TCL_DMA_COLOR1, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, rankine, NV34TCL_COLOR1_OFFSET, 2); + so_method(so, eng3d, NV34TCL_COLOR1_OFFSET, 2); so_reloc (so, nouveau_bo(nv30mt->buffer), rt[1]->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); so_data (so, rt[1]->pitch); @@ -132,31 +132,31 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30) if (zeta_format) { nv30mt = (struct nv30_miptree *)zeta->base.texture; - so_method(so, rankine, NV34TCL_DMA_ZETA, 1); + so_method(so, eng3d, NV34TCL_DMA_ZETA, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, chan->vram->handle, chan->gart->handle); - so_method(so, rankine, NV34TCL_ZETA_OFFSET, 1); + so_method(so, eng3d, NV34TCL_ZETA_OFFSET, 1); so_reloc (so, nouveau_bo(nv30mt->buffer), zeta->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); /* TODO: allocate LMA depth buffer */ } - so_method(so, rankine, NV34TCL_RT_ENABLE, 1); + so_method(so, eng3d, NV34TCL_RT_ENABLE, 1); so_data (so, rt_enable); - so_method(so, rankine, NV34TCL_RT_HORIZ, 3); + so_method(so, eng3d, NV34TCL_RT_HORIZ, 3); so_data (so, (w << 16) | 0); so_data (so, (h << 16) | 0); so_data (so, rt_format); - so_method(so, rankine, NV34TCL_VIEWPORT_HORIZ, 2); + so_method(so, eng3d, NV34TCL_VIEWPORT_HORIZ, 2); so_data (so, (w << 16) | 0); so_data (so, (h << 16) | 0); - so_method(so, rankine, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); + so_method(so, eng3d, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); so_data (so, ((w - 1) << 16) | 0); so_data (so, ((h - 1) << 16) | 0); - so_method(so, rankine, 0x1d88, 1); + so_method(so, eng3d, 0x1d88, 1); so_data (so, (1 << 12) | h); /* Wonder why this is needed, context should all be set to zero on init */ - so_method(so, rankine, NV34TCL_VIEWPORT_TX_ORIGIN, 1); + so_method(so, eng3d, NV34TCL_VIEWPORT_TX_ORIGIN, 1); so_data (so, 0); so_ref(so, &nv30->state.hw[NV30_STATE_FB]); -- cgit v1.2.3