From ed232adc80867a424978396e047f146cb94a1cc5 Mon Sep 17 00:00:00 2001 From: Luca Barbieri Date: Thu, 19 Aug 2010 12:58:14 +0200 Subject: nvfx: fix GPU hardlocks when depth buffer is absent --- src/gallium/drivers/nvfx/nvfx_context.h | 2 +- src/gallium/drivers/nvfx/nvfx_state.c | 4 +--- src/gallium/drivers/nvfx/nvfx_state_emit.c | 10 +++++++++- src/gallium/drivers/nvfx/nvfx_state_fb.c | 4 ++++ 4 files changed, 15 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/nvfx') diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h index 2eec5a11a6..04447da3e1 100644 --- a/src/gallium/drivers/nvfx/nvfx_context.h +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -56,7 +56,7 @@ struct nvfx_rasterizer_state { struct nvfx_zsa_state { struct pipe_depth_stencil_alpha_state pipe; unsigned sb_len; - uint32_t sb[26]; + uint32_t sb[24]; }; struct nvfx_blend_state { diff --git a/src/gallium/drivers/nvfx/nvfx_state.c b/src/gallium/drivers/nvfx/nvfx_state.c index f529fb2a27..c8431641d3 100644 --- a/src/gallium/drivers/nvfx/nvfx_state.c +++ b/src/gallium/drivers/nvfx/nvfx_state.c @@ -207,10 +207,8 @@ nvfx_depth_stencil_alpha_state_create(struct pipe_context *pipe, struct nvfx_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); struct nouveau_statebuf_builder sb = sb_init(zsaso->sb); - sb_method(sb, NV34TCL_DEPTH_FUNC, 3); + sb_method(sb, NV34TCL_DEPTH_FUNC, 1); sb_data (sb, nvgl_comparison_op(cso->depth.func)); - sb_data (sb, cso->depth.writemask ? 1 : 0); - sb_data (sb, cso->depth.enabled ? 1 : 0); sb_method(sb, NV34TCL_ALPHA_FUNC_ENABLE, 3); sb_data (sb, cso->alpha.enabled ? 1 : 0); diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c index 7a706ea6d7..19512194be 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_emit.c +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -113,11 +113,19 @@ nvfx_state_validate_common(struct nvfx_context *nvfx) etracer, neverball, foobillard, glest totally misrender TODO: find the right fix */ - if(dirty & (NVFX_NEW_VIEWPORT | NVFX_NEW_RAST | NVFX_NEW_ZSA) || (all_swizzled > 0)) + if(dirty & (NVFX_NEW_VIEWPORT | NVFX_NEW_RAST | NVFX_NEW_ZSA) || (all_swizzled >= 0)) { nvfx_state_viewport_validate(nvfx); } + if(dirty & NVFX_NEW_ZSA || (all_swizzled >= 0)) + { + WAIT_RING(chan, 3); + OUT_RING(chan, RING_3D(NV34TCL_DEPTH_WRITE_ENABLE, 2)); + OUT_RING(chan, nvfx->framebuffer.zsbuf && nvfx->zsa->pipe.depth.writemask); + OUT_RING(chan, nvfx->framebuffer.zsbuf && nvfx->zsa->pipe.depth.enabled); + } + if(flush_tex_cache) { // TODO: what about nv30? diff --git a/src/gallium/drivers/nvfx/nvfx_state_fb.c b/src/gallium/drivers/nvfx/nvfx_state_fb.c index 28bbd36c2e..3db9cec905 100644 --- a/src/gallium/drivers/nvfx/nvfx_state_fb.c +++ b/src/gallium/drivers/nvfx/nvfx_state_fb.c @@ -252,6 +252,10 @@ nvfx_framebuffer_validate(struct nvfx_context *nvfx, unsigned prepare_result) OUT_RING(chan, nvfx->hw_zeta.pitch); } } + else if(nvfx->is_nv4x) { + OUT_RING(chan, RING_3D(NV40TCL_ZETA_PITCH, 1)); + OUT_RING(chan, 64); + } OUT_RING(chan, RING_3D(NV34TCL_RT_ENABLE, 1)); OUT_RING(chan, rt_enable); -- cgit v1.2.3