From b1776eb14471e7a4d09d3c8a73f02b19b106883b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 04:48:30 -0800 Subject: gallium-r300: Add r300_surface. Todo: - Hook up surface functions. - Take it for a spin and watch it crash 'n' burn. --- src/gallium/drivers/r300/r300_surface.c | 53 +++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 src/gallium/drivers/r300/r300_surface.c (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c new file mode 100644 index 0000000000..4aa469b97e --- /dev/null +++ b/src/gallium/drivers/r300/r300_surface.c @@ -0,0 +1,53 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_surface.h" + +/* Provides pipe_context's "surface_fill". */ +static void r300_surface_fill(struct pipe_context* context, + struct pipe_surface* dest, + unsigned x, unsigned y, + unsigned w, unsigned h, + unsigned color) +{ + /* Try accelerated fill first. */ + if (!r300_fill_blit(r300_context(context), + dest->block.size, + (short)dest->stride, + dest->buffer, + dest->offset, + (short)x, (short)y, + (short)w, (short)h, + color)) + { + /* Fallback. */ + void* dest_map = context->screen->surface_map(context->screen, dest, + PIPE_BUFFER_USAGE_CPU_WRITE); + pipe_fill_rect(dest_map, &dest->block, dest->stride, x, y, w, h, color); + context->screen->surface_unmap(context->screen, dest); + } +} + +void r300_init_surface_functions(struct r300_context* r300) +{ + r300->context.surface_fill = r300_surface_fill; +} -- cgit v1.2.3 From 22877265f4fdf66c75df391d6de95bd5c1584ea3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 21 Jan 2009 02:21:09 -0800 Subject: [BROKEN] r300: Add initial clear/fill code. Copied from mesa and still broken. Gimme a few to clean it up. --- src/gallium/drivers/r300/r300_cs.h | 24 ++- src/gallium/drivers/r300/r300_surface.c | 357 ++++++++++++++++++++++++++++++-- src/gallium/drivers/r300/r300_surface.h | 2 +- 3 files changed, 364 insertions(+), 19 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 3dacf25380..59ca985f40 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -26,6 +26,18 @@ #include "r300_reg.h" #include "r300_winsys.h" +/* Pack a 32-bit float into a dword. */ +static uint32_t pack_float_32(float f) +{ + union { + float f; + uint32_t u; + } u; + + u.f = f; + return u.u; +} + /* Yes, I know macros are ugly. However, they are much prettier than the code * that they neatly hide away, and don't have the cost of function setup,so * we're going to use them. */ @@ -47,7 +59,6 @@ struct r300_winsys* cs_winsys = context->winsys; \ struct radeon_cs* cs = cs_winsys->cs - #define CHECK_CS(size) \ cs_winsys->check_cs(cs, (size)) @@ -59,10 +70,19 @@ #define OUT_CS(value) \ cs_winsys->write_cs_dword(cs, value) +#define OUT_CS_32F(value) \ + cs_winsys->write_cs_dword(cs, pack_float_32(value)) + #define OUT_CS_REG(register, value) do { \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); } while (0) +/* Note: This expects count to be the number of registers, + * not the actual packet0 count! */ +#define OUT_CS_REG_SEQ(register, count) do { \ + OUT_CS(CP_PACKET0(register, ((count) - 1))); \ +} while (0) + #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ @@ -74,4 +94,4 @@ #define FLUSH_CS \ cs_winsys->flush_cs(cs) -#endif /* R300_CS_H */ \ No newline at end of file +#endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 4aa469b97e..60efe78c0b 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -22,29 +22,354 @@ #include "r300_surface.h" -/* Provides pipe_context's "surface_fill". */ -static void r300_surface_fill(struct pipe_context* context, +/* Provides pipe_context's "surface_fill". Commonly used for clearing + * buffers. */ +static void r300_surface_fill(struct pipe_context* pipe, struct pipe_surface* dest, unsigned x, unsigned y, unsigned w, unsigned h, unsigned color) { - /* Try accelerated fill first. */ - if (!r300_fill_blit(r300_context(context), - dest->block.size, - (short)dest->stride, - dest->buffer, - dest->offset, - (short)x, (short)y, - (short)w, (short)h, - color)) + struct r300_context* context = r300_context(pipe); + CS_LOCALS(context); + boolean has_tcl = FALSE; + boolean is_r500 = FALSE; + /* Emit a shitload of state, and then draw a point to clear the buffer. + * XXX it goes without saying that this needs to be cleaned up and + * shifted around to work with the rest of the driver's state handling. + */ + /* Sequence starting at R300_VAP_PROG_STREAM_CNTL_0 */ + OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 1); + if (has_tcl) { + OUT_CS(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_0_SHIFT) | ((R300_LAST_VEC | (1 << + R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_1_SHIFT))); + } else { + OUT_CS(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_0_SHIFT) | ((R300_LAST_VEC | (2 << + R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_1_SHIFT))); + } + + /* Disable fog */ + OUT_CS_REG(R300_FG_FOG_BLEND, 0); + OUT_CS_REG(R300_FG_ALPHA_FUNC, 0); + + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, + ((((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | + (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | + (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | + (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | + ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | + R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << + R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE0_SHIFT) | + (((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | + (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | + (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | + (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | + ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | + R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << + R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE1_SHIFT))); + /* R300_VAP_INPUT_CNTL_0, R300_VAP_INPUT_CNTL_1 */ + OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2); + OUT_CS((R300_SEL_USER_COLOR_0 << R300_COLOR_0_ASSEMBLY_SHIFT)); + OUT_CS(R300_INPUT_CNTL_POS | R300_INPUT_CNTL_COLOR | R300_INPUT_CNTL_TC0); + + /* comes from fglrx startup of clear */ + OUT_CS_REG_SEQ(R300_SE_VTE_CNTL, 2); + OUT_CS(R300_VTX_W0_FMT | R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | + R300_VPORT_Z_OFFSET_ENA); + OUT_CS(0x8); + + OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xaaaaaaaa); + + OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); + OUT_CS(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | + R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT); + OUT_CS(0); /* no textures */ + + OUT_CS_REG(R300_TX_ENABLE, 0); + + OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); + OUT_CS_32F(1.0); + OUT_CS_32F(x); + OUT_CS_32F(1.0); + OUT_CS_32F(y); + OUT_CS_32F(1.0); + OUT_CS_32F(0.0); + + OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); + OUT_CS(0x0); + OUT_CS(0x0); + + OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_PS_UCP_MODE_CLIP_AS_TRIFAN | R300_CLIP_DISABLE); + + OUT_CS_REG(R300_GA_POINT_SIZE, ((w * 6) << R300_POINTSIZE_X_SHIFT) | + ((h * 6) << R300_POINTSIZE_Y_SHIFT)); + + if (is_r500) { + OUT_CS_REG_SEQ(R500_RS_IP_0, 8); + for (i = 0; i < 8; ++i) { + OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | + (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); + } + + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + /* XXX could hires be disabled for a speed boost? */ + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x0); + + OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); + } else { + OUT_CS_REG(R300_RS_IP_0, 8); + for (i = 0; i < 8; ++i) { + OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); + } + + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + /* XXX could hires be disabled for a speed boost? */ + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x0); + + OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); + } + + if (is_r500) { + OUT_CS_REG_SEQ(R500_US_CONFIG, 2); + OUT_CS(R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); + OUT_CS(0x0); + OUT_CS_REG_SEQ(R500_US_CODE_ADDR, 3); + OUT_CS(R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(1)); + OUT_CS(R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(1)); + OUT_CS(R500_US_CODE_OFFSET_ADDR(0)); + + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, 0x0); + + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | + R500_INST_LAST | + R500_INST_RGB_OMASK_R | + R500_INST_RGB_OMASK_G | + R500_INST_RGB_OMASK_B | + R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | + R500_INST_ALPHA_CLAMP); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_RGB_ADDR0(0) | + R500_RGB_ADDR1(0) | + R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | + R500_RGB_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_ADDR0(0) | + R500_ALPHA_ADDR1(0) | + R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | + R500_ALPHA_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGB_SEL_A_SRC0 | + R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | + R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | + R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | + R500_ALU_RGB_G_SWIZ_B_B); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_OP_CMP | + R500_ALPHA_SWIZ_A_A | + R500_ALPHA_SWIZ_B_A); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGBA_OP_CMP | + R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | + R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0); + + } else { + OUT_CS_REG_SEQ(R300_US_CONFIG, 3); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS_REG_SEQ(R300_US_CODE_ADDR_0, 4); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(R300_RGBA_OUT); + + OUT_CS_REG(R300_US_ALU_RGB_INST_0, + FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO))); + OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, + FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0)); + OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, + FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO))); + OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, + FP_SELA(0, NO, W, FP_TMP(0), 0, 0)); + } + + /* XXX */ + uint32_t vap_cntl; + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); + if (has_tcl) { + vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) | + (5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (12 << R300_VF_MAX_VTX_NUM_SHIFT)); + if (CHIP_FAMILY_RV515) + vap_cntl |= R500_TCL_STATE_OPTIMIZATION; + } else { + vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) | + (5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (5 << R300_VF_MAX_VTX_NUM_SHIFT)); + } + + if (CHIP_FAMILY_RV515) + vap_cntl |= (2 << R300_PVS_NUM_FPUS_SHIFT); + else if ((CHIP_FAMILY_RV530) || + (CHIP_FAMILY_RV560) || + (CHIP_FAMILY_RV570)) + vap_cntl |= (5 << R300_PVS_NUM_FPUS_SHIFT); + else if ((CHIP_FAMILY_RV410) || + (CHIP_FAMILY_R420)) + vap_cntl |= (6 << R300_PVS_NUM_FPUS_SHIFT); + else if ((CHIP_FAMILY_R520) || + (CHIP_FAMILY_R580)) + vap_cntl |= (8 << R300_PVS_NUM_FPUS_SHIFT); + else + vap_cntl |= (4 << R300_PVS_NUM_FPUS_SHIFT); + + OUT_CS_REG(R300_VAP_CNTL, vap_cntl); + + if (has_tcl) { + OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3); + OUT_CS((0 << R300_PVS_FIRST_INST_SHIFT) | + (0 << R300_PVS_XYZW_VALID_INST_SHIFT) | + (1 << R300_PVS_LAST_INST_SHIFT)); + OUT_CS((0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) | + (0 << R300_PVS_MAX_CONST_ADDR_SHIFT)); + OUT_CS(1 << R300_PVS_LAST_VTX_SRC_INST_SHIFT); + + OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 28)); + OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_ADDRESS, 0x0); + + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, + 0, 0xf, PVS_DST_REG_OUT)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(0, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, + PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, + PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(0, PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 1, 0xf, + PVS_DST_REG_OUT)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(1, PVS_SRC_SELECT_X, + PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, + PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, + VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(1, PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + } + /* Do the actual emit. */ + if (rrb) { + cbpitch = (rrb->pitch / rrb->cpp); + if (rrb->cpp == 4) + cbpitch |= R300_COLOR_FORMAT_ARGB8888; + else + cbpitch |= R300_COLOR_FORMAT_RGB565; + + if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ + cbpitch |= R300_COLOR_TILE_ENABLE; + } + } + + /* TODO in bufmgr */ + cp_wait(r300, R300_WAIT_3D | R300_WAIT_3D_CLEAN); + end_3d(rmesa); + + if (flags & CLEARBUFFER_COLOR) { + assert(rrb != 0); + BEGIN_BATCH_NO_AUTOSTATE(4); + OUT_BATCH_REGSEQ(R300_RB3D_COLOROFFSET0, 1); + OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_BATCH_REGVAL(R300_RB3D_COLORPITCH0, cbpitch); + END_BATCH(); + } +#if 0 + if (flags & (CLEARBUFFER_DEPTH | CLEARBUFFER_STENCIL)) { + assert(rrbd != 0); + cbpitch = (rrbd->pitch / rrbd->cpp); + if (rrbd->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ + cbpitch |= R300_DEPTHMACROTILE_ENABLE; + } + if (rrbd->bo->flags & RADEON_BO_FLAGS_MICRO_TILE){ + cbpitch |= R300_DEPTHMICROTILE_TILED; + } + BEGIN_BATCH_NO_AUTOSTATE(4); + OUT_BATCH_REGSEQ(R300_ZB_DEPTHOFFSET, 1); + OUT_BATCH_RELOC(0, rrbd->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_BATCH_REGVAL(R300_ZB_DEPTHPITCH, cbpitch); + END_BATCH(); + } + { - /* Fallback. */ - void* dest_map = context->screen->surface_map(context->screen, dest, - PIPE_BUFFER_USAGE_CPU_WRITE); - pipe_fill_rect(dest_map, &dest->block, dest->stride, x, y, w, h, color); - context->screen->surface_unmap(context->screen, dest); + uint32_t t1, t2; + + t1 = 0x0; + t2 = 0x0; + + if (flags & CLEARBUFFER_DEPTH) { + t1 |= R300_Z_ENABLE | R300_Z_WRITE_ENABLE; + t2 |= + (R300_ZS_ALWAYS << R300_Z_FUNC_SHIFT); + } + + if (flags & CLEARBUFFER_STENCIL) { + t1 |= R300_STENCIL_ENABLE; + t2 |= + (R300_ZS_ALWAYS << + R300_S_FRONT_FUNC_SHIFT) | + (R300_ZS_REPLACE << + R300_S_FRONT_SFAIL_OP_SHIFT) | + (R300_ZS_REPLACE << + R300_S_FRONT_ZPASS_OP_SHIFT) | + (R300_ZS_REPLACE << + R300_S_FRONT_ZFAIL_OP_SHIFT); + } + + OUT_BATCH_REGSEQ(R300_ZB_CNTL, 3); + OUT_BATCH(t1); + OUT_BATCH(t2); + OUT_BATCH(((ctx->Stencil.WriteMask[0] & R300_STENCILREF_MASK) << + R300_STENCILWRITEMASK_SHIFT) | + (ctx->Stencil.Clear & R300_STENCILREF_MASK)); + END_BATCH(); } +#endif + + OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); + OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | + (1 << R300_PRIM_NUM_VERTICES_SHIFT)); + OUT_CS_32F(w / 2.0); + OUT_CS_32F(h / 2.0); + /* XXX this should be the depth value to clear to */ + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + OUT_CS_32F(color); + OUT_CS_32F(color); + OUT_CS_32F(color); + OUT_CS_32F(color); + + /* XXX cp_wait(rmesa, R300_WAIT_3D | R300_WAIT_3D_CLEAN); */ } void r300_init_surface_functions(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 0b2fd0b32b..e807edd0e3 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -28,7 +28,7 @@ #include "util/u_rect.h" -#include "r300_blit.h" #include "r300_context.h" +#include "r300_cs.h" #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 7d63ff93cbf0f342c3736f4c8fae75157a62f0ea Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 21 Jan 2009 23:12:40 -0800 Subject: r300: Unbreak build, finish clear state. Completely untested, of course. --- src/gallium/drivers/r300/r300_reg.h | 12 +++++++++ src/gallium/drivers/r300/r300_surface.c | 43 +++++++++++++-------------------- src/gallium/drivers/r300/r300_surface.h | 3 +++ 3 files changed, 32 insertions(+), 26 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 8b3fe431ab..7f4a508b1b 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -3252,6 +3252,18 @@ enum { */ #define R300_CP_CMD_BITBLT_MULTI 0xC0009B00 +/* XXX Corbin's stuff from radeon and r200 */ + +#define RADEON_WAIT_UNTIL 0x1720 +# define RADEON_WAIT_CRTC_PFLIP (1 << 0) +# define RADEON_WAIT_2D_IDLECLEAN (1 << 16) +# define RADEON_WAIT_3D_IDLECLEAN (1 << 17) +# define RADEON_WAIT_HOST_IDLECLEAN (1 << 18) + +#define RADEON_CP_PACKET3 0xC0000000 + +#define R200_3D_DRAW_IMMD_2 0xC0003500 + #endif /* _R300_REG_H */ /* *INDENT-ON* */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 60efe78c0b..8a507d56e6 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -34,6 +34,8 @@ static void r300_surface_fill(struct pipe_context* pipe, CS_LOCALS(context); boolean has_tcl = FALSE; boolean is_r500 = FALSE; + /* For the for loops. */ + int i; /* Emit a shitload of state, and then draw a point to clear the buffer. * XXX it goes without saying that this needs to be cleaned up and * shifted around to work with the rest of the driver's state handling. @@ -239,6 +241,7 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_VAP_CNTL, vap_cntl); + /* XXX unbreak this if (has_tcl) { OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3); OUT_CS((0 << R300_PVS_FIRST_INST_SHIFT) | @@ -252,7 +255,7 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 28)); OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_ADDRESS, 0x0); + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_CODE_START); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 0, 0xf, PVS_DST_REG_OUT)); @@ -278,32 +281,17 @@ static void r300_surface_fill(struct pipe_context* pipe, PVS_SRC_SELECT_FORCE_0, PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); - } - /* Do the actual emit. */ - if (rrb) { - cbpitch = (rrb->pitch / rrb->cpp); - if (rrb->cpp == 4) - cbpitch |= R300_COLOR_FORMAT_ARGB8888; - else - cbpitch |= R300_COLOR_FORMAT_RGB565; - - if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ - cbpitch |= R300_COLOR_TILE_ENABLE; - } - } + } */ /* TODO in bufmgr */ - cp_wait(r300, R300_WAIT_3D | R300_WAIT_3D_CLEAN); - end_3d(rmesa); - - if (flags & CLEARBUFFER_COLOR) { - assert(rrb != 0); - BEGIN_BATCH_NO_AUTOSTATE(4); - OUT_BATCH_REGSEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_BATCH_REGVAL(R300_RB3D_COLORPITCH0, cbpitch); - END_BATCH(); - } + /* XXX this should be split off, also figure out WTF with the numbers */ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + /* XXX might have to switch to 2D */ + + OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); + OUT_CS_RELOC(0, dest->buffer, 0, RADEON_GEM_DOMAIN_VRAM, 0); + /* XXX this needs more TLC (or TCL, as it were) */ + OUT_CS_REG(R300_RB3D_COLORPITCH0, R300_COLOR_FORMAT_ARGB8888); #if 0 if (flags & (CLEARBUFFER_DEPTH | CLEARBUFFER_STENCIL)) { assert(rrbd != 0); @@ -369,7 +357,10 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(color); OUT_CS_32F(color); - /* XXX cp_wait(rmesa, R300_WAIT_3D | R300_WAIT_3D_CLEAN); */ + /* XXX this should be split off, also figure out WTF with the numbers */ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + + FLUSH_CS; } void r300_init_surface_functions(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index e807edd0e3..2d64a95412 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -31,4 +31,7 @@ #include "r300_context.h" #include "r300_cs.h" +/* XXX integrate this into r300_reg */ +#include "r300_fragprog.h" + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 0ff7cb7c89f0c9ac4e363296e53eada008717252 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 21 Jan 2009 23:48:47 -0800 Subject: r300: Add num_vert_pipes (and remove busted num_pipes.) --- src/gallium/drivers/r300/r300_chipset.c | 39 ++++++++++++--------------------- src/gallium/drivers/r300/r300_chipset.h | 8 ++++--- src/gallium/drivers/r300/r300_cs.h | 3 +++ src/gallium/drivers/r300/r300_surface.c | 27 ++++++++--------------- 4 files changed, 31 insertions(+), 46 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 1dc9b8cf3c..b7de2359cb 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -32,6 +32,8 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) caps->pci_id = pci_id; caps->has_tcl = TRUE; caps->is_r500 = FALSE; + caps->num_vert_pipes = 4; + /* Note: These are not ordered by PCI ID. I leave that task to GCC, * which will perform the ordering while collating jump tables. Instead, @@ -39,7 +41,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) switch (pci_id) { case 0x4144: caps->family = CHIP_FAMILY_R300; - caps->num_pipes = 1; break; case 0x4145: @@ -50,7 +51,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4E46: case 0x4E47: caps->family = CHIP_FAMILY_R300; - caps->num_pipes = 2; break; case 0x4150: @@ -67,7 +67,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4E54: case 0x4E56: caps->family = CHIP_FAMILY_RV350; - caps->num_pipes = 1; break; case 0x4148: @@ -78,12 +77,10 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4E49: case 0x4E4B: caps->family = CHIP_FAMILY_R350; - caps->num_pipes = 2; break; case 0x4E4A: caps->family = CHIP_FAMILY_R360; - caps->num_pipes = 2; break; case 0x5460: @@ -95,7 +92,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5B64: case 0x5B65: caps->family = CHIP_FAMILY_RV370; - caps->num_pipes = 1; break; case 0x3150: @@ -104,7 +100,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x3E50: case 0x3E54: caps->family = CHIP_FAMILY_RV380; - caps->num_pipes = 1; break; case 0x4A48: @@ -118,7 +113,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4A50: case 0x4A54: caps->family = CHIP_FAMILY_R420; - caps->num_pipes = 4; + caps->num_vert_pipes = 6; break; case 0x5548: @@ -131,7 +126,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5554: case 0x5D57: caps->family = CHIP_FAMILY_R423; - caps->num_pipes = 4; + caps->num_vert_pipes = 6; break; case 0x554C: @@ -142,7 +137,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5D49: case 0x5D4A: caps->family = CHIP_FAMILY_R430; - caps->num_pipes = 4; + caps->num_vert_pipes = 6; break; case 0x5D4C: @@ -152,7 +147,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5D50: case 0x5D52: caps->family = CHIP_FAMILY_R480; - caps->num_pipes = 4; + caps->num_vert_pipes = 6; break; case 0x4B49: @@ -160,7 +155,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4B4B: case 0x4B4C: caps->family = CHIP_FAMILY_R481; - caps->num_pipes = 4; + caps->num_vert_pipes = 6; break; case 0x5E4C: @@ -176,41 +171,36 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5E4B: case 0x5E4D: caps->family = CHIP_FAMILY_RV410; - caps->num_pipes = 1; + caps->num_vert_pipes = 6; break; case 0x5954: case 0x5955: caps->family = CHIP_FAMILY_RS480; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; case 0x5974: case 0x5975: caps->family = CHIP_FAMILY_RS482; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; case 0x5A41: case 0x5A42: caps->family = CHIP_FAMILY_RS400; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; case 0x5A61: case 0x5A62: caps->family = CHIP_FAMILY_RC410; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; case 0x791E: case 0x791F: caps->family = CHIP_FAMILY_RS690; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; @@ -219,7 +209,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x796E: case 0x796F: caps->family = CHIP_FAMILY_RS740; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; @@ -238,7 +227,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x710E: case 0x710F: caps->family = CHIP_FAMILY_R520; - caps->num_pipes = 4; + caps->num_vert_pipes = 8; caps->is_r500 = TRUE; break; @@ -281,7 +270,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x7210: case 0x7211: caps->family = CHIP_FAMILY_RV515; - caps->num_pipes = 1; + caps->num_vert_pipes = 2; caps->is_r500 = TRUE; break; @@ -302,7 +291,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x71DA: case 0x71DE: caps->family = CHIP_FAMILY_RV530; - caps->num_pipes = 1; + caps->num_vert_pipes = 5; caps->is_r500 = TRUE; break; @@ -322,13 +311,13 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x724F: case 0x7284: caps->family = CHIP_FAMILY_R580; - caps->num_pipes = 4; + caps->num_vert_pipes = 8; caps->is_r500 = TRUE; break; case 0x7280: caps->family = CHIP_FAMILY_RV570; - caps->num_pipes = 4; + caps->num_vert_pipes = 5; caps->is_r500 = TRUE; break; @@ -344,7 +333,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x7293: case 0x7297: caps->family = CHIP_FAMILY_RV560; - caps->num_pipes = 4; + caps->num_vert_pipes = 5; caps->is_r500 = TRUE; break; diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index c2d7ad3414..548d7a6c50 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -32,8 +32,10 @@ struct r300_capabilities { uint32_t pci_id; /* Chipset family */ int family; - /* The number of Graphics Backend (GB) pipes */ - int num_pipes; + /* The number of vertex pipes */ + int num_vert_pipes; + /* The number of fragment pipes */ + int num_frag_pipes; /* Whether or not TCL is physically present */ boolean has_tcl; /* Whether or not this is an RV515 or newer; R500s have many features: @@ -100,4 +102,4 @@ static const char* chip_families[] = { void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps); -#endif /* R300_CHIPSET_H */ \ No newline at end of file +#endif /* R300_CHIPSET_H */ diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 59ca985f40..67cb5ee7d1 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -55,6 +55,9 @@ static uint32_t pack_float_32(float f) #define CP_PACKET0(register, count) \ (RADEON_CP_PACKET0 | ((count) << 16) | ((register) >> 2)) +#define CP_PACKET3(op, count) \ + (RADEON_CP_PACKET3 | (op) | ((count) << 16)) + #define CS_LOCALS(context) \ struct r300_winsys* cs_winsys = context->winsys; \ struct radeon_cs* cs = cs_winsys->cs diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 8a507d56e6..dd1c8862a7 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -30,10 +30,11 @@ static void r300_surface_fill(struct pipe_context* pipe, unsigned w, unsigned h, unsigned color) { - struct r300_context* context = r300_context(pipe); - CS_LOCALS(context); - boolean has_tcl = FALSE; - boolean is_r500 = FALSE; + struct r300_context* r300 = r300_context(pipe); + CS_LOCALS(r300); + struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; + boolean has_tcl = caps->has_tcl; + boolean is_r500 = caps->is_r500; /* For the for loops. */ int i; /* Emit a shitload of state, and then draw a point to clear the buffer. @@ -224,20 +225,8 @@ static void r300_surface_fill(struct pipe_context* pipe, (5 << R300_VF_MAX_VTX_NUM_SHIFT)); } - if (CHIP_FAMILY_RV515) - vap_cntl |= (2 << R300_PVS_NUM_FPUS_SHIFT); - else if ((CHIP_FAMILY_RV530) || - (CHIP_FAMILY_RV560) || - (CHIP_FAMILY_RV570)) - vap_cntl |= (5 << R300_PVS_NUM_FPUS_SHIFT); - else if ((CHIP_FAMILY_RV410) || - (CHIP_FAMILY_R420)) - vap_cntl |= (6 << R300_PVS_NUM_FPUS_SHIFT); - else if ((CHIP_FAMILY_R520) || - (CHIP_FAMILY_R580)) - vap_cntl |= (8 << R300_PVS_NUM_FPUS_SHIFT); - else - vap_cntl |= (4 << R300_PVS_NUM_FPUS_SHIFT); + vap_cntl |= (caps->num_vert_pipes << + R300_PVS_NUM_FPUS_SHIFT); OUT_CS_REG(R300_VAP_CNTL, vap_cntl); @@ -361,6 +350,8 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); FLUSH_CS; + + r300->dirty_state = R300_NEW_KITCHEN_SINK; } void r300_init_surface_functions(struct r300_context* r300) -- cgit v1.2.3 From 188f61d43ae82c63d557d25282e349926321e3d0 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 05:44:01 -0800 Subject: r300: Hook up clear, set it to fallback. --- src/gallium/drivers/r300/r300_context.c | 2 ++ src/gallium/drivers/r300/r300_context.h | 1 + src/gallium/drivers/r300/r300_state.c | 18 ++++++++++++++++-- src/gallium/drivers/r300/r300_surface.c | 8 +++++++- 4 files changed, 26 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 314b2f0a11..e63e1278bf 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -47,6 +47,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.destroy = r300_destroy_context; + r300->context.clear = r300_clear; + r300->draw = draw_create(); r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 52ddfa1df9..f246c57f48 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -27,6 +27,7 @@ #include "pipe/p_context.h" #include "util/u_memory.h" +#include "r300_clear.h" #include "r300_screen.h" #include "r300_winsys.h" diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 1f6abc2385..907ebe5c75 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -204,6 +204,14 @@ static void r300_set_clip_state(struct pipe_context* pipe, draw_set_clip_state(r300->draw, state); } +static void + r300_set_constant_buffer(struct pipe_context* pipe, + uint shader, uint index, + const struct pipe_constant_buffer* buffer) +{ + /* XXX */ +} + static uint32_t translate_depth_stencil_function(int zs_func) { switch (zs_func) { case PIPE_FUNC_NEVER: @@ -367,6 +375,12 @@ static void r300_delete_dsa_state(struct pipe_context* pipe, FREE(state); } +static void r300_set_edgeflags(struct pipe_context* pipe, + const unsigned* bitfield) +{ + /* XXX you know it's bad when i915 has this blank too */ +} + static void r300_set_framebuffer_state(struct pipe_context* pipe, const struct pipe_framebuffer_state* state) @@ -762,13 +776,13 @@ void r300_init_state_functions(struct r300_context* r300) r300->context.set_clip_state = r300_set_clip_state; - /* XXX r300->context.set_constant_buffer = r300_set_constant_buffer; */ + r300->context.set_constant_buffer = r300_set_constant_buffer; r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; - /* XXX r300->context.set_edgeflags = r300_set_edgeflags; */ + r300->context.set_edgeflags = r300_set_edgeflags; r300->context.set_framebuffer_state = r300_set_framebuffer_state; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index dd1c8862a7..c9957a0af2 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -30,6 +30,12 @@ static void r300_surface_fill(struct pipe_context* pipe, unsigned w, unsigned h, unsigned color) { + +void *dst_map = pipe->screen->surface_map( pipe->screen, dest, +PIPE_BUFFER_USAGE_CPU_WRITE ); +pipe_fill_rect(dst_map, &dest->block, dest->stride, x, y, w, h, color); +pipe->screen->surface_unmap(pipe->screen, dest); +return; struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; @@ -278,7 +284,7 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX might have to switch to 2D */ OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_CS_RELOC(0, dest->buffer, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX this needs more TLC (or TCL, as it were) */ OUT_CS_REG(R300_RB3D_COLORPITCH0, R300_COLOR_FORMAT_ARGB8888); #if 0 -- cgit v1.2.3 From 412cf4d38be628200982208b7f93bb17530bb6db Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 25 Jan 2009 16:29:02 -0800 Subject: BROKEN This commit is only to protect against data loss, so please skip it when bisecting. Thanks. --- src/gallium/drivers/r300/r300_cs.h | 15 +- src/gallium/drivers/r300/r300_surface.c | 320 ++++++++++++++++++++++++++++++- src/gallium/winsys/drm/amd/amd_context.c | 2 +- 3 files changed, 322 insertions(+), 15 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index e6860cbaf7..edcfb9628f 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -72,19 +72,24 @@ static uint32_t pack_float_32(float f) cs_winsys->begin_cs(cs, (size), __FILE__, __FUNCTION__, __LINE__); \ } while (0) -#define OUT_CS(value) \ - cs_winsys->write_cs_dword(cs, value) +#define OUT_CS(value) do { \ + cs_winsys->write_cs_dword(cs, value); \ +} while (0) -#define OUT_CS_32F(value) \ - cs_winsys->write_cs_dword(cs, pack_float_32(value)) +#define OUT_CS_32F(value) do { \ + cs_winsys->write_cs_dword(cs, pack_float_32(value)); \ +} while (0) #define OUT_CS_REG(register, value) do { \ + debug_printf("writing 0x%x to register 0x%x\n", value, register); \ OUT_CS(CP_PACKET0(register, 0)); \ - OUT_CS(value); } while (0) + OUT_CS(value); \ +} while (0) /* Note: This expects count to be the number of registers, * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ + debug_printf("writing register sequence 0x%x\n", register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index c9957a0af2..8afa06dec8 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -30,14 +30,9 @@ static void r300_surface_fill(struct pipe_context* pipe, unsigned w, unsigned h, unsigned color) { - -void *dst_map = pipe->screen->surface_map( pipe->screen, dest, -PIPE_BUFFER_USAGE_CPU_WRITE ); -pipe_fill_rect(dst_map, &dest->block, dest->stride, x, y, w, h, color); -pipe->screen->surface_unmap(pipe->screen, dest); -return; struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); +#if 0 struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; boolean has_tcl = caps->has_tcl; boolean is_r500 = caps->is_r500; @@ -47,6 +42,13 @@ return; * XXX it goes without saying that this needs to be cleaned up and * shifted around to work with the rest of the driver's state handling. */ + BEGIN_CS(450); + /* XXX */ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + OUT_CS_REG(R300_TX_INVALTAGS, 0x0); + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + OUT_CS_REG(R300_TX_INVALTAGS, 0x0); + /* Sequence starting at R300_VAP_PROG_STREAM_CNTL_0 */ OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 1); if (has_tcl) { @@ -93,8 +95,23 @@ return; R300_VPORT_Z_OFFSET_ENA); OUT_CS(0x8); + /* XXX */ + OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); + OUT_CS(0xFFFFFF); + OUT_CS(0x0); + + OUT_CS_REG(R300_VAP_CNTL_STATUS, 0x0); + + OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); + OUT_CS(0x3f800000); + OUT_CS(0x3f800000); + OUT_CS(0x3f800000); + OUT_CS(0x3f800000); + OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xaaaaaaaa); + OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); + OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); OUT_CS(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT); @@ -135,7 +152,7 @@ return; OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); } else { - OUT_CS_REG(R300_RS_IP_0, 8); + OUT_CS_REG_SEQ(R300_RS_IP_0, 8); for (i = 0; i < 8; ++i) { OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); } @@ -287,7 +304,6 @@ return; OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX this needs more TLC (or TCL, as it were) */ OUT_CS_REG(R300_RB3D_COLORPITCH0, R300_COLOR_FORMAT_ARGB8888); -#if 0 if (flags & (CLEARBUFFER_DEPTH | CLEARBUFFER_STENCIL)) { assert(rrbd != 0); cbpitch = (rrbd->pitch / rrbd->cpp); @@ -337,7 +353,11 @@ return; (ctx->Stencil.Clear & R300_STENCILREF_MASK)); END_BATCH(); } -#endif + + OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(0x0); OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | @@ -355,7 +375,289 @@ return; /* XXX this should be split off, also figure out WTF with the numbers */ OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + END_CS; FLUSH_CS; +#endif +BEGIN_CS(276); +OUT_CS_REG(0x1720, 0x00068000); +OUT_CS_REG(0x4100, 0x00000000); +OUT_CS_REG(0x1720, 0x00068000); +OUT_CS_REG(0x1D98, 0x43000000); +OUT_CS_REG(0x1D9C, 0x43002000); +OUT_CS_REG(0x1DA0, 0xC3000000); +OUT_CS_REG(0x1DA4, 0x43002000); +OUT_CS_REG(0x1DA8, 0x3F000000); +OUT_CS_REG(0x1DAC, 0x3F000000); +OUT_CS_REG(0x2284, 0x00000000); +OUT_CS_REG(0x2080, 0x0030046A); +OUT_CS_REG(0x20B0, 0x0000043F); +OUT_CS_REG(0x20B4, 0x00000008); +OUT_CS_REG(0x2134, 0x00FFFFFF); +OUT_CS_REG(0x2138, 0x00000000); +OUT_CS_REG(0x2140, 0x00000000); +OUT_CS_REG(0x2150, 0x00000000); +OUT_CS_REG(0x21E0, 0x00000000); +OUT_CS_REG(0x2180, 0x00000000); +OUT_CS_REG(0x2184, 0x00000000); +OUT_CS_REG(0x21DC, 0xAAAAAAAA); +OUT_CS_REG(0x221C, 0x00000000); +OUT_CS_REG(0x2220, 0x3F800000); +OUT_CS_REG(0x2224, 0x3F800000); +OUT_CS_REG(0x2228, 0x3F800000); +OUT_CS_REG(0x222C, 0x3F800000); +OUT_CS_REG(0x2288, 0x0000FFFF); +OUT_CS_REG(0x2090, 0x00000000); +OUT_CS_REG(0x2094, 0x00000000); +OUT_CS_REG(0x22D0, 0x00000000); +OUT_CS_REG(0x22D4, 0x00000000); +OUT_CS_REG(0x22D8, 0x00000000); +OUT_CS_REG(0x4008, 0x00000007); +OUT_CS_REG(0x4010, 0x66666666); +OUT_CS_REG(0x4014, 0x06666666); +OUT_CS_REG(0x4018, 0x00000011); +OUT_CS_REG(0x401C, 0x00000004); +OUT_CS_REG(0x4020, 0x00000000); +OUT_CS_REG(0x4104, 0x00000000); +OUT_CS_REG(0x4200, 0x00000000); +OUT_CS_REG(0x4204, 0x00000000); +OUT_CS_REG(0x4208, 0x3F800000); +OUT_CS_REG(0x420C, 0x3F800000); +OUT_CS_REG(0x4214, 0x00050005); +OUT_CS_REG(0x421C, 0x00060006); +OUT_CS_REG(0x4230, 0x18000006); +OUT_CS_REG(0x4234, 0x00020006); +OUT_CS_REG(0x4238, 0x3BAAAAAB); +OUT_CS_REG(0x4234, 0x00030006); +OUT_CS_REG(0x4260, 0x00000000); +OUT_CS_REG(0x4264, 0x00000000); +OUT_CS_REG(0x4268, 0x3F800000); +OUT_CS_REG(0x4274, 0x00000002); +OUT_CS_REG(0x4278, 0x0003AAAA); +OUT_CS_REG(0x427C, 0x00000000); +OUT_CS_REG(0x4280, 0x00000000); +OUT_CS_REG(0x4288, 0x00000000); +OUT_CS_REG(0x428C, 0x00000001); +OUT_CS_REG(0x4290, 0x00000000); +OUT_CS_REG(0x4294, 0x3DBF1412); +OUT_CS_REG(0x4298, 0x00000000); +OUT_CS_REG(0x42A0, 0x00000000); +OUT_CS_REG(0x42A4, 0x00000000); +OUT_CS_REG(0x42A8, 0x00000000); +OUT_CS_REG(0x42AC, 0x00000000); +OUT_CS_REG(0x42B0, 0x00000000); +OUT_CS_REG(0x42B4, 0x00000000); +OUT_CS_REG(0x42B8, 0x00000000); +OUT_CS_REG(0x42C0, 0x4B7FFFFF); +OUT_CS_REG(0x42C4, 0x00000000); +OUT_CS_REG(0x4300, 0x00000000); +OUT_CS_REG(0x4304, 0x00000000); +OUT_CS_REG(0x4310, 0x00000000); +OUT_CS_REG(0x4314, 0x00000000); +OUT_CS_REG(0x4318, 0x00000000); +OUT_CS_REG(0x431C, 0x00000000); +OUT_CS_REG(0x4320, 0x00000000); +OUT_CS_REG(0x4324, 0x00000000); +OUT_CS_REG(0x4328, 0x00000000); +OUT_CS_REG(0x432C, 0x00000000); +OUT_CS_REG(0x4330, 0x00000000); +OUT_CS_REG(0x43A4, 0x0000001C); +OUT_CS_REG(0x43A8, 0x2DA49525); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x46A4, 0x00001B00); +OUT_CS_REG(0x46A8, 0x00001B0F); +OUT_CS_REG(0x46AC, 0x00001B0F); +OUT_CS_REG(0x46B0, 0x00001B0F); +OUT_CS_REG(0x46B4, 0x00000001); +OUT_CS_REG(0x4600, 0x00000000); +OUT_CS_REG(0x4604, 0x00000000); +OUT_CS_REG(0x4608, 0x00000000); +OUT_CS_REG(0x4610, 0x00000000); +OUT_CS_REG(0x4614, 0x00000000); +OUT_CS_REG(0x4618, 0x00000000); +OUT_CS_REG(0x461C, 0x00000000); +OUT_CS_REG(0x48C0, 0x00000000); +OUT_CS_REG(0x46C0, 0x00000000); +OUT_CS_REG(0x49C0, 0x00000000); +OUT_CS_REG(0x47C0, 0x00000000); +OUT_CS_REG(0x4BC0, 0x00000002); +OUT_CS_REG(0x4BC8, 0x00000000); +OUT_CS_REG(0x4BCC, 0x00000000); +OUT_CS_REG(0x4BD0, 0x00000000); +OUT_CS_REG(0x4BD4, 0x00000000); +OUT_CS_REG(0x4BD8, 0x00000000); +OUT_CS_REG(0x4BD8, 0x00000000); +OUT_CS_REG(0x4E00, 0x00000000); +OUT_CS_REG(0x4E04, 0x20210000); +OUT_CS_REG(0x4E08, 0x20210000); +OUT_CS_REG(0x4E0C, 0x0000000F); +OUT_CS_REG(0x4E10, 0x00000000); +OUT_CS_REG(0x4E18, 0x00000000); +OUT_CS_REG(0x4E28, 0x00000000); +OUT_CS_REG(0x4E38, 0x00C00100); +OUT_CS_REG(0x4E50, 0x00000000); +OUT_CS_REG(0x4E54, 0x00000000); +OUT_CS_REG(0x4E58, 0x00000000); +OUT_CS_REG(0x4E5C, 0x00000000); +OUT_CS_REG(0x4E60, 0x00000000); +OUT_CS_REG(0x4E64, 0x00000000); +OUT_CS_REG(0x4E68, 0x00000000); +OUT_CS_REG(0x4E6C, 0x00000000); +OUT_CS_REG(0x4E70, 0x00000000); +OUT_CS_REG(0x4E88, 0x00000000); +OUT_CS_REG(0x4EA0, 0x00000000); +OUT_CS_REG(0x4EA4, 0xFFFFFFFF); +OUT_CS_REG(0x4F00, 0x00000010); +OUT_CS_REG(0x4F04, 0x00038038); +OUT_CS_REG(0x4F08, 0x00FFFF00); +OUT_CS_REG(0x4F10, 0x00000002); +OUT_CS_REG(0x4F14, 0x00000001); +OUT_CS_REG(0x4F18, 0x00000003); +OUT_CS_REG(0x4F1C, 0x00000000); +OUT_CS_REG(0x4F20, 0x00000000); +OUT_CS_REG(0x4F24, 0x00000100); +OUT_CS_REG(0x4F28, 0x00000000); +OUT_CS_REG(0x4F30, 0x00000000); +OUT_CS_REG(0x4F34, 0x00000000); +OUT_CS_REG(0x4F44, 0x00000000); +OUT_CS_REG(0x4F54, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000406); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x3F800000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000400); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000401); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000402); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000403); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000404); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000405); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2150, 0x21030003); +OUT_CS_REG(0x4BC0, 0x00000000); +OUT_CS_REG(0x21E0, 0xF688F688); +OUT_CS_REG(0x2180, 0x00000001); +OUT_CS_REG(0x2184, 0x00000405); +OUT_CS_REG(0x20B0, 0x0000043F); +OUT_CS_REG(0x20B4, 0x00000008); +OUT_CS_REG(0x21DC, 0xAAAAAAAA); +OUT_CS_REG(0x2090, 0x00000003); +OUT_CS_REG(0x2094, 0x00000000); +OUT_CS_REG(0x4104, 0x00000000); +OUT_CS_REG(0x1D98, 0x3F800000); +OUT_CS_REG(0x1D9C, 0x00000000); +OUT_CS_REG(0x1DA0, 0x3F800000); +OUT_CS_REG(0x1DA4, 0x00000000); +OUT_CS_REG(0x1DA8, 0x3F800000); +OUT_CS_REG(0x1DAC, 0x00000000); +OUT_CS_REG(0x4BD4, 0x00000000); +OUT_CS_REG(0x4E04, 0x00000000); +OUT_CS_REG(0x4E08, 0x00000000); +OUT_CS_REG(0x221C, 0x0001C000); +OUT_CS_REG(0x421C, 0x06000600); +OUT_CS_REG(0x4310, 0x00D10000); +OUT_CS_REG(0x4314, 0x00D10000); +OUT_CS_REG(0x4318, 0x00D10000); +OUT_CS_REG(0x431C, 0x00D10000); +OUT_CS_REG(0x4320, 0x00D10000); +OUT_CS_REG(0x4324, 0x00D10000); +OUT_CS_REG(0x4328, 0x00D10000); +OUT_CS_REG(0x432C, 0x00D10000); +OUT_CS_REG(0x4300, 0x00040080); +OUT_CS_REG(0x4304, 0x00000000); +OUT_CS_REG(0x4330, 0x00004000); +OUT_CS_REG(0x4600, 0x00000000); +OUT_CS_REG(0x4604, 0x00000000); +OUT_CS_REG(0x4608, 0x00000000); +OUT_CS_REG(0x4610, 0x00000000); +OUT_CS_REG(0x4614, 0x00000000); +OUT_CS_REG(0x4618, 0x00000000); +OUT_CS_REG(0x461C, 0x00400000); +OUT_CS_REG(0x48C0, 0x00050A80); +OUT_CS_REG(0x46C0, 0x1C000000); +OUT_CS_REG(0x49C0, 0x00040889); +OUT_CS_REG(0x47C0, 0x01000000); +OUT_CS_REG(0x2284, 0x00000000); +OUT_CS_REG(0x2080, 0x0030045A); +OUT_CS_REG(0x22D0, 0x00100000); +OUT_CS_REG(0x22D4, 0x00000000); +OUT_CS_REG(0x22D8, 0x00000001); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000000); +OUT_CS_REG(0x2208, 0x00F00203); +OUT_CS_REG(0x2208, 0x00D10001); +OUT_CS_REG(0x2208, 0x01248001); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00F02203); +OUT_CS_REG(0x2208, 0x00D10021); +OUT_CS_REG(0x2208, 0x01248021); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x1720, 0x00068000); +OUT_CS_REG(0x4E28, 0x00000000); +OUT_CS_REG(0x4E38, 0x00C00100); +OUT_CS_REG(0x4E0C, 0x0000000F); +OUT_CS_REG(0x4F00, 0x00000000); +OUT_CS_REG(0x4F04, 0x00000000); +OUT_CS_REG(0x4F08, 0x00FF0000); +OUT_CS_REG(0x4E4C, 0x0000000A); +OUT_CS_REG(0x4F18, 0x00000003); +OUT_CS_REG(0x1720, 0x00068000); + +END_CS; +FLUSH_CS; r300->dirty_state = R300_NEW_KITCHEN_SINK; } diff --git a/src/gallium/winsys/drm/amd/amd_context.c b/src/gallium/winsys/drm/amd/amd_context.c index df8eb850c8..9b3c9c2ab2 100644 --- a/src/gallium/winsys/drm/amd/amd_context.c +++ b/src/gallium/winsys/drm/amd/amd_context.c @@ -242,7 +242,7 @@ GLboolean amd_context_create(const __GLcontextModes *visual, return GL_FALSE; } - if (GL_TRUE) { + if (1) { fprintf(stderr, "Creating r300 context...\n"); pipe = r300_create_context(NULL, -- cgit v1.2.3 From 29a4f5493529042d1068a7d35da1e7f542474503 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 25 Jan 2009 21:35:26 -0800 Subject: r300: Working trivial/clear for RV410. This might work for other people too. --- src/gallium/drivers/r300/r300_cs.h | 8 +- src/gallium/drivers/r300/r300_cs_inlines.h | 35 +++ src/gallium/drivers/r300/r300_surface.c | 404 +++-------------------------- 3 files changed, 80 insertions(+), 367 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_cs_inlines.h (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index edcfb9628f..d515c2f025 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -81,7 +81,7 @@ static uint32_t pack_float_32(float f) } while (0) #define OUT_CS_REG(register, value) do { \ - debug_printf("writing 0x%x to register 0x%x\n", value, register); \ + debug_printf("r300: writing 0x%x to register 0x%x\n", value, register); \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); \ } while (0) @@ -89,11 +89,13 @@ static uint32_t pack_float_32(float f) /* Note: This expects count to be the number of registers, * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ - debug_printf("writing register sequence 0x%x\n", register); \ + debug_printf("r300: writing register sequence 0x%x\n", register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ + debug_printf("r300: writing relocation for buffer %p, offset %d\n", \ + bo, offset); \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ } while (0) @@ -110,4 +112,6 @@ static uint32_t pack_float_32(float f) cs_winsys->flush_cs(cs); \ } while (0) +#include "r300_cs_inlines.h" + #endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h new file mode 100644 index 0000000000..aa0e647008 --- /dev/null +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -0,0 +1,35 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +/* r300_cs_inlines: This is just a handful of useful inlines for sending + * (very) common instructions to the CS buffer. Should only be included from + * r300_cs.h, probably. */ + +#ifdef R300_CS_H + +#define R300_PACIFY do { \ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | \ + (1 << 18) | (1 << 31)); \ +} while (0) + + +#endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 8afa06dec8..226cc7fc6c 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -32,356 +32,18 @@ static void r300_surface_fill(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); -#if 0 - struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; - boolean has_tcl = caps->has_tcl; - boolean is_r500 = caps->is_r500; - /* For the for loops. */ - int i; - /* Emit a shitload of state, and then draw a point to clear the buffer. - * XXX it goes without saying that this needs to be cleaned up and - * shifted around to work with the rest of the driver's state handling. - */ - BEGIN_CS(450); - /* XXX */ - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); - OUT_CS_REG(R300_TX_INVALTAGS, 0x0); - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); - OUT_CS_REG(R300_TX_INVALTAGS, 0x0); + float r, g, b, a; + r = (float)((color >> 16) & 0xff) / 255.0f; + g = (float)((color >> 8) & 0xff) / 255.0f; + b = (float)((color >> 0) & 0xff) / 255.0f; + debug_printf("r300: Filling surface %p at (%d,%d)," + " dimensions %dx%d, color 0x%x\n", + dest, x, y, w, h, color); - /* Sequence starting at R300_VAP_PROG_STREAM_CNTL_0 */ - OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 1); - if (has_tcl) { - OUT_CS(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << - R300_DATA_TYPE_0_SHIFT) | ((R300_LAST_VEC | (1 << - R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << - R300_DATA_TYPE_1_SHIFT))); - } else { - OUT_CS(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << - R300_DATA_TYPE_0_SHIFT) | ((R300_LAST_VEC | (2 << - R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << - R300_DATA_TYPE_1_SHIFT))); - } - - /* Disable fog */ - OUT_CS_REG(R300_FG_FOG_BLEND, 0); - OUT_CS_REG(R300_FG_ALPHA_FUNC, 0); - - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, - ((((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | - (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | - (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | - (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | - ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | - R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << - R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE0_SHIFT) | - (((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | - (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | - (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | - (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | - ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | - R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << - R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE1_SHIFT))); - /* R300_VAP_INPUT_CNTL_0, R300_VAP_INPUT_CNTL_1 */ - OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2); - OUT_CS((R300_SEL_USER_COLOR_0 << R300_COLOR_0_ASSEMBLY_SHIFT)); - OUT_CS(R300_INPUT_CNTL_POS | R300_INPUT_CNTL_COLOR | R300_INPUT_CNTL_TC0); - - /* comes from fglrx startup of clear */ - OUT_CS_REG_SEQ(R300_SE_VTE_CNTL, 2); - OUT_CS(R300_VTX_W0_FMT | R300_VPORT_X_SCALE_ENA | - R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | - R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | - R300_VPORT_Z_OFFSET_ENA); - OUT_CS(0x8); - - /* XXX */ - OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); - OUT_CS(0xFFFFFF); - OUT_CS(0x0); - - OUT_CS_REG(R300_VAP_CNTL_STATUS, 0x0); - - OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); - OUT_CS(0x3f800000); - OUT_CS(0x3f800000); - OUT_CS(0x3f800000); - OUT_CS(0x3f800000); - - OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xaaaaaaaa); - - OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); - - OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); - OUT_CS(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | - R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT); - OUT_CS(0); /* no textures */ - - OUT_CS_REG(R300_TX_ENABLE, 0); - - OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); - OUT_CS_32F(1.0); - OUT_CS_32F(x); - OUT_CS_32F(1.0); - OUT_CS_32F(y); - OUT_CS_32F(1.0); - OUT_CS_32F(0.0); - - OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); - OUT_CS(0x0); - OUT_CS(0x0); - - OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_PS_UCP_MODE_CLIP_AS_TRIFAN | R300_CLIP_DISABLE); - - OUT_CS_REG(R300_GA_POINT_SIZE, ((w * 6) << R300_POINTSIZE_X_SHIFT) | - ((h * 6) << R300_POINTSIZE_Y_SHIFT)); - - if (is_r500) { - OUT_CS_REG_SEQ(R500_RS_IP_0, 8); - for (i = 0; i < 8; ++i) { - OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | - (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | - (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | - (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); - } - - OUT_CS_REG_SEQ(R300_RS_COUNT, 2); - /* XXX could hires be disabled for a speed boost? */ - OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS(0x0); - - OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); - } else { - OUT_CS_REG_SEQ(R300_RS_IP_0, 8); - for (i = 0; i < 8; ++i) { - OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); - } - - OUT_CS_REG_SEQ(R300_RS_COUNT, 2); - /* XXX could hires be disabled for a speed boost? */ - OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS(0x0); - - OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); - } - - if (is_r500) { - OUT_CS_REG_SEQ(R500_US_CONFIG, 2); - OUT_CS(R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); - OUT_CS(0x0); - OUT_CS_REG_SEQ(R500_US_CODE_ADDR, 3); - OUT_CS(R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(1)); - OUT_CS(R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(1)); - OUT_CS(R500_US_CODE_OFFSET_ADDR(0)); - - OUT_CS_REG(R500_GA_US_VECTOR_INDEX, 0x0); - - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | - R500_INST_LAST | - R500_INST_RGB_OMASK_R | - R500_INST_RGB_OMASK_G | - R500_INST_RGB_OMASK_B | - R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | - R500_INST_ALPHA_CLAMP); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_RGB_ADDR0(0) | - R500_RGB_ADDR1(0) | - R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | - R500_RGB_ADDR2_CONST); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_ADDR0(0) | - R500_ALPHA_ADDR1(0) | - R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | - R500_ALPHA_ADDR2_CONST); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGB_SEL_A_SRC0 | - R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | - R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | - R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | - R500_ALU_RGB_G_SWIZ_B_B); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_OP_CMP | - R500_ALPHA_SWIZ_A_A | - R500_ALPHA_SWIZ_B_A); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGBA_OP_CMP | - R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | - R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0); - - } else { - OUT_CS_REG_SEQ(R300_US_CONFIG, 3); - OUT_CS(0x0); - OUT_CS(0x0); - OUT_CS(0x0); - OUT_CS_REG_SEQ(R300_US_CODE_ADDR_0, 4); - OUT_CS(0x0); - OUT_CS(0x0); - OUT_CS(0x0); - OUT_CS(R300_RGBA_OUT); - - OUT_CS_REG(R300_US_ALU_RGB_INST_0, - FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO))); - OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, - FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0)); - OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, - FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO))); - OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, - FP_SELA(0, NO, W, FP_TMP(0), 0, 0)); - } - - /* XXX */ - uint32_t vap_cntl; - OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); - if (has_tcl) { - vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) | - (5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (12 << R300_VF_MAX_VTX_NUM_SHIFT)); - if (CHIP_FAMILY_RV515) - vap_cntl |= R500_TCL_STATE_OPTIMIZATION; - } else { - vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) | - (5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (5 << R300_VF_MAX_VTX_NUM_SHIFT)); - } - - vap_cntl |= (caps->num_vert_pipes << - R300_PVS_NUM_FPUS_SHIFT); - - OUT_CS_REG(R300_VAP_CNTL, vap_cntl); - - /* XXX unbreak this - if (has_tcl) { - OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3); - OUT_CS((0 << R300_PVS_FIRST_INST_SHIFT) | - (0 << R300_PVS_XYZW_VALID_INST_SHIFT) | - (1 << R300_PVS_LAST_INST_SHIFT)); - OUT_CS((0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) | - (0 << R300_PVS_MAX_CONST_ADDR_SHIFT)); - OUT_CS(1 << R300_PVS_LAST_VTX_SRC_INST_SHIFT); - - OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 28)); - OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); - OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); - OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_CODE_START); - - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, - 0, 0xf, PVS_DST_REG_OUT)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(0, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, - PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, - PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(0, PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); - - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 1, 0xf, - PVS_DST_REG_OUT)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(1, PVS_SRC_SELECT_X, - PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, - PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, - VSF_FLAG_NONE)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(1, PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); - } */ - - /* TODO in bufmgr */ - /* XXX this should be split off, also figure out WTF with the numbers */ - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); - /* XXX might have to switch to 2D */ - - OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - /* XXX this needs more TLC (or TCL, as it were) */ - OUT_CS_REG(R300_RB3D_COLORPITCH0, R300_COLOR_FORMAT_ARGB8888); - if (flags & (CLEARBUFFER_DEPTH | CLEARBUFFER_STENCIL)) { - assert(rrbd != 0); - cbpitch = (rrbd->pitch / rrbd->cpp); - if (rrbd->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ - cbpitch |= R300_DEPTHMACROTILE_ENABLE; - } - if (rrbd->bo->flags & RADEON_BO_FLAGS_MICRO_TILE){ - cbpitch |= R300_DEPTHMICROTILE_TILED; - } - BEGIN_BATCH_NO_AUTOSTATE(4); - OUT_BATCH_REGSEQ(R300_ZB_DEPTHOFFSET, 1); - OUT_BATCH_RELOC(0, rrbd->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_BATCH_REGVAL(R300_ZB_DEPTHPITCH, cbpitch); - END_BATCH(); - } - - { - uint32_t t1, t2; - - t1 = 0x0; - t2 = 0x0; - - if (flags & CLEARBUFFER_DEPTH) { - t1 |= R300_Z_ENABLE | R300_Z_WRITE_ENABLE; - t2 |= - (R300_ZS_ALWAYS << R300_Z_FUNC_SHIFT); - } - - if (flags & CLEARBUFFER_STENCIL) { - t1 |= R300_STENCIL_ENABLE; - t2 |= - (R300_ZS_ALWAYS << - R300_S_FRONT_FUNC_SHIFT) | - (R300_ZS_REPLACE << - R300_S_FRONT_SFAIL_OP_SHIFT) | - (R300_ZS_REPLACE << - R300_S_FRONT_ZPASS_OP_SHIFT) | - (R300_ZS_REPLACE << - R300_S_FRONT_ZFAIL_OP_SHIFT); - } - - OUT_BATCH_REGSEQ(R300_ZB_CNTL, 3); - OUT_BATCH(t1); - OUT_BATCH(t2); - OUT_BATCH(((ctx->Stencil.WriteMask[0] & R300_STENCILREF_MASK) << - R300_STENCILWRITEMASK_SHIFT) | - (ctx->Stencil.Clear & R300_STENCILREF_MASK)); - END_BATCH(); - } - - OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); - OUT_CS(0x0); - OUT_CS(0x0); - OUT_CS(0x0); - - OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); - OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | - (1 << R300_PRIM_NUM_VERTICES_SHIFT)); - OUT_CS_32F(w / 2.0); - OUT_CS_32F(h / 2.0); - /* XXX this should be the depth value to clear to */ - OUT_CS_32F(1.0); - OUT_CS_32F(1.0); - OUT_CS_32F(color); - OUT_CS_32F(color); - OUT_CS_32F(color); - OUT_CS_32F(color); - - /* XXX this should be split off, also figure out WTF with the numbers */ - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); - - END_CS; - FLUSH_CS; -#endif BEGIN_CS(276); -OUT_CS_REG(0x1720, 0x00068000); +R300_PACIFY; OUT_CS_REG(0x4100, 0x00000000); -OUT_CS_REG(0x1720, 0x00068000); +R300_PACIFY; OUT_CS_REG(0x1D98, 0x43000000); OUT_CS_REG(0x1D9C, 0x43002000); OUT_CS_REG(0x1DA0, 0xC3000000); @@ -423,7 +85,6 @@ OUT_CS_REG(0x4204, 0x00000000); OUT_CS_REG(0x4208, 0x3F800000); OUT_CS_REG(0x420C, 0x3F800000); OUT_CS_REG(0x4214, 0x00050005); -OUT_CS_REG(0x421C, 0x00060006); OUT_CS_REG(0x4230, 0x18000006); OUT_CS_REG(0x4234, 0x00020006); OUT_CS_REG(0x4238, 0x3BAAAAAB); @@ -492,8 +153,6 @@ OUT_CS_REG(0x4E08, 0x20210000); OUT_CS_REG(0x4E0C, 0x0000000F); OUT_CS_REG(0x4E10, 0x00000000); OUT_CS_REG(0x4E18, 0x00000000); -OUT_CS_REG(0x4E28, 0x00000000); -OUT_CS_REG(0x4E38, 0x00C00100); OUT_CS_REG(0x4E50, 0x00000000); OUT_CS_REG(0x4E54, 0x00000000); OUT_CS_REG(0x4E58, 0x00000000); @@ -513,15 +172,13 @@ OUT_CS_REG(0x4F10, 0x00000002); OUT_CS_REG(0x4F14, 0x00000001); OUT_CS_REG(0x4F18, 0x00000003); OUT_CS_REG(0x4F1C, 0x00000000); -OUT_CS_REG(0x4F20, 0x00000000); -OUT_CS_REG(0x4F24, 0x00000100); OUT_CS_REG(0x4F28, 0x00000000); OUT_CS_REG(0x4F30, 0x00000000); OUT_CS_REG(0x4F34, 0x00000000); OUT_CS_REG(0x4F44, 0x00000000); OUT_CS_REG(0x4F54, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000406); @@ -530,7 +187,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x3F800000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000400); @@ -539,7 +196,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000401); @@ -548,7 +205,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000402); @@ -557,7 +214,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000403); @@ -566,7 +223,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000404); @@ -575,7 +232,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000405); @@ -604,7 +261,8 @@ OUT_CS_REG(0x4BD4, 0x00000000); OUT_CS_REG(0x4E04, 0x00000000); OUT_CS_REG(0x4E08, 0x00000000); OUT_CS_REG(0x221C, 0x0001C000); -OUT_CS_REG(0x421C, 0x06000600); +OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | + ((w * 6) << R300_POINTSIZE_X_SHIFT)); OUT_CS_REG(0x4310, 0x00D10000); OUT_CS_REG(0x4314, 0x00D10000); OUT_CS_REG(0x4318, 0x00D10000); @@ -633,7 +291,7 @@ OUT_CS_REG(0x22D0, 0x00100000); OUT_CS_REG(0x22D4, 0x00000000); OUT_CS_REG(0x22D8, 0x00000001); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000000); @@ -645,16 +303,32 @@ OUT_CS_REG(0x2208, 0x00F02203); OUT_CS_REG(0x2208, 0x00D10021); OUT_CS_REG(0x2208, 0x01248021); OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x1720, 0x00068000); -OUT_CS_REG(0x4E28, 0x00000000); -OUT_CS_REG(0x4E38, 0x00C00100); +R300_PACIFY; +OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); +OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); +//OUT_CS_REG(0x4E38, 0x00C00100); OUT_CS_REG(0x4E0C, 0x0000000F); OUT_CS_REG(0x4F00, 0x00000000); OUT_CS_REG(0x4F04, 0x00000000); OUT_CS_REG(0x4F08, 0x00FF0000); + +/* XXX Packet3 */ +OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); +OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | +(1 << R300_PRIM_NUM_VERTICES_SHIFT)); +OUT_CS_32F(w / 2.0); +OUT_CS_32F(h / 2.0); +/* XXX this should be the depth value to clear to */ +OUT_CS_32F(1.0); +OUT_CS_32F(1.0); +OUT_CS_32F(r); +OUT_CS_32F(g); +OUT_CS_32F(b); +OUT_CS_32F(1.0); + OUT_CS_REG(0x4E4C, 0x0000000A); OUT_CS_REG(0x4F18, 0x00000003); -OUT_CS_REG(0x1720, 0x00068000); +R300_PACIFY; END_CS; FLUSH_CS; -- cgit v1.2.3 From 3e3122467f1e9f6dde77762d1a35a56f89fb25ce Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 26 Jan 2009 02:18:56 -0800 Subject: r300: Deobfuscate a few registers, fix inaccurate variable names. It's not "pipes", it's floating-point vertex processors. Completely different. --- src/gallium/drivers/r300/r300_chipset.c | 26 +++++++++++++------------- src/gallium/drivers/r300/r300_chipset.h | 9 +++++---- src/gallium/drivers/r300/r300_surface.c | 10 +++++++--- 3 files changed, 25 insertions(+), 20 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 494c9e54c0..4c84be26ef 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -31,7 +31,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) /* Reasonable defaults */ caps->has_tcl = TRUE; caps->is_r500 = FALSE; - caps->num_vert_pipes = 4; + caps->num_vert_fpus = 4; /* Note: These are not ordered by PCI ID. I leave that task to GCC, @@ -112,7 +112,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x4A50: case 0x4A54: caps->family = CHIP_FAMILY_R420; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x5548: @@ -125,7 +125,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x5554: case 0x5D57: caps->family = CHIP_FAMILY_R423; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x554C: @@ -136,7 +136,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x5D49: case 0x5D4A: caps->family = CHIP_FAMILY_R430; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x5D4C: @@ -146,7 +146,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x5D50: case 0x5D52: caps->family = CHIP_FAMILY_R480; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x4B49: @@ -154,7 +154,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x4B4B: case 0x4B4C: caps->family = CHIP_FAMILY_R481; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x5E4C: @@ -170,7 +170,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x5E4B: case 0x5E4D: caps->family = CHIP_FAMILY_RV410; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x5954: @@ -226,7 +226,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x710E: case 0x710F: caps->family = CHIP_FAMILY_R520; - caps->num_vert_pipes = 8; + caps->num_vert_fpus = 8; caps->is_r500 = TRUE; break; @@ -269,7 +269,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x7210: case 0x7211: caps->family = CHIP_FAMILY_RV515; - caps->num_vert_pipes = 2; + caps->num_vert_fpus = 2; caps->is_r500 = TRUE; break; @@ -290,7 +290,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x71DA: case 0x71DE: caps->family = CHIP_FAMILY_RV530; - caps->num_vert_pipes = 5; + caps->num_vert_fpus = 5; caps->is_r500 = TRUE; break; @@ -310,13 +310,13 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x724F: case 0x7284: caps->family = CHIP_FAMILY_R580; - caps->num_vert_pipes = 8; + caps->num_vert_fpus = 8; caps->is_r500 = TRUE; break; case 0x7280: caps->family = CHIP_FAMILY_RV570; - caps->num_vert_pipes = 5; + caps->num_vert_fpus = 5; caps->is_r500 = TRUE; break; @@ -332,7 +332,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x7293: case 0x7297: caps->family = CHIP_FAMILY_RV560; - caps->num_vert_pipes = 5; + caps->num_vert_fpus = 5; caps->is_r500 = TRUE; break; diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index c4104a65cb..a9cd372ec5 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -32,14 +32,15 @@ struct r300_capabilities { uint32_t pci_id; /* Chipset family */ int family; - /* The number of vertex pipes */ - int num_vert_pipes; + /* The number of vertex floating-point units */ + int num_vert_fpus; /* The number of fragment pipes */ int num_frag_pipes; /* Whether or not TCL is physically present */ boolean has_tcl; - /* Whether or not this is an RV515 or newer; R500s have many features: - * - Extra bit on texture sizes + /* Whether or not this is an RV515 or newer; R500s have many differences + * that require extra consideration, compared to their R3xx cousins: + * - Extra bit of width and height on texture sizes * - Blend color is split across two registers * - Universal Shader (US) block used for fragment shaders */ boolean is_r500; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 226cc7fc6c..9a4b3455d1 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -32,6 +32,7 @@ static void r300_surface_fill(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); + struct r300_capabilities* caps = ((struct r300_screen*)pipe->screen)->caps; float r, g, b, a; r = (float)((color >> 16) & 0xff) / 255.0f; g = (float)((color >> 8) & 0xff) / 255.0f; @@ -51,7 +52,6 @@ OUT_CS_REG(0x1DA4, 0x43002000); OUT_CS_REG(0x1DA8, 0x3F000000); OUT_CS_REG(0x1DAC, 0x3F000000); OUT_CS_REG(0x2284, 0x00000000); -OUT_CS_REG(0x2080, 0x0030046A); OUT_CS_REG(0x20B0, 0x0000043F); OUT_CS_REG(0x20B4, 0x00000008); OUT_CS_REG(0x2134, 0x00FFFFFF); @@ -76,7 +76,8 @@ OUT_CS_REG(0x22D8, 0x00000000); OUT_CS_REG(0x4008, 0x00000007); OUT_CS_REG(0x4010, 0x66666666); OUT_CS_REG(0x4014, 0x06666666); -OUT_CS_REG(0x4018, 0x00000011); +/* XXX why doesn't classic Mesa write the number of pipes, too? */ +OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16); OUT_CS_REG(0x401C, 0x00000004); OUT_CS_REG(0x4020, 0x00000000); OUT_CS_REG(0x4104, 0x00000000); @@ -286,7 +287,10 @@ OUT_CS_REG(0x46C0, 0x1C000000); OUT_CS_REG(0x49C0, 0x00040889); OUT_CS_REG(0x47C0, 0x01000000); OUT_CS_REG(0x2284, 0x00000000); -OUT_CS_REG(0x2080, 0x0030045A); +/* XXX these magic numbers should be explained when + * this becomes a cached state object */ +OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); OUT_CS_REG(0x22D0, 0x00100000); OUT_CS_REG(0x22D4, 0x00000000); OUT_CS_REG(0x22D8, 0x00000001); -- cgit v1.2.3 From f1ba451bcc7764fd2b92fc8408f6b52c1d670b1f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 03:40:46 -0800 Subject: r300: Set up blend state emit, clean up blend registers. Also add at least one missing register to r300_reg. --- src/gallium/drivers/r300/r300_emit.c | 18 +++++++++----- src/gallium/drivers/r300/r300_reg.h | 2 ++ src/gallium/drivers/r300/r300_surface.c | 42 +++++++++++++++++---------------- src/gallium/drivers/r300/r300_surface.h | 9 +++++-- 4 files changed, 43 insertions(+), 28 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 19bfcbdd5b..de606cfab7 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -26,6 +26,17 @@ #include "r300_cs.h" #include "r300_screen.h" +void r300_emit_blend_state(struct r300_context* r300, + struct r300_blend_state* blend) +{ + CS_LOCALS(r300); + OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); + OUT_CS(blend->blend_control); + OUT_CS(blend->alpha_blend_control); + OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop); + OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither); +} + static void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; @@ -38,12 +49,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) /* XXX check size */ if (r300->dirty_state & R300_NEW_BLEND) { - struct r300_blend_state* blend = r300->blend_state; - /* XXX next two are contiguous regs */ - OUT_CS_REG(R300_RB3D_CBLEND, blend->blend_control); - OUT_CS_REG(R300_RB3D_ABLEND, blend->alpha_blend_control); - OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop); - OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither); + r300_emit_blend_state(r300, r300->blend_state); } if (r300->dirty_state & R300_NEW_BLEND_COLOR) { diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 7f4a508b1b..c1796ad7a8 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -151,6 +151,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_VTX_W0_FMT (1 << 10) # define R300_SERIAL_PROC_ENA (1 << 11) +#define R300_VAP_VTX_SIZE 0x20b4 + /* BEGIN: Vertex data assembly - lots of uncertainties */ /* gap */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 9a4b3455d1..6c7784dd4d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -43,24 +43,30 @@ static void r300_surface_fill(struct pipe_context* pipe, BEGIN_CS(276); R300_PACIFY; -OUT_CS_REG(0x4100, 0x00000000); +OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; +/* Viewport setup */ OUT_CS_REG(0x1D98, 0x43000000); OUT_CS_REG(0x1D9C, 0x43002000); OUT_CS_REG(0x1DA0, 0xC3000000); OUT_CS_REG(0x1DA4, 0x43002000); OUT_CS_REG(0x1DA8, 0x3F000000); OUT_CS_REG(0x1DAC, 0x3F000000); -OUT_CS_REG(0x2284, 0x00000000); -OUT_CS_REG(0x20B0, 0x0000043F); -OUT_CS_REG(0x20B4, 0x00000008); -OUT_CS_REG(0x2134, 0x00FFFFFF); -OUT_CS_REG(0x2138, 0x00000000); -OUT_CS_REG(0x2140, 0x00000000); -OUT_CS_REG(0x2150, 0x00000000); -OUT_CS_REG(0x21E0, 0x00000000); -OUT_CS_REG(0x2180, 0x00000000); -OUT_CS_REG(0x2184, 0x00000000); +/* Flush PVS. */ +OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); + +OUT_CS_REG(R300_SE_VTE_CNTL, R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | + R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT); +/* Vertex size. */ +OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); +/* Max and min vertex index clamp. */ +OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF); +OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); +/* XXX endian */ +OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); +OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); OUT_CS_REG(0x21DC, 0xAAAAAAAA); OUT_CS_REG(0x221C, 0x00000000); OUT_CS_REG(0x2220, 0x3F800000); @@ -149,12 +155,8 @@ OUT_CS_REG(0x4BD4, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4E00, 0x00000000); -OUT_CS_REG(0x4E04, 0x20210000); -OUT_CS_REG(0x4E08, 0x20210000); OUT_CS_REG(0x4E0C, 0x0000000F); OUT_CS_REG(0x4E10, 0x00000000); -OUT_CS_REG(0x4E18, 0x00000000); -OUT_CS_REG(0x4E50, 0x00000000); OUT_CS_REG(0x4E54, 0x00000000); OUT_CS_REG(0x4E58, 0x00000000); OUT_CS_REG(0x4E5C, 0x00000000); @@ -243,9 +245,9 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2150, 0x21030003); OUT_CS_REG(0x4BC0, 0x00000000); -OUT_CS_REG(0x21E0, 0xF688F688); -OUT_CS_REG(0x2180, 0x00000001); -OUT_CS_REG(0x2184, 0x00000405); +OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); +OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); +OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); OUT_CS_REG(0x20B0, 0x0000043F); OUT_CS_REG(0x20B4, 0x00000008); OUT_CS_REG(0x21DC, 0xAAAAAAAA); @@ -259,8 +261,8 @@ OUT_CS_REG(0x1DA4, 0x00000000); OUT_CS_REG(0x1DA8, 0x3F800000); OUT_CS_REG(0x1DAC, 0x00000000); OUT_CS_REG(0x4BD4, 0x00000000); -OUT_CS_REG(0x4E04, 0x00000000); -OUT_CS_REG(0x4E08, 0x00000000); +r300_emit_blend_state(r300, &blend_clear_state); +/* XXX emit blend state */ OUT_CS_REG(0x221C, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 2d64a95412..6d71601b98 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -30,8 +30,13 @@ #include "r300_context.h" #include "r300_cs.h" +#include "r300_emit.h" -/* XXX integrate this into r300_reg */ -#include "r300_fragprog.h" +const struct r300_blend_state blend_clear_state = { + .blend_control = 0x0, + .alpha_blend_control = 0x0, + .rop = 0x0, + .dither = 0x0, +}; #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From bea0c5812bd2795b514725d2a3788add3dc209af Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 04:04:57 -0800 Subject: r300: Add blend color state emit. Slow and steady wins the race. Or something like that. --- src/gallium/drivers/r300/r300_emit.c | 40 ++++++++++++++++++++------------- src/gallium/drivers/r300/r300_emit.h | 31 +++++++++++++++++++++++++ src/gallium/drivers/r300/r300_surface.c | 6 ++++- src/gallium/drivers/r300/r300_surface.h | 6 +++++ 4 files changed, 67 insertions(+), 16 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_emit.h (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index de606cfab7..e091352c3b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -22,24 +22,44 @@ /* r300_emit: Functions for emitting state. */ -#include "r300_context.h" -#include "r300_cs.h" -#include "r300_screen.h" +#include "r300_emit.h" void r300_emit_blend_state(struct r300_context* r300, struct r300_blend_state* blend) { CS_LOCALS(r300); + BEGIN_CS(7); OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); OUT_CS(blend->blend_control); OUT_CS(blend->alpha_blend_control); OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop); OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither); + END_CS; +} + +void r300_emit_blend_color_state(struct r300_context* r300, + struct r300_blend_color_state* bc) +{ + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; + CS_LOCALS(r300); + if (r300screen->caps->is_r500) { + BEGIN_CS(3); + OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2); + OUT_CS(bc->blend_color_red_alpha); + OUT_CS(bc->blend_color_green_blue); + END_CS; + } else { + BEGIN_CS(2); + OUT_CS_REG(R300_RB3D_BLEND_COLOR, bc->blend_color); + END_CS; + } } static void r300_emit_dirty_state(struct r300_context* r300) { - struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; CS_LOCALS(r300); if (!(r300->dirty_state) && !(r300->dirty_hw)) { @@ -53,17 +73,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) } if (r300->dirty_state & R300_NEW_BLEND_COLOR) { - struct r300_blend_color_state* blend_color = r300->blend_color_state; - if (r300screen->caps->is_r500) { - /* XXX next two are contiguous regs */ - OUT_CS_REG(R500_RB3D_CONSTANT_COLOR_AR, - blend_color->blend_color_red_alpha); - OUT_CS_REG(R500_RB3D_CONSTANT_COLOR_GB, - blend_color->blend_color_green_blue); - } else { - OUT_CS_REG(R300_RB3D_BLEND_COLOR, - blend_color->blend_color); - } + r300_emit_blend_color_state(r300, r300->blend_color_state); } if (r300->dirty_state & R300_NEW_DSA) { diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h new file mode 100644 index 0000000000..5756b6acf4 --- /dev/null +++ b/src/gallium/drivers/r300/r300_emit.h @@ -0,0 +1,31 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_context.h" +#include "r300_cs.h" +#include "r300_screen.h" + +void r300_emit_blend_state(struct r300_context* r300, + struct r300_blend_state* blend); + +void r300_emit_blend_color_state(struct r300_context* r300, + struct r300_blend_color_state* bc); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 6c7784dd4d..2e5a572f47 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -156,6 +156,9 @@ OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4E00, 0x00000000); OUT_CS_REG(0x4E0C, 0x0000000F); + +r300_emit_blend_color_state(r300, &blend_color_clear_state); + OUT_CS_REG(0x4E10, 0x00000000); OUT_CS_REG(0x4E54, 0x00000000); OUT_CS_REG(0x4E58, 0x00000000); @@ -261,8 +264,9 @@ OUT_CS_REG(0x1DA4, 0x00000000); OUT_CS_REG(0x1DA8, 0x3F800000); OUT_CS_REG(0x1DAC, 0x00000000); OUT_CS_REG(0x4BD4, 0x00000000); + r300_emit_blend_state(r300, &blend_clear_state); -/* XXX emit blend state */ + OUT_CS_REG(0x221C, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 6d71601b98..8ec7151f4d 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -39,4 +39,10 @@ const struct r300_blend_state blend_clear_state = { .dither = 0x0, }; +const struct r300_blend_color_state blend_color_clear_state = { + .blend_color = 0x0, + .blend_color_red_alpha = 0x0, + .blend_color_green_blue = 0x0, +}; + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 2e635ef563e2bff50e7a2af4f505bbd066865723 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 04:48:19 -0800 Subject: r300: Add dsa state emit. Seeing a pattern yet? --- src/gallium/drivers/r300/r300_emit.c | 31 ++++++++++++++++++++----------- src/gallium/drivers/r300/r300_emit.h | 3 +++ src/gallium/drivers/r300/r300_surface.c | 9 +++------ src/gallium/drivers/r300/r300_surface.h | 10 ++++++++++ 4 files changed, 36 insertions(+), 17 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index e091352c3b..d8de766c31 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -56,6 +56,25 @@ void r300_emit_blend_color_state(struct r300_context* r300, } } +void r300_emit_dsa_state(struct r300_context* r300, + struct r300_dsa_state* dsa) +{ + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; + CS_LOCALS(r300); + BEGIN_CS(r300screen->caps->is_r500 ? 12 : 10); + OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); + OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); + OUT_CS(dsa->z_buffer_control); + OUT_CS(dsa->z_stencil_control); + OUT_CS(dsa->stencil_ref_mask); + OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); + if (r300screen->caps->is_r500) { + OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); + } +} + static void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = @@ -77,17 +96,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) } if (r300->dirty_state & R300_NEW_DSA) { - struct r300_dsa_state* dsa = r300->dsa_state; - OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); - OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); - /* XXX next three are contiguous regs */ - OUT_CS_REG(R300_ZB_CNTL, dsa->z_buffer_control); - OUT_CS_REG(R300_ZB_ZSTENCILCNTL, dsa->z_stencil_control); - OUT_CS_REG(R300_ZB_STENCILREFMASK, dsa->stencil_ref_mask); - OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); - if (r300screen->caps->is_r500) { - OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); - } + r300_emit_dsa_state(r300, r300->dsa_state); } if (r300->dirty_state & R300_NEW_RASTERIZER) { diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 5756b6acf4..98287bc1f3 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -29,3 +29,6 @@ void r300_emit_blend_state(struct r300_context* r300, void r300_emit_blend_color_state(struct r300_context* r300, struct r300_blend_color_state* bc); + +void r300_emit_dsa_state(struct r300_context* r300, + struct r300_dsa_state* dsa); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 2e5a572f47..aab1850144 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -151,7 +151,6 @@ OUT_CS_REG(0x4BC0, 0x00000002); OUT_CS_REG(0x4BC8, 0x00000000); OUT_CS_REG(0x4BCC, 0x00000000); OUT_CS_REG(0x4BD0, 0x00000000); -OUT_CS_REG(0x4BD4, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4E00, 0x00000000); @@ -175,7 +174,6 @@ OUT_CS_REG(0x4F00, 0x00000010); OUT_CS_REG(0x4F04, 0x00038038); OUT_CS_REG(0x4F08, 0x00FFFF00); OUT_CS_REG(0x4F10, 0x00000002); -OUT_CS_REG(0x4F14, 0x00000001); OUT_CS_REG(0x4F18, 0x00000003); OUT_CS_REG(0x4F1C, 0x00000000); OUT_CS_REG(0x4F28, 0x00000000); @@ -313,15 +311,14 @@ OUT_CS_REG(0x2208, 0x00F02203); OUT_CS_REG(0x2208, 0x00D10021); OUT_CS_REG(0x2208, 0x01248021); OUT_CS_REG(0x2208, 0x00000000); + +r300_emit_dsa_state(r300, &dsa_clear_state); + R300_PACIFY; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); //OUT_CS_REG(0x4E38, 0x00C00100); OUT_CS_REG(0x4E0C, 0x0000000F); -OUT_CS_REG(0x4F00, 0x00000000); -OUT_CS_REG(0x4F04, 0x00000000); -OUT_CS_REG(0x4F08, 0x00FF0000); - /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 8ec7151f4d..2b89698ca5 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -45,4 +45,14 @@ const struct r300_blend_color_state blend_color_clear_state = { .blend_color_green_blue = 0x0, }; +const struct r300_dsa_state dsa_clear_state = { + .alpha_function = 0x0, + .alpha_reference = 0x0, + .z_buffer_control = 0x0, + .z_stencil_control = 0x0, + .stencil_ref_mask = 0x0, + .z_buffer_top = R300_ZTOP_ENABLE, + .stencil_ref_bf = 0x0, +}; + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 962d2e678f4da6ffef4f21f2fa9b062747bfbb85 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 15:12:01 -0800 Subject: r300: Clean up PVS upload emits. --- src/gallium/drivers/r300/r300_surface.c | 82 +++++---------------------------- 1 file changed, 11 insertions(+), 71 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index aab1850144..c0b020f81d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -184,66 +184,6 @@ OUT_CS_REG(0x4F54, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000406); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x3F800000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000400); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000401); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000402); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000403); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000404); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000405); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2150, 0x21030003); OUT_CS_REG(0x4BC0, 0x00000000); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); @@ -290,7 +230,6 @@ OUT_CS_REG(0x48C0, 0x00050A80); OUT_CS_REG(0x46C0, 0x1C000000); OUT_CS_REG(0x49C0, 0x00040889); OUT_CS_REG(0x47C0, 0x01000000); -OUT_CS_REG(0x2284, 0x00000000); /* XXX these magic numbers should be explained when * this becomes a cached state object */ OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | @@ -301,16 +240,17 @@ OUT_CS_REG(0x22D8, 0x00000001); OUT_CS_REG(0x43E8, 0x00000000); R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000000); -OUT_CS_REG(0x2208, 0x00F00203); -OUT_CS_REG(0x2208, 0x00D10001); -OUT_CS_REG(0x2208, 0x01248001); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00F02203); -OUT_CS_REG(0x2208, 0x00D10021); -OUT_CS_REG(0x2208, 0x01248021); -OUT_CS_REG(0x2208, 0x00000000); +/* XXX translate these back into normal instructions */ +OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); +OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); r300_emit_dsa_state(r300, &dsa_clear_state); -- cgit v1.2.3 From 9814fca71897a11f635945224105eb40c021d787 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 17:56:44 -0800 Subject: r300: Cleanup first part of RS block. Working towards r500-ability. --- src/gallium/drivers/r300/r300_surface.c | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index c0b020f81d..728a0076b7 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -33,6 +33,7 @@ static void r300_surface_fill(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); struct r300_capabilities* caps = ((struct r300_screen*)pipe->screen)->caps; + int i; float r, g, b, a; r = (float)((color >> 16) & 0xff) / 255.0f; g = (float)((color >> 8) & 0xff) / 255.0f; @@ -117,8 +118,6 @@ OUT_CS_REG(0x42B4, 0x00000000); OUT_CS_REG(0x42B8, 0x00000000); OUT_CS_REG(0x42C0, 0x4B7FFFFF); OUT_CS_REG(0x42C4, 0x00000000); -OUT_CS_REG(0x4300, 0x00000000); -OUT_CS_REG(0x4304, 0x00000000); OUT_CS_REG(0x4310, 0x00000000); OUT_CS_REG(0x4314, 0x00000000); OUT_CS_REG(0x4318, 0x00000000); @@ -208,16 +207,26 @@ r300_emit_blend_state(r300, &blend_clear_state); OUT_CS_REG(0x221C, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); -OUT_CS_REG(0x4310, 0x00D10000); -OUT_CS_REG(0x4314, 0x00D10000); -OUT_CS_REG(0x4318, 0x00D10000); -OUT_CS_REG(0x431C, 0x00D10000); -OUT_CS_REG(0x4320, 0x00D10000); -OUT_CS_REG(0x4324, 0x00D10000); -OUT_CS_REG(0x4328, 0x00D10000); -OUT_CS_REG(0x432C, 0x00D10000); -OUT_CS_REG(0x4300, 0x00040080); -OUT_CS_REG(0x4304, 0x00000000); + +/* XXX RS block setup */ +if (caps->is_r500) { + OUT_CS_REG_SEQ(R500_RS_IP_0, 8); + for (i = 0; i < 8; i++) { + /* I like the operator macros more than the shift macros... */ + OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | + (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); + } +} else { + OUT_CS_REG_SEQ(R300_RS_IP_0, 8); + for (i = 0; i < 8; i++) { + OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); + } +} +OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); +OUT_CS_REG(R300_RS_INST_COUNT, 0x0); + OUT_CS_REG(0x4330, 0x00004000); OUT_CS_REG(0x4600, 0x00000000); OUT_CS_REG(0x4604, 0x00000000); -- cgit v1.2.3 From 3f1bc7ed3285de255d0a76f1ed3e439f3b668d9b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 18:09:14 -0800 Subject: r300: Moar RS cleanup. How could I possibly miss these? --- src/gallium/drivers/r300/r300_surface.c | 9 --------- 1 file changed, 9 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 728a0076b7..47a3aac77d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -118,15 +118,6 @@ OUT_CS_REG(0x42B4, 0x00000000); OUT_CS_REG(0x42B8, 0x00000000); OUT_CS_REG(0x42C0, 0x4B7FFFFF); OUT_CS_REG(0x42C4, 0x00000000); -OUT_CS_REG(0x4310, 0x00000000); -OUT_CS_REG(0x4314, 0x00000000); -OUT_CS_REG(0x4318, 0x00000000); -OUT_CS_REG(0x431C, 0x00000000); -OUT_CS_REG(0x4320, 0x00000000); -OUT_CS_REG(0x4324, 0x00000000); -OUT_CS_REG(0x4328, 0x00000000); -OUT_CS_REG(0x432C, 0x00000000); -OUT_CS_REG(0x4330, 0x00000000); OUT_CS_REG(0x43A4, 0x0000001C); OUT_CS_REG(0x43A8, 0x2DA49525); OUT_CS_REG(0x43E8, 0x00FFFFFF); -- cgit v1.2.3 From 80dc1801409f9913cc37b8fc8e68c692bc8a22ca Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 28 Jan 2009 02:51:51 -0800 Subject: r300: A handful of thingys. --- src/gallium/drivers/r300/r300_cs.h | 6 ++-- src/gallium/drivers/r300/r300_emit.c | 1 + src/gallium/drivers/r300/r300_reg.h | 2 +- src/gallium/drivers/r300/r300_surface.c | 54 ++++++++++++++++++--------------- 4 files changed, 35 insertions(+), 28 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 653e2fdafa..42ec9fb094 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -61,7 +61,7 @@ static uint32_t pack_float_32(float f) #define CS_LOCALS(context) \ struct r300_winsys* cs_winsys = context->winsys; \ struct radeon_cs* cs = cs_winsys->cs; \ - int cs_count; + int cs_count = 0; #define CHECK_CS(size) \ cs_winsys->check_cs(cs, (size)) @@ -75,11 +75,13 @@ static uint32_t pack_float_32(float f) } while (0) #define OUT_CS(value) do { \ - cs_winsys->write_cs_dword(cs, value); \ + cs_winsys->write_cs_dword(cs, (value)); \ + cs_count--; \ } while (0) #define OUT_CS_32F(value) do { \ cs_winsys->write_cs_dword(cs, pack_float_32(value)); \ + cs_count--; \ } while (0) #define OUT_CS_REG(register, value) do { \ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index d8de766c31..4ae8a46637 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -73,6 +73,7 @@ void r300_emit_dsa_state(struct r300_context* r300, if (r300screen->caps->is_r500) { OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); } + END_CS; } static void r300_emit_dirty_state(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 37f168ed4c..c1d5009b86 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -670,7 +670,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_GB_FOG_STUFF_COMP_MASK 0x00000c00 /* Specifies the graphics pipeline configuration for antialiasing. */ -#define GB_AA_CONFIG 0x4020 +#define R300_GB_AA_CONFIG 0x4020 # define GB_AA_CONFIG_AA_DISABLE (0 << 0) # define GB_AA_CONFIG_AA_ENABLE (1 << 0) # define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2 (0 << 1) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 47a3aac77d..fc756133b4 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -68,30 +68,31 @@ OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); /* XXX endian */ OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); -OUT_CS_REG(0x21DC, 0xAAAAAAAA); -OUT_CS_REG(0x221C, 0x00000000); -OUT_CS_REG(0x2220, 0x3F800000); -OUT_CS_REG(0x2224, 0x3F800000); -OUT_CS_REG(0x2228, 0x3F800000); -OUT_CS_REG(0x222C, 0x3F800000); -OUT_CS_REG(0x2288, 0x0000FFFF); -OUT_CS_REG(0x2090, 0x00000000); -OUT_CS_REG(0x2094, 0x00000000); -OUT_CS_REG(0x22D0, 0x00000000); -OUT_CS_REG(0x22D4, 0x00000000); -OUT_CS_REG(0x22D8, 0x00000000); -OUT_CS_REG(0x4008, 0x00000007); -OUT_CS_REG(0x4010, 0x66666666); -OUT_CS_REG(0x4014, 0x06666666); +/* XXX magic number not in r300_reg */ +OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); +OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0); +OUT_CS_REG(R300_VAP_GB_VERT_CLIP_ADJ, 4); +OUT_CS_32F(1.0); +OUT_CS_32F(1.0); +OUT_CS_32F(1.0); +OUT_CS_32F(1.0); +/* XXX is this too long? */ +OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xFFFF); +OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | + R300_GB_LINE_STUFF_ENABLE | R300_GB_TRIANGLE_STUFF_ENABLE); +/* XXX more magic numbers */ +OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); +OUT_CS_REG(R300_GB_MSPOS1, 0x66666666); /* XXX why doesn't classic Mesa write the number of pipes, too? */ OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16); -OUT_CS_REG(0x401C, 0x00000004); -OUT_CS_REG(0x4020, 0x00000000); -OUT_CS_REG(0x4104, 0x00000000); -OUT_CS_REG(0x4200, 0x00000000); -OUT_CS_REG(0x4204, 0x00000000); -OUT_CS_REG(0x4208, 0x3F800000); -OUT_CS_REG(0x420C, 0x3F800000); +OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); +OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); +/* XXX point tex stuffing */ +OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4); +OUT_CS_32F(0.0); +OUT_CS_32F(0.0); +OUT_CS_32F(1.0); +OUT_CS_32F(1.0); OUT_CS_REG(0x4214, 0x00050005); OUT_CS_REG(0x4230, 0x18000006); OUT_CS_REG(0x4234, 0x00020006); @@ -184,7 +185,7 @@ OUT_CS_REG(0x20B4, 0x00000008); OUT_CS_REG(0x21DC, 0xAAAAAAAA); OUT_CS_REG(0x2090, 0x00000003); OUT_CS_REG(0x2094, 0x00000000); -OUT_CS_REG(0x4104, 0x00000000); +OUT_CS_REG(R300_TX_ENABLE, 0x0); OUT_CS_REG(0x1D98, 0x3F800000); OUT_CS_REG(0x1D9C, 0x00000000); OUT_CS_REG(0x1DA0, 0x3F800000); @@ -273,8 +274,11 @@ OUT_CS_32F(g); OUT_CS_32F(b); OUT_CS_32F(1.0); -OUT_CS_REG(0x4E4C, 0x0000000A); -OUT_CS_REG(0x4F18, 0x00000003); +/* XXX figure out why this is 0xA and not 0x2 */ +/* XXX OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); +OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, + R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | + R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */ R300_PACIFY; END_CS; -- cgit v1.2.3 From 588d8f3befa007e03ffb124033e6879330ad9614 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 28 Jan 2009 03:06:08 -0800 Subject: r300: Fix a few more registers. --- src/gallium/drivers/r300/r300_surface.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index fc756133b4..0ef26d4305 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -93,11 +93,13 @@ OUT_CS_32F(0.0); OUT_CS_32F(0.0); OUT_CS_32F(1.0); OUT_CS_32F(1.0); -OUT_CS_REG(0x4214, 0x00050005); -OUT_CS_REG(0x4230, 0x18000006); -OUT_CS_REG(0x4234, 0x00020006); -OUT_CS_REG(0x4238, 0x3BAAAAAB); +OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | + (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); +/* XXX should this be related to the actual point size? */ +OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 | + (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT)); OUT_CS_REG(0x4234, 0x00030006); +OUT_CS_REG(0x4238, 0x3BAAAAAB); OUT_CS_REG(0x4260, 0x00000000); OUT_CS_REG(0x4264, 0x00000000); OUT_CS_REG(0x4268, 0x3F800000); -- cgit v1.2.3 From 00f96d054d782fd0fa7b103b857fb19d3e4a1472 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Wed, 28 Jan 2009 14:53:39 +0100 Subject: r300: name registers for human readability Signed-off-by: Corbin Simpson --- src/gallium/drivers/r300/r300_surface.c | 206 ++++++++++++++++---------------- 1 file changed, 103 insertions(+), 103 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 0ef26d4305..48e0f54db9 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -47,12 +47,12 @@ R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; /* Viewport setup */ -OUT_CS_REG(0x1D98, 0x43000000); -OUT_CS_REG(0x1D9C, 0x43002000); -OUT_CS_REG(0x1DA0, 0xC3000000); -OUT_CS_REG(0x1DA4, 0x43002000); -OUT_CS_REG(0x1DA8, 0x3F000000); -OUT_CS_REG(0x1DAC, 0x3F000000); +OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x43000000); +OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x43002000); +OUT_CS_REG(R300_SE_VPORT_YSCALE, 0xC3000000); +OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x43002000); +OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F000000); +OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x3F000000); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -98,61 +98,61 @@ OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | /* XXX should this be related to the actual point size? */ OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 | (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT)); -OUT_CS_REG(0x4234, 0x00030006); -OUT_CS_REG(0x4238, 0x3BAAAAAB); -OUT_CS_REG(0x4260, 0x00000000); -OUT_CS_REG(0x4264, 0x00000000); -OUT_CS_REG(0x4268, 0x3F800000); -OUT_CS_REG(0x4274, 0x00000002); -OUT_CS_REG(0x4278, 0x0003AAAA); -OUT_CS_REG(0x427C, 0x00000000); -OUT_CS_REG(0x4280, 0x00000000); -OUT_CS_REG(0x4288, 0x00000000); -OUT_CS_REG(0x428C, 0x00000001); -OUT_CS_REG(0x4290, 0x00000000); -OUT_CS_REG(0x4294, 0x3DBF1412); -OUT_CS_REG(0x4298, 0x00000000); -OUT_CS_REG(0x42A0, 0x00000000); -OUT_CS_REG(0x42A4, 0x00000000); -OUT_CS_REG(0x42A8, 0x00000000); -OUT_CS_REG(0x42AC, 0x00000000); -OUT_CS_REG(0x42B0, 0x00000000); -OUT_CS_REG(0x42B4, 0x00000000); -OUT_CS_REG(0x42B8, 0x00000000); -OUT_CS_REG(0x42C0, 0x4B7FFFFF); -OUT_CS_REG(0x42C4, 0x00000000); -OUT_CS_REG(0x43A4, 0x0000001C); -OUT_CS_REG(0x43A8, 0x2DA49525); -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x46A4, 0x00001B00); +OUT_CS_REG(R300_GA_LINE_CNTL, 0x00030006); +OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, 0x3BAAAAAB); +OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, 0x00000000); +OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); +OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); +OUT_CS_REG(R300_GA_ENHANCE, 0x00000002); +OUT_CS_REG(R300_GA_COLOR_CONTROL, 0x0003AAAA); +OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000); +OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000); +OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000); +OUT_CS_REG(R300_GA_ROUND_MODE, 0x00000001); +OUT_CS_REG(R300_GA_OFFSET, 0x00000000); +OUT_CS_REG(R300_GA_FOG_SCALE, 0x3DBF1412); +OUT_CS_REG(R300_GA_FOG_OFFSET, 0x00000000); +OUT_CS_REG(R300_SU_TEX_WRAP, 0x00000000); +OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_SCALE, 0x00000000); +OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_OFFSET, 0x00000000); +OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_SCALE, 0x00000000); +OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_OFFSET, 0x00000000); +OUT_CS_REG(R300_SU_POLY_OFFSET_ENABLE, 0x00000000); +OUT_CS_REG(R300_SU_CULL_MODE, 0x00000000); +OUT_CS_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF); +OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); +OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); +OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); +OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); +OUT_CS_REG(R300_US_OUT_FMT, 0x00001B00); OUT_CS_REG(0x46A8, 0x00001B0F); OUT_CS_REG(0x46AC, 0x00001B0F); OUT_CS_REG(0x46B0, 0x00001B0F); -OUT_CS_REG(0x46B4, 0x00000001); -OUT_CS_REG(0x4600, 0x00000000); -OUT_CS_REG(0x4604, 0x00000000); -OUT_CS_REG(0x4608, 0x00000000); -OUT_CS_REG(0x4610, 0x00000000); -OUT_CS_REG(0x4614, 0x00000000); -OUT_CS_REG(0x4618, 0x00000000); -OUT_CS_REG(0x461C, 0x00000000); -OUT_CS_REG(0x48C0, 0x00000000); -OUT_CS_REG(0x46C0, 0x00000000); -OUT_CS_REG(0x49C0, 0x00000000); -OUT_CS_REG(0x47C0, 0x00000000); -OUT_CS_REG(0x4BC0, 0x00000002); -OUT_CS_REG(0x4BC8, 0x00000000); -OUT_CS_REG(0x4BCC, 0x00000000); -OUT_CS_REG(0x4BD0, 0x00000000); -OUT_CS_REG(0x4BD8, 0x00000000); -OUT_CS_REG(0x4BD8, 0x00000000); -OUT_CS_REG(0x4E00, 0x00000000); -OUT_CS_REG(0x4E0C, 0x0000000F); +OUT_CS_REG(R300_US_W_FMT, 0x00000001); +OUT_CS_REG(R300_US_CONFIG, 0x00000000); +OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); +OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00000000); +OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00000000); +OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x00000000); +OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00000000); +OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x00000000); +OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002); +OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); +OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); +OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x00000000); +OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); +OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); +OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); +OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); r300_emit_blend_color_state(r300, &blend_color_clear_state); -OUT_CS_REG(0x4E10, 0x00000000); -OUT_CS_REG(0x4E54, 0x00000000); +OUT_CS_REG(R300_RB3D_BLEND_COLOR, 0x00000000); +OUT_CS_REG(0x4E54, 0x00000000); OUT_CS_REG(0x4E58, 0x00000000); OUT_CS_REG(0x4E5C, 0x00000000); OUT_CS_REG(0x4E60, 0x00000000); @@ -160,45 +160,45 @@ OUT_CS_REG(0x4E64, 0x00000000); OUT_CS_REG(0x4E68, 0x00000000); OUT_CS_REG(0x4E6C, 0x00000000); OUT_CS_REG(0x4E70, 0x00000000); -OUT_CS_REG(0x4E88, 0x00000000); -OUT_CS_REG(0x4EA0, 0x00000000); -OUT_CS_REG(0x4EA4, 0xFFFFFFFF); -OUT_CS_REG(0x4F00, 0x00000010); -OUT_CS_REG(0x4F04, 0x00038038); -OUT_CS_REG(0x4F08, 0x00FFFF00); -OUT_CS_REG(0x4F10, 0x00000002); -OUT_CS_REG(0x4F18, 0x00000003); -OUT_CS_REG(0x4F1C, 0x00000000); -OUT_CS_REG(0x4F28, 0x00000000); +OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); +OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); +OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); +OUT_CS_REG(R300_ZB_CNTL, 0x00000010); +OUT_CS_REG(R300_ZB_ZSTENCILCNTL, 0x00038038); +OUT_CS_REG(R300_ZB_STENCILREFMASK, 0x00FFFF00); +OUT_CS_REG(R300_ZB_FORMAT, 0x00000002); +OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); +OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); +OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000); OUT_CS_REG(0x4F30, 0x00000000); OUT_CS_REG(0x4F34, 0x00000000); -OUT_CS_REG(0x4F44, 0x00000000); -OUT_CS_REG(0x4F54, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); +OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); +OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000); R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2150, 0x21030003); -OUT_CS_REG(0x4BC0, 0x00000000); +OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); +OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x21030003); +OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); -OUT_CS_REG(0x20B0, 0x0000043F); -OUT_CS_REG(0x20B4, 0x00000008); -OUT_CS_REG(0x21DC, 0xAAAAAAAA); -OUT_CS_REG(0x2090, 0x00000003); -OUT_CS_REG(0x2094, 0x00000000); +OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); +OUT_CS_REG(R300_VAP_VTX_SIZE, 0x00000008); +OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); +OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); +OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); OUT_CS_REG(R300_TX_ENABLE, 0x0); -OUT_CS_REG(0x1D98, 0x3F800000); -OUT_CS_REG(0x1D9C, 0x00000000); -OUT_CS_REG(0x1DA0, 0x3F800000); -OUT_CS_REG(0x1DA4, 0x00000000); -OUT_CS_REG(0x1DA8, 0x3F800000); -OUT_CS_REG(0x1DAC, 0x00000000); -OUT_CS_REG(0x4BD4, 0x00000000); +OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x3F800000); +OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x00000000); +OUT_CS_REG(R300_SE_VPORT_YSCALE, 0x3F800000); +OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x00000000); +OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F800000); +OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x00000000); +OUT_CS_REG(R300_FG_ALPHA_FUNC, 0x00000000); r300_emit_blend_state(r300, &blend_clear_state); -OUT_CS_REG(0x221C, 0x0001C000); +OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); @@ -221,28 +221,28 @@ if (caps->is_r500) { OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); OUT_CS_REG(R300_RS_INST_COUNT, 0x0); -OUT_CS_REG(0x4330, 0x00004000); -OUT_CS_REG(0x4600, 0x00000000); -OUT_CS_REG(0x4604, 0x00000000); -OUT_CS_REG(0x4608, 0x00000000); -OUT_CS_REG(0x4610, 0x00000000); -OUT_CS_REG(0x4614, 0x00000000); -OUT_CS_REG(0x4618, 0x00000000); -OUT_CS_REG(0x461C, 0x00400000); -OUT_CS_REG(0x48C0, 0x00050A80); -OUT_CS_REG(0x46C0, 0x1C000000); -OUT_CS_REG(0x49C0, 0x00040889); -OUT_CS_REG(0x47C0, 0x01000000); +OUT_CS_REG(R300_RS_INST_0, 0x00004000); +OUT_CS_REG(R300_US_CONFIG, 0x00000000); +OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); +OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000); +OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80); +OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); +OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); +OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000); /* XXX these magic numbers should be explained when * this becomes a cached state object */ OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); -OUT_CS_REG(0x22D0, 0x00100000); -OUT_CS_REG(0x22D4, 0x00000000); -OUT_CS_REG(0x22D8, 0x00000001); -OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); +OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); +OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); +OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000); R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); /* XXX translate these back into normal instructions */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); @@ -260,8 +260,8 @@ r300_emit_dsa_state(r300, &dsa_clear_state); R300_PACIFY; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); -//OUT_CS_REG(0x4E38, 0x00C00100); -OUT_CS_REG(0x4E0C, 0x0000000F); +//OUT_CS_REG(R300_RB3D_COLORPITCH0, 0x00C00100); +OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | -- cgit v1.2.3 From f0fce46a48a1f0547a1e50ad54696c4b660c8dce Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Thu, 29 Jan 2009 00:12:32 +0100 Subject: r300: attempt at trivial/clear on r5xx --- src/gallium/drivers/r300/r300_cs.h | 4 +- src/gallium/drivers/r300/r300_reg.h | 25 ++++++++-- src/gallium/drivers/r300/r300_surface.c | 83 +++++++++++++++++++++++++-------- 3 files changed, 87 insertions(+), 25 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 5686e5a6e9..d15887fb1c 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -85,7 +85,7 @@ static uint32_t pack_float_32(float f) } while (0) #define OUT_CS_REG(register, value) do { \ - debug_printf("r300: writing 0x%x to register 0x%x\n", value, register); \ + debug_printf("r300: writing 0x%08X to register 0x%04X\n", value, register); \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); \ } while (0) @@ -93,7 +93,7 @@ static uint32_t pack_float_32(float f) /* Note: This expects count to be the number of registers, * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ - debug_printf("r300: writing register sequence 0x%x\n", register); \ + debug_printf("r300: writing register sequence of %d to 0x%04X\n", count, register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index c1d5009b86..9281e6656f 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1669,7 +1669,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_TEX_INST_MASK (7 << 15) /* Output format from the unfied shader */ -#define R300_US_OUT_FMT 0x46A4 +#define R300_US_OUT_FMT_0 0x46A4 # define R300_US_OUT_FMT_C4_8 (0 << 0) # define R300_US_OUT_FMT_C4_10 (1 << 0) # define R300_US_OUT_FMT_C4_10_GAMMA (2 << 0) @@ -1691,7 +1691,24 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_US_OUT_FMT_C4_16_FP (18 << 0) # define R300_US_OUT_FMT_C_32_FP (19 << 0) # define R300_US_OUT_FMT_C2_32_FP (20 << 0) -# define R300_US_OUT_FMT_C4_32_FP (20 << 0) +# define R300_US_OUT_FMT_C4_32_FP (21 << 0) +# define R300_C0_SEL_A (0 << 8) +# define R300_C0_SEL_R (1 << 8) +# define R300_C0_SEL_G (2 << 8) +# define R300_C0_SEL_B (3 << 8) +# define R300_C1_SEL_A (0 << 10) +# define R300_C1_SEL_R (1 << 10) +# define R300_C1_SEL_G (2 << 10) +# define R300_C1_SEL_B (3 << 10) +# define R300_C2_SEL_A (0 << 12) +# define R300_C2_SEL_R (1 << 12) +# define R300_C2_SEL_G (2 << 12) +# define R300_C2_SEL_B (3 << 12) +# define R300_C3_SEL_A (0 << 14) +# define R300_C3_SEL_R (1 << 14) +# define R300_C3_SEL_G (2 << 14) +# define R300_C3_SEL_B (3 << 14) +# define R300_OUT_SIGN(x) (x << 16) /* ALU * The ALU instructions register blocks are enumerated according to the order @@ -2987,7 +3004,7 @@ enum { # define R500_US_CODE_RANGE_ADDR(x) (x << 0) # define R500_US_CODE_RANGE_SIZE(x) (x << 16) #define R500_US_CONFIG 0x4600 -# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 1) +# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 0) #define R500_US_FC_ADDR_0 0xa000 # define R500_FC_BOOL_ADDR(x) (x << 0) # define R500_FC_INT_ADDR(x) (x << 8) @@ -3031,7 +3048,7 @@ enum { # define R500_FORMAT_TXHEIGHT(x) (x << 11) # define R500_FORMAT_TXDEPTH(x) (x << 22) /* _0 through _3 */ -#define R500_US_OUT_FMT_0 0x46a4 +#define R500_US_OUT_FMT_0 0x46A4 # define R500_OUT_FMT_C4_8 (0 << 0) # define R500_OUT_FMT_C4_10 (1 << 0) # define R500_OUT_FMT_C4_10_GAMMA (2 << 0) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 48e0f54db9..f2d0183c98 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,7 +42,7 @@ static void r300_surface_fill(struct pipe_context* pipe, " dimensions %dx%d, color 0x%x\n", dest, x, y, w, h, color); -BEGIN_CS(276); +BEGIN_CS((caps->is_r500) ? 367 : 276); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -88,10 +88,9 @@ OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16); OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); /* XXX point tex stuffing */ -OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4); +OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); OUT_CS_32F(0.0); -OUT_CS_32F(0.0); -OUT_CS_32F(1.0); +OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1); OUT_CS_32F(1.0); OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); @@ -124,10 +123,11 @@ OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); -OUT_CS_REG(R300_US_OUT_FMT, 0x00001B00); -OUT_CS_REG(0x46A8, 0x00001B0F); -OUT_CS_REG(0x46AC, 0x00001B0F); -OUT_CS_REG(0x46B0, 0x00001B0F); +OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); +OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R); +OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); +OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); +OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); OUT_CS_REG(R300_US_W_FMT, 0x00000001); OUT_CS_REG(R300_US_CONFIG, 0x00000000); OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); @@ -152,14 +152,10 @@ OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); r300_emit_blend_color_state(r300, &blend_color_clear_state); OUT_CS_REG(R300_RB3D_BLEND_COLOR, 0x00000000); -OUT_CS_REG(0x4E54, 0x00000000); -OUT_CS_REG(0x4E58, 0x00000000); -OUT_CS_REG(0x4E5C, 0x00000000); -OUT_CS_REG(0x4E60, 0x00000000); -OUT_CS_REG(0x4E64, 0x00000000); -OUT_CS_REG(0x4E68, 0x00000000); -OUT_CS_REG(0x4E6C, 0x00000000); -OUT_CS_REG(0x4E70, 0x00000000); +/* XXX: Oh the wonderful unknown */ +OUT_CS_REG_SEQ(0x4E54, 8); +for (i = 0; i < 8; i++) + OUT_CS(0x00000000); OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); @@ -202,16 +198,65 @@ OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); -/* XXX RS block setup */ +/* XXX RS block and fp setup */ if (caps->is_r500) { - OUT_CS_REG_SEQ(R500_RS_IP_0, 8); - for (i = 0; i < 8; i++) { + OUT_CS_REG_SEQ(R500_RS_IP_0, 16); + for (i = 0; i < 16; i++) { /* I like the operator macros more than the shift macros... */ OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); } + R300_PACIFY; + OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); + OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | + R500_US_CODE_END_ADDR(1)); + OUT_CS_REG(R500_US_CODE_RANGE, R500_US_CODE_RANGE_ADDR(0) | + R500_US_CODE_RANGE_SIZE(1)); + OUT_CS_REG(R500_US_CODE_OFFSET, R500_US_CODE_OFFSET_ADDR(0)); + R300_PACIFY; + OUT_CS_REG(R500_US_CMN_INST_0, + R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | + R500_INST_LAST | + R500_INST_RGB_OMASK_R | + R500_INST_RGB_OMASK_G | + R500_INST_RGB_OMASK_B | + R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | + R500_INST_ALPHA_CLAMP); + OUT_CS_REG(R500_US_ALU_RGB_ADDR_0, + R500_RGB_ADDR0(0) | + R500_RGB_ADDR1(0) | + R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | + R500_RGB_ADDR2_CONST); + OUT_CS_REG(R500_US_ALU_ALPHA_ADDR_0, + R500_ALPHA_ADDR0(0) | + R500_ALPHA_ADDR1(0) | + R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | + R500_ALPHA_ADDR2_CONST); + OUT_CS_REG(R500_US_ALU_RGB_INST_0, + R500_ALU_RGB_SEL_A_SRC0 | + R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | + R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | + R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | + R500_ALU_RGB_G_SWIZ_B_B); + OUT_CS_REG(R500_US_ALU_ALPHA_INST_0, + R500_ALPHA_OP_CMP | + R500_ALPHA_SWIZ_A_A | + R500_ALPHA_SWIZ_B_A); + OUT_CS_REG(R500_US_ALU_RGBA_INST_0, + R500_ALU_RGBA_OP_CMP | + R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | + R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0); } else { OUT_CS_REG_SEQ(R300_RS_IP_0, 8); for (i = 0; i < 8; i++) { -- cgit v1.2.3 From c199f330322921e01c8c30e3ea69a2a5291ae8ee Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 28 Jan 2009 21:33:35 -0800 Subject: r300: Unbreak emit, fix up a bunch of little things. --- src/gallium/drivers/r300/r300_cs.h | 9 +++- src/gallium/drivers/r300/r300_emit.c | 7 +++- src/gallium/drivers/r300/r300_surface.c | 73 +++++++++++++++++---------------- src/gallium/drivers/r300/r300_surface.h | 2 +- 4 files changed, 50 insertions(+), 41 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index d15887fb1c..734ccb13d9 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -85,7 +85,9 @@ static uint32_t pack_float_32(float f) } while (0) #define OUT_CS_REG(register, value) do { \ - debug_printf("r300: writing 0x%08X to register 0x%04X\n", value, register); \ + debug_printf("r300: writing 0x%08X to register 0x%04X\n", \ + value, register); \ + assert(register); \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); \ } while (0) @@ -93,13 +95,16 @@ static uint32_t pack_float_32(float f) /* Note: This expects count to be the number of registers, * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ - debug_printf("r300: writing register sequence of %d to 0x%04X\n", count, register); \ + debug_printf("r300: writing register sequence of %d to 0x%04X\n", \ + count, register); \ + assert(register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ debug_printf("r300: writing relocation for buffer %p, offset %d\n", \ bo, offset); \ + assert(bo); \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 4ae8a46637..c5f08a2404 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -62,9 +62,12 @@ void r300_emit_dsa_state(struct r300_context* r300, struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; CS_LOCALS(r300); - BEGIN_CS(r300screen->caps->is_r500 ? 12 : 10); + BEGIN_CS(r300screen->caps->is_r500 ? 12 : 8); OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); - OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + /* XXX figure out the r300 counterpart for this */ + if (r300screen->caps->is_r500) { + OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + } OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); OUT_CS(dsa->z_buffer_control); OUT_CS(dsa->z_stencil_control); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index f2d0183c98..185b56ff88 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,17 +42,10 @@ static void r300_surface_fill(struct pipe_context* pipe, " dimensions %dx%d, color 0x%x\n", dest, x, y, w, h, color); -BEGIN_CS((caps->is_r500) ? 367 : 276); +BEGIN_CS((caps->is_r500) ? 367 : 322); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; -/* Viewport setup */ -OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x43000000); -OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x43002000); -OUT_CS_REG(R300_SE_VPORT_YSCALE, 0xC3000000); -OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x43002000); -OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F000000); -OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x3F000000); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -71,7 +64,7 @@ OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); /* XXX magic number not in r300_reg */ OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0); -OUT_CS_REG(R300_VAP_GB_VERT_CLIP_ADJ, 4); +OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); OUT_CS_32F(1.0); OUT_CS_32F(1.0); OUT_CS_32F(1.0); @@ -149,9 +142,6 @@ OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); -r300_emit_blend_color_state(r300, &blend_color_clear_state); - -OUT_CS_REG(R300_RB3D_BLEND_COLOR, 0x00000000); /* XXX: Oh the wonderful unknown */ OUT_CS_REG_SEQ(0x4E54, 8); for (i = 0; i < 8; i++) @@ -184,16 +174,16 @@ OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); OUT_CS_REG(R300_TX_ENABLE, 0x0); -OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x3F800000); -OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x00000000); -OUT_CS_REG(R300_SE_VPORT_YSCALE, 0x3F800000); -OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x00000000); -OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F800000); -OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x00000000); +/* XXX viewport setup */ +OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); +OUT_CS_32F(1.0); +OUT_CS_32F(0.0); +OUT_CS_32F(1.0); +OUT_CS_32F(0.0); +OUT_CS_32F(1.0); +OUT_CS_32F(0.0); OUT_CS_REG(R300_FG_ALPHA_FUNC, 0x00000000); -r300_emit_blend_state(r300, &blend_clear_state); - OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); @@ -262,22 +252,22 @@ if (caps->is_r500) { for (i = 0; i < 8; i++) { OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); } -} -OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); -OUT_CS_REG(R300_RS_INST_COUNT, 0x0); + OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS_REG(R300_RS_INST_COUNT, 0x0); -OUT_CS_REG(R300_RS_INST_0, 0x00004000); -OUT_CS_REG(R300_US_CONFIG, 0x00000000); -OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); -OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000); -OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80); -OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); -OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); -OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000); + OUT_CS_REG(R300_RS_INST_0, 0x00004000); + OUT_CS_REG(R300_US_CONFIG, 0x00000000); + OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); + OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000); + OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80); + OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); + OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); + OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000); +} /* XXX these magic numbers should be explained when * this becomes a cached state object */ OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | @@ -300,12 +290,23 @@ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +r300_emit_blend_state(r300, &blend_clear_state); +r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); R300_PACIFY; +/* Flush colorbuffer and blend caches. */ +OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, + R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D | + R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_SIGNAL); +OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, + R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | + R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); + OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); -//OUT_CS_REG(R300_RB3D_COLORPITCH0, 0x00C00100); +OUT_CS_REG(R300_RB3D_COLORPITCH0, (w >> 1) | R300_COLOR_TILE_ENABLE | + R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 2b89698ca5..e1d53116a1 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -50,7 +50,7 @@ const struct r300_dsa_state dsa_clear_state = { .alpha_reference = 0x0, .z_buffer_control = 0x0, .z_stencil_control = 0x0, - .stencil_ref_mask = 0x0, + .stencil_ref_mask = R300_STENCILWRITEMASK_MASK, .z_buffer_top = R300_ZTOP_ENABLE, .stencil_ref_bf = 0x0, }; -- cgit v1.2.3 From 0c9d2bbb1296e7b5c812ce04f79aff2d8308907c Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Thu, 29 Jan 2009 20:24:34 +0100 Subject: r300: set up r5xx fragment shader; clear still broken --- src/gallium/drivers/r300/r300_emit.c | 6 +-- src/gallium/drivers/r300/r300_reg.h | 2 +- src/gallium/drivers/r300/r300_surface.c | 82 ++++++++++----------------------- 3 files changed, 29 insertions(+), 61 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index c5f08a2404..001aa02f41 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -62,11 +62,11 @@ void r300_emit_dsa_state(struct r300_context* r300, struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; CS_LOCALS(r300); - BEGIN_CS(r300screen->caps->is_r500 ? 12 : 8); + BEGIN_CS(r300screen->caps->is_r500 ? 8 : 8); OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); /* XXX figure out the r300 counterpart for this */ if (r300screen->caps->is_r500) { - OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */ } OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); OUT_CS(dsa->z_buffer_control); @@ -74,7 +74,7 @@ void r300_emit_dsa_state(struct r300_context* r300, OUT_CS(dsa->stencil_ref_mask); OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); if (r300screen->caps->is_r500) { - OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); + /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */ } END_CS; } diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 9281e6656f..f01e15b8dd 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -3004,7 +3004,7 @@ enum { # define R500_US_CODE_RANGE_ADDR(x) (x << 0) # define R500_US_CODE_RANGE_SIZE(x) (x << 16) #define R500_US_CONFIG 0x4600 -# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 0) +# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 1) #define R500_US_FC_ADDR_0 0xa000 # define R500_FC_BOOL_ADDR(x) (x << 0) # define R500_FC_INT_ADDR(x) (x << 8) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 185b56ff88..0503d8faed 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,7 +42,7 @@ static void r300_surface_fill(struct pipe_context* pipe, " dimensions %dx%d, color 0x%x\n", dest, x, y, w, h, color); -BEGIN_CS((caps->is_r500) ? 367 : 322); +BEGIN_CS((caps->is_r500) ? 300 : 322); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -122,17 +122,6 @@ OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); OUT_CS_REG(R300_US_W_FMT, 0x00000001); -OUT_CS_REG(R300_US_CONFIG, 0x00000000); -OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); -OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00000000); -OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00000000); -OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x00000000); -OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00000000); -OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x00000000); OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002); OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); @@ -149,9 +138,6 @@ for (i = 0; i < 8; i++) OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); -OUT_CS_REG(R300_ZB_CNTL, 0x00000010); -OUT_CS_REG(R300_ZB_ZSTENCILCNTL, 0x00038038); -OUT_CS_REG(R300_ZB_STENCILREFMASK, 0x00FFFF00); OUT_CS_REG(R300_ZB_FORMAT, 0x00000002); OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); @@ -182,7 +168,6 @@ OUT_CS_32F(1.0); OUT_CS_32F(0.0); OUT_CS_32F(1.0); OUT_CS_32F(0.0); -OUT_CS_REG(R300_FG_ALPHA_FUNC, 0x00000000); OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | @@ -200,53 +185,36 @@ if (caps->is_r500) { } R300_PACIFY; OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); + OUT_CS_REG(R500_US_PIXSIZE, 0x00000000); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(1)); OUT_CS_REG(R500_US_CODE_RANGE, R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(1)); OUT_CS_REG(R500_US_CODE_OFFSET, R500_US_CODE_OFFSET_ADDR(0)); R300_PACIFY; - OUT_CS_REG(R500_US_CMN_INST_0, - R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | - R500_INST_LAST | - R500_INST_RGB_OMASK_R | - R500_INST_RGB_OMASK_G | - R500_INST_RGB_OMASK_B | - R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | - R500_INST_ALPHA_CLAMP); - OUT_CS_REG(R500_US_ALU_RGB_ADDR_0, - R500_RGB_ADDR0(0) | - R500_RGB_ADDR1(0) | - R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | - R500_RGB_ADDR2_CONST); - OUT_CS_REG(R500_US_ALU_ALPHA_ADDR_0, - R500_ALPHA_ADDR0(0) | - R500_ALPHA_ADDR1(0) | - R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | - R500_ALPHA_ADDR2_CONST); - OUT_CS_REG(R500_US_ALU_RGB_INST_0, - R500_ALU_RGB_SEL_A_SRC0 | - R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | - R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | - R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | - R500_ALU_RGB_G_SWIZ_B_B); - OUT_CS_REG(R500_US_ALU_ALPHA_INST_0, - R500_ALPHA_OP_CMP | - R500_ALPHA_SWIZ_A_A | - R500_ALPHA_SWIZ_B_A); - OUT_CS_REG(R500_US_ALU_RGBA_INST_0, - R500_ALU_RGBA_OP_CMP | - R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | - R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0); + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, + 0 | R500_GA_US_VECTOR_INDEX_TYPE_INSTR); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_R | R500_INST_RGB_OMASK_G | R500_INST_RGB_OMASK_B | + R500_INST_ALPHA_OMASK | R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0); } else { OUT_CS_REG_SEQ(R300_RS_IP_0, 8); for (i = 0; i < 8; i++) { -- cgit v1.2.3 From 09b107058d11ac2362ea296556b68331ff04f193 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 29 Jan 2009 12:27:00 -0800 Subject: r300: Try to fix up RS a bit more. --- src/gallium/drivers/r300/r300_surface.c | 41 ++++++++++++++++++++------------- 1 file changed, 25 insertions(+), 16 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 0503d8faed..cc6b4f3d79 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -90,6 +90,7 @@ OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | /* XXX should this be related to the actual point size? */ OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 | (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT)); +/* XXX this big chunk should be refactored into rs_state */ OUT_CS_REG(R300_GA_LINE_CNTL, 0x00030006); OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, 0x3BAAAAAB); OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, 0x00000000); @@ -175,15 +176,20 @@ OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | /* XXX RS block and fp setup */ if (caps->is_r500) { - OUT_CS_REG_SEQ(R500_RS_IP_0, 16); - for (i = 0; i < 16; i++) { + OUT_CS_REG_SEQ(R500_RS_IP_0, 8); + for (i = 0; i < 8; i++) { /* I like the operator macros more than the shift macros... */ OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); } - R300_PACIFY; + /* XXX */ + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x0); + OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); + OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); OUT_CS_REG(R500_US_PIXSIZE, 0x00000000); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | @@ -220,21 +226,24 @@ if (caps->is_r500) { for (i = 0; i < 8; i++) { OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); } - OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS_REG(R300_RS_INST_COUNT, 0x0); + /* XXX */ + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x0); + OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); - OUT_CS_REG(R300_RS_INST_0, 0x00004000); - OUT_CS_REG(R300_US_CONFIG, 0x00000000); - OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); - OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); - OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); - OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); - OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); - OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000); - OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80); + /* XXX magic numbers */ + OUT_CS_REG(R300_US_CONFIG, 0x0); + OUT_CS_REG(R300_US_PIXSIZE, 0x0); + OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); + OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x50A80); OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); - OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); - OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000); + OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x40889); + OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1000000); } /* XXX these magic numbers should be explained when * this becomes a cached state object */ -- cgit v1.2.3 From e14a10691e1a0ca6b453faf705f94494113962de Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 29 Jan 2009 13:23:11 -0800 Subject: r300: Add cleaned-up clear fallback, sort more regs. --- src/gallium/drivers/r300/r300_reg.h | 10 +++++----- src/gallium/drivers/r300/r300_surface.c | 35 ++++++++++++++++++++++----------- 2 files changed, 28 insertions(+), 17 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index f01e15b8dd..dbd0cc28e2 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1233,11 +1233,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R300_RS_INST_0 0x4330 #define R300_RS_INST_1 0x4334 #define R300_RS_INST_2 0x4338 -#define R300_RS_INST_3 0x433C /* GUESS */ -#define R300_RS_INST_4 0x4340 /* GUESS */ -#define R300_RS_INST_5 0x4344 /* GUESS */ -#define R300_RS_INST_6 0x4348 /* GUESS */ -#define R300_RS_INST_7 0x434C /* GUESS */ +#define R300_RS_INST_3 0x433C +#define R300_RS_INST_4 0x4340 +#define R300_RS_INST_5 0x4344 +#define R300_RS_INST_6 0x4348 +#define R300_RS_INST_7 0x434C # define R300_RS_INST_TEX_ID(x) ((x) << 0) # define R300_RS_INST_TEX_CN_WRITE (1 << 3) # define R300_RS_INST_TEX_ADDR_SHIFT 6 diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index cc6b4f3d79..3ffaee54b6 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,6 +42,16 @@ static void r300_surface_fill(struct pipe_context* pipe, " dimensions %dx%d, color 0x%x\n", dest, x, y, w, h, color); + /* Fallback? */ + if (0) { + debug_printf("r300: Falling back on surface clear..."); + void* map = pipe->screen->surface_map(pipe->screen, dest, + PIPE_BUFFER_USAGE_CPU_WRITE); + pipe_fill_rect(map, &dest->block, &dest->stride, x, y, w, h, color); + pipe->screen->surface_unmap(pipe->screen, dest); + return; + } + BEGIN_CS((caps->is_r500) ? 300 : 322); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); @@ -117,12 +127,6 @@ OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); -OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); -OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R); -OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); -OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); -OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); -OUT_CS_REG(R300_US_W_FMT, 0x00000001); OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002); OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); @@ -164,9 +168,9 @@ OUT_CS_REG(R300_TX_ENABLE, 0x0); /* XXX viewport setup */ OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); OUT_CS_32F(1.0); -OUT_CS_32F(0.0); +OUT_CS_32F((float)x); OUT_CS_32F(1.0); -OUT_CS_32F(0.0); +OUT_CS_32F((float)y); OUT_CS_32F(1.0); OUT_CS_32F(0.0); @@ -224,17 +228,18 @@ if (caps->is_r500) { } else { OUT_CS_REG_SEQ(R300_RS_IP_0, 8); for (i = 0; i < 8; i++) { - OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); + OUT_CS(R300_RS_SEL_T(R300_RS_SEL_K0) | + R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1)); } /* XXX */ OUT_CS_REG_SEQ(R300_RS_COUNT, 2); OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS(0x0); + OUT_CS(1); OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); /* XXX magic numbers */ - OUT_CS_REG(R300_US_CONFIG, 0x0); - OUT_CS_REG(R300_US_PIXSIZE, 0x0); + OUT_CS_REG(R300_US_CONFIG, 0); + OUT_CS_REG(R300_US_PIXSIZE, 2); OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); @@ -244,6 +249,12 @@ if (caps->is_r500) { OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x40889); OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1000000); + OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); + OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); } /* XXX these magic numbers should be explained when * this becomes a cached state object */ -- cgit v1.2.3 From 33d798c4eab57293336082c7d011aa27af693bbb Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 2 Feb 2009 15:39:30 -0800 Subject: r300: Move some registers around. This fixes r500 hangs. --- src/gallium/drivers/r300/r300_cs_inlines.h | 2 ++ src/gallium/drivers/r300/r300_surface.c | 11 ++++------- 2 files changed, 6 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h index aa0e647008..71e6623699 100644 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -27,8 +27,10 @@ #ifdef R300_CS_H #define R300_PACIFY do { \ + OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); \ OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | \ (1 << 18) | (1 << 31)); \ + OUT_CS_REG(R300_SC_SCREENDOOR, 0xffffff); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 3ffaee54b6..4bccdbca29 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -151,9 +151,7 @@ OUT_CS_REG(0x4F30, 0x00000000); OUT_CS_REG(0x4F34, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); -OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000); R300_PACIFY; -OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x21030003); OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); @@ -263,9 +261,7 @@ OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); -OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000); R300_PACIFY; -OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); /* XXX translate these back into normal instructions */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); @@ -293,7 +289,8 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); -OUT_CS_REG(R300_RB3D_COLORPITCH0, (w >> 1) | R300_COLOR_TILE_ENABLE | +/* XXX this should not be so rigid */ +OUT_CS_REG(R300_RB3D_COLORPITCH0, (w / 4) | R300_COLOR_TILE_ENABLE | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ @@ -311,8 +308,8 @@ OUT_CS_32F(b); OUT_CS_32F(1.0); /* XXX figure out why this is 0xA and not 0x2 */ -/* XXX OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); -OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, +OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); +/* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */ R300_PACIFY; -- cgit v1.2.3 From e1b04da9b35aad1f474f7396f206a7c124c6859b Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Tue, 3 Feb 2009 02:58:51 +0100 Subject: r300: fix compiler/linker errors --- src/gallium/drivers/r300/r300_chipset.c | 1 + src/gallium/drivers/r300/r300_screen.c | 2 +- src/gallium/drivers/r300/r300_state.c | 1 + src/gallium/drivers/r300/r300_surface.c | 4 ++-- 4 files changed, 5 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index b0a7fe7d21..7def62422a 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -21,6 +21,7 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include "r300_chipset.h" +#include "pipe/p_debug.h" /* r300_chipset: A file all to itself for deducing the various properties of * Radeons. */ diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 8e77e0ddd9..fd916fadbe 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -81,7 +81,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) /* IN THEORY */ return 0; case PIPE_CAP_TWO_SIDED_STENCIL: - if (r300screen->is_r500) { + if (r300screen->caps->is_r500) { return 1; } else { return 0; diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 37770cd5c6..6bb8379dd5 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -22,6 +22,7 @@ #include "util/u_math.h" #include "util/u_pack_color.h" +#include "pipe/p_debug.h" #include "r300_context.h" #include "r300_reg.h" diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 4bccdbca29..e03f3de371 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -52,7 +52,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } -BEGIN_CS((caps->is_r500) ? 300 : 322); +BEGIN_CS((caps->is_r500) ? 309 : 322); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -289,7 +289,7 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); -/* XXX this should not be so rigid */ +/* XXX this should not be so rigid and it still doesn't work right */ OUT_CS_REG(R300_RB3D_COLORPITCH0, (w / 4) | R300_COLOR_TILE_ENABLE | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); -- cgit v1.2.3 From 402d45d99b4533140aa706300da3154af2f376f0 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Thu, 5 Feb 2009 22:23:40 +0100 Subject: r300: working trivial/clear for r5xx --- src/gallium/drivers/r300/r300_surface.c | 4 ++-- src/gallium/drivers/r300/r300_texture.c | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index e03f3de371..3db013cd7e 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -290,8 +290,8 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX this should not be so rigid and it still doesn't work right */ -OUT_CS_REG(R300_RB3D_COLORPITCH0, (w / 4) | R300_COLOR_TILE_ENABLE | - R300_COLOR_FORMAT_ARGB8888); +debug_printf("Buffer width (stride): %d\n", dest->stride); +OUT_CS_REG(R300_RB3D_COLORPITCH0, (dest->stride >> 2) | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 537425c1e2..f9ad14f12b 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -44,11 +44,11 @@ static void r300_setup_miptree(struct r300_texture* tex) /* Radeons enjoy things in multiples of 32. */ /* XXX NPOT -> 64, not 32 */ - stride = (base->nblocksx[i] * base->block.size + 31) & ~31; + stride = (base->nblocksx[i] * base->block.size + 63) & ~63; size = stride * base->nblocksy[i] * base->depth[i]; /* XXX 64 for NPOT */ - tex->offset[i] = (tex->size + 31) & ~31; + tex->offset[i] = (tex->size + 63) & ~63; tex->size = tex->offset[i] + size; } } @@ -72,7 +72,7 @@ static struct pipe_texture* r300_setup_miptree(tex); - tex->buffer = screen->buffer_create(screen, 32, + tex->buffer = screen->buffer_create(screen, 63, PIPE_BUFFER_USAGE_PIXEL, tex->size); @@ -130,7 +130,7 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, surface->nblocksy = texture->nblocksy[level]; /* XXX save the actual stride instead plz kthnxbai */ surface->stride = - (texture->nblocksx[level] * texture->block.size + 31) & ~31; + (texture->nblocksx[level] * texture->block.size + 63) & ~63; surface->offset = offset; surface->usage = flags; surface->status = PIPE_SURFACE_STATUS_DEFINED; -- cgit v1.2.3 From 2e70971e4f1ac5278e9da67341e8c39518308d20 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 6 Feb 2009 01:59:26 -0800 Subject: r300: Clean up CS counting. --- src/gallium/drivers/r300/r300_cs.h | 1 + src/gallium/drivers/r300/r300_surface.c | 10 ++++++---- 2 files changed, 7 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 734ccb13d9..385b61a096 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -107,6 +107,7 @@ static uint32_t pack_float_32(float f) assert(bo); \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ + cs_count -= 2; \ } while (0) #define END_CS do { \ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 3db013cd7e..1ed4a4e3bc 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -39,8 +39,8 @@ static void r300_surface_fill(struct pipe_context* pipe, g = (float)((color >> 8) & 0xff) / 255.0f; b = (float)((color >> 0) & 0xff) / 255.0f; debug_printf("r300: Filling surface %p at (%d,%d)," - " dimensions %dx%d, color 0x%x\n", - dest, x, y, w, h, color); + " dimensions %dx%d (stride %d), color 0x%x\n", + dest, x, y, w, h, dest->stride, color); /* Fallback? */ if (0) { @@ -52,7 +52,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } -BEGIN_CS((caps->is_r500) ? 309 : 322); +BEGIN_CS((caps->is_r500) ? 309 : 280); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -273,11 +273,14 @@ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +R300_PACIFY; +END_CS; r300_emit_blend_state(r300, &blend_clear_state); r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); +BEGIN_CS(36); R300_PACIFY; /* Flush colorbuffer and blend caches. */ OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, @@ -290,7 +293,6 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX this should not be so rigid and it still doesn't work right */ -debug_printf("Buffer width (stride): %d\n", dest->stride); OUT_CS_REG(R300_RB3D_COLORPITCH0, (dest->stride >> 2) | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ -- cgit v1.2.3 From ea3398cf3395fd36ac6edc717f2680361ac5e239 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 8 Feb 2009 01:01:26 -0800 Subject: r300: Update to match pipe_surface changes. --- src/gallium/drivers/r300/r300_context.h | 4 ++++ src/gallium/drivers/r300/r300_emit.c | 4 +++- src/gallium/drivers/r300/r300_screen.c | 6 ++++-- src/gallium/drivers/r300/r300_surface.c | 3 ++- src/gallium/drivers/r300/r300_texture.c | 4 ---- 5 files changed, 13 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index fb91c172f4..376c57639d 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -179,8 +179,12 @@ static struct r300_context* r300_context(struct pipe_context* context) { void r300_init_state_functions(struct r300_context* r300); void r300_init_surface_functions(struct r300_context* r300); +/* Fun with includes: r300_winsys also declares this prototype. + * We'll just step out in that case... */ +#ifndef R300_WINSYS_H struct pipe_context* r300_create_context(struct pipe_screen* screen, struct pipe_winsys* winsys, struct r300_winsys* r300_winsys); +#endif #endif /* R300_CONTEXT_H */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index c71b8d0b02..585a9e729d 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -84,12 +84,14 @@ void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb) { CS_LOCALS(r300); + struct r300_texture* tex; int i; BEGIN_CS((3 * fb->nr_cbufs) + 6); for (i = 0; i < fb->nr_cbufs; i++) { + tex = (struct r300_texture*)fb->cbufs[i]->texture; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); - OUT_CS_RELOC(fb->cbufs[i]->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); } R300_PACIFY; END_CS; diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index fd916fadbe..8ed66a1660 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -214,7 +214,8 @@ static void* r300_surface_map(struct pipe_screen* screen, struct pipe_surface* surface, unsigned flags) { - char* map = pipe_buffer_map(screen, surface->buffer, flags); + struct r300_texture* tex = (struct r300_texture*)surface->texture; + char* map = pipe_buffer_map(screen, tex->buffer, flags); if (!map) { return NULL; @@ -226,7 +227,8 @@ static void* r300_surface_map(struct pipe_screen* screen, static void r300_surface_unmap(struct pipe_screen* screen, struct pipe_surface* surface) { - pipe_buffer_unmap(screen, surface->buffer); + struct r300_texture* tex = (struct r300_texture*)surface->texture; + pipe_buffer_unmap(screen, tex->buffer); } static void r300_destroy_screen(struct pipe_screen* pscreen) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 1ed4a4e3bc..bbd2ade64a 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -33,6 +33,7 @@ static void r300_surface_fill(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); struct r300_capabilities* caps = ((struct r300_screen*)pipe->screen)->caps; + struct r300_texture* tex = (struct r300_texture*)dest->texture; int i; float r, g, b, a; r = (float)((color >> 16) & 0xff) / 255.0f; @@ -291,7 +292,7 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); -OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); +OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX this should not be so rigid and it still doesn't work right */ OUT_CS_REG(R300_RB3D_COLORPITCH0, (dest->stride >> 2) | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index f9ad14f12b..7f57656a78 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -121,7 +121,6 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, if (surface) { surface->refcount = 1; pipe_texture_reference(&surface->texture, texture); - pipe_buffer_reference(screen, &surface->buffer, tex->buffer); surface->format = texture->format; surface->width = texture->width[level]; surface->height = texture->height[level]; @@ -148,7 +147,6 @@ static void r300_tex_surface_release(struct pipe_screen* screen, if (s->refcount <= 0) { pipe_texture_reference(&s->texture, NULL); - pipe_buffer_reference(screen, &s->buffer, NULL); FREE(s); } @@ -180,8 +178,6 @@ static struct pipe_texture* /* XXX tex->stride = *stride; */ - pipe_buffer_reference(screen, &tex->buffer, buffer); - return (struct pipe_texture*)tex; } -- cgit v1.2.3 From 360e700a43ce3914d7f336593f380562ca190898 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 8 Feb 2009 01:07:03 -0800 Subject: r300: Add SW TCL paths for clear. This should make things work for people on RSxxx chipsets. --- src/gallium/drivers/r300/r300_surface.c | 61 +++++++++++++++++++++++---------- 1 file changed, 42 insertions(+), 19 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.c') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index bbd2ade64a..1e1f96a7f9 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -153,7 +153,17 @@ OUT_CS_REG(0x4F34, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); R300_PACIFY; -OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x21030003); +if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); +} else { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); +} OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); @@ -173,7 +183,11 @@ OUT_CS_32F((float)y); OUT_CS_32F(1.0); OUT_CS_32F(0.0); -OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); +if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE | + R300_PS_UCP_MODE_CLIP_AS_TRIFAN); +} + OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); @@ -257,23 +271,32 @@ if (caps->is_r500) { } /* XXX these magic numbers should be explained when * this becomes a cached state object */ -OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); -OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); -OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); -OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); -R300_PACIFY; -/* XXX translate these back into normal instructions */ -OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); -OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_CNTL, 0xA | + (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); + OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); + R300_PACIFY; + /* XXX translate these back into normal instructions */ + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +} else { + OUT_CS_REG(R300_VAP_CNTL, 0xA | + (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); +} R300_PACIFY; END_CS; -- cgit v1.2.3