From b1776eb14471e7a4d09d3c8a73f02b19b106883b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 04:48:30 -0800 Subject: gallium-r300: Add r300_surface. Todo: - Hook up surface functions. - Take it for a spin and watch it crash 'n' burn. --- src/gallium/drivers/r300/r300_surface.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 src/gallium/drivers/r300/r300_surface.h (limited to 'src/gallium/drivers/r300/r300_surface.h') diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h new file mode 100644 index 0000000000..3e3d813d99 --- /dev/null +++ b/src/gallium/drivers/r300/r300_surface.h @@ -0,0 +1,28 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_SURFACE_H +#define R300_SURFACE_H + +#include "r300_blit.h" + +#endif /* R300_SURFACE_H */ -- cgit v1.2.3 From afe2de0a235f8e4312ecbb7275640502098a8a81 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 05:11:19 -0800 Subject: gallium-r300: Fit it all together now. In theory, it could work, but there's still some very big gaps. Anything marked with XXX should be taken care of first, probably. --- src/gallium/drivers/r300/Makefile | 4 +++- src/gallium/drivers/r300/r300_blit.c | 2 ++ src/gallium/drivers/r300/r300_blit.h | 9 ++++++++- src/gallium/drivers/r300/r300_clear.c | 8 ++++++-- src/gallium/drivers/r300/r300_clear.h | 6 +++++- src/gallium/drivers/r300/r300_context.c | 4 +++- src/gallium/drivers/r300/r300_context.h | 2 ++ src/gallium/drivers/r300/r300_screen.c | 2 +- src/gallium/drivers/r300/r300_surface.h | 8 ++++++++ 9 files changed, 38 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.h') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 918eb8e1c4..bce7dcbf3a 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -4,10 +4,12 @@ include $(TOP)/configs/current LIBNAME = r300 C_SOURCES = \ + r300_blit.c \ r300_clear.c \ r300_context.c \ r300_screen.c \ - r300_state.c + r300_state.c \ + r300_surface.c include ../../Makefile.template diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c index c01855defa..5f5eba90c1 100644 --- a/src/gallium/drivers/r300/r300_blit.c +++ b/src/gallium/drivers/r300/r300_blit.c @@ -20,6 +20,8 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#include "r300_blit.h" + /* Does a "paint" into the specified rectangle. * Returns 1 on success, 0 on error. */ int r300_fill_blit(struct r300_context* r300, diff --git a/src/gallium/drivers/r300/r300_blit.h b/src/gallium/drivers/r300/r300_blit.h index ac916ca062..698b00083a 100644 --- a/src/gallium/drivers/r300/r300_blit.h +++ b/src/gallium/drivers/r300/r300_blit.h @@ -23,10 +23,17 @@ #ifndef R300_BLIT_H #define R300_BLIT_H +#include "pipe/p_state.h" + +#include "radeon_reg.h" + +/* Forward declarations. */ +struct r300_context; + extern int r300_fill_blit(struct r300_context* r300, unsigned cpp, short dst_pitch, - struct pipe_buffer *dst_buffer, + struct pipe_buffer* dst_buffer, unsigned dst_offset, short x, short y, short w, short h, diff --git a/src/gallium/drivers/r300/r300_clear.c b/src/gallium/drivers/r300/r300_clear.c index f8f0e61931..fd28437aaa 100644 --- a/src/gallium/drivers/r300/r300_clear.c +++ b/src/gallium/drivers/r300/r300_clear.c @@ -20,10 +20,14 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#include "r300_clear.h" + /* This gets its own file because Intel's is in its own file. * I assume there's a good reason. */ -void r300_clear(struct pipe_context* pipe, struct pipe_surface* ps, unsigned val) +void r300_clear(struct pipe_context* pipe, + struct pipe_surface* ps, + unsigned color) { - pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, clearValue); + pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, color); ps->status = PIPE_SURFACE_STATUS_DEFINED; } \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_clear.h b/src/gallium/drivers/r300/r300_clear.h index 58ac0a875c..e24a0690c9 100644 --- a/src/gallium/drivers/r300/r300_clear.h +++ b/src/gallium/drivers/r300/r300_clear.h @@ -20,4 +20,8 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ -void r300_clear(struct pipe_context* pipe, struct pipe_surface* ps, unsigned val); \ No newline at end of file +#include "pipe/p_context.h" + +void r300_clear(struct pipe_context* pipe, + struct pipe_surface* ps, + unsigned color); diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 7fde1404d9..21bee5beae 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -50,5 +50,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, struct radeon_cs_manager* csm = radeon_cs_manager_gem_ctor(fd); r300->cs = cs_gem_create(csm, 64 * 1024 / 4); */ + r300_init_surface_functions(r300); + return &r300->context; -} \ No newline at end of file +} diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index f67823aa1e..ae2dab13ff 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -25,6 +25,8 @@ #include "pipe/p_context.h" +#include "r300_surface.h" + struct r300_context { /* Parent class */ struct pipe_context context; diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 9c89623df3..0a114bbc06 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -119,7 +119,7 @@ static void* r300_surface_map(struct pipe_screen* screen, struct pipe_surface* surface, unsigned flags) { - /* XXX is this all we need to do here? */ + /* XXX this is not quite right */ char* map = pipe_buffer_map(screen, surface->buffer, flags); if (!map) { diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 3e3d813d99..29858eb541 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -23,6 +23,14 @@ #ifndef R300_SURFACE_H #define R300_SURFACE_H +#include "pipe/p_context.h" +#include "pipe/p_screen.h" + +#include "util/u_rect.h" + #include "r300_blit.h" +#include "r300_context.h" + +void r300_init_surface_functions(struct r300_context* r300); #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 4aaaecbfa6fa810899ef04de44f9f79ec4d8134f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 21:50:56 -0800 Subject: A bit of r300 cleanup. --- src/gallium/drivers/r300/r300_context.c | 7 +------ src/gallium/drivers/r300/r300_context.h | 11 +++++++++-- src/gallium/drivers/r300/r300_surface.h | 2 -- src/gallium/winsys/drm/amd/amd_context.c | 6 ++++-- 4 files changed, 14 insertions(+), 12 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.h') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 68751dae17..4050faa74a 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -41,12 +41,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->winsys = amd_winsys; r300->context.winsys = winsys; - if (screen) { - r300->context.screen = screen; - } else { - /* XXX second arg should be pciid, find a way to get it from winsys */ - r300->context.screen = r300_create_screen(winsys, 0x0); - } + r300->context.screen = screen; r300->context.destroy = r300_destroy_context; diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index ae2dab13ff..8393198200 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -23,9 +23,9 @@ #ifndef R300_CONTEXT_H #define R300_CONTEXT_H +#include "draw/draw_context.h" #include "pipe/p_context.h" - -#include "r300_surface.h" +#include "util/u_memory.h" struct r300_context { /* Parent class */ @@ -47,4 +47,11 @@ static struct r300_context* r300_context(struct pipe_context* context) { return (struct r300_context*)context; } +/* Context initialization. */ +void r300_init_surface_functions(struct r300_context* r300); + +struct pipe_context* r300_create_context(struct pipe_screen* screen, + struct pipe_winsys* winsys, + struct amd_winsys* amd_winsys); + #endif /* R300_CONTEXT_H */ \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 29858eb541..0b2fd0b32b 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -31,6 +31,4 @@ #include "r300_blit.h" #include "r300_context.h" -void r300_init_surface_functions(struct r300_context* r300); - #endif /* R300_SURFACE_H */ diff --git a/src/gallium/winsys/drm/amd/amd_context.c b/src/gallium/winsys/drm/amd/amd_context.c index faca7d0c4b..5127cdf261 100644 --- a/src/gallium/winsys/drm/amd/amd_context.c +++ b/src/gallium/winsys/drm/amd/amd_context.c @@ -243,8 +243,10 @@ GLboolean amd_context_create(const __GLcontextModes *visual, } if (GL_TRUE) { - /* XXX "NULL" is a struct pipe_screen* just in case we ever need it... */ - pipe = r300_create_context(NULL, amd_context->pipe_winsys, + amd_context->pipe_screen = r300_create_screen(amd_context->pipe_winsys, + 0x0); + pipe = r300_create_context(amd_context->pipe_screen, + amd_context->pipe_winsys, (struct amd_pipe_winsys*)amd_context->pipe_winsys); } else { pipe = amd_create_softpipe(amd_context); -- cgit v1.2.3 From 22877265f4fdf66c75df391d6de95bd5c1584ea3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 21 Jan 2009 02:21:09 -0800 Subject: [BROKEN] r300: Add initial clear/fill code. Copied from mesa and still broken. Gimme a few to clean it up. --- src/gallium/drivers/r300/r300_cs.h | 24 ++- src/gallium/drivers/r300/r300_surface.c | 357 ++++++++++++++++++++++++++++++-- src/gallium/drivers/r300/r300_surface.h | 2 +- 3 files changed, 364 insertions(+), 19 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.h') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 3dacf25380..59ca985f40 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -26,6 +26,18 @@ #include "r300_reg.h" #include "r300_winsys.h" +/* Pack a 32-bit float into a dword. */ +static uint32_t pack_float_32(float f) +{ + union { + float f; + uint32_t u; + } u; + + u.f = f; + return u.u; +} + /* Yes, I know macros are ugly. However, they are much prettier than the code * that they neatly hide away, and don't have the cost of function setup,so * we're going to use them. */ @@ -47,7 +59,6 @@ struct r300_winsys* cs_winsys = context->winsys; \ struct radeon_cs* cs = cs_winsys->cs - #define CHECK_CS(size) \ cs_winsys->check_cs(cs, (size)) @@ -59,10 +70,19 @@ #define OUT_CS(value) \ cs_winsys->write_cs_dword(cs, value) +#define OUT_CS_32F(value) \ + cs_winsys->write_cs_dword(cs, pack_float_32(value)) + #define OUT_CS_REG(register, value) do { \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); } while (0) +/* Note: This expects count to be the number of registers, + * not the actual packet0 count! */ +#define OUT_CS_REG_SEQ(register, count) do { \ + OUT_CS(CP_PACKET0(register, ((count) - 1))); \ +} while (0) + #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ @@ -74,4 +94,4 @@ #define FLUSH_CS \ cs_winsys->flush_cs(cs) -#endif /* R300_CS_H */ \ No newline at end of file +#endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 4aa469b97e..60efe78c0b 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -22,29 +22,354 @@ #include "r300_surface.h" -/* Provides pipe_context's "surface_fill". */ -static void r300_surface_fill(struct pipe_context* context, +/* Provides pipe_context's "surface_fill". Commonly used for clearing + * buffers. */ +static void r300_surface_fill(struct pipe_context* pipe, struct pipe_surface* dest, unsigned x, unsigned y, unsigned w, unsigned h, unsigned color) { - /* Try accelerated fill first. */ - if (!r300_fill_blit(r300_context(context), - dest->block.size, - (short)dest->stride, - dest->buffer, - dest->offset, - (short)x, (short)y, - (short)w, (short)h, - color)) + struct r300_context* context = r300_context(pipe); + CS_LOCALS(context); + boolean has_tcl = FALSE; + boolean is_r500 = FALSE; + /* Emit a shitload of state, and then draw a point to clear the buffer. + * XXX it goes without saying that this needs to be cleaned up and + * shifted around to work with the rest of the driver's state handling. + */ + /* Sequence starting at R300_VAP_PROG_STREAM_CNTL_0 */ + OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 1); + if (has_tcl) { + OUT_CS(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_0_SHIFT) | ((R300_LAST_VEC | (1 << + R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_1_SHIFT))); + } else { + OUT_CS(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_0_SHIFT) | ((R300_LAST_VEC | (2 << + R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_1_SHIFT))); + } + + /* Disable fog */ + OUT_CS_REG(R300_FG_FOG_BLEND, 0); + OUT_CS_REG(R300_FG_ALPHA_FUNC, 0); + + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, + ((((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | + (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | + (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | + (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | + ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | + R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << + R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE0_SHIFT) | + (((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | + (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | + (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | + (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | + ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | + R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << + R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE1_SHIFT))); + /* R300_VAP_INPUT_CNTL_0, R300_VAP_INPUT_CNTL_1 */ + OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2); + OUT_CS((R300_SEL_USER_COLOR_0 << R300_COLOR_0_ASSEMBLY_SHIFT)); + OUT_CS(R300_INPUT_CNTL_POS | R300_INPUT_CNTL_COLOR | R300_INPUT_CNTL_TC0); + + /* comes from fglrx startup of clear */ + OUT_CS_REG_SEQ(R300_SE_VTE_CNTL, 2); + OUT_CS(R300_VTX_W0_FMT | R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | + R300_VPORT_Z_OFFSET_ENA); + OUT_CS(0x8); + + OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xaaaaaaaa); + + OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); + OUT_CS(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | + R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT); + OUT_CS(0); /* no textures */ + + OUT_CS_REG(R300_TX_ENABLE, 0); + + OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); + OUT_CS_32F(1.0); + OUT_CS_32F(x); + OUT_CS_32F(1.0); + OUT_CS_32F(y); + OUT_CS_32F(1.0); + OUT_CS_32F(0.0); + + OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); + OUT_CS(0x0); + OUT_CS(0x0); + + OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_PS_UCP_MODE_CLIP_AS_TRIFAN | R300_CLIP_DISABLE); + + OUT_CS_REG(R300_GA_POINT_SIZE, ((w * 6) << R300_POINTSIZE_X_SHIFT) | + ((h * 6) << R300_POINTSIZE_Y_SHIFT)); + + if (is_r500) { + OUT_CS_REG_SEQ(R500_RS_IP_0, 8); + for (i = 0; i < 8; ++i) { + OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | + (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); + } + + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + /* XXX could hires be disabled for a speed boost? */ + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x0); + + OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); + } else { + OUT_CS_REG(R300_RS_IP_0, 8); + for (i = 0; i < 8; ++i) { + OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); + } + + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + /* XXX could hires be disabled for a speed boost? */ + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x0); + + OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); + } + + if (is_r500) { + OUT_CS_REG_SEQ(R500_US_CONFIG, 2); + OUT_CS(R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); + OUT_CS(0x0); + OUT_CS_REG_SEQ(R500_US_CODE_ADDR, 3); + OUT_CS(R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(1)); + OUT_CS(R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(1)); + OUT_CS(R500_US_CODE_OFFSET_ADDR(0)); + + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, 0x0); + + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | + R500_INST_LAST | + R500_INST_RGB_OMASK_R | + R500_INST_RGB_OMASK_G | + R500_INST_RGB_OMASK_B | + R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | + R500_INST_ALPHA_CLAMP); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_RGB_ADDR0(0) | + R500_RGB_ADDR1(0) | + R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | + R500_RGB_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_ADDR0(0) | + R500_ALPHA_ADDR1(0) | + R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | + R500_ALPHA_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGB_SEL_A_SRC0 | + R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | + R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | + R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | + R500_ALU_RGB_G_SWIZ_B_B); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_OP_CMP | + R500_ALPHA_SWIZ_A_A | + R500_ALPHA_SWIZ_B_A); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGBA_OP_CMP | + R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | + R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0); + + } else { + OUT_CS_REG_SEQ(R300_US_CONFIG, 3); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS_REG_SEQ(R300_US_CODE_ADDR_0, 4); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(R300_RGBA_OUT); + + OUT_CS_REG(R300_US_ALU_RGB_INST_0, + FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO))); + OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, + FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0)); + OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, + FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO))); + OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, + FP_SELA(0, NO, W, FP_TMP(0), 0, 0)); + } + + /* XXX */ + uint32_t vap_cntl; + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); + if (has_tcl) { + vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) | + (5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (12 << R300_VF_MAX_VTX_NUM_SHIFT)); + if (CHIP_FAMILY_RV515) + vap_cntl |= R500_TCL_STATE_OPTIMIZATION; + } else { + vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) | + (5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (5 << R300_VF_MAX_VTX_NUM_SHIFT)); + } + + if (CHIP_FAMILY_RV515) + vap_cntl |= (2 << R300_PVS_NUM_FPUS_SHIFT); + else if ((CHIP_FAMILY_RV530) || + (CHIP_FAMILY_RV560) || + (CHIP_FAMILY_RV570)) + vap_cntl |= (5 << R300_PVS_NUM_FPUS_SHIFT); + else if ((CHIP_FAMILY_RV410) || + (CHIP_FAMILY_R420)) + vap_cntl |= (6 << R300_PVS_NUM_FPUS_SHIFT); + else if ((CHIP_FAMILY_R520) || + (CHIP_FAMILY_R580)) + vap_cntl |= (8 << R300_PVS_NUM_FPUS_SHIFT); + else + vap_cntl |= (4 << R300_PVS_NUM_FPUS_SHIFT); + + OUT_CS_REG(R300_VAP_CNTL, vap_cntl); + + if (has_tcl) { + OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3); + OUT_CS((0 << R300_PVS_FIRST_INST_SHIFT) | + (0 << R300_PVS_XYZW_VALID_INST_SHIFT) | + (1 << R300_PVS_LAST_INST_SHIFT)); + OUT_CS((0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) | + (0 << R300_PVS_MAX_CONST_ADDR_SHIFT)); + OUT_CS(1 << R300_PVS_LAST_VTX_SRC_INST_SHIFT); + + OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 28)); + OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_ADDRESS, 0x0); + + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, + 0, 0xf, PVS_DST_REG_OUT)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(0, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, + PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, + PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(0, PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 1, 0xf, + PVS_DST_REG_OUT)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(1, PVS_SRC_SELECT_X, + PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, + PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, + VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(1, PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + } + /* Do the actual emit. */ + if (rrb) { + cbpitch = (rrb->pitch / rrb->cpp); + if (rrb->cpp == 4) + cbpitch |= R300_COLOR_FORMAT_ARGB8888; + else + cbpitch |= R300_COLOR_FORMAT_RGB565; + + if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ + cbpitch |= R300_COLOR_TILE_ENABLE; + } + } + + /* TODO in bufmgr */ + cp_wait(r300, R300_WAIT_3D | R300_WAIT_3D_CLEAN); + end_3d(rmesa); + + if (flags & CLEARBUFFER_COLOR) { + assert(rrb != 0); + BEGIN_BATCH_NO_AUTOSTATE(4); + OUT_BATCH_REGSEQ(R300_RB3D_COLOROFFSET0, 1); + OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_BATCH_REGVAL(R300_RB3D_COLORPITCH0, cbpitch); + END_BATCH(); + } +#if 0 + if (flags & (CLEARBUFFER_DEPTH | CLEARBUFFER_STENCIL)) { + assert(rrbd != 0); + cbpitch = (rrbd->pitch / rrbd->cpp); + if (rrbd->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ + cbpitch |= R300_DEPTHMACROTILE_ENABLE; + } + if (rrbd->bo->flags & RADEON_BO_FLAGS_MICRO_TILE){ + cbpitch |= R300_DEPTHMICROTILE_TILED; + } + BEGIN_BATCH_NO_AUTOSTATE(4); + OUT_BATCH_REGSEQ(R300_ZB_DEPTHOFFSET, 1); + OUT_BATCH_RELOC(0, rrbd->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_BATCH_REGVAL(R300_ZB_DEPTHPITCH, cbpitch); + END_BATCH(); + } + { - /* Fallback. */ - void* dest_map = context->screen->surface_map(context->screen, dest, - PIPE_BUFFER_USAGE_CPU_WRITE); - pipe_fill_rect(dest_map, &dest->block, dest->stride, x, y, w, h, color); - context->screen->surface_unmap(context->screen, dest); + uint32_t t1, t2; + + t1 = 0x0; + t2 = 0x0; + + if (flags & CLEARBUFFER_DEPTH) { + t1 |= R300_Z_ENABLE | R300_Z_WRITE_ENABLE; + t2 |= + (R300_ZS_ALWAYS << R300_Z_FUNC_SHIFT); + } + + if (flags & CLEARBUFFER_STENCIL) { + t1 |= R300_STENCIL_ENABLE; + t2 |= + (R300_ZS_ALWAYS << + R300_S_FRONT_FUNC_SHIFT) | + (R300_ZS_REPLACE << + R300_S_FRONT_SFAIL_OP_SHIFT) | + (R300_ZS_REPLACE << + R300_S_FRONT_ZPASS_OP_SHIFT) | + (R300_ZS_REPLACE << + R300_S_FRONT_ZFAIL_OP_SHIFT); + } + + OUT_BATCH_REGSEQ(R300_ZB_CNTL, 3); + OUT_BATCH(t1); + OUT_BATCH(t2); + OUT_BATCH(((ctx->Stencil.WriteMask[0] & R300_STENCILREF_MASK) << + R300_STENCILWRITEMASK_SHIFT) | + (ctx->Stencil.Clear & R300_STENCILREF_MASK)); + END_BATCH(); } +#endif + + OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); + OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | + (1 << R300_PRIM_NUM_VERTICES_SHIFT)); + OUT_CS_32F(w / 2.0); + OUT_CS_32F(h / 2.0); + /* XXX this should be the depth value to clear to */ + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + OUT_CS_32F(color); + OUT_CS_32F(color); + OUT_CS_32F(color); + OUT_CS_32F(color); + + /* XXX cp_wait(rmesa, R300_WAIT_3D | R300_WAIT_3D_CLEAN); */ } void r300_init_surface_functions(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 0b2fd0b32b..e807edd0e3 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -28,7 +28,7 @@ #include "util/u_rect.h" -#include "r300_blit.h" #include "r300_context.h" +#include "r300_cs.h" #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 7d63ff93cbf0f342c3736f4c8fae75157a62f0ea Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 21 Jan 2009 23:12:40 -0800 Subject: r300: Unbreak build, finish clear state. Completely untested, of course. --- src/gallium/drivers/r300/r300_reg.h | 12 +++++++++ src/gallium/drivers/r300/r300_surface.c | 43 +++++++++++++-------------------- src/gallium/drivers/r300/r300_surface.h | 3 +++ 3 files changed, 32 insertions(+), 26 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.h') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 8b3fe431ab..7f4a508b1b 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -3252,6 +3252,18 @@ enum { */ #define R300_CP_CMD_BITBLT_MULTI 0xC0009B00 +/* XXX Corbin's stuff from radeon and r200 */ + +#define RADEON_WAIT_UNTIL 0x1720 +# define RADEON_WAIT_CRTC_PFLIP (1 << 0) +# define RADEON_WAIT_2D_IDLECLEAN (1 << 16) +# define RADEON_WAIT_3D_IDLECLEAN (1 << 17) +# define RADEON_WAIT_HOST_IDLECLEAN (1 << 18) + +#define RADEON_CP_PACKET3 0xC0000000 + +#define R200_3D_DRAW_IMMD_2 0xC0003500 + #endif /* _R300_REG_H */ /* *INDENT-ON* */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 60efe78c0b..8a507d56e6 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -34,6 +34,8 @@ static void r300_surface_fill(struct pipe_context* pipe, CS_LOCALS(context); boolean has_tcl = FALSE; boolean is_r500 = FALSE; + /* For the for loops. */ + int i; /* Emit a shitload of state, and then draw a point to clear the buffer. * XXX it goes without saying that this needs to be cleaned up and * shifted around to work with the rest of the driver's state handling. @@ -239,6 +241,7 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_VAP_CNTL, vap_cntl); + /* XXX unbreak this if (has_tcl) { OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3); OUT_CS((0 << R300_PVS_FIRST_INST_SHIFT) | @@ -252,7 +255,7 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 28)); OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_ADDRESS, 0x0); + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_CODE_START); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 0, 0xf, PVS_DST_REG_OUT)); @@ -278,32 +281,17 @@ static void r300_surface_fill(struct pipe_context* pipe, PVS_SRC_SELECT_FORCE_0, PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); - } - /* Do the actual emit. */ - if (rrb) { - cbpitch = (rrb->pitch / rrb->cpp); - if (rrb->cpp == 4) - cbpitch |= R300_COLOR_FORMAT_ARGB8888; - else - cbpitch |= R300_COLOR_FORMAT_RGB565; - - if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ - cbpitch |= R300_COLOR_TILE_ENABLE; - } - } + } */ /* TODO in bufmgr */ - cp_wait(r300, R300_WAIT_3D | R300_WAIT_3D_CLEAN); - end_3d(rmesa); - - if (flags & CLEARBUFFER_COLOR) { - assert(rrb != 0); - BEGIN_BATCH_NO_AUTOSTATE(4); - OUT_BATCH_REGSEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_BATCH_REGVAL(R300_RB3D_COLORPITCH0, cbpitch); - END_BATCH(); - } + /* XXX this should be split off, also figure out WTF with the numbers */ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + /* XXX might have to switch to 2D */ + + OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); + OUT_CS_RELOC(0, dest->buffer, 0, RADEON_GEM_DOMAIN_VRAM, 0); + /* XXX this needs more TLC (or TCL, as it were) */ + OUT_CS_REG(R300_RB3D_COLORPITCH0, R300_COLOR_FORMAT_ARGB8888); #if 0 if (flags & (CLEARBUFFER_DEPTH | CLEARBUFFER_STENCIL)) { assert(rrbd != 0); @@ -369,7 +357,10 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(color); OUT_CS_32F(color); - /* XXX cp_wait(rmesa, R300_WAIT_3D | R300_WAIT_3D_CLEAN); */ + /* XXX this should be split off, also figure out WTF with the numbers */ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + + FLUSH_CS; } void r300_init_surface_functions(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index e807edd0e3..2d64a95412 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -31,4 +31,7 @@ #include "r300_context.h" #include "r300_cs.h" +/* XXX integrate this into r300_reg */ +#include "r300_fragprog.h" + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From f1ba451bcc7764fd2b92fc8408f6b52c1d670b1f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 03:40:46 -0800 Subject: r300: Set up blend state emit, clean up blend registers. Also add at least one missing register to r300_reg. --- src/gallium/drivers/r300/r300_emit.c | 18 +++++++++----- src/gallium/drivers/r300/r300_reg.h | 2 ++ src/gallium/drivers/r300/r300_surface.c | 42 +++++++++++++++++---------------- src/gallium/drivers/r300/r300_surface.h | 9 +++++-- 4 files changed, 43 insertions(+), 28 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.h') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 19bfcbdd5b..de606cfab7 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -26,6 +26,17 @@ #include "r300_cs.h" #include "r300_screen.h" +void r300_emit_blend_state(struct r300_context* r300, + struct r300_blend_state* blend) +{ + CS_LOCALS(r300); + OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); + OUT_CS(blend->blend_control); + OUT_CS(blend->alpha_blend_control); + OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop); + OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither); +} + static void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; @@ -38,12 +49,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) /* XXX check size */ if (r300->dirty_state & R300_NEW_BLEND) { - struct r300_blend_state* blend = r300->blend_state; - /* XXX next two are contiguous regs */ - OUT_CS_REG(R300_RB3D_CBLEND, blend->blend_control); - OUT_CS_REG(R300_RB3D_ABLEND, blend->alpha_blend_control); - OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop); - OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither); + r300_emit_blend_state(r300, r300->blend_state); } if (r300->dirty_state & R300_NEW_BLEND_COLOR) { diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 7f4a508b1b..c1796ad7a8 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -151,6 +151,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_VTX_W0_FMT (1 << 10) # define R300_SERIAL_PROC_ENA (1 << 11) +#define R300_VAP_VTX_SIZE 0x20b4 + /* BEGIN: Vertex data assembly - lots of uncertainties */ /* gap */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 9a4b3455d1..6c7784dd4d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -43,24 +43,30 @@ static void r300_surface_fill(struct pipe_context* pipe, BEGIN_CS(276); R300_PACIFY; -OUT_CS_REG(0x4100, 0x00000000); +OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; +/* Viewport setup */ OUT_CS_REG(0x1D98, 0x43000000); OUT_CS_REG(0x1D9C, 0x43002000); OUT_CS_REG(0x1DA0, 0xC3000000); OUT_CS_REG(0x1DA4, 0x43002000); OUT_CS_REG(0x1DA8, 0x3F000000); OUT_CS_REG(0x1DAC, 0x3F000000); -OUT_CS_REG(0x2284, 0x00000000); -OUT_CS_REG(0x20B0, 0x0000043F); -OUT_CS_REG(0x20B4, 0x00000008); -OUT_CS_REG(0x2134, 0x00FFFFFF); -OUT_CS_REG(0x2138, 0x00000000); -OUT_CS_REG(0x2140, 0x00000000); -OUT_CS_REG(0x2150, 0x00000000); -OUT_CS_REG(0x21E0, 0x00000000); -OUT_CS_REG(0x2180, 0x00000000); -OUT_CS_REG(0x2184, 0x00000000); +/* Flush PVS. */ +OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); + +OUT_CS_REG(R300_SE_VTE_CNTL, R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | + R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT); +/* Vertex size. */ +OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); +/* Max and min vertex index clamp. */ +OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF); +OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); +/* XXX endian */ +OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); +OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); OUT_CS_REG(0x21DC, 0xAAAAAAAA); OUT_CS_REG(0x221C, 0x00000000); OUT_CS_REG(0x2220, 0x3F800000); @@ -149,12 +155,8 @@ OUT_CS_REG(0x4BD4, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4E00, 0x00000000); -OUT_CS_REG(0x4E04, 0x20210000); -OUT_CS_REG(0x4E08, 0x20210000); OUT_CS_REG(0x4E0C, 0x0000000F); OUT_CS_REG(0x4E10, 0x00000000); -OUT_CS_REG(0x4E18, 0x00000000); -OUT_CS_REG(0x4E50, 0x00000000); OUT_CS_REG(0x4E54, 0x00000000); OUT_CS_REG(0x4E58, 0x00000000); OUT_CS_REG(0x4E5C, 0x00000000); @@ -243,9 +245,9 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2150, 0x21030003); OUT_CS_REG(0x4BC0, 0x00000000); -OUT_CS_REG(0x21E0, 0xF688F688); -OUT_CS_REG(0x2180, 0x00000001); -OUT_CS_REG(0x2184, 0x00000405); +OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); +OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); +OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); OUT_CS_REG(0x20B0, 0x0000043F); OUT_CS_REG(0x20B4, 0x00000008); OUT_CS_REG(0x21DC, 0xAAAAAAAA); @@ -259,8 +261,8 @@ OUT_CS_REG(0x1DA4, 0x00000000); OUT_CS_REG(0x1DA8, 0x3F800000); OUT_CS_REG(0x1DAC, 0x00000000); OUT_CS_REG(0x4BD4, 0x00000000); -OUT_CS_REG(0x4E04, 0x00000000); -OUT_CS_REG(0x4E08, 0x00000000); +r300_emit_blend_state(r300, &blend_clear_state); +/* XXX emit blend state */ OUT_CS_REG(0x221C, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 2d64a95412..6d71601b98 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -30,8 +30,13 @@ #include "r300_context.h" #include "r300_cs.h" +#include "r300_emit.h" -/* XXX integrate this into r300_reg */ -#include "r300_fragprog.h" +const struct r300_blend_state blend_clear_state = { + .blend_control = 0x0, + .alpha_blend_control = 0x0, + .rop = 0x0, + .dither = 0x0, +}; #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From bea0c5812bd2795b514725d2a3788add3dc209af Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 04:04:57 -0800 Subject: r300: Add blend color state emit. Slow and steady wins the race. Or something like that. --- src/gallium/drivers/r300/r300_emit.c | 40 ++++++++++++++++++++------------- src/gallium/drivers/r300/r300_emit.h | 31 +++++++++++++++++++++++++ src/gallium/drivers/r300/r300_surface.c | 6 ++++- src/gallium/drivers/r300/r300_surface.h | 6 +++++ 4 files changed, 67 insertions(+), 16 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_emit.h (limited to 'src/gallium/drivers/r300/r300_surface.h') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index de606cfab7..e091352c3b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -22,24 +22,44 @@ /* r300_emit: Functions for emitting state. */ -#include "r300_context.h" -#include "r300_cs.h" -#include "r300_screen.h" +#include "r300_emit.h" void r300_emit_blend_state(struct r300_context* r300, struct r300_blend_state* blend) { CS_LOCALS(r300); + BEGIN_CS(7); OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); OUT_CS(blend->blend_control); OUT_CS(blend->alpha_blend_control); OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop); OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither); + END_CS; +} + +void r300_emit_blend_color_state(struct r300_context* r300, + struct r300_blend_color_state* bc) +{ + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; + CS_LOCALS(r300); + if (r300screen->caps->is_r500) { + BEGIN_CS(3); + OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2); + OUT_CS(bc->blend_color_red_alpha); + OUT_CS(bc->blend_color_green_blue); + END_CS; + } else { + BEGIN_CS(2); + OUT_CS_REG(R300_RB3D_BLEND_COLOR, bc->blend_color); + END_CS; + } } static void r300_emit_dirty_state(struct r300_context* r300) { - struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; CS_LOCALS(r300); if (!(r300->dirty_state) && !(r300->dirty_hw)) { @@ -53,17 +73,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) } if (r300->dirty_state & R300_NEW_BLEND_COLOR) { - struct r300_blend_color_state* blend_color = r300->blend_color_state; - if (r300screen->caps->is_r500) { - /* XXX next two are contiguous regs */ - OUT_CS_REG(R500_RB3D_CONSTANT_COLOR_AR, - blend_color->blend_color_red_alpha); - OUT_CS_REG(R500_RB3D_CONSTANT_COLOR_GB, - blend_color->blend_color_green_blue); - } else { - OUT_CS_REG(R300_RB3D_BLEND_COLOR, - blend_color->blend_color); - } + r300_emit_blend_color_state(r300, r300->blend_color_state); } if (r300->dirty_state & R300_NEW_DSA) { diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h new file mode 100644 index 0000000000..5756b6acf4 --- /dev/null +++ b/src/gallium/drivers/r300/r300_emit.h @@ -0,0 +1,31 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_context.h" +#include "r300_cs.h" +#include "r300_screen.h" + +void r300_emit_blend_state(struct r300_context* r300, + struct r300_blend_state* blend); + +void r300_emit_blend_color_state(struct r300_context* r300, + struct r300_blend_color_state* bc); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 6c7784dd4d..2e5a572f47 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -156,6 +156,9 @@ OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4E00, 0x00000000); OUT_CS_REG(0x4E0C, 0x0000000F); + +r300_emit_blend_color_state(r300, &blend_color_clear_state); + OUT_CS_REG(0x4E10, 0x00000000); OUT_CS_REG(0x4E54, 0x00000000); OUT_CS_REG(0x4E58, 0x00000000); @@ -261,8 +264,9 @@ OUT_CS_REG(0x1DA4, 0x00000000); OUT_CS_REG(0x1DA8, 0x3F800000); OUT_CS_REG(0x1DAC, 0x00000000); OUT_CS_REG(0x4BD4, 0x00000000); + r300_emit_blend_state(r300, &blend_clear_state); -/* XXX emit blend state */ + OUT_CS_REG(0x221C, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 6d71601b98..8ec7151f4d 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -39,4 +39,10 @@ const struct r300_blend_state blend_clear_state = { .dither = 0x0, }; +const struct r300_blend_color_state blend_color_clear_state = { + .blend_color = 0x0, + .blend_color_red_alpha = 0x0, + .blend_color_green_blue = 0x0, +}; + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 2e635ef563e2bff50e7a2af4f505bbd066865723 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 04:48:19 -0800 Subject: r300: Add dsa state emit. Seeing a pattern yet? --- src/gallium/drivers/r300/r300_emit.c | 31 ++++++++++++++++++++----------- src/gallium/drivers/r300/r300_emit.h | 3 +++ src/gallium/drivers/r300/r300_surface.c | 9 +++------ src/gallium/drivers/r300/r300_surface.h | 10 ++++++++++ 4 files changed, 36 insertions(+), 17 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.h') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index e091352c3b..d8de766c31 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -56,6 +56,25 @@ void r300_emit_blend_color_state(struct r300_context* r300, } } +void r300_emit_dsa_state(struct r300_context* r300, + struct r300_dsa_state* dsa) +{ + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; + CS_LOCALS(r300); + BEGIN_CS(r300screen->caps->is_r500 ? 12 : 10); + OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); + OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); + OUT_CS(dsa->z_buffer_control); + OUT_CS(dsa->z_stencil_control); + OUT_CS(dsa->stencil_ref_mask); + OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); + if (r300screen->caps->is_r500) { + OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); + } +} + static void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = @@ -77,17 +96,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) } if (r300->dirty_state & R300_NEW_DSA) { - struct r300_dsa_state* dsa = r300->dsa_state; - OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); - OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); - /* XXX next three are contiguous regs */ - OUT_CS_REG(R300_ZB_CNTL, dsa->z_buffer_control); - OUT_CS_REG(R300_ZB_ZSTENCILCNTL, dsa->z_stencil_control); - OUT_CS_REG(R300_ZB_STENCILREFMASK, dsa->stencil_ref_mask); - OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); - if (r300screen->caps->is_r500) { - OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); - } + r300_emit_dsa_state(r300, r300->dsa_state); } if (r300->dirty_state & R300_NEW_RASTERIZER) { diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 5756b6acf4..98287bc1f3 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -29,3 +29,6 @@ void r300_emit_blend_state(struct r300_context* r300, void r300_emit_blend_color_state(struct r300_context* r300, struct r300_blend_color_state* bc); + +void r300_emit_dsa_state(struct r300_context* r300, + struct r300_dsa_state* dsa); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 2e5a572f47..aab1850144 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -151,7 +151,6 @@ OUT_CS_REG(0x4BC0, 0x00000002); OUT_CS_REG(0x4BC8, 0x00000000); OUT_CS_REG(0x4BCC, 0x00000000); OUT_CS_REG(0x4BD0, 0x00000000); -OUT_CS_REG(0x4BD4, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4E00, 0x00000000); @@ -175,7 +174,6 @@ OUT_CS_REG(0x4F00, 0x00000010); OUT_CS_REG(0x4F04, 0x00038038); OUT_CS_REG(0x4F08, 0x00FFFF00); OUT_CS_REG(0x4F10, 0x00000002); -OUT_CS_REG(0x4F14, 0x00000001); OUT_CS_REG(0x4F18, 0x00000003); OUT_CS_REG(0x4F1C, 0x00000000); OUT_CS_REG(0x4F28, 0x00000000); @@ -313,15 +311,14 @@ OUT_CS_REG(0x2208, 0x00F02203); OUT_CS_REG(0x2208, 0x00D10021); OUT_CS_REG(0x2208, 0x01248021); OUT_CS_REG(0x2208, 0x00000000); + +r300_emit_dsa_state(r300, &dsa_clear_state); + R300_PACIFY; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); //OUT_CS_REG(0x4E38, 0x00C00100); OUT_CS_REG(0x4E0C, 0x0000000F); -OUT_CS_REG(0x4F00, 0x00000000); -OUT_CS_REG(0x4F04, 0x00000000); -OUT_CS_REG(0x4F08, 0x00FF0000); - /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 8ec7151f4d..2b89698ca5 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -45,4 +45,14 @@ const struct r300_blend_color_state blend_color_clear_state = { .blend_color_green_blue = 0x0, }; +const struct r300_dsa_state dsa_clear_state = { + .alpha_function = 0x0, + .alpha_reference = 0x0, + .z_buffer_control = 0x0, + .z_stencil_control = 0x0, + .stencil_ref_mask = 0x0, + .z_buffer_top = R300_ZTOP_ENABLE, + .stencil_ref_bf = 0x0, +}; + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From c199f330322921e01c8c30e3ea69a2a5291ae8ee Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 28 Jan 2009 21:33:35 -0800 Subject: r300: Unbreak emit, fix up a bunch of little things. --- src/gallium/drivers/r300/r300_cs.h | 9 +++- src/gallium/drivers/r300/r300_emit.c | 7 +++- src/gallium/drivers/r300/r300_surface.c | 73 +++++++++++++++++---------------- src/gallium/drivers/r300/r300_surface.h | 2 +- 4 files changed, 50 insertions(+), 41 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.h') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index d15887fb1c..734ccb13d9 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -85,7 +85,9 @@ static uint32_t pack_float_32(float f) } while (0) #define OUT_CS_REG(register, value) do { \ - debug_printf("r300: writing 0x%08X to register 0x%04X\n", value, register); \ + debug_printf("r300: writing 0x%08X to register 0x%04X\n", \ + value, register); \ + assert(register); \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); \ } while (0) @@ -93,13 +95,16 @@ static uint32_t pack_float_32(float f) /* Note: This expects count to be the number of registers, * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ - debug_printf("r300: writing register sequence of %d to 0x%04X\n", count, register); \ + debug_printf("r300: writing register sequence of %d to 0x%04X\n", \ + count, register); \ + assert(register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ debug_printf("r300: writing relocation for buffer %p, offset %d\n", \ bo, offset); \ + assert(bo); \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 4ae8a46637..c5f08a2404 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -62,9 +62,12 @@ void r300_emit_dsa_state(struct r300_context* r300, struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; CS_LOCALS(r300); - BEGIN_CS(r300screen->caps->is_r500 ? 12 : 10); + BEGIN_CS(r300screen->caps->is_r500 ? 12 : 8); OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); - OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + /* XXX figure out the r300 counterpart for this */ + if (r300screen->caps->is_r500) { + OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + } OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); OUT_CS(dsa->z_buffer_control); OUT_CS(dsa->z_stencil_control); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index f2d0183c98..185b56ff88 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,17 +42,10 @@ static void r300_surface_fill(struct pipe_context* pipe, " dimensions %dx%d, color 0x%x\n", dest, x, y, w, h, color); -BEGIN_CS((caps->is_r500) ? 367 : 276); +BEGIN_CS((caps->is_r500) ? 367 : 322); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; -/* Viewport setup */ -OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x43000000); -OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x43002000); -OUT_CS_REG(R300_SE_VPORT_YSCALE, 0xC3000000); -OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x43002000); -OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F000000); -OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x3F000000); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -71,7 +64,7 @@ OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); /* XXX magic number not in r300_reg */ OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0); -OUT_CS_REG(R300_VAP_GB_VERT_CLIP_ADJ, 4); +OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); OUT_CS_32F(1.0); OUT_CS_32F(1.0); OUT_CS_32F(1.0); @@ -149,9 +142,6 @@ OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); -r300_emit_blend_color_state(r300, &blend_color_clear_state); - -OUT_CS_REG(R300_RB3D_BLEND_COLOR, 0x00000000); /* XXX: Oh the wonderful unknown */ OUT_CS_REG_SEQ(0x4E54, 8); for (i = 0; i < 8; i++) @@ -184,16 +174,16 @@ OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); OUT_CS_REG(R300_TX_ENABLE, 0x0); -OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x3F800000); -OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x00000000); -OUT_CS_REG(R300_SE_VPORT_YSCALE, 0x3F800000); -OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x00000000); -OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F800000); -OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x00000000); +/* XXX viewport setup */ +OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); +OUT_CS_32F(1.0); +OUT_CS_32F(0.0); +OUT_CS_32F(1.0); +OUT_CS_32F(0.0); +OUT_CS_32F(1.0); +OUT_CS_32F(0.0); OUT_CS_REG(R300_FG_ALPHA_FUNC, 0x00000000); -r300_emit_blend_state(r300, &blend_clear_state); - OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); @@ -262,22 +252,22 @@ if (caps->is_r500) { for (i = 0; i < 8; i++) { OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); } -} -OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); -OUT_CS_REG(R300_RS_INST_COUNT, 0x0); + OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS_REG(R300_RS_INST_COUNT, 0x0); -OUT_CS_REG(R300_RS_INST_0, 0x00004000); -OUT_CS_REG(R300_US_CONFIG, 0x00000000); -OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); -OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000); -OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80); -OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); -OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); -OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000); + OUT_CS_REG(R300_RS_INST_0, 0x00004000); + OUT_CS_REG(R300_US_CONFIG, 0x00000000); + OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); + OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000); + OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80); + OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); + OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); + OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000); +} /* XXX these magic numbers should be explained when * this becomes a cached state object */ OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | @@ -300,12 +290,23 @@ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +r300_emit_blend_state(r300, &blend_clear_state); +r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); R300_PACIFY; +/* Flush colorbuffer and blend caches. */ +OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, + R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D | + R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_SIGNAL); +OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, + R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | + R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); + OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); -//OUT_CS_REG(R300_RB3D_COLORPITCH0, 0x00C00100); +OUT_CS_REG(R300_RB3D_COLORPITCH0, (w >> 1) | R300_COLOR_TILE_ENABLE | + R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 2b89698ca5..e1d53116a1 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -50,7 +50,7 @@ const struct r300_dsa_state dsa_clear_state = { .alpha_reference = 0x0, .z_buffer_control = 0x0, .z_stencil_control = 0x0, - .stencil_ref_mask = 0x0, + .stencil_ref_mask = R300_STENCILWRITEMASK_MASK, .z_buffer_top = R300_ZTOP_ENABLE, .stencil_ref_bf = 0x0, }; -- cgit v1.2.3 From 0d60a3f33cbc071fb5aca95b96f35908059b0435 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Feb 2009 20:20:41 -0800 Subject: r300-gallium: r300 passthrough shader, static shader objects, and clear code. --- src/gallium/drivers/r300/r300_emit.c | 31 ++++++++----- src/gallium/drivers/r300/r300_state_shader.c | 51 ++-------------------- src/gallium/drivers/r300/r300_state_shader.h | 53 +++++++++++++++++++++++ src/gallium/drivers/r300/r300_surface.c | 65 +++++----------------------- src/gallium/drivers/r300/r300_surface.h | 1 + 5 files changed, 89 insertions(+), 112 deletions(-) (limited to 'src/gallium/drivers/r300/r300_surface.h') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 634a72991c..8391663f7f 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -115,23 +115,32 @@ void r500_emit_fragment_shader(struct r300_context* r300, { CS_LOCALS(r300); int i; - - BEGIN_CS(8 + (fs->instruction_count * 6) + 6); + /* XXX Problem: OUT_CS_ONE_REG causes card crash */ + /* BEGIN_CS(8 + (shader->shader.instruction_count * 6) + 6); */ + BEGIN_CS(10 + (shader->shader.instruction_count * 12)); OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(fs->instruction_count)); OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR); - OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, - fs->instruction_count * 6); - for (i = 0; i < fs->instruction_count; i++) { - OUT_CS(fs->instructions[i].inst0); - OUT_CS(fs->instructions[i].inst1); - OUT_CS(fs->instructions[i].inst2); - OUT_CS(fs->instructions[i].inst3); - OUT_CS(fs->instructions[i].inst4); - OUT_CS(fs->instructions[i].inst5); + /* OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, + shader->shader.instruction_count * 6); + for (i = 0; i < shader->shader.instruction_count; i++) { + OUT_CS(shader->instructions[i].inst0); + OUT_CS(shader->instructions[i].inst1); + OUT_CS(shader->instructions[i].inst2); + OUT_CS(shader->instructions[i].inst3); + OUT_CS(shader->instructions[i].inst4); + OUT_CS(shader->instructions[i].inst5); + } */ + for (i = 0; i < shader->shader.instruction_count; i++) { + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst0); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst1); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst2); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst3); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst4); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst5); } R300_PACIFY; END_CS; diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 824dbeb0aa..352cb62df7 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -22,59 +22,16 @@ #include "r300_state_shader.h" -void r300_make_passthrough_fragment_shader(struct r300_fragment_shader* fs) -{ - fs->alu_instruction_count = 1; - fs->tex_instruction_count = 0; - fs->indirections = 1; - fs->shader.stack_size = 2; - - /* XXX decode these */ - fs->instructions[0].alu_rgb_inst = 0x50A80; - fs->instructions[0].alu_rgb_inst = 0x1C000000; - fs->instructions[0].alu_alpha_inst = 0x40889; - fs->instructions[0].alu_alpha_inst = 0x1000000; -} - -void r500_make_passthrough_fragment_shader(struct r500_fragment_shader* fs) -{ - fs->instruction_count = 1; - fs->shader.stack_size = 0; - - fs->instructions[0].inst0 = R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | - R500_INST_LAST | - R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; - fs->instructions[0].inst1 = - R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST; - fs->instructions[0].inst2 = - R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST; - fs->instructions[0].inst3 = - R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B; - fs->instructions[0].inst4 = - R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A; - fs->instructions[0].inst5 = - R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0; - - fs->shader.translated = true; -} - void r300_translate_shader(struct r300_context* r300, struct r300_fragment_shader* fs) { - r300_make_passthrough_fragment_shader(fs); + /* XXX fix this at some point */ + *fs = r300_passthrough_fragment_shader; } void r500_translate_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { - r500_make_passthrough_fragment_shader(fs); + /* XXX fix this at some point */ + *fs = r500_passthrough_fragment_shader; } diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 030ecaa56e..8e9ed5d59e 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -33,4 +33,57 @@ void r300_translate_shader(struct r300_context* r300, void r500_translate_shader(struct r300_context* r300, struct r500_fragment_shader* fs); +static const struct r300_fragment_shader r300_passthrough_fragment_shader = { + /* XXX This is the emission code. TODO: decode + OUT_CS_REG(R300_US_CONFIG, 0); + OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); + OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); + OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); */ + .alu_instruction_count = 1; + .tex_instruction_count = 0; + .indirections = 1; + .shader.stack_size = 2; + + /* XXX decode these */ + .instructions[0].alu_rgb_inst = 0x50A80; + .instructions[0].alu_rgb_inst = 0x1C000000; + .instructions[0].alu_alpha_inst = 0x40889; + .instructions[0].alu_alpha_inst = 0x1000000; +}; + +static const struct r500_fragment_shader r500_passthrough_fragment_shader = { + .shader.stack_size = 0, + .instruction_count = 1, + .instructions[0].inst0 = R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, + .instructions[0].inst1 = + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, + .instructions[0].inst2 = + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, + .instructions[0].inst3 = + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, + .instructions[0].inst4 = + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, + .instructions[0].inst5 = + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0, + .shader.translated = TRUE, +}; + #endif /* R300_STATE_SHADER_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 4bd8a25460..54ab778ce7 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -54,7 +54,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } - BEGIN_CS((caps->is_r500 ? 222 : 213) + (caps->has_tcl ? 34 : 4)); + BEGIN_CS(172 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -197,7 +197,7 @@ static void r300_surface_fill(struct pipe_context* pipe, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); - /* XXX RS block and fp setup */ + /* RS block setup */ if (caps->is_r500) { /* XXX We seem to be in disagreement about how many of these we have * RS:RS_IP_[0-15] [R/W] 32 bits Access: 8/16/32 MMReg:0x4074-0x40b0 @@ -213,40 +213,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); OUT_CS(0x00000000); OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); - - OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); - OUT_CS_REG(R500_US_PIXSIZE, 0x00000000); - OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | - R500_US_CODE_END_ADDR(1)); - OUT_CS_REG(R500_US_CODE_RANGE, R500_US_CODE_RANGE_ADDR(0) | - R500_US_CODE_RANGE_SIZE(1)); - OUT_CS_REG(R500_US_CODE_OFFSET, R500_US_CODE_OFFSET_ADDR(0)); - R300_PACIFY; - OUT_CS_REG(R500_GA_US_VECTOR_INDEX, - 0 | R500_GA_US_VECTOR_INDEX_TYPE_INSTR); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST | - R500_INST_RGB_OMASK_R | R500_INST_RGB_OMASK_G | - R500_INST_RGB_OMASK_B | R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | - R500_ALPHA_ADDR1_CONST | R500_ALPHA_ADDR2(0) | - R500_ALPHA_ADDR2_CONST); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0); } else { OUT_CS_REG_SEQ(R300_RS_IP_0, 8); for (i = 0; i < 8; i++) { @@ -258,26 +224,17 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX Shouldn't this be 0? */ OUT_CS(1); OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); + } + END_CS; - /* XXX magic numbers */ - OUT_CS_REG(R300_US_CONFIG, 0); - OUT_CS_REG(R300_US_PIXSIZE, 2); - OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); - OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x50A80); - OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); - OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x40889); - OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1000000); - OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); - OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); + /* Fragment shader setup */ + if (caps->is_r500) { + r500_emit_fragment_shader(r300, &r500_passthrough_fragment_shader); + } else { + r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); } + + BEGIN_CS(2 + (caps->has_tcl ? 30 : 2)); /* XXX these magic numbers should be explained when * this becomes a cached state object */ if (caps->has_tcl) { diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index e1d53116a1..17d6c62fe8 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -31,6 +31,7 @@ #include "r300_context.h" #include "r300_cs.h" #include "r300_emit.h" +#include "r300_state_shader.h" const struct r300_blend_state blend_clear_state = { .blend_control = 0x0, -- cgit v1.2.3