From da1928d4a6d48e915960798015ed1f0c1fa95f0c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 5 Jan 2009 23:55:00 -0800 Subject: gallium-r300: Initial commit. Or should it be r300-gallium? Meh, whatever. --- src/gallium/drivers/r300/r300_context.c | 27 ++++++++ src/gallium/drivers/r300/r300_context.h | 4 ++ src/gallium/drivers/r300/r300_screen.c | 119 ++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_state.c | 22 ++++++ 4 files changed, 172 insertions(+) create mode 100644 src/gallium/drivers/r300/r300_context.c create mode 100644 src/gallium/drivers/r300/r300_context.h create mode 100644 src/gallium/drivers/r300/r300_screen.c create mode 100644 src/gallium/drivers/r300/r300_state.c (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c new file mode 100644 index 0000000000..a2ed0270cb --- /dev/null +++ b/src/gallium/drivers/r300/r300_context.c @@ -0,0 +1,27 @@ +#include "r300_context.h" + +static void r300_destroy_context(struct pipe_context* pipe) { + struct r300_context* context = r300_context(pipe); + + draw_destroy(context->draw); + + FREE(context); +} + +struct pipe_context* r300_create_context(struct pipe_screen* screen, + struct pipe_winsys* winsys, + struct amd_winsys* amd_winsys) +{ + struct r300_context* context = CALLOC_STRUCT(r300_context); + + if (!context) + return NULL; + + context->winsys = amd_winsys; + context->pipe.winsys = winsys; + context->pipe.screen = screen; + + context->pipe.destroy = r300_destroy_context; + + return &context->pipe; +} \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h new file mode 100644 index 0000000000..cd4b56c827 --- /dev/null +++ b/src/gallium/drivers/r300/r300_context.h @@ -0,0 +1,4 @@ +/* Convenience cast wrapper. */ +static struct r300_context* r300_context(struct pipe_context* pipe) { + return (struct r300_context*)pipe; +} \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c new file mode 100644 index 0000000000..a1f056b810 --- /dev/null +++ b/src/gallium/drivers/r300/r300_screen.c @@ -0,0 +1,119 @@ +/* XXX put a copyright here */ + +/* I know my style's weird, get used to it */ + +static const char* r300_get_vendor(struct pipe_screen* pscreen) { + return "X.Org R300 Project"; +} + +static const char* r300_get_name(struct pipe_screen* pscreen) { + /* XXX lazy */ + return "unknown"; +} + +static int r300_get_param(struct pipe_screen* pscreen, int param) { + switch (param) { + /* Cases marked "IN THEORY" are possible on the hardware, + * but haven't been implemented yet. */ + case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: + /* XXX I'm told this goes up to 16 */ + return 8; + case PIPE_CAP_NPOT_TEXTURES: + /* IN THEORY */ + return 0; + case PIPE_CAP_S3TC: + /* IN THEORY */ + return 0; + case PIPE_CAP_TWO_SIDED_STENCIL: + /* IN THEORY */ + return 0; + case PIPE_CAP_ANISOTROPIC_FILTER: + /* IN THEORY */ + return 0; + case PIPE_CAP_POINT_SPRITE: + /* IN THEORY */ + return 0; + case PIPE_CAP_OCCLUSION_QUERY: + /* IN THEORY */ + return 0; + case PIPE_CAP_TEXTURE_SHADOW_MAP: + /* IN THEORY */ + return 0; + case PIPE_CAP_GLSL: + /* IN THEORY */ + return 0; + case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: + /* 12 == 2048x2048 + * R500 can do 4096x4096 */ + return 12; + case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: + /* XXX educated guess */ + return 8; + case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: + /* XXX educated guess */ + return 11; + case PIPE_CAP_MAX_RENDER_TARGETS: + /* XXX 4 eventually */ + return 1; + default: + return 0; + } +} + +static float r300_get_paramf(struct pipe_screen* pscreen, float param) { + switch (param) { + case PIPE_CAP_MAX_LINE_WIDTH: + case PIPE_CAP_MAX_LINE_WIDTH_AA: + /* XXX look this up, lazy ass! */ + return 0.0; + case PIPE_CAP_MAX_POINT_WIDTH: + case PIPE_CAP_MAX_POINT_WIDTH_AA: + /* XXX see above */ + return 255.0; + case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: + return 16.0; + case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: + /* XXX again... */ + return 16.0; + default: + return 0.0; + } +} + +static boolean r300_is_format_supported(struct pipe_screen* pscreen, + enum pipe_format format, uint type) +{ + return FALSE; +} + +static r300_destroy_screen(struct pipe_screen* pscreen) { + FREE(pscreen); +} + +struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, uint pci_id) { + struct r300_screen* r300screen = CALLOC_STRUCT(r300_screen); + + if (!r300screen) + return NULL; + + /* XXX break this into its own function? */ + switch (pci_id) { + default: + debug_printf("%s: unknown PCI ID 0x%x, cannot create screen!\n", + __FUNCTION__, pci_id); + return NULL; + } + + r300screen->pci_id = pci_id; + r300screen->screen.winsys = winsys; + r300screen->screen.destroy = r300_destroy_screen; + r300screen->screen.get_name = r300_get_name; + r300screen->screen.get_vendor = r300_get_vendor; + r300screen->screen.get_param = r300_get_param; + r300screen->screen.get_paramf = r300_get_paramf; + r300screen->screen.is_format_supported = r300_is_format_supported; + r300screen->screen.surface_map = r300_surface_map; + r300screen->screen.surface_unmap = r300_surface_unmap; + + return &r300screen->screen; +} diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c new file mode 100644 index 0000000000..18b3d55752 --- /dev/null +++ b/src/gallium/drivers/r300/r300_state.c @@ -0,0 +1,22 @@ +#include "r300_context.h" + +static void* r300_create_vs_state(struct pipe_context* pipe, + struct pipe_shader_state* state) +{ + struct r300_context* context = r300_context(pipe); + /* XXX handing this off to Draw for now */ + return draw_create_vertex_shader(context->draw, state); +} + +static void r300_bind_vs_state(struct pipe_context* pipe, void* state) { + struct r300_context* context = r300_context(pipe); + /* XXX handing this off to Draw for now */ + draw_bind_vertex_shader(context->draw, (struct draw_vertex_shader*)state); +} + +static void r300_delete_vs_state(struct pipe_context* pipe, void* state) +{ + struct r300_context* context = r300_context(pipe); + /* XXX handing this off to Draw for now */ + draw_delete_vertex_shader(context->draw, (struct draw_vertex_shader*)state); +} \ No newline at end of file -- cgit v1.2.3 From aa96874c7abffa3fa9eef47ea36ab473ad2d2272 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 8 Jan 2009 14:41:29 -0800 Subject: gallium-r300: Add some headers. Oh yeah, we're cookin' now! --- src/gallium/drivers/r300/r300_context.h | 29 ++++++++++++++++++++++++++- src/gallium/drivers/r300/r300_screen.h | 35 +++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_state.h | 26 ++++++++++++++++++++++++ 3 files changed, 89 insertions(+), 1 deletion(-) create mode 100644 src/gallium/drivers/r300/r300_screen.h create mode 100644 src/gallium/drivers/r300/r300_state.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index cd4b56c827..28363fd36c 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -1,4 +1,31 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_CONTEXT_H +#define R300_CONTEXT_H + /* Convenience cast wrapper. */ static struct r300_context* r300_context(struct pipe_context* pipe) { return (struct r300_context*)pipe; -} \ No newline at end of file +} + +#endif /* R300_CONTEXT_H */ \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h new file mode 100644 index 0000000000..aa12c29a99 --- /dev/null +++ b/src/gallium/drivers/r300/r300_screen.h @@ -0,0 +1,35 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_SCREEN_H +#define R300_SCREEN_H + +struct r300_screen { + /* Parent class */ + struct pipe_screen screen; + + boolean is_r400; + boolean is_r500; + int pci_id; +} + +#endif /* R300_SCREEN_H */ diff --git a/src/gallium/drivers/r300/r300_state.h b/src/gallium/drivers/r300/r300_state.h new file mode 100644 index 0000000000..861425936a --- /dev/null +++ b/src/gallium/drivers/r300/r300_state.h @@ -0,0 +1,26 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_STATE_H +#define R300_STATE_H + +#endif /* R300_STATE_H */ \ No newline at end of file -- cgit v1.2.3 From 3e09a07a265d5ee75b110954d160a73d83793c40 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 8 Jan 2009 14:52:47 -0800 Subject: gallium-r300: Look less like i915. Todo: - Figure out how much code goes in winsys. - Make it build. - Make it suck less. --- src/gallium/drivers/r300/r300_context.c | 8 ++++---- src/gallium/drivers/r300/r300_context.h | 8 ++++++++ 2 files changed, 12 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index a2ed0270cb..4aef5030fc 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -18,10 +18,10 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, return NULL; context->winsys = amd_winsys; - context->pipe.winsys = winsys; - context->pipe.screen = screen; + context->context.winsys = winsys; + context->context.screen = screen; - context->pipe.destroy = r300_destroy_context; + context->context.destroy = r300_destroy_context; - return &context->pipe; + return &context->context; } \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 28363fd36c..fd344361d9 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -23,6 +23,14 @@ #ifndef R300_CONTEXT_H #define R300_CONTEXT_H +struct r300_context { + /* Parent class */ + struct pipe_context context; + + struct amd_winsys* winsys; + struct draw_context* draw; +} + /* Convenience cast wrapper. */ static struct r300_context* r300_context(struct pipe_context* pipe) { return (struct r300_context*)pipe; -- cgit v1.2.3 From 3b37cb49b821dd0c59fd5361ada6c0df9ac07db8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 8 Jan 2009 15:47:23 -0800 Subject: gallium-r300: Make it build. Still todo: - Sort out winsys. - Less suckage. --- src/gallium/drivers/r300/Makefile | 13 +++++++ src/gallium/drivers/r300/r300_context.c | 20 +++++----- src/gallium/drivers/r300/r300_context.h | 8 ++-- src/gallium/drivers/r300/r300_screen.c | 65 +++++++++++++++++++++++++++++---- src/gallium/drivers/r300/r300_screen.h | 13 +++++++ 5 files changed, 98 insertions(+), 21 deletions(-) create mode 100644 src/gallium/drivers/r300/Makefile (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile new file mode 100644 index 0000000000..b33e56f73d --- /dev/null +++ b/src/gallium/drivers/r300/Makefile @@ -0,0 +1,13 @@ +TOP = ../../../.. +include $(TOP)/configs/current + +LIBNAME = r300 + +C_SOURCES = \ + r300_context.c \ + r300_screen.c \ + r300_state.c + +include ../../Makefile.template + +symlinks: diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 4aef5030fc..569fdd3f0f 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -1,9 +1,9 @@ #include "r300_context.h" -static void r300_destroy_context(struct pipe_context* pipe) { - struct r300_context* context = r300_context(pipe); +static void r300_destroy_context(struct pipe_context* context) { + struct r300_context* r300 = r300_context(context); - draw_destroy(context->draw); + draw_destroy(r300->draw); FREE(context); } @@ -12,16 +12,16 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, struct pipe_winsys* winsys, struct amd_winsys* amd_winsys) { - struct r300_context* context = CALLOC_STRUCT(r300_context); + struct r300_context* r300 = CALLOC_STRUCT(r300_context); - if (!context) + if (!r300) return NULL; - context->winsys = amd_winsys; - context->context.winsys = winsys; - context->context.screen = screen; + r300->winsys = amd_winsys; + r300->context.winsys = winsys; + r300->context.screen = screen; - context->context.destroy = r300_destroy_context; + r300->context.destroy = r300_destroy_context; - return &context->context; + return &r300->context; } \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index fd344361d9..7c2055e43e 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -23,17 +23,19 @@ #ifndef R300_CONTEXT_H #define R300_CONTEXT_H +#include "pipe/p_context.h" + struct r300_context { /* Parent class */ struct pipe_context context; struct amd_winsys* winsys; struct draw_context* draw; -} +}; /* Convenience cast wrapper. */ -static struct r300_context* r300_context(struct pipe_context* pipe) { - return (struct r300_context*)pipe; +static struct r300_context* r300_context(struct pipe_context* context) { + return (struct r300_context*)context; } #endif /* R300_CONTEXT_H */ \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index a1f056b810..9c89623df3 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -1,6 +1,26 @@ -/* XXX put a copyright here */ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ -/* I know my style's weird, get used to it */ +#include "r300_screen.h" static const char* r300_get_vendor(struct pipe_screen* pscreen) { return "X.Org R300 Project"; @@ -12,6 +32,8 @@ static const char* r300_get_name(struct pipe_screen* pscreen) { } static int r300_get_param(struct pipe_screen* pscreen, int param) { + struct r300_screen* r300screen = r300_screen(pscreen); + switch (param) { /* Cases marked "IN THEORY" are possible on the hardware, * but haven't been implemented yet. */ @@ -43,9 +65,13 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) { /* IN THEORY */ return 0; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - /* 12 == 2048x2048 - * R500 can do 4096x4096 */ - return 12; + /* 12 == 2048x2048 */ + if (r300screen->is_r500) { + /* R500 can do 4096x4096 */ + return 13; + } else { + return 12; + } case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: /* XXX educated guess */ return 8; @@ -60,7 +86,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) { } } -static float r300_get_paramf(struct pipe_screen* pscreen, float param) { +static float r300_get_paramf(struct pipe_screen* pscreen, int param) { switch (param) { case PIPE_CAP_MAX_LINE_WIDTH: case PIPE_CAP_MAX_LINE_WIDTH_AA: @@ -81,12 +107,35 @@ static float r300_get_paramf(struct pipe_screen* pscreen, float param) { } static boolean r300_is_format_supported(struct pipe_screen* pscreen, - enum pipe_format format, uint type) + enum pipe_format format, + enum pipe_texture_target target, + unsigned tex_usage, + unsigned geom_flags) { return FALSE; } -static r300_destroy_screen(struct pipe_screen* pscreen) { +static void* r300_surface_map(struct pipe_screen* screen, + struct pipe_surface* surface, + unsigned flags) +{ + /* XXX is this all we need to do here? */ + char* map = pipe_buffer_map(screen, surface->buffer, flags); + + if (!map) { + return NULL; + } + + return map + surface->offset; +} + +static void r300_surface_unmap(struct pipe_screen* screen, + struct pipe_surface* surface) +{ + pipe_buffer_unmap(screen, surface->buffer); +} + +static void r300_destroy_screen(struct pipe_screen* pscreen) { FREE(pscreen); } diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index aa12c29a99..36fc5aa67d 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -23,6 +23,11 @@ #ifndef R300_SCREEN_H #define R300_SCREEN_H +#include "pipe/p_screen.h" +#include "util/u_memory.h" + +#include "r300_context.h" + struct r300_screen { /* Parent class */ struct pipe_screen screen; @@ -30,6 +35,14 @@ struct r300_screen { boolean is_r400; boolean is_r500; int pci_id; +}; + +/* Convenience cast wrapper. */ +static struct r300_screen* r300_screen(struct pipe_screen* screen) { + return (struct r300_screen*)screen; } +/* Creates a new r300 screen. */ +struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, uint pci_id); + #endif /* R300_SCREEN_H */ -- cgit v1.2.3 From 62363723001a63b86b7526d6528c19996a44463b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 8 Jan 2009 16:33:29 -0800 Subject: gallium-r300: Add r300_clear. Todo: - Less suckage. - Re-read bo-cs stuff, figure out how the hell to emit state. - Blits. --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_clear.c | 29 +++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_clear.h | 23 +++++++++++++++++++++++ 3 files changed, 53 insertions(+) create mode 100644 src/gallium/drivers/r300/r300_clear.c create mode 100644 src/gallium/drivers/r300/r300_clear.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index b33e56f73d..918eb8e1c4 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -4,6 +4,7 @@ include $(TOP)/configs/current LIBNAME = r300 C_SOURCES = \ + r300_clear.c \ r300_context.c \ r300_screen.c \ r300_state.c diff --git a/src/gallium/drivers/r300/r300_clear.c b/src/gallium/drivers/r300/r300_clear.c new file mode 100644 index 0000000000..f8f0e61931 --- /dev/null +++ b/src/gallium/drivers/r300/r300_clear.c @@ -0,0 +1,29 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +/* This gets its own file because Intel's is in its own file. + * I assume there's a good reason. */ +void r300_clear(struct pipe_context* pipe, struct pipe_surface* ps, unsigned val) +{ + pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, clearValue); + ps->status = PIPE_SURFACE_STATUS_DEFINED; +} \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_clear.h b/src/gallium/drivers/r300/r300_clear.h new file mode 100644 index 0000000000..58ac0a875c --- /dev/null +++ b/src/gallium/drivers/r300/r300_clear.h @@ -0,0 +1,23 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +void r300_clear(struct pipe_context* pipe, struct pipe_surface* ps, unsigned val); \ No newline at end of file -- cgit v1.2.3 From fb11fb897c2dc8cde64c84962d40e5fa6f384307 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 02:32:53 -0800 Subject: gallium-r300: Add copyrights, place (broken) CS. Todo: - Fill blits. - Less suck. - Ask glisse about how to get winsys+pipe talking right, so stuff like the CS can be set up right. --- src/gallium/drivers/r300/r300_context.c | 27 +++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_context.h | 7 +++++++ src/gallium/drivers/r300/r300_state.c | 22 ++++++++++++++++++++++ 3 files changed, 56 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 569fdd3f0f..7fde1404d9 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -1,3 +1,25 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + #include "r300_context.h" static void r300_destroy_context(struct pipe_context* context) { @@ -23,5 +45,10 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.destroy = r300_destroy_context; + /* XXX this is almost certainly wrong + * put this all in winsys, where we can get an FD + struct radeon_cs_manager* csm = radeon_cs_manager_gem_ctor(fd); + r300->cs = cs_gem_create(csm, 64 * 1024 / 4); */ + return &r300->context; } \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 7c2055e43e..f67823aa1e 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -31,6 +31,13 @@ struct r300_context { struct amd_winsys* winsys; struct draw_context* draw; + + /* CS object. This is very much like Intel's batchbuffer. + * Fill it full of dwords and relocs and then submit. + * Repeat as needed. */ + /* Note: Unlike Mesa's version of this, we don't keep a copy of the CSM + * that was used to create this CS. Is this a good idea? */ + struct radeon_cs* cs; }; /* Convenience cast wrapper. */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 18b3d55752..a853507fea 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -1,3 +1,25 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + #include "r300_context.h" static void* r300_create_vs_state(struct pipe_context* pipe, -- cgit v1.2.3 From d6cdb9db259d617ee21f1881c945e2ebaf6693b9 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 04:34:56 -0800 Subject: gallium-r300: Add r300_blit. Count the XXXs and weep? --- src/gallium/drivers/r300/r300_blit.c | 90 ++++++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_blit.h | 35 ++++++++++++++ 2 files changed, 125 insertions(+) create mode 100644 src/gallium/drivers/r300/r300_blit.c create mode 100644 src/gallium/drivers/r300/r300_blit.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c new file mode 100644 index 0000000000..c01855defa --- /dev/null +++ b/src/gallium/drivers/r300/r300_blit.c @@ -0,0 +1,90 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +/* Does a "paint" into the specified rectangle. + * Returns 1 on success, 0 on error. */ +int r300_fill_blit(struct r300_context* r300, + unsigned cpp, + short dst_pitch, + struct pipe_buffer* dst_buffer, + unsigned dst_offset, + short x, short y, + short w, short h, + unsigned color) +{ + uint32_t dest_type; + + /* Check for fallbacks. */ + /* XXX we can do YUV surfaces, too, but only in 3D mode. Hmm... */ + switch(cpp) { + case 2: + case 6: + dest_type = ATI_DATATYPE_CI8; + break; + case 4: + dest_type = ATI_DATATYPE_RGB565; + break; + case 8: + dest_type = ATI_DATATYPE_ARGB8888; + break; + default: + /* Whatever this is, we can't fill it. (Yet.) */ + return 0; + } + + /* XXX odds are *incredibly* good that we were in 3D just a bit ago, + * so flush here first. */ + + /* Set up the 2D engine. */ + OUT_CS_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, + RADEON_DEFAULT_SC_RIGHT_MAX | RADEON_DEFAULT_SC_BOTTOM_MAX); + /* XXX I have no idea what these flags mean, is this awesome? (y/n) */ + OUT_CS_REG(RADEON_DP_GUI_MASTER_CNTL, + RADEON_GMC_DST_PITCH_OFFSET_CNTL | + RADEON_GMC_BRUSH_SOLID_COLOR | + (dest_type << 8) | + RADEON_GMC_SRC_DATATYPE_COLOR | + /* XXX is this the right rop? */ + RADEON_ROP3_ONE | + RADEON_GMC_CLR_CMP_CNTL_DIS); + /* XXX pack this? */ + OUT_CS_REG(RADEON_DP_BRUSH_FRGD_CLR, color); + OUT_CS_REG(RADEON_DP_BRUSH_BKGD_CLR, 0x00000000); + OUT_CS_REG(RADEON_DP_SRC_FRGD_CLR, 0xffffffff); + OUT_CS_REG(RADEON_DP_SRC_BKGD_CLR, 0x00000000); + /* XXX what should this be? */ + OUT_CS_REG(RADEON_DP_WRITE_MASK, 0x00000000); + OUT_CS_REG(RADEON_DP_CNTL, + RADEON_DST_X_LEFT_TO_RIGHT | RADEON_DST_Y_TOP_TO_BOTTOM); + OUT_CS_REG(RADEON_DST_PITCH_OFFSET, 0x0); + /* XXX fix this shit -> OUT_RELOC(dst, 0, RADEON_GEM_DOMAIN_VRAM) */ + + /* Do the actual paint. */ + OUT_CS_REG(RADEON_DST_Y_X, (y << 16) | x); + OUT_CS_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); + + /* Let the 2D engine settle. */ + OUT_CS_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); + OUT_CS_REG(RADEON_WAIT_UNTIL, + RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE); + return 1; +} diff --git a/src/gallium/drivers/r300/r300_blit.h b/src/gallium/drivers/r300/r300_blit.h new file mode 100644 index 0000000000..ac916ca062 --- /dev/null +++ b/src/gallium/drivers/r300/r300_blit.h @@ -0,0 +1,35 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_BLIT_H +#define R300_BLIT_H + +extern int r300_fill_blit(struct r300_context* r300, + unsigned cpp, + short dst_pitch, + struct pipe_buffer *dst_buffer, + unsigned dst_offset, + short x, short y, + short w, short h, + unsigned color); + +#endif /* R300_BLIT_H */ \ No newline at end of file -- cgit v1.2.3 From b1776eb14471e7a4d09d3c8a73f02b19b106883b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 04:48:30 -0800 Subject: gallium-r300: Add r300_surface. Todo: - Hook up surface functions. - Take it for a spin and watch it crash 'n' burn. --- src/gallium/drivers/r300/r300_surface.c | 53 +++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_surface.h | 28 +++++++++++++++++ 2 files changed, 81 insertions(+) create mode 100644 src/gallium/drivers/r300/r300_surface.c create mode 100644 src/gallium/drivers/r300/r300_surface.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c new file mode 100644 index 0000000000..4aa469b97e --- /dev/null +++ b/src/gallium/drivers/r300/r300_surface.c @@ -0,0 +1,53 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_surface.h" + +/* Provides pipe_context's "surface_fill". */ +static void r300_surface_fill(struct pipe_context* context, + struct pipe_surface* dest, + unsigned x, unsigned y, + unsigned w, unsigned h, + unsigned color) +{ + /* Try accelerated fill first. */ + if (!r300_fill_blit(r300_context(context), + dest->block.size, + (short)dest->stride, + dest->buffer, + dest->offset, + (short)x, (short)y, + (short)w, (short)h, + color)) + { + /* Fallback. */ + void* dest_map = context->screen->surface_map(context->screen, dest, + PIPE_BUFFER_USAGE_CPU_WRITE); + pipe_fill_rect(dest_map, &dest->block, dest->stride, x, y, w, h, color); + context->screen->surface_unmap(context->screen, dest); + } +} + +void r300_init_surface_functions(struct r300_context* r300) +{ + r300->context.surface_fill = r300_surface_fill; +} diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h new file mode 100644 index 0000000000..3e3d813d99 --- /dev/null +++ b/src/gallium/drivers/r300/r300_surface.h @@ -0,0 +1,28 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_SURFACE_H +#define R300_SURFACE_H + +#include "r300_blit.h" + +#endif /* R300_SURFACE_H */ -- cgit v1.2.3 From afe2de0a235f8e4312ecbb7275640502098a8a81 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 05:11:19 -0800 Subject: gallium-r300: Fit it all together now. In theory, it could work, but there's still some very big gaps. Anything marked with XXX should be taken care of first, probably. --- src/gallium/drivers/r300/Makefile | 4 +++- src/gallium/drivers/r300/r300_blit.c | 2 ++ src/gallium/drivers/r300/r300_blit.h | 9 ++++++++- src/gallium/drivers/r300/r300_clear.c | 8 ++++++-- src/gallium/drivers/r300/r300_clear.h | 6 +++++- src/gallium/drivers/r300/r300_context.c | 4 +++- src/gallium/drivers/r300/r300_context.h | 2 ++ src/gallium/drivers/r300/r300_screen.c | 2 +- src/gallium/drivers/r300/r300_surface.h | 8 ++++++++ 9 files changed, 38 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 918eb8e1c4..bce7dcbf3a 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -4,10 +4,12 @@ include $(TOP)/configs/current LIBNAME = r300 C_SOURCES = \ + r300_blit.c \ r300_clear.c \ r300_context.c \ r300_screen.c \ - r300_state.c + r300_state.c \ + r300_surface.c include ../../Makefile.template diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c index c01855defa..5f5eba90c1 100644 --- a/src/gallium/drivers/r300/r300_blit.c +++ b/src/gallium/drivers/r300/r300_blit.c @@ -20,6 +20,8 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#include "r300_blit.h" + /* Does a "paint" into the specified rectangle. * Returns 1 on success, 0 on error. */ int r300_fill_blit(struct r300_context* r300, diff --git a/src/gallium/drivers/r300/r300_blit.h b/src/gallium/drivers/r300/r300_blit.h index ac916ca062..698b00083a 100644 --- a/src/gallium/drivers/r300/r300_blit.h +++ b/src/gallium/drivers/r300/r300_blit.h @@ -23,10 +23,17 @@ #ifndef R300_BLIT_H #define R300_BLIT_H +#include "pipe/p_state.h" + +#include "radeon_reg.h" + +/* Forward declarations. */ +struct r300_context; + extern int r300_fill_blit(struct r300_context* r300, unsigned cpp, short dst_pitch, - struct pipe_buffer *dst_buffer, + struct pipe_buffer* dst_buffer, unsigned dst_offset, short x, short y, short w, short h, diff --git a/src/gallium/drivers/r300/r300_clear.c b/src/gallium/drivers/r300/r300_clear.c index f8f0e61931..fd28437aaa 100644 --- a/src/gallium/drivers/r300/r300_clear.c +++ b/src/gallium/drivers/r300/r300_clear.c @@ -20,10 +20,14 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#include "r300_clear.h" + /* This gets its own file because Intel's is in its own file. * I assume there's a good reason. */ -void r300_clear(struct pipe_context* pipe, struct pipe_surface* ps, unsigned val) +void r300_clear(struct pipe_context* pipe, + struct pipe_surface* ps, + unsigned color) { - pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, clearValue); + pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, color); ps->status = PIPE_SURFACE_STATUS_DEFINED; } \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_clear.h b/src/gallium/drivers/r300/r300_clear.h index 58ac0a875c..e24a0690c9 100644 --- a/src/gallium/drivers/r300/r300_clear.h +++ b/src/gallium/drivers/r300/r300_clear.h @@ -20,4 +20,8 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ -void r300_clear(struct pipe_context* pipe, struct pipe_surface* ps, unsigned val); \ No newline at end of file +#include "pipe/p_context.h" + +void r300_clear(struct pipe_context* pipe, + struct pipe_surface* ps, + unsigned color); diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 7fde1404d9..21bee5beae 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -50,5 +50,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, struct radeon_cs_manager* csm = radeon_cs_manager_gem_ctor(fd); r300->cs = cs_gem_create(csm, 64 * 1024 / 4); */ + r300_init_surface_functions(r300); + return &r300->context; -} \ No newline at end of file +} diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index f67823aa1e..ae2dab13ff 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -25,6 +25,8 @@ #include "pipe/p_context.h" +#include "r300_surface.h" + struct r300_context { /* Parent class */ struct pipe_context context; diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 9c89623df3..0a114bbc06 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -119,7 +119,7 @@ static void* r300_surface_map(struct pipe_screen* screen, struct pipe_surface* surface, unsigned flags) { - /* XXX is this all we need to do here? */ + /* XXX this is not quite right */ char* map = pipe_buffer_map(screen, surface->buffer, flags); if (!map) { diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 3e3d813d99..29858eb541 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -23,6 +23,14 @@ #ifndef R300_SURFACE_H #define R300_SURFACE_H +#include "pipe/p_context.h" +#include "pipe/p_screen.h" + +#include "util/u_rect.h" + #include "r300_blit.h" +#include "r300_context.h" + +void r300_init_surface_functions(struct r300_context* r300); #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 32273c01bd9291dcc23ca2635b848586458a3c81 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 06:05:36 -0800 Subject: gallium-r300: Set right ROP for solid fills. Thanks to MrCooper for pointing me in the right direction. --- src/gallium/drivers/r300/r300_blit.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c index 5f5eba90c1..415e6e0a16 100644 --- a/src/gallium/drivers/r300/r300_blit.c +++ b/src/gallium/drivers/r300/r300_blit.c @@ -59,14 +59,12 @@ int r300_fill_blit(struct r300_context* r300, /* Set up the 2D engine. */ OUT_CS_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, RADEON_DEFAULT_SC_RIGHT_MAX | RADEON_DEFAULT_SC_BOTTOM_MAX); - /* XXX I have no idea what these flags mean, is this awesome? (y/n) */ OUT_CS_REG(RADEON_DP_GUI_MASTER_CNTL, RADEON_GMC_DST_PITCH_OFFSET_CNTL | RADEON_GMC_BRUSH_SOLID_COLOR | (dest_type << 8) | RADEON_GMC_SRC_DATATYPE_COLOR | - /* XXX is this the right rop? */ - RADEON_ROP3_ONE | + RADEON_ROP3_P | RADEON_GMC_CLR_CMP_CNTL_DIS); /* XXX pack this? */ OUT_CS_REG(RADEON_DP_BRUSH_FRGD_CLR, color); -- cgit v1.2.3 From ad14271425185c3535c389ca5bcd2d30c3368c32 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 13:08:19 -0800 Subject: gallium-r300: Max LOD bias is 16.0. --- src/gallium/drivers/r300/r300_screen.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 0a114bbc06..37a74b3c0a 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -99,7 +99,6 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) { case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: return 16.0; case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: - /* XXX again... */ return 16.0; default: return 0.0; -- cgit v1.2.3 From 78b599fb4cac469f4208ae3057b2a33e3e9913c6 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 14:54:08 -0800 Subject: gallium-r300: Add primitive CS. Enough to get us up and running, I suppose. This needs to be pushed down into winsys! --- src/gallium/drivers/r300/r300_blit.c | 6 ++++ src/gallium/drivers/r300/r300_blit.h | 2 +- src/gallium/drivers/r300/r300_cs.h | 70 ++++++++++++++++++++++++++++++++++++ 3 files changed, 77 insertions(+), 1 deletion(-) create mode 100644 src/gallium/drivers/r300/r300_cs.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c index 415e6e0a16..c404a667b1 100644 --- a/src/gallium/drivers/r300/r300_blit.c +++ b/src/gallium/drivers/r300/r300_blit.c @@ -33,6 +33,7 @@ int r300_fill_blit(struct r300_context* r300, short w, short h, unsigned color) { + CS_LOCALS(r300); uint32_t dest_type; /* Check for fallbacks. */ @@ -56,6 +57,8 @@ int r300_fill_blit(struct r300_context* r300, /* XXX odds are *incredibly* good that we were in 3D just a bit ago, * so flush here first. */ + BEGIN_CS(10 + 2 + 2); + /* Set up the 2D engine. */ OUT_CS_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, RADEON_DEFAULT_SC_RIGHT_MAX | RADEON_DEFAULT_SC_BOTTOM_MAX); @@ -86,5 +89,8 @@ int r300_fill_blit(struct r300_context* r300, OUT_CS_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); OUT_CS_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE); + + END_CS; + return 1; } diff --git a/src/gallium/drivers/r300/r300_blit.h b/src/gallium/drivers/r300/r300_blit.h index 698b00083a..09cb566b95 100644 --- a/src/gallium/drivers/r300/r300_blit.h +++ b/src/gallium/drivers/r300/r300_blit.h @@ -25,7 +25,7 @@ #include "pipe/p_state.h" -#include "radeon_reg.h" +#include "r300_cs.h" /* Forward declarations. */ struct r300_context; diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h new file mode 100644 index 0000000000..ebd5324119 --- /dev/null +++ b/src/gallium/drivers/r300/r300_cs.h @@ -0,0 +1,70 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_CS_H +#define R300_CS_H + +#include "radeon_cs.h" +#include "radeon_reg.h" + +/* Yes, I know macros are ugly. However, they are much prettier than the code + * that they neatly hide away, and don't have the cost of function setup,so + * we're going to use them. */ + +#define MAX_CS_SIZE 64 * 1024 / 4 + +#define CP_PACKET0(register, count) \ + (RADEON_CP_PACKET0 | ((count) << 16) | ((register) >> 2)) + +#define CS_LOCALS(context) \ + struct radeon_cs* cs = context->cs + + +#define CHECK_CS(size) do { \ + if ((cs->cdw + (size) + 128) > MAX_CS_SIZE || radeon_cs_need_flush(cs)) { \ + /* XXX flush the CS */ \ + } } while (0) + +/* XXX radeon_cs_begin is currently unimplemented on the backend, but let's + * be future-proof, yeah? */ +#define BEGIN_CS(size) do { \ + CHECK_CS(size); \ + radeon_cs_begin(cs, (size), __FILE__, __FUNCTION__, __LINE__); \ +} while (0) + +#define OUT_CS(value) \ + radeon_cs_write_dword(cs, value) + +#define OUT_CS_REG(register, value) do { \ + OUT_CS(CP_PACKET0(register, 0)); \ + OUT_CS(value); } while (0) + +#define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ + radeon_cs_write_dword(cs, offset); \ + radeon_cs_write_reloc(cs, bo, rd, wd, flags); \ +} while (0) + +/* XXX more future-proofing */ +#define END_CS \ + radeon_cs_end(cs, __FILE__, __FUNCTION__, __LINE__) + +#endif /* R300_CS_H */ \ No newline at end of file -- cgit v1.2.3 From adb74f5c5262d22b3c60a555431c29d36e3170f7 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 18:57:02 -0800 Subject: r300: Hook up to winsys, add missing header. In theory it works, which of course means that it doesn't. --- src/gallium/drivers/r300/r300_context.c | 9 +- src/gallium/drivers/r300/radeon_reg.h | 5324 ++++++++++++++++++++++++++++++ src/gallium/winsys/drm/amd/amd_context.c | 8 +- 3 files changed, 5339 insertions(+), 2 deletions(-) create mode 100644 src/gallium/drivers/r300/radeon_reg.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 21bee5beae..68751dae17 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -41,10 +41,17 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->winsys = amd_winsys; r300->context.winsys = winsys; - r300->context.screen = screen; + if (screen) { + r300->context.screen = screen; + } else { + /* XXX second arg should be pciid, find a way to get it from winsys */ + r300->context.screen = r300_create_screen(winsys, 0x0); + } r300->context.destroy = r300_destroy_context; + r300->draw = draw_create(); + /* XXX this is almost certainly wrong * put this all in winsys, where we can get an FD struct radeon_cs_manager* csm = radeon_cs_manager_gem_ctor(fd); diff --git a/src/gallium/drivers/r300/radeon_reg.h b/src/gallium/drivers/r300/radeon_reg.h new file mode 100644 index 0000000000..e2fcb70a95 --- /dev/null +++ b/src/gallium/drivers/r300/radeon_reg.h @@ -0,0 +1,5324 @@ +/* + * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and + * VA Linux Systems Inc., Fremont, California. + * + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation on the rights to use, copy, modify, merge, + * publish, distribute, sublicense, and/or sell copies of the Software, + * and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR + * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* + * Authors: + * Kevin E. Martin + * Rickard E. Faith + * Alan Hourihane + * + * References: + * + * !!!! FIXME !!!! + * RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical + * Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April + * 1999. + * + * !!!! FIXME !!!! + * RAGE 128 Software Development Manual (Technical Reference Manual P/N + * SDK-G04000 Rev. 0.01), ATI Technologies: June 1999. + * + */ + +/* !!!! FIXME !!!! NOTE: THIS FILE HAS BEEN CONVERTED FROM r128_reg.h + * AND CONTAINS REGISTERS AND REGISTER DEFINITIONS THAT ARE NOT CORRECT + * ON THE RADEON. A FULL AUDIT OF THIS CODE IS NEEDED! */ + +/* XXX clean this bitch up */ + +#ifndef _RADEON_REG_H_ +#define _RADEON_REG_H_ + +#define ATI_DATATYPE_VQ 0 +#define ATI_DATATYPE_CI4 1 +#define ATI_DATATYPE_CI8 2 +#define ATI_DATATYPE_ARGB1555 3 +#define ATI_DATATYPE_RGB565 4 +#define ATI_DATATYPE_RGB888 5 +#define ATI_DATATYPE_ARGB8888 6 +#define ATI_DATATYPE_RGB332 7 +#define ATI_DATATYPE_Y8 8 +#define ATI_DATATYPE_RGB8 9 +#define ATI_DATATYPE_CI16 10 +#define ATI_DATATYPE_VYUY_422 11 +#define ATI_DATATYPE_YVYU_422 12 +#define ATI_DATATYPE_AYUV_444 14 +#define ATI_DATATYPE_ARGB4444 15 + + /* Registers for 2D/Video/Overlay */ +#define RADEON_ADAPTER_ID 0x0f2c /* PCI */ +#define RADEON_AGP_BASE 0x0170 +#define RADEON_AGP_CNTL 0x0174 +# define RADEON_AGP_APER_SIZE_256MB (0x00 << 0) +# define RADEON_AGP_APER_SIZE_128MB (0x20 << 0) +# define RADEON_AGP_APER_SIZE_64MB (0x30 << 0) +# define RADEON_AGP_APER_SIZE_32MB (0x38 << 0) +# define RADEON_AGP_APER_SIZE_16MB (0x3c << 0) +# define RADEON_AGP_APER_SIZE_8MB (0x3e << 0) +# define RADEON_AGP_APER_SIZE_4MB (0x3f << 0) +# define RADEON_AGP_APER_SIZE_MASK (0x3f << 0) +#define RADEON_STATUS_PCI_CONFIG 0x06 +# define RADEON_CAP_LIST 0x100000 +#define RADEON_CAPABILITIES_PTR_PCI_CONFIG 0x34 /* offset in PCI config*/ +# define RADEON_CAP_PTR_MASK 0xfc /* mask off reserved bits of CAP_PTR */ +# define RADEON_CAP_ID_NULL 0x00 /* End of capability list */ +# define RADEON_CAP_ID_AGP 0x02 /* AGP capability ID */ +# define RADEON_CAP_ID_EXP 0x10 /* PCI Express */ +#define RADEON_AGP_COMMAND 0x0f60 /* PCI */ +#define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config*/ +# define RADEON_AGP_ENABLE (1<<8) +#define RADEON_AGP_PLL_CNTL 0x000b /* PLL */ +#define RADEON_AGP_STATUS 0x0f5c /* PCI */ +# define RADEON_AGP_1X_MODE 0x01 +# define RADEON_AGP_2X_MODE 0x02 +# define RADEON_AGP_4X_MODE 0x04 +# define RADEON_AGP_FW_MODE 0x10 +# define RADEON_AGP_MODE_MASK 0x17 +# define RADEON_AGPv3_MODE 0x08 +# define RADEON_AGPv3_4X_MODE 0x01 +# define RADEON_AGPv3_8X_MODE 0x02 +#define RADEON_ATTRDR 0x03c1 /* VGA */ +#define RADEON_ATTRDW 0x03c0 /* VGA */ +#define RADEON_ATTRX 0x03c0 /* VGA */ +#define RADEON_AUX_SC_CNTL 0x1660 +# define RADEON_AUX1_SC_EN (1 << 0) +# define RADEON_AUX1_SC_MODE_OR (0 << 1) +# define RADEON_AUX1_SC_MODE_NAND (1 << 1) +# define RADEON_AUX2_SC_EN (1 << 2) +# define RADEON_AUX2_SC_MODE_OR (0 << 3) +# define RADEON_AUX2_SC_MODE_NAND (1 << 3) +# define RADEON_AUX3_SC_EN (1 << 4) +# define RADEON_AUX3_SC_MODE_OR (0 << 5) +# define RADEON_AUX3_SC_MODE_NAND (1 << 5) +#define RADEON_AUX1_SC_BOTTOM 0x1670 +#define RADEON_AUX1_SC_LEFT 0x1664 +#define RADEON_AUX1_SC_RIGHT 0x1668 +#define RADEON_AUX1_SC_TOP 0x166c +#define RADEON_AUX2_SC_BOTTOM 0x1680 +#define RADEON_AUX2_SC_LEFT 0x1674 +#define RADEON_AUX2_SC_RIGHT 0x1678 +#define RADEON_AUX2_SC_TOP 0x167c +#define RADEON_AUX3_SC_BOTTOM 0x1690 +#define RADEON_AUX3_SC_LEFT 0x1684 +#define RADEON_AUX3_SC_RIGHT 0x1688 +#define RADEON_AUX3_SC_TOP 0x168c +#define RADEON_AUX_WINDOW_HORZ_CNTL 0x02d8 +#define RADEON_AUX_WINDOW_VERT_CNTL 0x02dc + +#define RADEON_BASE_CODE 0x0f0b +#define RADEON_BIOS_0_SCRATCH 0x0010 +# define RADEON_FP_PANEL_SCALABLE (1 << 16) +# define RADEON_FP_PANEL_SCALE_EN (1 << 17) +# define RADEON_FP_CHIP_SCALE_EN (1 << 18) +# define RADEON_DRIVER_BRIGHTNESS_EN (1 << 26) +# define RADEON_DISPLAY_ROT_MASK (3 << 28) +# define RADEON_DISPLAY_ROT_00 (0 << 28) +# define RADEON_DISPLAY_ROT_90 (1 << 28) +# define RADEON_DISPLAY_ROT_180 (2 << 28) +# define RADEON_DISPLAY_ROT_270 (3 << 28) +#define RADEON_BIOS_1_SCRATCH 0x0014 +#define RADEON_BIOS_2_SCRATCH 0x0018 +#define RADEON_BIOS_3_SCRATCH 0x001c +#define RADEON_BIOS_4_SCRATCH 0x0020 +# define RADEON_CRT1_ATTACHED_MASK (3 << 0) +# define RADEON_CRT1_ATTACHED_MONO (1 << 0) +# define RADEON_CRT1_ATTACHED_COLOR (2 << 0) +# define RADEON_LCD1_ATTACHED (1 << 2) +# define RADEON_DFP1_ATTACHED (1 << 3) +# define RADEON_TV1_ATTACHED_MASK (3 << 4) +# define RADEON_TV1_ATTACHED_COMP (1 << 4) +# define RADEON_TV1_ATTACHED_SVIDEO (2 << 4) +# define RADEON_CRT2_ATTACHED_MASK (3 << 8) +# define RADEON_CRT2_ATTACHED_MONO (1 << 8) +# define RADEON_CRT2_ATTACHED_COLOR (2 << 8) +# define RADEON_DFP2_ATTACHED (1 << 11) +#define RADEON_BIOS_5_SCRATCH 0x0024 +# define RADEON_LCD1_ON (1 << 0) +# define RADEON_CRT1_ON (1 << 1) +# define RADEON_TV1_ON (1 << 2) +# define RADEON_DFP1_ON (1 << 3) +# define RADEON_CRT2_ON (1 << 5) +# define RADEON_CV1_ON (1 << 6) +# define RADEON_DFP2_ON (1 << 7) +# define RADEON_LCD1_CRTC_MASK (1 << 8) +# define RADEON_LCD1_CRTC_SHIFT 8 +# define RADEON_CRT1_CRTC_MASK (1 << 9) +# define RADEON_CRT1_CRTC_SHIFT 9 +# define RADEON_TV1_CRTC_MASK (1 << 10) +# define RADEON_TV1_CRTC_SHIFT 10 +# define RADEON_DFP1_CRTC_MASK (1 << 11) +# define RADEON_DFP1_CRTC_SHIFT 11 +# define RADEON_CRT2_CRTC_MASK (1 << 12) +# define RADEON_CRT2_CRTC_SHIFT 12 +# define RADEON_CV1_CRTC_MASK (1 << 13) +# define RADEON_CV1_CRTC_SHIFT 13 +# define RADEON_DFP2_CRTC_MASK (1 << 14) +# define RADEON_DFP2_CRTC_SHIFT 14 +#define RADEON_BIOS_6_SCRATCH 0x0028 +# define RADEON_ACC_MODE_CHANGE (1 << 2) +# define RADEON_EXT_DESKTOP_MODE (1 << 3) +# define RADEON_LCD_DPMS_ON (1 << 20) +# define RADEON_CRT_DPMS_ON (1 << 21) +# define RADEON_TV_DPMS_ON (1 << 22) +# define RADEON_DFP_DPMS_ON (1 << 23) +# define RADEON_DPMS_MASK (3 << 24) +# define RADEON_DPMS_ON (0 << 24) +# define RADEON_DPMS_STANDBY (1 << 24) +# define RADEON_DPMS_SUSPEND (2 << 24) +# define RADEON_DPMS_OFF (3 << 24) +# define RADEON_SCREEN_BLANKING (1 << 26) +# define RADEON_DRIVER_CRITICAL (1 << 27) +# define RADEON_DISPLAY_SWITCHING_DIS (1 << 30) +#define RADEON_BIOS_7_SCRATCH 0x002c +# define RADEON_SYS_HOTKEY (1 << 10) +# define RADEON_DRV_LOADED (1 << 12) +#define RADEON_BIOS_ROM 0x0f30 /* PCI */ +#define RADEON_BIST 0x0f0f /* PCI */ +#define RADEON_BRUSH_DATA0 0x1480 +#define RADEON_BRUSH_DATA1 0x1484 +#define RADEON_BRUSH_DATA10 0x14a8 +#define RADEON_BRUSH_DATA11 0x14ac +#define RADEON_BRUSH_DATA12 0x14b0 +#define RADEON_BRUSH_DATA13 0x14b4 +#define RADEON_BRUSH_DATA14 0x14b8 +#define RADEON_BRUSH_DATA15 0x14bc +#define RADEON_BRUSH_DATA16 0x14c0 +#define RADEON_BRUSH_DATA17 0x14c4 +#define RADEON_BRUSH_DATA18 0x14c8 +#define RADEON_BRUSH_DATA19 0x14cc +#define RADEON_BRUSH_DATA2 0x1488 +#define RADEON_BRUSH_DATA20 0x14d0 +#define RADEON_BRUSH_DATA21 0x14d4 +#define RADEON_BRUSH_DATA22 0x14d8 +#define RADEON_BRUSH_DATA23 0x14dc +#define RADEON_BRUSH_DATA24 0x14e0 +#define RADEON_BRUSH_DATA25 0x14e4 +#define RADEON_BRUSH_DATA26 0x14e8 +#define RADEON_BRUSH_DATA27 0x14ec +#define RADEON_BRUSH_DATA28 0x14f0 +#define RADEON_BRUSH_DATA29 0x14f4 +#define RADEON_BRUSH_DATA3 0x148c +#define RADEON_BRUSH_DATA30 0x14f8 +#define RADEON_BRUSH_DATA31 0x14fc +#define RADEON_BRUSH_DATA32 0x1500 +#define RADEON_BRUSH_DATA33 0x1504 +#define RADEON_BRUSH_DATA34 0x1508 +#define RADEON_BRUSH_DATA35 0x150c +#define RADEON_BRUSH_DATA36 0x1510 +#define RADEON_BRUSH_DATA37 0x1514 +#define RADEON_BRUSH_DATA38 0x1518 +#define RADEON_BRUSH_DATA39 0x151c +#define RADEON_BRUSH_DATA4 0x1490 +#define RADEON_BRUSH_DATA40 0x1520 +#define RADEON_BRUSH_DATA41 0x1524 +#define RADEON_BRUSH_DATA42 0x1528 +#define RADEON_BRUSH_DATA43 0x152c +#define RADEON_BRUSH_DATA44 0x1530 +#define RADEON_BRUSH_DATA45 0x1534 +#define RADEON_BRUSH_DATA46 0x1538 +#define RADEON_BRUSH_DATA47 0x153c +#define RADEON_BRUSH_DATA48 0x1540 +#define RADEON_BRUSH_DATA49 0x1544 +#define RADEON_BRUSH_DATA5 0x1494 +#define RADEON_BRUSH_DATA50 0x1548 +#define RADEON_BRUSH_DATA51 0x154c +#define RADEON_BRUSH_DATA52 0x1550 +#define RADEON_BRUSH_DATA53 0x1554 +#define RADEON_BRUSH_DATA54 0x1558 +#define RADEON_BRUSH_DATA55 0x155c +#define RADEON_BRUSH_DATA56 0x1560 +#define RADEON_BRUSH_DATA57 0x1564 +#define RADEON_BRUSH_DATA58 0x1568 +#define RADEON_BRUSH_DATA59 0x156c +#define RADEON_BRUSH_DATA6 0x1498 +#define RADEON_BRUSH_DATA60 0x1570 +#define RADEON_BRUSH_DATA61 0x1574 +#define RADEON_BRUSH_DATA62 0x1578 +#define RADEON_BRUSH_DATA63 0x157c +#define RADEON_BRUSH_DATA7 0x149c +#define RADEON_BRUSH_DATA8 0x14a0 +#define RADEON_BRUSH_DATA9 0x14a4 +#define RADEON_BRUSH_SCALE 0x1470 +#define RADEON_BRUSH_Y_X 0x1474 +#define RADEON_BUS_CNTL 0x0030 +# define RADEON_BUS_MASTER_DIS (1 << 6) +# define RADEON_BUS_BIOS_DIS_ROM (1 << 12) +# define RADEON_BUS_RD_DISCARD_EN (1 << 24) +# define RADEON_BUS_RD_ABORT_EN (1 << 25) +# define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) +# define RADEON_BUS_WRT_BURST (1 << 29) +# define RADEON_BUS_READ_BURST (1 << 30) +#define RADEON_BUS_CNTL1 0x0034 +# define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) + +#define RADEON_CACHE_CNTL 0x1724 +#define RADEON_CACHE_LINE 0x0f0c /* PCI */ +#define RADEON_CAPABILITIES_ID 0x0f50 /* PCI */ +#define RADEON_CAPABILITIES_PTR 0x0f34 /* PCI */ +#define RADEON_CLK_PIN_CNTL 0x0001 /* PLL */ +# define RADEON_SCLK_DYN_START_CNTL (1 << 15) +#define RADEON_CLOCK_CNTL_DATA 0x000c +#define RADEON_CLOCK_CNTL_INDEX 0x0008 +# define RADEON_PLL_WR_EN (1 << 7) +# define RADEON_PLL_DIV_SEL (3 << 8) +# define RADEON_PLL2_DIV_SEL_MASK ~(3 << 8) +#define RADEON_CLK_PWRMGT_CNTL 0x0014 +# define RADEON_ENGIN_DYNCLK_MODE (1 << 12) +# define RADEON_ACTIVE_HILO_LAT_MASK (3 << 13) +# define RADEON_ACTIVE_HILO_LAT_SHIFT 13 +# define RADEON_DISP_DYN_STOP_LAT_MASK (1 << 12) +# define RADEON_MC_BUSY (1 << 16) +# define RADEON_DLL_READY (1 << 19) +# define RADEON_CG_NO1_DEBUG_0 (1 << 24) +# define RADEON_CG_NO1_DEBUG_MASK (0x1f << 24) +# define RADEON_DYN_STOP_MODE_MASK (7 << 21) +# define RADEON_TVPLL_PWRMGT_OFF (1 << 30) +# define RADEON_TVCLK_TURNOFF (1 << 31) +#define RADEON_PLL_PWRMGT_CNTL 0x0015 +# define RADEON_TCL_BYPASS_DISABLE (1 << 20) +#define RADEON_CLR_CMP_CLR_3D 0x1a24 +#define RADEON_CLR_CMP_CLR_DST 0x15c8 +#define RADEON_CLR_CMP_CLR_SRC 0x15c4 +#define RADEON_CLR_CMP_CNTL 0x15c0 +# define RADEON_SRC_CMP_EQ_COLOR (4 << 0) +# define RADEON_SRC_CMP_NEQ_COLOR (5 << 0) +# define RADEON_CLR_CMP_SRC_SOURCE (1 << 24) +#define RADEON_CLR_CMP_MASK 0x15cc +# define RADEON_CLR_CMP_MSK 0xffffffff +#define RADEON_CLR_CMP_MASK_3D 0x1A28 +#define RADEON_COMMAND 0x0f04 /* PCI */ +#define RADEON_COMPOSITE_SHADOW_ID 0x1a0c +#define RADEON_CONFIG_APER_0_BASE 0x0100 +#define RADEON_CONFIG_APER_1_BASE 0x0104 +#define RADEON_CONFIG_APER_SIZE 0x0108 +#define RADEON_CONFIG_BONDS 0x00e8 +#define RADEON_CONFIG_CNTL 0x00e0 +# define RADEON_CFG_ATI_REV_A11 (0 << 16) +# define RADEON_CFG_ATI_REV_A12 (1 << 16) +# define RADEON_CFG_ATI_REV_A13 (2 << 16) +# define RADEON_CFG_ATI_REV_ID_MASK (0xf << 16) +#define RADEON_CONFIG_MEMSIZE 0x00f8 +#define RADEON_CONFIG_MEMSIZE_EMBEDDED 0x0114 +#define RADEON_CONFIG_REG_1_BASE 0x010c +#define RADEON_CONFIG_REG_APER_SIZE 0x0110 +#define RADEON_CONFIG_XSTRAP 0x00e4 +#define RADEON_CONSTANT_COLOR_C 0x1d34 +# define RADEON_CONSTANT_COLOR_MASK 0x00ffffff +# define RADEON_CONSTANT_COLOR_ONE 0x00ffffff +# define RADEON_CONSTANT_COLOR_ZERO 0x00000000 +#define RADEON_CRC_CMDFIFO_ADDR 0x0740 +#define RADEON_CRC_CMDFIFO_DOUT 0x0744 +#define RADEON_GRPH_BUFFER_CNTL 0x02f0 +# define RADEON_GRPH_START_REQ_MASK (0x7f) +# define RADEON_GRPH_START_REQ_SHIFT 0 +# define RADEON_GRPH_STOP_REQ_MASK (0x7f<<8) +# define RADEON_GRPH_STOP_REQ_SHIFT 8 +# define RADEON_GRPH_CRITICAL_POINT_MASK (0x7f<<16) +# define RADEON_GRPH_CRITICAL_POINT_SHIFT 16 +# define RADEON_GRPH_CRITICAL_CNTL (1<<28) +# define RADEON_GRPH_BUFFER_SIZE (1<<29) +# define RADEON_GRPH_CRITICAL_AT_SOF (1<<30) +# define RADEON_GRPH_STOP_CNTL (1<<31) +#define RADEON_GRPH2_BUFFER_CNTL 0x03f0 +# define RADEON_GRPH2_START_REQ_MASK (0x7f) +# define RADEON_GRPH2_START_REQ_SHIFT 0 +# define RADEON_GRPH2_STOP_REQ_MASK (0x7f<<8) +# define RADEON_GRPH2_STOP_REQ_SHIFT 8 +# define RADEON_GRPH2_CRITICAL_POINT_MASK (0x7f<<16) +# define RADEON_GRPH2_CRITICAL_POINT_SHIFT 16 +# define RADEON_GRPH2_CRITICAL_CNTL (1<<28) +# define RADEON_GRPH2_BUFFER_SIZE (1<<29) +# define RADEON_GRPH2_CRITICAL_AT_SOF (1<<30) +# define RADEON_GRPH2_STOP_CNTL (1<<31) +#define RADEON_CRTC_CRNT_FRAME 0x0214 +#define RADEON_CRTC_EXT_CNTL 0x0054 +# define RADEON_CRTC_VGA_XOVERSCAN (1 << 0) +# define RADEON_VGA_ATI_LINEAR (1 << 3) +# define RADEON_XCRT_CNT_EN (1 << 6) +# define RADEON_CRTC_HSYNC_DIS (1 << 8) +# define RADEON_CRTC_VSYNC_DIS (1 << 9) +# define RADEON_CRTC_DISPLAY_DIS (1 << 10) +# define RADEON_CRTC_SYNC_TRISTAT (1 << 11) +# define RADEON_CRTC_CRT_ON (1 << 15) +#define RADEON_CRTC_EXT_CNTL_DPMS_BYTE 0x0055 +# define RADEON_CRTC_HSYNC_DIS_BYTE (1 << 0) +# define RADEON_CRTC_VSYNC_DIS_BYTE (1 << 1) +# define RADEON_CRTC_DISPLAY_DIS_BYTE (1 << 2) +#define RADEON_CRTC_GEN_CNTL 0x0050 +# define RADEON_CRTC_DBL_SCAN_EN (1 << 0) +# define RADEON_CRTC_INTERLACE_EN (1 << 1) +# define RADEON_CRTC_CSYNC_EN (1 << 4) +# define RADEON_CRTC_ICON_EN (1 << 15) +# define RADEON_CRTC_CUR_EN (1 << 16) +# define RADEON_CRTC_CUR_MODE_MASK (7 << 20) +# define RADEON_CRTC_EXT_DISP_EN (1 << 24) +# define RADEON_CRTC_EN (1 << 25) +# define RADEON_CRTC_DISP_REQ_EN_B (1 << 26) +#define RADEON_CRTC2_GEN_CNTL 0x03f8 +# define RADEON_CRTC2_DBL_SCAN_EN (1 << 0) +# define RADEON_CRTC2_INTERLACE_EN (1 << 1) +# define RADEON_CRTC2_SYNC_TRISTAT (1 << 4) +# define RADEON_CRTC2_HSYNC_TRISTAT (1 << 5) +# define RADEON_CRTC2_VSYNC_TRISTAT (1 << 6) +# define RADEON_CRTC2_CRT2_ON (1 << 7) +# define RADEON_CRTC2_PIX_WIDTH_SHIFT 8 +# define RADEON_CRTC2_PIX_WIDTH_MASK (0xf << 8) +# define RADEON_CRTC2_ICON_EN (1 << 15) +# define RADEON_CRTC2_CUR_EN (1 << 16) +# define RADEON_CRTC2_CUR_MODE_MASK (7 << 20) +# define RADEON_CRTC2_DISP_DIS (1 << 23) +# define RADEON_CRTC2_EN (1 << 25) +# define RADEON_CRTC2_DISP_REQ_EN_B (1 << 26) +# define RADEON_CRTC2_CSYNC_EN (1 << 27) +# define RADEON_CRTC2_HSYNC_DIS (1 << 28) +# define RADEON_CRTC2_VSYNC_DIS (1 << 29) +#define RADEON_CRTC_MORE_CNTL 0x27c +# define RADEON_CRTC_AUTO_HORZ_CENTER_EN (1<<2) +# define RADEON_CRTC_AUTO_VERT_CENTER_EN (1<<3) +# define RADEON_CRTC_H_CUTOFF_ACTIVE_EN (1<<4) +# define RADEON_CRTC_V_CUTOFF_ACTIVE_EN (1<<5) +#define RADEON_CRTC_GUI_TRIG_VLINE 0x0218 +#define RADEON_CRTC_H_SYNC_STRT_WID 0x0204 +# define RADEON_CRTC_H_SYNC_STRT_PIX (0x07 << 0) +# define RADEON_CRTC_H_SYNC_STRT_CHAR (0x3ff << 3) +# define RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT 3 +# define RADEON_CRTC_H_SYNC_WID (0x3f << 16) +# define RADEON_CRTC_H_SYNC_WID_SHIFT 16 +# define RADEON_CRTC_H_SYNC_POL (1 << 23) +#define RADEON_CRTC2_H_SYNC_STRT_WID 0x0304 +# define RADEON_CRTC2_H_SYNC_STRT_PIX (0x07 << 0) +# define RADEON_CRTC2_H_SYNC_STRT_CHAR (0x3ff << 3) +# define RADEON_CRTC2_H_SYNC_STRT_CHAR_SHIFT 3 +# define RADEON_CRTC2_H_SYNC_WID (0x3f << 16) +# define RADEON_CRTC2_H_SYNC_WID_SHIFT 16 +# define RADEON_CRTC2_H_SYNC_POL (1 << 23) +#define RADEON_CRTC_H_TOTAL_DISP 0x0200 +# define RADEON_CRTC_H_TOTAL (0x03ff << 0) +# define RADEON_CRTC_H_TOTAL_SHIFT 0 +# define RADEON_CRTC_H_DISP (0x01ff << 16) +# define RADEON_CRTC_H_DISP_SHIFT 16 +#define RADEON_CRTC2_H_TOTAL_DISP 0x0300 +# define RADEON_CRTC2_H_TOTAL (0x03ff << 0) +# define RADEON_CRTC2_H_TOTAL_SHIFT 0 +# define RADEON_CRTC2_H_DISP (0x01ff << 16) +# define RADEON_CRTC2_H_DISP_SHIFT 16 + +#define RADEON_CRTC_OFFSET_RIGHT 0x0220 +#define RADEON_CRTC_OFFSET 0x0224 +# define RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET (1<<30) +# define RADEON_CRTC_OFFSET__OFFSET_LOCK (1<<31) + +#define RADEON_CRTC2_OFFSET 0x0324 +# define RADEON_CRTC2_OFFSET__GUI_TRIG_OFFSET (1<<30) +# define RADEON_CRTC2_OFFSET__OFFSET_LOCK (1<<31) +#define RADEON_CRTC_OFFSET_CNTL 0x0228 +# define RADEON_CRTC_TILE_LINE_SHIFT 0 +# define RADEON_CRTC_TILE_LINE_RIGHT_SHIFT 4 +# define R300_CRTC_X_Y_MODE_EN_RIGHT (1 << 6) +# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_MASK (3 << 7) +# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_AUTO (0 << 7) +# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_SINGLE (1 << 7) +# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_DOUBLE (2 << 7) +# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_DIS (3 << 7) +# define R300_CRTC_X_Y_MODE_EN (1 << 9) +# define R300_CRTC_MICRO_TILE_BUFFER_MASK (3 << 10) +# define R300_CRTC_MICRO_TILE_BUFFER_AUTO (0 << 10) +# define R300_CRTC_MICRO_TILE_BUFFER_SINGLE (1 << 10) +# define R300_CRTC_MICRO_TILE_BUFFER_DOUBLE (2 << 10) +# define R300_CRTC_MICRO_TILE_BUFFER_DIS (3 << 10) +# define R300_CRTC_MICRO_TILE_EN_RIGHT (1 << 12) +# define R300_CRTC_MICRO_TILE_EN (1 << 13) +# define R300_CRTC_MACRO_TILE_EN_RIGHT (1 << 14) +# define R300_CRTC_MACRO_TILE_EN (1 << 15) +# define RADEON_CRTC_TILE_EN_RIGHT (1 << 14) +# define RADEON_CRTC_TILE_EN (1 << 15) +# define RADEON_CRTC_OFFSET_FLIP_CNTL (1 << 16) +# define RADEON_CRTC_STEREO_OFFSET_EN (1 << 17) + +#define R300_CRTC_TILE_X0_Y0 0x0350 +#define R300_CRTC2_TILE_X0_Y0 0x0358 + +#define RADEON_CRTC2_OFFSET_CNTL 0x0328 +# define RADEON_CRTC2_OFFSET_FLIP_CNTL (1 << 16) +# define RADEON_CRTC2_TILE_EN (1 << 15) +#define RADEON_CRTC_PITCH 0x022c +# define RADEON_CRTC_PITCH__SHIFT 0 +# define RADEON_CRTC_PITCH__RIGHT_SHIFT 16 + +#define RADEON_CRTC2_PITCH 0x032c +#define RADEON_CRTC_STATUS 0x005c +# define RADEON_CRTC_VBLANK_SAVE (1 << 1) +# define RADEON_CRTC_VBLANK_SAVE_CLEAR (1 << 1) +#define RADEON_CRTC2_STATUS 0x03fc +# define RADEON_CRTC2_VBLANK_SAVE (1 << 1) +# define RADEON_CRTC2_VBLANK_SAVE_CLEAR (1 << 1) +#define RADEON_CRTC_V_SYNC_STRT_WID 0x020c +# define RADEON_CRTC_V_SYNC_STRT (0x7ff << 0) +# define RADEON_CRTC_V_SYNC_STRT_SHIFT 0 +# define RADEON_CRTC_V_SYNC_WID (0x1f << 16) +# define RADEON_CRTC_V_SYNC_WID_SHIFT 16 +# define RADEON_CRTC_V_SYNC_POL (1 << 23) +#define RADEON_CRTC2_V_SYNC_STRT_WID 0x030c +# define RADEON_CRTC2_V_SYNC_STRT (0x7ff << 0) +# define RADEON_CRTC2_V_SYNC_STRT_SHIFT 0 +# define RADEON_CRTC2_V_SYNC_WID (0x1f << 16) +# define RADEON_CRTC2_V_SYNC_WID_SHIFT 16 +# define RADEON_CRTC2_V_SYNC_POL (1 << 23) +#define RADEON_CRTC_V_TOTAL_DISP 0x0208 +# define RADEON_CRTC_V_TOTAL (0x07ff << 0) +# define RADEON_CRTC_V_TOTAL_SHIFT 0 +# define RADEON_CRTC_V_DISP (0x07ff << 16) +# define RADEON_CRTC_V_DISP_SHIFT 16 +#define RADEON_CRTC2_V_TOTAL_DISP 0x0308 +# define RADEON_CRTC2_V_TOTAL (0x07ff << 0) +# define RADEON_CRTC2_V_TOTAL_SHIFT 0 +# define RADEON_CRTC2_V_DISP (0x07ff << 16) +# define RADEON_CRTC2_V_DISP_SHIFT 16 +#define RADEON_CRTC_VLINE_CRNT_VLINE 0x0210 +# define RADEON_CRTC_CRNT_VLINE_MASK (0x7ff << 16) +#define RADEON_CRTC2_CRNT_FRAME 0x0314 +#define RADEON_CRTC2_GUI_TRIG_VLINE 0x0318 +#define RADEON_CRTC2_STATUS 0x03fc +#define RADEON_CRTC2_VLINE_CRNT_VLINE 0x0310 +#define RADEON_CRTC8_DATA 0x03d5 /* VGA, 0x3b5 */ +#define RADEON_CRTC8_IDX 0x03d4 /* VGA, 0x3b4 */ +#define RADEON_CUR_CLR0 0x026c +#define RADEON_CUR_CLR1 0x0270 +#define RADEON_CUR_HORZ_VERT_OFF 0x0268 +#define RADEON_CUR_HORZ_VERT_POSN 0x0264 +#define RADEON_CUR_OFFSET 0x0260 +# define RADEON_CUR_LOCK (1 << 31) +#define RADEON_CUR2_CLR0 0x036c +#define RADEON_CUR2_CLR1 0x0370 +#define RADEON_CUR2_HORZ_VERT_OFF 0x0368 +#define RADEON_CUR2_HORZ_VERT_POSN 0x0364 +#define RADEON_CUR2_OFFSET 0x0360 +# define RADEON_CUR2_LOCK (1 << 31) + +#define RADEON_DAC_CNTL 0x0058 +# define RADEON_DAC_RANGE_CNTL (3 << 0) +# define RADEON_DAC_RANGE_CNTL_PS2 (2 << 0) +# define RADEON_DAC_RANGE_CNTL_MASK 0x03 +# define RADEON_DAC_BLANKING (1 << 2) +# define RADEON_DAC_CMP_EN (1 << 3) +# define RADEON_DAC_CMP_OUTPUT (1 << 7) +# define RADEON_DAC_8BIT_EN (1 << 8) +# define RADEON_DAC_TVO_EN (1 << 10) +# define RADEON_DAC_VGA_ADR_EN (1 << 13) +# define RADEON_DAC_PDWN (1 << 15) +# define RADEON_DAC_MASK_ALL (0xff << 24) +#define RADEON_DAC_CNTL2 0x007c +# define RADEON_DAC2_TV_CLK_SEL (0 << 1) +# define RADEON_DAC2_DAC_CLK_SEL (1 << 0) +# define RADEON_DAC2_DAC2_CLK_SEL (1 << 1) +# define RADEON_DAC2_PALETTE_ACC_CTL (1 << 5) +# define RADEON_DAC2_CMP_EN (1 << 7) +# define RADEON_DAC2_CMP_OUT_R (1 << 8) +# define RADEON_DAC2_CMP_OUT_G (1 << 9) +# define RADEON_DAC2_CMP_OUT_B (1 << 10) +# define RADEON_DAC2_CMP_OUTPUT (1 << 11) +#define RADEON_DAC_EXT_CNTL 0x0280 +# define RADEON_DAC2_FORCE_BLANK_OFF_EN (1 << 0) +# define RADEON_DAC2_FORCE_DATA_EN (1 << 1) +# define RADEON_DAC_FORCE_BLANK_OFF_EN (1 << 4) +# define RADEON_DAC_FORCE_DATA_EN (1 << 5) +# define RADEON_DAC_FORCE_DATA_SEL_MASK (3 << 6) +# define RADEON_DAC_FORCE_DATA_SEL_R (0 << 6) +# define RADEON_DAC_FORCE_DATA_SEL_G (1 << 6) +# define RADEON_DAC_FORCE_DATA_SEL_B (2 << 6) +# define RADEON_DAC_FORCE_DATA_SEL_RGB (3 << 6) +# define RADEON_DAC_FORCE_DATA_MASK 0x0003ff00 +# define RADEON_DAC_FORCE_DATA_SHIFT 8 +#define RADEON_DAC_MACRO_CNTL 0x0d04 +# define RADEON_DAC_PDWN_R (1 << 16) +# define RADEON_DAC_PDWN_G (1 << 17) +# define RADEON_DAC_PDWN_B (1 << 18) +#define RADEON_TV_DAC_CNTL 0x088c +# define RADEON_TV_DAC_NBLANK (1 << 0) +# define RADEON_TV_DAC_NHOLD (1 << 1) +# define RADEON_TV_DAC_PEDESTAL (1 << 2) +# define RADEON_TV_MONITOR_DETECT_EN (1 << 4) +# define RADEON_TV_DAC_CMPOUT (1 << 5) +# define RADEON_TV_DAC_STD_MASK (3 << 8) +# define RADEON_TV_DAC_STD_PAL (0 << 8) +# define RADEON_TV_DAC_STD_NTSC (1 << 8) +# define RADEON_TV_DAC_STD_PS2 (2 << 8) +# define RADEON_TV_DAC_STD_RS343 (3 << 8) +# define RADEON_TV_DAC_BGSLEEP (1 << 6) +# define RADEON_TV_DAC_BGADJ_MASK (0xf << 16) +# define RADEON_TV_DAC_BGADJ_SHIFT 16 +# define RADEON_TV_DAC_DACADJ_MASK (0xf << 20) +# define RADEON_TV_DAC_DACADJ_SHIFT 20 +# define RADEON_TV_DAC_RDACPD (1 << 24) +# define RADEON_TV_DAC_GDACPD (1 << 25) +# define RADEON_TV_DAC_BDACPD (1 << 26) +# define RADEON_TV_DAC_RDACDET (1 << 29) +# define RADEON_TV_DAC_GDACDET (1 << 30) +# define RADEON_TV_DAC_BDACDET (1 << 31) +# define R420_TV_DAC_DACADJ_MASK (0x1f << 20) +# define R420_TV_DAC_RDACPD (1 << 25) +# define R420_TV_DAC_GDACPD (1 << 26) +# define R420_TV_DAC_BDACPD (1 << 27) +# define R420_TV_DAC_TVENABLE (1 << 28) +#define RADEON_DISP_HW_DEBUG 0x0d14 +# define RADEON_CRT2_DISP1_SEL (1 << 5) +#define RADEON_DISP_OUTPUT_CNTL 0x0d64 +# define RADEON_DISP_DAC_SOURCE_MASK 0x03 +# define RADEON_DISP_DAC2_SOURCE_MASK 0x0c +# define RADEON_DISP_DAC_SOURCE_CRTC2 0x01 +# define RADEON_DISP_DAC_SOURCE_RMX 0x02 +# define RADEON_DISP_DAC_SOURCE_LTU 0x03 +# define RADEON_DISP_DAC2_SOURCE_CRTC2 0x04 +# define RADEON_DISP_TVDAC_SOURCE_MASK (0x03 << 2) +# define RADEON_DISP_TVDAC_SOURCE_CRTC 0x0 +# define RADEON_DISP_TVDAC_SOURCE_CRTC2 (0x01 << 2) +# define RADEON_DISP_TVDAC_SOURCE_RMX (0x02 << 2) +# define RADEON_DISP_TVDAC_SOURCE_LTU (0x03 << 2) +# define RADEON_DISP_TRANS_MATRIX_MASK (0x03 << 4) +# define RADEON_DISP_TRANS_MATRIX_ALPHA_MSB (0x00 << 4) +# define RADEON_DISP_TRANS_MATRIX_GRAPHICS (0x01 << 4) +# define RADEON_DISP_TRANS_MATRIX_VIDEO (0x02 << 4) +# define RADEON_DISP_TV_SOURCE_CRTC (1 << 16) /* crtc1 or crtc2 */ +# define RADEON_DISP_TV_SOURCE_LTU (0 << 16) /* linear transform unit */ +#define RADEON_DISP_TV_OUT_CNTL 0x0d6c +# define RADEON_DISP_TV_PATH_SRC_CRTC2 (1 << 16) +# define RADEON_DISP_TV_PATH_SRC_CRTC1 (0 << 16) +#define RADEON_DAC_CRC_SIG 0x02cc +#define RADEON_DAC_DATA 0x03c9 /* VGA */ +#define RADEON_DAC_MASK 0x03c6 /* VGA */ +#define RADEON_DAC_R_INDEX 0x03c7 /* VGA */ +#define RADEON_DAC_W_INDEX 0x03c8 /* VGA */ +#define RADEON_DDA_CONFIG 0x02e0 +#define RADEON_DDA_ON_OFF 0x02e4 +#define RADEON_DEFAULT_OFFSET 0x16e0 +#define RADEON_DEFAULT_PITCH 0x16e4 +#define RADEON_DEFAULT_SC_BOTTOM_RIGHT 0x16e8 +# define RADEON_DEFAULT_SC_RIGHT_MAX (0x1fff << 0) +# define RADEON_DEFAULT_SC_BOTTOM_MAX (0x1fff << 16) +#define RADEON_DESTINATION_3D_CLR_CMP_VAL 0x1820 +#define RADEON_DESTINATION_3D_CLR_CMP_MSK 0x1824 +#define RADEON_DEVICE_ID 0x0f02 /* PCI */ +#define RADEON_DISP_MISC_CNTL 0x0d00 +# define RADEON_SOFT_RESET_GRPH_PP (1 << 0) +#define RADEON_DISP_MERGE_CNTL 0x0d60 +# define RADEON_DISP_ALPHA_MODE_MASK 0x03 +# define RADEON_DISP_ALPHA_MODE_KEY 0 +# define RADEON_DISP_ALPHA_MODE_PER_PIXEL 1 +# define RADEON_DISP_ALPHA_MODE_GLOBAL 2 +# define RADEON_DISP_RGB_OFFSET_EN (1 << 8) +# define RADEON_DISP_GRPH_ALPHA_MASK (0xff << 16) +# define RADEON_DISP_OV0_ALPHA_MASK (0xff << 24) +# define RADEON_DISP_LIN_TRANS_BYPASS (0x01 << 9) +#define RADEON_DISP2_MERGE_CNTL 0x0d68 +# define RADEON_DISP2_RGB_OFFSET_EN (1 << 8) +#define RADEON_DISP_LIN_TRANS_GRPH_A 0x0d80 +#define RADEON_DISP_LIN_TRANS_GRPH_B 0x0d84 +#define RADEON_DISP_LIN_TRANS_GRPH_C 0x0d88 +#define RADEON_DISP_LIN_TRANS_GRPH_D 0x0d8c +#define RADEON_DISP_LIN_TRANS_GRPH_E 0x0d90 +#define RADEON_DISP_LIN_TRANS_GRPH_F 0x0d98 +#define RADEON_DP_BRUSH_BKGD_CLR 0x1478 +#define RADEON_DP_BRUSH_FRGD_CLR 0x147c +#define RADEON_DP_CNTL 0x16c0 +# define RADEON_DST_X_LEFT_TO_RIGHT (1 << 0) +# define RADEON_DST_Y_TOP_TO_BOTTOM (1 << 1) +# define RADEON_DP_DST_TILE_LINEAR (0 << 3) +# define RADEON_DP_DST_TILE_MACRO (1 << 3) +# define RADEON_DP_DST_TILE_MICRO (2 << 3) +# define RADEON_DP_DST_TILE_BOTH (3 << 3) +#define RADEON_DP_CNTL_XDIR_YDIR_YMAJOR 0x16d0 +# define RADEON_DST_Y_MAJOR (1 << 2) +# define RADEON_DST_Y_DIR_TOP_TO_BOTTOM (1 << 15) +# define RADEON_DST_X_DIR_LEFT_TO_RIGHT (1 << 31) +#define RADEON_DP_DATATYPE 0x16c4 +# define RADEON_HOST_BIG_ENDIAN_EN (1 << 29) +#define RADEON_DP_GUI_MASTER_CNTL 0x146c +# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) +# define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1) +# define RADEON_GMC_SRC_CLIPPING (1 << 2) +# define RADEON_GMC_DST_CLIPPING (1 << 3) +# define RADEON_GMC_BRUSH_DATATYPE_MASK (0x0f << 4) +# define RADEON_GMC_BRUSH_8X8_MONO_FG_BG (0 << 4) +# define RADEON_GMC_BRUSH_8X8_MONO_FG_LA (1 << 4) +# define RADEON_GMC_BRUSH_1X8_MONO_FG_BG (4 << 4) +# define RADEON_GMC_BRUSH_1X8_MONO_FG_LA (5 << 4) +# define RADEON_GMC_BRUSH_32x1_MONO_FG_BG (6 << 4) +# define RADEON_GMC_BRUSH_32x1_MONO_FG_LA (7 << 4) +# define RADEON_GMC_BRUSH_32x32_MONO_FG_BG (8 << 4) +# define RADEON_GMC_BRUSH_32x32_MONO_FG_LA (9 << 4) +# define RADEON_GMC_BRUSH_8x8_COLOR (10 << 4) +# define RADEON_GMC_BRUSH_1X8_COLOR (12 << 4) +# define RADEON_GMC_BRUSH_SOLID_COLOR (13 << 4) +# define RADEON_GMC_BRUSH_NONE (15 << 4) +# define RADEON_GMC_DST_8BPP_CI (2 << 8) +# define RADEON_GMC_DST_15BPP (3 << 8) +# define RADEON_GMC_DST_16BPP (4 << 8) +# define RADEON_GMC_DST_24BPP (5 << 8) +# define RADEON_GMC_DST_32BPP (6 << 8) +# define RADEON_GMC_DST_8BPP_RGB (7 << 8) +# define RADEON_GMC_DST_Y8 (8 << 8) +# define RADEON_GMC_DST_RGB8 (9 << 8) +# define RADEON_GMC_DST_VYUY (11 << 8) +# define RADEON_GMC_DST_YVYU (12 << 8) +# define RADEON_GMC_DST_AYUV444 (14 << 8) +# define RADEON_GMC_DST_ARGB4444 (15 << 8) +# define RADEON_GMC_DST_DATATYPE_MASK (0x0f << 8) +# define RADEON_GMC_DST_DATATYPE_SHIFT 8 +# define RADEON_GMC_SRC_DATATYPE_MASK (3 << 12) +# define RADEON_GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12) +# define RADEON_GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12) +# define RADEON_GMC_SRC_DATATYPE_COLOR (3 << 12) +# define RADEON_GMC_BYTE_PIX_ORDER (1 << 14) +# define RADEON_GMC_BYTE_MSB_TO_LSB (0 << 14) +# define RADEON_GMC_BYTE_LSB_TO_MSB (1 << 14) +# define RADEON_GMC_CONVERSION_TEMP (1 << 15) +# define RADEON_GMC_CONVERSION_TEMP_6500 (0 << 15) +# define RADEON_GMC_CONVERSION_TEMP_9300 (1 << 15) +# define RADEON_GMC_ROP3_MASK (0xff << 16) +# define RADEON_DP_SRC_SOURCE_MASK (7 << 24) +# define RADEON_DP_SRC_SOURCE_MEMORY (2 << 24) +# define RADEON_DP_SRC_SOURCE_HOST_DATA (3 << 24) +# define RADEON_GMC_3D_FCN_EN (1 << 27) +# define RADEON_GMC_CLR_CMP_CNTL_DIS (1 << 28) +# define RADEON_GMC_AUX_CLIP_DIS (1 << 29) +# define RADEON_GMC_WR_MSK_DIS (1 << 30) +# define RADEON_GMC_LD_BRUSH_Y_X (1 << 31) +# define RADEON_ROP3_ZERO 0x00000000 +# define RADEON_ROP3_DSa 0x00880000 +# define RADEON_ROP3_SDna 0x00440000 +# define RADEON_ROP3_S 0x00cc0000 +# define RADEON_ROP3_DSna 0x00220000 +# define RADEON_ROP3_D 0x00aa0000 +# define RADEON_ROP3_DSx 0x00660000 +# define RADEON_ROP3_DSo 0x00ee0000 +# define RADEON_ROP3_DSon 0x00110000 +# define RADEON_ROP3_DSxn 0x00990000 +# define RADEON_ROP3_Dn 0x00550000 +# define RADEON_ROP3_SDno 0x00dd0000 +# define RADEON_ROP3_Sn 0x00330000 +# define RADEON_ROP3_DSno 0x00bb0000 +# define RADEON_ROP3_DSan 0x00770000 +# define RADEON_ROP3_ONE 0x00ff0000 +# define RADEON_ROP3_DPa 0x00a00000 +# define RADEON_ROP3_PDna 0x00500000 +# define RADEON_ROP3_P 0x00f00000 +# define RADEON_ROP3_DPna 0x000a0000 +# define RADEON_ROP3_D 0x00aa0000 +# define RADEON_ROP3_DPx 0x005a0000 +# define RADEON_ROP3_DPo 0x00fa0000 +# define RADEON_ROP3_DPon 0x00050000 +# define RADEON_ROP3_PDxn 0x00a50000 +# define RADEON_ROP3_PDno 0x00f50000 +# define RADEON_ROP3_Pn 0x000f0000 +# define RADEON_ROP3_DPno 0x00af0000 +# define RADEON_ROP3_DPan 0x005f0000 +#define RADEON_DP_GUI_MASTER_CNTL_C 0x1c84 +#define RADEON_DP_MIX 0x16c8 +#define RADEON_DP_SRC_BKGD_CLR 0x15dc +#define RADEON_DP_SRC_FRGD_CLR 0x15d8 +#define RADEON_DP_WRITE_MASK 0x16cc +#define RADEON_DST_BRES_DEC 0x1630 +#define RADEON_DST_BRES_ERR 0x1628 +#define RADEON_DST_BRES_INC 0x162c +#define RADEON_DST_BRES_LNTH 0x1634 +#define RADEON_DST_BRES_LNTH_SUB 0x1638 +#define RADEON_DST_HEIGHT 0x1410 +#define RADEON_DST_HEIGHT_WIDTH 0x143c +#define RADEON_DST_HEIGHT_WIDTH_8 0x158c +#define RADEON_DST_HEIGHT_WIDTH_BW 0x15b4 +#define RADEON_DST_HEIGHT_Y 0x15a0 +#define RADEON_DST_LINE_START 0x1600 +#define RADEON_DST_LINE_END 0x1604 +#define RADEON_DST_LINE_PATCOUNT 0x1608 +# define RADEON_BRES_CNTL_SHIFT 8 +#define RADEON_DST_OFFSET 0x1404 +#define RADEON_DST_PITCH 0x1408 +#define RADEON_DST_PITCH_OFFSET 0x142c +#define RADEON_DST_PITCH_OFFSET_C 0x1c80 +# define RADEON_PITCH_SHIFT 21 +# define RADEON_DST_TILE_LINEAR (0 << 30) +# define RADEON_DST_TILE_MACRO (1 << 30) +# define RADEON_DST_TILE_MICRO (2 << 30) +# define RADEON_DST_TILE_BOTH (3 << 30) +#define RADEON_DST_WIDTH 0x140c +#define RADEON_DST_WIDTH_HEIGHT 0x1598 +#define RADEON_DST_WIDTH_X 0x1588 +#define RADEON_DST_WIDTH_X_INCY 0x159c +#define RADEON_DST_X 0x141c +#define RADEON_DST_X_SUB 0x15a4 +#define RADEON_DST_X_Y 0x1594 +#define RADEON_DST_Y 0x1420 +#define RADEON_DST_Y_SUB 0x15a8 +#define RADEON_DST_Y_X 0x1438 + +#define RADEON_FCP_CNTL 0x0910 +# define RADEON_FCP0_SRC_PCICLK 0 +# define RADEON_FCP0_SRC_PCLK 1 +# define RADEON_FCP0_SRC_PCLKb 2 +# define RADEON_FCP0_SRC_HREF 3 +# define RADEON_FCP0_SRC_GND 4 +# define RADEON_FCP0_SRC_HREFb 5 +#define RADEON_FLUSH_1 0x1704 +#define RADEON_FLUSH_2 0x1708 +#define RADEON_FLUSH_3 0x170c +#define RADEON_FLUSH_4 0x1710 +#define RADEON_FLUSH_5 0x1714 +#define RADEON_FLUSH_6 0x1718 +#define RADEON_FLUSH_7 0x171c +#define RADEON_FOG_3D_TABLE_START 0x1810 +#define RADEON_FOG_3D_TABLE_END 0x1814 +#define RADEON_FOG_3D_TABLE_DENSITY 0x181c +#define RADEON_FOG_TABLE_INDEX 0x1a14 +#define RADEON_FOG_TABLE_DATA 0x1a18 +#define RADEON_FP_CRTC_H_TOTAL_DISP 0x0250 +#define RADEON_FP_CRTC_V_TOTAL_DISP 0x0254 +# define RADEON_FP_CRTC_H_TOTAL_MASK 0x000003ff +# define RADEON_FP_CRTC_H_DISP_MASK 0x01ff0000 +# define RADEON_FP_CRTC_V_TOTAL_MASK 0x00000fff +# define RADEON_FP_CRTC_V_DISP_MASK 0x0fff0000 +# define RADEON_FP_H_SYNC_STRT_CHAR_MASK 0x00001ff8 +# define RADEON_FP_H_SYNC_WID_MASK 0x003f0000 +# define RADEON_FP_V_SYNC_STRT_MASK 0x00000fff +# define RADEON_FP_V_SYNC_WID_MASK 0x001f0000 +# define RADEON_FP_CRTC_H_TOTAL_SHIFT 0x00000000 +# define RADEON_FP_CRTC_H_DISP_SHIFT 0x00000010 +# define RADEON_FP_CRTC_V_TOTAL_SHIFT 0x00000000 +# define RADEON_FP_CRTC_V_DISP_SHIFT 0x00000010 +# define RADEON_FP_H_SYNC_STRT_CHAR_SHIFT 0x00000003 +# define RADEON_FP_H_SYNC_WID_SHIFT 0x00000010 +# define RADEON_FP_V_SYNC_STRT_SHIFT 0x00000000 +# define RADEON_FP_V_SYNC_WID_SHIFT 0x00000010 +#define RADEON_FP_GEN_CNTL 0x0284 +# define RADEON_FP_FPON (1 << 0) +# define RADEON_FP_BLANK_EN (1 << 1) +# define RADEON_FP_TMDS_EN (1 << 2) +# define RADEON_FP_PANEL_FORMAT (1 << 3) +# define RADEON_FP_EN_TMDS (1 << 7) +# define RADEON_FP_DETECT_SENSE (1 << 8) +# define R200_FP_SOURCE_SEL_MASK (3 << 10) +# define R200_FP_SOURCE_SEL_CRTC1 (0 << 10) +# define R200_FP_SOURCE_SEL_CRTC2 (1 << 10) +# define R200_FP_SOURCE_SEL_RMX (2 << 10) +# define R200_FP_SOURCE_SEL_TRANS (3 << 10) +# define RADEON_FP_SEL_CRTC1 (0 << 13) +# define RADEON_FP_SEL_CRTC2 (1 << 13) +# define RADEON_FP_CRTC_DONT_SHADOW_HPAR (1 << 15) +# define RADEON_FP_CRTC_DONT_SHADOW_VPAR (1 << 16) +# define RADEON_FP_CRTC_DONT_SHADOW_HEND (1 << 17) +# define RADEON_FP_CRTC_USE_SHADOW_VEND (1 << 18) +# define RADEON_FP_RMX_HVSYNC_CONTROL_EN (1 << 20) +# define RADEON_FP_DFP_SYNC_SEL (1 << 21) +# define RADEON_FP_CRTC_LOCK_8DOT (1 << 22) +# define RADEON_FP_CRT_SYNC_SEL (1 << 23) +# define RADEON_FP_USE_SHADOW_EN (1 << 24) +# define RADEON_FP_CRT_SYNC_ALT (1 << 26) +#define RADEON_FP2_GEN_CNTL 0x0288 +# define RADEON_FP2_BLANK_EN (1 << 1) +# define RADEON_FP2_ON (1 << 2) +# define RADEON_FP2_PANEL_FORMAT (1 << 3) +# define RADEON_FP2_DETECT_SENSE (1 << 8) +# define R200_FP2_SOURCE_SEL_MASK (3 << 10) +# define R200_FP2_SOURCE_SEL_CRTC1 (0 << 10) +# define R200_FP2_SOURCE_SEL_CRTC2 (1 << 10) +# define R200_FP2_SOURCE_SEL_RMX (2 << 10) +# define R200_FP2_SOURCE_SEL_TRANS_UNIT (3 << 10) +# define RADEON_FP2_SRC_SEL_MASK (3 << 13) +# define RADEON_FP2_SRC_SEL_CRTC2 (1 << 13) +# define RADEON_FP2_FP_POL (1 << 16) +# define RADEON_FP2_LP_POL (1 << 17) +# define RADEON_FP2_SCK_POL (1 << 18) +# define RADEON_FP2_LCD_CNTL_MASK (7 << 19) +# define RADEON_FP2_PAD_FLOP_EN (1 << 22) +# define RADEON_FP2_CRC_EN (1 << 23) +# define RADEON_FP2_CRC_READ_EN (1 << 24) +# define RADEON_FP2_DVO_EN (1 << 25) +# define RADEON_FP2_DVO_RATE_SEL_SDR (1 << 26) +# define R200_FP2_DVO_RATE_SEL_SDR (1 << 27) +# define R300_FP2_DVO_CLOCK_MODE_SINGLE (1 << 28) +# define R300_FP2_DVO_DUAL_CHANNEL_EN (1 << 29) +#define RADEON_FP_H_SYNC_STRT_WID 0x02c4 +#define RADEON_FP_H2_SYNC_STRT_WID 0x03c4 +#define RADEON_FP_HORZ_STRETCH 0x028c +#define RADEON_FP_HORZ2_STRETCH 0x038c +# define RADEON_HORZ_STRETCH_RATIO_MASK 0xffff +# define RADEON_HORZ_STRETCH_RATIO_MAX 4096 +# define RADEON_HORZ_PANEL_SIZE (0x1ff << 16) +# define RADEON_HORZ_PANEL_SHIFT 16 +# define RADEON_HORZ_STRETCH_PIXREP (0 << 25) +# define RADEON_HORZ_STRETCH_BLEND (1 << 26) +# define RADEON_HORZ_STRETCH_ENABLE (1 << 25) +# define RADEON_HORZ_AUTO_RATIO (1 << 27) +# define RADEON_HORZ_FP_LOOP_STRETCH (0x7 << 28) +# define RADEON_HORZ_AUTO_RATIO_INC (1 << 31) +#define RADEON_FP_HORZ_VERT_ACTIVE 0x0278 +#define RADEON_FP_V_SYNC_STRT_WID 0x02c8 +#define RADEON_FP_VERT_STRETCH 0x0290 +#define RADEON_FP_V2_SYNC_STRT_WID 0x03c8 +#define RADEON_FP_VERT2_STRETCH 0x0390 +# define RADEON_VERT_PANEL_SIZE (0xfff << 12) +# define RADEON_VERT_PANEL_SHIFT 12 +# define RADEON_VERT_STRETCH_RATIO_MASK 0xfff +# define RADEON_VERT_STRETCH_RATIO_SHIFT 0 +# define RADEON_VERT_STRETCH_RATIO_MAX 4096 +# define RADEON_VERT_STRETCH_ENABLE (1 << 25) +# define RADEON_VERT_STRETCH_LINEREP (0 << 26) +# define RADEON_VERT_STRETCH_BLEND (1 << 26) +# define RADEON_VERT_AUTO_RATIO_EN (1 << 27) +# define RADEON_VERT_AUTO_RATIO_INC (1 << 31) +# define RADEON_VERT_STRETCH_RESERVED 0x71000000 +#define RS400_FP_2ND_GEN_CNTL 0x0384 +# define RS400_FP_2ND_ON (1 << 0) +# define RS400_FP_2ND_BLANK_EN (1 << 1) +# define RS400_TMDS_2ND_EN (1 << 2) +# define RS400_PANEL_FORMAT_2ND (1 << 3) +# define RS400_FP_2ND_EN_TMDS (1 << 7) +# define RS400_FP_2ND_DETECT_SENSE (1 << 8) +# define RS400_FP_2ND_SOURCE_SEL_MASK (3 << 10) +# define RS400_FP_2ND_SOURCE_SEL_CRTC1 (0 << 10) +# define RS400_FP_2ND_SOURCE_SEL_CRTC2 (1 << 10) +# define RS400_FP_2ND_SOURCE_SEL_RMX (2 << 10) +# define RS400_FP_2ND_DETECT_EN (1 << 12) +# define RS400_HPD_2ND_SEL (1 << 13) +#define RS400_FP2_2_GEN_CNTL 0x0388 +# define RS400_FP2_2_BLANK_EN (1 << 1) +# define RS400_FP2_2_ON (1 << 2) +# define RS400_FP2_2_PANEL_FORMAT (1 << 3) +# define RS400_FP2_2_DETECT_SENSE (1 << 8) +# define RS400_FP2_2_SOURCE_SEL_MASK (3 << 10) +# define RS400_FP2_2_SOURCE_SEL_CRTC1 (0 << 10) +# define RS400_FP2_2_SOURCE_SEL_CRTC2 (1 << 10) +# define RS400_FP2_2_SOURCE_SEL_RMX (2 << 10) +# define RS400_FP2_2_DVO2_EN (1 << 25) +#define RS400_TMDS2_CNTL 0x0394 +#define RS400_TMDS2_TRANSMITTER_CNTL 0x03a4 +# define RS400_TMDS2_PLLEN (1 << 0) +# define RS400_TMDS2_PLLRST (1 << 1) + +#define RADEON_GEN_INT_CNTL 0x0040 +#define RADEON_GEN_INT_STATUS 0x0044 +# define RADEON_VSYNC_INT_AK (1 << 2) +# define RADEON_VSYNC_INT (1 << 2) +# define RADEON_VSYNC2_INT_AK (1 << 6) +# define RADEON_VSYNC2_INT (1 << 6) +#define RADEON_GENENB 0x03c3 /* VGA */ +#define RADEON_GENFC_RD 0x03ca /* VGA */ +#define RADEON_GENFC_WT 0x03da /* VGA, 0x03ba */ +#define RADEON_GENMO_RD 0x03cc /* VGA */ +#define RADEON_GENMO_WT 0x03c2 /* VGA */ +#define RADEON_GENS0 0x03c2 /* VGA */ +#define RADEON_GENS1 0x03da /* VGA, 0x03ba */ +#define RADEON_GPIO_MONID 0x0068 /* DDC interface via I2C */ +#define RADEON_GPIO_MONIDB 0x006c +#define RADEON_GPIO_CRT2_DDC 0x006c +#define RADEON_GPIO_DVI_DDC 0x0064 +#define RADEON_GPIO_VGA_DDC 0x0060 +# define RADEON_GPIO_A_0 (1 << 0) +# define RADEON_GPIO_A_1 (1 << 1) +# define RADEON_GPIO_Y_0 (1 << 8) +# define RADEON_GPIO_Y_1 (1 << 9) +# define RADEON_GPIO_Y_SHIFT_0 8 +# define RADEON_GPIO_Y_SHIFT_1 9 +# define RADEON_GPIO_EN_0 (1 << 16) +# define RADEON_GPIO_EN_1 (1 << 17) +# define RADEON_GPIO_MASK_0 (1 << 24) /*??*/ +# define RADEON_GPIO_MASK_1 (1 << 25) /*??*/ +#define RADEON_GRPH8_DATA 0x03cf /* VGA */ +#define RADEON_GRPH8_IDX 0x03ce /* VGA */ +#define RADEON_GUI_SCRATCH_REG0 0x15e0 +#define RADEON_GUI_SCRATCH_REG1 0x15e4 +#define RADEON_GUI_SCRATCH_REG2 0x15e8 +#define RADEON_GUI_SCRATCH_REG3 0x15ec +#define RADEON_GUI_SCRATCH_REG4 0x15f0 +#define RADEON_GUI_SCRATCH_REG5 0x15f4 + +#define RADEON_HEADER 0x0f0e /* PCI */ +#define RADEON_HOST_DATA0 0x17c0 +#define RADEON_HOST_DATA1 0x17c4 +#define RADEON_HOST_DATA2 0x17c8 +#define RADEON_HOST_DATA3 0x17cc +#define RADEON_HOST_DATA4 0x17d0 +#define RADEON_HOST_DATA5 0x17d4 +#define RADEON_HOST_DATA6 0x17d8 +#define RADEON_HOST_DATA7 0x17dc +#define RADEON_HOST_DATA_LAST 0x17e0 +#define RADEON_HOST_PATH_CNTL 0x0130 +# define RADEON_HDP_SOFT_RESET (1 << 26) +# define RADEON_HDP_APER_CNTL (1 << 23) +#define RADEON_HTOTAL_CNTL 0x0009 /* PLL */ +# define RADEON_HTOT_CNTL_VGA_EN (1 << 28) +#define RADEON_HTOTAL2_CNTL 0x002e /* PLL */ + + /* Multimedia I2C bus */ +#define RADEON_I2C_CNTL_0 0x0090 +#define RADEON_I2C_DONE (1<<0) +#define RADEON_I2C_NACK (1<<1) +#define RADEON_I2C_HALT (1<<2) +#define RADEON_I2C_SOFT_RST (1<<5) +#define RADEON_I2C_DRIVE_EN (1<<6) +#define RADEON_I2C_DRIVE_SEL (1<<7) +#define RADEON_I2C_START (1<<8) +#define RADEON_I2C_STOP (1<<9) +#define RADEON_I2C_RECEIVE (1<<10) +#define RADEON_I2C_ABORT (1<<11) +#define RADEON_I2C_GO (1<<12) +#define RADEON_I2C_CNTL_1 0x0094 +#define RADEON_I2C_SEL (1<<16) +#define RADEON_I2C_EN (1<<17) +#define RADEON_I2C_DATA 0x0098 + +#define RADEON_DVI_I2C_CNTL_0 0x02e0 +#define RADEON_DVI_I2C_CNTL_1 0x02e4 /* ? */ +#define RADEON_DVI_I2C_DATA 0x02e8 + +#define RADEON_INTERRUPT_LINE 0x0f3c /* PCI */ +#define RADEON_INTERRUPT_PIN 0x0f3d /* PCI */ +#define RADEON_IO_BASE 0x0f14 /* PCI */ + +#define RADEON_LATENCY 0x0f0d /* PCI */ +#define RADEON_LEAD_BRES_DEC 0x1608 +#define RADEON_LEAD_BRES_LNTH 0x161c +#define RADEON_LEAD_BRES_LNTH_SUB 0x1624 +#define RADEON_LVDS_GEN_CNTL 0x02d0 +# define RADEON_LVDS_ON (1 << 0) +# define RADEON_LVDS_DISPLAY_DIS (1 << 1) +# define RADEON_LVDS_PANEL_TYPE (1 << 2) +# define RADEON_LVDS_PANEL_FORMAT (1 << 3) +# define RADEON_LVDS_RST_FM (1 << 6) +# define RADEON_LVDS_EN (1 << 7) +# define RADEON_LVDS_BL_MOD_LEVEL_SHIFT 8 +# define RADEON_LVDS_BL_MOD_LEVEL_MASK (0xff << 8) +# define RADEON_LVDS_BL_MOD_EN (1 << 16) +# define RADEON_LVDS_DIGON (1 << 18) +# define RADEON_LVDS_BLON (1 << 19) +# define RADEON_LVDS_SEL_CRTC2 (1 << 23) +#define RADEON_LVDS_PLL_CNTL 0x02d4 +# define RADEON_HSYNC_DELAY_SHIFT 28 +# define RADEON_HSYNC_DELAY_MASK (0xf << 28) +# define RADEON_LVDS_PLL_EN (1 << 16) +# define RADEON_LVDS_PLL_RESET (1 << 17) +# define R300_LVDS_SRC_SEL_MASK (3 << 18) +# define R300_LVDS_SRC_SEL_CRTC1 (0 << 18) +# define R300_LVDS_SRC_SEL_CRTC2 (1 << 18) +# define R300_LVDS_SRC_SEL_RMX (2 << 18) + +#define RADEON_MAX_LATENCY 0x0f3f /* PCI */ +#define RADEON_MC_AGP_LOCATION 0x014c +#define RADEON_MC_FB_LOCATION 0x0148 +#define RADEON_DISPLAY_BASE_ADDR 0x23c +#define RADEON_DISPLAY2_BASE_ADDR 0x33c +#define RADEON_OV0_BASE_ADDR 0x43c +#define RADEON_NB_TOM 0x15c +#define R300_MC_INIT_MISC_LAT_TIMER 0x180 +# define R300_MC_DISP0R_INIT_LAT_SHIFT 8 +# define R300_MC_DISP0R_INIT_LAT_MASK 0xf +# define R300_MC_DISP1R_INIT_LAT_SHIFT 12 +# define R300_MC_DISP1R_INIT_LAT_MASK 0xf +#define RADEON_MCLK_CNTL 0x0012 /* PLL */ +# define RADEON_FORCEON_MCLKA (1 << 16) +# define RADEON_FORCEON_MCLKB (1 << 17) +# define RADEON_FORCEON_YCLKA (1 << 18) +# define RADEON_FORCEON_YCLKB (1 << 19) +# define RADEON_FORCEON_MC (1 << 20) +# define RADEON_FORCEON_AIC (1 << 21) +# define R300_DISABLE_MC_MCLKA (1 << 21) +# define R300_DISABLE_MC_MCLKB (1 << 21) +#define RADEON_MCLK_MISC 0x001f /* PLL */ +# define RADEON_MC_MCLK_MAX_DYN_STOP_LAT (1 << 12) +# define RADEON_IO_MCLK_MAX_DYN_STOP_LAT (1 << 13) +# define RADEON_MC_MCLK_DYN_ENABLE (1 << 14) +# define RADEON_IO_MCLK_DYN_ENABLE (1 << 15) +#define RADEON_LCD_GPIO_MASK 0x01a0 +#define RADEON_GPIOPAD_EN 0x01a0 +#define RADEON_LCD_GPIO_Y_REG 0x01a4 +#define RADEON_MDGPIO_A_REG 0x01ac +#define RADEON_MDGPIO_EN_REG 0x01b0 +#define RADEON_MDGPIO_MASK 0x0198 +#define RADEON_GPIOPAD_MASK 0x0198 +#define RADEON_GPIOPAD_A 0x019c +#define RADEON_MDGPIO_Y_REG 0x01b4 +#define RADEON_MEM_ADDR_CONFIG 0x0148 +#define RADEON_MEM_BASE 0x0f10 /* PCI */ +#define RADEON_MEM_CNTL 0x0140 +# define RADEON_MEM_NUM_CHANNELS_MASK 0x01 +# define RADEON_MEM_USE_B_CH_ONLY (1 << 1) +# define RV100_HALF_MODE (1 << 3) +# define R300_MEM_NUM_CHANNELS_MASK 0x03 +# define R300_MEM_USE_CD_CH_ONLY (1 << 2) +#define RADEON_MEM_TIMING_CNTL 0x0144 /* EXT_MEM_CNTL */ +#define RADEON_MEM_INIT_LAT_TIMER 0x0154 +#define RADEON_MEM_INTF_CNTL 0x014c +#define RADEON_MEM_SDRAM_MODE_REG 0x0158 +# define RADEON_SDRAM_MODE_MASK 0xffff0000 +# define RADEON_B3MEM_RESET_MASK 0x6fffffff +# define RADEON_MEM_CFG_TYPE_DDR (1 << 30) +#define RADEON_MEM_STR_CNTL 0x0150 +# define RADEON_MEM_PWRUP_COMPL_A (1 << 0) +# define RADEON_MEM_PWRUP_COMPL_B (1 << 1) +# define R300_MEM_PWRUP_COMPL_C (1 << 2) +# define R300_MEM_PWRUP_COMPL_D (1 << 3) +# define RADEON_MEM_PWRUP_COMPLETE 0x03 +# define R300_MEM_PWRUP_COMPLETE 0x0f +#define RADEON_MC_STATUS 0x0150 +# define RADEON_MC_IDLE (1 << 2) +# define R300_MC_IDLE (1 << 4) +#define RADEON_MEM_VGA_RP_SEL 0x003c +#define RADEON_MEM_VGA_WP_SEL 0x0038 +#define RADEON_MIN_GRANT 0x0f3e /* PCI */ +#define RADEON_MM_DATA 0x0004 +#define RADEON_MM_INDEX 0x0000 +#define RADEON_MPLL_CNTL 0x000e /* PLL */ +#define RADEON_MPP_TB_CONFIG 0x01c0 /* ? */ +#define RADEON_MPP_GP_CONFIG 0x01c8 /* ? */ +#define RADEON_SEPROM_CNTL1 0x01c0 +# define RADEON_SCK_PRESCALE_SHIFT 24 +# define RADEON_SCK_PRESCALE_MASK (0xff << 24) +#define R300_MC_IND_INDEX 0x01f8 +# define R300_MC_IND_ADDR_MASK 0x3f +# define R300_MC_IND_WR_EN (1 << 8) +#define R300_MC_IND_DATA 0x01fc +#define R300_MC_READ_CNTL_AB 0x017c +# define R300_MEM_RBS_POSITION_A_MASK 0x03 +#define R300_MC_READ_CNTL_CD_mcind 0x24 +# define R300_MEM_RBS_POSITION_C_MASK 0x03 + +#define RADEON_N_VIF_COUNT 0x0248 + +#define RADEON_OV0_AUTO_FLIP_CNTL 0x0470 +# define RADEON_OV0_AUTO_FLIP_CNTL_SOFT_BUF_NUM 0x00000007 +# define RADEON_OV0_AUTO_FLIP_CNTL_SOFT_REPEAT_FIELD 0x00000008 +# define RADEON_OV0_AUTO_FLIP_CNTL_SOFT_BUF_ODD 0x00000010 +# define RADEON_OV0_AUTO_FLIP_CNTL_IGNORE_REPEAT_FIELD 0x00000020 +# define RADEON_OV0_AUTO_FLIP_CNTL_SOFT_EOF_TOGGLE 0x00000040 +# define RADEON_OV0_AUTO_FLIP_CNTL_VID_PORT_SELECT 0x00000300 +# define RADEON_OV0_AUTO_FLIP_CNTL_P1_FIRST_LINE_EVEN 0x00010000 +# define RADEON_OV0_AUTO_FLIP_CNTL_SHIFT_EVEN_DOWN 0x00040000 +# define RADEON_OV0_AUTO_FLIP_CNTL_SHIFT_ODD_DOWN 0x00080000 +# define RADEON_OV0_AUTO_FLIP_CNTL_FIELD_POL_SOURCE 0x00800000 + +#define RADEON_OV0_COLOUR_CNTL 0x04E0 +#define RADEON_OV0_DEINTERLACE_PATTERN 0x0474 +#define RADEON_OV0_EXCLUSIVE_HORZ 0x0408 +# define RADEON_EXCL_HORZ_START_MASK 0x000000ff +# define RADEON_EXCL_HORZ_END_MASK 0x0000ff00 +# define RADEON_EXCL_HORZ_BACK_PORCH_MASK 0x00ff0000 +# define RADEON_EXCL_HORZ_EXCLUSIVE_EN 0x80000000 +#define RADEON_OV0_EXCLUSIVE_VERT 0x040C +# define RADEON_EXCL_VERT_START_MASK 0x000003ff +# define RADEON_EXCL_VERT_END_MASK 0x03ff0000 +#define RADEON_OV0_FILTER_CNTL 0x04A0 +# define RADEON_FILTER_PROGRAMMABLE_COEF 0x0 +# define RADEON_FILTER_HC_COEF_HORZ_Y 0x1 +# define RADEON_FILTER_HC_COEF_HORZ_UV 0x2 +# define RADEON_FILTER_HC_COEF_VERT_Y 0x4 +# define RADEON_FILTER_HC_COEF_VERT_UV 0x8 +# define RADEON_FILTER_HARDCODED_COEF 0xf +# define RADEON_FILTER_COEF_MASK 0xf + +#define RADEON_OV0_FOUR_TAP_COEF_0 0x04B0 +#define RADEON_OV0_FOUR_TAP_COEF_1 0x04B4 +#define RADEON_OV0_FOUR_TAP_COEF_2 0x04B8 +#define RADEON_OV0_FOUR_TAP_COEF_3 0x04BC +#define RADEON_OV0_FOUR_TAP_COEF_4 0x04C0 +#define RADEON_OV0_FLAG_CNTL 0x04DC +#define RADEON_OV0_GAMMA_000_00F 0x0d40 +#define RADEON_OV0_GAMMA_010_01F 0x0d44 +#define RADEON_OV0_GAMMA_020_03F 0x0d48 +#define RADEON_OV0_GAMMA_040_07F 0x0d4c +#define RADEON_OV0_GAMMA_080_0BF 0x0e00 +#define RADEON_OV0_GAMMA_0C0_0FF 0x0e04 +#define RADEON_OV0_GAMMA_100_13F 0x0e08 +#define RADEON_OV0_GAMMA_140_17F 0x0e0c +#define RADEON_OV0_GAMMA_180_1BF 0x0e10 +#define RADEON_OV0_GAMMA_1C0_1FF 0x0e14 +#define RADEON_OV0_GAMMA_200_23F 0x0e18 +#define RADEON_OV0_GAMMA_240_27F 0x0e1c +#define RADEON_OV0_GAMMA_280_2BF 0x0e20 +#define RADEON_OV0_GAMMA_2C0_2FF 0x0e24 +#define RADEON_OV0_GAMMA_300_33F 0x0e28 +#define RADEON_OV0_GAMMA_340_37F 0x0e2c +#define RADEON_OV0_GAMMA_380_3BF 0x0d50 +#define RADEON_OV0_GAMMA_3C0_3FF 0x0d54 +#define RADEON_OV0_GRAPHICS_KEY_CLR_LOW 0x04EC +#define RADEON_OV0_GRAPHICS_KEY_CLR_HIGH 0x04F0 +#define RADEON_OV0_H_INC 0x0480 +#define RADEON_OV0_KEY_CNTL 0x04F4 +# define RADEON_VIDEO_KEY_FN_MASK 0x00000003L +# define RADEON_VIDEO_KEY_FN_FALSE 0x00000000L +# define RADEON_VIDEO_KEY_FN_TRUE 0x00000001L +# define RADEON_VIDEO_KEY_FN_EQ 0x00000002L +# define RADEON_VIDEO_KEY_FN_NE 0x00000003L +# define RADEON_GRAPHIC_KEY_FN_MASK 0x00000030L +# define RADEON_GRAPHIC_KEY_FN_FALSE 0x00000000L +# define RADEON_GRAPHIC_KEY_FN_TRUE 0x00000010L +# define RADEON_GRAPHIC_KEY_FN_EQ 0x00000020L +# define RADEON_GRAPHIC_KEY_FN_NE 0x00000030L +# define RADEON_CMP_MIX_MASK 0x00000100L +# define RADEON_CMP_MIX_OR 0x00000000L +# define RADEON_CMP_MIX_AND 0x00000100L +#define RADEON_OV0_LIN_TRANS_A 0x0d20 +#define RADEON_OV0_LIN_TRANS_B 0x0d24 +#define RADEON_OV0_LIN_TRANS_C 0x0d28 +#define RADEON_OV0_LIN_TRANS_D 0x0d2c +#define RADEON_OV0_LIN_TRANS_E 0x0d30 +#define RADEON_OV0_LIN_TRANS_F 0x0d34 +#define RADEON_OV0_P1_BLANK_LINES_AT_TOP 0x0430 +# define RADEON_P1_BLNK_LN_AT_TOP_M1_MASK 0x00000fffL +# define RADEON_P1_ACTIVE_LINES_M1 0x0fff0000L +#define RADEON_OV0_P1_H_ACCUM_INIT 0x0488 +#define RADEON_OV0_P1_V_ACCUM_INIT 0x0428 +# define RADEON_OV0_P1_MAX_LN_IN_PER_LN_OUT 0x00000003L +# define RADEON_OV0_P1_V_ACCUM_INIT_MASK 0x01ff8000L +#define RADEON_OV0_P1_X_START_END 0x0494 +#define RADEON_OV0_P2_X_START_END 0x0498 +#define RADEON_OV0_P23_BLANK_LINES_AT_TOP 0x0434 +# define RADEON_P23_BLNK_LN_AT_TOP_M1_MASK 0x000007ffL +# define RADEON_P23_ACTIVE_LINES_M1 0x07ff0000L +#define RADEON_OV0_P23_H_ACCUM_INIT 0x048C +#define RADEON_OV0_P23_V_ACCUM_INIT 0x042C +#define RADEON_OV0_P3_X_START_END 0x049C +#define RADEON_OV0_REG_LOAD_CNTL 0x0410 +# define RADEON_REG_LD_CTL_LOCK 0x00000001L +# define RADEON_REG_LD_CTL_VBLANK_DURING_LOCK 0x00000002L +# define RADEON_REG_LD_CTL_STALL_GUI_UNTIL_FLIP 0x00000004L +# define RADEON_REG_LD_CTL_LOCK_READBACK 0x00000008L +# define RADEON_REG_LD_CTL_FLIP_READBACK 0x00000010L +#define RADEON_OV0_SCALE_CNTL 0x0420 +# define RADEON_SCALER_HORZ_PICK_NEAREST 0x00000004L +# define RADEON_SCALER_VERT_PICK_NEAREST 0x00000008L +# define RADEON_SCALER_SIGNED_UV 0x00000010L +# define RADEON_SCALER_GAMMA_SEL_MASK 0x00000060L +# define RADEON_SCALER_GAMMA_SEL_BRIGHT 0x00000000L +# define RADEON_SCALER_GAMMA_SEL_G22 0x00000020L +# define RADEON_SCALER_GAMMA_SEL_G18 0x00000040L +# define RADEON_SCALER_GAMMA_SEL_G14 0x00000060L +# define RADEON_SCALER_COMCORE_SHIFT_UP_ONE 0x00000080L +# define RADEON_SCALER_SURFAC_FORMAT 0x00000f00L +# define RADEON_SCALER_SOURCE_15BPP 0x00000300L +# define RADEON_SCALER_SOURCE_16BPP 0x00000400L +# define RADEON_SCALER_SOURCE_32BPP 0x00000600L +# define RADEON_SCALER_SOURCE_YUV9 0x00000900L +# define RADEON_SCALER_SOURCE_YUV12 0x00000A00L +# define RADEON_SCALER_SOURCE_VYUY422 0x00000B00L +# define RADEON_SCALER_SOURCE_YVYU422 0x00000C00L +# define RADEON_SCALER_ADAPTIVE_DEINT 0x00001000L +# define RADEON_SCALER_TEMPORAL_DEINT 0x00002000L +# define RADEON_SCALER_CRTC_SEL 0x00004000L +# define RADEON_SCALER_SMART_SWITCH 0x00008000L +# define RADEON_SCALER_BURST_PER_PLANE 0x007F0000L +# define RADEON_SCALER_DOUBLE_BUFFER 0x01000000L +# define RADEON_SCALER_DIS_LIMIT 0x08000000L +# define RADEON_SCALER_LIN_TRANS_BYPASS 0x10000000L +# define RADEON_SCALER_INT_EMU 0x20000000L +# define RADEON_SCALER_ENABLE 0x40000000L +# define RADEON_SCALER_SOFT_RESET 0x80000000L +#define RADEON_OV0_STEP_BY 0x0484 +#define RADEON_OV0_TEST 0x04F8 +#define RADEON_OV0_V_INC 0x0424 +#define RADEON_OV0_VID_BUF_PITCH0_VALUE 0x0460 +#define RADEON_OV0_VID_BUF_PITCH1_VALUE 0x0464 +#define RADEON_OV0_VID_BUF0_BASE_ADRS 0x0440 +# define RADEON_VIF_BUF0_PITCH_SEL 0x00000001L +# define RADEON_VIF_BUF0_TILE_ADRS 0x00000002L +# define RADEON_VIF_BUF0_BASE_ADRS_MASK 0x03fffff0L +# define RADEON_VIF_BUF0_1ST_LINE_LSBS_MASK 0x48000000L +#define RADEON_OV0_VID_BUF1_BASE_ADRS 0x0444 +# define RADEON_VIF_BUF1_PITCH_SEL 0x00000001L +# define RADEON_VIF_BUF1_TILE_ADRS 0x00000002L +# define RADEON_VIF_BUF1_BASE_ADRS_MASK 0x03fffff0L +# define RADEON_VIF_BUF1_1ST_LINE_LSBS_MASK 0x48000000L +#define RADEON_OV0_VID_BUF2_BASE_ADRS 0x0448 +# define RADEON_VIF_BUF2_PITCH_SEL 0x00000001L +# define RADEON_VIF_BUF2_TILE_ADRS 0x00000002L +# define RADEON_VIF_BUF2_BASE_ADRS_MASK 0x03fffff0L +# define RADEON_VIF_BUF2_1ST_LINE_LSBS_MASK 0x48000000L +#define RADEON_OV0_VID_BUF3_BASE_ADRS 0x044C +#define RADEON_OV0_VID_BUF4_BASE_ADRS 0x0450 +#define RADEON_OV0_VID_BUF5_BASE_ADRS 0x0454 +#define RADEON_OV0_VIDEO_KEY_CLR_HIGH 0x04E8 +#define RADEON_OV0_VIDEO_KEY_CLR_LOW 0x04E4 +#define RADEON_OV0_Y_X_START 0x0400 +#define RADEON_OV0_Y_X_END 0x0404 +#define RADEON_OV1_Y_X_START 0x0600 +#define RADEON_OV1_Y_X_END 0x0604 +#define RADEON_OVR_CLR 0x0230 +#define RADEON_OVR_WID_LEFT_RIGHT 0x0234 +#define RADEON_OVR_WID_TOP_BOTTOM 0x0238 + +/* first capture unit */ + +#define RADEON_CAP0_BUF0_OFFSET 0x0920 +#define RADEON_CAP0_BUF1_OFFSET 0x0924 +#define RADEON_CAP0_BUF0_EVEN_OFFSET 0x0928 +#define RADEON_CAP0_BUF1_EVEN_OFFSET 0x092C + +#define RADEON_CAP0_BUF_PITCH 0x0930 +#define RADEON_CAP0_V_WINDOW 0x0934 +#define RADEON_CAP0_H_WINDOW 0x0938 +#define RADEON_CAP0_VBI0_OFFSET 0x093C +#define RADEON_CAP0_VBI1_OFFSET 0x0940 +#define RADEON_CAP0_VBI_V_WINDOW 0x0944 +#define RADEON_CAP0_VBI_H_WINDOW 0x0948 +#define RADEON_CAP0_PORT_MODE_CNTL 0x094C +#define RADEON_CAP0_TRIG_CNTL 0x0950 +#define RADEON_CAP0_DEBUG 0x0954 +#define RADEON_CAP0_CONFIG 0x0958 +# define RADEON_CAP0_CONFIG_CONTINUOS 0x00000001 +# define RADEON_CAP0_CONFIG_START_FIELD_EVEN 0x00000002 +# define RADEON_CAP0_CONFIG_START_BUF_GET 0x00000004 +# define RADEON_CAP0_CONFIG_START_BUF_SET 0x00000008 +# define RADEON_CAP0_CONFIG_BUF_TYPE_ALT 0x00000010 +# define RADEON_CAP0_CONFIG_BUF_TYPE_FRAME 0x00000020 +# define RADEON_CAP0_CONFIG_ONESHOT_MODE_FRAME 0x00000040 +# define RADEON_CAP0_CONFIG_BUF_MODE_DOUBLE 0x00000080 +# define RADEON_CAP0_CONFIG_BUF_MODE_TRIPLE 0x00000100 +# define RADEON_CAP0_CONFIG_MIRROR_EN 0x00000200 +# define RADEON_CAP0_CONFIG_ONESHOT_MIRROR_EN 0x00000400 +# define RADEON_CAP0_CONFIG_VIDEO_SIGNED_UV 0x00000800 +# define RADEON_CAP0_CONFIG_ANC_DECODE_EN 0x00001000 +# define RADEON_CAP0_CONFIG_VBI_EN 0x00002000 +# define RADEON_CAP0_CONFIG_SOFT_PULL_DOWN_EN 0x00004000 +# define RADEON_CAP0_CONFIG_VIP_EXTEND_FLAG_EN 0x00008000 +# define RADEON_CAP0_CONFIG_FAKE_FIELD_EN 0x00010000 +# define RADEON_CAP0_CONFIG_ODD_ONE_MORE_LINE 0x00020000 +# define RADEON_CAP0_CONFIG_EVEN_ONE_MORE_LINE 0x00040000 +# define RADEON_CAP0_CONFIG_HORZ_DIVIDE_2 0x00080000 +# define RADEON_CAP0_CONFIG_HORZ_DIVIDE_4 0x00100000 +# define RADEON_CAP0_CONFIG_VERT_DIVIDE_2 0x00200000 +# define RADEON_CAP0_CONFIG_VERT_DIVIDE_4 0x00400000 +# define RADEON_CAP0_CONFIG_FORMAT_BROOKTREE 0x00000000 +# define RADEON_CAP0_CONFIG_FORMAT_CCIR656 0x00800000 +# define RADEON_CAP0_CONFIG_FORMAT_ZV 0x01000000 +# define RADEON_CAP0_CONFIG_FORMAT_VIP 0x01800000 +# define RADEON_CAP0_CONFIG_FORMAT_TRANSPORT 0x02000000 +# define RADEON_CAP0_CONFIG_HORZ_DECIMATOR 0x04000000 +# define RADEON_CAP0_CONFIG_VIDEO_IN_YVYU422 0x00000000 +# define RADEON_CAP0_CONFIG_VIDEO_IN_VYUY422 0x20000000 +# define RADEON_CAP0_CONFIG_VBI_DIVIDE_2 0x40000000 +# define RADEON_CAP0_CONFIG_VBI_DIVIDE_4 0x80000000 +#define RADEON_CAP0_ANC_ODD_OFFSET 0x095C +#define RADEON_CAP0_ANC_EVEN_OFFSET 0x0960 +#define RADEON_CAP0_ANC_H_WINDOW 0x0964 +#define RADEON_CAP0_VIDEO_SYNC_TEST 0x0968 +#define RADEON_CAP0_ONESHOT_BUF_OFFSET 0x096C +#define RADEON_CAP0_BUF_STATUS 0x0970 +/* #define RADEON_CAP0_DWNSC_XRATIO 0x0978 */ +/* #define RADEON_CAP0_XSHARPNESS 0x097C */ +#define RADEON_CAP0_VBI2_OFFSET 0x0980 +#define RADEON_CAP0_VBI3_OFFSET 0x0984 +#define RADEON_CAP0_ANC2_OFFSET 0x0988 +#define RADEON_CAP0_ANC3_OFFSET 0x098C +#define RADEON_VID_BUFFER_CONTROL 0x0900 + +/* second capture unit */ + +#define RADEON_CAP1_BUF0_OFFSET 0x0990 +#define RADEON_CAP1_BUF1_OFFSET 0x0994 +#define RADEON_CAP1_BUF0_EVEN_OFFSET 0x0998 +#define RADEON_CAP1_BUF1_EVEN_OFFSET 0x099C + +#define RADEON_CAP1_BUF_PITCH 0x09A0 +#define RADEON_CAP1_V_WINDOW 0x09A4 +#define RADEON_CAP1_H_WINDOW 0x09A8 +#define RADEON_CAP1_VBI_ODD_OFFSET 0x09AC +#define RADEON_CAP1_VBI_EVEN_OFFSET 0x09B0 +#define RADEON_CAP1_VBI_V_WINDOW 0x09B4 +#define RADEON_CAP1_VBI_H_WINDOW 0x09B8 +#define RADEON_CAP1_PORT_MODE_CNTL 0x09BC +#define RADEON_CAP1_TRIG_CNTL 0x09C0 +#define RADEON_CAP1_DEBUG 0x09C4 +#define RADEON_CAP1_CONFIG 0x09C8 +#define RADEON_CAP1_ANC_ODD_OFFSET 0x09CC +#define RADEON_CAP1_ANC_EVEN_OFFSET 0x09D0 +#define RADEON_CAP1_ANC_H_WINDOW 0x09D4 +#define RADEON_CAP1_VIDEO_SYNC_TEST 0x09D8 +#define RADEON_CAP1_ONESHOT_BUF_OFFSET 0x09DC +#define RADEON_CAP1_BUF_STATUS 0x09E0 +#define RADEON_CAP1_DWNSC_XRATIO 0x09E8 +#define RADEON_CAP1_XSHARPNESS 0x09EC + +/* misc multimedia registers */ + +#define RADEON_IDCT_RUNS 0x1F80 +#define RADEON_IDCT_LEVELS 0x1F84 +#define RADEON_IDCT_CONTROL 0x1FBC +#define RADEON_IDCT_AUTH_CONTROL 0x1F88 +#define RADEON_IDCT_AUTH 0x1F8C + +#define RADEON_P2PLL_CNTL 0x002a /* P2PLL */ +# define RADEON_P2PLL_RESET (1 << 0) +# define RADEON_P2PLL_SLEEP (1 << 1) +# define RADEON_P2PLL_PVG_MASK (7 << 11) +# define RADEON_P2PLL_PVG_SHIFT 11 +# define RADEON_P2PLL_ATOMIC_UPDATE_EN (1 << 16) +# define RADEON_P2PLL_VGA_ATOMIC_UPDATE_EN (1 << 17) +# define RADEON_P2PLL_ATOMIC_UPDATE_VSYNC (1 << 18) +#define RADEON_P2PLL_DIV_0 0x002c +# define RADEON_P2PLL_FB0_DIV_MASK 0x07ff +# define RADEON_P2PLL_POST0_DIV_MASK 0x00070000 +#define RADEON_P2PLL_REF_DIV 0x002B /* PLL */ +# define RADEON_P2PLL_REF_DIV_MASK 0x03ff +# define RADEON_P2PLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */ +# define RADEON_P2PLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */ +# define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18) +# define R300_PPLL_REF_DIV_ACC_SHIFT 18 +#define RADEON_PALETTE_DATA 0x00b4 +#define RADEON_PALETTE_30_DATA 0x00b8 +#define RADEON_PALETTE_INDEX 0x00b0 +#define RADEON_PCI_GART_PAGE 0x017c +#define RADEON_PIXCLKS_CNTL 0x002d +# define RADEON_PIX2CLK_SRC_SEL_MASK 0x03 +# define RADEON_PIX2CLK_SRC_SEL_CPUCLK 0x00 +# define RADEON_PIX2CLK_SRC_SEL_PSCANCLK 0x01 +# define RADEON_PIX2CLK_SRC_SEL_BYTECLK 0x02 +# define RADEON_PIX2CLK_SRC_SEL_P2PLLCLK 0x03 +# define RADEON_PIX2CLK_ALWAYS_ONb (1<<6) +# define RADEON_PIX2CLK_DAC_ALWAYS_ONb (1<<7) +# define RADEON_PIXCLK_TV_SRC_SEL (1 << 8) +# define RADEON_DISP_TVOUT_PIXCLK_TV_ALWAYS_ONb (1 << 9) +# define R300_DVOCLK_ALWAYS_ONb (1 << 10) +# define RADEON_PIXCLK_BLEND_ALWAYS_ONb (1 << 11) +# define RADEON_PIXCLK_GV_ALWAYS_ONb (1 << 12) +# define RADEON_PIXCLK_DIG_TMDS_ALWAYS_ONb (1 << 13) +# define R300_PIXCLK_DVO_ALWAYS_ONb (1 << 13) +# define RADEON_PIXCLK_LVDS_ALWAYS_ONb (1 << 14) +# define RADEON_PIXCLK_TMDS_ALWAYS_ONb (1 << 15) +# define R300_PIXCLK_TRANS_ALWAYS_ONb (1 << 16) +# define R300_PIXCLK_TVO_ALWAYS_ONb (1 << 17) +# define R300_P2G2CLK_ALWAYS_ONb (1 << 18) +# define R300_P2G2CLK_DAC_ALWAYS_ONb (1 << 19) +# define R300_DISP_DAC_PIXCLK_DAC2_BLANK_OFF (1 << 23) +#define RADEON_PLANE_3D_MASK_C 0x1d44 +#define RADEON_PLL_TEST_CNTL 0x0013 /* PLL */ +# define RADEON_PLL_MASK_READ_B (1 << 9) +#define RADEON_PMI_CAP_ID 0x0f5c /* PCI */ +#define RADEON_PMI_DATA 0x0f63 /* PCI */ +#define RADEON_PMI_NXT_CAP_PTR 0x0f5d /* PCI */ +#define RADEON_PMI_PMC_REG 0x0f5e /* PCI */ +#define RADEON_PMI_PMCSR_REG 0x0f60 /* PCI */ +#define RADEON_PMI_REGISTER 0x0f5c /* PCI */ +#define RADEON_PPLL_CNTL 0x0002 /* PLL */ +# define RADEON_PPLL_RESET (1 << 0) +# define RADEON_PPLL_SLEEP (1 << 1) +# define RADEON_PPLL_PVG_MASK (7 << 11) +# define RADEON_PPLL_PVG_SHIFT 11 +# define RADEON_PPLL_ATOMIC_UPDATE_EN (1 << 16) +# define RADEON_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17) +# define RADEON_PPLL_ATOMIC_UPDATE_VSYNC (1 << 18) +#define RADEON_PPLL_DIV_0 0x0004 /* PLL */ +#define RADEON_PPLL_DIV_1 0x0005 /* PLL */ +#define RADEON_PPLL_DIV_2 0x0006 /* PLL */ +#define RADEON_PPLL_DIV_3 0x0007 /* PLL */ +# define RADEON_PPLL_FB3_DIV_MASK 0x07ff +# define RADEON_PPLL_POST3_DIV_MASK 0x00070000 +#define RADEON_PPLL_REF_DIV 0x0003 /* PLL */ +# define RADEON_PPLL_REF_DIV_MASK 0x03ff +# define RADEON_PPLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */ +# define RADEON_PPLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */ +#define RADEON_PWR_MNGMT_CNTL_STATUS 0x0f60 /* PCI */ + +#define RADEON_RBBM_GUICNTL 0x172c +# define RADEON_HOST_DATA_SWAP_NONE (0 << 0) +# define RADEON_HOST_DATA_SWAP_16BIT (1 << 0) +# define RADEON_HOST_DATA_SWAP_32BIT (2 << 0) +# define RADEON_HOST_DATA_SWAP_HDW (3 << 0) +#define RADEON_RBBM_SOFT_RESET 0x00f0 +# define RADEON_SOFT_RESET_CP (1 << 0) +# define RADEON_SOFT_RESET_HI (1 << 1) +# define RADEON_SOFT_RESET_SE (1 << 2) +# define RADEON_SOFT_RESET_RE (1 << 3) +# define RADEON_SOFT_RESET_PP (1 << 4) +# define RADEON_SOFT_RESET_E2 (1 << 5) +# define RADEON_SOFT_RESET_RB (1 << 6) +# define RADEON_SOFT_RESET_HDP (1 << 7) +#define RADEON_RBBM_STATUS 0x0e40 +# define RADEON_RBBM_FIFOCNT_MASK 0x007f +# define RADEON_RBBM_ACTIVE (1 << 31) +#define RADEON_RB2D_DSTCACHE_CTLSTAT 0x342c +# define RADEON_RB2D_DC_FLUSH (3 << 0) +# define RADEON_RB2D_DC_FREE (3 << 2) +# define RADEON_RB2D_DC_FLUSH_ALL 0xf +# define RADEON_RB2D_DC_BUSY (1 << 31) +#define RADEON_RB2D_DSTCACHE_MODE 0x3428 +#define RADEON_DSTCACHE_CTLSTAT 0x1714 + +#define RADEON_RB3D_ZCACHE_MODE 0x3250 +#define RADEON_RB3D_ZCACHE_CTLSTAT 0x3254 +# define RADEON_RB3D_ZC_FLUSH_ALL 0x5 +#define RADEON_RB3D_DSTCACHE_MODE 0x3258 +# define RADEON_RB3D_DC_CACHE_ENABLE (0) +# define RADEON_RB3D_DC_2D_CACHE_DISABLE (1) +# define RADEON_RB3D_DC_3D_CACHE_DISABLE (2) +# define RADEON_RB3D_DC_CACHE_DISABLE (3) +# define RADEON_RB3D_DC_2D_CACHE_LINESIZE_128 (1 << 2) +# define RADEON_RB3D_DC_3D_CACHE_LINESIZE_128 (2 << 2) +# define RADEON_RB3D_DC_2D_CACHE_AUTOFLUSH (1 << 8) +# define RADEON_RB3D_DC_3D_CACHE_AUTOFLUSH (2 << 8) +# define R200_RB3D_DC_2D_CACHE_AUTOFREE (1 << 10) +# define R200_RB3D_DC_3D_CACHE_AUTOFREE (2 << 10) +# define RADEON_RB3D_DC_FORCE_RMW (1 << 16) +# define RADEON_RB3D_DC_DISABLE_RI_FILL (1 << 24) +# define RADEON_RB3D_DC_DISABLE_RI_READ (1 << 25) + +#define RADEON_RB3D_DSTCACHE_CTLSTAT 0x325C +# define RADEON_RB3D_DC_FLUSH (3 << 0) +# define RADEON_RB3D_DC_FREE (3 << 2) +# define RADEON_RB3D_DC_FLUSH_ALL 0xf +# define RADEON_RB3D_DC_BUSY (1 << 31) + +#define RADEON_REG_BASE 0x0f18 /* PCI */ +#define RADEON_REGPROG_INF 0x0f09 /* PCI */ +#define RADEON_REVISION_ID 0x0f08 /* PCI */ + +#define RADEON_SC_BOTTOM 0x164c +#define RADEON_SC_BOTTOM_RIGHT 0x16f0 +#define RADEON_SC_BOTTOM_RIGHT_C 0x1c8c +#define RADEON_SC_LEFT 0x1640 +#define RADEON_SC_RIGHT 0x1644 +#define RADEON_SC_TOP 0x1648 +#define RADEON_SC_TOP_LEFT 0x16ec +#define RADEON_SC_TOP_LEFT_C 0x1c88 +# define RADEON_SC_SIGN_MASK_LO 0x8000 +# define RADEON_SC_SIGN_MASK_HI 0x80000000 +#define RADEON_SCLK_CNTL 0x000d /* PLL */ +# define RADEON_SCLK_SRC_SEL_MASK 0x0007 +# define RADEON_DYN_STOP_LAT_MASK 0x00007ff8 +# define RADEON_CP_MAX_DYN_STOP_LAT 0x0008 +# define RADEON_SCLK_FORCEON_MASK 0xffff8000 +# define RADEON_SCLK_FORCE_DISP2 (1<<15) +# define RADEON_SCLK_FORCE_CP (1<<16) +# define RADEON_SCLK_FORCE_HDP (1<<17) +# define RADEON_SCLK_FORCE_DISP1 (1<<18) +# define RADEON_SCLK_FORCE_TOP (1<<19) +# define RADEON_SCLK_FORCE_E2 (1<<20) +# define RADEON_SCLK_FORCE_SE (1<<21) +# define RADEON_SCLK_FORCE_IDCT (1<<22) +# define RADEON_SCLK_FORCE_VIP (1<<23) +# define RADEON_SCLK_FORCE_RE (1<<24) +# define RADEON_SCLK_FORCE_PB (1<<25) +# define RADEON_SCLK_FORCE_TAM (1<<26) +# define RADEON_SCLK_FORCE_TDM (1<<27) +# define RADEON_SCLK_FORCE_RB (1<<28) +# define RADEON_SCLK_FORCE_TV_SCLK (1<<29) +# define RADEON_SCLK_FORCE_SUBPIC (1<<30) +# define RADEON_SCLK_FORCE_OV0 (1<<31) +# define R300_SCLK_FORCE_VAP (1<<21) +# define R300_SCLK_FORCE_SR (1<<25) +# define R300_SCLK_FORCE_PX (1<<26) +# define R300_SCLK_FORCE_TX (1<<27) +# define R300_SCLK_FORCE_US (1<<28) +# define R300_SCLK_FORCE_SU (1<<30) +#define R300_SCLK_CNTL2 0x1e /* PLL */ +# define R300_SCLK_TCL_MAX_DYN_STOP_LAT (1<<10) +# define R300_SCLK_GA_MAX_DYN_STOP_LAT (1<<11) +# define R300_SCLK_CBA_MAX_DYN_STOP_LAT (1<<12) +# define R300_SCLK_FORCE_TCL (1<<13) +# define R300_SCLK_FORCE_CBA (1<<14) +# define R300_SCLK_FORCE_GA (1<<15) +#define RADEON_SCLK_MORE_CNTL 0x0035 /* PLL */ +# define RADEON_SCLK_MORE_MAX_DYN_STOP_LAT 0x0007 +# define RADEON_SCLK_MORE_FORCEON 0x0700 +#define RADEON_SDRAM_MODE_REG 0x0158 +#define RADEON_SEQ8_DATA 0x03c5 /* VGA */ +#define RADEON_SEQ8_IDX 0x03c4 /* VGA */ +#define RADEON_SNAPSHOT_F_COUNT 0x0244 +#define RADEON_SNAPSHOT_VH_COUNTS 0x0240 +#define RADEON_SNAPSHOT_VIF_COUNT 0x024c +#define RADEON_SRC_OFFSET 0x15ac +#define RADEON_SRC_PITCH 0x15b0 +#define RADEON_SRC_PITCH_OFFSET 0x1428 +#define RADEON_SRC_SC_BOTTOM 0x165c +#define RADEON_SRC_SC_BOTTOM_RIGHT 0x16f4 +#define RADEON_SRC_SC_RIGHT 0x1654 +#define RADEON_SRC_X 0x1414 +#define RADEON_SRC_X_Y 0x1590 +#define RADEON_SRC_Y 0x1418 +#define RADEON_SRC_Y_X 0x1434 +#define RADEON_STATUS 0x0f06 /* PCI */ +#define RADEON_SUBPIC_CNTL 0x0540 /* ? */ +#define RADEON_SUB_CLASS 0x0f0a /* PCI */ +#define RADEON_SURFACE_CNTL 0x0b00 +# define RADEON_SURF_TRANSLATION_DIS (1 << 8) +# define RADEON_NONSURF_AP0_SWP_16BPP (1 << 20) +# define RADEON_NONSURF_AP0_SWP_32BPP (1 << 21) +# define RADEON_NONSURF_AP1_SWP_16BPP (1 << 22) +# define RADEON_NONSURF_AP1_SWP_32BPP (1 << 23) +#define RADEON_SURFACE0_INFO 0x0b0c +# define RADEON_SURF_TILE_COLOR_MACRO (0 << 16) +# define RADEON_SURF_TILE_COLOR_BOTH (1 << 16) +# define RADEON_SURF_TILE_DEPTH_32BPP (2 << 16) +# define RADEON_SURF_TILE_DEPTH_16BPP (3 << 16) +# define R200_SURF_TILE_NONE (0 << 16) +# define R200_SURF_TILE_COLOR_MACRO (1 << 16) +# define R200_SURF_TILE_COLOR_MICRO (2 << 16) +# define R200_SURF_TILE_COLOR_BOTH (3 << 16) +# define R200_SURF_TILE_DEPTH_32BPP (4 << 16) +# define R200_SURF_TILE_DEPTH_16BPP (5 << 16) +# define R300_SURF_TILE_NONE (0 << 16) +# define R300_SURF_TILE_COLOR_MACRO (1 << 16) +# define R300_SURF_TILE_DEPTH_32BPP (2 << 16) +# define RADEON_SURF_AP0_SWP_16BPP (1 << 20) +# define RADEON_SURF_AP0_SWP_32BPP (1 << 21) +# define RADEON_SURF_AP1_SWP_16BPP (1 << 22) +# define RADEON_SURF_AP1_SWP_32BPP (1 << 23) +#define RADEON_SURFACE0_LOWER_BOUND 0x0b04 +#define RADEON_SURFACE0_UPPER_BOUND 0x0b08 +#define RADEON_SURFACE1_INFO 0x0b1c +#define RADEON_SURFACE1_LOWER_BOUND 0x0b14 +#define RADEON_SURFACE1_UPPER_BOUND 0x0b18 +#define RADEON_SURFACE2_INFO 0x0b2c +#define RADEON_SURFACE2_LOWER_BOUND 0x0b24 +#define RADEON_SURFACE2_UPPER_BOUND 0x0b28 +#define RADEON_SURFACE3_INFO 0x0b3c +#define RADEON_SURFACE3_LOWER_BOUND 0x0b34 +#define RADEON_SURFACE3_UPPER_BOUND 0x0b38 +#define RADEON_SURFACE4_INFO 0x0b4c +#define RADEON_SURFACE4_LOWER_BOUND 0x0b44 +#define RADEON_SURFACE4_UPPER_BOUND 0x0b48 +#define RADEON_SURFACE5_INFO 0x0b5c +#define RADEON_SURFACE5_LOWER_BOUND 0x0b54 +#define RADEON_SURFACE5_UPPER_BOUND 0x0b58 +#define RADEON_SURFACE6_INFO 0x0b6c +#define RADEON_SURFACE6_LOWER_BOUND 0x0b64 +#define RADEON_SURFACE6_UPPER_BOUND 0x0b68 +#define RADEON_SURFACE7_INFO 0x0b7c +#define RADEON_SURFACE7_LOWER_BOUND 0x0b74 +#define RADEON_SURFACE7_UPPER_BOUND 0x0b78 +#define RADEON_SW_SEMAPHORE 0x013c + +#define RADEON_TEST_DEBUG_CNTL 0x0120 +#define RADEON_TEST_DEBUG_CNTL__TEST_DEBUG_OUT_EN 0x00000001 + +#define RADEON_TEST_DEBUG_MUX 0x0124 +#define RADEON_TEST_DEBUG_OUT 0x012c +#define RADEON_TMDS_PLL_CNTL 0x02a8 +#define RADEON_TMDS_TRANSMITTER_CNTL 0x02a4 +# define RADEON_TMDS_TRANSMITTER_PLLEN 1 +# define RADEON_TMDS_TRANSMITTER_PLLRST 2 +#define RADEON_TRAIL_BRES_DEC 0x1614 +#define RADEON_TRAIL_BRES_ERR 0x160c +#define RADEON_TRAIL_BRES_INC 0x1610 +#define RADEON_TRAIL_X 0x1618 +#define RADEON_TRAIL_X_SUB 0x1620 + +#define RADEON_VCLK_ECP_CNTL 0x0008 /* PLL */ +# define RADEON_VCLK_SRC_SEL_MASK 0x03 +# define RADEON_VCLK_SRC_SEL_CPUCLK 0x00 +# define RADEON_VCLK_SRC_SEL_PSCANCLK 0x01 +# define RADEON_VCLK_SRC_SEL_BYTECLK 0x02 +# define RADEON_VCLK_SRC_SEL_PPLLCLK 0x03 +# define RADEON_PIXCLK_ALWAYS_ONb (1<<6) +# define RADEON_PIXCLK_DAC_ALWAYS_ONb (1<<7) +# define R300_DISP_DAC_PIXCLK_DAC_BLANK_OFF (1<<23) + +#define RADEON_VENDOR_ID 0x0f00 /* PCI */ +#define RADEON_VGA_DDA_CONFIG 0x02e8 +#define RADEON_VGA_DDA_ON_OFF 0x02ec +#define RADEON_VID_BUFFER_CONTROL 0x0900 +#define RADEON_VIDEOMUX_CNTL 0x0190 + + /* VIP bus */ +#define RADEON_VIPH_CH0_DATA 0x0c00 +#define RADEON_VIPH_CH1_DATA 0x0c04 +#define RADEON_VIPH_CH2_DATA 0x0c08 +#define RADEON_VIPH_CH3_DATA 0x0c0c +#define RADEON_VIPH_CH0_ADDR 0x0c10 +#define RADEON_VIPH_CH1_ADDR 0x0c14 +#define RADEON_VIPH_CH2_ADDR 0x0c18 +#define RADEON_VIPH_CH3_ADDR 0x0c1c +#define RADEON_VIPH_CH0_SBCNT 0x0c20 +#define RADEON_VIPH_CH1_SBCNT 0x0c24 +#define RADEON_VIPH_CH2_SBCNT 0x0c28 +#define RADEON_VIPH_CH3_SBCNT 0x0c2c +#define RADEON_VIPH_CH0_ABCNT 0x0c30 +#define RADEON_VIPH_CH1_ABCNT 0x0c34 +#define RADEON_VIPH_CH2_ABCNT 0x0c38 +#define RADEON_VIPH_CH3_ABCNT 0x0c3c +#define RADEON_VIPH_CONTROL 0x0c40 +# define RADEON_VIP_BUSY 0 +# define RADEON_VIP_IDLE 1 +# define RADEON_VIP_RESET 2 +# define RADEON_VIPH_EN (1 << 21) +#define RADEON_VIPH_DV_LAT 0x0c44 +#define RADEON_VIPH_BM_CHUNK 0x0c48 +#define RADEON_VIPH_DV_INT 0x0c4c +#define RADEON_VIPH_TIMEOUT_STAT 0x0c50 +#define RADEON_VIPH_TIMEOUT_STAT__VIPH_REG_STAT 0x00000010 +#define RADEON_VIPH_TIMEOUT_STAT__VIPH_REG_AK 0x00000010 +#define RADEON_VIPH_TIMEOUT_STAT__VIPH_REGR_DIS 0x01000000 + +#define RADEON_VIPH_REG_DATA 0x0084 +#define RADEON_VIPH_REG_ADDR 0x0080 + + +#define RADEON_WAIT_UNTIL 0x1720 +# define RADEON_WAIT_CRTC_PFLIP (1 << 0) +# define RADEON_WAIT_RE_CRTC_VLINE (1 << 1) +# define RADEON_WAIT_FE_CRTC_VLINE (1 << 2) +# define RADEON_WAIT_CRTC_VLINE (1 << 3) +# define RADEON_WAIT_DMA_VID_IDLE (1 << 8) +# define RADEON_WAIT_DMA_GUI_IDLE (1 << 9) +# define RADEON_WAIT_CMDFIFO (1 << 10) /* wait for CMDFIFO_ENTRIES */ +# define RADEON_WAIT_OV0_FLIP (1 << 11) +# define RADEON_WAIT_AGP_FLUSH (1 << 13) +# define RADEON_WAIT_2D_IDLE (1 << 14) +# define RADEON_WAIT_3D_IDLE (1 << 15) +# define RADEON_WAIT_2D_IDLECLEAN (1 << 16) +# define RADEON_WAIT_3D_IDLECLEAN (1 << 17) +# define RADEON_WAIT_HOST_IDLECLEAN (1 << 18) +# define RADEON_CMDFIFO_ENTRIES_SHIFT 10 +# define RADEON_CMDFIFO_ENTRIES_MASK 0x7f +# define RADEON_WAIT_VAP_IDLE (1 << 28) +# define RADEON_WAIT_BOTH_CRTC_PFLIP (1 << 30) +# define RADEON_ENG_DISPLAY_SELECT_CRTC0 (0 << 31) +# define RADEON_ENG_DISPLAY_SELECT_CRTC1 (1 << 31) + +#define RADEON_X_MPLL_REF_FB_DIV 0x000a /* PLL */ +#define RADEON_XCLK_CNTL 0x000d /* PLL */ +#define RADEON_XDLL_CNTL 0x000c /* PLL */ +#define RADEON_XPLL_CNTL 0x000b /* PLL */ + + + + /* Registers for 3D/TCL */ +#define RADEON_PP_BORDER_COLOR_0 0x1d40 +#define RADEON_PP_BORDER_COLOR_1 0x1d44 +#define RADEON_PP_BORDER_COLOR_2 0x1d48 +#define RADEON_PP_CNTL 0x1c38 +# define RADEON_STIPPLE_ENABLE (1 << 0) +# define RADEON_SCISSOR_ENABLE (1 << 1) +# define RADEON_PATTERN_ENABLE (1 << 2) +# define RADEON_SHADOW_ENABLE (1 << 3) +# define RADEON_TEX_ENABLE_MASK (0xf << 4) +# define RADEON_TEX_0_ENABLE (1 << 4) +# define RADEON_TEX_1_ENABLE (1 << 5) +# define RADEON_TEX_2_ENABLE (1 << 6) +# define RADEON_TEX_3_ENABLE (1 << 7) +# define RADEON_TEX_BLEND_ENABLE_MASK (0xf << 12) +# define RADEON_TEX_BLEND_0_ENABLE (1 << 12) +# define RADEON_TEX_BLEND_1_ENABLE (1 << 13) +# define RADEON_TEX_BLEND_2_ENABLE (1 << 14) +# define RADEON_TEX_BLEND_3_ENABLE (1 << 15) +# define RADEON_PLANAR_YUV_ENABLE (1 << 20) +# define RADEON_SPECULAR_ENABLE (1 << 21) +# define RADEON_FOG_ENABLE (1 << 22) +# define RADEON_ALPHA_TEST_ENABLE (1 << 23) +# define RADEON_ANTI_ALIAS_NONE (0 << 24) +# define RADEON_ANTI_ALIAS_LINE (1 << 24) +# define RADEON_ANTI_ALIAS_POLY (2 << 24) +# define RADEON_ANTI_ALIAS_LINE_POLY (3 << 24) +# define RADEON_BUMP_MAP_ENABLE (1 << 26) +# define RADEON_BUMPED_MAP_T0 (0 << 27) +# define RADEON_BUMPED_MAP_T1 (1 << 27) +# define RADEON_BUMPED_MAP_T2 (2 << 27) +# define RADEON_TEX_3D_ENABLE_0 (1 << 29) +# define RADEON_TEX_3D_ENABLE_1 (1 << 30) +# define RADEON_MC_ENABLE (1 << 31) +#define RADEON_PP_FOG_COLOR 0x1c18 +# define RADEON_FOG_COLOR_MASK 0x00ffffff +# define RADEON_FOG_VERTEX (0 << 24) +# define RADEON_FOG_TABLE (1 << 24) +# define RADEON_FOG_USE_DEPTH (0 << 25) +# define RADEON_FOG_USE_DIFFUSE_ALPHA (2 << 25) +# define RADEON_FOG_USE_SPEC_ALPHA (3 << 25) +#define RADEON_PP_LUM_MATRIX 0x1d00 +#define RADEON_PP_MISC 0x1c14 +# define RADEON_REF_ALPHA_MASK 0x000000ff +# define RADEON_ALPHA_TEST_FAIL (0 << 8) +# define RADEON_ALPHA_TEST_LESS (1 << 8) +# define RADEON_ALPHA_TEST_LEQUAL (2 << 8) +# define RADEON_ALPHA_TEST_EQUAL (3 << 8) +# define RADEON_ALPHA_TEST_GEQUAL (4 << 8) +# define RADEON_ALPHA_TEST_GREATER (5 << 8) +# define RADEON_ALPHA_TEST_NEQUAL (6 << 8) +# define RADEON_ALPHA_TEST_PASS (7 << 8) +# define RADEON_ALPHA_TEST_OP_MASK (7 << 8) +# define RADEON_CHROMA_FUNC_FAIL (0 << 16) +# define RADEON_CHROMA_FUNC_PASS (1 << 16) +# define RADEON_CHROMA_FUNC_NEQUAL (2 << 16) +# define RADEON_CHROMA_FUNC_EQUAL (3 << 16) +# define RADEON_CHROMA_KEY_NEAREST (0 << 18) +# define RADEON_CHROMA_KEY_ZERO (1 << 18) +# define RADEON_SHADOW_ID_AUTO_INC (1 << 20) +# define RADEON_SHADOW_FUNC_EQUAL (0 << 21) +# define RADEON_SHADOW_FUNC_NEQUAL (1 << 21) +# define RADEON_SHADOW_PASS_1 (0 << 22) +# define RADEON_SHADOW_PASS_2 (1 << 22) +# define RADEON_RIGHT_HAND_CUBE_D3D (0 << 24) +# define RADEON_RIGHT_HAND_CUBE_OGL (1 << 24) +#define RADEON_PP_ROT_MATRIX_0 0x1d58 +#define RADEON_PP_ROT_MATRIX_1 0x1d5c +#define RADEON_PP_TXFILTER_0 0x1c54 +#define RADEON_PP_TXFILTER_1 0x1c6c +#define RADEON_PP_TXFILTER_2 0x1c84 +# define RADEON_MAG_FILTER_NEAREST (0 << 0) +# define RADEON_MAG_FILTER_LINEAR (1 << 0) +# define RADEON_MAG_FILTER_MASK (1 << 0) +# define RADEON_MIN_FILTER_NEAREST (0 << 1) +# define RADEON_MIN_FILTER_LINEAR (1 << 1) +# define RADEON_MIN_FILTER_NEAREST_MIP_NEAREST (2 << 1) +# define RADEON_MIN_FILTER_NEAREST_MIP_LINEAR (3 << 1) +# define RADEON_MIN_FILTER_LINEAR_MIP_NEAREST (6 << 1) +# define RADEON_MIN_FILTER_LINEAR_MIP_LINEAR (7 << 1) +# define RADEON_MIN_FILTER_ANISO_NEAREST (8 << 1) +# define RADEON_MIN_FILTER_ANISO_LINEAR (9 << 1) +# define RADEON_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (10 << 1) +# define RADEON_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR (11 << 1) +# define RADEON_MIN_FILTER_MASK (15 << 1) +# define RADEON_MAX_ANISO_1_TO_1 (0 << 5) +# define RADEON_MAX_ANISO_2_TO_1 (1 << 5) +# define RADEON_MAX_ANISO_4_TO_1 (2 << 5) +# define RADEON_MAX_ANISO_8_TO_1 (3 << 5) +# define RADEON_MAX_ANISO_16_TO_1 (4 << 5) +# define RADEON_MAX_ANISO_MASK (7 << 5) +# define RADEON_LOD_BIAS_MASK (0xff << 8) +# define RADEON_LOD_BIAS_SHIFT 8 +# define RADEON_MAX_MIP_LEVEL_MASK (0x0f << 16) +# define RADEON_MAX_MIP_LEVEL_SHIFT 16 +# define RADEON_YUV_TO_RGB (1 << 20) +# define RADEON_YUV_TEMPERATURE_COOL (0 << 21) +# define RADEON_YUV_TEMPERATURE_HOT (1 << 21) +# define RADEON_YUV_TEMPERATURE_MASK (1 << 21) +# define RADEON_WRAPEN_S (1 << 22) +# define RADEON_CLAMP_S_WRAP (0 << 23) +# define RADEON_CLAMP_S_MIRROR (1 << 23) +# define RADEON_CLAMP_S_CLAMP_LAST (2 << 23) +# define RADEON_CLAMP_S_MIRROR_CLAMP_LAST (3 << 23) +# define RADEON_CLAMP_S_CLAMP_BORDER (4 << 23) +# define RADEON_CLAMP_S_MIRROR_CLAMP_BORDER (5 << 23) +# define RADEON_CLAMP_S_CLAMP_GL (6 << 23) +# define RADEON_CLAMP_S_MIRROR_CLAMP_GL (7 << 23) +# define RADEON_CLAMP_S_MASK (7 << 23) +# define RADEON_WRAPEN_T (1 << 26) +# define RADEON_CLAMP_T_WRAP (0 << 27) +# define RADEON_CLAMP_T_MIRROR (1 << 27) +# define RADEON_CLAMP_T_CLAMP_LAST (2 << 27) +# define RADEON_CLAMP_T_MIRROR_CLAMP_LAST (3 << 27) +# define RADEON_CLAMP_T_CLAMP_BORDER (4 << 27) +# define RADEON_CLAMP_T_MIRROR_CLAMP_BORDER (5 << 27) +# define RADEON_CLAMP_T_CLAMP_GL (6 << 27) +# define RADEON_CLAMP_T_MIRROR_CLAMP_GL (7 << 27) +# define RADEON_CLAMP_T_MASK (7 << 27) +# define RADEON_BORDER_MODE_OGL (0 << 31) +# define RADEON_BORDER_MODE_D3D (1 << 31) +#define RADEON_PP_TXFORMAT_0 0x1c58 +#define RADEON_PP_TXFORMAT_1 0x1c70 +#define RADEON_PP_TXFORMAT_2 0x1c88 +# define RADEON_TXFORMAT_I8 (0 << 0) +# define RADEON_TXFORMAT_AI88 (1 << 0) +# define RADEON_TXFORMAT_RGB332 (2 << 0) +# define RADEON_TXFORMAT_ARGB1555 (3 << 0) +# define RADEON_TXFORMAT_RGB565 (4 << 0) +# define RADEON_TXFORMAT_ARGB4444 (5 << 0) +# define RADEON_TXFORMAT_ARGB8888 (6 << 0) +# define RADEON_TXFORMAT_RGBA8888 (7 << 0) +# define RADEON_TXFORMAT_Y8 (8 << 0) +# define RADEON_TXFORMAT_VYUY422 (10 << 0) +# define RADEON_TXFORMAT_YVYU422 (11 << 0) +# define RADEON_TXFORMAT_DXT1 (12 << 0) +# define RADEON_TXFORMAT_DXT23 (14 << 0) +# define RADEON_TXFORMAT_DXT45 (15 << 0) +# define RADEON_TXFORMAT_FORMAT_MASK (31 << 0) +# define RADEON_TXFORMAT_FORMAT_SHIFT 0 +# define RADEON_TXFORMAT_APPLE_YUV_MODE (1 << 5) +# define RADEON_TXFORMAT_ALPHA_IN_MAP (1 << 6) +# define RADEON_TXFORMAT_NON_POWER2 (1 << 7) +# define RADEON_TXFORMAT_WIDTH_MASK (15 << 8) +# define RADEON_TXFORMAT_WIDTH_SHIFT 8 +# define RADEON_TXFORMAT_HEIGHT_MASK (15 << 12) +# define RADEON_TXFORMAT_HEIGHT_SHIFT 12 +# define RADEON_TXFORMAT_F5_WIDTH_MASK (15 << 16) +# define RADEON_TXFORMAT_F5_WIDTH_SHIFT 16 +# define RADEON_TXFORMAT_F5_HEIGHT_MASK (15 << 20) +# define RADEON_TXFORMAT_F5_HEIGHT_SHIFT 20 +# define RADEON_TXFORMAT_ST_ROUTE_STQ0 (0 << 24) +# define RADEON_TXFORMAT_ST_ROUTE_MASK (3 << 24) +# define RADEON_TXFORMAT_ST_ROUTE_STQ1 (1 << 24) +# define RADEON_TXFORMAT_ST_ROUTE_STQ2 (2 << 24) +# define RADEON_TXFORMAT_ENDIAN_NO_SWAP (0 << 26) +# define RADEON_TXFORMAT_ENDIAN_16BPP_SWAP (1 << 26) +# define RADEON_TXFORMAT_ENDIAN_32BPP_SWAP (2 << 26) +# define RADEON_TXFORMAT_ENDIAN_HALFDW_SWAP (3 << 26) +# define RADEON_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28) +# define RADEON_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29) +# define RADEON_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) +# define RADEON_TXFORMAT_PERSPECTIVE_ENABLE (1 << 31) +#define RADEON_PP_CUBIC_FACES_0 0x1d24 +#define RADEON_PP_CUBIC_FACES_1 0x1d28 +#define RADEON_PP_CUBIC_FACES_2 0x1d2c +# define RADEON_FACE_WIDTH_1_SHIFT 0 +# define RADEON_FACE_HEIGHT_1_SHIFT 4 +# define RADEON_FACE_WIDTH_1_MASK (0xf << 0) +# define RADEON_FACE_HEIGHT_1_MASK (0xf << 4) +# define RADEON_FACE_WIDTH_2_SHIFT 8 +# define RADEON_FACE_HEIGHT_2_SHIFT 12 +# define RADEON_FACE_WIDTH_2_MASK (0xf << 8) +# define RADEON_FACE_HEIGHT_2_MASK (0xf << 12) +# define RADEON_FACE_WIDTH_3_SHIFT 16 +# define RADEON_FACE_HEIGHT_3_SHIFT 20 +# define RADEON_FACE_WIDTH_3_MASK (0xf << 16) +# define RADEON_FACE_HEIGHT_3_MASK (0xf << 20) +# define RADEON_FACE_WIDTH_4_SHIFT 24 +# define RADEON_FACE_HEIGHT_4_SHIFT 28 +# define RADEON_FACE_WIDTH_4_MASK (0xf << 24) +# define RADEON_FACE_HEIGHT_4_MASK (0xf << 28) + +#define RADEON_PP_TXOFFSET_0 0x1c5c +#define RADEON_PP_TXOFFSET_1 0x1c74 +#define RADEON_PP_TXOFFSET_2 0x1c8c +# define RADEON_TXO_ENDIAN_NO_SWAP (0 << 0) +# define RADEON_TXO_ENDIAN_BYTE_SWAP (1 << 0) +# define RADEON_TXO_ENDIAN_WORD_SWAP (2 << 0) +# define RADEON_TXO_ENDIAN_HALFDW_SWAP (3 << 0) +# define RADEON_TXO_MACRO_LINEAR (0 << 2) +# define RADEON_TXO_MACRO_TILE (1 << 2) +# define RADEON_TXO_MICRO_LINEAR (0 << 3) +# define RADEON_TXO_MICRO_TILE_X2 (1 << 3) +# define RADEON_TXO_MICRO_TILE_OPT (2 << 3) +# define RADEON_TXO_OFFSET_MASK 0xffffffe0 +# define RADEON_TXO_OFFSET_SHIFT 5 + +#define RADEON_PP_CUBIC_OFFSET_T0_0 0x1dd0 /* bits [31:5] */ +#define RADEON_PP_CUBIC_OFFSET_T0_1 0x1dd4 +#define RADEON_PP_CUBIC_OFFSET_T0_2 0x1dd8 +#define RADEON_PP_CUBIC_OFFSET_T0_3 0x1ddc +#define RADEON_PP_CUBIC_OFFSET_T0_4 0x1de0 +#define RADEON_PP_CUBIC_OFFSET_T1_0 0x1e00 +#define RADEON_PP_CUBIC_OFFSET_T1_1 0x1e04 +#define RADEON_PP_CUBIC_OFFSET_T1_2 0x1e08 +#define RADEON_PP_CUBIC_OFFSET_T1_3 0x1e0c +#define RADEON_PP_CUBIC_OFFSET_T1_4 0x1e10 +#define RADEON_PP_CUBIC_OFFSET_T2_0 0x1e14 +#define RADEON_PP_CUBIC_OFFSET_T2_1 0x1e18 +#define RADEON_PP_CUBIC_OFFSET_T2_2 0x1e1c +#define RADEON_PP_CUBIC_OFFSET_T2_3 0x1e20 +#define RADEON_PP_CUBIC_OFFSET_T2_4 0x1e24 + +#define RADEON_PP_TEX_SIZE_0 0x1d04 /* NPOT */ +#define RADEON_PP_TEX_SIZE_1 0x1d0c +#define RADEON_PP_TEX_SIZE_2 0x1d14 +# define RADEON_TEX_USIZE_MASK (0x7ff << 0) +# define RADEON_TEX_USIZE_SHIFT 0 +# define RADEON_TEX_VSIZE_MASK (0x7ff << 16) +# define RADEON_TEX_VSIZE_SHIFT 16 +# define RADEON_SIGNED_RGB_MASK (1 << 30) +# define RADEON_SIGNED_RGB_SHIFT 30 +# define RADEON_SIGNED_ALPHA_MASK (1 << 31) +# define RADEON_SIGNED_ALPHA_SHIFT 31 +#define RADEON_PP_TEX_PITCH_0 0x1d08 /* NPOT */ +#define RADEON_PP_TEX_PITCH_1 0x1d10 /* NPOT */ +#define RADEON_PP_TEX_PITCH_2 0x1d18 /* NPOT */ +/* note: bits 13-5: 32 byte aligned stride of texture map */ + +#define RADEON_PP_TXCBLEND_0 0x1c60 +#define RADEON_PP_TXCBLEND_1 0x1c78 +#define RADEON_PP_TXCBLEND_2 0x1c90 +# define RADEON_COLOR_ARG_A_SHIFT 0 +# define RADEON_COLOR_ARG_A_MASK (0x1f << 0) +# define RADEON_COLOR_ARG_A_ZERO (0 << 0) +# define RADEON_COLOR_ARG_A_CURRENT_COLOR (2 << 0) +# define RADEON_COLOR_ARG_A_CURRENT_ALPHA (3 << 0) +# define RADEON_COLOR_ARG_A_DIFFUSE_COLOR (4 << 0) +# define RADEON_COLOR_ARG_A_DIFFUSE_ALPHA (5 << 0) +# define RADEON_COLOR_ARG_A_SPECULAR_COLOR (6 << 0) +# define RADEON_COLOR_ARG_A_SPECULAR_ALPHA (7 << 0) +# define RADEON_COLOR_ARG_A_TFACTOR_COLOR (8 << 0) +# define RADEON_COLOR_ARG_A_TFACTOR_ALPHA (9 << 0) +# define RADEON_COLOR_ARG_A_T0_COLOR (10 << 0) +# define RADEON_COLOR_ARG_A_T0_ALPHA (11 << 0) +# define RADEON_COLOR_ARG_A_T1_COLOR (12 << 0) +# define RADEON_COLOR_ARG_A_T1_ALPHA (13 << 0) +# define RADEON_COLOR_ARG_A_T2_COLOR (14 << 0) +# define RADEON_COLOR_ARG_A_T2_ALPHA (15 << 0) +# define RADEON_COLOR_ARG_A_T3_COLOR (16 << 0) +# define RADEON_COLOR_ARG_A_T3_ALPHA (17 << 0) +# define RADEON_COLOR_ARG_B_SHIFT 5 +# define RADEON_COLOR_ARG_B_MASK (0x1f << 5) +# define RADEON_COLOR_ARG_B_ZERO (0 << 5) +# define RADEON_COLOR_ARG_B_CURRENT_COLOR (2 << 5) +# define RADEON_COLOR_ARG_B_CURRENT_ALPHA (3 << 5) +# define RADEON_COLOR_ARG_B_DIFFUSE_COLOR (4 << 5) +# define RADEON_COLOR_ARG_B_DIFFUSE_ALPHA (5 << 5) +# define RADEON_COLOR_ARG_B_SPECULAR_COLOR (6 << 5) +# define RADEON_COLOR_ARG_B_SPECULAR_ALPHA (7 << 5) +# define RADEON_COLOR_ARG_B_TFACTOR_COLOR (8 << 5) +# define RADEON_COLOR_ARG_B_TFACTOR_ALPHA (9 << 5) +# define RADEON_COLOR_ARG_B_T0_COLOR (10 << 5) +# define RADEON_COLOR_ARG_B_T0_ALPHA (11 << 5) +# define RADEON_COLOR_ARG_B_T1_COLOR (12 << 5) +# define RADEON_COLOR_ARG_B_T1_ALPHA (13 << 5) +# define RADEON_COLOR_ARG_B_T2_COLOR (14 << 5) +# define RADEON_COLOR_ARG_B_T2_ALPHA (15 << 5) +# define RADEON_COLOR_ARG_B_T3_COLOR (16 << 5) +# define RADEON_COLOR_ARG_B_T3_ALPHA (17 << 5) +# define RADEON_COLOR_ARG_C_SHIFT 10 +# define RADEON_COLOR_ARG_C_MASK (0x1f << 10) +# define RADEON_COLOR_ARG_C_ZERO (0 << 10) +# define RADEON_COLOR_ARG_C_CURRENT_COLOR (2 << 10) +# define RADEON_COLOR_ARG_C_CURRENT_ALPHA (3 << 10) +# define RADEON_COLOR_ARG_C_DIFFUSE_COLOR (4 << 10) +# define RADEON_COLOR_ARG_C_DIFFUSE_ALPHA (5 << 10) +# define RADEON_COLOR_ARG_C_SPECULAR_COLOR (6 << 10) +# define RADEON_COLOR_ARG_C_SPECULAR_ALPHA (7 << 10) +# define RADEON_COLOR_ARG_C_TFACTOR_COLOR (8 << 10) +# define RADEON_COLOR_ARG_C_TFACTOR_ALPHA (9 << 10) +# define RADEON_COLOR_ARG_C_T0_COLOR (10 << 10) +# define RADEON_COLOR_ARG_C_T0_ALPHA (11 << 10) +# define RADEON_COLOR_ARG_C_T1_COLOR (12 << 10) +# define RADEON_COLOR_ARG_C_T1_ALPHA (13 << 10) +# define RADEON_COLOR_ARG_C_T2_COLOR (14 << 10) +# define RADEON_COLOR_ARG_C_T2_ALPHA (15 << 10) +# define RADEON_COLOR_ARG_C_T3_COLOR (16 << 10) +# define RADEON_COLOR_ARG_C_T3_ALPHA (17 << 10) +# define RADEON_COMP_ARG_A (1 << 15) +# define RADEON_COMP_ARG_A_SHIFT 15 +# define RADEON_COMP_ARG_B (1 << 16) +# define RADEON_COMP_ARG_B_SHIFT 16 +# define RADEON_COMP_ARG_C (1 << 17) +# define RADEON_COMP_ARG_C_SHIFT 17 +# define RADEON_BLEND_CTL_MASK (7 << 18) +# define RADEON_BLEND_CTL_ADD (0 << 18) +# define RADEON_BLEND_CTL_SUBTRACT (1 << 18) +# define RADEON_BLEND_CTL_ADDSIGNED (2 << 18) +# define RADEON_BLEND_CTL_BLEND (3 << 18) +# define RADEON_BLEND_CTL_DOT3 (4 << 18) +# define RADEON_SCALE_SHIFT 21 +# define RADEON_SCALE_MASK (3 << 21) +# define RADEON_SCALE_1X (0 << 21) +# define RADEON_SCALE_2X (1 << 21) +# define RADEON_SCALE_4X (2 << 21) +# define RADEON_CLAMP_TX (1 << 23) +# define RADEON_T0_EQ_TCUR (1 << 24) +# define RADEON_T1_EQ_TCUR (1 << 25) +# define RADEON_T2_EQ_TCUR (1 << 26) +# define RADEON_T3_EQ_TCUR (1 << 27) +# define RADEON_COLOR_ARG_MASK 0x1f +# define RADEON_COMP_ARG_SHIFT 15 +#define RADEON_PP_TXABLEND_0 0x1c64 +#define RADEON_PP_TXABLEND_1 0x1c7c +#define RADEON_PP_TXABLEND_2 0x1c94 +# define RADEON_ALPHA_ARG_A_SHIFT 0 +# define RADEON_ALPHA_ARG_A_MASK (0xf << 0) +# define RADEON_ALPHA_ARG_A_ZERO (0 << 0) +# define RADEON_ALPHA_ARG_A_CURRENT_ALPHA (1 << 0) +# define RADEON_ALPHA_ARG_A_DIFFUSE_ALPHA (2 << 0) +# define RADEON_ALPHA_ARG_A_SPECULAR_ALPHA (3 << 0) +# define RADEON_ALPHA_ARG_A_TFACTOR_ALPHA (4 << 0) +# define RADEON_ALPHA_ARG_A_T0_ALPHA (5 << 0) +# define RADEON_ALPHA_ARG_A_T1_ALPHA (6 << 0) +# define RADEON_ALPHA_ARG_A_T2_ALPHA (7 << 0) +# define RADEON_ALPHA_ARG_A_T3_ALPHA (8 << 0) +# define RADEON_ALPHA_ARG_B_SHIFT 4 +# define RADEON_ALPHA_ARG_B_MASK (0xf << 4) +# define RADEON_ALPHA_ARG_B_ZERO (0 << 4) +# define RADEON_ALPHA_ARG_B_CURRENT_ALPHA (1 << 4) +# define RADEON_ALPHA_ARG_B_DIFFUSE_ALPHA (2 << 4) +# define RADEON_ALPHA_ARG_B_SPECULAR_ALPHA (3 << 4) +# define RADEON_ALPHA_ARG_B_TFACTOR_ALPHA (4 << 4) +# define RADEON_ALPHA_ARG_B_T0_ALPHA (5 << 4) +# define RADEON_ALPHA_ARG_B_T1_ALPHA (6 << 4) +# define RADEON_ALPHA_ARG_B_T2_ALPHA (7 << 4) +# define RADEON_ALPHA_ARG_B_T3_ALPHA (8 << 4) +# define RADEON_ALPHA_ARG_C_SHIFT 8 +# define RADEON_ALPHA_ARG_C_MASK (0xf << 8) +# define RADEON_ALPHA_ARG_C_ZERO (0 << 8) +# define RADEON_ALPHA_ARG_C_CURRENT_ALPHA (1 << 8) +# define RADEON_ALPHA_ARG_C_DIFFUSE_ALPHA (2 << 8) +# define RADEON_ALPHA_ARG_C_SPECULAR_ALPHA (3 << 8) +# define RADEON_ALPHA_ARG_C_TFACTOR_ALPHA (4 << 8) +# define RADEON_ALPHA_ARG_C_T0_ALPHA (5 << 8) +# define RADEON_ALPHA_ARG_C_T1_ALPHA (6 << 8) +# define RADEON_ALPHA_ARG_C_T2_ALPHA (7 << 8) +# define RADEON_ALPHA_ARG_C_T3_ALPHA (8 << 8) +# define RADEON_DOT_ALPHA_DONT_REPLICATE (1 << 9) +# define RADEON_ALPHA_ARG_MASK 0xf + +#define RADEON_PP_TFACTOR_0 0x1c68 +#define RADEON_PP_TFACTOR_1 0x1c80 +#define RADEON_PP_TFACTOR_2 0x1c98 + +#define RADEON_RB3D_BLENDCNTL 0x1c20 +# define RADEON_COMB_FCN_MASK (3 << 12) +# define RADEON_COMB_FCN_ADD_CLAMP (0 << 12) +# define RADEON_COMB_FCN_ADD_NOCLAMP (1 << 12) +# define RADEON_COMB_FCN_SUB_CLAMP (2 << 12) +# define RADEON_COMB_FCN_SUB_NOCLAMP (3 << 12) +# define RADEON_SRC_BLEND_GL_ZERO (32 << 16) +# define RADEON_SRC_BLEND_GL_ONE (33 << 16) +# define RADEON_SRC_BLEND_GL_SRC_COLOR (34 << 16) +# define RADEON_SRC_BLEND_GL_ONE_MINUS_SRC_COLOR (35 << 16) +# define RADEON_SRC_BLEND_GL_DST_COLOR (36 << 16) +# define RADEON_SRC_BLEND_GL_ONE_MINUS_DST_COLOR (37 << 16) +# define RADEON_SRC_BLEND_GL_SRC_ALPHA (38 << 16) +# define RADEON_SRC_BLEND_GL_ONE_MINUS_SRC_ALPHA (39 << 16) +# define RADEON_SRC_BLEND_GL_DST_ALPHA (40 << 16) +# define RADEON_SRC_BLEND_GL_ONE_MINUS_DST_ALPHA (41 << 16) +# define RADEON_SRC_BLEND_GL_SRC_ALPHA_SATURATE (42 << 16) +# define RADEON_SRC_BLEND_MASK (63 << 16) +# define RADEON_DST_BLEND_GL_ZERO (32 << 24) +# define RADEON_DST_BLEND_GL_ONE (33 << 24) +# define RADEON_DST_BLEND_GL_SRC_COLOR (34 << 24) +# define RADEON_DST_BLEND_GL_ONE_MINUS_SRC_COLOR (35 << 24) +# define RADEON_DST_BLEND_GL_DST_COLOR (36 << 24) +# define RADEON_DST_BLEND_GL_ONE_MINUS_DST_COLOR (37 << 24) +# define RADEON_DST_BLEND_GL_SRC_ALPHA (38 << 24) +# define RADEON_DST_BLEND_GL_ONE_MINUS_SRC_ALPHA (39 << 24) +# define RADEON_DST_BLEND_GL_DST_ALPHA (40 << 24) +# define RADEON_DST_BLEND_GL_ONE_MINUS_DST_ALPHA (41 << 24) +# define RADEON_DST_BLEND_MASK (63 << 24) +#define RADEON_RB3D_CNTL 0x1c3c +# define RADEON_ALPHA_BLEND_ENABLE (1 << 0) +# define RADEON_PLANE_MASK_ENABLE (1 << 1) +# define RADEON_DITHER_ENABLE (1 << 2) +# define RADEON_ROUND_ENABLE (1 << 3) +# define RADEON_SCALE_DITHER_ENABLE (1 << 4) +# define RADEON_DITHER_INIT (1 << 5) +# define RADEON_ROP_ENABLE (1 << 6) +# define RADEON_STENCIL_ENABLE (1 << 7) +# define RADEON_Z_ENABLE (1 << 8) +# define RADEON_DEPTH_XZ_OFFEST_ENABLE (1 << 9) +# define RADEON_COLOR_FORMAT_ARGB1555 (3 << 10) +# define RADEON_COLOR_FORMAT_RGB565 (4 << 10) +# define RADEON_COLOR_FORMAT_ARGB8888 (6 << 10) +# define RADEON_COLOR_FORMAT_RGB332 (7 << 10) +# define RADEON_COLOR_FORMAT_Y8 (8 << 10) +# define RADEON_COLOR_FORMAT_RGB8 (9 << 10) +# define RADEON_COLOR_FORMAT_YUV422_VYUY (11 << 10) +# define RADEON_COLOR_FORMAT_YUV422_YVYU (12 << 10) +# define RADEON_COLOR_FORMAT_aYUV444 (14 << 10) +# define RADEON_COLOR_FORMAT_ARGB4444 (15 << 10) +# define RADEON_CLRCMP_FLIP_ENABLE (1 << 14) +#define RADEON_RB3D_COLOROFFSET 0x1c40 +# define RADEON_COLOROFFSET_MASK 0xfffffff0 +#define RADEON_RB3D_COLORPITCH 0x1c48 +# define RADEON_COLORPITCH_MASK 0x000001ff8 +# define RADEON_COLOR_TILE_ENABLE (1 << 16) +# define RADEON_COLOR_MICROTILE_ENABLE (1 << 17) +# define RADEON_COLOR_ENDIAN_NO_SWAP (0 << 18) +# define RADEON_COLOR_ENDIAN_WORD_SWAP (1 << 18) +# define RADEON_COLOR_ENDIAN_DWORD_SWAP (2 << 18) +#define RADEON_RB3D_DEPTHOFFSET 0x1c24 +#define RADEON_RB3D_DEPTHPITCH 0x1c28 +# define RADEON_DEPTHPITCH_MASK 0x00001ff8 +# define RADEON_DEPTH_ENDIAN_NO_SWAP (0 << 18) +# define RADEON_DEPTH_ENDIAN_WORD_SWAP (1 << 18) +# define RADEON_DEPTH_ENDIAN_DWORD_SWAP (2 << 18) +#define RADEON_RB3D_PLANEMASK 0x1d84 +#define RADEON_RB3D_ROPCNTL 0x1d80 +# define RADEON_ROP_MASK (15 << 8) +# define RADEON_ROP_CLEAR (0 << 8) +# define RADEON_ROP_NOR (1 << 8) +# define RADEON_ROP_AND_INVERTED (2 << 8) +# define RADEON_ROP_COPY_INVERTED (3 << 8) +# define RADEON_ROP_AND_REVERSE (4 << 8) +# define RADEON_ROP_INVERT (5 << 8) +# define RADEON_ROP_XOR (6 << 8) +# define RADEON_ROP_NAND (7 << 8) +# define RADEON_ROP_AND (8 << 8) +# define RADEON_ROP_EQUIV (9 << 8) +# define RADEON_ROP_NOOP (10 << 8) +# define RADEON_ROP_OR_INVERTED (11 << 8) +# define RADEON_ROP_COPY (12 << 8) +# define RADEON_ROP_OR_REVERSE (13 << 8) +# define RADEON_ROP_OR (14 << 8) +# define RADEON_ROP_SET (15 << 8) +#define RADEON_RB3D_STENCILREFMASK 0x1d7c +# define RADEON_STENCIL_REF_SHIFT 0 +# define RADEON_STENCIL_REF_MASK (0xff << 0) +# define RADEON_STENCIL_MASK_SHIFT 16 +# define RADEON_STENCIL_VALUE_MASK (0xff << 16) +# define RADEON_STENCIL_WRITEMASK_SHIFT 24 +# define RADEON_STENCIL_WRITE_MASK (0xff << 24) +#define RADEON_RB3D_ZSTENCILCNTL 0x1c2c +# define RADEON_DEPTH_FORMAT_MASK (0xf << 0) +# define RADEON_DEPTH_FORMAT_16BIT_INT_Z (0 << 0) +# define RADEON_DEPTH_FORMAT_24BIT_INT_Z (2 << 0) +# define RADEON_DEPTH_FORMAT_24BIT_FLOAT_Z (3 << 0) +# define RADEON_DEPTH_FORMAT_32BIT_INT_Z (4 << 0) +# define RADEON_DEPTH_FORMAT_32BIT_FLOAT_Z (5 << 0) +# define RADEON_DEPTH_FORMAT_16BIT_FLOAT_W (7 << 0) +# define RADEON_DEPTH_FORMAT_24BIT_FLOAT_W (9 << 0) +# define RADEON_DEPTH_FORMAT_32BIT_FLOAT_W (11 << 0) +# define RADEON_Z_TEST_NEVER (0 << 4) +# define RADEON_Z_TEST_LESS (1 << 4) +# define RADEON_Z_TEST_LEQUAL (2 << 4) +# define RADEON_Z_TEST_EQUAL (3 << 4) +# define RADEON_Z_TEST_GEQUAL (4 << 4) +# define RADEON_Z_TEST_GREATER (5 << 4) +# define RADEON_Z_TEST_NEQUAL (6 << 4) +# define RADEON_Z_TEST_ALWAYS (7 << 4) +# define RADEON_Z_TEST_MASK (7 << 4) +# define RADEON_STENCIL_TEST_NEVER (0 << 12) +# define RADEON_STENCIL_TEST_LESS (1 << 12) +# define RADEON_STENCIL_TEST_LEQUAL (2 << 12) +# define RADEON_STENCIL_TEST_EQUAL (3 << 12) +# define RADEON_STENCIL_TEST_GEQUAL (4 << 12) +# define RADEON_STENCIL_TEST_GREATER (5 << 12) +# define RADEON_STENCIL_TEST_NEQUAL (6 << 12) +# define RADEON_STENCIL_TEST_ALWAYS (7 << 12) +# define RADEON_STENCIL_TEST_MASK (0x7 << 12) +# define RADEON_STENCIL_FAIL_KEEP (0 << 16) +# define RADEON_STENCIL_FAIL_ZERO (1 << 16) +# define RADEON_STENCIL_FAIL_REPLACE (2 << 16) +# define RADEON_STENCIL_FAIL_INC (3 << 16) +# define RADEON_STENCIL_FAIL_DEC (4 << 16) +# define RADEON_STENCIL_FAIL_INVERT (5 << 16) +# define RADEON_STENCIL_FAIL_MASK (0x7 << 16) +# define RADEON_STENCIL_ZPASS_KEEP (0 << 20) +# define RADEON_STENCIL_ZPASS_ZERO (1 << 20) +# define RADEON_STENCIL_ZPASS_REPLACE (2 << 20) +# define RADEON_STENCIL_ZPASS_INC (3 << 20) +# define RADEON_STENCIL_ZPASS_DEC (4 << 20) +# define RADEON_STENCIL_ZPASS_INVERT (5 << 20) +# define RADEON_STENCIL_ZPASS_MASK (0x7 << 20) +# define RADEON_STENCIL_ZFAIL_KEEP (0 << 24) +# define RADEON_STENCIL_ZFAIL_ZERO (1 << 24) +# define RADEON_STENCIL_ZFAIL_REPLACE (2 << 24) +# define RADEON_STENCIL_ZFAIL_INC (3 << 24) +# define RADEON_STENCIL_ZFAIL_DEC (4 << 24) +# define RADEON_STENCIL_ZFAIL_INVERT (5 << 24) +# define RADEON_STENCIL_ZFAIL_MASK (0x7 << 24) +# define RADEON_Z_COMPRESSION_ENABLE (1 << 28) +# define RADEON_FORCE_Z_DIRTY (1 << 29) +# define RADEON_Z_WRITE_ENABLE (1 << 30) +#define RADEON_RE_LINE_PATTERN 0x1cd0 +# define RADEON_LINE_PATTERN_MASK 0x0000ffff +# define RADEON_LINE_REPEAT_COUNT_SHIFT 16 +# define RADEON_LINE_PATTERN_START_SHIFT 24 +# define RADEON_LINE_PATTERN_LITTLE_BIT_ORDER (0 << 28) +# define RADEON_LINE_PATTERN_BIG_BIT_ORDER (1 << 28) +# define RADEON_LINE_PATTERN_AUTO_RESET (1 << 29) +#define RADEON_RE_LINE_STATE 0x1cd4 +# define RADEON_LINE_CURRENT_PTR_SHIFT 0 +# define RADEON_LINE_CURRENT_COUNT_SHIFT 8 +#define RADEON_RE_MISC 0x26c4 +# define RADEON_STIPPLE_COORD_MASK 0x1f +# define RADEON_STIPPLE_X_OFFSET_SHIFT 0 +# define RADEON_STIPPLE_X_OFFSET_MASK (0x1f << 0) +# define RADEON_STIPPLE_Y_OFFSET_SHIFT 8 +# define RADEON_STIPPLE_Y_OFFSET_MASK (0x1f << 8) +# define RADEON_STIPPLE_LITTLE_BIT_ORDER (0 << 16) +# define RADEON_STIPPLE_BIG_BIT_ORDER (1 << 16) +#define RADEON_RE_SOLID_COLOR 0x1c1c +#define RADEON_RE_TOP_LEFT 0x26c0 +# define RADEON_RE_LEFT_SHIFT 0 +# define RADEON_RE_TOP_SHIFT 16 +#define RADEON_RE_WIDTH_HEIGHT 0x1c44 +# define RADEON_RE_WIDTH_SHIFT 0 +# define RADEON_RE_HEIGHT_SHIFT 16 + +#define RADEON_SE_CNTL 0x1c4c +# define RADEON_FFACE_CULL_CW (0 << 0) +# define RADEON_FFACE_CULL_CCW (1 << 0) +# define RADEON_FFACE_CULL_DIR_MASK (1 << 0) +# define RADEON_BFACE_CULL (0 << 1) +# define RADEON_BFACE_SOLID (3 << 1) +# define RADEON_FFACE_CULL (0 << 3) +# define RADEON_FFACE_SOLID (3 << 3) +# define RADEON_FFACE_CULL_MASK (3 << 3) +# define RADEON_BADVTX_CULL_DISABLE (1 << 5) +# define RADEON_FLAT_SHADE_VTX_0 (0 << 6) +# define RADEON_FLAT_SHADE_VTX_1 (1 << 6) +# define RADEON_FLAT_SHADE_VTX_2 (2 << 6) +# define RADEON_FLAT_SHADE_VTX_LAST (3 << 6) +# define RADEON_DIFFUSE_SHADE_SOLID (0 << 8) +# define RADEON_DIFFUSE_SHADE_FLAT (1 << 8) +# define RADEON_DIFFUSE_SHADE_GOURAUD (2 << 8) +# define RADEON_DIFFUSE_SHADE_MASK (3 << 8) +# define RADEON_ALPHA_SHADE_SOLID (0 << 10) +# define RADEON_ALPHA_SHADE_FLAT (1 << 10) +# define RADEON_ALPHA_SHADE_GOURAUD (2 << 10) +# define RADEON_ALPHA_SHADE_MASK (3 << 10) +# define RADEON_SPECULAR_SHADE_SOLID (0 << 12) +# define RADEON_SPECULAR_SHADE_FLAT (1 << 12) +# define RADEON_SPECULAR_SHADE_GOURAUD (2 << 12) +# define RADEON_SPECULAR_SHADE_MASK (3 << 12) +# define RADEON_FOG_SHADE_SOLID (0 << 14) +# define RADEON_FOG_SHADE_FLAT (1 << 14) +# define RADEON_FOG_SHADE_GOURAUD (2 << 14) +# define RADEON_FOG_SHADE_MASK (3 << 14) +# define RADEON_ZBIAS_ENABLE_POINT (1 << 16) +# define RADEON_ZBIAS_ENABLE_LINE (1 << 17) +# define RADEON_ZBIAS_ENABLE_TRI (1 << 18) +# define RADEON_WIDELINE_ENABLE (1 << 20) +# define RADEON_VPORT_XY_XFORM_ENABLE (1 << 24) +# define RADEON_VPORT_Z_XFORM_ENABLE (1 << 25) +# define RADEON_VTX_PIX_CENTER_D3D (0 << 27) +# define RADEON_VTX_PIX_CENTER_OGL (1 << 27) +# define RADEON_ROUND_MODE_TRUNC (0 << 28) +# define RADEON_ROUND_MODE_ROUND (1 << 28) +# define RADEON_ROUND_MODE_ROUND_EVEN (2 << 28) +# define RADEON_ROUND_MODE_ROUND_ODD (3 << 28) +# define RADEON_ROUND_PREC_16TH_PIX (0 << 30) +# define RADEON_ROUND_PREC_8TH_PIX (1 << 30) +# define RADEON_ROUND_PREC_4TH_PIX (2 << 30) +# define RADEON_ROUND_PREC_HALF_PIX (3 << 30) +#define R200_RE_CNTL 0x1c50 +# define R200_STIPPLE_ENABLE 0x1 +# define R200_SCISSOR_ENABLE 0x2 +# define R200_PATTERN_ENABLE 0x4 +# define R200_PERSPECTIVE_ENABLE 0x8 +# define R200_POINT_SMOOTH 0x20 +# define R200_VTX_STQ0_D3D 0x00010000 +# define R200_VTX_STQ1_D3D 0x00040000 +# define R200_VTX_STQ2_D3D 0x00100000 +# define R200_VTX_STQ3_D3D 0x00400000 +# define R200_VTX_STQ4_D3D 0x01000000 +# define R200_VTX_STQ5_D3D 0x04000000 +#define RADEON_SE_CNTL_STATUS 0x2140 +# define RADEON_VC_NO_SWAP (0 << 0) +# define RADEON_VC_16BIT_SWAP (1 << 0) +# define RADEON_VC_32BIT_SWAP (2 << 0) +# define RADEON_VC_HALF_DWORD_SWAP (3 << 0) +# define RADEON_TCL_BYPASS (1 << 8) +#define RADEON_SE_COORD_FMT 0x1c50 +# define RADEON_VTX_XY_PRE_MULT_1_OVER_W0 (1 << 0) +# define RADEON_VTX_Z_PRE_MULT_1_OVER_W0 (1 << 1) +# define RADEON_VTX_ST0_NONPARAMETRIC (1 << 8) +# define RADEON_VTX_ST1_NONPARAMETRIC (1 << 9) +# define RADEON_VTX_ST2_NONPARAMETRIC (1 << 10) +# define RADEON_VTX_ST3_NONPARAMETRIC (1 << 11) +# define RADEON_VTX_W0_NORMALIZE (1 << 12) +# define RADEON_VTX_W0_IS_NOT_1_OVER_W0 (1 << 16) +# define RADEON_VTX_ST0_PRE_MULT_1_OVER_W0 (1 << 17) +# define RADEON_VTX_ST1_PRE_MULT_1_OVER_W0 (1 << 19) +# define RADEON_VTX_ST2_PRE_MULT_1_OVER_W0 (1 << 21) +# define RADEON_VTX_ST3_PRE_MULT_1_OVER_W0 (1 << 23) +# define RADEON_TEX1_W_ROUTING_USE_W0 (0 << 26) +# define RADEON_TEX1_W_ROUTING_USE_Q1 (1 << 26) +#define RADEON_SE_LINE_WIDTH 0x1db8 +#define RADEON_SE_TCL_LIGHT_MODEL_CTL 0x226c +# define RADEON_LIGHTING_ENABLE (1 << 0) +# define RADEON_LIGHT_IN_MODELSPACE (1 << 1) +# define RADEON_LOCAL_VIEWER (1 << 2) +# define RADEON_NORMALIZE_NORMALS (1 << 3) +# define RADEON_RESCALE_NORMALS (1 << 4) +# define RADEON_SPECULAR_LIGHTS (1 << 5) +# define RADEON_DIFFUSE_SPECULAR_COMBINE (1 << 6) +# define RADEON_LIGHT_ALPHA (1 << 7) +# define RADEON_LOCAL_LIGHT_VEC_GL (1 << 8) +# define RADEON_LIGHT_NO_NORMAL_AMBIENT_ONLY (1 << 9) +# define RADEON_LM_SOURCE_STATE_PREMULT 0 +# define RADEON_LM_SOURCE_STATE_MULT 1 +# define RADEON_LM_SOURCE_VERTEX_DIFFUSE 2 +# define RADEON_LM_SOURCE_VERTEX_SPECULAR 3 +# define RADEON_EMISSIVE_SOURCE_SHIFT 16 +# define RADEON_AMBIENT_SOURCE_SHIFT 18 +# define RADEON_DIFFUSE_SOURCE_SHIFT 20 +# define RADEON_SPECULAR_SOURCE_SHIFT 22 +#define RADEON_SE_TCL_MATERIAL_AMBIENT_RED 0x2220 +#define RADEON_SE_TCL_MATERIAL_AMBIENT_GREEN 0x2224 +#define RADEON_SE_TCL_MATERIAL_AMBIENT_BLUE 0x2228 +#define RADEON_SE_TCL_MATERIAL_AMBIENT_ALPHA 0x222c +#define RADEON_SE_TCL_MATERIAL_DIFFUSE_RED 0x2230 +#define RADEON_SE_TCL_MATERIAL_DIFFUSE_GREEN 0x2234 +#define RADEON_SE_TCL_MATERIAL_DIFFUSE_BLUE 0x2238 +#define RADEON_SE_TCL_MATERIAL_DIFFUSE_ALPHA 0x223c +#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED 0x2210 +#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_GREEN 0x2214 +#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_BLUE 0x2218 +#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_ALPHA 0x221c +#define RADEON_SE_TCL_MATERIAL_SPECULAR_RED 0x2240 +#define RADEON_SE_TCL_MATERIAL_SPECULAR_GREEN 0x2244 +#define RADEON_SE_TCL_MATERIAL_SPECULAR_BLUE 0x2248 +#define RADEON_SE_TCL_MATERIAL_SPECULAR_ALPHA 0x224c +#define RADEON_SE_TCL_MATRIX_SELECT_0 0x225c +# define RADEON_MODELVIEW_0_SHIFT 0 +# define RADEON_MODELVIEW_1_SHIFT 4 +# define RADEON_MODELVIEW_2_SHIFT 8 +# define RADEON_MODELVIEW_3_SHIFT 12 +# define RADEON_IT_MODELVIEW_0_SHIFT 16 +# define RADEON_IT_MODELVIEW_1_SHIFT 20 +# define RADEON_IT_MODELVIEW_2_SHIFT 24 +# define RADEON_IT_MODELVIEW_3_SHIFT 28 +#define RADEON_SE_TCL_MATRIX_SELECT_1 0x2260 +# define RADEON_MODELPROJECT_0_SHIFT 0 +# define RADEON_MODELPROJECT_1_SHIFT 4 +# define RADEON_MODELPROJECT_2_SHIFT 8 +# define RADEON_MODELPROJECT_3_SHIFT 12 +# define RADEON_TEXMAT_0_SHIFT 16 +# define RADEON_TEXMAT_1_SHIFT 20 +# define RADEON_TEXMAT_2_SHIFT 24 +# define RADEON_TEXMAT_3_SHIFT 28 + + +#define RADEON_SE_TCL_OUTPUT_VTX_FMT 0x2254 +# define RADEON_TCL_VTX_W0 (1 << 0) +# define RADEON_TCL_VTX_FP_DIFFUSE (1 << 1) +# define RADEON_TCL_VTX_FP_ALPHA (1 << 2) +# define RADEON_TCL_VTX_PK_DIFFUSE (1 << 3) +# define RADEON_TCL_VTX_FP_SPEC (1 << 4) +# define RADEON_TCL_VTX_FP_FOG (1 << 5) +# define RADEON_TCL_VTX_PK_SPEC (1 << 6) +# define RADEON_TCL_VTX_ST0 (1 << 7) +# define RADEON_TCL_VTX_ST1 (1 << 8) +# define RADEON_TCL_VTX_Q1 (1 << 9) +# define RADEON_TCL_VTX_ST2 (1 << 10) +# define RADEON_TCL_VTX_Q2 (1 << 11) +# define RADEON_TCL_VTX_ST3 (1 << 12) +# define RADEON_TCL_VTX_Q3 (1 << 13) +# define RADEON_TCL_VTX_Q0 (1 << 14) +# define RADEON_TCL_VTX_WEIGHT_COUNT_SHIFT 15 +# define RADEON_TCL_VTX_NORM0 (1 << 18) +# define RADEON_TCL_VTX_XY1 (1 << 27) +# define RADEON_TCL_VTX_Z1 (1 << 28) +# define RADEON_TCL_VTX_W1 (1 << 29) +# define RADEON_TCL_VTX_NORM1 (1 << 30) +# define RADEON_TCL_VTX_Z0 (1 << 31) + +#define RADEON_SE_TCL_OUTPUT_VTX_SEL 0x2258 +# define RADEON_TCL_COMPUTE_XYZW (1 << 0) +# define RADEON_TCL_COMPUTE_DIFFUSE (1 << 1) +# define RADEON_TCL_COMPUTE_SPECULAR (1 << 2) +# define RADEON_TCL_FORCE_NAN_IF_COLOR_NAN (1 << 3) +# define RADEON_TCL_FORCE_INORDER_PROC (1 << 4) +# define RADEON_TCL_TEX_INPUT_TEX_0 0 +# define RADEON_TCL_TEX_INPUT_TEX_1 1 +# define RADEON_TCL_TEX_INPUT_TEX_2 2 +# define RADEON_TCL_TEX_INPUT_TEX_3 3 +# define RADEON_TCL_TEX_COMPUTED_TEX_0 8 +# define RADEON_TCL_TEX_COMPUTED_TEX_1 9 +# define RADEON_TCL_TEX_COMPUTED_TEX_2 10 +# define RADEON_TCL_TEX_COMPUTED_TEX_3 11 +# define RADEON_TCL_TEX_0_OUTPUT_SHIFT 16 +# define RADEON_TCL_TEX_1_OUTPUT_SHIFT 20 +# define RADEON_TCL_TEX_2_OUTPUT_SHIFT 24 +# define RADEON_TCL_TEX_3_OUTPUT_SHIFT 28 + +#define RADEON_SE_TCL_PER_LIGHT_CTL_0 0x2270 +# define RADEON_LIGHT_0_ENABLE (1 << 0) +# define RADEON_LIGHT_0_ENABLE_AMBIENT (1 << 1) +# define RADEON_LIGHT_0_ENABLE_SPECULAR (1 << 2) +# define RADEON_LIGHT_0_IS_LOCAL (1 << 3) +# define RADEON_LIGHT_0_IS_SPOT (1 << 4) +# define RADEON_LIGHT_0_DUAL_CONE (1 << 5) +# define RADEON_LIGHT_0_ENABLE_RANGE_ATTEN (1 << 6) +# define RADEON_LIGHT_0_CONSTANT_RANGE_ATTEN (1 << 7) +# define RADEON_LIGHT_0_SHIFT 0 +# define RADEON_LIGHT_1_ENABLE (1 << 16) +# define RADEON_LIGHT_1_ENABLE_AMBIENT (1 << 17) +# define RADEON_LIGHT_1_ENABLE_SPECULAR (1 << 18) +# define RADEON_LIGHT_1_IS_LOCAL (1 << 19) +# define RADEON_LIGHT_1_IS_SPOT (1 << 20) +# define RADEON_LIGHT_1_DUAL_CONE (1 << 21) +# define RADEON_LIGHT_1_ENABLE_RANGE_ATTEN (1 << 22) +# define RADEON_LIGHT_1_CONSTANT_RANGE_ATTEN (1 << 23) +# define RADEON_LIGHT_1_SHIFT 16 +#define RADEON_SE_TCL_PER_LIGHT_CTL_1 0x2274 +# define RADEON_LIGHT_2_SHIFT 0 +# define RADEON_LIGHT_3_SHIFT 16 +#define RADEON_SE_TCL_PER_LIGHT_CTL_2 0x2278 +# define RADEON_LIGHT_4_SHIFT 0 +# define RADEON_LIGHT_5_SHIFT 16 +#define RADEON_SE_TCL_PER_LIGHT_CTL_3 0x227c +# define RADEON_LIGHT_6_SHIFT 0 +# define RADEON_LIGHT_7_SHIFT 16 + +#define RADEON_SE_TCL_SHININESS 0x2250 + +#define RADEON_SE_TCL_TEXTURE_PROC_CTL 0x2268 +# define RADEON_TEXGEN_TEXMAT_0_ENABLE (1 << 0) +# define RADEON_TEXGEN_TEXMAT_1_ENABLE (1 << 1) +# define RADEON_TEXGEN_TEXMAT_2_ENABLE (1 << 2) +# define RADEON_TEXGEN_TEXMAT_3_ENABLE (1 << 3) +# define RADEON_TEXMAT_0_ENABLE (1 << 4) +# define RADEON_TEXMAT_1_ENABLE (1 << 5) +# define RADEON_TEXMAT_2_ENABLE (1 << 6) +# define RADEON_TEXMAT_3_ENABLE (1 << 7) +# define RADEON_TEXGEN_INPUT_MASK 0xf +# define RADEON_TEXGEN_INPUT_TEXCOORD_0 0 +# define RADEON_TEXGEN_INPUT_TEXCOORD_1 1 +# define RADEON_TEXGEN_INPUT_TEXCOORD_2 2 +# define RADEON_TEXGEN_INPUT_TEXCOORD_3 3 +# define RADEON_TEXGEN_INPUT_OBJ 4 +# define RADEON_TEXGEN_INPUT_EYE 5 +# define RADEON_TEXGEN_INPUT_EYE_NORMAL 6 +# define RADEON_TEXGEN_INPUT_EYE_REFLECT 7 +# define RADEON_TEXGEN_INPUT_EYE_NORMALIZED 8 +# define RADEON_TEXGEN_0_INPUT_SHIFT 16 +# define RADEON_TEXGEN_1_INPUT_SHIFT 20 +# define RADEON_TEXGEN_2_INPUT_SHIFT 24 +# define RADEON_TEXGEN_3_INPUT_SHIFT 28 + +#define RADEON_SE_TCL_UCP_VERT_BLEND_CTL 0x2264 +# define RADEON_UCP_IN_CLIP_SPACE (1 << 0) +# define RADEON_UCP_IN_MODEL_SPACE (1 << 1) +# define RADEON_UCP_ENABLE_0 (1 << 2) +# define RADEON_UCP_ENABLE_1 (1 << 3) +# define RADEON_UCP_ENABLE_2 (1 << 4) +# define RADEON_UCP_ENABLE_3 (1 << 5) +# define RADEON_UCP_ENABLE_4 (1 << 6) +# define RADEON_UCP_ENABLE_5 (1 << 7) +# define RADEON_TCL_FOG_MASK (3 << 8) +# define RADEON_TCL_FOG_DISABLE (0 << 8) +# define RADEON_TCL_FOG_EXP (1 << 8) +# define RADEON_TCL_FOG_EXP2 (2 << 8) +# define RADEON_TCL_FOG_LINEAR (3 << 8) +# define RADEON_RNG_BASED_FOG (1 << 10) +# define RADEON_LIGHT_TWOSIDE (1 << 11) +# define RADEON_BLEND_OP_COUNT_MASK (7 << 12) +# define RADEON_BLEND_OP_COUNT_SHIFT 12 +# define RADEON_POSITION_BLEND_OP_ENABLE (1 << 16) +# define RADEON_NORMAL_BLEND_OP_ENABLE (1 << 17) +# define RADEON_VERTEX_BLEND_SRC_0_PRIMARY (1 << 18) +# define RADEON_VERTEX_BLEND_SRC_0_SECONDARY (1 << 18) +# define RADEON_VERTEX_BLEND_SRC_1_PRIMARY (1 << 19) +# define RADEON_VERTEX_BLEND_SRC_1_SECONDARY (1 << 19) +# define RADEON_VERTEX_BLEND_SRC_2_PRIMARY (1 << 20) +# define RADEON_VERTEX_BLEND_SRC_2_SECONDARY (1 << 20) +# define RADEON_VERTEX_BLEND_SRC_3_PRIMARY (1 << 21) +# define RADEON_VERTEX_BLEND_SRC_3_SECONDARY (1 << 21) +# define RADEON_VERTEX_BLEND_WGT_MINUS_ONE (1 << 22) +# define RADEON_CULL_FRONT_IS_CW (0 << 28) +# define RADEON_CULL_FRONT_IS_CCW (1 << 28) +# define RADEON_CULL_FRONT (1 << 29) +# define RADEON_CULL_BACK (1 << 30) +# define RADEON_FORCE_W_TO_ONE (1 << 31) + +#define RADEON_SE_VPORT_XSCALE 0x1d98 +#define RADEON_SE_VPORT_XOFFSET 0x1d9c +#define RADEON_SE_VPORT_YSCALE 0x1da0 +#define RADEON_SE_VPORT_YOFFSET 0x1da4 +#define RADEON_SE_VPORT_ZSCALE 0x1da8 +#define RADEON_SE_VPORT_ZOFFSET 0x1dac +#define RADEON_SE_ZBIAS_FACTOR 0x1db0 +#define RADEON_SE_ZBIAS_CONSTANT 0x1db4 + +#define RADEON_SE_VTX_FMT 0x2080 +# define RADEON_SE_VTX_FMT_XY 0x00000000 +# define RADEON_SE_VTX_FMT_W0 0x00000001 +# define RADEON_SE_VTX_FMT_FPCOLOR 0x00000002 +# define RADEON_SE_VTX_FMT_FPALPHA 0x00000004 +# define RADEON_SE_VTX_FMT_PKCOLOR 0x00000008 +# define RADEON_SE_VTX_FMT_FPSPEC 0x00000010 +# define RADEON_SE_VTX_FMT_FPFOG 0x00000020 +# define RADEON_SE_VTX_FMT_PKSPEC 0x00000040 +# define RADEON_SE_VTX_FMT_ST0 0x00000080 +# define RADEON_SE_VTX_FMT_ST1 0x00000100 +# define RADEON_SE_VTX_FMT_Q1 0x00000200 +# define RADEON_SE_VTX_FMT_ST2 0x00000400 +# define RADEON_SE_VTX_FMT_Q2 0x00000800 +# define RADEON_SE_VTX_FMT_ST3 0x00001000 +# define RADEON_SE_VTX_FMT_Q3 0x00002000 +# define RADEON_SE_VTX_FMT_Q0 0x00004000 +# define RADEON_SE_VTX_FMT_BLND_WEIGHT_CNT_MASK 0x00038000 +# define RADEON_SE_VTX_FMT_N0 0x00040000 +# define RADEON_SE_VTX_FMT_XY1 0x08000000 +# define RADEON_SE_VTX_FMT_Z1 0x10000000 +# define RADEON_SE_VTX_FMT_W1 0x20000000 +# define RADEON_SE_VTX_FMT_N1 0x40000000 +# define RADEON_SE_VTX_FMT_Z 0x80000000 + +#define RADEON_SE_VF_CNTL 0x2084 +# define RADEON_VF_PRIM_TYPE_POINT_LIST 1 +# define RADEON_VF_PRIM_TYPE_LINE_LIST 2 +# define RADEON_VF_PRIM_TYPE_LINE_STRIP 3 +# define RADEON_VF_PRIM_TYPE_TRIANGLE_LIST 4 +# define RADEON_VF_PRIM_TYPE_TRIANGLE_FAN 5 +# define RADEON_VF_PRIM_TYPE_TRIANGLE_STRIP 6 +# define RADEON_VF_PRIM_TYPE_TRIANGLE_FLAG 7 +# define RADEON_VF_PRIM_TYPE_RECTANGLE_LIST 8 +# define RADEON_VF_PRIM_TYPE_POINT_LIST_3 9 +# define RADEON_VF_PRIM_TYPE_LINE_LIST_3 10 +# define RADEON_VF_PRIM_TYPE_SPIRIT_LIST 11 +# define RADEON_VF_PRIM_TYPE_LINE_LOOP 12 +# define RADEON_VF_PRIM_TYPE_QUAD_LIST 13 +# define RADEON_VF_PRIM_TYPE_QUAD_STRIP 14 +# define RADEON_VF_PRIM_TYPE_POLYGON 15 +# define RADEON_VF_PRIM_WALK_STATE (0<<4) +# define RADEON_VF_PRIM_WALK_INDEX (1<<4) +# define RADEON_VF_PRIM_WALK_LIST (2<<4) +# define RADEON_VF_PRIM_WALK_DATA (3<<4) +# define RADEON_VF_COLOR_ORDER_RGBA (1<<6) +# define RADEON_VF_RADEON_MODE (1<<8) +# define RADEON_VF_TCL_OUTPUT_CTL_ENA (1<<9) +# define RADEON_VF_PROG_STREAM_ENA (1<<10) +# define RADEON_VF_INDEX_SIZE_SHIFT 11 +# define RADEON_VF_NUM_VERTICES_SHIFT 16 + +#define RADEON_SE_PORT_DATA0 0x2000 + +#define R200_SE_VAP_CNTL 0x2080 +# define R200_VAP_TCL_ENABLE 0x00000001 +# define R200_VAP_SINGLE_BUF_STATE_ENABLE 0x00000010 +# define R200_VAP_FORCE_W_TO_ONE 0x00010000 +# define R200_VAP_D3D_TEX_DEFAULT 0x00020000 +# define R200_VAP_VF_MAX_VTX_NUM__SHIFT 18 +# define R200_VAP_VF_MAX_VTX_NUM (9 << 18) +# define R200_VAP_DX_CLIP_SPACE_DEF 0x00400000 +#define R200_VF_MAX_VTX_INDX 0x210c +#define R200_VF_MIN_VTX_INDX 0x2110 +#define R200_SE_VTE_CNTL 0x20b0 +# define R200_VPORT_X_SCALE_ENA 0x00000001 +# define R200_VPORT_X_OFFSET_ENA 0x00000002 +# define R200_VPORT_Y_SCALE_ENA 0x00000004 +# define R200_VPORT_Y_OFFSET_ENA 0x00000008 +# define R200_VPORT_Z_SCALE_ENA 0x00000010 +# define R200_VPORT_Z_OFFSET_ENA 0x00000020 +# define R200_VTX_XY_FMT 0x00000100 +# define R200_VTX_Z_FMT 0x00000200 +# define R200_VTX_W0_FMT 0x00000400 +# define R200_VTX_W0_NORMALIZE 0x00000800 +# define R200_VTX_ST_DENORMALIZED 0x00001000 +#define R200_SE_VAP_CNTL_STATUS 0x2140 +# define R200_VC_NO_SWAP (0 << 0) +# define R200_VC_16BIT_SWAP (1 << 0) +# define R200_VC_32BIT_SWAP (2 << 0) +#define R200_PP_TXFILTER_0 0x2c00 +#define R200_PP_TXFILTER_1 0x2c20 +#define R200_PP_TXFILTER_2 0x2c40 +#define R200_PP_TXFILTER_3 0x2c60 +#define R200_PP_TXFILTER_4 0x2c80 +#define R200_PP_TXFILTER_5 0x2ca0 +# define R200_MAG_FILTER_NEAREST (0 << 0) +# define R200_MAG_FILTER_LINEAR (1 << 0) +# define R200_MAG_FILTER_MASK (1 << 0) +# define R200_MIN_FILTER_NEAREST (0 << 1) +# define R200_MIN_FILTER_LINEAR (1 << 1) +# define R200_MIN_FILTER_NEAREST_MIP_NEAREST (2 << 1) +# define R200_MIN_FILTER_NEAREST_MIP_LINEAR (3 << 1) +# define R200_MIN_FILTER_LINEAR_MIP_NEAREST (6 << 1) +# define R200_MIN_FILTER_LINEAR_MIP_LINEAR (7 << 1) +# define R200_MIN_FILTER_ANISO_NEAREST (8 << 1) +# define R200_MIN_FILTER_ANISO_LINEAR (9 << 1) +# define R200_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (10 << 1) +# define R200_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR (11 << 1) +# define R200_MIN_FILTER_MASK (15 << 1) +# define R200_MAX_ANISO_1_TO_1 (0 << 5) +# define R200_MAX_ANISO_2_TO_1 (1 << 5) +# define R200_MAX_ANISO_4_TO_1 (2 << 5) +# define R200_MAX_ANISO_8_TO_1 (3 << 5) +# define R200_MAX_ANISO_16_TO_1 (4 << 5) +# define R200_MAX_ANISO_MASK (7 << 5) +# define R200_MAX_MIP_LEVEL_MASK (0x0f << 16) +# define R200_MAX_MIP_LEVEL_SHIFT 16 +# define R200_YUV_TO_RGB (1 << 20) +# define R200_YUV_TEMPERATURE_COOL (0 << 21) +# define R200_YUV_TEMPERATURE_HOT (1 << 21) +# define R200_YUV_TEMPERATURE_MASK (1 << 21) +# define R200_WRAPEN_S (1 << 22) +# define R200_CLAMP_S_WRAP (0 << 23) +# define R200_CLAMP_S_MIRROR (1 << 23) +# define R200_CLAMP_S_CLAMP_LAST (2 << 23) +# define R200_CLAMP_S_MIRROR_CLAMP_LAST (3 << 23) +# define R200_CLAMP_S_CLAMP_BORDER (4 << 23) +# define R200_CLAMP_S_MIRROR_CLAMP_BORDER (5 << 23) +# define R200_CLAMP_S_CLAMP_GL (6 << 23) +# define R200_CLAMP_S_MIRROR_CLAMP_GL (7 << 23) +# define R200_CLAMP_S_MASK (7 << 23) +# define R200_WRAPEN_T (1 << 26) +# define R200_CLAMP_T_WRAP (0 << 27) +# define R200_CLAMP_T_MIRROR (1 << 27) +# define R200_CLAMP_T_CLAMP_LAST (2 << 27) +# define R200_CLAMP_T_MIRROR_CLAMP_LAST (3 << 27) +# define R200_CLAMP_T_CLAMP_BORDER (4 << 27) +# define R200_CLAMP_T_MIRROR_CLAMP_BORDER (5 << 27) +# define R200_CLAMP_T_CLAMP_GL (6 << 27) +# define R200_CLAMP_T_MIRROR_CLAMP_GL (7 << 27) +# define R200_CLAMP_T_MASK (7 << 27) +# define R200_KILL_LT_ZERO (1 << 30) +# define R200_BORDER_MODE_OGL (0 << 31) +# define R200_BORDER_MODE_D3D (1 << 31) +#define R200_PP_TXFORMAT_0 0x2c04 +#define R200_PP_TXFORMAT_1 0x2c24 +#define R200_PP_TXFORMAT_2 0x2c44 +#define R200_PP_TXFORMAT_3 0x2c64 +#define R200_PP_TXFORMAT_4 0x2c84 +#define R200_PP_TXFORMAT_5 0x2ca4 +# define R200_TXFORMAT_I8 (0 << 0) +# define R200_TXFORMAT_AI88 (1 << 0) +# define R200_TXFORMAT_RGB332 (2 << 0) +# define R200_TXFORMAT_ARGB1555 (3 << 0) +# define R200_TXFORMAT_RGB565 (4 << 0) +# define R200_TXFORMAT_ARGB4444 (5 << 0) +# define R200_TXFORMAT_ARGB8888 (6 << 0) +# define R200_TXFORMAT_RGBA8888 (7 << 0) +# define R200_TXFORMAT_Y8 (8 << 0) +# define R200_TXFORMAT_AVYU4444 (9 << 0) +# define R200_TXFORMAT_VYUY422 (10 << 0) +# define R200_TXFORMAT_YVYU422 (11 << 0) +# define R200_TXFORMAT_DXT1 (12 << 0) +# define R200_TXFORMAT_DXT23 (14 << 0) +# define R200_TXFORMAT_DXT45 (15 << 0) +# define R200_TXFORMAT_ABGR8888 (22 << 0) +# define R200_TXFORMAT_FORMAT_MASK (31 << 0) +# define R200_TXFORMAT_FORMAT_SHIFT 0 +# define R200_TXFORMAT_ALPHA_IN_MAP (1 << 6) +# define R200_TXFORMAT_NON_POWER2 (1 << 7) +# define R200_TXFORMAT_WIDTH_MASK (15 << 8) +# define R200_TXFORMAT_WIDTH_SHIFT 8 +# define R200_TXFORMAT_HEIGHT_MASK (15 << 12) +# define R200_TXFORMAT_HEIGHT_SHIFT 12 +# define R200_TXFORMAT_F5_WIDTH_MASK (15 << 16) /* cube face 5 */ +# define R200_TXFORMAT_F5_WIDTH_SHIFT 16 +# define R200_TXFORMAT_F5_HEIGHT_MASK (15 << 20) +# define R200_TXFORMAT_F5_HEIGHT_SHIFT 20 +# define R200_TXFORMAT_ST_ROUTE_STQ0 (0 << 24) +# define R200_TXFORMAT_ST_ROUTE_STQ1 (1 << 24) +# define R200_TXFORMAT_ST_ROUTE_STQ2 (2 << 24) +# define R200_TXFORMAT_ST_ROUTE_STQ3 (3 << 24) +# define R200_TXFORMAT_ST_ROUTE_STQ4 (4 << 24) +# define R200_TXFORMAT_ST_ROUTE_STQ5 (5 << 24) +# define R200_TXFORMAT_ST_ROUTE_MASK (7 << 24) +# define R200_TXFORMAT_ST_ROUTE_SHIFT 24 +# define R200_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28) +# define R200_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29) +# define R200_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) +#define R200_PP_TXFORMAT_X_0 0x2c08 +#define R200_PP_TXFORMAT_X_1 0x2c28 +#define R200_PP_TXFORMAT_X_2 0x2c48 +#define R200_PP_TXFORMAT_X_3 0x2c68 +#define R200_PP_TXFORMAT_X_4 0x2c88 +#define R200_PP_TXFORMAT_X_5 0x2ca8 + +#define R200_PP_TXSIZE_0 0x2c0c /* NPOT only */ +#define R200_PP_TXSIZE_1 0x2c2c /* NPOT only */ +#define R200_PP_TXSIZE_2 0x2c4c /* NPOT only */ +#define R200_PP_TXSIZE_3 0x2c6c /* NPOT only */ +#define R200_PP_TXSIZE_4 0x2c8c /* NPOT only */ +#define R200_PP_TXSIZE_5 0x2cac /* NPOT only */ + +#define R200_PP_TXPITCH_0 0x2c10 /* NPOT only */ +#define R200_PP_TXPITCH_1 0x2c30 /* NPOT only */ +#define R200_PP_TXPITCH_2 0x2c50 /* NPOT only */ +#define R200_PP_TXPITCH_3 0x2c70 /* NPOT only */ +#define R200_PP_TXPITCH_4 0x2c90 /* NPOT only */ +#define R200_PP_TXPITCH_5 0x2cb0 /* NPOT only */ + +#define R200_PP_TXOFFSET_0 0x2d00 +# define R200_TXO_ENDIAN_NO_SWAP (0 << 0) +# define R200_TXO_ENDIAN_BYTE_SWAP (1 << 0) +# define R200_TXO_ENDIAN_WORD_SWAP (2 << 0) +# define R200_TXO_ENDIAN_HALFDW_SWAP (3 << 0) +# define R200_TXO_MACRO_LINEAR (0 << 2) +# define R200_TXO_MACRO_TILE (1 << 2) +# define R200_TXO_MICRO_LINEAR (0 << 3) +# define R200_TXO_MICRO_TILE (1 << 3) +# define R200_TXO_OFFSET_MASK 0xffffffe0 +# define R200_TXO_OFFSET_SHIFT 5 +#define R200_PP_TXOFFSET_1 0x2d18 +#define R200_PP_TXOFFSET_2 0x2d30 +#define R200_PP_TXOFFSET_3 0x2d48 +#define R200_PP_TXOFFSET_4 0x2d60 +#define R200_PP_TXOFFSET_5 0x2d78 + +#define R200_PP_TFACTOR_0 0x2ee0 +#define R200_PP_TFACTOR_1 0x2ee4 +#define R200_PP_TFACTOR_2 0x2ee8 +#define R200_PP_TFACTOR_3 0x2eec +#define R200_PP_TFACTOR_4 0x2ef0 +#define R200_PP_TFACTOR_5 0x2ef4 + +#define R200_PP_TXCBLEND_0 0x2f00 +# define R200_TXC_ARG_A_ZERO (0) +# define R200_TXC_ARG_A_CURRENT_COLOR (2) +# define R200_TXC_ARG_A_CURRENT_ALPHA (3) +# define R200_TXC_ARG_A_DIFFUSE_COLOR (4) +# define R200_TXC_ARG_A_DIFFUSE_ALPHA (5) +# define R200_TXC_ARG_A_SPECULAR_COLOR (6) +# define R200_TXC_ARG_A_SPECULAR_ALPHA (7) +# define R200_TXC_ARG_A_TFACTOR_COLOR (8) +# define R200_TXC_ARG_A_TFACTOR_ALPHA (9) +# define R200_TXC_ARG_A_R0_COLOR (10) +# define R200_TXC_ARG_A_R0_ALPHA (11) +# define R200_TXC_ARG_A_R1_COLOR (12) +# define R200_TXC_ARG_A_R1_ALPHA (13) +# define R200_TXC_ARG_A_R2_COLOR (14) +# define R200_TXC_ARG_A_R2_ALPHA (15) +# define R200_TXC_ARG_A_R3_COLOR (16) +# define R200_TXC_ARG_A_R3_ALPHA (17) +# define R200_TXC_ARG_A_R4_COLOR (18) +# define R200_TXC_ARG_A_R4_ALPHA (19) +# define R200_TXC_ARG_A_R5_COLOR (20) +# define R200_TXC_ARG_A_R5_ALPHA (21) +# define R200_TXC_ARG_A_TFACTOR1_COLOR (26) +# define R200_TXC_ARG_A_TFACTOR1_ALPHA (27) +# define R200_TXC_ARG_A_MASK (31 << 0) +# define R200_TXC_ARG_A_SHIFT 0 +# define R200_TXC_ARG_B_ZERO (0 << 5) +# define R200_TXC_ARG_B_CURRENT_COLOR (2 << 5) +# define R200_TXC_ARG_B_CURRENT_ALPHA (3 << 5) +# define R200_TXC_ARG_B_DIFFUSE_COLOR (4 << 5) +# define R200_TXC_ARG_B_DIFFUSE_ALPHA (5 << 5) +# define R200_TXC_ARG_B_SPECULAR_COLOR (6 << 5) +# define R200_TXC_ARG_B_SPECULAR_ALPHA (7 << 5) +# define R200_TXC_ARG_B_TFACTOR_COLOR (8 << 5) +# define R200_TXC_ARG_B_TFACTOR_ALPHA (9 << 5) +# define R200_TXC_ARG_B_R0_COLOR (10 << 5) +# define R200_TXC_ARG_B_R0_ALPHA (11 << 5) +# define R200_TXC_ARG_B_R1_COLOR (12 << 5) +# define R200_TXC_ARG_B_R1_ALPHA (13 << 5) +# define R200_TXC_ARG_B_R2_COLOR (14 << 5) +# define R200_TXC_ARG_B_R2_ALPHA (15 << 5) +# define R200_TXC_ARG_B_R3_COLOR (16 << 5) +# define R200_TXC_ARG_B_R3_ALPHA (17 << 5) +# define R200_TXC_ARG_B_R4_COLOR (18 << 5) +# define R200_TXC_ARG_B_R4_ALPHA (19 << 5) +# define R200_TXC_ARG_B_R5_COLOR (20 << 5) +# define R200_TXC_ARG_B_R5_ALPHA (21 << 5) +# define R200_TXC_ARG_B_TFACTOR1_COLOR (26 << 5) +# define R200_TXC_ARG_B_TFACTOR1_ALPHA (27 << 5) +# define R200_TXC_ARG_B_MASK (31 << 5) +# define R200_TXC_ARG_B_SHIFT 5 +# define R200_TXC_ARG_C_ZERO (0 << 10) +# define R200_TXC_ARG_C_CURRENT_COLOR (2 << 10) +# define R200_TXC_ARG_C_CURRENT_ALPHA (3 << 10) +# define R200_TXC_ARG_C_DIFFUSE_COLOR (4 << 10) +# define R200_TXC_ARG_C_DIFFUSE_ALPHA (5 << 10) +# define R200_TXC_ARG_C_SPECULAR_COLOR (6 << 10) +# define R200_TXC_ARG_C_SPECULAR_ALPHA (7 << 10) +# define R200_TXC_ARG_C_TFACTOR_COLOR (8 << 10) +# define R200_TXC_ARG_C_TFACTOR_ALPHA (9 << 10) +# define R200_TXC_ARG_C_R0_COLOR (10 << 10) +# define R200_TXC_ARG_C_R0_ALPHA (11 << 10) +# define R200_TXC_ARG_C_R1_COLOR (12 << 10) +# define R200_TXC_ARG_C_R1_ALPHA (13 << 10) +# define R200_TXC_ARG_C_R2_COLOR (14 << 10) +# define R200_TXC_ARG_C_R2_ALPHA (15 << 10) +# define R200_TXC_ARG_C_R3_COLOR (16 << 10) +# define R200_TXC_ARG_C_R3_ALPHA (17 << 10) +# define R200_TXC_ARG_C_R4_COLOR (18 << 10) +# define R200_TXC_ARG_C_R4_ALPHA (19 << 10) +# define R200_TXC_ARG_C_R5_COLOR (20 << 10) +# define R200_TXC_ARG_C_R5_ALPHA (21 << 10) +# define R200_TXC_ARG_C_TFACTOR1_COLOR (26 << 10) +# define R200_TXC_ARG_C_TFACTOR1_ALPHA (27 << 10) +# define R200_TXC_ARG_C_MASK (31 << 10) +# define R200_TXC_ARG_C_SHIFT 10 +# define R200_TXC_COMP_ARG_A (1 << 16) +# define R200_TXC_COMP_ARG_A_SHIFT (16) +# define R200_TXC_BIAS_ARG_A (1 << 17) +# define R200_TXC_SCALE_ARG_A (1 << 18) +# define R200_TXC_NEG_ARG_A (1 << 19) +# define R200_TXC_COMP_ARG_B (1 << 20) +# define R200_TXC_COMP_ARG_B_SHIFT (20) +# define R200_TXC_BIAS_ARG_B (1 << 21) +# define R200_TXC_SCALE_ARG_B (1 << 22) +# define R200_TXC_NEG_ARG_B (1 << 23) +# define R200_TXC_COMP_ARG_C (1 << 24) +# define R200_TXC_COMP_ARG_C_SHIFT (24) +# define R200_TXC_BIAS_ARG_C (1 << 25) +# define R200_TXC_SCALE_ARG_C (1 << 26) +# define R200_TXC_NEG_ARG_C (1 << 27) +# define R200_TXC_OP_MADD (0 << 28) +# define R200_TXC_OP_CND0 (2 << 28) +# define R200_TXC_OP_LERP (3 << 28) +# define R200_TXC_OP_DOT3 (4 << 28) +# define R200_TXC_OP_DOT4 (5 << 28) +# define R200_TXC_OP_CONDITIONAL (6 << 28) +# define R200_TXC_OP_DOT2_ADD (7 << 28) +# define R200_TXC_OP_MASK (7 << 28) +#define R200_PP_TXCBLEND2_0 0x2f04 +# define R200_TXC_TFACTOR_SEL_SHIFT 0 +# define R200_TXC_TFACTOR_SEL_MASK 0x7 +# define R200_TXC_TFACTOR1_SEL_SHIFT 4 +# define R200_TXC_TFACTOR1_SEL_MASK (0x7 << 4) +# define R200_TXC_SCALE_SHIFT 8 +# define R200_TXC_SCALE_MASK (7 << 8) +# define R200_TXC_SCALE_1X (0 << 8) +# define R200_TXC_SCALE_2X (1 << 8) +# define R200_TXC_SCALE_4X (2 << 8) +# define R200_TXC_SCALE_8X (3 << 8) +# define R200_TXC_SCALE_INV2 (5 << 8) +# define R200_TXC_SCALE_INV4 (6 << 8) +# define R200_TXC_SCALE_INV8 (7 << 8) +# define R200_TXC_CLAMP_SHIFT 12 +# define R200_TXC_CLAMP_MASK (3 << 12) +# define R200_TXC_CLAMP_WRAP (0 << 12) +# define R200_TXC_CLAMP_0_1 (1 << 12) +# define R200_TXC_CLAMP_8_8 (2 << 12) +# define R200_TXC_OUTPUT_REG_MASK (7 << 16) +# define R200_TXC_OUTPUT_REG_NONE (0 << 16) +# define R200_TXC_OUTPUT_REG_R0 (1 << 16) +# define R200_TXC_OUTPUT_REG_R1 (2 << 16) +# define R200_TXC_OUTPUT_REG_R2 (3 << 16) +# define R200_TXC_OUTPUT_REG_R3 (4 << 16) +# define R200_TXC_OUTPUT_REG_R4 (5 << 16) +# define R200_TXC_OUTPUT_REG_R5 (6 << 16) +# define R200_TXC_OUTPUT_MASK_MASK (7 << 20) +# define R200_TXC_OUTPUT_MASK_RGB (0 << 20) +# define R200_TXC_OUTPUT_MASK_RG (1 << 20) +# define R200_TXC_OUTPUT_MASK_RB (2 << 20) +# define R200_TXC_OUTPUT_MASK_R (3 << 20) +# define R200_TXC_OUTPUT_MASK_GB (4 << 20) +# define R200_TXC_OUTPUT_MASK_G (5 << 20) +# define R200_TXC_OUTPUT_MASK_B (6 << 20) +# define R200_TXC_OUTPUT_MASK_NONE (7 << 20) +# define R200_TXC_REPL_NORMAL 0 +# define R200_TXC_REPL_RED 1 +# define R200_TXC_REPL_GREEN 2 +# define R200_TXC_REPL_BLUE 3 +# define R200_TXC_REPL_ARG_A_SHIFT 26 +# define R200_TXC_REPL_ARG_A_MASK (3 << 26) +# define R200_TXC_REPL_ARG_B_SHIFT 28 +# define R200_TXC_REPL_ARG_B_MASK (3 << 28) +# define R200_TXC_REPL_ARG_C_SHIFT 30 +# define R200_TXC_REPL_ARG_C_MASK (3 << 30) +#define R200_PP_TXABLEND_0 0x2f08 +# define R200_TXA_ARG_A_ZERO (0) +# define R200_TXA_ARG_A_CURRENT_ALPHA (2) /* guess */ +# define R200_TXA_ARG_A_CURRENT_BLUE (3) /* guess */ +# define R200_TXA_ARG_A_DIFFUSE_ALPHA (4) +# define R200_TXA_ARG_A_DIFFUSE_BLUE (5) +# define R200_TXA_ARG_A_SPECULAR_ALPHA (6) +# define R200_TXA_ARG_A_SPECULAR_BLUE (7) +# define R200_TXA_ARG_A_TFACTOR_ALPHA (8) +# define R200_TXA_ARG_A_TFACTOR_BLUE (9) +# define R200_TXA_ARG_A_R0_ALPHA (10) +# define R200_TXA_ARG_A_R0_BLUE (11) +# define R200_TXA_ARG_A_R1_ALPHA (12) +# define R200_TXA_ARG_A_R1_BLUE (13) +# define R200_TXA_ARG_A_R2_ALPHA (14) +# define R200_TXA_ARG_A_R2_BLUE (15) +# define R200_TXA_ARG_A_R3_ALPHA (16) +# define R200_TXA_ARG_A_R3_BLUE (17) +# define R200_TXA_ARG_A_R4_ALPHA (18) +# define R200_TXA_ARG_A_R4_BLUE (19) +# define R200_TXA_ARG_A_R5_ALPHA (20) +# define R200_TXA_ARG_A_R5_BLUE (21) +# define R200_TXA_ARG_A_TFACTOR1_ALPHA (26) +# define R200_TXA_ARG_A_TFACTOR1_BLUE (27) +# define R200_TXA_ARG_A_MASK (31 << 0) +# define R200_TXA_ARG_A_SHIFT 0 +# define R200_TXA_ARG_B_ZERO (0 << 5) +# define R200_TXA_ARG_B_CURRENT_ALPHA (2 << 5) /* guess */ +# define R200_TXA_ARG_B_CURRENT_BLUE (3 << 5) /* guess */ +# define R200_TXA_ARG_B_DIFFUSE_ALPHA (4 << 5) +# define R200_TXA_ARG_B_DIFFUSE_BLUE (5 << 5) +# define R200_TXA_ARG_B_SPECULAR_ALPHA (6 << 5) +# define R200_TXA_ARG_B_SPECULAR_BLUE (7 << 5) +# define R200_TXA_ARG_B_TFACTOR_ALPHA (8 << 5) +# define R200_TXA_ARG_B_TFACTOR_BLUE (9 << 5) +# define R200_TXA_ARG_B_R0_ALPHA (10 << 5) +# define R200_TXA_ARG_B_R0_BLUE (11 << 5) +# define R200_TXA_ARG_B_R1_ALPHA (12 << 5) +# define R200_TXA_ARG_B_R1_BLUE (13 << 5) +# define R200_TXA_ARG_B_R2_ALPHA (14 << 5) +# define R200_TXA_ARG_B_R2_BLUE (15 << 5) +# define R200_TXA_ARG_B_R3_ALPHA (16 << 5) +# define R200_TXA_ARG_B_R3_BLUE (17 << 5) +# define R200_TXA_ARG_B_R4_ALPHA (18 << 5) +# define R200_TXA_ARG_B_R4_BLUE (19 << 5) +# define R200_TXA_ARG_B_R5_ALPHA (20 << 5) +# define R200_TXA_ARG_B_R5_BLUE (21 << 5) +# define R200_TXA_ARG_B_TFACTOR1_ALPHA (26 << 5) +# define R200_TXA_ARG_B_TFACTOR1_BLUE (27 << 5) +# define R200_TXA_ARG_B_MASK (31 << 5) +# define R200_TXA_ARG_B_SHIFT 5 +# define R200_TXA_ARG_C_ZERO (0 << 10) +# define R200_TXA_ARG_C_CURRENT_ALPHA (2 << 10) /* guess */ +# define R200_TXA_ARG_C_CURRENT_BLUE (3 << 10) /* guess */ +# define R200_TXA_ARG_C_DIFFUSE_ALPHA (4 << 10) +# define R200_TXA_ARG_C_DIFFUSE_BLUE (5 << 10) +# define R200_TXA_ARG_C_SPECULAR_ALPHA (6 << 10) +# define R200_TXA_ARG_C_SPECULAR_BLUE (7 << 10) +# define R200_TXA_ARG_C_TFACTOR_ALPHA (8 << 10) +# define R200_TXA_ARG_C_TFACTOR_BLUE (9 << 10) +# define R200_TXA_ARG_C_R0_ALPHA (10 << 10) +# define R200_TXA_ARG_C_R0_BLUE (11 << 10) +# define R200_TXA_ARG_C_R1_ALPHA (12 << 10) +# define R200_TXA_ARG_C_R1_BLUE (13 << 10) +# define R200_TXA_ARG_C_R2_ALPHA (14 << 10) +# define R200_TXA_ARG_C_R2_BLUE (15 << 10) +# define R200_TXA_ARG_C_R3_ALPHA (16 << 10) +# define R200_TXA_ARG_C_R3_BLUE (17 << 10) +# define R200_TXA_ARG_C_R4_ALPHA (18 << 10) +# define R200_TXA_ARG_C_R4_BLUE (19 << 10) +# define R200_TXA_ARG_C_R5_ALPHA (20 << 10) +# define R200_TXA_ARG_C_R5_BLUE (21 << 10) +# define R200_TXA_ARG_C_TFACTOR1_ALPHA (26 << 10) +# define R200_TXA_ARG_C_TFACTOR1_BLUE (27 << 10) +# define R200_TXA_ARG_C_MASK (31 << 10) +# define R200_TXA_ARG_C_SHIFT 10 +# define R200_TXA_COMP_ARG_A (1 << 16) +# define R200_TXA_COMP_ARG_A_SHIFT (16) +# define R200_TXA_BIAS_ARG_A (1 << 17) +# define R200_TXA_SCALE_ARG_A (1 << 18) +# define R200_TXA_NEG_ARG_A (1 << 19) +# define R200_TXA_COMP_ARG_B (1 << 20) +# define R200_TXA_COMP_ARG_B_SHIFT (20) +# define R200_TXA_BIAS_ARG_B (1 << 21) +# define R200_TXA_SCALE_ARG_B (1 << 22) +# define R200_TXA_NEG_ARG_B (1 << 23) +# define R200_TXA_COMP_ARG_C (1 << 24) +# define R200_TXA_COMP_ARG_C_SHIFT (24) +# define R200_TXA_BIAS_ARG_C (1 << 25) +# define R200_TXA_SCALE_ARG_C (1 << 26) +# define R200_TXA_NEG_ARG_C (1 << 27) +# define R200_TXA_OP_MADD (0 << 28) +# define R200_TXA_OP_CND0 (2 << 28) +# define R200_TXA_OP_LERP (3 << 28) +# define R200_TXA_OP_CONDITIONAL (6 << 28) +# define R200_TXA_OP_MASK (7 << 28) +#define R200_PP_TXABLEND2_0 0x2f0c +# define R200_TXA_TFACTOR_SEL_SHIFT 0 +# define R200_TXA_TFACTOR_SEL_MASK 0x7 +# define R200_TXA_TFACTOR1_SEL_SHIFT 4 +# define R200_TXA_TFACTOR1_SEL_MASK (0x7 << 4) +# define R200_TXA_SCALE_SHIFT 8 +# define R200_TXA_SCALE_MASK (7 << 8) +# define R200_TXA_SCALE_1X (0 << 8) +# define R200_TXA_SCALE_2X (1 << 8) +# define R200_TXA_SCALE_4X (2 << 8) +# define R200_TXA_SCALE_8X (3 << 8) +# define R200_TXA_SCALE_INV2 (5 << 8) +# define R200_TXA_SCALE_INV4 (6 << 8) +# define R200_TXA_SCALE_INV8 (7 << 8) +# define R200_TXA_CLAMP_SHIFT 12 +# define R200_TXA_CLAMP_MASK (3 << 12) +# define R200_TXA_CLAMP_WRAP (0 << 12) +# define R200_TXA_CLAMP_0_1 (1 << 12) +# define R200_TXA_CLAMP_8_8 (2 << 12) +# define R200_TXA_OUTPUT_REG_MASK (7 << 16) +# define R200_TXA_OUTPUT_REG_NONE (0 << 16) +# define R200_TXA_OUTPUT_REG_R0 (1 << 16) +# define R200_TXA_OUTPUT_REG_R1 (2 << 16) +# define R200_TXA_OUTPUT_REG_R2 (3 << 16) +# define R200_TXA_OUTPUT_REG_R3 (4 << 16) +# define R200_TXA_OUTPUT_REG_R4 (5 << 16) +# define R200_TXA_OUTPUT_REG_R5 (6 << 16) +# define R200_TXA_DOT_ALPHA (1 << 20) +# define R200_TXA_REPL_NORMAL 0 +# define R200_TXA_REPL_RED 1 +# define R200_TXA_REPL_GREEN 2 +# define R200_TXA_REPL_ARG_A_SHIFT 26 +# define R200_TXA_REPL_ARG_A_MASK (3 << 26) +# define R200_TXA_REPL_ARG_B_SHIFT 28 +# define R200_TXA_REPL_ARG_B_MASK (3 << 28) +# define R200_TXA_REPL_ARG_C_SHIFT 30 +# define R200_TXA_REPL_ARG_C_MASK (3 << 30) + +#define R200_SE_VTX_FMT_0 0x2088 +# define R200_VTX_XY 0 /* always have xy */ +# define R200_VTX_Z0 (1<<0) +# define R200_VTX_W0 (1<<1) +# define R200_VTX_WEIGHT_COUNT_SHIFT (2) +# define R200_VTX_PV_MATRIX_SEL (1<<5) +# define R200_VTX_N0 (1<<6) +# define R200_VTX_POINT_SIZE (1<<7) +# define R200_VTX_DISCRETE_FOG (1<<8) +# define R200_VTX_SHININESS_0 (1<<9) +# define R200_VTX_SHININESS_1 (1<<10) +# define R200_VTX_COLOR_NOT_PRESENT 0 +# define R200_VTX_PK_RGBA 1 +# define R200_VTX_FP_RGB 2 +# define R200_VTX_FP_RGBA 3 +# define R200_VTX_COLOR_MASK 3 +# define R200_VTX_COLOR_0_SHIFT 11 +# define R200_VTX_COLOR_1_SHIFT 13 +# define R200_VTX_COLOR_2_SHIFT 15 +# define R200_VTX_COLOR_3_SHIFT 17 +# define R200_VTX_COLOR_4_SHIFT 19 +# define R200_VTX_COLOR_5_SHIFT 21 +# define R200_VTX_COLOR_6_SHIFT 23 +# define R200_VTX_COLOR_7_SHIFT 25 +# define R200_VTX_XY1 (1<<28) +# define R200_VTX_Z1 (1<<29) +# define R200_VTX_W1 (1<<30) +# define R200_VTX_N1 (1<<31) +#define R200_SE_VTX_FMT_1 0x208c +# define R200_VTX_TEX0_COMP_CNT_SHIFT 0 +# define R200_VTX_TEX1_COMP_CNT_SHIFT 3 +# define R200_VTX_TEX2_COMP_CNT_SHIFT 6 +# define R200_VTX_TEX3_COMP_CNT_SHIFT 9 +# define R200_VTX_TEX4_COMP_CNT_SHIFT 12 +# define R200_VTX_TEX5_COMP_CNT_SHIFT 15 + +#define R200_SE_TCL_OUTPUT_VTX_FMT_0 0x2090 +#define R200_SE_TCL_OUTPUT_VTX_FMT_1 0x2094 +#define R200_SE_TCL_OUTPUT_VTX_COMP_SEL 0x2250 +# define R200_OUTPUT_XYZW (1<<0) +# define R200_OUTPUT_COLOR_0 (1<<8) +# define R200_OUTPUT_COLOR_1 (1<<9) +# define R200_OUTPUT_TEX_0 (1<<16) +# define R200_OUTPUT_TEX_1 (1<<17) +# define R200_OUTPUT_TEX_2 (1<<18) +# define R200_OUTPUT_TEX_3 (1<<19) +# define R200_OUTPUT_TEX_4 (1<<20) +# define R200_OUTPUT_TEX_5 (1<<21) +# define R200_OUTPUT_TEX_MASK (0x3f<<16) +# define R200_OUTPUT_DISCRETE_FOG (1<<24) +# define R200_OUTPUT_PT_SIZE (1<<25) +# define R200_FORCE_INORDER_PROC (1<<31) +#define R200_PP_CNTL_X 0x2cc4 +#define R200_PP_TXMULTI_CTL_0 0x2c1c +#define R200_SE_VTX_STATE_CNTL 0x2180 +# define R200_UPDATE_USER_COLOR_0_ENA_MASK (1<<16) + + /* Registers for CP and Microcode Engine */ +#define RADEON_CP_ME_RAM_ADDR 0x07d4 +#define RADEON_CP_ME_RAM_RADDR 0x07d8 +#define RADEON_CP_ME_RAM_DATAH 0x07dc +#define RADEON_CP_ME_RAM_DATAL 0x07e0 + +#define RADEON_CP_RB_BASE 0x0700 +#define RADEON_CP_RB_CNTL 0x0704 +#define RADEON_CP_RB_RPTR_ADDR 0x070c +#define RADEON_CP_RB_RPTR 0x0710 +#define RADEON_CP_RB_WPTR 0x0714 + +#define RADEON_CP_IB_BASE 0x0738 +#define RADEON_CP_IB_BUFSZ 0x073c + +#define RADEON_CP_CSQ_CNTL 0x0740 +# define RADEON_CSQ_CNT_PRIMARY_MASK (0xff << 0) +# define RADEON_CSQ_PRIDIS_INDDIS (0 << 28) +# define RADEON_CSQ_PRIPIO_INDDIS (1 << 28) +# define RADEON_CSQ_PRIBM_INDDIS (2 << 28) +# define RADEON_CSQ_PRIPIO_INDBM (3 << 28) +# define RADEON_CSQ_PRIBM_INDBM (4 << 28) +# define RADEON_CSQ_PRIPIO_INDPIO (15 << 28) +#define RADEON_CP_CSQ_STAT 0x07f8 +# define RADEON_CSQ_RPTR_PRIMARY_MASK (0xff << 0) +# define RADEON_CSQ_WPTR_PRIMARY_MASK (0xff << 8) +# define RADEON_CSQ_RPTR_INDIRECT_MASK (0xff << 16) +# define RADEON_CSQ_WPTR_INDIRECT_MASK (0xff << 24) +#define RADEON_CP_CSQ_ADDR 0x07f0 +#define RADEON_CP_CSQ_DATA 0x07f4 +#define RADEON_CP_CSQ_APER_PRIMARY 0x1000 +#define RADEON_CP_CSQ_APER_INDIRECT 0x1300 + +#define RADEON_CP_RB_WPTR_DELAY 0x0718 +# define RADEON_PRE_WRITE_TIMER_SHIFT 0 +# define RADEON_PRE_WRITE_LIMIT_SHIFT 23 + +#define RADEON_AIC_CNTL 0x01d0 +# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) +#define RADEON_AIC_LO_ADDR 0x01dc + + + + /* Constants */ +#define RADEON_LAST_FRAME_REG RADEON_GUI_SCRATCH_REG0 +#define RADEON_LAST_CLEAR_REG RADEON_GUI_SCRATCH_REG2 + + + + /* CP packet types */ +#define RADEON_CP_PACKET0 0x00000000 +#define RADEON_CP_PACKET1 0x40000000 +#define RADEON_CP_PACKET2 0x80000000 +#define RADEON_CP_PACKET3 0xC0000000 +# define RADEON_CP_PACKET_MASK 0xC0000000 +# define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000 +# define RADEON_CP_PACKET_MAX_DWORDS (1 << 12) +# define RADEON_CP_PACKET0_REG_MASK 0x000007ff +# define RADEON_CP_PACKET1_REG0_MASK 0x000007ff +# define RADEON_CP_PACKET1_REG1_MASK 0x003ff800 + +#define RADEON_CP_PACKET0_ONE_REG_WR 0x00008000 + +#define RADEON_CP_PACKET3_NOP 0xC0001000 +#define RADEON_CP_PACKET3_NEXT_CHAR 0xC0001900 +#define RADEON_CP_PACKET3_PLY_NEXTSCAN 0xC0001D00 +#define RADEON_CP_PACKET3_SET_SCISSORS 0xC0001E00 +#define RADEON_CP_PACKET3_3D_RNDR_GEN_INDX_PRIM 0xC0002300 +#define RADEON_CP_PACKET3_LOAD_MICROCODE 0xC0002400 +#define RADEON_CP_PACKET3_WAIT_FOR_IDLE 0xC0002600 +#define RADEON_CP_PACKET3_3D_DRAW_VBUF 0xC0002800 +#define RADEON_CP_PACKET3_3D_DRAW_IMMD 0xC0002900 +#define RADEON_CP_PACKET3_3D_DRAW_INDX 0xC0002A00 +#define RADEON_CP_PACKET3_LOAD_PALETTE 0xC0002C00 +#define R200_CP_PACKET3_3D_DRAW_IMMD_2 0xc0003500 +#define RADEON_CP_PACKET3_3D_LOAD_VBPNTR 0xC0002F00 +#define RADEON_CP_PACKET3_CNTL_PAINT 0xC0009100 +#define RADEON_CP_PACKET3_CNTL_BITBLT 0xC0009200 +#define RADEON_CP_PACKET3_CNTL_SMALLTEXT 0xC0009300 +#define RADEON_CP_PACKET3_CNTL_HOSTDATA_BLT 0xC0009400 +#define RADEON_CP_PACKET3_CNTL_POLYLINE 0xC0009500 +#define RADEON_CP_PACKET3_CNTL_POLYSCANLINES 0xC0009800 +#define RADEON_CP_PACKET3_CNTL_PAINT_MULTI 0xC0009A00 +#define RADEON_CP_PACKET3_CNTL_BITBLT_MULTI 0xC0009B00 +#define RADEON_CP_PACKET3_CNTL_TRANS_BITBLT 0xC0009C00 + + +#define RADEON_CP_VC_FRMT_XY 0x00000000 +#define RADEON_CP_VC_FRMT_W0 0x00000001 +#define RADEON_CP_VC_FRMT_FPCOLOR 0x00000002 +#define RADEON_CP_VC_FRMT_FPALPHA 0x00000004 +#define RADEON_CP_VC_FRMT_PKCOLOR 0x00000008 +#define RADEON_CP_VC_FRMT_FPSPEC 0x00000010 +#define RADEON_CP_VC_FRMT_FPFOG 0x00000020 +#define RADEON_CP_VC_FRMT_PKSPEC 0x00000040 +#define RADEON_CP_VC_FRMT_ST0 0x00000080 +#define RADEON_CP_VC_FRMT_ST1 0x00000100 +#define RADEON_CP_VC_FRMT_Q1 0x00000200 +#define RADEON_CP_VC_FRMT_ST2 0x00000400 +#define RADEON_CP_VC_FRMT_Q2 0x00000800 +#define RADEON_CP_VC_FRMT_ST3 0x00001000 +#define RADEON_CP_VC_FRMT_Q3 0x00002000 +#define RADEON_CP_VC_FRMT_Q0 0x00004000 +#define RADEON_CP_VC_FRMT_BLND_WEIGHT_CNT_MASK 0x00038000 +#define RADEON_CP_VC_FRMT_N0 0x00040000 +#define RADEON_CP_VC_FRMT_XY1 0x08000000 +#define RADEON_CP_VC_FRMT_Z1 0x10000000 +#define RADEON_CP_VC_FRMT_W1 0x20000000 +#define RADEON_CP_VC_FRMT_N1 0x40000000 +#define RADEON_CP_VC_FRMT_Z 0x80000000 + +#define RADEON_CP_VC_CNTL_PRIM_TYPE_NONE 0x00000000 +#define RADEON_CP_VC_CNTL_PRIM_TYPE_POINT 0x00000001 +#define RADEON_CP_VC_CNTL_PRIM_TYPE_LINE 0x00000002 +#define RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP 0x00000003 +#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004 +#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005 +#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006 +#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_TYPE_2 0x00000007 +#define RADEON_CP_VC_CNTL_PRIM_TYPE_RECT_LIST 0x00000008 +#define RADEON_CP_VC_CNTL_PRIM_TYPE_3VRT_POINT_LIST 0x00000009 +#define RADEON_CP_VC_CNTL_PRIM_TYPE_3VRT_LINE_LIST 0x0000000a +#define RADEON_CP_VC_CNTL_PRIM_TYPE_QUAD_LIST 0x0000000d +#define RADEON_CP_VC_CNTL_PRIM_WALK_IND 0x00000010 +#define RADEON_CP_VC_CNTL_PRIM_WALK_LIST 0x00000020 +#define RADEON_CP_VC_CNTL_PRIM_WALK_RING 0x00000030 +#define RADEON_CP_VC_CNTL_COLOR_ORDER_BGRA 0x00000000 +#define RADEON_CP_VC_CNTL_COLOR_ORDER_RGBA 0x00000040 +#define RADEON_CP_VC_CNTL_MAOS_ENABLE 0x00000080 +#define RADEON_CP_VC_CNTL_VTX_FMT_NON_RADEON_MODE 0x00000000 +#define RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE 0x00000100 +#define RADEON_CP_VC_CNTL_TCL_DISABLE 0x00000000 +#define RADEON_CP_VC_CNTL_TCL_ENABLE 0x00000200 +#define RADEON_CP_VC_CNTL_NUM_SHIFT 16 + +#define RADEON_VS_MATRIX_0_ADDR 0 +#define RADEON_VS_MATRIX_1_ADDR 4 +#define RADEON_VS_MATRIX_2_ADDR 8 +#define RADEON_VS_MATRIX_3_ADDR 12 +#define RADEON_VS_MATRIX_4_ADDR 16 +#define RADEON_VS_MATRIX_5_ADDR 20 +#define RADEON_VS_MATRIX_6_ADDR 24 +#define RADEON_VS_MATRIX_7_ADDR 28 +#define RADEON_VS_MATRIX_8_ADDR 32 +#define RADEON_VS_MATRIX_9_ADDR 36 +#define RADEON_VS_MATRIX_10_ADDR 40 +#define RADEON_VS_MATRIX_11_ADDR 44 +#define RADEON_VS_MATRIX_12_ADDR 48 +#define RADEON_VS_MATRIX_13_ADDR 52 +#define RADEON_VS_MATRIX_14_ADDR 56 +#define RADEON_VS_MATRIX_15_ADDR 60 +#define RADEON_VS_LIGHT_AMBIENT_ADDR 64 +#define RADEON_VS_LIGHT_DIFFUSE_ADDR 72 +#define RADEON_VS_LIGHT_SPECULAR_ADDR 80 +#define RADEON_VS_LIGHT_DIRPOS_ADDR 88 +#define RADEON_VS_LIGHT_HWVSPOT_ADDR 96 +#define RADEON_VS_LIGHT_ATTENUATION_ADDR 104 +#define RADEON_VS_MATRIX_EYE2CLIP_ADDR 112 +#define RADEON_VS_UCP_ADDR 116 +#define RADEON_VS_GLOBAL_AMBIENT_ADDR 122 +#define RADEON_VS_FOG_PARAM_ADDR 123 +#define RADEON_VS_EYE_VECTOR_ADDR 124 + +#define RADEON_SS_LIGHT_DCD_ADDR 0 +#define RADEON_SS_LIGHT_SPOT_EXPONENT_ADDR 8 +#define RADEON_SS_LIGHT_SPOT_CUTOFF_ADDR 16 +#define RADEON_SS_LIGHT_SPECULAR_THRESH_ADDR 24 +#define RADEON_SS_LIGHT_RANGE_CUTOFF_ADDR 32 +#define RADEON_SS_VERT_GUARD_CLIP_ADJ_ADDR 48 +#define RADEON_SS_VERT_GUARD_DISCARD_ADJ_ADDR 49 +#define RADEON_SS_HORZ_GUARD_CLIP_ADJ_ADDR 50 +#define RADEON_SS_HORZ_GUARD_DISCARD_ADJ_ADDR 51 +#define RADEON_SS_SHININESS 60 + +#define RADEON_TV_MASTER_CNTL 0x0800 +# define RADEON_TV_ASYNC_RST (1 << 0) +# define RADEON_CRT_ASYNC_RST (1 << 1) +# define RADEON_RESTART_PHASE_FIX (1 << 3) +# define RADEON_TV_FIFO_ASYNC_RST (1 << 4) +# define RADEON_VIN_ASYNC_RST (1 << 5) +# define RADEON_AUD_ASYNC_RST (1 << 6) +# define RADEON_DVS_ASYNC_RST (1 << 7) +# define RADEON_CRT_FIFO_CE_EN (1 << 9) +# define RADEON_TV_FIFO_CE_EN (1 << 10) +# define RADEON_RE_SYNC_NOW_SEL_MASK (3 << 14) +# define RADEON_TVCLK_ALWAYS_ONb (1 << 30) +# define RADEON_TV_ON (1 << 31) +#define RADEON_TV_PRE_DAC_MUX_CNTL 0x0888 +# define RADEON_Y_RED_EN (1 << 0) +# define RADEON_C_GRN_EN (1 << 1) +# define RADEON_CMP_BLU_EN (1 << 2) +# define RADEON_DAC_DITHER_EN (1 << 3) +# define RADEON_RED_MX_FORCE_DAC_DATA (6 << 4) +# define RADEON_GRN_MX_FORCE_DAC_DATA (6 << 8) +# define RADEON_BLU_MX_FORCE_DAC_DATA (6 << 12) +# define RADEON_TV_FORCE_DAC_DATA_SHIFT 16 +#define RADEON_TV_RGB_CNTL 0x0804 +# define RADEON_SWITCH_TO_BLUE (1 << 4) +# define RADEON_RGB_DITHER_EN (1 << 5) +# define RADEON_RGB_SRC_SEL_MASK (3 << 8) +# define RADEON_RGB_SRC_SEL_CRTC1 (0 << 8) +# define RADEON_RGB_SRC_SEL_RMX (1 << 8) +# define RADEON_RGB_SRC_SEL_CRTC2 (2 << 8) +# define RADEON_RGB_CONVERT_BY_PASS (1 << 10) +# define RADEON_UVRAM_READ_MARGIN_SHIFT 16 +# define RADEON_FIFORAM_FFMACRO_READ_MARGIN_SHIFT 20 +# define RADEON_TVOUT_SCALE_EN (1 << 26) +#define RADEON_TV_SYNC_CNTL 0x0808 +# define RADEON_SYNC_OE (1 << 0) +# define RADEON_SYNC_OUT (1 << 1) +# define RADEON_SYNC_IN (1 << 2) +# define RADEON_SYNC_PUB (1 << 3) +# define RADEON_SYNC_PD (1 << 4) +# define RADEON_TV_SYNC_IO_DRIVE (1 << 5) +#define RADEON_TV_HTOTAL 0x080c +#define RADEON_TV_HDISP 0x0810 +#define RADEON_TV_HSTART 0x0818 +#define RADEON_TV_HCOUNT 0x081C +#define RADEON_TV_VTOTAL 0x0820 +#define RADEON_TV_VDISP 0x0824 +#define RADEON_TV_VCOUNT 0x0828 +#define RADEON_TV_FTOTAL 0x082c +#define RADEON_TV_FCOUNT 0x0830 +#define RADEON_TV_FRESTART 0x0834 +#define RADEON_TV_HRESTART 0x0838 +#define RADEON_TV_VRESTART 0x083c +#define RADEON_TV_HOST_READ_DATA 0x0840 +#define RADEON_TV_HOST_WRITE_DATA 0x0844 +#define RADEON_TV_HOST_RD_WT_CNTL 0x0848 +# define RADEON_HOST_FIFO_RD (1 << 12) +# define RADEON_HOST_FIFO_RD_ACK (1 << 13) +# define RADEON_HOST_FIFO_WT (1 << 14) +# define RADEON_HOST_FIFO_WT_ACK (1 << 15) +#define RADEON_TV_VSCALER_CNTL1 0x084c +# define RADEON_UV_INC_MASK 0xffff +# define RADEON_UV_INC_SHIFT 0 +# define RADEON_Y_W_EN (1 << 24) +# define RADEON_RESTART_FIELD (1 << 29) /* restart on field 0 */ +# define RADEON_Y_DEL_W_SIG_SHIFT 26 +#define RADEON_TV_TIMING_CNTL 0x0850 +# define RADEON_H_INC_MASK 0xfff +# define RADEON_H_INC_SHIFT 0 +# define RADEON_REQ_Y_FIRST (1 << 19) +# define RADEON_FORCE_BURST_ALWAYS (1 << 21) +# define RADEON_UV_POST_SCALE_BYPASS (1 << 23) +# define RADEON_UV_OUTPUT_POST_SCALE_SHIFT 24 +#define RADEON_TV_VSCALER_CNTL2 0x0854 +# define RADEON_DITHER_MODE (1 << 0) +# define RADEON_Y_OUTPUT_DITHER_EN (1 << 1) +# define RADEON_UV_OUTPUT_DITHER_EN (1 << 2) +# define RADEON_UV_TO_BUF_DITHER_EN (1 << 3) +#define RADEON_TV_Y_FALL_CNTL 0x0858 +# define RADEON_Y_FALL_PING_PONG (1 << 16) +# define RADEON_Y_COEF_EN (1 << 17) +#define RADEON_TV_Y_RISE_CNTL 0x085c +# define RADEON_Y_RISE_PING_PONG (1 << 16) +#define RADEON_TV_Y_SAW_TOOTH_CNTL 0x0860 +#define RADEON_TV_UPSAMP_AND_GAIN_CNTL 0x0864 +# define RADEON_YUPSAMP_EN (1 << 0) +# define RADEON_UVUPSAMP_EN (1 << 2) +#define RADEON_TV_GAIN_LIMIT_SETTINGS 0x0868 +# define RADEON_Y_GAIN_LIMIT_SHIFT 0 +# define RADEON_UV_GAIN_LIMIT_SHIFT 16 +#define RADEON_TV_LINEAR_GAIN_SETTINGS 0x086c +# define RADEON_Y_GAIN_SHIFT 0 +# define RADEON_UV_GAIN_SHIFT 16 +#define RADEON_TV_MODULATOR_CNTL1 0x0870 +# define RADEON_YFLT_EN (1 << 2) +# define RADEON_UVFLT_EN (1 << 3) +# define RADEON_ALT_PHASE_EN (1 << 6) +# define RADEON_SYNC_TIP_LEVEL (1 << 7) +# define RADEON_BLANK_LEVEL_SHIFT 8 +# define RADEON_SET_UP_LEVEL_SHIFT 16 +# define RADEON_SLEW_RATE_LIMIT (1 << 23) +# define RADEON_CY_FILT_BLEND_SHIFT 28 +#define RADEON_TV_MODULATOR_CNTL2 0x0874 +# define RADEON_TV_U_BURST_LEVEL_MASK 0x1ff +# define RADEON_TV_V_BURST_LEVEL_MASK 0x1ff +# define RADEON_TV_V_BURST_LEVEL_SHIFT 16 +#define RADEON_TV_CRC_CNTL 0x0890 +#define RADEON_TV_UV_ADR 0x08ac +# define RADEON_MAX_UV_ADR_MASK 0x000000ff +# define RADEON_MAX_UV_ADR_SHIFT 0 +# define RADEON_TABLE1_BOT_ADR_MASK 0x0000ff00 +# define RADEON_TABLE1_BOT_ADR_SHIFT 8 +# define RADEON_TABLE3_TOP_ADR_MASK 0x00ff0000 +# define RADEON_TABLE3_TOP_ADR_SHIFT 16 +# define RADEON_HCODE_TABLE_SEL_MASK 0x06000000 +# define RADEON_HCODE_TABLE_SEL_SHIFT 25 +# define RADEON_VCODE_TABLE_SEL_MASK 0x18000000 +# define RADEON_VCODE_TABLE_SEL_SHIFT 27 +# define RADEON_TV_MAX_FIFO_ADDR 0x1a7 +# define RADEON_TV_MAX_FIFO_ADDR_INTERNAL 0x1ff +#define RADEON_TV_PLL_FINE_CNTL 0x0020 /* PLL */ +#define RADEON_TV_PLL_CNTL 0x0021 /* PLL */ +# define RADEON_TV_M0LO_MASK 0xff +# define RADEON_TV_M0HI_MASK 0x7 +# define RADEON_TV_M0HI_SHIFT 18 +# define RADEON_TV_N0LO_MASK 0x1ff +# define RADEON_TV_N0LO_SHIFT 8 +# define RADEON_TV_N0HI_MASK 0x3 +# define RADEON_TV_N0HI_SHIFT 21 +# define RADEON_TV_P_MASK 0xf +# define RADEON_TV_P_SHIFT 24 +# define RADEON_TV_SLIP_EN (1 << 23) +# define RADEON_TV_DTO_EN (1 << 28) +#define RADEON_TV_PLL_CNTL1 0x0022 /* PLL */ +# define RADEON_TVPLL_RESET (1 << 1) +# define RADEON_TVPLL_SLEEP (1 << 3) +# define RADEON_TVPLL_REFCLK_SEL (1 << 4) +# define RADEON_TVPCP_SHIFT 8 +# define RADEON_TVPCP_MASK (7 << 8) +# define RADEON_TVPVG_SHIFT 11 +# define RADEON_TVPVG_MASK (7 << 11) +# define RADEON_TVPDC_SHIFT 14 +# define RADEON_TVPDC_MASK (3 << 14) +# define RADEON_TVPLL_TEST_DIS (1 << 31) +# define RADEON_TVCLK_SRC_SEL_TVPLL (1 << 30) + +#define RS400_DISP2_REQ_CNTL1 0xe30 +# define RS400_DISP2_START_REQ_LEVEL_SHIFT 0 +# define RS400_DISP2_START_REQ_LEVEL_MASK 0x3ff +# define RS400_DISP2_STOP_REQ_LEVEL_SHIFT 12 +# define RS400_DISP2_STOP_REQ_LEVEL_MASK 0x3ff +# define RS400_DISP2_ALLOW_FID_LEVEL_SHIFT 22 +# define RS400_DISP2_ALLOW_FID_LEVEL_MASK 0x3ff +#define RS400_DISP2_REQ_CNTL2 0xe34 +# define RS400_DISP2_CRITICAL_POINT_START_SHIFT 12 +# define RS400_DISP2_CRITICAL_POINT_START_MASK 0x3ff +# define RS400_DISP2_CRITICAL_POINT_STOP_SHIFT 22 +# define RS400_DISP2_CRITICAL_POINT_STOP_MASK 0x3ff +#define RS400_DMIF_MEM_CNTL1 0xe38 +# define RS400_DISP2_START_ADR_SHIFT 0 +# define RS400_DISP2_START_ADR_MASK 0x3ff +# define RS400_DISP1_CRITICAL_POINT_START_SHIFT 12 +# define RS400_DISP1_CRITICAL_POINT_START_MASK 0x3ff +# define RS400_DISP1_CRITICAL_POINT_STOP_SHIFT 22 +# define RS400_DISP1_CRITICAL_POINT_STOP_MASK 0x3ff +#define RS400_DISP1_REQ_CNTL1 0xe3c +# define RS400_DISP1_START_REQ_LEVEL_SHIFT 0 +# define RS400_DISP1_START_REQ_LEVEL_MASK 0x3ff +# define RS400_DISP1_STOP_REQ_LEVEL_SHIFT 12 +# define RS400_DISP1_STOP_REQ_LEVEL_MASK 0x3ff +# define RS400_DISP1_ALLOW_FID_LEVEL_SHIFT 22 +# define RS400_DISP1_ALLOW_FID_LEVEL_MASK 0x3ff + +#define RS690_MC_INDEX 0x78 +# define RS690_MC_INDEX_MASK 0x1ff +# define RS690_MC_INDEX_WR_EN (1 << 9) +# define RS690_MC_INDEX_WR_ACK 0x7f +#define RS690_MC_DATA 0x7c + +#define RS690_MC_FB_LOCATION 0x100 +#define RS690_MC_AGP_LOCATION 0x101 +#define RS690_MC_AGP_BASE 0x102 +#define RS690_MC_AGP_BASE_2 0x103 +#define RS690_MC_INIT_MISC_LAT_TIMER 0x104 +#define RS690_MC_STATUS 0x90 +#define RS690_MC_STATUS_IDLE (1 << 0) + +#define RS600_MC_INDEX 0x78 +# define RS600_MC_INDEX_MASK 0xff +# define RS600_MC_INDEX_WR_EN (1 << 8) +# define RS600_MC_INDEX_WR_ACK 0xff +#define RS600_MC_DATA 0x7c + +#define RS600_MC_FB_LOCATION 0xA +#define RS600_MC_STATUS 0x0 +#define RS600_MC_STATUS_IDLE (1 << 0) + +#define AVIVO_MC_INDEX 0x0070 +#define R520_MC_STATUS 0x00 +# define R520_MC_STATUS_IDLE (1 << 1) +#define RV515_MC_STATUS 0x08 +# define RV515_MC_STATUS_IDLE (1 << 4) +#define RV515_MC_INIT_MISC_LAT_TIMER 0x09 +#define AVIVO_MC_DATA 0x0074 + +#define RV515_MC_FB_LOCATION 0x1 +#define RV515_MC_AGP_LOCATION 0x2 +#define RV515_MC_AGP_BASE 0x3 +#define RV515_MC_AGP_BASE_2 0x4 +#define RV515_MC_CNTL 0x5 +# define RV515_MEM_NUM_CHANNELS_MASK 0x3 +#define R520_MC_FB_LOCATION 0x4 +#define R520_MC_AGP_LOCATION 0x5 +#define R520_MC_AGP_BASE 0x6 +#define R520_MC_AGP_BASE_2 0x7 +#define R520_MC_CNTL0 0x8 +# define R520_MEM_NUM_CHANNELS_MASK (0x3 << 24) +# define R520_MEM_NUM_CHANNELS_SHIFT 24 +# define R520_MC_CHANNEL_SIZE (1 << 23) + +#define R600_RAMCFG 0x2408 +# define R600_CHANSIZE (1 << 7) +# define R600_CHANSIZE_OVERRIDE (1 << 10) + +#define AVIVO_HDP_FB_LOCATION 0x134 + +#define AVIVO_VGA_RENDER_CONTROL 0x0300 +# define AVIVO_VGA_VSTATUS_CNTL_MASK (3 << 16) +#define AVIVO_D1VGA_CONTROL 0x0330 +# define AVIVO_DVGA_CONTROL_MODE_ENABLE (1<<0) +# define AVIVO_DVGA_CONTROL_TIMING_SELECT (1<<8) +# define AVIVO_DVGA_CONTROL_SYNC_POLARITY_SELECT (1<<9) +# define AVIVO_DVGA_CONTROL_OVERSCAN_TIMING_SELECT (1<<10) +# define AVIVO_DVGA_CONTROL_OVERSCAN_COLOR_EN (1<<16) +# define AVIVO_DVGA_CONTROL_ROTATE (1<<24) +#define AVIVO_D2VGA_CONTROL 0x0338 + +#define AVIVO_EXT1_PPLL_REF_DIV_SRC 0x400 +#define AVIVO_EXT1_PPLL_REF_DIV 0x404 +#define AVIVO_EXT1_PPLL_UPDATE_LOCK 0x408 +#define AVIVO_EXT1_PPLL_UPDATE_CNTL 0x40c + +#define AVIVO_EXT2_PPLL_REF_DIV_SRC 0x410 +#define AVIVO_EXT2_PPLL_REF_DIV 0x414 +#define AVIVO_EXT2_PPLL_UPDATE_LOCK 0x418 +#define AVIVO_EXT2_PPLL_UPDATE_CNTL 0x41c + +#define AVIVO_EXT1_PPLL_FB_DIV 0x430 +#define AVIVO_EXT2_PPLL_FB_DIV 0x434 + +#define AVIVO_EXT1_PPLL_POST_DIV_SRC 0x438 +#define AVIVO_EXT1_PPLL_POST_DIV 0x43c + +#define AVIVO_EXT2_PPLL_POST_DIV_SRC 0x440 +#define AVIVO_EXT2_PPLL_POST_DIV 0x444 + +#define AVIVO_EXT1_PPLL_CNTL 0x448 +#define AVIVO_EXT2_PPLL_CNTL 0x44c + +#define AVIVO_P1PLL_CNTL 0x450 +#define AVIVO_P2PLL_CNTL 0x454 +#define AVIVO_P1PLL_INT_SS_CNTL 0x458 +#define AVIVO_P2PLL_INT_SS_CNTL 0x45c +#define AVIVO_P1PLL_TMDSA_CNTL 0x460 +#define AVIVO_P2PLL_LVTMA_CNTL 0x464 + +#define AVIVO_PCLK_CRTC1_CNTL 0x480 +#define AVIVO_PCLK_CRTC2_CNTL 0x484 + +#define AVIVO_D1CRTC_H_TOTAL 0x6000 +#define AVIVO_D1CRTC_H_BLANK_START_END 0x6004 +#define AVIVO_D1CRTC_H_SYNC_A 0x6008 +#define AVIVO_D1CRTC_H_SYNC_A_CNTL 0x600c +#define AVIVO_D1CRTC_H_SYNC_B 0x6010 +#define AVIVO_D1CRTC_H_SYNC_B_CNTL 0x6014 + +#define AVIVO_D1CRTC_V_TOTAL 0x6020 +#define AVIVO_D1CRTC_V_BLANK_START_END 0x6024 +#define AVIVO_D1CRTC_V_SYNC_A 0x6028 +#define AVIVO_D1CRTC_V_SYNC_A_CNTL 0x602c +#define AVIVO_D1CRTC_V_SYNC_B 0x6030 +#define AVIVO_D1CRTC_V_SYNC_B_CNTL 0x6034 + +#define AVIVO_D1CRTC_CONTROL 0x6080 +# define AVIVO_CRTC_EN (1<<0) +#define AVIVO_D1CRTC_BLANK_CONTROL 0x6084 +#define AVIVO_D1CRTC_INTERLACE_CONTROL 0x6088 +#define AVIVO_D1CRTC_INTERLACE_STATUS 0x608c +#define AVIVO_D1CRTC_STEREO_CONTROL 0x60c4 + +/* master controls */ +#define AVIVO_DC_CRTC_MASTER_EN 0x60f8 +#define AVIVO_DC_CRTC_TV_CONTROL 0x60fc + +#define AVIVO_D1GRPH_ENABLE 0x6100 +#define AVIVO_D1GRPH_CONTROL 0x6104 +# define AVIVO_D1GRPH_CONTROL_DEPTH_8BPP (0<<0) +# define AVIVO_D1GRPH_CONTROL_DEPTH_16BPP (1<<0) +# define AVIVO_D1GRPH_CONTROL_DEPTH_32BPP (2<<0) +# define AVIVO_D1GRPH_CONTROL_DEPTH_64BPP (3<<0) + +# define AVIVO_D1GRPH_CONTROL_8BPP_INDEXED (0<<8) + +# define AVIVO_D1GRPH_CONTROL_16BPP_ARGB1555 (0<<8) +# define AVIVO_D1GRPH_CONTROL_16BPP_RGB565 (1<<8) +# define AVIVO_D1GRPH_CONTROL_16BPP_ARGB4444 (2<<8) +# define AVIVO_D1GRPH_CONTROL_16BPP_AI88 (3<<8) +# define AVIVO_D1GRPH_CONTROL_16BPP_MONO16 (4<<8) + +# define AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888 (0<<8) +# define AVIVO_D1GRPH_CONTROL_32BPP_ARGB2101010 (1<<8) +# define AVIVO_D1GRPH_CONTROL_32BPP_DIGITAL (2<<8) +# define AVIVO_D1GRPH_CONTROL_32BPP_8B_ARGB2101010 (3<<8) + + +# define AVIVO_D1GRPH_CONTROL_64BPP_ARGB16161616 (0<<8) + +# define AVIVO_D1GRPH_SWAP_RB (1<<16) +# define AVIVO_D1GRPH_TILED (1<<20) +# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1<<21) + +#define AVIVO_D1GRPH_LUT_SEL 0x6108 +#define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 +#define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 +#define AVIVO_D1GRPH_PITCH 0x6120 +#define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124 +#define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128 +#define AVIVO_D1GRPH_X_START 0x612c +#define AVIVO_D1GRPH_Y_START 0x6130 +#define AVIVO_D1GRPH_X_END 0x6134 +#define AVIVO_D1GRPH_Y_END 0x6138 +#define AVIVO_D1GRPH_UPDATE 0x6144 +# define AVIVO_D1GRPH_UPDATE_LOCK (1<<16) +#define AVIVO_D1GRPH_FLIP_CONTROL 0x6148 + +#define AVIVO_D1CUR_CONTROL 0x6400 +# define AVIVO_D1CURSOR_EN (1<<0) +# define AVIVO_D1CURSOR_MODE_SHIFT 8 +# define AVIVO_D1CURSOR_MODE_MASK (0x3<<8) +# define AVIVO_D1CURSOR_MODE_24BPP (0x2) +#define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408 +#define AVIVO_D1CUR_SIZE 0x6410 +#define AVIVO_D1CUR_POSITION 0x6414 +#define AVIVO_D1CUR_HOT_SPOT 0x6418 +#define AVIVO_D1CUR_UPDATE 0x6424 +# define AVIVO_D1CURSOR_UPDATE_LOCK (1 << 16) + +#define AVIVO_DC_LUT_RW_SELECT 0x6480 +#define AVIVO_DC_LUT_RW_MODE 0x6484 +#define AVIVO_DC_LUT_RW_INDEX 0x6488 +#define AVIVO_DC_LUT_SEQ_COLOR 0x648c +#define AVIVO_DC_LUT_PWL_DATA 0x6490 +#define AVIVO_DC_LUT_30_COLOR 0x6494 +#define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498 +#define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c +#define AVIVO_DC_LUT_AUTOFILL 0x64a0 + +#define AVIVO_DC_LUTA_CONTROL 0x64c0 +#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4 +#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8 +#define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc +#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0 +#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4 +#define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8 + +#define AVIVO_DC_LB_MEMORY_SPLIT 0x6520 +# define AVIVO_DC_LB_MEMORY_SPLIT_MASK 0x3 +# define AVIVO_DC_LB_MEMORY_SPLIT_SHIFT 0 +# define AVIVO_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF 0 +# define AVIVO_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q 1 +# define AVIVO_DC_LB_MEMORY_SPLIT_D1_ONLY 2 +# define AVIVO_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q 3 +# define AVIVO_DC_LB_MEMORY_SPLIT_SHIFT_MODE (1 << 2) +# define AVIVO_DC_LB_DISP1_END_ADR_SHIFT 4 +# define AVIVO_DC_LB_DISP1_END_ADR_MASK 0x7ff + +#define AVIVO_D1MODE_DATA_FORMAT 0x6528 +# define AVIVO_D1MODE_INTERLEAVE_EN (1 << 0) +#define AVIVO_D1MODE_DESKTOP_HEIGHT 0x652c +#define AVIVO_D1MODE_VIEWPORT_START 0x6580 +#define AVIVO_D1MODE_VIEWPORT_SIZE 0x6584 +#define AVIVO_D1MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6588 +#define AVIVO_D1MODE_EXT_OVERSCAN_TOP_BOTTOM 0x658c + +#define AVIVO_D1SCL_SCALER_ENABLE 0x6590 +#define AVIVO_D1SCL_SCALER_TAP_CONTROL 0x6594 +#define AVIVO_D1SCL_UPDATE 0x65cc +# define AVIVO_D1SCL_UPDATE_LOCK (1<<16) + +/* second crtc */ +#define AVIVO_D2CRTC_H_TOTAL 0x6800 +#define AVIVO_D2CRTC_H_BLANK_START_END 0x6804 +#define AVIVO_D2CRTC_H_SYNC_A 0x6808 +#define AVIVO_D2CRTC_H_SYNC_A_CNTL 0x680c +#define AVIVO_D2CRTC_H_SYNC_B 0x6810 +#define AVIVO_D2CRTC_H_SYNC_B_CNTL 0x6814 + +#define AVIVO_D2CRTC_V_TOTAL 0x6820 +#define AVIVO_D2CRTC_V_BLANK_START_END 0x6824 +#define AVIVO_D2CRTC_V_SYNC_A 0x6828 +#define AVIVO_D2CRTC_V_SYNC_A_CNTL 0x682c +#define AVIVO_D2CRTC_V_SYNC_B 0x6830 +#define AVIVO_D2CRTC_V_SYNC_B_CNTL 0x6834 + +#define AVIVO_D2CRTC_CONTROL 0x6880 +#define AVIVO_D2CRTC_BLANK_CONTROL 0x6884 +#define AVIVO_D2CRTC_INTERLACE_CONTROL 0x6888 +#define AVIVO_D2CRTC_INTERLACE_STATUS 0x688c +#define AVIVO_D2CRTC_STEREO_CONTROL 0x68c4 + +#define AVIVO_D2GRPH_ENABLE 0x6900 +#define AVIVO_D2GRPH_CONTROL 0x6904 +#define AVIVO_D2GRPH_LUT_SEL 0x6908 +#define AVIVO_D2GRPH_PRIMARY_SURFACE_ADDRESS 0x6910 +#define AVIVO_D2GRPH_SECONDARY_SURFACE_ADDRESS 0x6918 +#define AVIVO_D2GRPH_PITCH 0x6920 +#define AVIVO_D2GRPH_SURFACE_OFFSET_X 0x6924 +#define AVIVO_D2GRPH_SURFACE_OFFSET_Y 0x6928 +#define AVIVO_D2GRPH_X_START 0x692c +#define AVIVO_D2GRPH_Y_START 0x6930 +#define AVIVO_D2GRPH_X_END 0x6934 +#define AVIVO_D2GRPH_Y_END 0x6938 +#define AVIVO_D2GRPH_UPDATE 0x6944 +#define AVIVO_D2GRPH_FLIP_CONTROL 0x6948 + +#define AVIVO_D2CUR_CONTROL 0x6c00 +#define AVIVO_D2CUR_SURFACE_ADDRESS 0x6c08 +#define AVIVO_D2CUR_SIZE 0x6c10 +#define AVIVO_D2CUR_POSITION 0x6c14 + +#define AVIVO_D2MODE_DATA_FORMAT 0x6d28 +#define AVIVO_D2MODE_DESKTOP_HEIGHT 0x6d2c +#define AVIVO_D2MODE_VIEWPORT_START 0x6d80 +#define AVIVO_D2MODE_VIEWPORT_SIZE 0x6d84 +#define AVIVO_D2MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6d88 +#define AVIVO_D2MODE_EXT_OVERSCAN_TOP_BOTTOM 0x6d8c + +#define AVIVO_D2SCL_SCALER_ENABLE 0x6d90 +#define AVIVO_D2SCL_SCALER_TAP_CONTROL 0x6d94 +#define AVIVO_D2SCL_UPDATE 0x6dcc + +#define AVIVO_DDIA_BIT_DEPTH_CONTROL 0x7214 + +#define AVIVO_DACA_ENABLE 0x7800 +# define AVIVO_DAC_ENABLE (1 << 0) +#define AVIVO_DACA_SOURCE_SELECT 0x7804 +# define AVIVO_DAC_SOURCE_CRTC1 (0 << 0) +# define AVIVO_DAC_SOURCE_CRTC2 (1 << 0) +# define AVIVO_DAC_SOURCE_TV (2 << 0) + +#define AVIVO_DACA_FORCE_OUTPUT_CNTL 0x783c +# define AVIVO_DACA_FORCE_OUTPUT_CNTL_FORCE_DATA_EN (1 << 0) +# define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_SHIFT (8) +# define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_BLUE (1 << 0) +# define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_GREEN (1 << 1) +# define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_RED (1 << 2) +# define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_ON_BLANKB_ONLY (1 << 24) +#define AVIVO_DACA_POWERDOWN 0x7850 +# define AVIVO_DACA_POWERDOWN_POWERDOWN (1 << 0) +# define AVIVO_DACA_POWERDOWN_BLUE (1 << 8) +# define AVIVO_DACA_POWERDOWN_GREEN (1 << 16) +# define AVIVO_DACA_POWERDOWN_RED (1 << 24) + +#define AVIVO_DACB_ENABLE 0x7a00 +#define AVIVO_DACB_SOURCE_SELECT 0x7a04 +#define AVIVO_DACB_FORCE_OUTPUT_CNTL 0x7a3c +# define AVIVO_DACB_FORCE_OUTPUT_CNTL_FORCE_DATA_EN (1 << 0) +# define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_SHIFT (8) +# define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_BLUE (1 << 0) +# define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_GREEN (1 << 1) +# define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_RED (1 << 2) +# define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_ON_BLANKB_ONLY (1 << 24) +#define AVIVO_DACB_POWERDOWN 0x7a50 +# define AVIVO_DACB_POWERDOWN_POWERDOWN (1 << 0) +# define AVIVO_DACB_POWERDOWN_BLUE (1 << 8) +# define AVIVO_DACB_POWERDOWN_GREEN (1 << 16) +# define AVIVO_DACB_POWERDOWN_RED + +#define AVIVO_TMDSA_CNTL 0x7880 +# define AVIVO_TMDSA_CNTL_ENABLE (1 << 0) +# define AVIVO_TMDSA_CNTL_HPD_MASK (1 << 4) +# define AVIVO_TMDSA_CNTL_HPD_SELECT (1 << 8) +# define AVIVO_TMDSA_CNTL_SYNC_PHASE (1 << 12) +# define AVIVO_TMDSA_CNTL_PIXEL_ENCODING (1 << 16) +# define AVIVO_TMDSA_CNTL_DUAL_LINK_ENABLE (1 << 24) +# define AVIVO_TMDSA_CNTL_SWAP (1 << 28) +#define AVIVO_TMDSA_SOURCE_SELECT 0x7884 +/* 78a8 appears to be some kind of (reasonably tolerant) clock? + * 78d0 definitely hits the transmitter, definitely clock. */ +/* MYSTERY1 This appears to control dithering? */ +#define AVIVO_TMDSA_BIT_DEPTH_CONTROL 0x7894 +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN (1 << 0) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH (1 << 4) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN (1 << 8) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH (1 << 12) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN (1 << 16) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH (1 << 20) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL (1 << 24) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET (1 << 26) +#define AVIVO_TMDSA_DCBALANCER_CONTROL 0x78d0 +# define AVIVO_TMDSA_DCBALANCER_CONTROL_EN (1 << 0) +# define AVIVO_TMDSA_DCBALANCER_CONTROL_TEST_EN (1 << 8) +# define AVIVO_TMDSA_DCBALANCER_CONTROL_TEST_IN_SHIFT (16) +# define AVIVO_TMDSA_DCBALANCER_CONTROL_FORCE (1 << 24) +#define AVIVO_TMDSA_DATA_SYNCHRONIZATION 0x78d8 +# define AVIVO_TMDSA_DATA_SYNCHRONIZATION_DSYNSEL (1 << 0) +# define AVIVO_TMDSA_DATA_SYNCHRONIZATION_PFREQCHG (1 << 8) +#define AVIVO_TMDSA_CLOCK_ENABLE 0x7900 +#define AVIVO_TMDSA_TRANSMITTER_ENABLE 0x7904 +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX0_ENABLE (1 << 0) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKC0EN (1 << 1) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD00EN (1 << 2) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD01EN (1 << 3) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD02EN (1 << 4) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX1_ENABLE (1 << 8) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD10EN (1 << 10) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD11EN (1 << 11) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD12EN (1 << 12) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX_ENABLE_HPD_MASK (1 << 16) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKCEN_HPD_MASK (1 << 17) +# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKDEN_HPD_MASK (1 << 18) + +#define AVIVO_TMDSA_TRANSMITTER_CONTROL 0x7910 +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE (1 << 0) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET (1 << 1) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_HPD_MASK_SHIFT (2) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_IDSCKSEL (1 << 4) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_BGSLEEP (1 << 5) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_PWRUP_SEQ_EN (1 << 6) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TMCLK (1 << 8) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TMCLK_FROM_PADS (1 << 13) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TDCLK (1 << 14) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TDCLK_FROM_PADS (1 << 15) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_CLK_PATTERN_SHIFT (16) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_BYPASS_PLL (1 << 28) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_USE_CLK_DATA (1 << 29) +# define AVIVO_TMDSA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL (1 << 31) + +#define AVIVO_LVTMA_CNTL 0x7a80 +# define AVIVO_LVTMA_CNTL_ENABLE (1 << 0) +# define AVIVO_LVTMA_CNTL_HPD_MASK (1 << 4) +# define AVIVO_LVTMA_CNTL_HPD_SELECT (1 << 8) +# define AVIVO_LVTMA_CNTL_SYNC_PHASE (1 << 12) +# define AVIVO_LVTMA_CNTL_PIXEL_ENCODING (1 << 16) +# define AVIVO_LVTMA_CNTL_DUAL_LINK_ENABLE (1 << 24) +# define AVIVO_LVTMA_CNTL_SWAP (1 << 28) +#define AVIVO_LVTMA_SOURCE_SELECT 0x7a84 +#define AVIVO_LVTMA_COLOR_FORMAT 0x7a88 +#define AVIVO_LVTMA_BIT_DEPTH_CONTROL 0x7a94 +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_EN (1 << 0) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH (1 << 4) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN (1 << 8) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH (1 << 12) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN (1 << 16) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH (1 << 20) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL (1 << 24) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET (1 << 26) + + + +#define AVIVO_LVTMA_DCBALANCER_CONTROL 0x7ad0 +# define AVIVO_LVTMA_DCBALANCER_CONTROL_EN (1 << 0) +# define AVIVO_LVTMA_DCBALANCER_CONTROL_TEST_EN (1 << 8) +# define AVIVO_LVTMA_DCBALANCER_CONTROL_TEST_IN_SHIFT (16) +# define AVIVO_LVTMA_DCBALANCER_CONTROL_FORCE (1 << 24) + +#define AVIVO_LVTMA_DATA_SYNCHRONIZATION 0x78d8 +# define AVIVO_LVTMA_DATA_SYNCHRONIZATION_DSYNSEL (1 << 0) +# define AVIVO_LVTMA_DATA_SYNCHRONIZATION_PFREQCHG (1 << 8) +#define R500_LVTMA_CLOCK_ENABLE 0x7b00 +#define R600_LVTMA_CLOCK_ENABLE 0x7b04 + +#define R500_LVTMA_TRANSMITTER_ENABLE 0x7b04 +#define R600_LVTMA_TRANSMITTER_ENABLE 0x7b08 +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC0EN (1 << 1) +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD00EN (1 << 2) +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD01EN (1 << 3) +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD02EN (1 << 4) +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD03EN (1 << 5) +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC1EN (1 << 9) +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD10EN (1 << 10) +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD11EN (1 << 11) +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD12EN (1 << 12) +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKCEN_HPD_MASK (1 << 17) +# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKDEN_HPD_MASK (1 << 18) + +#define R500_LVTMA_TRANSMITTER_CONTROL 0x7b10 +#define R600_LVTMA_TRANSMITTER_CONTROL 0x7b14 +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_ENABLE (1 << 0) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_RESET (1 << 1) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_HPD_MASK_SHIFT (2) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_IDSCKSEL (1 << 4) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_BGSLEEP (1 << 5) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_PWRUP_SEQ_EN (1 << 6) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TMCLK (1 << 8) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TMCLK_FROM_PADS (1 << 13) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TDCLK (1 << 14) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TDCLK_FROM_PADS (1 << 15) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_CLK_PATTERN_SHIFT (16) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_BYPASS_PLL (1 << 28) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_USE_CLK_DATA (1 << 29) +# define AVIVO_LVTMA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL (1 << 31) + +#define R500_LVTMA_PWRSEQ_CNTL 0x7af0 +#define R600_LVTMA_PWRSEQ_CNTL 0x7af4 +# define AVIVO_LVTMA_PWRSEQ_EN (1 << 0) +# define AVIVO_LVTMA_PWRSEQ_PLL_ENABLE_MASK (1 << 2) +# define AVIVO_LVTMA_PWRSEQ_PLL_RESET_MASK (1 << 3) +# define AVIVO_LVTMA_PWRSEQ_TARGET_STATE (1 << 4) +# define AVIVO_LVTMA_SYNCEN (1 << 8) +# define AVIVO_LVTMA_SYNCEN_OVRD (1 << 9) +# define AVIVO_LVTMA_SYNCEN_POL (1 << 10) +# define AVIVO_LVTMA_DIGON (1 << 16) +# define AVIVO_LVTMA_DIGON_OVRD (1 << 17) +# define AVIVO_LVTMA_DIGON_POL (1 << 18) +# define AVIVO_LVTMA_BLON (1 << 24) +# define AVIVO_LVTMA_BLON_OVRD (1 << 25) +# define AVIVO_LVTMA_BLON_POL (1 << 26) + +#define R500_LVTMA_PWRSEQ_STATE 0x7af4 +#define R600_LVTMA_PWRSEQ_STATE 0x7af8 +# define AVIVO_LVTMA_PWRSEQ_STATE_TARGET_STATE_R (1 << 0) +# define AVIVO_LVTMA_PWRSEQ_STATE_DIGON (1 << 1) +# define AVIVO_LVTMA_PWRSEQ_STATE_SYNCEN (1 << 2) +# define AVIVO_LVTMA_PWRSEQ_STATE_BLON (1 << 3) +# define AVIVO_LVTMA_PWRSEQ_STATE_DONE (1 << 4) +# define AVIVO_LVTMA_PWRSEQ_STATE_STATUS_SHIFT (8) + +#define AVIVO_LVDS_BACKLIGHT_CNTL 0x7af8 +# define AVIVO_LVDS_BACKLIGHT_CNTL_EN (1 << 0) +# define AVIVO_LVDS_BACKLIGHT_LEVEL_MASK 0x0000ff00 +# define AVIVO_LVDS_BACKLIGHT_LEVEL_SHIFT 8 + +#define AVIVO_DVOA_BIT_DEPTH_CONTROL 0x7988 + +#define AVIVO_GPIO_0 0x7e30 +#define AVIVO_GPIO_1 0x7e40 +#define AVIVO_GPIO_2 0x7e50 +#define AVIVO_GPIO_3 0x7e60 + +#define AVIVO_DC_GPIO_HPD_Y 0x7e9c + +#define AVIVO_I2C_STATUS 0x7d30 +# define AVIVO_I2C_STATUS_DONE (1 << 0) +# define AVIVO_I2C_STATUS_NACK (1 << 1) +# define AVIVO_I2C_STATUS_HALT (1 << 2) +# define AVIVO_I2C_STATUS_GO (1 << 3) +# define AVIVO_I2C_STATUS_MASK 0x7 +/* If radeon_mm_i2c is to be believed, this is HALT, NACK, and maybe + * DONE? */ +# define AVIVO_I2C_STATUS_CMD_RESET 0x7 +# define AVIVO_I2C_STATUS_CMD_WAIT (1 << 3) +#define AVIVO_I2C_STOP 0x7d34 +#define AVIVO_I2C_START_CNTL 0x7d38 +# define AVIVO_I2C_START (1 << 8) +# define AVIVO_I2C_CONNECTOR0 (0 << 16) +# define AVIVO_I2C_CONNECTOR1 (1 << 16) +#define R520_I2C_START (1<<0) +#define R520_I2C_STOP (1<<1) +#define R520_I2C_RX (1<<2) +#define R520_I2C_EN (1<<8) +#define R520_I2C_DDC1 (0<<16) +#define R520_I2C_DDC2 (1<<16) +#define R520_I2C_DDC3 (2<<16) +#define R520_I2C_DDC_MASK (3<<16) +#define AVIVO_I2C_CONTROL2 0x7d3c +# define AVIVO_I2C_7D3C_SIZE_SHIFT 8 +# define AVIVO_I2C_7D3C_SIZE_MASK (0xf << 8) +#define AVIVO_I2C_CONTROL3 0x7d40 +/* Reading is done 4 bytes at a time: read the bottom 8 bits from + * 7d44, four times in a row. + * Writing is a little more complex. First write DATA with + * 0xnnnnnnzz, then 0xnnnnnnyy, where nnnnnn is some non-deterministic + * magic number, zz is, I think, the slave address, and yy is the byte + * you want to write. */ +#define AVIVO_I2C_DATA 0x7d44 +#define R520_I2C_ADDR_COUNT_MASK (0x7) +#define R520_I2C_DATA_COUNT_SHIFT (8) +#define R520_I2C_DATA_COUNT_MASK (0xF00) +#define AVIVO_I2C_CNTL 0x7d50 +# define AVIVO_I2C_EN (1 << 0) +# define AVIVO_I2C_RESET (1 << 8) + +#define R600_GENERAL_PWRMGT 0x618 +# define R600_OPEN_DRAIN_PADS (1 << 11) + +#define R600_LOWER_GPIO_ENABLE 0x710 +#define R600_CTXSW_VID_LOWER_GPIO_CNTL 0x718 +#define R600_HIGH_VID_LOWER_GPIO_CNTL 0x71c +#define R600_MEDIUM_VID_LOWER_GPIO_CNTL 0x720 +#define R600_LOW_VID_LOWER_GPIO_CNTL 0x724 + +#define R600_MC_VM_FB_LOCATION 0x2180 +#define R600_MC_VM_AGP_TOP 0x2184 +#define R600_MC_VM_AGP_BOT 0x2188 +#define R600_MC_VM_AGP_BASE 0x218c +#define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2190 +#define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2194 +#define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x2198 + +#define R700_MC_VM_FB_LOCATION 0x2024 + +#define R600_HDP_NONSURFACE_BASE 0x2c04 + +#define R600_BUS_CNTL 0x5420 +#define R600_CONFIG_CNTL 0x5424 +#define R600_CONFIG_MEMSIZE 0x5428 +#define R600_CONFIG_F0_BASE 0x542C +#define R600_CONFIG_APER_SIZE 0x5430 + +#define R600_ROM_CNTL 0x1600 +# define R600_SCK_OVERWRITE (1 << 1) +# define R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT 28 +# define R600_SCK_PRESCALE_CRYSTAL_CLK_MASK (0xf << 28) + +#define R600_BIOS_0_SCRATCH 0x1724 +#define R600_BIOS_1_SCRATCH 0x1728 +#define R600_BIOS_2_SCRATCH 0x172c +#define R600_BIOS_3_SCRATCH 0x1730 +#define R600_BIOS_4_SCRATCH 0x1734 +#define R600_BIOS_5_SCRATCH 0x1738 +#define R600_BIOS_6_SCRATCH 0x173c +#define R600_BIOS_7_SCRATCH 0x1740 + +#define R300_GB_TILE_CONFIG 0x4018 +# define R300_ENABLE_TILING (1 << 0) +# define R300_PIPE_COUNT_RV350 (0 << 1) +# define R300_PIPE_COUNT_R300 (3 << 1) +# define R300_PIPE_COUNT_R420_3P (6 << 1) +# define R300_PIPE_COUNT_R420 (7 << 1) +# define R300_TILE_SIZE_8 (0 << 4) +# define R300_TILE_SIZE_16 (1 << 4) +# define R300_TILE_SIZE_32 (2 << 4) +# define R300_SUBPIXEL_1_12 (0 << 16) +# define R300_SUBPIXEL_1_16 (1 << 16) +#define R300_GB_SELECT 0x401c +#define R300_GB_ENABLE 0x4008 +#define R300_GB_AA_CONFIG 0x4020 +#define R400_GB_PIPE_SELECT 0x402c +#define R300_GB_MSPOS0 0x4010 +# define R300_MS_X0_SHIFT 0 +# define R300_MS_Y0_SHIFT 4 +# define R300_MS_X1_SHIFT 8 +# define R300_MS_Y1_SHIFT 12 +# define R300_MS_X2_SHIFT 16 +# define R300_MS_Y2_SHIFT 20 +# define R300_MSBD0_Y_SHIFT 24 +# define R300_MSBD0_X_SHIFT 28 +#define R300_GB_MSPOS1 0x4014 +# define R300_MS_X3_SHIFT 0 +# define R300_MS_Y3_SHIFT 4 +# define R300_MS_X4_SHIFT 8 +# define R300_MS_Y4_SHIFT 12 +# define R300_MS_X5_SHIFT 16 +# define R300_MS_Y5_SHIFT 20 +# define R300_MSBD1_SHIFT 24 + +#define R300_GA_ENHANCE 0x4274 +# define R300_GA_DEADLOCK_CNTL (1 << 0) +# define R300_GA_FASTSYNC_CNTL (1 << 1) + +#define R300_GA_POLY_MODE 0x4288 +# define R300_FRONT_PTYPE_POINT (0 << 4) +# define R300_FRONT_PTYPE_LINE (1 << 4) +# define R300_FRONT_PTYPE_TRIANGE (2 << 4) +# define R300_BACK_PTYPE_POINT (0 << 7) +# define R300_BACK_PTYPE_LINE (1 << 7) +# define R300_BACK_PTYPE_TRIANGE (2 << 7) +#define R300_GA_ROUND_MODE 0x428c +# define R300_GEOMETRY_ROUND_TRUNC (0 << 0) +# define R300_GEOMETRY_ROUND_NEAREST (1 << 0) +# define R300_COLOR_ROUND_TRUNC (0 << 2) +# define R300_COLOR_ROUND_NEAREST (1 << 2) +#define R300_GA_COLOR_CONTROL 0x4278 +# define R300_RGB0_SHADING_SOLID (0 << 0) +# define R300_RGB0_SHADING_FLAT (1 << 0) +# define R300_RGB0_SHADING_GOURAUD (2 << 0) +# define R300_ALPHA0_SHADING_SOLID (0 << 2) +# define R300_ALPHA0_SHADING_FLAT (1 << 2) +# define R300_ALPHA0_SHADING_GOURAUD (2 << 2) +# define R300_RGB1_SHADING_SOLID (0 << 4) +# define R300_RGB1_SHADING_FLAT (1 << 4) +# define R300_RGB1_SHADING_GOURAUD (2 << 4) +# define R300_ALPHA1_SHADING_SOLID (0 << 6) +# define R300_ALPHA1_SHADING_FLAT (1 << 6) +# define R300_ALPHA1_SHADING_GOURAUD (2 << 6) +# define R300_RGB2_SHADING_SOLID (0 << 8) +# define R300_RGB2_SHADING_FLAT (1 << 8) +# define R300_RGB2_SHADING_GOURAUD (2 << 8) +# define R300_ALPHA2_SHADING_SOLID (0 << 10) +# define R300_ALPHA2_SHADING_FLAT (1 << 10) +# define R300_ALPHA2_SHADING_GOURAUD (2 << 10) +# define R300_RGB3_SHADING_SOLID (0 << 12) +# define R300_RGB3_SHADING_FLAT (1 << 12) +# define R300_RGB3_SHADING_GOURAUD (2 << 12) +# define R300_ALPHA3_SHADING_SOLID (0 << 14) +# define R300_ALPHA3_SHADING_FLAT (1 << 14) +# define R300_ALPHA3_SHADING_GOURAUD (2 << 14) +#define R300_GA_OFFSET 0x4290 + +#define R500_SU_REG_DEST 0x42c8 + +#define R300_VAP_CNTL_STATUS 0x2140 +# define R300_PVS_BYPASS (1 << 8) +#define R300_VAP_PVS_STATE_FLUSH_REG 0x2284 +#define R300_VAP_CNTL 0x2080 +# define R300_PVS_NUM_SLOTS_SHIFT 0 +# define R300_PVS_NUM_CNTLRS_SHIFT 4 +# define R300_PVS_NUM_FPUS_SHIFT 8 +# define R300_VF_MAX_VTX_NUM_SHIFT 18 +# define R300_GL_CLIP_SPACE_DEF (0 << 22) +# define R300_DX_CLIP_SPACE_DEF (1 << 22) +# define R500_TCL_STATE_OPTIMIZATION (1 << 23) +#define R300_VAP_VTE_CNTL 0x20B0 +# define R300_VPORT_X_SCALE_ENA (1 << 0) +# define R300_VPORT_X_OFFSET_ENA (1 << 1) +# define R300_VPORT_Y_SCALE_ENA (1 << 2) +# define R300_VPORT_Y_OFFSET_ENA (1 << 3) +# define R300_VPORT_Z_SCALE_ENA (1 << 4) +# define R300_VPORT_Z_OFFSET_ENA (1 << 5) +# define R300_VTX_XY_FMT (1 << 8) +# define R300_VTX_Z_FMT (1 << 9) +# define R300_VTX_W0_FMT (1 << 10) +#define R300_VAP_VTX_STATE_CNTL 0x2180 +#define R300_VAP_PSC_SGN_NORM_CNTL 0x21DC +#define R300_VAP_PROG_STREAM_CNTL_0 0x2150 +# define R300_DATA_TYPE_0_SHIFT 0 +# define R300_DATA_TYPE_FLOAT_1 0 +# define R300_DATA_TYPE_FLOAT_2 1 +# define R300_DATA_TYPE_FLOAT_3 2 +# define R300_DATA_TYPE_FLOAT_4 3 +# define R300_DATA_TYPE_BYTE 4 +# define R300_DATA_TYPE_D3DCOLOR 5 +# define R300_DATA_TYPE_SHORT_2 6 +# define R300_DATA_TYPE_SHORT_4 7 +# define R300_DATA_TYPE_VECTOR_3_TTT 8 +# define R300_DATA_TYPE_VECTOR_3_EET 9 +# define R300_SKIP_DWORDS_0_SHIFT 4 +# define R300_DST_VEC_LOC_0_SHIFT 8 +# define R300_LAST_VEC_0 (1 << 13) +# define R300_SIGNED_0 (1 << 14) +# define R300_NORMALIZE_0 (1 << 15) +# define R300_DATA_TYPE_1_SHIFT 16 +# define R300_SKIP_DWORDS_1_SHIFT 20 +# define R300_DST_VEC_LOC_1_SHIFT 24 +# define R300_LAST_VEC_1 (1 << 29) +# define R300_SIGNED_1 (1 << 30) +# define R300_NORMALIZE_1 (1 << 31) +#define R300_VAP_PROG_STREAM_CNTL_1 0x2154 +# define R300_DATA_TYPE_2_SHIFT 0 +# define R300_SKIP_DWORDS_2_SHIFT 4 +# define R300_DST_VEC_LOC_2_SHIFT 8 +# define R300_LAST_VEC_2 (1 << 13) +# define R300_SIGNED_2 (1 << 14) +# define R300_NORMALIZE_2 (1 << 15) +# define R300_DATA_TYPE_3_SHIFT 16 +# define R300_SKIP_DWORDS_3_SHIFT 20 +# define R300_DST_VEC_LOC_3_SHIFT 24 +# define R300_LAST_VEC_3 (1 << 29) +# define R300_SIGNED_3 (1 << 30) +# define R300_NORMALIZE_3 (1 << 31) +#define R300_VAP_PROG_STREAM_CNTL_EXT_0 0x21e0 +# define R300_SWIZZLE_SELECT_X_0_SHIFT 0 +# define R300_SWIZZLE_SELECT_Y_0_SHIFT 3 +# define R300_SWIZZLE_SELECT_Z_0_SHIFT 6 +# define R300_SWIZZLE_SELECT_W_0_SHIFT 9 +# define R300_SWIZZLE_SELECT_X 0 +# define R300_SWIZZLE_SELECT_Y 1 +# define R300_SWIZZLE_SELECT_Z 2 +# define R300_SWIZZLE_SELECT_W 3 +# define R300_SWIZZLE_SELECT_FP_ZERO 4 +# define R300_SWIZZLE_SELECT_FP_ONE 5 +# define R300_WRITE_ENA_0_SHIFT 12 +# define R300_WRITE_ENA_X 1 +# define R300_WRITE_ENA_Y 2 +# define R300_WRITE_ENA_Z 4 +# define R300_WRITE_ENA_W 8 +# define R300_SWIZZLE_SELECT_X_1_SHIFT 16 +# define R300_SWIZZLE_SELECT_Y_1_SHIFT 19 +# define R300_SWIZZLE_SELECT_Z_1_SHIFT 22 +# define R300_SWIZZLE_SELECT_W_1_SHIFT 25 +# define R300_WRITE_ENA_1_SHIFT 28 +#define R300_VAP_PROG_STREAM_CNTL_EXT_1 0x21e4 +# define R300_SWIZZLE_SELECT_X_2_SHIFT 0 +# define R300_SWIZZLE_SELECT_Y_2_SHIFT 3 +# define R300_SWIZZLE_SELECT_Z_2_SHIFT 6 +# define R300_SWIZZLE_SELECT_W_2_SHIFT 9 +# define R300_WRITE_ENA_2_SHIFT 12 +# define R300_SWIZZLE_SELECT_X_3_SHIFT 16 +# define R300_SWIZZLE_SELECT_Y_3_SHIFT 19 +# define R300_SWIZZLE_SELECT_Z_3_SHIFT 22 +# define R300_SWIZZLE_SELECT_W_3_SHIFT 25 +# define R300_WRITE_ENA_3_SHIFT 28 +#define R300_VAP_PVS_CODE_CNTL_0 0x22D0 +# define R300_PVS_FIRST_INST_SHIFT 0 +# define R300_PVS_XYZW_VALID_INST_SHIFT 10 +# define R300_PVS_LAST_INST_SHIFT 20 +#define R300_VAP_PVS_CODE_CNTL_1 0x22D8 +# define R300_PVS_LAST_VTX_SRC_INST_SHIFT 0 +#define R300_VAP_PVS_VECTOR_INDX_REG 0x2200 +#define R300_VAP_PVS_VECTOR_DATA_REG 0x2204 +/* PVS instructions */ +/* Opcode and dst instruction */ +#define R300_PVS_DST_OPCODE(x) (x << 0) +/* Vector ops */ +# define R300_VECTOR_NO_OP 0 +# define R300_VE_DOT_PRODUCT 1 +# define R300_VE_MULTIPLY 2 +# define R300_VE_ADD 3 +# define R300_VE_MULTIPLY_ADD 4 +# define R300_VE_DISTANCE_VECTOR 5 +# define R300_VE_FRACTION 6 +# define R300_VE_MAXIMUM 7 +# define R300_VE_MINIMUM 8 +# define R300_VE_SET_GREATER_THAN_EQUAL 9 +# define R300_VE_SET_LESS_THAN 10 +# define R300_VE_MULTIPLYX2_ADD 11 +# define R300_VE_MULTIPLY_CLAMP 12 +# define R300_VE_FLT2FIX_DX 13 +# define R300_VE_FLT2FIX_DX_RND 14 +/* R500 additions */ +# define R500_VE_PRED_SET_EQ_PUSH 15 +# define R500_VE_PRED_SET_GT_PUSH 16 +# define R500_VE_PRED_SET_GTE_PUSH 17 +# define R500_VE_PRED_SET_NEQ_PUSH 18 +# define R500_VE_COND_WRITE_EQ 19 +# define R500_VE_COND_WRITE_GT 20 +# define R500_VE_COND_WRITE_GTE 21 +# define R500_VE_COND_WRITE_NEQ 22 +# define R500_VE_COND_MUX_EQ 23 +# define R500_VE_COND_MUX_GT 24 +# define R500_VE_COND_MUX_GTE 25 +# define R500_VE_SET_GREATER_THAN 26 +# define R500_VE_SET_EQUAL 27 +# define R500_VE_SET_NOT_EQUAL 28 +/* Math ops */ +# define R300_MATH_NO_OP 0 +# define R300_ME_EXP_BASE2_DX 1 +# define R300_ME_LOG_BASE2_DX 2 +# define R300_ME_EXP_BASEE_FF 3 +# define R300_ME_LIGHT_COEFF_DX 4 +# define R300_ME_POWER_FUNC_FF 5 +# define R300_ME_RECIP_DX 6 +# define R300_ME_RECIP_FF 7 +# define R300_ME_RECIP_SQRT_DX 8 +# define R300_ME_RECIP_SQRT_FF 9 +# define R300_ME_MULTIPLY 10 +# define R300_ME_EXP_BASE2_FULL_DX 11 +# define R300_ME_LOG_BASE2_FULL_DX 12 +# define R300_ME_POWER_FUNC_FF_CLAMP_B 13 +# define R300_ME_POWER_FUNC_FF_CLAMP_B1 14 +# define R300_ME_POWER_FUNC_FF_CLAMP_01 15 +# define R300_ME_SIN 16 +# define R300_ME_COS 17 +/* R500 additions */ +# define R500_ME_LOG_BASE2_IEEE 18 +# define R500_ME_RECIP_IEEE 19 +# define R500_ME_RECIP_SQRT_IEEE 20 +# define R500_ME_PRED_SET_EQ 21 +# define R500_ME_PRED_SET_GT 22 +# define R500_ME_PRED_SET_GTE 23 +# define R500_ME_PRED_SET_NEQ 24 +# define R500_ME_PRED_SET_CLR 25 +# define R500_ME_PRED_SET_INV 26 +# define R500_ME_PRED_SET_POP 27 +# define R500_ME_PRED_SET_RESTORE 28 +/* macro */ +# define R300_PVS_MACRO_OP_2CLK_MADD 0 +# define R300_PVS_MACRO_OP_2CLK_M2X_ADD 1 +#define R300_PVS_DST_MATH_INST (1 << 6) +#define R300_PVS_DST_MACRO_INST (1 << 7) +#define R300_PVS_DST_REG_TYPE(x) (x << 8) +# define R300_PVS_DST_REG_TEMPORARY 0 +# define R300_PVS_DST_REG_A0 1 +# define R300_PVS_DST_REG_OUT 2 +# define R500_PVS_DST_REG_OUT_REPL_X 3 +# define R300_PVS_DST_REG_ALT_TEMPORARY 4 +# define R300_PVS_DST_REG_INPUT 5 +#define R300_PVS_DST_ADDR_MODE_1 (1 << 12) +#define R300_PVS_DST_OFFSET(x) (x << 13) +#define R300_PVS_DST_WE_X (1 << 20) +#define R300_PVS_DST_WE_Y (1 << 21) +#define R300_PVS_DST_WE_Z (1 << 22) +#define R300_PVS_DST_WE_W (1 << 23) +#define R300_PVS_DST_VE_SAT (1 << 24) +#define R300_PVS_DST_ME_SAT (1 << 25) +#define R300_PVS_DST_PRED_ENABLE (1 << 26) +#define R300_PVS_DST_PRED_SENSE (1 << 27) +#define R300_PVS_DST_DUAL_MATH_OP (1 << 28) +#define R300_PVS_DST_ADDR_SEL(x) (x << 29) +#define R300_PVS_DST_ADDR_MODE_0 (1 << 31) +/* src operand instruction */ +#define R300_PVS_SRC_REG_TYPE(x) (x << 0) +# define R300_PVS_SRC_REG_TEMPORARY 0 +# define R300_PVS_SRC_REG_INPUT 1 +# define R300_PVS_SRC_REG_CONSTANT 2 +# define R300_PVS_SRC_REG_ALT_TEMPORARY 3 +#define R300_SPARE_0 (1 << 2) +#define R300_PVS_SRC_ABS_XYZW (1 << 3) +#define R300_PVS_SRC_ADDR_MODE_0 (1 << 4) +#define R300_PVS_SRC_OFFSET(x) (x << 5) +#define R300_PVS_SRC_SWIZZLE_X(x) (x << 13) +#define R300_PVS_SRC_SWIZZLE_Y(x) (x << 16) +#define R300_PVS_SRC_SWIZZLE_Z(x) (x << 19) +#define R300_PVS_SRC_SWIZZLE_W(x) (x << 22) +# define R300_PVS_SRC_SELECT_X 0 +# define R300_PVS_SRC_SELECT_Y 1 +# define R300_PVS_SRC_SELECT_Z 2 +# define R300_PVS_SRC_SELECT_W 3 +# define R300_PVS_SRC_SELECT_FORCE_0 4 +# define R300_PVS_SRC_SELECT_FORCE_1 5 +#define R300_PVS_SRC_NEG_X (1 << 25) +#define R300_PVS_SRC_NEG_Y (1 << 26) +#define R300_PVS_SRC_NEG_Z (1 << 27) +#define R300_PVS_SRC_NEG_W (1 << 28) +#define R300_PVS_SRC_ADDR_SEL(x) (x << 29) +#define R300_PVS_SRC_ADDR_MODE_1 (1 << 31) + +#define R300_VAP_PVS_FLOW_CNTL_OPC 0x22dc +#define R300_VAP_OUT_VTX_FMT_0 0x2090 +# define R300_VTX_POS_PRESENT (1 << 0) +# define R300_VTX_COLOR_0_PRESENT (1 << 1) +# define R300_VTX_COLOR_1_PRESENT (1 << 2) +# define R300_VTX_COLOR_2_PRESENT (1 << 3) +# define R300_VTX_COLOR_3_PRESENT (1 << 4) +# define R300_VTX_PT_SIZE_PRESENT (1 << 16) +#define R300_VAP_OUT_VTX_FMT_1 0x2094 +# define R300_TEX_0_COMP_CNT_SHIFT 0 +# define R300_TEX_1_COMP_CNT_SHIFT 3 +# define R300_TEX_2_COMP_CNT_SHIFT 6 +# define R300_TEX_3_COMP_CNT_SHIFT 9 +# define R300_TEX_4_COMP_CNT_SHIFT 12 +# define R300_TEX_5_COMP_CNT_SHIFT 15 +# define R300_TEX_6_COMP_CNT_SHIFT 18 +# define R300_TEX_7_COMP_CNT_SHIFT 21 +#define R300_VAP_VTX_SIZE 0x20b4 +#define R300_VAP_GB_VERT_CLIP_ADJ 0x2220 +#define R300_VAP_GB_VERT_DISC_ADJ 0x2224 +#define R300_VAP_GB_HORZ_CLIP_ADJ 0x2228 +#define R300_VAP_GB_HORZ_DISC_ADJ 0x222c +#define R300_VAP_CLIP_CNTL 0x221c +# define R300_UCP_ENA_0 (1 << 0) +# define R300_UCP_ENA_1 (1 << 1) +# define R300_UCP_ENA_2 (1 << 2) +# define R300_UCP_ENA_3 (1 << 3) +# define R300_UCP_ENA_4 (1 << 4) +# define R300_UCP_ENA_5 (1 << 5) +# define R300_PS_UCP_MODE_SHIFT 14 +# define R300_CLIP_DISABLE (1 << 16) +# define R300_UCP_CULL_ONLY_ENA (1 << 17) +# define R300_BOUNDARY_EDGE_FLAG_ENA (1 << 18) +#define R300_VAP_PVS_STATE_FLUSH_REG 0x2284 + +#define R500_VAP_INDEX_OFFSET 0x208c + +#define R300_SU_TEX_WRAP 0x42a0 +#define R300_SU_POLY_OFFSET_ENABLE 0x42b4 +#define R300_SU_CULL_MODE 0x42b8 +# define R300_CULL_FRONT (1 << 0) +# define R300_CULL_BACK (1 << 1) +# define R300_FACE_POS (0 << 2) +# define R300_FACE_NEG (1 << 2) +#define R300_SU_DEPTH_SCALE 0x42c0 +#define R300_SU_DEPTH_OFFSET 0x42c4 + +#define R300_RS_COUNT 0x4300 +# define R300_RS_COUNT_IT_COUNT_SHIFT 0 +# define R300_RS_COUNT_IC_COUNT_SHIFT 7 +# define R300_RS_COUNT_HIRES_EN (1 << 18) + +#define R300_RS_IP_0 0x4310 +#define R300_RS_IP_1 0x4314 +# define R300_RS_TEX_PTR(x) (x << 0) +# define R300_RS_COL_PTR(x) (x << 6) +# define R300_RS_COL_FMT(x) (x << 9) +# define R300_RS_COL_FMT_RGBA 0 +# define R300_RS_COL_FMT_RGB0 2 +# define R300_RS_COL_FMT_RGB1 3 +# define R300_RS_COL_FMT_000A 4 +# define R300_RS_COL_FMT_0000 5 +# define R300_RS_COL_FMT_0001 6 +# define R300_RS_COL_FMT_111A 8 +# define R300_RS_COL_FMT_1110 9 +# define R300_RS_COL_FMT_1111 10 +# define R300_RS_SEL_S(x) (x << 13) +# define R300_RS_SEL_T(x) (x << 16) +# define R300_RS_SEL_R(x) (x << 19) +# define R300_RS_SEL_Q(x) (x << 22) +# define R300_RS_SEL_C0 0 +# define R300_RS_SEL_C1 1 +# define R300_RS_SEL_C2 2 +# define R300_RS_SEL_C3 3 +# define R300_RS_SEL_K0 4 +# define R300_RS_SEL_K1 5 +#define R300_RS_INST_COUNT 0x4304 +# define R300_INST_COUNT_RS(x) (x << 0) +# define R300_RS_W_EN (1 << 4) +# define R300_TX_OFFSET_RS(x) (x << 5) +#define R300_RS_INST_0 0x4330 +#define R300_RS_INST_1 0x4334 +# define R300_INST_TEX_ID(x) (x << 0) +# define R300_RS_INST_TEX_CN_WRITE (1 << 3) +# define R300_INST_TEX_ADDR(x) (x << 6) + +#define R300_TX_INVALTAGS 0x4100 +#define R300_TX_FILTER0_0 0x4400 +#define R300_TX_FILTER0_1 0x4404 +# define R300_TX_CLAMP_S(x) (x << 0) +# define R300_TX_CLAMP_T(x) (x << 3) +# define R300_TX_CLAMP_R(x) (x << 6) +# define R300_TX_CLAMP_WRAP 0 +# define R300_TX_CLAMP_MIRROR 1 +# define R300_TX_CLAMP_CLAMP_LAST 2 +# define R300_TX_CLAMP_MIRROR_CLAMP_LAST 3 +# define R300_TX_CLAMP_CLAMP_BORDER 4 +# define R300_TX_CLAMP_MIRROR_CLAMP_BORDER 5 +# define R300_TX_CLAMP_CLAMP_GL 6 +# define R300_TX_CLAMP_MIRROR_CLAMP_GL 7 +# define R300_TX_MAG_FILTER_NEAREST (1 << 9) +# define R300_TX_MIN_FILTER_NEAREST (1 << 11) +# define R300_TX_MAG_FILTER_LINEAR (2 << 9) +# define R300_TX_MIN_FILTER_LINEAR (2 << 11) +# define R300_TX_ID_SHIFT 28 +#define R300_TX_FILTER1_0 0x4440 +#define R300_TX_FILTER1_1 0x4444 +#define R300_TX_FORMAT0_0 0x4480 +#define R300_TX_FORMAT0_1 0x4484 +# define R300_TXWIDTH_SHIFT 0 +# define R300_TXHEIGHT_SHIFT 11 +# define R300_NUM_LEVELS_SHIFT 26 +# define R300_NUM_LEVELS_MASK 0x +# define R300_TXPROJECTED (1 << 30) +# define R300_TXPITCH_EN (1 << 31) +#define R300_TX_FORMAT1_0 0x44c0 +#define R300_TX_FORMAT1_1 0x44c4 +# define R300_TX_FORMAT_X8 0x0 +# define R300_TX_FORMAT_X16 0x1 +# define R300_TX_FORMAT_Y4X4 0x2 +# define R300_TX_FORMAT_Y8X8 0x3 +# define R300_TX_FORMAT_Y16X16 0x4 +# define R300_TX_FORMAT_Z3Y3X2 0x5 +# define R300_TX_FORMAT_Z5Y6X5 0x6 +# define R300_TX_FORMAT_Z6Y5X5 0x7 +# define R300_TX_FORMAT_Z11Y11X10 0x8 +# define R300_TX_FORMAT_Z10Y11X11 0x9 +# define R300_TX_FORMAT_W4Z4Y4X4 0xA +# define R300_TX_FORMAT_W1Z5Y5X5 0xB +# define R300_TX_FORMAT_W8Z8Y8X8 0xC +# define R300_TX_FORMAT_W2Z10Y10X10 0xD +# define R300_TX_FORMAT_W16Z16Y16X16 0xE +# define R300_TX_FORMAT_DXT1 0xF +# define R300_TX_FORMAT_DXT3 0x10 +# define R300_TX_FORMAT_DXT5 0x11 +# define R300_TX_FORMAT_D3DMFT_CxV8U8 0x12 /* no swizzle */ +# define R300_TX_FORMAT_A8R8G8B8 0x13 /* no swizzle */ +# define R300_TX_FORMAT_B8G8_B8G8 0x14 /* no swizzle */ +# define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */ +# define R300_TX_FORMAT_VYUY422 0x14 /* no swizzle */ +# define R300_TX_FORMAT_YVYU422 0x15 /* no swizzle */ +# define R300_TX_FORMAT_X24_Y8 0x1e +# define R300_TX_FORMAT_X32 0x1e + /* Floating point formats */ + /* Note - hardware supports both 16 and 32 bit floating point */ +# define R300_TX_FORMAT_FL_I16 0x18 +# define R300_TX_FORMAT_FL_I16A16 0x19 +# define R300_TX_FORMAT_FL_R16G16B16A16 0x1A +# define R300_TX_FORMAT_FL_I32 0x1B +# define R300_TX_FORMAT_FL_I32A32 0x1C +# define R300_TX_FORMAT_FL_R32G32B32A32 0x1D + /* alpha modes, convenience mostly */ + /* if you have alpha, pick constant appropriate to the + number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */ +# define R300_TX_FORMAT_ALPHA_1CH 0x000 +# define R300_TX_FORMAT_ALPHA_2CH 0x200 +# define R300_TX_FORMAT_ALPHA_4CH 0x600 +# define R300_TX_FORMAT_ALPHA_NONE 0xA00 + /* Swizzling */ + /* constants */ +# define R300_TX_FORMAT_X 0 +# define R300_TX_FORMAT_Y 1 +# define R300_TX_FORMAT_Z 2 +# define R300_TX_FORMAT_W 3 +# define R300_TX_FORMAT_ZERO 4 +# define R300_TX_FORMAT_ONE 5 + /* 2.0*Z, everything above 1.0 is set to 0.0 */ +# define R300_TX_FORMAT_CUT_Z 6 + /* 2.0*W, everything above 1.0 is set to 0.0 */ +# define R300_TX_FORMAT_CUT_W 7 + +# define R300_TX_FORMAT_B_SHIFT 18 +# define R300_TX_FORMAT_G_SHIFT 15 +# define R300_TX_FORMAT_R_SHIFT 12 +# define R300_TX_FORMAT_A_SHIFT 9 + + /* Convenience macro to take care of layout and swizzling */ +# define R300_EASY_TX_FORMAT(B, G, R, A, FMT) ( \ + ((R300_TX_FORMAT_##B)<pipe_winsys, + (struct amd_pipe_winsys*)amd_context->pipe_winsys); + } else { + pipe = amd_create_softpipe(amd_context); + } amd_context->st_context = st_create_context(pipe, visual, shared_st_context); driInitExtensions(amd_context->st_context->ctx, -- cgit v1.2.3 From e9b08e7373c00306bce398ea8d34f42e54f98c6d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 21:28:23 -0800 Subject: Make r300 and amd build in scons. --- SConstruct | 4 ++-- src/gallium/drivers/r300/SConscript | 17 +++++++++++++++++ src/gallium/drivers/r300/r300_blit.h | 1 + src/gallium/winsys/drm/amd/SConscript | 29 +++++++++++++++++++++++++++++ 4 files changed, 49 insertions(+), 2 deletions(-) create mode 100644 src/gallium/drivers/r300/SConscript create mode 100644 src/gallium/winsys/drm/amd/SConscript (limited to 'src/gallium/drivers/r300') diff --git a/SConstruct b/SConstruct index 88cdffa504..a22b9483da 100644 --- a/SConstruct +++ b/SConstruct @@ -46,9 +46,9 @@ common.AddOptions(opts) opts.Add(ListOption('statetrackers', 'state trackers to build', default_statetrackers, ['mesa', 'python'])) opts.Add(ListOption('drivers', 'pipe drivers to build', default_drivers, - ['softpipe', 'failover', 'i915simple', 'i965simple', 'cell', 'trace'])) + ['softpipe', 'failover', 'i915simple', 'i965simple', 'cell', 'trace', 'r300'])) opts.Add(ListOption('winsys', 'winsys drivers to build', default_winsys, - ['xlib', 'intel', 'gdi'])) + ['xlib', 'intel', 'gdi', 'amd'])) opts.Add(EnumOption('MSVS_VERSION', 'MS Visual C++ version', None, allowed_values=('7.1', '8.0', '9.0'))) diff --git a/src/gallium/drivers/r300/SConscript b/src/gallium/drivers/r300/SConscript new file mode 100644 index 0000000000..18684c3e7f --- /dev/null +++ b/src/gallium/drivers/r300/SConscript @@ -0,0 +1,17 @@ +Import('*') + +env = env.Clone() + +r300 = env.ConvenienceLibrary( + target = 'r300', + source = [ + 'r300_blit.c', + 'r300_clear.c', + 'r300_context.c', + 'r300_screen.c', + 'r300_state.c', + 'r300_surface.c', + ]) + +Export('r300') + diff --git a/src/gallium/drivers/r300/r300_blit.h b/src/gallium/drivers/r300/r300_blit.h index 09cb566b95..740cbcdea5 100644 --- a/src/gallium/drivers/r300/r300_blit.h +++ b/src/gallium/drivers/r300/r300_blit.h @@ -25,6 +25,7 @@ #include "pipe/p_state.h" +#include "r300_context.h" #include "r300_cs.h" /* Forward declarations. */ diff --git a/src/gallium/winsys/drm/amd/SConscript b/src/gallium/winsys/drm/amd/SConscript new file mode 100644 index 0000000000..a4856da23c --- /dev/null +++ b/src/gallium/winsys/drm/amd/SConscript @@ -0,0 +1,29 @@ +Import('*') + +if 'mesa' in env['statetrackers']: + + env = drienv.Clone() + + DRIVER_SOURCES = [ + 'amd_buffer.c', + 'amd_context.c', + 'amd_screen.c', + 'amd_winsys_softpipe.c', + ] + + sources = \ + COMMON_GALLIUM_SOURCES + \ + DRIVER_SOURCES + + drivers = [ + softpipe, + r300 + ] + + # TODO: write a wrapper function http://www.scons.org/wiki/WrapperFunctions + env.SharedLibrary( + target ='amd_dri.so', + source = sources, + LIBS = drivers + mesa + auxiliaries + env['LIBS'], + ) + -- cgit v1.2.3 From 4aaaecbfa6fa810899ef04de44f9f79ec4d8134f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 9 Jan 2009 21:50:56 -0800 Subject: A bit of r300 cleanup. --- src/gallium/drivers/r300/r300_context.c | 7 +------ src/gallium/drivers/r300/r300_context.h | 11 +++++++++-- src/gallium/drivers/r300/r300_surface.h | 2 -- src/gallium/winsys/drm/amd/amd_context.c | 6 ++++-- 4 files changed, 14 insertions(+), 12 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 68751dae17..4050faa74a 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -41,12 +41,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->winsys = amd_winsys; r300->context.winsys = winsys; - if (screen) { - r300->context.screen = screen; - } else { - /* XXX second arg should be pciid, find a way to get it from winsys */ - r300->context.screen = r300_create_screen(winsys, 0x0); - } + r300->context.screen = screen; r300->context.destroy = r300_destroy_context; diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index ae2dab13ff..8393198200 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -23,9 +23,9 @@ #ifndef R300_CONTEXT_H #define R300_CONTEXT_H +#include "draw/draw_context.h" #include "pipe/p_context.h" - -#include "r300_surface.h" +#include "util/u_memory.h" struct r300_context { /* Parent class */ @@ -47,4 +47,11 @@ static struct r300_context* r300_context(struct pipe_context* context) { return (struct r300_context*)context; } +/* Context initialization. */ +void r300_init_surface_functions(struct r300_context* r300); + +struct pipe_context* r300_create_context(struct pipe_screen* screen, + struct pipe_winsys* winsys, + struct amd_winsys* amd_winsys); + #endif /* R300_CONTEXT_H */ \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 29858eb541..0b2fd0b32b 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -31,6 +31,4 @@ #include "r300_blit.h" #include "r300_context.h" -void r300_init_surface_functions(struct r300_context* r300); - #endif /* R300_SURFACE_H */ diff --git a/src/gallium/winsys/drm/amd/amd_context.c b/src/gallium/winsys/drm/amd/amd_context.c index faca7d0c4b..5127cdf261 100644 --- a/src/gallium/winsys/drm/amd/amd_context.c +++ b/src/gallium/winsys/drm/amd/amd_context.c @@ -243,8 +243,10 @@ GLboolean amd_context_create(const __GLcontextModes *visual, } if (GL_TRUE) { - /* XXX "NULL" is a struct pipe_screen* just in case we ever need it... */ - pipe = r300_create_context(NULL, amd_context->pipe_winsys, + amd_context->pipe_screen = r300_create_screen(amd_context->pipe_winsys, + 0x0); + pipe = r300_create_context(amd_context->pipe_screen, + amd_context->pipe_winsys, (struct amd_pipe_winsys*)amd_context->pipe_winsys); } else { pipe = amd_create_softpipe(amd_context); -- cgit v1.2.3 From fbeeb6675733f5b2da36d40b0142dadf8cc953b4 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 12 Jan 2009 01:40:50 -0800 Subject: r300, amd: Make everything build. (Not necessarily work, mind you.) Lots of structural work, especially in getting the two parts to talk nicely. Todo: - Get damn blitter working. - Add CS flush. - Reverse order of above two items. --- configs/default | 2 +- src/gallium/drivers/r300/r300_blit.c | 2 +- src/gallium/drivers/r300/r300_context.c | 6 +-- src/gallium/drivers/r300/r300_context.h | 13 ++--- src/gallium/drivers/r300/r300_cs.h | 30 ++++++----- src/gallium/drivers/r300/r300_screen.c | 4 +- src/gallium/drivers/r300/r300_winsys.h | 87 ++++++++++++++++++++++++++++++++ src/gallium/winsys/drm/amd/Makefile | 6 ++- src/gallium/winsys/drm/amd/amd_context.c | 8 ++- src/gallium/winsys/drm/amd/amd_context.h | 2 + src/gallium/winsys/drm/amd/amd_r300.c | 55 ++++++++++++++++++++ src/gallium/winsys/drm/amd/amd_r300.h | 29 +++++++++++ 12 files changed, 208 insertions(+), 36 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_winsys.h create mode 100644 src/gallium/winsys/drm/amd/amd_r300.c create mode 100644 src/gallium/winsys/drm/amd/amd_r300.h (limited to 'src/gallium/drivers/r300') diff --git a/configs/default b/configs/default index 40f3a2a02d..333f0fe985 100644 --- a/configs/default +++ b/configs/default @@ -91,7 +91,7 @@ EGL_DRIVERS_DIRS = demo # Gallium directories and GALLIUM_AUXILIARY_DIRS = draw translate cso_cache pipebuffer tgsi sct rtasm util GALLIUM_AUXILIARIES = $(foreach DIR,$(GALLIUM_AUXILIARY_DIRS),$(TOP)/src/gallium/auxiliary/$(DIR)/lib$(DIR).a) -GALLIUM_DRIVER_DIRS = softpipe i915simple i965simple nv04 nv10 nv20 nv30 nv40 nv50 failover trace +GALLIUM_DRIVER_DIRS = softpipe i915simple i965simple nv04 nv10 nv20 nv30 nv40 nv50 failover r300 GALLIUM_DRIVERS = $(foreach DIR,$(GALLIUM_DRIVER_DIRS),$(TOP)/src/gallium/drivers/$(DIR)/lib$(DIR).a) GALLIUM_WINSYS_DIRS = xlib egl_xlib diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c index c404a667b1..b8ddf6677f 100644 --- a/src/gallium/drivers/r300/r300_blit.c +++ b/src/gallium/drivers/r300/r300_blit.c @@ -79,7 +79,7 @@ int r300_fill_blit(struct r300_context* r300, OUT_CS_REG(RADEON_DP_CNTL, RADEON_DST_X_LEFT_TO_RIGHT | RADEON_DST_Y_TOP_TO_BOTTOM); OUT_CS_REG(RADEON_DST_PITCH_OFFSET, 0x0); - /* XXX fix this shit -> OUT_RELOC(dst, 0, RADEON_GEM_DOMAIN_VRAM) */ + OUT_CS_RELOC(dst_buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* Do the actual paint. */ OUT_CS_REG(RADEON_DST_Y_X, (y << 16) | x); diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 4050faa74a..b9a9c2e21c 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -32,16 +32,16 @@ static void r300_destroy_context(struct pipe_context* context) { struct pipe_context* r300_create_context(struct pipe_screen* screen, struct pipe_winsys* winsys, - struct amd_winsys* amd_winsys) + struct r300_winsys* r300_winsys) { struct r300_context* r300 = CALLOC_STRUCT(r300_context); if (!r300) return NULL; - r300->winsys = amd_winsys; + r300->winsys = r300_winsys; r300->context.winsys = winsys; - r300->context.screen = screen; + r300->context.screen = r300_create_screen(winsys, 0x0); r300->context.destroy = r300_destroy_context; diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 8393198200..119d46af58 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -31,15 +31,10 @@ struct r300_context { /* Parent class */ struct pipe_context context; - struct amd_winsys* winsys; + /* The interface to the windowing system, etc. */ + struct r300_winsys* winsys; + /* Draw module. Used mostly for SW TCL. */ struct draw_context* draw; - - /* CS object. This is very much like Intel's batchbuffer. - * Fill it full of dwords and relocs and then submit. - * Repeat as needed. */ - /* Note: Unlike Mesa's version of this, we don't keep a copy of the CSM - * that was used to create this CS. Is this a good idea? */ - struct radeon_cs* cs; }; /* Convenience cast wrapper. */ @@ -52,6 +47,6 @@ void r300_init_surface_functions(struct r300_context* r300); struct pipe_context* r300_create_context(struct pipe_screen* screen, struct pipe_winsys* winsys, - struct amd_winsys* amd_winsys); + struct r300_winsys* r300_winsys); #endif /* R300_CONTEXT_H */ \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index ebd5324119..1422842e0c 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -23,48 +23,50 @@ #ifndef R300_CS_H #define R300_CS_H -#include "radeon_cs.h" #include "radeon_reg.h" +#include "r300_winsys.h" + /* Yes, I know macros are ugly. However, they are much prettier than the code * that they neatly hide away, and don't have the cost of function setup,so * we're going to use them. */ #define MAX_CS_SIZE 64 * 1024 / 4 +/* XXX stolen from radeon_drm.h */ +#define RADEON_GEM_DOMAIN_CPU 0x1 +#define RADEON_GEM_DOMAIN_GTT 0x2 +#define RADEON_GEM_DOMAIN_VRAM 0x4 + #define CP_PACKET0(register, count) \ (RADEON_CP_PACKET0 | ((count) << 16) | ((register) >> 2)) #define CS_LOCALS(context) \ - struct radeon_cs* cs = context->cs + struct r300_winsys* cs_winsys = context->winsys; \ + struct radeon_cs* cs = cs_winsys->cs -#define CHECK_CS(size) do { \ - if ((cs->cdw + (size) + 128) > MAX_CS_SIZE || radeon_cs_need_flush(cs)) { \ - /* XXX flush the CS */ \ - } } while (0) +#define CHECK_CS(size) \ + cs_winsys->check_cs(cs, (size)) -/* XXX radeon_cs_begin is currently unimplemented on the backend, but let's - * be future-proof, yeah? */ #define BEGIN_CS(size) do { \ CHECK_CS(size); \ - radeon_cs_begin(cs, (size), __FILE__, __FUNCTION__, __LINE__); \ + cs_winsys->begin_cs(cs, (size), __FILE__, __FUNCTION__, __LINE__); \ } while (0) #define OUT_CS(value) \ - radeon_cs_write_dword(cs, value) + cs_winsys->write_cs_dword(cs, value) #define OUT_CS_REG(register, value) do { \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); } while (0) #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ - radeon_cs_write_dword(cs, offset); \ - radeon_cs_write_reloc(cs, bo, rd, wd, flags); \ + OUT_CS(offset); \ + cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ } while (0) -/* XXX more future-proofing */ #define END_CS \ - radeon_cs_end(cs, __FILE__, __FUNCTION__, __LINE__) + cs_winsys->end_cs(cs, __FILE__, __FUNCTION__, __LINE__) #endif /* R300_CS_H */ \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 37a74b3c0a..dacde27888 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -144,13 +144,13 @@ struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, uint pci_id) if (!r300screen) return NULL; - /* XXX break this into its own function? */ + /* XXX break this into its own function? switch (pci_id) { default: debug_printf("%s: unknown PCI ID 0x%x, cannot create screen!\n", __FUNCTION__, pci_id); return NULL; - } + } */ r300screen->pci_id = pci_id; r300screen->screen.winsys = winsys; diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h new file mode 100644 index 0000000000..7048a9c88d --- /dev/null +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -0,0 +1,87 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_WINSYS_H +#define R300_WINSYS_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* The public interface header for the r300 pipe driver. + * Any winsys hosting this pipe needs to implement r300_winsys and then + * call r300_create_context to start things. */ + +#include "pipe/p_defines.h" +#include "pipe/p_state.h" + +struct radeon_cs; + +struct r300_winsys { + + /* CS object. This is very much like Intel's batchbuffer. + * Fill it full of dwords and relocs and then submit. + * Repeat as needed. */ + /* Note: Unlike Mesa's version of this, we don't keep a copy of the CSM + * that was used to create this CS. Is this a good idea? */ + /* Note: The pipe driver doesn't know how to use this. This is purely + * for the winsys. */ + struct radeon_cs* cs; + + /* Check to see if there's room for commands. */ + boolean (*check_cs)(struct radeon_cs* cs, int size); + + /* Start a command emit. */ + void (*begin_cs)(struct radeon_cs* cs, + int size, + const char* file, + const char* function, + int line); + + /* Write a dword to the command buffer. */ + /* XXX is this an okay name for this handle? */ + void (*write_cs_dword)(struct radeon_cs* cs, uint32_t dword); + + /* Write a relocated dword to the command buffer. */ + void (*write_cs_reloc)(struct radeon_cs* cs, + struct pipe_buffer* bo, + uint32_t rd, + uint32_t wd, + uint32_t flags); + + /* Finish a command emit. */ + void (*end_cs)(struct radeon_cs* cs, + const char* file, + const char* function, + int line); + +}; + +struct pipe_context* r300_create_context(struct pipe_screen* screen, + struct pipe_winsys* winsys, + struct r300_winsys* r300_winsys); + +#ifdef __cplusplus +} +#endif + +#endif /* R300_WINSYS_H */ \ No newline at end of file diff --git a/src/gallium/winsys/drm/amd/Makefile b/src/gallium/winsys/drm/amd/Makefile index 0f23e3446c..fb77873404 100644 --- a/src/gallium/winsys/drm/amd/Makefile +++ b/src/gallium/winsys/drm/amd/Makefile @@ -7,11 +7,13 @@ LIBNAME = amd_dri.so MINIGLX_SOURCES = PIPE_DRIVERS = \ - $(TOP)/src/gallium/drivers/softpipe/libsoftpipe.a + $(TOP)/src/gallium/drivers/softpipe/libsoftpipe.a \ + $(TOP)/src/gallium/drivers/r300/libr300.a DRIVER_SOURCES = \ amd_buffer.c \ amd_context.c \ + amd_r300.c \ amd_screen.c \ amd_winsys_softpipe.c @@ -21,6 +23,8 @@ C_SOURCES = \ ASM_SOURCES = +DRIVER_DEFINES = -I../../../drivers/r300 + include ../Makefile.template DRI_LIB_DEPS += -ldrm_radeon diff --git a/src/gallium/winsys/drm/amd/amd_context.c b/src/gallium/winsys/drm/amd/amd_context.c index 632caec6a7..7784964867 100644 --- a/src/gallium/winsys/drm/amd/amd_context.c +++ b/src/gallium/winsys/drm/amd/amd_context.c @@ -243,12 +243,10 @@ GLboolean amd_context_create(const __GLcontextModes *visual, } if (GL_TRUE) { - /* XXX second arg should be PCI ID, but damned if I know why */ - amd_context->pipe_screen = r300_create_screen(amd_context->pipe_winsys, - 0x0); - pipe = r300_create_context(amd_context->pipe_screen, + fprintf(stderr, "Creating r300 context..."); + pipe = r300_create_context(NULL, amd_context->pipe_winsys, - (struct amd_pipe_winsys*)amd_context->pipe_winsys); + amd_create_r300_winsys(amd_context->drm_fd)); } else { pipe = amd_create_softpipe(amd_context); } diff --git a/src/gallium/winsys/drm/amd/amd_context.h b/src/gallium/winsys/drm/amd/amd_context.h index 54a831f15a..12557c40c4 100644 --- a/src/gallium/winsys/drm/amd/amd_context.h +++ b/src/gallium/winsys/drm/amd/amd_context.h @@ -35,6 +35,8 @@ #include "state_tracker/st_context.h" #include "amd_screen.h" +#include "amd_r300.h" + struct amd_framebuffer { struct st_framebuffer *st_framebuffer; unsigned attachments; diff --git a/src/gallium/winsys/drm/amd/amd_r300.c b/src/gallium/winsys/drm/amd/amd_r300.c new file mode 100644 index 0000000000..0bc0a842c1 --- /dev/null +++ b/src/gallium/winsys/drm/amd/amd_r300.c @@ -0,0 +1,55 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "amd_r300.h" + +static boolean amd_r300_check_cs(struct radeon_cs* cs, int size) +{ + /* XXX check size here, lazy ass! */ + return TRUE; +} + +static void amd_r300_write_cs_reloc(struct radeon_cs* cs, + struct pipe_buffer* pbuffer, + uint32_t rd, + uint32_t wd, + uint32_t flags) +{ + radeon_cs_write_reloc(cs, ((struct amd_pipe_buffer*)pbuffer)->bo, rd, wd, flags); +} + +struct r300_winsys* amd_create_r300_winsys(int fd) +{ + struct r300_winsys* winsys = calloc(1, sizeof(struct r300_winsys)); + + struct radeon_cs_manager* csm = radeon_cs_manager_gem_ctor(fd); + + winsys->cs = radeon_cs_create(csm, 1024 * 64 / 4); + + winsys->check_cs = amd_r300_check_cs; + winsys->begin_cs = radeon_cs_begin; + winsys->write_cs_dword = radeon_cs_write_dword; + winsys->write_cs_reloc = amd_r300_write_cs_reloc; + winsys->end_cs = radeon_cs_end; + + return winsys; +} \ No newline at end of file diff --git a/src/gallium/winsys/drm/amd/amd_r300.h b/src/gallium/winsys/drm/amd/amd_r300.h new file mode 100644 index 0000000000..ef269454b3 --- /dev/null +++ b/src/gallium/winsys/drm/amd/amd_r300.h @@ -0,0 +1,29 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "radeon_cs.h" + +#include "r300_winsys.h" + +#include "amd_buffer.h" + +struct r300_winsys* amd_create_r300_winsys(int fd); -- cgit v1.2.3 From 432ab001d042b816b5892398064e5735d0293955 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 13 Jan 2009 15:21:29 -0800 Subject: r300, amd: Add the ability to flush the CS. This is probably important, yeah? --- src/gallium/drivers/r300/r300_cs.h | 3 +++ src/gallium/drivers/r300/r300_winsys.h | 2 ++ src/gallium/winsys/drm/amd/amd_r300.c | 9 ++++++++- 3 files changed, 13 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 1422842e0c..bd392afca3 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -69,4 +69,7 @@ #define END_CS \ cs_winsys->end_cs(cs, __FILE__, __FUNCTION__, __LINE__) +#define FLUSH_CS \ + cs_winsys->flush_cs(cs) + #endif /* R300_CS_H */ \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index 7048a9c88d..7711dc792d 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -74,6 +74,8 @@ struct r300_winsys { const char* function, int line); + /* Flush the CS. */ + void (*flush_cs)(struct radeon_cs* cs); }; struct pipe_context* r300_create_context(struct pipe_screen* screen, diff --git a/src/gallium/winsys/drm/amd/amd_r300.c b/src/gallium/winsys/drm/amd/amd_r300.c index 0bc0a842c1..0f543df9e1 100644 --- a/src/gallium/winsys/drm/amd/amd_r300.c +++ b/src/gallium/winsys/drm/amd/amd_r300.c @@ -37,6 +37,12 @@ static void amd_r300_write_cs_reloc(struct radeon_cs* cs, radeon_cs_write_reloc(cs, ((struct amd_pipe_buffer*)pbuffer)->bo, rd, wd, flags); } +static void amd_r300_flush_cs(struct radeon_cs* cs) +{ + radeon_cs_emit(cs); + radeon_cs_erase(cs); +} + struct r300_winsys* amd_create_r300_winsys(int fd) { struct r300_winsys* winsys = calloc(1, sizeof(struct r300_winsys)); @@ -50,6 +56,7 @@ struct r300_winsys* amd_create_r300_winsys(int fd) winsys->write_cs_dword = radeon_cs_write_dword; winsys->write_cs_reloc = amd_r300_write_cs_reloc; winsys->end_cs = radeon_cs_end; + winsys->flush_cs = amd_r300_flush_cs; return winsys; -} \ No newline at end of file +} -- cgit v1.2.3 From 74288078eab1971cc6ce3ae00fa55eb917b5826a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 13 Jan 2009 19:11:19 -0800 Subject: r300: Add blend state. Also switched to r300_reg instead of radeon_reg. Yay? --- src/gallium/drivers/r300/r300_blit.c | 4 +- src/gallium/drivers/r300/r300_context.h | 16 + src/gallium/drivers/r300/r300_cs.h | 3 +- src/gallium/drivers/r300/r300_reg.h | 3259 +++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_state.c | 121 ++ src/gallium/drivers/r300/r300_state.h | 2 + 6 files changed, 3401 insertions(+), 4 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_reg.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c index b8ddf6677f..6bcfbc0d79 100644 --- a/src/gallium/drivers/r300/r300_blit.c +++ b/src/gallium/drivers/r300/r300_blit.c @@ -35,7 +35,7 @@ int r300_fill_blit(struct r300_context* r300, { CS_LOCALS(r300); uint32_t dest_type; - +#if 0 /* Check for fallbacks. */ /* XXX we can do YUV surfaces, too, but only in 3D mode. Hmm... */ switch(cpp) { @@ -91,6 +91,6 @@ int r300_fill_blit(struct r300_context* r300, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE); END_CS; - +#endif return 1; } diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 119d46af58..b9fff0deab 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -27,6 +27,15 @@ #include "pipe/p_context.h" #include "util/u_memory.h" +struct r300_blend_state { + uint32_t blend_control; /* R300_RB3D_BLENDCNTL: 0x4e04 */ + uint32_t alpha_blend_control; /* R300_RB3D_ABLENDCNTL: 0x4e08 */ + uint32_t rop; /* R300_RB3D_ROPCNTL: 0x4e18 */ + uint32_t dither; /* R300_RB3D_DITHER_CTL: 0x4e50 */ +}; + +#define R300_NEW_BLEND 0x1 + struct r300_context { /* Parent class */ struct pipe_context context; @@ -35,6 +44,13 @@ struct r300_context { struct r300_winsys* winsys; /* Draw module. Used mostly for SW TCL. */ struct draw_context* draw; + + /* Various CSO state objects. */ + /* Blend state. */ + struct r300_blend_state* blend_state; + + /* Bitmask of dirty state objects. */ + uint32_t dirty_state; }; /* Convenience cast wrapper. */ diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index bd392afca3..92ed807657 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -23,8 +23,7 @@ #ifndef R300_CS_H #define R300_CS_H -#include "radeon_reg.h" - +#include "r300_reg.h" #include "r300_winsys.h" /* Yes, I know macros are ugly. However, they are much prettier than the code diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h new file mode 100644 index 0000000000..8b3fe431ab --- /dev/null +++ b/src/gallium/drivers/r300/r300_reg.h @@ -0,0 +1,3259 @@ +/************************************************************************** + +Copyright (C) 2004-2005 Nicolai Haehnle et al. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* *INDENT-OFF* */ + +#ifndef _R300_REG_H +#define _R300_REG_H + +#define R300_MC_INIT_MISC_LAT_TIMER 0x180 +# define R300_MC_MISC__MC_CPR_INIT_LAT_SHIFT 0 +# define R300_MC_MISC__MC_VF_INIT_LAT_SHIFT 4 +# define R300_MC_MISC__MC_DISP0R_INIT_LAT_SHIFT 8 +# define R300_MC_MISC__MC_DISP1R_INIT_LAT_SHIFT 12 +# define R300_MC_MISC__MC_FIXED_INIT_LAT_SHIFT 16 +# define R300_MC_MISC__MC_E2R_INIT_LAT_SHIFT 20 +# define R300_MC_MISC__MC_SAME_PAGE_PRIO_SHIFT 24 +# define R300_MC_MISC__MC_GLOBW_INIT_LAT_SHIFT 28 + + +#define R300_MC_INIT_GFX_LAT_TIMER 0x154 +# define R300_MC_MISC__MC_G3D0R_INIT_LAT_SHIFT 0 +# define R300_MC_MISC__MC_G3D1R_INIT_LAT_SHIFT 4 +# define R300_MC_MISC__MC_G3D2R_INIT_LAT_SHIFT 8 +# define R300_MC_MISC__MC_G3D3R_INIT_LAT_SHIFT 12 +# define R300_MC_MISC__MC_TX0R_INIT_LAT_SHIFT 16 +# define R300_MC_MISC__MC_TX1R_INIT_LAT_SHIFT 20 +# define R300_MC_MISC__MC_GLOBR_INIT_LAT_SHIFT 24 +# define R300_MC_MISC__MC_GLOBW_FULL_LAT_SHIFT 28 + +/* + * This file contains registers and constants for the R300. They have been + * found mostly by examining command buffers captured using glxtest, as well + * as by extrapolating some known registers and constants from the R200. + * I am fairly certain that they are correct unless stated otherwise + * in comments. + */ + +#define R300_SE_VPORT_XSCALE 0x1D98 +#define R300_SE_VPORT_XOFFSET 0x1D9C +#define R300_SE_VPORT_YSCALE 0x1DA0 +#define R300_SE_VPORT_YOFFSET 0x1DA4 +#define R300_SE_VPORT_ZSCALE 0x1DA8 +#define R300_SE_VPORT_ZOFFSET 0x1DAC + + +/* + * Vertex Array Processing (VAP) Control + */ +#define R300_VAP_CNTL 0x2080 +# define R300_PVS_NUM_SLOTS_SHIFT 0 +# define R300_PVS_NUM_CNTLRS_SHIFT 4 +# define R300_PVS_NUM_FPUS_SHIFT 8 +# define R300_VF_MAX_VTX_NUM_SHIFT 18 +# define R300_GL_CLIP_SPACE_DEF (0 << 22) +# define R300_DX_CLIP_SPACE_DEF (1 << 22) +# define R500_TCL_STATE_OPTIMIZATION (1 << 23) + +/* This register is written directly and also starts data section + * in many 3d CP_PACKET3's + */ +#define R300_VAP_VF_CNTL 0x2084 +# define R300_VAP_VF_CNTL__PRIM_TYPE__SHIFT 0 +# define R300_VAP_VF_CNTL__PRIM_NONE (0<<0) +# define R300_VAP_VF_CNTL__PRIM_POINTS (1<<0) +# define R300_VAP_VF_CNTL__PRIM_LINES (2<<0) +# define R300_VAP_VF_CNTL__PRIM_LINE_STRIP (3<<0) +# define R300_VAP_VF_CNTL__PRIM_TRIANGLES (4<<0) +# define R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN (5<<0) +# define R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP (6<<0) +# define R300_VAP_VF_CNTL__PRIM_LINE_LOOP (12<<0) +# define R300_VAP_VF_CNTL__PRIM_QUADS (13<<0) +# define R300_VAP_VF_CNTL__PRIM_QUAD_STRIP (14<<0) +# define R300_VAP_VF_CNTL__PRIM_POLYGON (15<<0) + +# define R300_VAP_VF_CNTL__PRIM_WALK__SHIFT 4 + /* State based - direct writes to registers trigger vertex + generation */ +# define R300_VAP_VF_CNTL__PRIM_WALK_STATE_BASED (0<<4) +# define R300_VAP_VF_CNTL__PRIM_WALK_INDICES (1<<4) +# define R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST (2<<4) +# define R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED (3<<4) + + /* I don't think I saw these three used.. */ +# define R300_VAP_VF_CNTL__COLOR_ORDER__SHIFT 6 +# define R300_VAP_VF_CNTL__TCL_OUTPUT_CTL_ENA__SHIFT 9 +# define R300_VAP_VF_CNTL__PROG_STREAM_ENA__SHIFT 10 + + /* index size - when not set the indices are assumed to be 16 bit */ +# define R300_VAP_VF_CNTL__INDEX_SIZE_32bit (1<<11) + /* number of vertices */ +# define R300_VAP_VF_CNTL__NUM_VERTICES__SHIFT 16 + +#define R500_VAP_INDEX_OFFSET 0x208c + +#define R300_VAP_OUTPUT_VTX_FMT_0 0x2090 +# define R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT (1<<0) +# define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT (1<<1) +# define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT (1<<2) +# define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT (1<<3) +# define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT (1<<4) +# define R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT (1<<16) + +#define R300_VAP_OUTPUT_VTX_FMT_1 0x2094 + /* each of the following is 3 bits wide, specifies number + of components */ +# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT 0 +# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT 3 +# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT 6 +# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT 9 +# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT 12 +# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT 15 +# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT 18 +# define R300_VAP_OUTPUT_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT 21 +# define R300_VAP_OUTPUT_VTX_FMT_1__NOT_PRESENT 0 +# define R300_VAP_OUTPUT_VTX_FMT_1__1_COMPONENT 1 +# define R300_VAP_OUTPUT_VTX_FMT_1__2_COMPONENTS 2 +# define R300_VAP_OUTPUT_VTX_FMT_1__3_COMPONENTS 3 +# define R300_VAP_OUTPUT_VTX_FMT_1__4_COMPONENTS 4 + +#define R300_SE_VTE_CNTL 0x20b0 +# define R300_VPORT_X_SCALE_ENA (1 << 0) +# define R300_VPORT_X_OFFSET_ENA (1 << 1) +# define R300_VPORT_Y_SCALE_ENA (1 << 2) +# define R300_VPORT_Y_OFFSET_ENA (1 << 3) +# define R300_VPORT_Z_SCALE_ENA (1 << 4) +# define R300_VPORT_Z_OFFSET_ENA (1 << 5) +# define R300_VTX_XY_FMT (1 << 8) +# define R300_VTX_Z_FMT (1 << 9) +# define R300_VTX_W0_FMT (1 << 10) +# define R300_SERIAL_PROC_ENA (1 << 11) + +/* BEGIN: Vertex data assembly - lots of uncertainties */ + +/* gap */ + +/* Maximum Vertex Indx Clamp */ +#define R300_VAP_VF_MAX_VTX_INDX 0x2134 +/* Minimum Vertex Indx Clamp */ +#define R300_VAP_VF_MIN_VTX_INDX 0x2138 + +/** Vertex assembler/processor control status */ +#define R300_VAP_CNTL_STATUS 0x2140 +/* No swap at all (default) */ +# define R300_VC_NO_SWAP (0 << 0) +/* 16-bit swap: 0xAABBCCDD becomes 0xBBAADDCC */ +# define R300_VC_16BIT_SWAP (1 << 0) +/* 32-bit swap: 0xAABBCCDD becomes 0xDDCCBBAA */ +# define R300_VC_32BIT_SWAP (2 << 0) +/* Half-dword swap: 0xAABBCCDD becomes 0xCCDDAABB */ +# define R300_VC_HALF_DWORD_SWAP (3 << 0) +/* The TCL engine will not be used (as it is logically or even physically removed) */ +# define R300_VAP_TCL_BYPASS (1 << 8) +/* Read only flag if TCL engine is busy. */ +# define R300_VAP_PVS_BUSY (1 << 11) +/* TODO: gap for MAX_MPS */ +/* Read only flag if the vertex store is busy. */ +# define R300_VAP_VS_BUSY (1 << 24) +/* Read only flag if the reciprocal engine is busy. */ +# define R300_VAP_RCP_BUSY (1 << 25) +/* Read only flag if the viewport transform engine is busy. */ +# define R300_VAP_VTE_BUSY (1 << 26) +/* Read only flag if the memory interface unit is busy. */ +# define R300_VAP_MUI_BUSY (1 << 27) +/* Read only flag if the vertex cache is busy. */ +# define R300_VAP_VC_BUSY (1 << 28) +/* Read only flag if the vertex fetcher is busy. */ +# define R300_VAP_VF_BUSY (1 << 29) +/* Read only flag if the register pipeline is busy. */ +# define R300_VAP_REGPIPE_BUSY (1 << 30) +/* Read only flag if the VAP engine is busy. */ +# define R300_VAP_VAP_BUSY (1 << 31) + +/* gap */ + +/* Where do we get our vertex data? + * + * Vertex data either comes either from immediate mode registers or from + * vertex arrays. + * There appears to be no mixed mode (though we can force the pitch of + * vertex arrays to 0, effectively reusing the same element over and over + * again). + * + * Immediate mode is controlled by the INPUT_CNTL registers. I am not sure + * if these registers influence vertex array processing. + * + * Vertex arrays are controlled via the 3D_LOAD_VBPNTR packet3. + * + * In both cases, vertex attributes are then passed through INPUT_ROUTE. + * + * Beginning with INPUT_ROUTE_0_0 is a list of WORDs that route vertex data + * into the vertex processor's input registers. + * The first word routes the first input, the second word the second, etc. + * The corresponding input is routed into the register with the given index. + * The list is ended by a word with INPUT_ROUTE_END set. + * + * Always set COMPONENTS_4 in immediate mode. + */ + +#define R300_VAP_PROG_STREAM_CNTL_0 0x2150 +# define R300_DATA_TYPE_0_SHIFT 0 +# define R300_DATA_TYPE_FLOAT_1 0 +# define R300_DATA_TYPE_FLOAT_2 1 +# define R300_DATA_TYPE_FLOAT_3 2 +# define R300_DATA_TYPE_FLOAT_4 3 +# define R300_DATA_TYPE_BYTE 4 +# define R300_DATA_TYPE_D3DCOLOR 5 +# define R300_DATA_TYPE_SHORT_2 6 +# define R300_DATA_TYPE_SHORT_4 7 +# define R300_DATA_TYPE_VECTOR_3_TTT 8 +# define R300_DATA_TYPE_VECTOR_3_EET 9 +# define R300_SKIP_DWORDS_SHIFT 4 +# define R300_DST_VEC_LOC_SHIFT 8 +# define R300_LAST_VEC (1 << 13) +# define R300_SIGNED (1 << 14) +# define R300_NORMALIZE (1 << 15) +# define R300_DATA_TYPE_1_SHIFT 16 +#define R300_VAP_PROG_STREAM_CNTL_1 0x2154 +#define R300_VAP_PROG_STREAM_CNTL_2 0x2158 +#define R300_VAP_PROG_STREAM_CNTL_3 0x215C +#define R300_VAP_PROG_STREAM_CNTL_4 0x2160 +#define R300_VAP_PROG_STREAM_CNTL_5 0x2164 +#define R300_VAP_PROG_STREAM_CNTL_6 0x2168 +#define R300_VAP_PROG_STREAM_CNTL_7 0x216C +/* gap */ + +/* Notes: + * - always set up to produce at least two attributes: + * if vertex program uses only position, fglrx will set normal, too + * - INPUT_CNTL_0_COLOR and INPUT_CNTL_COLOR bits are always equal. + */ +#define R300_VAP_VTX_STATE_CNTL 0x2180 +# define R300_COLOR_0_ASSEMBLY_SHIFT 0 +# define R300_SEL_COLOR 0 +# define R300_SEL_USER_COLOR_0 1 +# define R300_SEL_USER_COLOR_1 2 +# define R300_COLOR_1_ASSEMBLY_SHIFT 2 +# define R300_COLOR_2_ASSEMBLY_SHIFT 4 +# define R300_COLOR_3_ASSEMBLY_SHIFT 6 +# define R300_COLOR_4_ASSEMBLY_SHIFT 8 +# define R300_COLOR_5_ASSEMBLY_SHIFT 10 +# define R300_COLOR_6_ASSEMBLY_SHIFT 12 +# define R300_COLOR_7_ASSEMBLY_SHIFT 14 +# define R300_UPDATE_USER_COLOR_0_ENA (1 << 16) + +/* + * Each bit in this field applies to the corresponding vector in the VSM + * memory (i.e. Bit 0 applies to VECTOR_0 (POSITION), etc.). If the bit + * is set, then the corresponding 4-Dword Vector is output into the Vertex Stream. + */ +#define R300_VAP_VSM_VTX_ASSM 0x2184 +# define R300_INPUT_CNTL_POS 0x00000001 +# define R300_INPUT_CNTL_NORMAL 0x00000002 +# define R300_INPUT_CNTL_COLOR 0x00000004 +# define R300_INPUT_CNTL_TC0 0x00000400 +# define R300_INPUT_CNTL_TC1 0x00000800 +# define R300_INPUT_CNTL_TC2 0x00001000 /* GUESS */ +# define R300_INPUT_CNTL_TC3 0x00002000 /* GUESS */ +# define R300_INPUT_CNTL_TC4 0x00004000 /* GUESS */ +# define R300_INPUT_CNTL_TC5 0x00008000 /* GUESS */ +# define R300_INPUT_CNTL_TC6 0x00010000 /* GUESS */ +# define R300_INPUT_CNTL_TC7 0x00020000 /* GUESS */ + +/* Programmable Stream Control Signed Normalize Control */ +#define R300_VAP_PSC_SGN_NORM_CNTL 0x21dc +# define SGN_NORM_ZERO 0 +# define SGN_NORM_ZERO_CLAMP_MINUS_ONE 1 +# define SGN_NORM_NO_ZERO 2 + +/* gap */ + +/* Words parallel to INPUT_ROUTE_0; All words that are active in INPUT_ROUTE_0 + * are set to a swizzling bit pattern, other words are 0. + * + * In immediate mode, the pattern is always set to xyzw. In vertex array + * mode, the swizzling pattern is e.g. used to set zw components in texture + * coordinates with only tweo components. + */ +#define R300_VAP_PROG_STREAM_CNTL_EXT_0 0x21e0 +# define R300_SWIZZLE0_SHIFT 0 +# define R300_SWIZZLE_SELECT_X_SHIFT 0 +# define R300_SWIZZLE_SELECT_Y_SHIFT 3 +# define R300_SWIZZLE_SELECT_Z_SHIFT 6 +# define R300_SWIZZLE_SELECT_W_SHIFT 9 + +# define R300_SWIZZLE_SELECT_X 0 +# define R300_SWIZZLE_SELECT_Y 1 +# define R300_SWIZZLE_SELECT_Z 2 +# define R300_SWIZZLE_SELECT_W 3 +# define R300_SWIZZLE_SELECT_FP_ZERO 4 +# define R300_SWIZZLE_SELECT_FP_ONE 5 +/* alternate forms for r300_emit.c */ +# define R300_INPUT_ROUTE_SELECT_X 0 +# define R300_INPUT_ROUTE_SELECT_Y 1 +# define R300_INPUT_ROUTE_SELECT_Z 2 +# define R300_INPUT_ROUTE_SELECT_W 3 +# define R300_INPUT_ROUTE_SELECT_ZERO 4 +# define R300_INPUT_ROUTE_SELECT_ONE 5 + +# define R300_WRITE_ENA_SHIFT 12 +# define R300_WRITE_ENA_X 1 +# define R300_WRITE_ENA_Y 2 +# define R300_WRITE_ENA_Z 4 +# define R300_WRITE_ENA_W 8 +# define R300_SWIZZLE1_SHIFT 16 +#define R300_VAP_PROG_STREAM_CNTL_EXT_1 0x21e4 +#define R300_VAP_PROG_STREAM_CNTL_EXT_2 0x21e8 +#define R300_VAP_PROG_STREAM_CNTL_EXT_3 0x21ec +#define R300_VAP_PROG_STREAM_CNTL_EXT_4 0x21f0 +#define R300_VAP_PROG_STREAM_CNTL_EXT_5 0x21f4 +#define R300_VAP_PROG_STREAM_CNTL_EXT_6 0x21f8 +#define R300_VAP_PROG_STREAM_CNTL_EXT_7 0x21fc + +/* END: Vertex data assembly */ + +/* gap */ + +/* BEGIN: Upload vertex program and data */ + +/* + * The programmable vertex shader unit has a memory bank of unknown size + * that can be written to in 16 byte units by writing the address into + * UPLOAD_ADDRESS, followed by data in UPLOAD_DATA (multiples of 4 DWORDs). + * + * Pointers into the memory bank are always in multiples of 16 bytes. + * + * The memory bank is divided into areas with fixed meaning. + * + * Starting at address UPLOAD_PROGRAM: Vertex program instructions. + * Native limits reported by drivers from ATI suggest size 256 (i.e. 4KB), + * whereas the difference between known addresses suggests size 512. + * + * Starting at address UPLOAD_PARAMETERS: Vertex program parameters. + * Native reported limits and the VPI layout suggest size 256, whereas + * difference between known addresses suggests size 512. + * + * At address UPLOAD_POINTSIZE is a vector (0, 0, ps, 0), where ps is the + * floating point pointsize. The exact purpose of this state is uncertain, + * as there is also the R300_RE_POINTSIZE register. + * + * Multiple vertex programs and parameter sets can be loaded at once, + * which could explain the size discrepancy. + */ +#define R300_VAP_PVS_VECTOR_INDX_REG 0x2200 +# define R300_PVS_CODE_START 0 +# define R300_MAX_PVS_CODE_LINES 256 +# define R500_MAX_PVS_CODE_LINES 1024 +# define R300_PVS_CONST_START 512 +# define R500_PVS_CONST_START 1024 +# define R300_MAX_PVS_CONST_VECS 256 +# define R500_MAX_PVS_CONST_VECS 1024 +# define R300_PVS_UCP_START 1024 +# define R500_PVS_UCP_START 1536 +# define R300_POINT_VPORT_SCALE_OFFSET 1030 +# define R500_POINT_VPORT_SCALE_OFFSET 1542 +# define R300_POINT_GEN_TEX_OFFSET 1031 +# define R500_POINT_GEN_TEX_OFFSET 1543 + +/* + * These are obsolete defines form r300_context.h, but they might give some + * clues when investigating the addresses further... + */ +#if 0 +#define VSF_DEST_PROGRAM 0x0 +#define VSF_DEST_MATRIX0 0x200 +#define VSF_DEST_MATRIX1 0x204 +#define VSF_DEST_MATRIX2 0x208 +#define VSF_DEST_VECTOR0 0x20c +#define VSF_DEST_VECTOR1 0x20d +#define VSF_DEST_UNKNOWN1 0x400 +#define VSF_DEST_UNKNOWN2 0x406 +#endif + +/* gap */ + +#define R300_VAP_PVS_UPLOAD_DATA 0x2208 + +/* END: Upload vertex program and data */ + +/* gap */ + +/* I do not know the purpose of this register. However, I do know that + * it is set to 221C_CLEAR for clear operations and to 221C_NORMAL + * for normal rendering. + * + * 2007-11-05: This register is the user clip plane control register, but there + * also seems to be a rendering mode control; the NORMAL/CLEAR defines. + * + * See bug #9871. http://bugs.freedesktop.org/attachment.cgi?id=10672&action=view + */ +#define R300_VAP_CLIP_CNTL 0x221C +# define R300_VAP_UCP_ENABLE_0 (1 << 0) +# define R300_VAP_UCP_ENABLE_1 (1 << 1) +# define R300_VAP_UCP_ENABLE_2 (1 << 2) +# define R300_VAP_UCP_ENABLE_3 (1 << 3) +# define R300_VAP_UCP_ENABLE_4 (1 << 4) +# define R300_VAP_UCP_ENABLE_5 (1 << 5) +# define R300_PS_UCP_MODE_DIST_COP (0 << 14) +# define R300_PS_UCP_MODE_RADIUS_COP (1 << 14) +# define R300_PS_UCP_MODE_RADIUS_COP_CLIP (2 << 14) +# define R300_PS_UCP_MODE_CLIP_AS_TRIFAN (3 << 14) +# define R300_CLIP_DISABLE (1 << 16) +# define R300_UCP_CULL_ONLY_ENABLE (1 << 17) +# define R300_BOUNDARY_EDGE_FLAG_ENABLE (1 << 18) +# define R500_COLOR2_IS_TEXTURE (1 << 20) +# define R500_COLOR3_IS_TEXTURE (1 << 21) + +/* These seem to be per-pixel and per-vertex X and Y clipping planes. The first + * plane is per-pixel and the second plane is per-vertex. + * + * This was determined by experimentation alone but I believe it is correct. + * + * These registers are called X_QUAD0_1_FL to X_QUAD0_4_FL by glxtest. + */ +#define R300_VAP_GB_VERT_CLIP_ADJ 0x2220 +#define R300_VAP_GB_VERT_DISC_ADJ 0x2224 +#define R300_VAP_GB_HORZ_CLIP_ADJ 0x2228 +#define R300_VAP_GB_HORZ_DISC_ADJ 0x222c + +/* gap */ + +/* Sometimes, END_OF_PKT and 0x2284=0 are the only commands sent between + * rendering commands and overwriting vertex program parameters. + * Therefore, I suspect writing zero to 0x2284 synchronizes the engine and + * avoids bugs caused by still running shaders reading bad data from memory. + */ +#define R300_VAP_PVS_STATE_FLUSH_REG 0x2284 + +/* This register is used to define the number of core clocks to wait for a + * vertex to be received by the VAP input controller (while the primitive + * path is backed up) before forcing any accumulated vertices to be submitted + * to the vertex processing path. + */ +#define VAP_PVS_VTX_TIMEOUT_REG 0x2288 +# define R300_2288_R300 0x00750000 /* -- nh */ +# define R300_2288_RV350 0x0000FFFF /* -- Vladimir */ + +/* gap */ + +/* Addresses are relative to the vertex program instruction area of the + * memory bank. PROGRAM_END points to the last instruction of the active + * program + * + * The meaning of the two UNKNOWN fields is obviously not known. However, + * experiments so far have shown that both *must* point to an instruction + * inside the vertex program, otherwise the GPU locks up. + * + * fglrx usually sets CNTL_3_UNKNOWN to the end of the program and + * R300_PVS_CNTL_1_POS_END_SHIFT points to instruction where last write to + * position takes place. + * + * Most likely this is used to ignore rest of the program in cases + * where group of verts arent visible. For some reason this "section" + * is sometimes accepted other instruction that have no relationship with + * position calculations. + */ +#define R300_VAP_PVS_CODE_CNTL_0 0x22D0 +# define R300_PVS_FIRST_INST_SHIFT 0 +# define R300_PVS_XYZW_VALID_INST_SHIFT 10 +# define R300_PVS_LAST_INST_SHIFT 20 +/* Addresses are relative the the vertex program parameters area. */ +#define R300_VAP_PVS_CONST_CNTL 0x22D4 +# define R300_PVS_CONST_BASE_OFFSET_SHIFT 0 +# define R300_PVS_MAX_CONST_ADDR_SHIFT 16 +#define R300_VAP_PVS_CODE_CNTL_1 0x22D8 +# define R300_PVS_LAST_VTX_SRC_INST_SHIFT 0 +#define R300_VAP_PVS_FLOW_CNTL_OPC 0x22DC + +/* The entire range from 0x2300 to 0x2AC inclusive seems to be used for + * immediate vertices + */ +#define R300_VAP_VTX_COLOR_R 0x2464 +#define R300_VAP_VTX_COLOR_G 0x2468 +#define R300_VAP_VTX_COLOR_B 0x246C +#define R300_VAP_VTX_POS_0_X_1 0x2490 /* used for glVertex2*() */ +#define R300_VAP_VTX_POS_0_Y_1 0x2494 +#define R300_VAP_VTX_COLOR_PKD 0x249C /* RGBA */ +#define R300_VAP_VTX_POS_0_X_2 0x24A0 /* used for glVertex3*() */ +#define R300_VAP_VTX_POS_0_Y_2 0x24A4 +#define R300_VAP_VTX_POS_0_Z_2 0x24A8 +/* write 0 to indicate end of packet? */ +#define R300_VAP_VTX_END_OF_PKT 0x24AC + +/* gap */ + +/* These are values from r300_reg/r300_reg.h - they are known to be correct + * and are here so we can use one register file instead of several + * - Vladimir + */ +#define R300_GB_VAP_RASTER_VTX_FMT_0 0x4000 +# define R300_GB_VAP_RASTER_VTX_FMT_0__POS_PRESENT (1<<0) +# define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_0_PRESENT (1<<1) +# define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_1_PRESENT (1<<2) +# define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_2_PRESENT (1<<3) +# define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_3_PRESENT (1<<4) +# define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_SPACE (0xf<<5) +# define R300_GB_VAP_RASTER_VTX_FMT_0__PT_SIZE_PRESENT (0x1<<16) + +#define R300_GB_VAP_RASTER_VTX_FMT_1 0x4004 + /* each of the following is 3 bits wide, specifies number + of components */ +# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT 0 +# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT 3 +# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT 6 +# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT 9 +# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT 12 +# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT 15 +# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT 18 +# define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT 21 + +/* UNK30 seems to enables point to quad transformation on textures + * (or something closely related to that). + * This bit is rather fatal at the time being due to lackings at pixel + * shader side + * Specifies top of Raster pipe specific enable controls. + */ +#define R300_GB_ENABLE 0x4008 +# define R300_GB_POINT_STUFF_DISABLE (0 << 0) +# define R300_GB_POINT_STUFF_ENABLE (1 << 0) /* Specifies if points will have stuffed texture coordinates. */ +# define R300_GB_LINE_STUFF_DISABLE (0 << 1) +# define R300_GB_LINE_STUFF_ENABLE (1 << 1) /* Specifies if lines will have stuffed texture coordinates. */ +# define R300_GB_TRIANGLE_STUFF_DISABLE (0 << 2) +# define R300_GB_TRIANGLE_STUFF_ENABLE (1 << 2) /* Specifies if triangles will have stuffed texture coordinates. */ +# define R300_GB_STENCIL_AUTO_DISABLE (0 << 4) +# define R300_GB_STENCIL_AUTO_ENABLE (1 << 4) /* Enable stencil auto inc/dec based on triangle cw/ccw, force into dzy low bit. */ +# define R300_GB_STENCIL_AUTO_FORCE (2 << 4) /* Force 0 into dzy low bit. */ + + /* each of the following is 2 bits wide */ +#define R300_GB_TEX_REPLICATE 0 /* Replicate VAP source texture coordinates (S,T,[R,Q]). */ +#define R300_GB_TEX_ST 1 /* Stuff with source texture coordinates (S,T). */ +#define R300_GB_TEX_STR 2 /* Stuff with source texture coordinates (S,T,R). */ +# define R300_GB_TEX0_SOURCE_SHIFT 16 +# define R300_GB_TEX1_SOURCE_SHIFT 18 +# define R300_GB_TEX2_SOURCE_SHIFT 20 +# define R300_GB_TEX3_SOURCE_SHIFT 22 +# define R300_GB_TEX4_SOURCE_SHIFT 24 +# define R300_GB_TEX5_SOURCE_SHIFT 26 +# define R300_GB_TEX6_SOURCE_SHIFT 28 +# define R300_GB_TEX7_SOURCE_SHIFT 30 + +/* MSPOS - positions for multisample antialiasing (?) */ +#define R300_GB_MSPOS0 0x4010 + /* shifts - each of the fields is 4 bits */ +# define R300_GB_MSPOS0__MS_X0_SHIFT 0 +# define R300_GB_MSPOS0__MS_Y0_SHIFT 4 +# define R300_GB_MSPOS0__MS_X1_SHIFT 8 +# define R300_GB_MSPOS0__MS_Y1_SHIFT 12 +# define R300_GB_MSPOS0__MS_X2_SHIFT 16 +# define R300_GB_MSPOS0__MS_Y2_SHIFT 20 +# define R300_GB_MSPOS0__MSBD0_Y 24 +# define R300_GB_MSPOS0__MSBD0_X 28 + +#define R300_GB_MSPOS1 0x4014 +# define R300_GB_MSPOS1__MS_X3_SHIFT 0 +# define R300_GB_MSPOS1__MS_Y3_SHIFT 4 +# define R300_GB_MSPOS1__MS_X4_SHIFT 8 +# define R300_GB_MSPOS1__MS_Y4_SHIFT 12 +# define R300_GB_MSPOS1__MS_X5_SHIFT 16 +# define R300_GB_MSPOS1__MS_Y5_SHIFT 20 +# define R300_GB_MSPOS1__MSBD1 24 + +/* Specifies the graphics pipeline configuration for rasterization. */ +#define R300_GB_TILE_CONFIG 0x4018 +# define R300_GB_TILE_DISABLE (0 << 0) +# define R300_GB_TILE_ENABLE (1 << 0) +# define R300_GB_TILE_PIPE_COUNT_RV300 (0 << 1) /* RV350 (1 pipe, 1 ctx) */ +# define R300_GB_TILE_PIPE_COUNT_R300 (3 << 1) /* R300 (2 pipes, 1 ctx) */ +# define R300_GB_TILE_PIPE_COUNT_R420_3P (6 << 1) /* R420-3P (3 pipes, 1 ctx) */ +# define R300_GB_TILE_PIPE_COUNT_R420 (7 << 1) /* R420 (4 pipes, 1 ctx) */ +# define R300_GB_TILE_SIZE_8 (0 << 4) +# define R300_GB_TILE_SIZE_16 (1 << 4) +# define R300_GB_TILE_SIZE_32 (2 << 4) +# define R300_GB_SUPER_SIZE_1 (0 << 6) +# define R300_GB_SUPER_SIZE_2 (1 << 6) +# define R300_GB_SUPER_SIZE_4 (2 << 6) +# define R300_GB_SUPER_SIZE_8 (3 << 6) +# define R300_GB_SUPER_SIZE_16 (4 << 6) +# define R300_GB_SUPER_SIZE_32 (5 << 6) +# define R300_GB_SUPER_SIZE_64 (6 << 6) +# define R300_GB_SUPER_SIZE_128 (7 << 6) +# define R300_GB_SUPER_X_SHIFT 9 /* 3 bits wide */ +# define R300_GB_SUPER_Y_SHIFT 12 /* 3 bits wide */ +# define R300_GB_SUPER_TILE_A (0 << 15) +# define R300_GB_SUPER_TILE_B (1 << 15) +# define R300_GB_SUBPIXEL_1_12 (0 << 16) +# define R300_GB_SUBPIXEL_1_16 (1 << 16) +# define GB_TILE_CONFIG_QUADS_PER_RAS_4 (0 << 17) +# define GB_TILE_CONFIG_QUADS_PER_RAS_8 (1 << 17) +# define GB_TILE_CONFIG_QUADS_PER_RAS_16 (2 << 17) +# define GB_TILE_CONFIG_QUADS_PER_RAS_32 (3 << 17) +# define GB_TILE_CONFIG_BB_SCAN_INTERCEPT (0 << 19) +# define GB_TILE_CONFIG_BB_SCAN_BOUND_BOX (1 << 19) +# define GB_TILE_CONFIG_ALT_SCAN_EN_LR (0 << 20) +# define GB_TILE_CONFIG_ALT_SCAN_EN_LRL (1 << 20) +# define GB_TILE_CONFIG_ALT_OFFSET (0 << 21) +# define GB_TILE_CONFIG_SUBPRECISION (0 << 22) +# define GB_TILE_CONFIG_ALT_TILING_DEF (0 << 23) +# define GB_TILE_CONFIG_ALT_TILING_3_2 (1 << 23) +# define GB_TILE_CONFIG_Z_EXTENDED_24_1 (0 << 24) +# define GB_TILE_CONFIG_Z_EXTENDED_S25_1 (1 << 24) + +/* Specifies the sizes of the various FIFO`s in the sc/rs/us. This register must be the first one written */ +#define R300_GB_FIFO_SIZE 0x4024 + /* each of the following is 2 bits wide */ +#define R300_GB_FIFO_SIZE_32 0 +#define R300_GB_FIFO_SIZE_64 1 +#define R300_GB_FIFO_SIZE_128 2 +#define R300_GB_FIFO_SIZE_256 3 +# define R300_SC_IFIFO_SIZE_SHIFT 0 +# define R300_SC_TZFIFO_SIZE_SHIFT 2 +# define R300_SC_BFIFO_SIZE_SHIFT 4 + +# define R300_US_OFIFO_SIZE_SHIFT 12 +# define R300_US_WFIFO_SIZE_SHIFT 14 + /* the following use the same constants as above, but meaning is + is times 2 (i.e. instead of 32 words it means 64 */ +# define R300_RS_TFIFO_SIZE_SHIFT 6 +# define R300_RS_CFIFO_SIZE_SHIFT 8 +# define R300_US_RAM_SIZE_SHIFT 10 + /* watermarks, 3 bits wide */ +# define R300_RS_HIGHWATER_COL_SHIFT 16 +# define R300_RS_HIGHWATER_TEX_SHIFT 19 +# define R300_OFIFO_HIGHWATER_SHIFT 22 /* two bits only */ +# define R300_CUBE_FIFO_HIGHWATER_COL_SHIFT 24 + +#define GB_Z_PEQ_CONFIG 0x4028 +# define GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_4_4 (0 << 0) +# define GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_8_8 (1 << 0) + +/* Specifies various polygon specific selects (fog, depth, perspective). */ +#define R300_GB_SELECT 0x401c +# define R300_GB_FOG_SELECT_C0A (0 << 0) +# define R300_GB_FOG_SELECT_C1A (1 << 0) +# define R300_GB_FOG_SELECT_C2A (2 << 0) +# define R300_GB_FOG_SELECT_C3A (3 << 0) +# define R300_GB_FOG_SELECT_1_1_W (4 << 0) +# define R300_GB_FOG_SELECT_Z (5 << 0) +# define R300_GB_DEPTH_SELECT_Z (0 << 3 +# define R300_GB_DEPTH_SELECT_1_1_W (1 << 3) +# define R300_GB_W_SELECT_1_W (0 << 4) +# define R300_GB_W_SELECT_1 (1 << 4) +# define R300_GB_FOG_STUFF_DISABLE (0 << 5) +# define R300_GB_FOG_STUFF_ENABLE (1 << 5) +# define R300_GB_FOG_STUFF_TEX_SHIFT 6 +# define R300_GB_FOG_STUFF_TEX_MASK 0x000003c0 +# define R300_GB_FOG_STUFF_COMP_SHIFT 10 +# define R300_GB_FOG_STUFF_COMP_MASK 0x00000c00 + +/* Specifies the graphics pipeline configuration for antialiasing. */ +#define GB_AA_CONFIG 0x4020 +# define GB_AA_CONFIG_AA_DISABLE (0 << 0) +# define GB_AA_CONFIG_AA_ENABLE (1 << 0) +# define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2 (0 << 1) +# define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3 (1 << 1) +# define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4 (2 << 1) +# define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6 (3 << 1) + +/* Selects which of 4 pipes are active. */ +#define GB_PIPE_SELECT 0x402c +# define GB_PIPE_SELECT_PIPE0_ID_SHIFT 0 +# define GB_PIPE_SELECT_PIPE1_ID_SHIFT 2 +# define GB_PIPE_SELECT_PIPE2_ID_SHIFT 4 +# define GB_PIPE_SELECT_PIPE3_ID_SHIFT 6 +# define GB_PIPE_SELECT_PIPE_MASK_SHIFT 8 +# define GB_PIPE_SELECT_MAX_PIPE 12 +# define GB_PIPE_SELECT_BAD_PIPES 14 +# define GB_PIPE_SELECT_CONFIG_PIPES 18 + + +/* Specifies the sizes of the various FIFO`s in the sc/rs. */ +#define GB_FIFO_SIZE1 0x4070 +/* High water mark for SC input fifo */ +# define GB_FIFO_SIZE1_SC_HIGHWATER_IFIFO_SHIFT 0 +# define GB_FIFO_SIZE1_SC_HIGHWATER_IFIFO_MASK 0x0000003f +/* High water mark for SC input fifo (B) */ +# define GB_FIFO_SIZE1_SC_HIGHWATER_BFIFO_SHIFT 6 +# define GB_FIFO_SIZE1_SC_HIGHWATER_BFIFO_MASK 0x00000fc0 +/* High water mark for RS colors' fifo */ +# define GB_FIFO_SIZE1_SC_HIGHWATER_COL_SHIFT 12 +# define GB_FIFO_SIZE1_SC_HIGHWATER_COL_MASK 0x0003f000 +/* High water mark for RS textures' fifo */ +# define GB_FIFO_SIZE1_SC_HIGHWATER_TEX_SHIFT 18 +# define GB_FIFO_SIZE1_SC_HIGHWATER_TEX_MASK 0x00fc0000 + +/* This table specifies the source location and format for up to 16 texture + * addresses (i[0]:i[15]) and four colors (c[0]:c[3]) + */ +#define R500_RS_IP_0 0x4074 +#define R500_RS_IP_1 0x4078 +#define R500_RS_IP_2 0x407C +#define R500_RS_IP_3 0x4080 +#define R500_RS_IP_4 0x4084 +#define R500_RS_IP_5 0x4088 +#define R500_RS_IP_6 0x408C +#define R500_RS_IP_7 0x4090 +#define R500_RS_IP_8 0x4094 +#define R500_RS_IP_9 0x4098 +#define R500_RS_IP_10 0x409C +#define R500_RS_IP_11 0x40A0 +#define R500_RS_IP_12 0x40A4 +#define R500_RS_IP_13 0x40A8 +#define R500_RS_IP_14 0x40AC +#define R500_RS_IP_15 0x40B0 +#define R500_RS_IP_PTR_K0 62 +#define R500_RS_IP_PTR_K1 63 +#define R500_RS_IP_TEX_PTR_S_SHIFT 0 +#define R500_RS_IP_TEX_PTR_T_SHIFT 6 +#define R500_RS_IP_TEX_PTR_R_SHIFT 12 +#define R500_RS_IP_TEX_PTR_Q_SHIFT 18 +#define R500_RS_IP_COL_PTR_SHIFT 24 +#define R500_RS_IP_COL_FMT_SHIFT 27 +# define R500_RS_COL_PTR(x) (x << 24) +# define R500_RS_COL_FMT(x) (x << 27) +/* gap */ +#define R500_RS_IP_OFFSET_DIS (0 << 31) +#define R500_RS_IP_OFFSET_EN (1 << 31) + +/* gap */ + +/* Zero to flush caches. */ +#define R300_TX_INVALTAGS 0x4100 +#define R300_TX_FLUSH 0x0 + +/* The upper enable bits are guessed, based on fglrx reported limits. */ +#define R300_TX_ENABLE 0x4104 +# define R300_TX_ENABLE_0 (1 << 0) +# define R300_TX_ENABLE_1 (1 << 1) +# define R300_TX_ENABLE_2 (1 << 2) +# define R300_TX_ENABLE_3 (1 << 3) +# define R300_TX_ENABLE_4 (1 << 4) +# define R300_TX_ENABLE_5 (1 << 5) +# define R300_TX_ENABLE_6 (1 << 6) +# define R300_TX_ENABLE_7 (1 << 7) +# define R300_TX_ENABLE_8 (1 << 8) +# define R300_TX_ENABLE_9 (1 << 9) +# define R300_TX_ENABLE_10 (1 << 10) +# define R300_TX_ENABLE_11 (1 << 11) +# define R300_TX_ENABLE_12 (1 << 12) +# define R300_TX_ENABLE_13 (1 << 13) +# define R300_TX_ENABLE_14 (1 << 14) +# define R300_TX_ENABLE_15 (1 << 15) + +#define R500_TX_FILTER_4 0x4110 +# define R500_TX_WEIGHT_1_SHIFT (0) +# define R500_TX_WEIGHT_0_SHIFT (11) +# define R500_TX_WEIGHT_PAIR (1<<22) +# define R500_TX_PHASE_SHIFT (23) +# define R500_TX_DIRECTION_HORIZONTAL (0<<27) +# define R500_TX_DIRECTION_VERITCAL (1<<27) + +/* S Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) */ +#define R300_GA_POINT_S0 0x4200 + +/* T Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) */ +#define R300_GA_POINT_T0 0x4204 + +/* S Texture Coordinate of Vertex 2 for Point texture stuffing (URC) */ +#define R300_GA_POINT_S1 0x4208 + +/* T Texture Coordinate of Vertex 2 for Point texture stuffing (URC) */ +#define R300_GA_POINT_T1 0x420c + +/* Specifies amount to shift integer position of vertex (screen space) before + * converting to float for triangle stipple. + */ +#define R300_GA_TRIANGLE_STIPPLE 0x4214 +# define R300_GA_TRIANGLE_STIPPLE_X_SHIFT_SHIFT 0 +# define R300_GA_TRIANGLE_STIPPLE_X_SHIFT_MASK 0x0000000f +# define R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT 16 +# define R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_MASK 0x000f0000 + +/* The pointsize is given in multiples of 6. The pointsize can be enormous: + * Clear() renders a single point that fills the entire framebuffer. + * 1/2 Height of point; fixed (16.0), subpixel format (1/12 or 1/16, even if in + * 8b precision). + */ +#define R300_GA_POINT_SIZE 0x421C +# define R300_POINTSIZE_Y_SHIFT 0 +# define R300_POINTSIZE_Y_MASK 0x0000ffff +# define R300_POINTSIZE_X_SHIFT 16 +# define R300_POINTSIZE_X_MASK 0xffff0000 +# define R300_POINTSIZE_MAX (R300_POINTSIZE_Y_MASK / 6) + +/* Blue fill color */ +#define R500_GA_FILL_R 0x4220 + +/* Blue fill color */ +#define R500_GA_FILL_G 0x4224 + +/* Blue fill color */ +#define R500_GA_FILL_B 0x4228 + +/* Alpha fill color */ +#define R500_GA_FILL_A 0x422c + + +/* Specifies maximum and minimum point & sprite sizes for per vertex size + * specification. The lower part (15:0) is MIN and (31:16) is max. + */ +#define R300_GA_POINT_MINMAX 0x4230 +# define R300_GA_POINT_MINMAX_MIN_SHIFT 0 +# define R300_GA_POINT_MINMAX_MIN_MASK (0xFFFF << 0) +# define R300_GA_POINT_MINMAX_MAX_SHIFT 16 +# define R300_GA_POINT_MINMAX_MAX_MASK (0xFFFF << 16) + +/* 1/2 width of line, in subpixels (1/12 or 1/16 only, even in 8b + * subprecision); (16.0) fixed format. + * + * The line width is given in multiples of 6. + * In default mode lines are classified as vertical lines. + * HO: horizontal + * VE: vertical or horizontal + * HO & VE: no classification + */ +#define R300_GA_LINE_CNTL 0x4234 +# define R300_GA_LINE_CNTL_WIDTH_SHIFT 0 +# define R300_GA_LINE_CNTL_WIDTH_MASK 0x0000ffff +# define R300_GA_LINE_CNTL_END_TYPE_HOR (0 << 16) +# define R300_GA_LINE_CNTL_END_TYPE_VER (1 << 16) +# define R300_GA_LINE_CNTL_END_TYPE_SQR (2 << 16) /* horizontal or vertical depending upon slope */ +# define R300_GA_LINE_CNTL_END_TYPE_COMP (3 << 16) /* Computed (perpendicular to slope) */ +# define R500_GA_LINE_CNTL_SORT_NO (0 << 18) +# define R500_GA_LINE_CNTL_SORT_MINX_MINY (1 << 18) +/** TODO: looks wrong */ +# define R300_LINESIZE_MAX (R300_GA_LINE_CNTL_WIDTH_MASK / 6) +/** TODO: looks wrong */ +# define R300_LINE_CNT_HO (1 << 16) +/** TODO: looks wrong */ +# define R300_LINE_CNT_VE (1 << 17) + +/* Line Stipple configuration information. */ +#define R300_GA_LINE_STIPPLE_CONFIG 0x4238 +# define R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_NO (0 << 0) +# define R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE (1 << 0) +# define R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_PACKET (2 << 0) +# define R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_SHIFT 2 +# define R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK 0xfffffffc + +/* Used to load US instructions and constants */ +#define R500_GA_US_VECTOR_INDEX 0x4250 +# define R500_GA_US_VECTOR_INDEX_SHIFT 0 +# define R500_GA_US_VECTOR_INDEX_MASK 0x000000ff +# define R500_GA_US_VECTOR_INDEX_TYPE_INSTR (0 << 16) +# define R500_GA_US_VECTOR_INDEX_TYPE_CONST (1 << 16) +# define R500_GA_US_VECTOR_INDEX_CLAMP_NO (0 << 17) +# define R500_GA_US_VECTOR_INDEX_CLAMP_CONST (1 << 17) + +/* Data register for loading US instructions and constants */ +#define R500_GA_US_VECTOR_DATA 0x4254 + +/* Specifies color properties and mappings of textures. */ +#define R500_GA_COLOR_CONTROL_PS3 0x4258 +# define R500_TEX0_SHADING_PS3_SOLID (0 << 0) +# define R500_TEX0_SHADING_PS3_FLAT (1 << 0) +# define R500_TEX0_SHADING_PS3_GOURAUD (2 << 0) +# define R500_TEX1_SHADING_PS3_SOLID (0 << 2) +# define R500_TEX1_SHADING_PS3_FLAT (1 << 2) +# define R500_TEX1_SHADING_PS3_GOURAUD (2 << 2) +# define R500_TEX2_SHADING_PS3_SOLID (0 << 4) +# define R500_TEX2_SHADING_PS3_FLAT (1 << 4) +# define R500_TEX2_SHADING_PS3_GOURAUD (2 << 4) +# define R500_TEX3_SHADING_PS3_SOLID (0 << 6) +# define R500_TEX3_SHADING_PS3_FLAT (1 << 6) +# define R500_TEX3_SHADING_PS3_GOURAUD (2 << 6) +# define R500_TEX4_SHADING_PS3_SOLID (0 << 8) +# define R500_TEX4_SHADING_PS3_FLAT (1 << 8) +# define R500_TEX4_SHADING_PS3_GOURAUD (2 << 8) +# define R500_TEX5_SHADING_PS3_SOLID (0 << 10) +# define R500_TEX5_SHADING_PS3_FLAT (1 << 10) +# define R500_TEX5_SHADING_PS3_GOURAUD (2 << 10) +# define R500_TEX6_SHADING_PS3_SOLID (0 << 12) +# define R500_TEX6_SHADING_PS3_FLAT (1 << 12) +# define R500_TEX6_SHADING_PS3_GOURAUD (2 << 12) +# define R500_TEX7_SHADING_PS3_SOLID (0 << 14) +# define R500_TEX7_SHADING_PS3_FLAT (1 << 14) +# define R500_TEX7_SHADING_PS3_GOURAUD (2 << 14) +# define R500_TEX8_SHADING_PS3_SOLID (0 << 16) +# define R500_TEX8_SHADING_PS3_FLAT (1 << 16) +# define R500_TEX8_SHADING_PS3_GOURAUD (2 << 16) +# define R500_TEX9_SHADING_PS3_SOLID (0 << 18) +# define R500_TEX9_SHADING_PS3_FLAT (1 << 18) +# define R500_TEX9_SHADING_PS3_GOURAUD (2 << 18) +# define R500_TEX10_SHADING_PS3_SOLID (0 << 20) +# define R500_TEX10_SHADING_PS3_FLAT (1 << 20) +# define R500_TEX10_SHADING_PS3_GOURAUD (2 << 20) +# define R500_COLOR0_TEX_OVERRIDE_NO (0 << 22) +# define R500_COLOR0_TEX_OVERRIDE_TEX_0 (1 << 22) +# define R500_COLOR0_TEX_OVERRIDE_TEX_1 (2 << 22) +# define R500_COLOR0_TEX_OVERRIDE_TEX_2 (3 << 22) +# define R500_COLOR0_TEX_OVERRIDE_TEX_3 (4 << 22) +# define R500_COLOR0_TEX_OVERRIDE_TEX_4 (5 << 22) +# define R500_COLOR0_TEX_OVERRIDE_TEX_5 (6 << 22) +# define R500_COLOR0_TEX_OVERRIDE_TEX_6 (7 << 22) +# define R500_COLOR0_TEX_OVERRIDE_TEX_7 (8 << 22) +# define R500_COLOR0_TEX_OVERRIDE_TEX_8_C2 (9 << 22) +# define R500_COLOR0_TEX_OVERRIDE_TEX_9_C3 (10 << 22) +# define R500_COLOR1_TEX_OVERRIDE_NO (0 << 26) +# define R500_COLOR1_TEX_OVERRIDE_TEX_0 (1 << 26) +# define R500_COLOR1_TEX_OVERRIDE_TEX_1 (2 << 26) +# define R500_COLOR1_TEX_OVERRIDE_TEX_2 (3 << 26) +# define R500_COLOR1_TEX_OVERRIDE_TEX_3 (4 << 26) +# define R500_COLOR1_TEX_OVERRIDE_TEX_4 (5 << 26) +# define R500_COLOR1_TEX_OVERRIDE_TEX_5 (6 << 26) +# define R500_COLOR1_TEX_OVERRIDE_TEX_6 (7 << 26) +# define R500_COLOR1_TEX_OVERRIDE_TEX_7 (8 << 26) +# define R500_COLOR1_TEX_OVERRIDE_TEX_8_C2 (9 << 26) +# define R500_COLOR1_TEX_OVERRIDE_TEX_9_C3 (10 << 26) + +/* Returns idle status of various G3D block, captured when GA_IDLE written or + * when hard or soft reset asserted. + */ +#define R500_GA_IDLE 0x425c +# define R500_GA_IDLE_PIPE3_Z_IDLE (0 << 0) +# define R500_GA_IDLE_PIPE2_Z_IDLE (0 << 1) +# define R500_GA_IDLE_PIPE3_CD_IDLE (0 << 2) +# define R500_GA_IDLE_PIPE2_CD_IDLE (0 << 3) +# define R500_GA_IDLE_PIPE3_FG_IDLE (0 << 4) +# define R500_GA_IDLE_PIPE2_FG_IDLE (0 << 5) +# define R500_GA_IDLE_PIPE3_US_IDLE (0 << 6) +# define R500_GA_IDLE_PIPE2_US_IDLE (0 << 7) +# define R500_GA_IDLE_PIPE3_SC_IDLE (0 << 8) +# define R500_GA_IDLE_PIPE2_SC_IDLE (0 << 9) +# define R500_GA_IDLE_PIPE3_RS_IDLE (0 << 10) +# define R500_GA_IDLE_PIPE2_RS_IDLE (0 << 11) +# define R500_GA_IDLE_PIPE1_Z_IDLE (0 << 12) +# define R500_GA_IDLE_PIPE0_Z_IDLE (0 << 13) +# define R500_GA_IDLE_PIPE1_CD_IDLE (0 << 14) +# define R500_GA_IDLE_PIPE0_CD_IDLE (0 << 15) +# define R500_GA_IDLE_PIPE1_FG_IDLE (0 << 16) +# define R500_GA_IDLE_PIPE0_FG_IDLE (0 << 17) +# define R500_GA_IDLE_PIPE1_US_IDLE (0 << 18) +# define R500_GA_IDLE_PIPE0_US_IDLE (0 << 19) +# define R500_GA_IDLE_PIPE1_SC_IDLE (0 << 20) +# define R500_GA_IDLE_PIPE0_SC_IDLE (0 << 21) +# define R500_GA_IDLE_PIPE1_RS_IDLE (0 << 22) +# define R500_GA_IDLE_PIPE0_RS_IDLE (0 << 23) +# define R500_GA_IDLE_SU_IDLE (0 << 24) +# define R500_GA_IDLE_GA_IDLE (0 << 25) +# define R500_GA_IDLE_GA_UNIT2_IDLE (0 << 26) + +/* Current value of stipple accumulator. */ +#define R300_GA_LINE_STIPPLE_VALUE 0x4260 + +/* S Texture Coordinate Value for Vertex 0 of Line (stuff textures -- i.e. AA) */ +#define R300_GA_LINE_S0 0x4264 +/* S Texture Coordinate Value for Vertex 1 of Lines (V2 of parallelogram -- stuff textures -- i.e. AA) */ +#define R300_GA_LINE_S1 0x4268 + +/* GA Input fifo high water marks */ +#define R500_GA_FIFO_CNTL 0x4270 +# define R500_GA_FIFO_CNTL_VERTEX_FIFO_MASK 0x00000007 +# define R500_GA_FIFO_CNTL_VERTEX_FIFO_SHIFT 0 +# define R500_GA_FIFO_CNTL_VERTEX_INDEX_MASK 0x00000038 +# define R500_GA_FIFO_CNTL_VERTEX_INDEX_SHIFT 3 +# define R500_GA_FIFO_CNTL_VERTEX_REG_MASK 0x00003fc0 +# define R500_GA_FIFO_CNTL_VERTEX_REG_SHIFT 6 + +/* GA enhance/tweaks */ +#define R300_GA_ENHANCE 0x4274 +# define R300_GA_ENHANCE_DEADLOCK_CNTL_NO_EFFECT (0 << 0) +# define R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL (1 << 0) /* Prevents TCL interface from deadlocking on GA side. */ +# define R300_GA_ENHANCE_FASTSYNC_CNTL_NO_EFFECT (0 << 1) +# define R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE (1 << 1) /* Enables high-performance register/primitive switching. */ +# define R500_GA_ENHANCE_REG_READWRITE_NO_EFFECT (0 << 2) /* R520+ only */ +# define R500_GA_ENHANCE_REG_READWRITE_ENABLE (1 << 2) /* R520+ only, Enables GA support of simultaneous register reads and writes. */ +# define R500_GA_ENHANCE_REG_NOSTALL_NO_EFFECT (0 << 3) +# define R500_GA_ENHANCE_REG_NOSTALL_ENABLE (1 << 3) /* Enables GA support of no-stall reads for register read back. */ + +#define R300_GA_COLOR_CONTROL 0x4278 +# define R300_GA_COLOR_CONTROL_RGB0_SHADING_SOLID (0 << 0) +# define R300_GA_COLOR_CONTROL_RGB0_SHADING_FLAT (1 << 0) +# define R300_GA_COLOR_CONTROL_RGB0_SHADING_GOURAUD (2 << 0) +# define R300_GA_COLOR_CONTROL_ALPHA0_SHADING_SOLID (0 << 2) +# define R300_GA_COLOR_CONTROL_ALPHA0_SHADING_FLAT (1 << 2) +# define R300_GA_COLOR_CONTROL_ALPHA0_SHADING_GOURAUD (2 << 2) +# define R300_GA_COLOR_CONTROL_RGB1_SHADING_SOLID (0 << 4) +# define R300_GA_COLOR_CONTROL_RGB1_SHADING_FLAT (1 << 4) +# define R300_GA_COLOR_CONTROL_RGB1_SHADING_GOURAUD (2 << 4) +# define R300_GA_COLOR_CONTROL_ALPHA1_SHADING_SOLID (0 << 6) +# define R300_GA_COLOR_CONTROL_ALPHA1_SHADING_FLAT (1 << 6) +# define R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD (2 << 6) +# define R300_GA_COLOR_CONTROL_RGB2_SHADING_SOLID (0 << 8) +# define R300_GA_COLOR_CONTROL_RGB2_SHADING_FLAT (1 << 8) +# define R300_GA_COLOR_CONTROL_RGB2_SHADING_GOURAUD (2 << 8) +# define R300_GA_COLOR_CONTROL_ALPHA2_SHADING_SOLID (0 << 10) +# define R300_GA_COLOR_CONTROL_ALPHA2_SHADING_FLAT (1 << 10) +# define R300_GA_COLOR_CONTROL_ALPHA2_SHADING_GOURAUD (2 << 10) +# define R300_GA_COLOR_CONTROL_RGB3_SHADING_SOLID (0 << 12) +# define R300_GA_COLOR_CONTROL_RGB3_SHADING_FLAT (1 << 12) +# define R300_GA_COLOR_CONTROL_RGB3_SHADING_GOURAUD (2 << 12) +# define R300_GA_COLOR_CONTROL_ALPHA3_SHADING_SOLID (0 << 14) +# define R300_GA_COLOR_CONTROL_ALPHA3_SHADING_FLAT (1 << 14) +# define R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD (2 << 14) +# define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST (0 << 16) +# define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND (1 << 16) +# define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_THIRD (2 << 16) +# define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST (3 << 16) + +/** TODO: might be candidate for removal */ +# define R300_RE_SHADE_MODEL_SMOOTH ( \ + R300_GA_COLOR_CONTROL_RGB0_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA0_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_RGB1_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_RGB2_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA2_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_RGB3_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST ) +/** TODO: might be candidate for removal, the GOURAUD stuff also looks buggy to me */ +# define R300_RE_SHADE_MODEL_FLAT ( \ + R300_GA_COLOR_CONTROL_RGB0_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA0_SHADING_FLAT | \ + R300_GA_COLOR_CONTROL_RGB1_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_RGB2_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA2_SHADING_FLAT | \ + R300_GA_COLOR_CONTROL_RGB3_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST ) + +/* Specifies red & green components of fill color -- S312 format -- Backwards comp. */ +#define R300_GA_SOLID_RG 0x427c +# define GA_SOLID_RG_COLOR_GREEN_SHIFT 0 +# define GA_SOLID_RG_COLOR_GREEN_MASK 0x0000ffff +# define GA_SOLID_RG_COLOR_RED_SHIFT 16 +# define GA_SOLID_RG_COLOR_RED_MASK 0xffff0000 +/* Specifies blue & alpha components of fill color -- S312 format -- Backwards comp. */ +#define R300_GA_SOLID_BA 0x4280 +# define GA_SOLID_BA_COLOR_ALPHA_SHIFT 0 +# define GA_SOLID_BA_COLOR_ALPHA_MASK 0x0000ffff +# define GA_SOLID_BA_COLOR_BLUE_SHIFT 16 +# define GA_SOLID_BA_COLOR_BLUE_MASK 0xffff0000 + +/* Polygon Mode + * Dangerous + */ +#define R300_GA_POLY_MODE 0x4288 +# define R300_GA_POLY_MODE_DISABLE (0 << 0) +# define R300_GA_POLY_MODE_DUAL (1 << 0) /* send 2 sets of 3 polys with specified poly type */ +/* reserved */ +# define R300_GA_POLY_MODE_FRONT_PTYPE_POINT (0 << 4) +# define R300_GA_POLY_MODE_FRONT_PTYPE_LINE (1 << 4) +# define R300_GA_POLY_MODE_FRONT_PTYPE_TRI (2 << 4) +/* reserved */ +# define R300_GA_POLY_MODE_BACK_PTYPE_POINT (0 << 7) +# define R300_GA_POLY_MODE_BACK_PTYPE_LINE (1 << 7) +# define R300_GA_POLY_MODE_BACK_PTYPE_TRI (2 << 7) +/* reserved */ + +/* Specifies the rouding mode for geometry & color SPFP to FP conversions. */ +#define R300_GA_ROUND_MODE 0x428c +# define R300_GA_ROUND_MODE_GEOMETRY_ROUND_TRUNC (0 << 0) +# define R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST (1 << 0) +# define R300_GA_ROUND_MODE_COLOR_ROUND_TRUNC (0 << 2) +# define R300_GA_ROUND_MODE_COLOR_ROUND_NEAREST (1 << 2) +# define R300_GA_ROUND_MODE_RGB_CLAMP_RGB (0 << 4) +# define R300_GA_ROUND_MODE_RGB_CLAMP_FP20 (1 << 4) +# define R300_GA_ROUND_MODE_ALPHA_CLAMP_RGB (0 << 5) +# define R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20 (1 << 5) +# define R500_GA_ROUND_MODE_GEOMETRY_MASK_SHIFT 6 +# define R500_GA_ROUND_MODE_GEOMETRY_MASK_MASK 0x000003c0 + +/* Specifies x & y offsets for vertex data after conversion to FP. + * Offsets are in S15 format (subpixels -- 1/12 or 1/16, even in 8b + * subprecision). + */ +#define R300_GA_OFFSET 0x4290 +# define R300_GA_OFFSET_X_OFFSET_SHIFT 0 +# define R300_GA_OFFSET_X_OFFSET_MASK 0x0000ffff +# define R300_GA_OFFSET_Y_OFFSET_SHIFT 16 +# define R300_GA_OFFSET_Y_OFFSET_MASK 0xffff0000 + +/* Specifies the scale to apply to fog. */ +#define R300_GA_FOG_SCALE 0x4294 +/* Specifies the offset to apply to fog. */ +#define R300_GA_FOG_OFFSET 0x4298 +/* Specifies number of cycles to assert reset, and also causes RB3D soft reset to assert. */ +#define R300_GA_SOFT_RESET 0x429c + +/* Not sure why there are duplicate of factor and constant values. + * My best guess so far is that there are seperate zbiases for test and write. + * Ordering might be wrong. + * Some of the tests indicate that fgl has a fallback implementation of zbias + * via pixel shaders. + */ +#define R300_SU_TEX_WRAP 0x42A0 +#define R300_SU_POLY_OFFSET_FRONT_SCALE 0x42A4 +#define R300_SU_POLY_OFFSET_FRONT_OFFSET 0x42A8 +#define R300_SU_POLY_OFFSET_BACK_SCALE 0x42AC +#define R300_SU_POLY_OFFSET_BACK_OFFSET 0x42B0 + +/* This register needs to be set to (1<<1) for RV350 to correctly + * perform depth test (see --vb-triangles in r300_demo) + * Don't know about other chips. - Vladimir + * This is set to 3 when GL_POLYGON_OFFSET_FILL is on. + * My guess is that there are two bits for each zbias primitive + * (FILL, LINE, POINT). + * One to enable depth test and one for depth write. + * Yet this doesnt explain why depth writes work ... + */ +#define R300_SU_POLY_OFFSET_ENABLE 0x42B4 +# define R300_FRONT_ENABLE (1 << 0) +# define R300_BACK_ENABLE (1 << 1) +# define R300_PARA_ENABLE (1 << 2) + +#define R300_SU_CULL_MODE 0x42B8 +# define R300_CULL_FRONT (1 << 0) +# define R300_CULL_BACK (1 << 1) +# define R300_FRONT_FACE_CCW (0 << 2) +# define R300_FRONT_FACE_CW (1 << 2) + +/* SU Depth Scale value */ +#define R300_SU_DEPTH_SCALE 0x42c0 +/* SU Depth Offset value */ +#define R300_SU_DEPTH_OFFSET 0x42c4 + + +/* BEGIN: Rasterization / Interpolators - many guesses */ + +/* + * TC_CNT is the number of incoming texture coordinate sets (i.e. it depends + * on the vertex program, *not* the fragment program) + */ +#define R300_RS_COUNT 0x4300 +# define R300_IT_COUNT_SHIFT 0 +# define R300_IT_COUNT_MASK 0x0000007f +# define R300_IC_COUNT_SHIFT 7 +# define R300_IC_COUNT_MASK 0x00000780 +# define R300_W_ADDR_SHIFT 12 +# define R300_W_ADDR_MASK 0x0003f000 +# define R300_HIRES_DIS (0 << 18) +# define R300_HIRES_EN (1 << 18) + +#define R300_RS_INST_COUNT 0x4304 +# define R300_RS_INST_COUNT_SHIFT 0 +# define R300_RS_INST_COUNT_MASK 0x0000000f +# define R300_RS_TX_OFFSET_SHIFT 5 +# define R300_RS_TX_OFFSET_MASK 0x000000e0 + +/* gap */ + +/* Only used for texture coordinates. + * Use the source field to route texture coordinate input from the + * vertex program to the desired interpolator. Note that the source + * field is relative to the outputs the vertex program *actually* + * writes. If a vertex program only writes texcoord[1], this will + * be source index 0. + * Set INTERP_USED on all interpolators that produce data used by + * the fragment program. INTERP_USED looks like a swizzling mask, + * but I haven't seen it used that way. + * + * Note: The _UNKNOWN constants are always set in their respective + * register. I don't know if this is necessary. + */ +#define R300_RS_IP_0 0x4310 +#define R300_RS_IP_1 0x4314 +#define R300_RS_IP_2 0x4318 +#define R300_RS_IP_3 0x431C +# define R300_RS_INTERP_SRC_SHIFT 2 /* TODO: check for removal */ +# define R300_RS_INTERP_SRC_MASK (7 << 2) /* TODO: check for removal */ +# define R300_RS_TEX_PTR(x) (x << 0) +# define R300_RS_COL_PTR(x) (x << 6) +# define R300_RS_COL_FMT(x) (x << 9) +# define R300_RS_COL_FMT_RGBA 0 +# define R300_RS_COL_FMT_RGB0 1 +# define R300_RS_COL_FMT_RGB1 2 +# define R300_RS_COL_FMT_000A 4 +# define R300_RS_COL_FMT_0000 5 +# define R300_RS_COL_FMT_0001 6 +# define R300_RS_COL_FMT_111A 8 +# define R300_RS_COL_FMT_1110 9 +# define R300_RS_COL_FMT_1111 10 +# define R300_RS_SEL_S(x) (x << 13) +# define R300_RS_SEL_T(x) (x << 16) +# define R300_RS_SEL_R(x) (x << 19) +# define R300_RS_SEL_Q(x) (x << 22) +# define R300_RS_SEL_C0 0 +# define R300_RS_SEL_C1 1 +# define R300_RS_SEL_C2 2 +# define R300_RS_SEL_C3 3 +# define R300_RS_SEL_K0 4 +# define R300_RS_SEL_K1 5 + + +/* */ +#define R500_RS_INST_0 0x4320 +#define R500_RS_INST_1 0x4324 +#define R500_RS_INST_2 0x4328 +#define R500_RS_INST_3 0x432c +#define R500_RS_INST_4 0x4330 +#define R500_RS_INST_5 0x4334 +#define R500_RS_INST_6 0x4338 +#define R500_RS_INST_7 0x433c +#define R500_RS_INST_8 0x4340 +#define R500_RS_INST_9 0x4344 +#define R500_RS_INST_10 0x4348 +#define R500_RS_INST_11 0x434c +#define R500_RS_INST_12 0x4350 +#define R500_RS_INST_13 0x4354 +#define R500_RS_INST_14 0x4358 +#define R500_RS_INST_15 0x435c +#define R500_RS_INST_TEX_ID_SHIFT 0 +#define R500_RS_INST_TEX_CN_WRITE (1 << 4) +#define R500_RS_INST_TEX_ADDR_SHIFT 5 +#define R500_RS_INST_COL_ID_SHIFT 12 +#define R500_RS_INST_COL_CN_NO_WRITE (0 << 16) +#define R500_RS_INST_COL_CN_WRITE (1 << 16) +#define R500_RS_INST_COL_CN_WRITE_FBUFFER (2 << 16) +#define R500_RS_INST_COL_CN_WRITE_BACKFACE (3 << 16) +#define R500_RS_INST_COL_ADDR_SHIFT 18 +#define R500_RS_INST_TEX_ADJ (1 << 25) +#define R500_RS_INST_W_CN (1 << 26) + +/* These DWORDs control how vertex data is routed into fragment program + * registers, after interpolators. + */ +#define R300_RS_INST_0 0x4330 +#define R300_RS_INST_1 0x4334 +#define R300_RS_INST_2 0x4338 +#define R300_RS_INST_3 0x433C /* GUESS */ +#define R300_RS_INST_4 0x4340 /* GUESS */ +#define R300_RS_INST_5 0x4344 /* GUESS */ +#define R300_RS_INST_6 0x4348 /* GUESS */ +#define R300_RS_INST_7 0x434C /* GUESS */ +# define R300_RS_INST_TEX_ID(x) ((x) << 0) +# define R300_RS_INST_TEX_CN_WRITE (1 << 3) +# define R300_RS_INST_TEX_ADDR_SHIFT 6 +# define R300_RS_INST_COL_ID(x) ((x) << 11) +# define R300_RS_INST_COL_CN_WRITE (1 << 14) +# define R300_RS_INST_COL_ADDR_SHIFT 17 +# define R300_RS_INST_TEX_ADJ (1 << 22) +# define R300_RS_COL_BIAS_UNUSED_SHIFT 23 + +/* END: Rasterization / Interpolators - many guesses */ + +/* Hierarchical Z Enable */ +#define R300_SC_HYPERZ 0x43a4 +# define R300_SC_HYPERZ_DISABLE (0 << 0) +# define R300_SC_HYPERZ_ENABLE (1 << 0) +# define R300_SC_HYPERZ_MIN (0 << 1) +# define R300_SC_HYPERZ_MAX (1 << 1) +# define R300_SC_HYPERZ_ADJ_256 (0 << 2) +# define R300_SC_HYPERZ_ADJ_128 (1 << 2) +# define R300_SC_HYPERZ_ADJ_64 (2 << 2) +# define R300_SC_HYPERZ_ADJ_32 (3 << 2) +# define R300_SC_HYPERZ_ADJ_16 (4 << 2) +# define R300_SC_HYPERZ_ADJ_8 (5 << 2) +# define R300_SC_HYPERZ_ADJ_4 (6 << 2) +# define R300_SC_HYPERZ_ADJ_2 (7 << 2) +# define R300_SC_HYPERZ_HZ_Z0MIN_NO (0 << 5) +# define R300_SC_HYPERZ_HZ_Z0MIN (1 << 5) +# define R300_SC_HYPERZ_HZ_Z0MAX_NO (0 << 6) +# define R300_SC_HYPERZ_HZ_Z0MAX (1 << 6) + +#define R300_SC_EDGERULE 0x43a8 + +/* BEGIN: Scissors and cliprects */ + +/* There are four clipping rectangles. Their corner coordinates are inclusive. + * Every pixel is assigned a number from 0 and 15 by setting bits 0-3 depending + * on whether the pixel is inside cliprects 0-3, respectively. For example, + * if a pixel is inside cliprects 0 and 1, but outside 2 and 3, it is assigned + * the number 3 (binary 0011). + * Iff the bit corresponding to the pixel's number in RE_CLIPRECT_CNTL is set, + * the pixel is rasterized. + * + * In addition to this, there is a scissors rectangle. Only pixels inside the + * scissors rectangle are drawn. (coordinates are inclusive) + * + * For some reason, the top-left corner of the framebuffer is at (1440, 1440) + * for the purpose of clipping and scissors. + */ +#define R300_SC_CLIPRECT_TL_0 0x43B0 +#define R300_SC_CLIPRECT_BR_0 0x43B4 +#define R300_SC_CLIPRECT_TL_1 0x43B8 +#define R300_SC_CLIPRECT_BR_1 0x43BC +#define R300_SC_CLIPRECT_TL_2 0x43C0 +#define R300_SC_CLIPRECT_BR_2 0x43C4 +#define R300_SC_CLIPRECT_TL_3 0x43C8 +#define R300_SC_CLIPRECT_BR_3 0x43CC +# define R300_CLIPRECT_OFFSET 1440 +# define R300_CLIPRECT_MASK 0x1FFF +# define R300_CLIPRECT_X_SHIFT 0 +# define R300_CLIPRECT_X_MASK (0x1FFF << 0) +# define R300_CLIPRECT_Y_SHIFT 13 +# define R300_CLIPRECT_Y_MASK (0x1FFF << 13) +#define R300_SC_CLIP_RULE 0x43D0 +# define R300_CLIP_OUT (1 << 0) +# define R300_CLIP_0 (1 << 1) +# define R300_CLIP_1 (1 << 2) +# define R300_CLIP_10 (1 << 3) +# define R300_CLIP_2 (1 << 4) +# define R300_CLIP_20 (1 << 5) +# define R300_CLIP_21 (1 << 6) +# define R300_CLIP_210 (1 << 7) +# define R300_CLIP_3 (1 << 8) +# define R300_CLIP_30 (1 << 9) +# define R300_CLIP_31 (1 << 10) +# define R300_CLIP_310 (1 << 11) +# define R300_CLIP_32 (1 << 12) +# define R300_CLIP_320 (1 << 13) +# define R300_CLIP_321 (1 << 14) +# define R300_CLIP_3210 (1 << 15) + +/* gap */ + +#define R300_SC_SCISSORS_TL 0x43E0 +#define R300_SC_SCISSORS_BR 0x43E4 +# define R300_SCISSORS_OFFSET 1440 +# define R300_SCISSORS_X_SHIFT 0 +# define R300_SCISSORS_X_MASK (0x1FFF << 0) +# define R300_SCISSORS_Y_SHIFT 13 +# define R300_SCISSORS_Y_MASK (0x1FFF << 13) + +/* Screen door sample mask */ +#define R300_SC_SCREENDOOR 0x43e8 + +/* END: Scissors and cliprects */ + +/* BEGIN: Texture specification */ + +/* + * The texture specification dwords are grouped by meaning and not by texture + * unit. This means that e.g. the offset for texture image unit N is found in + * register TX_OFFSET_0 + (4*N) + */ +#define R300_TX_FILTER0_0 0x4400 +#define R300_TX_FILTER0_1 0x4404 +#define R300_TX_FILTER0_2 0x4408 +#define R300_TX_FILTER0_3 0x440c +#define R300_TX_FILTER0_4 0x4410 +#define R300_TX_FILTER0_5 0x4414 +#define R300_TX_FILTER0_6 0x4418 +#define R300_TX_FILTER0_7 0x441c +#define R300_TX_FILTER0_8 0x4420 +#define R300_TX_FILTER0_9 0x4424 +#define R300_TX_FILTER0_10 0x4428 +#define R300_TX_FILTER0_11 0x442c +#define R300_TX_FILTER0_12 0x4430 +#define R300_TX_FILTER0_13 0x4434 +#define R300_TX_FILTER0_14 0x4438 +#define R300_TX_FILTER0_15 0x443c +# define R300_TX_REPEAT 0 +# define R300_TX_MIRRORED 1 +# define R300_TX_CLAMP_TO_EDGE 2 +# define R300_TX_MIRROR_ONCE_TO_EDGE 3 +# define R300_TX_CLAMP 4 +# define R300_TX_MIRROR_ONCE 5 +# define R300_TX_CLAMP_TO_BORDER 6 +# define R300_TX_MIRROR_ONCE_TO_BORDER 7 +# define R300_TX_WRAP_S_SHIFT 0 +# define R300_TX_WRAP_S_MASK (7 << 0) +# define R300_TX_WRAP_T_SHIFT 3 +# define R300_TX_WRAP_T_MASK (7 << 3) +# define R300_TX_WRAP_R_SHIFT 6 +# define R300_TX_WRAP_R_MASK (7 << 6) +# define R300_TX_MAG_FILTER_4 (0 << 9) +# define R300_TX_MAG_FILTER_NEAREST (1 << 9) +# define R300_TX_MAG_FILTER_LINEAR (2 << 9) +# define R300_TX_MAG_FILTER_ANISO (3 << 9) +# define R300_TX_MAG_FILTER_MASK (3 << 9) +# define R300_TX_MIN_FILTER_NEAREST (1 << 11) +# define R300_TX_MIN_FILTER_LINEAR (2 << 11) +# define R300_TX_MIN_FILTER_ANISO (3 << 11) +# define R300_TX_MIN_FILTER_MASK (3 << 11) +# define R300_TX_MIN_FILTER_MIP_NONE (0 << 13) +# define R300_TX_MIN_FILTER_MIP_NEAREST (1 << 13) +# define R300_TX_MIN_FILTER_MIP_LINEAR (2 << 13) +# define R300_TX_MIN_FILTER_MIP_MASK (3 << 13) +# define R300_TX_MAX_ANISO_1_TO_1 (0 << 21) +# define R300_TX_MAX_ANISO_2_TO_1 (1 << 21) +# define R300_TX_MAX_ANISO_4_TO_1 (2 << 21) +# define R300_TX_MAX_ANISO_8_TO_1 (3 << 21) +# define R300_TX_MAX_ANISO_16_TO_1 (4 << 21) +# define R300_TX_MAX_ANISO_MASK (7 << 21) + +#define R300_TX_FILTER1_0 0x4440 +# define R300_CHROMA_KEY_MODE_DISABLE 0 +# define R300_CHROMA_KEY_FORCE 1 +# define R300_CHROMA_KEY_BLEND 2 +# define R300_MC_ROUND_NORMAL (0<<2) +# define R300_MC_ROUND_MPEG4 (1<<2) +# define R300_LOD_BIAS_SHIFT 3 +# define R300_LOD_BIAS_MASK 0x1ff8 +# define R300_EDGE_ANISO_EDGE_DIAG (0<<13) +# define R300_EDGE_ANISO_EDGE_ONLY (1<<13) +# define R300_MC_COORD_TRUNCATE_DISABLE (0<<14) +# define R300_MC_COORD_TRUNCATE_MPEG (1<<14) +# define R300_TX_TRI_PERF_0_8 (0<<15) +# define R300_TX_TRI_PERF_1_8 (1<<15) +# define R300_TX_TRI_PERF_1_4 (2<<15) +# define R300_TX_TRI_PERF_3_8 (3<<15) +# define R300_ANISO_THRESHOLD_MASK (7<<17) + +# define R500_MACRO_SWITCH (1<<22) +# define R500_BORDER_FIX (1<<31) + +#define R300_TX_SIZE_0 0x4480 +# define R300_TX_WIDTHMASK_SHIFT 0 +# define R300_TX_WIDTHMASK_MASK (2047 << 0) +# define R300_TX_HEIGHTMASK_SHIFT 11 +# define R300_TX_HEIGHTMASK_MASK (2047 << 11) +# define R300_TX_DEPTHMASK_SHIFT 22 +# define R300_TX_DEPTHMASK_MASK (0xf << 22) +# define R300_TX_MAX_MIP_LEVEL_SHIFT 26 +# define R300_TX_MAX_MIP_LEVEL_MASK (0xf << 26) +# define R300_TX_SIZE_PROJECTED (1<<30) +# define R300_TX_SIZE_TXPITCH_EN (1<<31) +#define R300_TX_FORMAT_0 0x44C0 + /* The interpretation of the format word by Wladimir van der Laan */ + /* The X, Y, Z and W refer to the layout of the components. + They are given meanings as R, G, B and Alpha by the swizzle + specification */ +# define R300_TX_FORMAT_X8 0x0 +# define R500_TX_FORMAT_X1 0x0 // bit set in format 2 +# define R300_TX_FORMAT_X16 0x1 +# define R500_TX_FORMAT_X1_REV 0x0 // bit set in format 2 +# define R300_TX_FORMAT_Y4X4 0x2 +# define R300_TX_FORMAT_Y8X8 0x3 +# define R300_TX_FORMAT_Y16X16 0x4 +# define R300_TX_FORMAT_Z3Y3X2 0x5 +# define R300_TX_FORMAT_Z5Y6X5 0x6 +# define R300_TX_FORMAT_Z6Y5X5 0x7 +# define R300_TX_FORMAT_Z11Y11X10 0x8 +# define R300_TX_FORMAT_Z10Y11X11 0x9 +# define R300_TX_FORMAT_W4Z4Y4X4 0xA +# define R300_TX_FORMAT_W1Z5Y5X5 0xB +# define R300_TX_FORMAT_W8Z8Y8X8 0xC +# define R300_TX_FORMAT_W2Z10Y10X10 0xD +# define R300_TX_FORMAT_W16Z16Y16X16 0xE +# define R300_TX_FORMAT_DXT1 0xF +# define R300_TX_FORMAT_DXT3 0x10 +# define R300_TX_FORMAT_DXT5 0x11 +# define R300_TX_FORMAT_D3DMFT_CxV8U8 0x12 /* no swizzle */ +# define R300_TX_FORMAT_A8R8G8B8 0x13 /* no swizzle */ +# define R300_TX_FORMAT_B8G8_B8G8 0x14 /* no swizzle */ +# define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */ + + /* These two values are wrong, but they're the only values that + * produce any even vaguely correct results. Can r300 only do 16-bit + * depth textures? + */ +# define R300_TX_FORMAT_X24_Y8 0x1e +# define R300_TX_FORMAT_X32 0x1e + + /* 0x16 - some 16 bit green format.. ?? */ +# define R300_TX_FORMAT_3D (1 << 25) +# define R300_TX_FORMAT_CUBIC_MAP (2 << 25) + + /* gap */ + /* Floating point formats */ + /* Note - hardware supports both 16 and 32 bit floating point */ +# define R300_TX_FORMAT_FL_I16 0x18 +# define R300_TX_FORMAT_FL_I16A16 0x19 +# define R300_TX_FORMAT_FL_R16G16B16A16 0x1A +# define R300_TX_FORMAT_FL_I32 0x1B +# define R300_TX_FORMAT_FL_I32A32 0x1C +# define R300_TX_FORMAT_FL_R32G32B32A32 0x1D + /* alpha modes, convenience mostly */ + /* if you have alpha, pick constant appropriate to the + number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */ +# define R300_TX_FORMAT_ALPHA_1CH 0x000 +# define R300_TX_FORMAT_ALPHA_2CH 0x200 +# define R300_TX_FORMAT_ALPHA_4CH 0x600 +# define R300_TX_FORMAT_ALPHA_NONE 0xA00 + /* Swizzling */ + /* constants */ +# define R300_TX_FORMAT_X 0 +# define R300_TX_FORMAT_Y 1 +# define R300_TX_FORMAT_Z 2 +# define R300_TX_FORMAT_W 3 +# define R300_TX_FORMAT_ZERO 4 +# define R300_TX_FORMAT_ONE 5 + /* 2.0*Z, everything above 1.0 is set to 0.0 */ +# define R300_TX_FORMAT_CUT_Z 6 + /* 2.0*W, everything above 1.0 is set to 0.0 */ +# define R300_TX_FORMAT_CUT_W 7 + +# define R300_TX_FORMAT_B_SHIFT 18 +# define R300_TX_FORMAT_G_SHIFT 15 +# define R300_TX_FORMAT_R_SHIFT 12 +# define R300_TX_FORMAT_A_SHIFT 9 + /* Convenience macro to take care of layout and swizzling */ +# define R300_EASY_TX_FORMAT(B, G, R, A, FMT) ( \ + ((R300_TX_FORMAT_##B)< 0.5, return ARG0, else return ARG1 + * - CMP: If ARG2 < 0, return ARG1, else return ARG0 + * - FLR: use FRC+MAD + * - XPD: use MAD+MAD + * - SGE, SLT: use MAD+CMP + * - RSQ: use ABS modifier for argument + * - Use OUTC_REPL_ALPHA to write results of an alpha-only operation + * (e.g. RCP) into color register + * - apparently, there's no quick DST operation + * - fglrx set FPI2_UNKNOWN_31 on a "MAD fragment.color, tmp0, tmp1, tmp2" + * - fglrx set FPI2_UNKNOWN_31 on a "MAX r2, r1, c0" + * - fglrx once set FPI0_UNKNOWN_31 on a "FRC r1, r1" + * + * Operand selection + * First stage selects three sources from the available registers and + * constant parameters. This is defined in INSTR1 (color) and INSTR3 (alpha). + * fglrx sorts the three source fields: Registers before constants, + * lower indices before higher indices; I do not know whether this is + * necessary. + * + * fglrx fills unused sources with "read constant 0" + * According to specs, you cannot select more than two different constants. + * + * Second stage selects the operands from the sources. This is defined in + * INSTR0 (color) and INSTR2 (alpha). You can also select the special constants + * zero and one. + * Swizzling and negation happens in this stage, as well. + * + * Important: Color and alpha seem to be mostly separate, i.e. their sources + * selection appears to be fully independent (the register storage is probably + * physically split into a color and an alpha section). + * However (because of the apparent physical split), there is some interaction + * WRT swizzling. If, for example, you want to load an R component into an + * Alpha operand, this R component is taken from a *color* source, not from + * an alpha source. The corresponding register doesn't even have to appear in + * the alpha sources list. (I hope this all makes sense to you) + * + * Destination selection + * The destination register index is in FPI1 (color) and FPI3 (alpha) + * together with enable bits. + * There are separate enable bits for writing into temporary registers + * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_* + * /DSTA_OUTPUT). You can write to both at once, or not write at all (the + * same index must be used for both). + * + * Note: There is a special form for LRP + * - Argument order is the same as in ARB_fragment_program. + * - Operation is MAD + * - ARG1 is set to ARGC_SRC1C_LRP/ARGC_SRC1A_LRP + * - Set FPI0/FPI2_SPECIAL_LRP + * Arbitrary LRP (including support for swizzling) requires vanilla MAD+MAD + */ +#define R300_US_ALU_RGB_ADDR_0 0x46C0 +# define R300_ALU_SRC0C_SHIFT 0 +# define R300_ALU_SRC0C_MASK (31 << 0) +# define R300_ALU_SRC0C_CONST (1 << 5) +# define R300_ALU_SRC1C_SHIFT 6 +# define R300_ALU_SRC1C_MASK (31 << 6) +# define R300_ALU_SRC1C_CONST (1 << 11) +# define R300_ALU_SRC2C_SHIFT 12 +# define R300_ALU_SRC2C_MASK (31 << 12) +# define R300_ALU_SRC2C_CONST (1 << 17) +# define R300_ALU_SRC_MASK 0x0003ffff +# define R300_ALU_DSTC_SHIFT 18 +# define R300_ALU_DSTC_MASK (31 << 18) +# define R300_ALU_DSTC_REG_MASK_SHIFT 23 +# define R300_ALU_DSTC_REG_X (1 << 23) +# define R300_ALU_DSTC_REG_Y (1 << 24) +# define R300_ALU_DSTC_REG_Z (1 << 25) +# define R300_ALU_DSTC_OUTPUT_MASK_SHIFT 26 +# define R300_ALU_DSTC_OUTPUT_X (1 << 26) +# define R300_ALU_DSTC_OUTPUT_Y (1 << 27) +# define R300_ALU_DSTC_OUTPUT_Z (1 << 28) + +#define R300_US_ALU_ALPHA_ADDR_0 0x47C0 +# define R300_ALU_SRC0A_SHIFT 0 +# define R300_ALU_SRC0A_MASK (31 << 0) +# define R300_ALU_SRC0A_CONST (1 << 5) +# define R300_ALU_SRC1A_SHIFT 6 +# define R300_ALU_SRC1A_MASK (31 << 6) +# define R300_ALU_SRC1A_CONST (1 << 11) +# define R300_ALU_SRC2A_SHIFT 12 +# define R300_ALU_SRC2A_MASK (31 << 12) +# define R300_ALU_SRC2A_CONST (1 << 17) +# define R300_ALU_SRC_MASK 0x0003ffff +# define R300_ALU_DSTA_SHIFT 18 +# define R300_ALU_DSTA_MASK (31 << 18) +# define R300_ALU_DSTA_REG (1 << 23) +# define R300_ALU_DSTA_OUTPUT (1 << 24) +# define R300_ALU_DSTA_DEPTH (1 << 27) + +#define R300_US_ALU_RGB_INST_0 0x48C0 +# define R300_ALU_ARGC_SRC0C_XYZ 0 +# define R300_ALU_ARGC_SRC0C_XXX 1 +# define R300_ALU_ARGC_SRC0C_YYY 2 +# define R300_ALU_ARGC_SRC0C_ZZZ 3 +# define R300_ALU_ARGC_SRC1C_XYZ 4 +# define R300_ALU_ARGC_SRC1C_XXX 5 +# define R300_ALU_ARGC_SRC1C_YYY 6 +# define R300_ALU_ARGC_SRC1C_ZZZ 7 +# define R300_ALU_ARGC_SRC2C_XYZ 8 +# define R300_ALU_ARGC_SRC2C_XXX 9 +# define R300_ALU_ARGC_SRC2C_YYY 10 +# define R300_ALU_ARGC_SRC2C_ZZZ 11 +# define R300_ALU_ARGC_SRC0A 12 +# define R300_ALU_ARGC_SRC1A 13 +# define R300_ALU_ARGC_SRC2A 14 +# define R300_ALU_ARGC_SRCP_XYZ 15 +# define R300_ALU_ARGC_SRCP_XXX 16 +# define R300_ALU_ARGC_SRCP_YYY 17 +# define R300_ALU_ARGC_SRCP_ZZZ 18 +# define R300_ALU_ARGC_SRCP_WWW 19 +# define R300_ALU_ARGC_ZERO 20 +# define R300_ALU_ARGC_ONE 21 +# define R300_ALU_ARGC_HALF 22 +# define R300_ALU_ARGC_SRC0C_YZX 23 +# define R300_ALU_ARGC_SRC1C_YZX 24 +# define R300_ALU_ARGC_SRC2C_YZX 25 +# define R300_ALU_ARGC_SRC0C_ZXY 26 +# define R300_ALU_ARGC_SRC1C_ZXY 27 +# define R300_ALU_ARGC_SRC2C_ZXY 28 +# define R300_ALU_ARGC_SRC0CA_WZY 29 +# define R300_ALU_ARGC_SRC1CA_WZY 30 +# define R300_ALU_ARGC_SRC2CA_WZY 31 + +# define R300_ALU_ARG0C_SHIFT 0 +# define R300_ALU_ARG0C_MASK (31 << 0) +# define R300_ALU_ARG0C_NOP (0 << 5) +# define R300_ALU_ARG0C_NEG (1 << 5) +# define R300_ALU_ARG0C_ABS (2 << 5) +# define R300_ALU_ARG0C_NAB (3 << 5) +# define R300_ALU_ARG1C_SHIFT 7 +# define R300_ALU_ARG1C_MASK (31 << 7) +# define R300_ALU_ARG1C_NOP (0 << 12) +# define R300_ALU_ARG1C_NEG (1 << 12) +# define R300_ALU_ARG1C_ABS (2 << 12) +# define R300_ALU_ARG1C_NAB (3 << 12) +# define R300_ALU_ARG2C_SHIFT 14 +# define R300_ALU_ARG2C_MASK (31 << 14) +# define R300_ALU_ARG2C_NOP (0 << 19) +# define R300_ALU_ARG2C_NEG (1 << 19) +# define R300_ALU_ARG2C_ABS (2 << 19) +# define R300_ALU_ARG2C_NAB (3 << 19) +# define R300_ALU_SRCP_1_MINUS_2_SRC0 (0 << 21) +# define R300_ALU_SRCP_SRC1_MINUS_SRC0 (1 << 21) +# define R300_ALU_SRCP_SRC1_PLUS_SRC0 (2 << 21) +# define R300_ALU_SRCP_1_MINUS_SRC0 (3 << 21) + +# define R300_ALU_OUTC_MAD (0 << 23) +# define R300_ALU_OUTC_DP3 (1 << 23) +# define R300_ALU_OUTC_DP4 (2 << 23) +# define R300_ALU_OUTC_D2A (3 << 23) +# define R300_ALU_OUTC_MIN (4 << 23) +# define R300_ALU_OUTC_MAX (5 << 23) +# define R300_ALU_OUTC_CMPH (7 << 23) +# define R300_ALU_OUTC_CMP (8 << 23) +# define R300_ALU_OUTC_FRC (9 << 23) +# define R300_ALU_OUTC_REPL_ALPHA (10 << 23) + +# define R300_ALU_OUTC_MOD_NOP (0 << 27) +# define R300_ALU_OUTC_MOD_MUL2 (1 << 27) +# define R300_ALU_OUTC_MOD_MUL4 (2 << 27) +# define R300_ALU_OUTC_MOD_MUL8 (3 << 27) +# define R300_ALU_OUTC_MOD_DIV2 (4 << 27) +# define R300_ALU_OUTC_MOD_DIV4 (5 << 27) +# define R300_ALU_OUTC_MOD_DIV8 (6 << 27) + +# define R300_ALU_OUTC_CLAMP (1 << 30) +# define R300_ALU_INSERT_NOP (1 << 31) + +#define R300_US_ALU_ALPHA_INST_0 0x49C0 +# define R300_ALU_ARGA_SRC0C_X 0 +# define R300_ALU_ARGA_SRC0C_Y 1 +# define R300_ALU_ARGA_SRC0C_Z 2 +# define R300_ALU_ARGA_SRC1C_X 3 +# define R300_ALU_ARGA_SRC1C_Y 4 +# define R300_ALU_ARGA_SRC1C_Z 5 +# define R300_ALU_ARGA_SRC2C_X 6 +# define R300_ALU_ARGA_SRC2C_Y 7 +# define R300_ALU_ARGA_SRC2C_Z 8 +# define R300_ALU_ARGA_SRC0A 9 +# define R300_ALU_ARGA_SRC1A 10 +# define R300_ALU_ARGA_SRC2A 11 +# define R300_ALU_ARGA_SRCP_X 12 +# define R300_ALU_ARGA_SRCP_Y 13 +# define R300_ALU_ARGA_SRCP_Z 14 +# define R300_ALU_ARGA_SRCP_W 15 + +# define R300_ALU_ARGA_ZERO 16 +# define R300_ALU_ARGA_ONE 17 +# define R300_ALU_ARGA_HALF 18 +# define R300_ALU_ARG0A_SHIFT 0 +# define R300_ALU_ARG0A_MASK (31 << 0) +# define R300_ALU_ARG0A_NOP (0 << 5) +# define R300_ALU_ARG0A_NEG (1 << 5) +# define R300_ALU_ARG0A_ABS (2 << 5) +# define R300_ALU_ARG0A_NAB (3 << 5) +# define R300_ALU_ARG1A_SHIFT 7 +# define R300_ALU_ARG1A_MASK (31 << 7) +# define R300_ALU_ARG1A_NOP (0 << 12) +# define R300_ALU_ARG1A_NEG (1 << 12) +# define R300_ALU_ARG1A_ABS (2 << 12) +# define R300_ALU_ARG1A_NAB (3 << 12) +# define R300_ALU_ARG2A_SHIFT 14 +# define R300_ALU_ARG2A_MASK (31 << 14) +# define R300_ALU_ARG2A_NOP (0 << 19) +# define R300_ALU_ARG2A_NEG (1 << 19) +# define R300_ALU_ARG2A_ABS (2 << 19) +# define R300_ALU_ARG2A_NAB (3 << 19) +# define R300_ALU_SRCP_1_MINUS_2_SRC0 (0 << 21) +# define R300_ALU_SRCP_SRC1_MINUS_SRC0 (1 << 21) +# define R300_ALU_SRCP_SRC1_PLUS_SRC0 (2 << 21) +# define R300_ALU_SRCP_1_MINUS_SRC0 (3 << 21) + +# define R300_ALU_OUTA_MAD (0 << 23) +# define R300_ALU_OUTA_DP4 (1 << 23) +# define R300_ALU_OUTA_MIN (2 << 23) +# define R300_ALU_OUTA_MAX (3 << 23) +# define R300_ALU_OUTA_CND (5 << 23) +# define R300_ALU_OUTA_CMP (6 << 23) +# define R300_ALU_OUTA_FRC (7 << 23) +# define R300_ALU_OUTA_EX2 (8 << 23) +# define R300_ALU_OUTA_LG2 (9 << 23) +# define R300_ALU_OUTA_RCP (10 << 23) +# define R300_ALU_OUTA_RSQ (11 << 23) + +# define R300_ALU_OUTA_MOD_NOP (0 << 27) +# define R300_ALU_OUTA_MOD_MUL2 (1 << 27) +# define R300_ALU_OUTA_MOD_MUL4 (2 << 27) +# define R300_ALU_OUTA_MOD_MUL8 (3 << 27) +# define R300_ALU_OUTA_MOD_DIV2 (4 << 27) +# define R300_ALU_OUTA_MOD_DIV4 (5 << 27) +# define R300_ALU_OUTA_MOD_DIV8 (6 << 27) + +# define R300_ALU_OUTA_CLAMP (1 << 30) +/* END: Fragment program instruction set */ + +/* Fog: Fog Blending Enable */ +#define R300_FG_FOG_BLEND 0x4bc0 +# define R300_FG_FOG_BLEND_DISABLE (0 << 0) +# define R300_FG_FOG_BLEND_ENABLE (1 << 0) +# define R300_FG_FOG_BLEND_FN_LINEAR (0 << 1) +# define R300_FG_FOG_BLEND_FN_EXP (1 << 1) +# define R300_FG_FOG_BLEND_FN_EXP2 (2 << 1) +# define R300_FG_FOG_BLEND_FN_CONSTANT (3 << 1) +# define R300_FG_FOG_BLEND_FN_MASK (3 << 1) + +/* Fog: Red Component of Fog Color */ +#define R300_FG_FOG_COLOR_R 0x4bc8 +/* Fog: Green Component of Fog Color */ +#define R300_FG_FOG_COLOR_G 0x4bcc +/* Fog: Blue Component of Fog Color */ +#define R300_FG_FOG_COLOR_B 0x4bd0 +# define R300_FG_FOG_COLOR_MASK 0x000003ff + +/* Fog: Constant Factor for Fog Blending */ +#define R300_FG_FOG_FACTOR 0x4bc4 +# define FG_FOG_FACTOR_MASK 0x000003ff + +/* Fog: Alpha function */ +#define R300_FG_ALPHA_FUNC 0x4bd4 +# define R300_FG_ALPHA_FUNC_VAL_MASK 0x000000ff +# define R300_FG_ALPHA_FUNC_NEVER (0 << 8) +# define R300_FG_ALPHA_FUNC_LESS (1 << 8) +# define R300_FG_ALPHA_FUNC_EQUAL (2 << 8) +# define R300_FG_ALPHA_FUNC_LE (3 << 8) +# define R300_FG_ALPHA_FUNC_GREATER (4 << 8) +# define R300_FG_ALPHA_FUNC_NOTEQUAL (5 << 8) +# define R300_FG_ALPHA_FUNC_GE (6 << 8) +# define R300_FG_ALPHA_FUNC_ALWAYS (7 << 8) +# define R300_ALPHA_TEST_OP_MASK (7 << 8) +# define R300_FG_ALPHA_FUNC_DISABLE (0 << 11) +# define R300_FG_ALPHA_FUNC_ENABLE (1 << 11) + +# define R500_FG_ALPHA_FUNC_10BIT (0 << 12) +# define R500_FG_ALPHA_FUNC_8BIT (1 << 12) + +# define R300_FG_ALPHA_FUNC_MASK_DISABLE (0 << 16) +# define R300_FG_ALPHA_FUNC_MASK_ENABLE (1 << 16) +# define R300_FG_ALPHA_FUNC_CFG_2_OF_4 (0 << 17) +# define R300_FG_ALPHA_FUNC_CFG_3_OF_6 (1 << 17) + +# define R300_FG_ALPHA_FUNC_DITH_DISABLE (0 << 20) +# define R300_FG_ALPHA_FUNC_DITH_ENABLE (1 << 20) + +# define R500_FG_ALPHA_FUNC_OFFSET_DISABLE (0 << 24) +# define R500_FG_ALPHA_FUNC_OFFSET_ENABLE (1 << 24) /* Not supported in R520 */ +# define R500_FG_ALPHA_FUNC_DISC_ZERO_MASK_DISABLE (0 << 25) +# define R500_FG_ALPHA_FUNC_DISC_ZERO_MASK_ENABLE (1 << 25) + +# define R500_FG_ALPHA_FUNC_FP16_DISABLE (0 << 28) +# define R500_FG_ALPHA_FUNC_FP16_ENABLE (1 << 28) + + +/* Fog: Where does the depth come from? */ +#define R300_FG_DEPTH_SRC 0x4bd8 +# define R300_FG_DEPTH_SRC_SCAN (0 << 0) +# define R300_FG_DEPTH_SRC_SHADER (1 << 0) + +/* Fog: Alpha Compare Value */ +#define R500_FG_ALPHA_VALUE 0x4be0 +# define R500_FG_ALPHA_VALUE_MASK 0x0000ffff + +/* gap */ + +/* Fragment program parameters in 7.16 floating point */ +#define R300_PFS_PARAM_0_X 0x4C00 +#define R300_PFS_PARAM_0_Y 0x4C04 +#define R300_PFS_PARAM_0_Z 0x4C08 +#define R300_PFS_PARAM_0_W 0x4C0C +/* last consts */ +#define R300_PFS_PARAM_31_X 0x4DF0 +#define R300_PFS_PARAM_31_Y 0x4DF4 +#define R300_PFS_PARAM_31_Z 0x4DF8 +#define R300_PFS_PARAM_31_W 0x4DFC + +/* Unpipelined. */ +#define R300_RB3D_CCTL 0x4e00 +# define R300_RB3D_CCTL_NUM_MULTIWRITES_1_BUFFER (0 << 5) +# define R300_RB3D_CCTL_NUM_MULTIWRITES_2_BUFFERS (1 << 5) +# define R300_RB3D_CCTL_NUM_MULTIWRITES_3_BUFFERS (2 << 5) +# define R300_RB3D_CCTL_NUM_MULTIWRITES_4_BUFFERS (3 << 5) +# define R300_RB3D_CCTL_CLRCMP_FLIPE_DISABLE (0 << 7) +# define R300_RB3D_CCTL_CLRCMP_FLIPE_ENABLE (1 << 7) +# define R300_RB3D_CCTL_AA_COMPRESSION_DISABLE (0 << 9) +# define R300_RB3D_CCTL_AA_COMPRESSION_ENABLE (1 << 9) +# define R300_RB3D_CCTL_CMASK_DISABLE (0 << 10) +# define R300_RB3D_CCTL_CMASK_ENABLE (1 << 10) +/* reserved */ +# define R300_RB3D_CCTL_INDEPENDENT_COLOR_CHANNEL_MASK_DISABLE (0 << 12) +# define R300_RB3D_CCTL_INDEPENDENT_COLOR_CHANNEL_MASK_ENABLE (1 << 12) +# define R300_RB3D_CCTL_WRITE_COMPRESSION_ENABLE (0 << 13) +# define R300_RB3D_CCTL_WRITE_COMPRESSION_DISABLE (1 << 13) +# define R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_DISABLE (0 << 14) +# define R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE (1 << 14) + + +/* Notes: + * - AFAIK fglrx always sets BLEND_UNKNOWN when blending is used in + * the application + * - AFAIK fglrx always sets BLEND_NO_SEPARATE when CBLEND and ABLEND + * are set to the same + * function (both registers are always set up completely in any case) + * - Most blend flags are simply copied from R200 and not tested yet + */ +#define R300_RB3D_CBLEND 0x4E04 +#define R300_RB3D_ABLEND 0x4E08 +/* the following only appear in CBLEND */ +# define R300_ALPHA_BLEND_ENABLE (1 << 0) +# define R300_SEPARATE_ALPHA_ENABLE (1 << 1) +# define R300_READ_ENABLE (1 << 2) +# define R300_DISCARD_SRC_PIXELS_DIS (0 << 3) +# define R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0 (1 << 3) +# define R300_DISCARD_SRC_PIXELS_SRC_COLOR_0 (2 << 3) +# define R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0 (3 << 3) +# define R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1 (4 << 3) +# define R300_DISCARD_SRC_PIXELS_SRC_COLOR_1 (5 << 3) +# define R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1 (6 << 3) + +/* the following are shared between CBLEND and ABLEND */ +# define R300_FCN_MASK (3 << 12) +# define R300_COMB_FCN_ADD_CLAMP (0 << 12) +# define R300_COMB_FCN_ADD_NOCLAMP (1 << 12) +# define R300_COMB_FCN_SUB_CLAMP (2 << 12) +# define R300_COMB_FCN_SUB_NOCLAMP (3 << 12) +# define R300_COMB_FCN_MIN (4 << 12) +# define R300_COMB_FCN_MAX (5 << 12) +# define R300_COMB_FCN_RSUB_CLAMP (6 << 12) +# define R300_COMB_FCN_RSUB_NOCLAMP (7 << 12) +# define R300_BLEND_GL_ZERO (32) +# define R300_BLEND_GL_ONE (33) +# define R300_BLEND_GL_SRC_COLOR (34) +# define R300_BLEND_GL_ONE_MINUS_SRC_COLOR (35) +# define R300_BLEND_GL_DST_COLOR (36) +# define R300_BLEND_GL_ONE_MINUS_DST_COLOR (37) +# define R300_BLEND_GL_SRC_ALPHA (38) +# define R300_BLEND_GL_ONE_MINUS_SRC_ALPHA (39) +# define R300_BLEND_GL_DST_ALPHA (40) +# define R300_BLEND_GL_ONE_MINUS_DST_ALPHA (41) +# define R300_BLEND_GL_SRC_ALPHA_SATURATE (42) +# define R300_BLEND_GL_CONST_COLOR (43) +# define R300_BLEND_GL_ONE_MINUS_CONST_COLOR (44) +# define R300_BLEND_GL_CONST_ALPHA (45) +# define R300_BLEND_GL_ONE_MINUS_CONST_ALPHA (46) +# define R300_BLEND_MASK (63) +# define R300_SRC_BLEND_SHIFT (16) +# define R300_DST_BLEND_SHIFT (24) + +/* Constant color used by the blender. Pipelined through the blender. + * Note: For R520, this field is ignored, use RB3D_CONSTANT_COLOR_GB__BLUE, + * RB3D_CONSTANT_COLOR_GB__GREEN, etc. instead. + */ +#define R300_RB3D_BLEND_COLOR 0x4E10 + + +/* 3D Color Channel Mask. If all the channels used in the current color format + * are disabled, then the cb will discard all the incoming quads. Pipelined + * through the blender. + */ +#define RB3D_COLOR_CHANNEL_MASK 0x4E0C +# define RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0 (1 << 0) +# define RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0 (1 << 1) +# define RB3D_COLOR_CHANNEL_MASK_RED_MASK0 (1 << 2) +# define RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0 (1 << 3) +# define RB3D_COLOR_CHANNEL_MASK_BLUE_MASK1 (1 << 4) +# define RB3D_COLOR_CHANNEL_MASK_GREEN_MASK1 (1 << 5) +# define RB3D_COLOR_CHANNEL_MASK_RED_MASK1 (1 << 6) +# define RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK1 (1 << 7) +# define RB3D_COLOR_CHANNEL_MASK_BLUE_MASK2 (1 << 8) +# define RB3D_COLOR_CHANNEL_MASK_GREEN_MASK2 (1 << 9) +# define RB3D_COLOR_CHANNEL_MASK_RED_MASK2 (1 << 10) +# define RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK2 (1 << 11) +# define RB3D_COLOR_CHANNEL_MASK_BLUE_MASK3 (1 << 12) +# define RB3D_COLOR_CHANNEL_MASK_GREEN_MASK3 (1 << 13) +# define RB3D_COLOR_CHANNEL_MASK_RED_MASK3 (1 << 14) +# define RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK3 (1 << 15) + +/* Clear color that is used when the color mask is set to 00. Unpipelined. + * Program this register with a 32-bit value in ARGB8888 or ARGB2101010 + * formats, ignoring the fields. + */ +#define RB3D_COLOR_CLEAR_VALUE 0x4e14 + +/* gap */ + +/* Color Compare Color. Stalls the 2d/3d datapath until it is idle. */ +#define RB3D_CLRCMP_CLR 0x4e20 + +/* Color Compare Mask. Stalls the 2d/3d datapath until it is idle. */ +#define RB3D_CLRCMP_MSK 0x4e24 + +/* Color Buffer Address Offset of multibuffer 0. Unpipelined. */ +#define R300_RB3D_COLOROFFSET0 0x4E28 +# define R300_COLOROFFSET_MASK 0xFFFFFFE0 +/* Color Buffer Address Offset of multibuffer 1. Unpipelined. */ +#define R300_RB3D_COLOROFFSET1 0x4E2C +/* Color Buffer Address Offset of multibuffer 2. Unpipelined. */ +#define R300_RB3D_COLOROFFSET2 0x4E30 +/* Color Buffer Address Offset of multibuffer 3. Unpipelined. */ +#define R300_RB3D_COLOROFFSET3 0x4E34 + +/* Color buffer format and tiling control for all the multibuffers and the + * pitch of multibuffer 0 to 3. Unpipelined. The cache must be empty before any + * of the registers are changed. + * + * Bit 16: Larger tiles + * Bit 17: 4x2 tiles + * Bit 18: Extremely weird tile like, but some pixels duplicated? + */ +#define R300_RB3D_COLORPITCH0 0x4E38 +# define R300_COLORPITCH_MASK 0x00003FFE +# define R300_COLOR_TILE_DISABLE (0 << 16) +# define R300_COLOR_TILE_ENABLE (1 << 16) +# define R300_COLOR_MICROTILE_DISABLE (0 << 17) +# define R300_COLOR_MICROTILE_ENABLE (1 << 17) +# define R300_COLOR_MICROTILE_ENABLE_SQUARE (2 << 17) /* Only available in 16-bit */ +# define R300_COLOR_ENDIAN_NO_SWAP (0 << 19) +# define R300_COLOR_ENDIAN_WORD_SWAP (1 << 19) +# define R300_COLOR_ENDIAN_DWORD_SWAP (2 << 19) +# define R300_COLOR_ENDIAN_HALF_DWORD_SWAP (3 << 19) +# define R500_COLOR_FORMAT_ARGB10101010 (0 << 21) +# define R500_COLOR_FORMAT_UV1010 (1 << 21) +# define R500_COLOR_FORMAT_CI8 (2 << 21) /* 2D only */ +# define R300_COLOR_FORMAT_ARGB1555 (3 << 21) +# define R300_COLOR_FORMAT_RGB565 (4 << 21) +# define R500_COLOR_FORMAT_ARGB2101010 (5 << 21) +# define R300_COLOR_FORMAT_ARGB8888 (6 << 21) +# define R300_COLOR_FORMAT_ARGB32323232 (7 << 21) +/* reserved */ +# define R300_COLOR_FORMAT_I8 (9 << 21) +# define R300_COLOR_FORMAT_ARGB16161616 (10 << 21) +# define R300_COLOR_FORMAT_VYUY (11 << 21) +# define R300_COLOR_FORMAT_YVYU (12 << 21) +# define R300_COLOR_FORMAT_UV88 (13 << 21) +# define R500_COLOR_FORMAT_I10 (14 << 21) +# define R300_COLOR_FORMAT_ARGB4444 (15 << 21) +#define R300_RB3D_COLORPITCH1 0x4E3C +#define R300_RB3D_COLORPITCH2 0x4E40 +#define R300_RB3D_COLORPITCH3 0x4E44 + +/* gap */ + +/* Destination Color Buffer Cache Control/Status. If the cb is in e2 mode, then + * a flush or free will not occur upon a write to this register, but a sync + * will be immediately sent if one is requested. If both DC_FLUSH and DC_FREE + * are zero but DC_FINISH is one, then a sync will be sent immediately -- the + * cb will not wait for all the previous operations to complete before sending + * the sync. Unpipelined except when DC_FINISH and DC_FREE are both set to + * zero. + * + * Set to 0A before 3D operations, set to 02 afterwards. + */ +#define R300_RB3D_DSTCACHE_CTLSTAT 0x4e4c +# define R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_NO_EFFECT (0 << 0) +# define R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_NO_EFFECT_1 (1 << 0) +# define R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D (2 << 0) +# define R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D_1 (3 << 0) +# define R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_NO_EFFECT (0 << 2) +# define R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_NO_EFFECT_1 (1 << 2) +# define R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS (2 << 2) +# define R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS_1 (3 << 2) +# define R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_NO_SIGNAL (0 << 4) +# define R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_SIGNAL (1 << 4) + +#define R300_RB3D_DITHER_CTL 0x4E50 +# define R300_RB3D_DITHER_CTL_DITHER_MODE_TRUNCATE (0 << 0) +# define R300_RB3D_DITHER_CTL_DITHER_MODE_ROUND (1 << 0) +# define R300_RB3D_DITHER_CTL_DITHER_MODE_LUT (2 << 0) +/* reserved */ +# define R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_TRUNCATE (0 << 2) +# define R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_ROUND (1 << 2) +# define R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT (2 << 2) +/* reserved */ + +/* Resolve buffer destination address. The cache must be empty before changing + * this register if the cb is in resolve mode. Unpipelined + */ +#define R300_RB3D_AARESOLVE_OFFSET 0x4e80 +# define R300_RB3D_AARESOLVE_OFFSET_SHIFT 5 +# define R300_RB3D_AARESOLVE_OFFSET_MASK 0xffffffe0 /* At least according to the calculations of Christoph Brill */ + +/* Resolve Buffer Pitch and Tiling Control. The cache must be empty before + * changing this register if the cb is in resolve mode. Unpipelined + */ +#define R300_RB3D_AARESOLVE_PITCH 0x4e84 +# define R300_RB3D_AARESOLVE_PITCH_SHIFT 1 +# define R300_RB3D_AARESOLVE_PITCH_MASK 0x00003ffe /* At least according to the calculations of Christoph Brill */ + +/* Resolve Buffer Control. Unpipelined */ +#define R300_RB3D_AARESOLVE_CTL 0x4e88 +# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_NORMAL (0 << 0) +# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE (1 << 0) +# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_GAMMA_10 (0 << 1) +# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_GAMMA_22 (1 << 1) +# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_SAMPLE0 (0 << 2) +# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE (1 << 2) + + +/* Discard src pixels less than or equal to threshold. */ +#define R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD 0x4ea0 +/* Discard src pixels greater than or equal to threshold. */ +#define R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD 0x4ea4 +# define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_BLUE_SHIFT 0 +# define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_BLUE_MASK 0x000000ff +# define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_GREEN_SHIFT 8 +# define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_GREEN_MASK 0x0000ff00 +# define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_RED_SHIFT 16 +# define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_RED_MASK 0x00ff0000 +# define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_ALPHA_SHIFT 24 +# define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_ALPHA_MASK 0xff000000 + +/* 3D ROP Control. Stalls the 2d/3d datapath until it is idle. */ +#define R300_RB3D_ROPCNTL 0x4e18 +# define R300_RB3D_ROPCNTL_ROP_ENABLE 0x00000004 +# define R300_RB3D_ROPCNTL_ROP_MASK (15 << 8) +# define R300_RB3D_ROPCNTL_ROP_SHIFT 8 + +/* Color Compare Flip. Stalls the 2d/3d datapath until it is idle. */ +#define R300_RB3D_CLRCMP_FLIPE 0x4e1c + +/* Sets the fifo sizes */ +#define R500_RB3D_FIFO_SIZE 0x4ef4 +# define R500_RB3D_FIFO_SIZE_OP_FIFO_SIZE_FULL (0 << 0) +# define R500_RB3D_FIFO_SIZE_OP_FIFO_SIZE_HALF (1 << 0) +# define R500_RB3D_FIFO_SIZE_OP_FIFO_SIZE_QUATER (2 << 0) +# define R500_RB3D_FIFO_SIZE_OP_FIFO_SIZE_EIGTHS (3 << 0) + +/* Constant color used by the blender. Pipelined through the blender. */ +#define R500_RB3D_CONSTANT_COLOR_AR 0x4ef8 +# define R500_RB3D_CONSTANT_COLOR_AR_RED_MASK 0x0000ffff +# define R500_RB3D_CONSTANT_COLOR_AR_RED_SHIFT 0 +# define R500_RB3D_CONSTANT_COLOR_AR_ALPHA_MASK 0xffff0000 +# define R500_RB3D_CONSTANT_COLOR_AR_ALPHA_SHIFT 16 + +/* Constant color used by the blender. Pipelined through the blender. */ +#define R500_RB3D_CONSTANT_COLOR_GB 0x4efc +# define R500_RB3D_CONSTANT_COLOR_AR_BLUE_MASK 0x0000ffff +# define R500_RB3D_CONSTANT_COLOR_AR_BLUE_SHIFT 0 +# define R500_RB3D_CONSTANT_COLOR_AR_GREEN_MASK 0xffff0000 +# define R500_RB3D_CONSTANT_COLOR_AR_GREEN_SHIFT 16 + +/* gap */ +/* There seems to be no "write only" setting, so use Z-test = ALWAYS + * for this. + * Bit (1<<8) is the "test" bit. so plain write is 6 - vd + */ +#define R300_ZB_CNTL 0x4F00 +# define R300_STENCIL_ENABLE (1 << 0) +# define R300_Z_ENABLE (1 << 1) +# define R300_Z_WRITE_ENABLE (1 << 2) +# define R300_Z_SIGNED_COMPARE (1 << 3) +# define R300_STENCIL_FRONT_BACK (1 << 4) + +#define R300_ZB_ZSTENCILCNTL 0x4f04 + /* functions */ +# define R300_ZS_NEVER 0 +# define R300_ZS_LESS 1 +# define R300_ZS_LEQUAL 2 +# define R300_ZS_EQUAL 3 +# define R300_ZS_GEQUAL 4 +# define R300_ZS_GREATER 5 +# define R300_ZS_NOTEQUAL 6 +# define R300_ZS_ALWAYS 7 +# define R300_ZS_MASK 7 + /* operations */ +# define R300_ZS_KEEP 0 +# define R300_ZS_ZERO 1 +# define R300_ZS_REPLACE 2 +# define R300_ZS_INCR 3 +# define R300_ZS_DECR 4 +# define R300_ZS_INVERT 5 +# define R300_ZS_INCR_WRAP 6 +# define R300_ZS_DECR_WRAP 7 +# define R300_Z_FUNC_SHIFT 0 + /* front and back refer to operations done for front + and back faces, i.e. separate stencil function support */ +# define R300_S_FRONT_FUNC_SHIFT 3 +# define R300_S_FRONT_SFAIL_OP_SHIFT 6 +# define R300_S_FRONT_ZPASS_OP_SHIFT 9 +# define R300_S_FRONT_ZFAIL_OP_SHIFT 12 +# define R300_S_BACK_FUNC_SHIFT 15 +# define R300_S_BACK_SFAIL_OP_SHIFT 18 +# define R300_S_BACK_ZPASS_OP_SHIFT 21 +# define R300_S_BACK_ZFAIL_OP_SHIFT 24 + +#define R300_ZB_STENCILREFMASK 0x4f08 +# define R300_STENCILREF_SHIFT 0 +# define R300_STENCILREF_MASK 0x000000ff +# define R300_STENCILMASK_SHIFT 8 +# define R300_STENCILMASK_MASK 0x0000ff00 +# define R300_STENCILWRITEMASK_SHIFT 16 +# define R300_STENCILWRITEMASK_MASK 0x00ff0000 + +/* gap */ + +#define R300_ZB_FORMAT 0x4f10 +# define R300_DEPTHFORMAT_16BIT_INT_Z (0 << 0) +# define R300_DEPTHFORMAT_16BIT_13E3 (1 << 0) +# define R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL (2 << 0) +/* reserved up to (15 << 0) */ +# define R300_INVERT_13E3_LEADING_ONES (0 << 4) +# define R300_INVERT_13E3_LEADING_ZEROS (1 << 4) + +#define R300_ZB_ZTOP 0x4F14 +# define R300_ZTOP_DISABLE (0 << 0) +# define R300_ZTOP_ENABLE (1 << 0) + +/* gap */ + +#define R300_ZB_ZCACHE_CTLSTAT 0x4f18 +# define R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_NO_EFFECT (0 << 0) +# define R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE (1 << 0) +# define R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_NO_EFFECT (0 << 1) +# define R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE (1 << 1) +# define R300_ZB_ZCACHE_CTLSTAT_ZC_BUSY_IDLE (0 << 31) +# define R300_ZB_ZCACHE_CTLSTAT_ZC_BUSY_BUSY (1 << 31) + +#define R300_ZB_BW_CNTL 0x4f1c +# define R300_HIZ_DISABLE (0 << 0) +# define R300_HIZ_ENABLE (1 << 0) +# define R300_HIZ_MIN (0 << 1) +# define R300_HIZ_MAX (1 << 1) +# define R300_FAST_FILL_DISABLE (0 << 2) +# define R300_FAST_FILL_ENABLE (1 << 2) +# define R300_RD_COMP_DISABLE (0 << 3) +# define R300_RD_COMP_ENABLE (1 << 3) +# define R300_WR_COMP_DISABLE (0 << 4) +# define R300_WR_COMP_ENABLE (1 << 4) +# define R300_ZB_CB_CLEAR_RMW (0 << 5) +# define R300_ZB_CB_CLEAR_CACHE_LINEAR (1 << 5) +# define R300_FORCE_COMPRESSED_STENCIL_VALUE_DISABLE (0 << 6) +# define R300_FORCE_COMPRESSED_STENCIL_VALUE_ENABLE (1 << 6) + +# define R500_ZEQUAL_OPTIMIZE_ENABLE (0 << 7) +# define R500_ZEQUAL_OPTIMIZE_DISABLE (1 << 7) +# define R500_SEQUAL_OPTIMIZE_ENABLE (0 << 8) +# define R500_SEQUAL_OPTIMIZE_DISABLE (1 << 8) + +# define R500_BMASK_ENABLE (0 << 10) +# define R500_BMASK_DISABLE (1 << 10) +# define R500_HIZ_EQUAL_REJECT_DISABLE (0 << 11) +# define R500_HIZ_EQUAL_REJECT_ENABLE (1 << 11) +# define R500_HIZ_FP_EXP_BITS_DISABLE (0 << 12) +# define R500_HIZ_FP_EXP_BITS_1 (1 << 12) +# define R500_HIZ_FP_EXP_BITS_2 (2 << 12) +# define R500_HIZ_FP_EXP_BITS_3 (3 << 12) +# define R500_HIZ_FP_EXP_BITS_4 (4 << 12) +# define R500_HIZ_FP_EXP_BITS_5 (5 << 12) +# define R500_HIZ_FP_INVERT_LEADING_ONES (0 << 15) +# define R500_HIZ_FP_INVERT_LEADING_ZEROS (1 << 15) +# define R500_TILE_OVERWRITE_RECOMPRESSION_ENABLE (0 << 16) +# define R500_TILE_OVERWRITE_RECOMPRESSION_DISABLE (1 << 16) +# define R500_CONTIGUOUS_6XAA_SAMPLES_ENABLE (0 << 17) +# define R500_CONTIGUOUS_6XAA_SAMPLES_DISABLE (1 << 17) +# define R500_PEQ_PACKING_DISABLE (0 << 18) +# define R500_PEQ_PACKING_ENABLE (1 << 18) +# define R500_COVERED_PTR_MASKING_DISABLE (0 << 18) +# define R500_COVERED_PTR_MASKING_ENABLE (1 << 18) + + +/* gap */ + +/* Z Buffer Address Offset. + * Bits 31 to 5 are used for aligned Z buffer address offset for macro tiles. + */ +#define R300_ZB_DEPTHOFFSET 0x4f20 + +/* Z Buffer Pitch and Endian Control */ +#define R300_ZB_DEPTHPITCH 0x4f24 +# define R300_DEPTHPITCH_MASK 0x00003FFC +# define R300_DEPTHMACROTILE_DISABLE (0 << 16) +# define R300_DEPTHMACROTILE_ENABLE (1 << 16) +# define R300_DEPTHMICROTILE_LINEAR (0 << 17) +# define R300_DEPTHMICROTILE_TILED (1 << 17) +# define R300_DEPTHMICROTILE_TILED_SQUARE (2 << 17) +# define R300_DEPTHENDIAN_NO_SWAP (0 << 18) +# define R300_DEPTHENDIAN_WORD_SWAP (1 << 18) +# define R300_DEPTHENDIAN_DWORD_SWAP (2 << 18) +# define R300_DEPTHENDIAN_HALF_DWORD_SWAP (3 << 18) + +/* Z Buffer Clear Value */ +#define R300_ZB_DEPTHCLEARVALUE 0x4f28 + +/* Hierarchical Z Memory Offset */ +#define R300_ZB_HIZ_OFFSET 0x4f44 + +/* Hierarchical Z Write Index */ +#define R300_ZB_HIZ_WRINDEX 0x4f48 + +/* Hierarchical Z Data */ +#define R300_ZB_HIZ_DWORD 0x4f4c + +/* Hierarchical Z Read Index */ +#define R300_ZB_HIZ_RDINDEX 0x4f50 + +/* Hierarchical Z Pitch */ +#define R300_ZB_HIZ_PITCH 0x4f54 + +/* Z Buffer Z Pass Counter Data */ +#define R300_ZB_ZPASS_DATA 0x4f58 + +/* Z Buffer Z Pass Counter Address */ +#define R300_ZB_ZPASS_ADDR 0x4f5c + +/* Depth buffer X and Y coordinate offset */ +#define R300_ZB_DEPTHXY_OFFSET 0x4f60 +# define R300_DEPTHX_OFFSET_SHIFT 1 +# define R300_DEPTHX_OFFSET_MASK 0x000007FE +# define R300_DEPTHY_OFFSET_SHIFT 17 +# define R300_DEPTHY_OFFSET_MASK 0x07FE0000 + +/* Sets the fifo sizes */ +#define R500_ZB_FIFO_SIZE 0x4fd0 +# define R500_OP_FIFO_SIZE_FULL (0 << 0) +# define R500_OP_FIFO_SIZE_HALF (1 << 0) +# define R500_OP_FIFO_SIZE_QUATER (2 << 0) +# define R500_OP_FIFO_SIZE_EIGTHS (4 << 0) + +/* Stencil Reference Value and Mask for backfacing quads */ +/* R300_ZB_STENCILREFMASK handles front face */ +#define R500_ZB_STENCILREFMASK_BF 0x4fd4 +# define R500_STENCILREF_SHIFT 0 +# define R500_STENCILREF_MASK 0x000000ff +# define R500_STENCILMASK_SHIFT 8 +# define R500_STENCILMASK_MASK 0x0000ff00 +# define R500_STENCILWRITEMASK_SHIFT 16 +# define R500_STENCILWRITEMASK_MASK 0x00ff0000 + +/** + * \defgroup R3XX_R5XX_PROGRAMMABLE_VERTEX_SHADER_DESCRIPTION R3XX-R5XX PROGRAMMABLE VERTEX SHADER DESCRIPTION + * + * The PVS_DST_MATH_INST is used to identify whether the instruction is a Vector + * Engine instruction or a Math Engine instruction. + */ + +/*\{*/ + +enum { + /* R3XX */ + VECTOR_NO_OP = 0, + VE_DOT_PRODUCT = 1, + VE_MULTIPLY = 2, + VE_ADD = 3, + VE_MULTIPLY_ADD = 4, + VE_DISTANCE_VECTOR = 5, + VE_FRACTION = 6, + VE_MAXIMUM = 7, + VE_MINIMUM = 8, + VE_SET_GREATER_THAN_EQUAL = 9, + VE_SET_LESS_THAN = 10, + VE_MULTIPLYX2_ADD = 11, + VE_MULTIPLY_CLAMP = 12, + VE_FLT2FIX_DX = 13, + VE_FLT2FIX_DX_RND = 14, + /* R5XX */ + VE_PRED_SET_EQ_PUSH = 15, + VE_PRED_SET_GT_PUSH = 16, + VE_PRED_SET_GTE_PUSH = 17, + VE_PRED_SET_NEQ_PUSH = 18, + VE_COND_WRITE_EQ = 19, + VE_COND_WRITE_GT = 20, + VE_COND_WRITE_GTE = 21, + VE_COND_WRITE_NEQ = 22, + VE_COND_MUX_EQ = 23, + VE_COND_MUX_GT = 24, + VE_COND_MUX_GTE = 25, + VE_SET_GREATER_THAN = 26, + VE_SET_EQUAL = 27, + VE_SET_NOT_EQUAL = 28, +}; + +enum { + /* R3XX */ + MATH_NO_OP = 0, + ME_EXP_BASE2_DX = 1, + ME_LOG_BASE2_DX = 2, + ME_EXP_BASEE_FF = 3, + ME_LIGHT_COEFF_DX = 4, + ME_POWER_FUNC_FF = 5, + ME_RECIP_DX = 6, + ME_RECIP_FF = 7, + ME_RECIP_SQRT_DX = 8, + ME_RECIP_SQRT_FF = 9, + ME_MULTIPLY = 10, + ME_EXP_BASE2_FULL_DX = 11, + ME_LOG_BASE2_FULL_DX = 12, + ME_POWER_FUNC_FF_CLAMP_B = 13, + ME_POWER_FUNC_FF_CLAMP_B1 = 14, + ME_POWER_FUNC_FF_CLAMP_01 = 15, + ME_SIN = 16, + ME_COS = 17, + /* R5XX */ + ME_LOG_BASE2_IEEE = 18, + ME_RECIP_IEEE = 19, + ME_RECIP_SQRT_IEEE = 20, + ME_PRED_SET_EQ = 21, + ME_PRED_SET_GT = 22, + ME_PRED_SET_GTE = 23, + ME_PRED_SET_NEQ = 24, + ME_PRED_SET_CLR = 25, + ME_PRED_SET_INV = 26, + ME_PRED_SET_POP = 27, + ME_PRED_SET_RESTORE = 28, +}; + +enum { + /* R3XX */ + PVS_MACRO_OP_2CLK_MADD = 0, + PVS_MACRO_OP_2CLK_M2X_ADD = 1, +}; + +enum { + PVS_SRC_REG_TEMPORARY = 0, /* Intermediate Storage */ + PVS_SRC_REG_INPUT = 1, /* Input Vertex Storage */ + PVS_SRC_REG_CONSTANT = 2, /* Constant State Storage */ + PVS_SRC_REG_ALT_TEMPORARY = 3, /* Alternate Intermediate Storage */ +}; + +enum { + PVS_DST_REG_TEMPORARY = 0, /* Intermediate Storage */ + PVS_DST_REG_A0 = 1, /* Address Register Storage */ + PVS_DST_REG_OUT = 2, /* Output Memory. Used for all outputs */ + PVS_DST_REG_OUT_REPL_X = 3, /* Output Memory & Replicate X to all channels */ + PVS_DST_REG_ALT_TEMPORARY = 4, /* Alternate Intermediate Storage */ + PVS_DST_REG_INPUT = 5, /* Output Memory & Replicate X to all channels */ +}; + +enum { + PVS_SRC_SELECT_X = 0, /* Select X Component */ + PVS_SRC_SELECT_Y = 1, /* Select Y Component */ + PVS_SRC_SELECT_Z = 2, /* Select Z Component */ + PVS_SRC_SELECT_W = 3, /* Select W Component */ + PVS_SRC_SELECT_FORCE_0 = 4, /* Force Component to 0.0 */ + PVS_SRC_SELECT_FORCE_1 = 5, /* Force Component to 1.0 */ +}; + +/* PVS Opcode & Destination Operand Description */ + +enum { + PVS_DST_OPCODE_MASK = 0x3f, + PVS_DST_OPCODE_SHIFT = 0, + PVS_DST_MATH_INST_MASK = 0x1, + PVS_DST_MATH_INST_SHIFT = 6, + PVS_DST_MACRO_INST_MASK = 0x1, + PVS_DST_MACRO_INST_SHIFT = 7, + PVS_DST_REG_TYPE_MASK = 0xf, + PVS_DST_REG_TYPE_SHIFT = 8, + PVS_DST_ADDR_MODE_1_MASK = 0x1, + PVS_DST_ADDR_MODE_1_SHIFT = 12, + PVS_DST_OFFSET_MASK = 0x7f, + PVS_DST_OFFSET_SHIFT = 13, + PVS_DST_WE_X_MASK = 0x1, + PVS_DST_WE_X_SHIFT = 20, + PVS_DST_WE_Y_MASK = 0x1, + PVS_DST_WE_Y_SHIFT = 21, + PVS_DST_WE_Z_MASK = 0x1, + PVS_DST_WE_Z_SHIFT = 22, + PVS_DST_WE_W_MASK = 0x1, + PVS_DST_WE_W_SHIFT = 23, + PVS_DST_VE_SAT_MASK = 0x1, + PVS_DST_VE_SAT_SHIFT = 24, + PVS_DST_ME_SAT_MASK = 0x1, + PVS_DST_ME_SAT_SHIFT = 25, + PVS_DST_PRED_ENABLE_MASK = 0x1, + PVS_DST_PRED_ENABLE_SHIFT = 26, + PVS_DST_PRED_SENSE_MASK = 0x1, + PVS_DST_PRED_SENSE_SHIFT = 27, + PVS_DST_DUAL_MATH_OP_MASK = 0x3, + PVS_DST_DUAL_MATH_OP_SHIFT = 27, + PVS_DST_ADDR_SEL_MASK = 0x3, + PVS_DST_ADDR_SEL_SHIFT = 29, + PVS_DST_ADDR_MODE_0_MASK = 0x1, + PVS_DST_ADDR_MODE_0_SHIFT = 31, +}; + +/* PVS Source Operand Description */ + +enum { + PVS_SRC_REG_TYPE_MASK = 0x3, + PVS_SRC_REG_TYPE_SHIFT = 0, + SPARE_0_MASK = 0x1, + SPARE_0_SHIFT = 2, + PVS_SRC_ABS_XYZW_MASK = 0x1, + PVS_SRC_ABS_XYZW_SHIFT = 3, + PVS_SRC_ADDR_MODE_0_MASK = 0x1, + PVS_SRC_ADDR_MODE_0_SHIFT = 4, + PVS_SRC_OFFSET_MASK = 0xff, + PVS_SRC_OFFSET_SHIFT = 5, + PVS_SRC_SWIZZLE_X_MASK = 0x7, + PVS_SRC_SWIZZLE_X_SHIFT = 13, + PVS_SRC_SWIZZLE_Y_MASK = 0x7, + PVS_SRC_SWIZZLE_Y_SHIFT = 16, + PVS_SRC_SWIZZLE_Z_MASK = 0x7, + PVS_SRC_SWIZZLE_Z_SHIFT = 19, + PVS_SRC_SWIZZLE_W_MASK = 0x7, + PVS_SRC_SWIZZLE_W_SHIFT = 22, + PVS_SRC_MODIFIER_X_MASK = 0x1, + PVS_SRC_MODIFIER_X_SHIFT = 25, + PVS_SRC_MODIFIER_Y_MASK = 0x1, + PVS_SRC_MODIFIER_Y_SHIFT = 26, + PVS_SRC_MODIFIER_Z_MASK = 0x1, + PVS_SRC_MODIFIER_Z_SHIFT = 27, + PVS_SRC_MODIFIER_W_MASK = 0x1, + PVS_SRC_MODIFIER_W_SHIFT = 28, + PVS_SRC_ADDR_SEL_MASK = 0x3, + PVS_SRC_ADDR_SEL_SHIFT = 29, + PVS_SRC_ADDR_MODE_1_MASK = 0x0, + PVS_SRC_ADDR_MODE_1_SHIFT = 32, +}; + +/*\}*/ + +/* BEGIN: Packet 3 commands */ + +/* A primitive emission dword. */ +#define R300_PRIM_TYPE_NONE (0 << 0) +#define R300_PRIM_TYPE_POINT (1 << 0) +#define R300_PRIM_TYPE_LINE (2 << 0) +#define R300_PRIM_TYPE_LINE_STRIP (3 << 0) +#define R300_PRIM_TYPE_TRI_LIST (4 << 0) +#define R300_PRIM_TYPE_TRI_FAN (5 << 0) +#define R300_PRIM_TYPE_TRI_STRIP (6 << 0) +#define R300_PRIM_TYPE_TRI_TYPE2 (7 << 0) +#define R300_PRIM_TYPE_RECT_LIST (8 << 0) +#define R300_PRIM_TYPE_3VRT_POINT_LIST (9 << 0) +#define R300_PRIM_TYPE_3VRT_LINE_LIST (10 << 0) + /* GUESS (based on r200) */ +#define R300_PRIM_TYPE_POINT_SPRITES (11 << 0) +#define R300_PRIM_TYPE_LINE_LOOP (12 << 0) +#define R300_PRIM_TYPE_QUADS (13 << 0) +#define R300_PRIM_TYPE_QUAD_STRIP (14 << 0) +#define R300_PRIM_TYPE_POLYGON (15 << 0) +#define R300_PRIM_TYPE_MASK 0xF +#define R300_PRIM_WALK_IND (1 << 4) +#define R300_PRIM_WALK_LIST (2 << 4) +#define R300_PRIM_WALK_RING (3 << 4) +#define R300_PRIM_WALK_MASK (3 << 4) + /* GUESS (based on r200) */ +#define R300_PRIM_COLOR_ORDER_BGRA (0 << 6) +#define R300_PRIM_COLOR_ORDER_RGBA (1 << 6) +#define R300_PRIM_NUM_VERTICES_SHIFT 16 +#define R300_PRIM_NUM_VERTICES_MASK 0xffff + + + +/* + * The R500 unified shader (US) registers come in banks of 512 each, one + * for each instruction slot in the shader. You can't touch them directly. + * R500_US_VECTOR_INDEX() sets the base instruction to modify; successive + * writes to R500_GA_US_VECTOR_DATA autoincrement the index after the + * instruction is fully specified. + */ +#define R500_US_ALU_ALPHA_INST_0 0xa800 +# define R500_ALPHA_OP_MAD 0 +# define R500_ALPHA_OP_DP 1 +# define R500_ALPHA_OP_MIN 2 +# define R500_ALPHA_OP_MAX 3 +/* #define R500_ALPHA_OP_RESERVED 4 */ +# define R500_ALPHA_OP_CND 5 +# define R500_ALPHA_OP_CMP 6 +# define R500_ALPHA_OP_FRC 7 +# define R500_ALPHA_OP_EX2 8 +# define R500_ALPHA_OP_LN2 9 +# define R500_ALPHA_OP_RCP 10 +# define R500_ALPHA_OP_RSQ 11 +# define R500_ALPHA_OP_SIN 12 +# define R500_ALPHA_OP_COS 13 +# define R500_ALPHA_OP_MDH 14 +# define R500_ALPHA_OP_MDV 15 +# define R500_ALPHA_ADDRD(x) (x << 4) +# define R500_ALPHA_ADDRD_REL (1 << 11) +# define R500_ALPHA_SEL_A_SHIFT 12 +# define R500_ALPHA_SEL_A_SRC0 (0 << 12) +# define R500_ALPHA_SEL_A_SRC1 (1 << 12) +# define R500_ALPHA_SEL_A_SRC2 (2 << 12) +# define R500_ALPHA_SEL_A_SRCP (3 << 12) +# define R500_ALPHA_SWIZ_A_R (0 << 14) +# define R500_ALPHA_SWIZ_A_G (1 << 14) +# define R500_ALPHA_SWIZ_A_B (2 << 14) +# define R500_ALPHA_SWIZ_A_A (3 << 14) +# define R500_ALPHA_SWIZ_A_0 (4 << 14) +# define R500_ALPHA_SWIZ_A_HALF (5 << 14) +# define R500_ALPHA_SWIZ_A_1 (6 << 14) +/* #define R500_ALPHA_SWIZ_A_UNUSED (7 << 14) */ +# define R500_ALPHA_MOD_A_NOP (0 << 17) +# define R500_ALPHA_MOD_A_NEG (1 << 17) +# define R500_ALPHA_MOD_A_ABS (2 << 17) +# define R500_ALPHA_MOD_A_NAB (3 << 17) +# define R500_ALPHA_SEL_B_SHIFT 19 +# define R500_ALPHA_SEL_B_SRC0 (0 << 19) +# define R500_ALPHA_SEL_B_SRC1 (1 << 19) +# define R500_ALPHA_SEL_B_SRC2 (2 << 19) +# define R500_ALPHA_SEL_B_SRCP (3 << 19) +# define R500_ALPHA_SWIZ_B_R (0 << 21) +# define R500_ALPHA_SWIZ_B_G (1 << 21) +# define R500_ALPHA_SWIZ_B_B (2 << 21) +# define R500_ALPHA_SWIZ_B_A (3 << 21) +# define R500_ALPHA_SWIZ_B_0 (4 << 21) +# define R500_ALPHA_SWIZ_B_HALF (5 << 21) +# define R500_ALPHA_SWIZ_B_1 (6 << 21) +/* #define R500_ALPHA_SWIZ_B_UNUSED (7 << 21) */ +# define R500_ALPHA_MOD_B_NOP (0 << 24) +# define R500_ALPHA_MOD_B_NEG (1 << 24) +# define R500_ALPHA_MOD_B_ABS (2 << 24) +# define R500_ALPHA_MOD_B_NAB (3 << 24) +# define R500_ALPHA_OMOD_IDENTITY (0 << 26) +# define R500_ALPHA_OMOD_MUL_2 (1 << 26) +# define R500_ALPHA_OMOD_MUL_4 (2 << 26) +# define R500_ALPHA_OMOD_MUL_8 (3 << 26) +# define R500_ALPHA_OMOD_DIV_2 (4 << 26) +# define R500_ALPHA_OMOD_DIV_4 (5 << 26) +# define R500_ALPHA_OMOD_DIV_8 (6 << 26) +# define R500_ALPHA_OMOD_DISABLE (7 << 26) +# define R500_ALPHA_TARGET(x) (x << 29) +# define R500_ALPHA_W_OMASK (1 << 31) +#define R500_US_ALU_ALPHA_ADDR_0 0x9800 +# define R500_ALPHA_ADDR0(x) (x << 0) +# define R500_ALPHA_ADDR0_CONST (1 << 8) +# define R500_ALPHA_ADDR0_REL (1 << 9) +# define R500_ALPHA_ADDR1(x) (x << 10) +# define R500_ALPHA_ADDR1_CONST (1 << 18) +# define R500_ALPHA_ADDR1_REL (1 << 19) +# define R500_ALPHA_ADDR2(x) (x << 20) +# define R500_ALPHA_ADDR2_CONST (1 << 28) +# define R500_ALPHA_ADDR2_REL (1 << 29) +# define R500_ALPHA_SRCP_OP_1_MINUS_2A0 (0 << 30) +# define R500_ALPHA_SRCP_OP_A1_MINUS_A0 (1 << 30) +# define R500_ALPHA_SRCP_OP_A1_PLUS_A0 (2 << 30) +# define R500_ALPHA_SRCP_OP_1_MINUS_A0 (3 << 30) +#define R500_US_ALU_RGBA_INST_0 0xb000 +# define R500_ALU_RGBA_OP_MAD (0 << 0) +# define R500_ALU_RGBA_OP_DP3 (1 << 0) +# define R500_ALU_RGBA_OP_DP4 (2 << 0) +# define R500_ALU_RGBA_OP_D2A (3 << 0) +# define R500_ALU_RGBA_OP_MIN (4 << 0) +# define R500_ALU_RGBA_OP_MAX (5 << 0) +/* #define R500_ALU_RGBA_OP_RESERVED (6 << 0) */ +# define R500_ALU_RGBA_OP_CND (7 << 0) +# define R500_ALU_RGBA_OP_CMP (8 << 0) +# define R500_ALU_RGBA_OP_FRC (9 << 0) +# define R500_ALU_RGBA_OP_SOP (10 << 0) +# define R500_ALU_RGBA_OP_MDH (11 << 0) +# define R500_ALU_RGBA_OP_MDV (12 << 0) +# define R500_ALU_RGBA_ADDRD(x) (x << 4) +# define R500_ALU_RGBA_ADDRD_REL (1 << 11) +# define R500_ALU_RGBA_SEL_C_SHIFT 12 +# define R500_ALU_RGBA_SEL_C_SRC0 (0 << 12) +# define R500_ALU_RGBA_SEL_C_SRC1 (1 << 12) +# define R500_ALU_RGBA_SEL_C_SRC2 (2 << 12) +# define R500_ALU_RGBA_SEL_C_SRCP (3 << 12) +# define R500_ALU_RGBA_R_SWIZ_R (0 << 14) +# define R500_ALU_RGBA_R_SWIZ_G (1 << 14) +# define R500_ALU_RGBA_R_SWIZ_B (2 << 14) +# define R500_ALU_RGBA_R_SWIZ_A (3 << 14) +# define R500_ALU_RGBA_R_SWIZ_0 (4 << 14) +# define R500_ALU_RGBA_R_SWIZ_HALF (5 << 14) +# define R500_ALU_RGBA_R_SWIZ_1 (6 << 14) +/* #define R500_ALU_RGBA_R_SWIZ_UNUSED (7 << 14) */ +# define R500_ALU_RGBA_G_SWIZ_R (0 << 17) +# define R500_ALU_RGBA_G_SWIZ_G (1 << 17) +# define R500_ALU_RGBA_G_SWIZ_B (2 << 17) +# define R500_ALU_RGBA_G_SWIZ_A (3 << 17) +# define R500_ALU_RGBA_G_SWIZ_0 (4 << 17) +# define R500_ALU_RGBA_G_SWIZ_HALF (5 << 17) +# define R500_ALU_RGBA_G_SWIZ_1 (6 << 17) +/* #define R500_ALU_RGBA_G_SWIZ_UNUSED (7 << 17) */ +# define R500_ALU_RGBA_B_SWIZ_R (0 << 20) +# define R500_ALU_RGBA_B_SWIZ_G (1 << 20) +# define R500_ALU_RGBA_B_SWIZ_B (2 << 20) +# define R500_ALU_RGBA_B_SWIZ_A (3 << 20) +# define R500_ALU_RGBA_B_SWIZ_0 (4 << 20) +# define R500_ALU_RGBA_B_SWIZ_HALF (5 << 20) +# define R500_ALU_RGBA_B_SWIZ_1 (6 << 20) +/* #define R500_ALU_RGBA_B_SWIZ_UNUSED (7 << 20) */ +# define R500_ALU_RGBA_MOD_C_NOP (0 << 23) +# define R500_ALU_RGBA_MOD_C_NEG (1 << 23) +# define R500_ALU_RGBA_MOD_C_ABS (2 << 23) +# define R500_ALU_RGBA_MOD_C_NAB (3 << 23) +# define R500_ALU_RGBA_ALPHA_SEL_C_SHIFT 25 +# define R500_ALU_RGBA_ALPHA_SEL_C_SRC0 (0 << 25) +# define R500_ALU_RGBA_ALPHA_SEL_C_SRC1 (1 << 25) +# define R500_ALU_RGBA_ALPHA_SEL_C_SRC2 (2 << 25) +# define R500_ALU_RGBA_ALPHA_SEL_C_SRCP (3 << 25) +# define R500_ALU_RGBA_A_SWIZ_R (0 << 27) +# define R500_ALU_RGBA_A_SWIZ_G (1 << 27) +# define R500_ALU_RGBA_A_SWIZ_B (2 << 27) +# define R500_ALU_RGBA_A_SWIZ_A (3 << 27) +# define R500_ALU_RGBA_A_SWIZ_0 (4 << 27) +# define R500_ALU_RGBA_A_SWIZ_HALF (5 << 27) +# define R500_ALU_RGBA_A_SWIZ_1 (6 << 27) +/* #define R500_ALU_RGBA_A_SWIZ_UNUSED (7 << 27) */ +# define R500_ALU_RGBA_ALPHA_MOD_C_NOP (0 << 30) +# define R500_ALU_RGBA_ALPHA_MOD_C_NEG (1 << 30) +# define R500_ALU_RGBA_ALPHA_MOD_C_ABS (2 << 30) +# define R500_ALU_RGBA_ALPHA_MOD_C_NAB (3 << 30) +#define R500_US_ALU_RGB_INST_0 0xa000 +# define R500_ALU_RGB_SEL_A_SHIFT 0 +# define R500_ALU_RGB_SEL_A_SRC0 (0 << 0) +# define R500_ALU_RGB_SEL_A_SRC1 (1 << 0) +# define R500_ALU_RGB_SEL_A_SRC2 (2 << 0) +# define R500_ALU_RGB_SEL_A_SRCP (3 << 0) +# define R500_ALU_RGB_R_SWIZ_A_R (0 << 2) +# define R500_ALU_RGB_R_SWIZ_A_G (1 << 2) +# define R500_ALU_RGB_R_SWIZ_A_B (2 << 2) +# define R500_ALU_RGB_R_SWIZ_A_A (3 << 2) +# define R500_ALU_RGB_R_SWIZ_A_0 (4 << 2) +# define R500_ALU_RGB_R_SWIZ_A_HALF (5 << 2) +# define R500_ALU_RGB_R_SWIZ_A_1 (6 << 2) +/* #define R500_ALU_RGB_R_SWIZ_A_UNUSED (7 << 2) */ +# define R500_ALU_RGB_G_SWIZ_A_R (0 << 5) +# define R500_ALU_RGB_G_SWIZ_A_G (1 << 5) +# define R500_ALU_RGB_G_SWIZ_A_B (2 << 5) +# define R500_ALU_RGB_G_SWIZ_A_A (3 << 5) +# define R500_ALU_RGB_G_SWIZ_A_0 (4 << 5) +# define R500_ALU_RGB_G_SWIZ_A_HALF (5 << 5) +# define R500_ALU_RGB_G_SWIZ_A_1 (6 << 5) +/* #define R500_ALU_RGB_G_SWIZ_A_UNUSED (7 << 5) */ +# define R500_ALU_RGB_B_SWIZ_A_R (0 << 8) +# define R500_ALU_RGB_B_SWIZ_A_G (1 << 8) +# define R500_ALU_RGB_B_SWIZ_A_B (2 << 8) +# define R500_ALU_RGB_B_SWIZ_A_A (3 << 8) +# define R500_ALU_RGB_B_SWIZ_A_0 (4 << 8) +# define R500_ALU_RGB_B_SWIZ_A_HALF (5 << 8) +# define R500_ALU_RGB_B_SWIZ_A_1 (6 << 8) +/* #define R500_ALU_RGB_B_SWIZ_A_UNUSED (7 << 8) */ +# define R500_ALU_RGB_MOD_A_NOP (0 << 11) +# define R500_ALU_RGB_MOD_A_NEG (1 << 11) +# define R500_ALU_RGB_MOD_A_ABS (2 << 11) +# define R500_ALU_RGB_MOD_A_NAB (3 << 11) +# define R500_ALU_RGB_SEL_B_SHIFT 13 +# define R500_ALU_RGB_SEL_B_SRC0 (0 << 13) +# define R500_ALU_RGB_SEL_B_SRC1 (1 << 13) +# define R500_ALU_RGB_SEL_B_SRC2 (2 << 13) +# define R500_ALU_RGB_SEL_B_SRCP (3 << 13) +# define R500_ALU_RGB_R_SWIZ_B_R (0 << 15) +# define R500_ALU_RGB_R_SWIZ_B_G (1 << 15) +# define R500_ALU_RGB_R_SWIZ_B_B (2 << 15) +# define R500_ALU_RGB_R_SWIZ_B_A (3 << 15) +# define R500_ALU_RGB_R_SWIZ_B_0 (4 << 15) +# define R500_ALU_RGB_R_SWIZ_B_HALF (5 << 15) +# define R500_ALU_RGB_R_SWIZ_B_1 (6 << 15) +/* #define R500_ALU_RGB_R_SWIZ_B_UNUSED (7 << 15) */ +# define R500_ALU_RGB_G_SWIZ_B_R (0 << 18) +# define R500_ALU_RGB_G_SWIZ_B_G (1 << 18) +# define R500_ALU_RGB_G_SWIZ_B_B (2 << 18) +# define R500_ALU_RGB_G_SWIZ_B_A (3 << 18) +# define R500_ALU_RGB_G_SWIZ_B_0 (4 << 18) +# define R500_ALU_RGB_G_SWIZ_B_HALF (5 << 18) +# define R500_ALU_RGB_G_SWIZ_B_1 (6 << 18) +/* #define R500_ALU_RGB_G_SWIZ_B_UNUSED (7 << 18) */ +# define R500_ALU_RGB_B_SWIZ_B_R (0 << 21) +# define R500_ALU_RGB_B_SWIZ_B_G (1 << 21) +# define R500_ALU_RGB_B_SWIZ_B_B (2 << 21) +# define R500_ALU_RGB_B_SWIZ_B_A (3 << 21) +# define R500_ALU_RGB_B_SWIZ_B_0 (4 << 21) +# define R500_ALU_RGB_B_SWIZ_B_HALF (5 << 21) +# define R500_ALU_RGB_B_SWIZ_B_1 (6 << 21) +/* #define R500_ALU_RGB_B_SWIZ_B_UNUSED (7 << 21) */ +# define R500_ALU_RGB_MOD_B_NOP (0 << 24) +# define R500_ALU_RGB_MOD_B_NEG (1 << 24) +# define R500_ALU_RGB_MOD_B_ABS (2 << 24) +# define R500_ALU_RGB_MOD_B_NAB (3 << 24) +# define R500_ALU_RGB_OMOD_IDENTITY (0 << 26) +# define R500_ALU_RGB_OMOD_MUL_2 (1 << 26) +# define R500_ALU_RGB_OMOD_MUL_4 (2 << 26) +# define R500_ALU_RGB_OMOD_MUL_8 (3 << 26) +# define R500_ALU_RGB_OMOD_DIV_2 (4 << 26) +# define R500_ALU_RGB_OMOD_DIV_4 (5 << 26) +# define R500_ALU_RGB_OMOD_DIV_8 (6 << 26) +# define R500_ALU_RGB_OMOD_DISABLE (7 << 26) +# define R500_ALU_RGB_TARGET(x) (x << 29) +# define R500_ALU_RGB_WMASK (1 << 31) +#define R500_US_ALU_RGB_ADDR_0 0x9000 +# define R500_RGB_ADDR0(x) (x << 0) +# define R500_RGB_ADDR0_CONST (1 << 8) +# define R500_RGB_ADDR0_REL (1 << 9) +# define R500_RGB_ADDR1(x) (x << 10) +# define R500_RGB_ADDR1_CONST (1 << 18) +# define R500_RGB_ADDR1_REL (1 << 19) +# define R500_RGB_ADDR2(x) (x << 20) +# define R500_RGB_ADDR2_CONST (1 << 28) +# define R500_RGB_ADDR2_REL (1 << 29) +# define R500_RGB_SRCP_OP_1_MINUS_2RGB0 (0 << 30) +# define R500_RGB_SRCP_OP_RGB1_MINUS_RGB0 (1 << 30) +# define R500_RGB_SRCP_OP_RGB1_PLUS_RGB0 (2 << 30) +# define R500_RGB_SRCP_OP_1_MINUS_RGB0 (3 << 30) +#define R500_US_CMN_INST_0 0xb800 +# define R500_INST_TYPE_MASK (3 << 0) +# define R500_INST_TYPE_ALU (0 << 0) +# define R500_INST_TYPE_OUT (1 << 0) +# define R500_INST_TYPE_FC (2 << 0) +# define R500_INST_TYPE_TEX (3 << 0) +# define R500_INST_TEX_SEM_WAIT (1 << 2) +# define R500_INST_RGB_PRED_SEL_NONE (0 << 3) +# define R500_INST_RGB_PRED_SEL_RGBA (1 << 3) +# define R500_INST_RGB_PRED_SEL_RRRR (2 << 3) +# define R500_INST_RGB_PRED_SEL_GGGG (3 << 3) +# define R500_INST_RGB_PRED_SEL_BBBB (4 << 3) +# define R500_INST_RGB_PRED_SEL_AAAA (5 << 3) +# define R500_INST_RGB_PRED_INV (1 << 6) +# define R500_INST_WRITE_INACTIVE (1 << 7) +# define R500_INST_LAST (1 << 8) +# define R500_INST_NOP (1 << 9) +# define R500_INST_ALU_WAIT (1 << 10) +# define R500_INST_RGB_WMASK_R (1 << 11) +# define R500_INST_RGB_WMASK_G (1 << 12) +# define R500_INST_RGB_WMASK_B (1 << 13) +# define R500_INST_ALPHA_WMASK (1 << 14) +# define R500_INST_RGB_OMASK_R (1 << 15) +# define R500_INST_RGB_OMASK_G (1 << 16) +# define R500_INST_RGB_OMASK_B (1 << 17) +# define R500_INST_ALPHA_OMASK (1 << 18) +# define R500_INST_RGB_CLAMP (1 << 19) +# define R500_INST_ALPHA_CLAMP (1 << 20) +# define R500_INST_ALU_RESULT_SEL (1 << 21) +# define R500_INST_ALPHA_PRED_INV (1 << 22) +# define R500_INST_ALU_RESULT_OP_EQ (0 << 23) +# define R500_INST_ALU_RESULT_OP_LT (1 << 23) +# define R500_INST_ALU_RESULT_OP_GE (2 << 23) +# define R500_INST_ALU_RESULT_OP_NE (3 << 23) +# define R500_INST_ALPHA_PRED_SEL_NONE (0 << 25) +# define R500_INST_ALPHA_PRED_SEL_RGBA (1 << 25) +# define R500_INST_ALPHA_PRED_SEL_RRRR (2 << 25) +# define R500_INST_ALPHA_PRED_SEL_GGGG (3 << 25) +# define R500_INST_ALPHA_PRED_SEL_BBBB (4 << 25) +# define R500_INST_ALPHA_PRED_SEL_AAAA (5 << 25) +/* XXX next four are kind of guessed */ +# define R500_INST_STAT_WE_R (1 << 28) +# define R500_INST_STAT_WE_G (1 << 29) +# define R500_INST_STAT_WE_B (1 << 30) +# define R500_INST_STAT_WE_A (1 << 31) + +/* note that these are 8 bit lengths, despite the offsets, at least for R500 */ +#define R500_US_CODE_ADDR 0x4630 +# define R500_US_CODE_START_ADDR(x) (x << 0) +# define R500_US_CODE_END_ADDR(x) (x << 16) +#define R500_US_CODE_OFFSET 0x4638 +# define R500_US_CODE_OFFSET_ADDR(x) (x << 0) +#define R500_US_CODE_RANGE 0x4634 +# define R500_US_CODE_RANGE_ADDR(x) (x << 0) +# define R500_US_CODE_RANGE_SIZE(x) (x << 16) +#define R500_US_CONFIG 0x4600 +# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 1) +#define R500_US_FC_ADDR_0 0xa000 +# define R500_FC_BOOL_ADDR(x) (x << 0) +# define R500_FC_INT_ADDR(x) (x << 8) +# define R500_FC_JUMP_ADDR(x) (x << 16) +# define R500_FC_JUMP_GLOBAL (1 << 31) +#define R500_US_FC_BOOL_CONST 0x4620 +# define R500_FC_KBOOL(x) (x) +#define R500_US_FC_CTRL 0x4624 +# define R500_FC_TEST_EN (1 << 30) +# define R500_FC_FULL_FC_EN (1 << 31) +#define R500_US_FC_INST_0 0x9800 +# define R500_FC_OP_JUMP (0 << 0) +# define R500_FC_OP_LOOP (1 << 0) +# define R500_FC_OP_ENDLOOP (2 << 0) +# define R500_FC_OP_REP (3 << 0) +# define R500_FC_OP_ENDREP (4 << 0) +# define R500_FC_OP_BREAKLOOP (5 << 0) +# define R500_FC_OP_BREAKREP (6 << 0) +# define R500_FC_OP_CONTINUE (7 << 0) +# define R500_FC_B_ELSE (1 << 4) +# define R500_FC_JUMP_ANY (1 << 5) +# define R500_FC_A_OP_NONE (0 << 6) +# define R500_FC_A_OP_POP (1 << 6) +# define R500_FC_A_OP_PUSH (2 << 6) +# define R500_FC_JUMP_FUNC(x) (x << 8) +# define R500_FC_B_POP_CNT(x) (x << 16) +# define R500_FC_B_OP0_NONE (0 << 24) +# define R500_FC_B_OP0_DECR (1 << 24) +# define R500_FC_B_OP0_INCR (2 << 24) +# define R500_FC_B_OP1_DECR (0 << 26) +# define R500_FC_B_OP1_NONE (1 << 26) +# define R500_FC_B_OP1_INCR (2 << 26) +# define R500_FC_IGNORE_UNCOVERED (1 << 28) +#define R500_US_FC_INT_CONST_0 0x4c00 +# define R500_FC_INT_CONST_KR(x) (x << 0) +# define R500_FC_INT_CONST_KG(x) (x << 8) +# define R500_FC_INT_CONST_KB(x) (x << 16) +/* _0 through _15 */ +#define R500_US_FORMAT0_0 0x4640 +# define R500_FORMAT_TXWIDTH(x) (x << 0) +# define R500_FORMAT_TXHEIGHT(x) (x << 11) +# define R500_FORMAT_TXDEPTH(x) (x << 22) +/* _0 through _3 */ +#define R500_US_OUT_FMT_0 0x46a4 +# define R500_OUT_FMT_C4_8 (0 << 0) +# define R500_OUT_FMT_C4_10 (1 << 0) +# define R500_OUT_FMT_C4_10_GAMMA (2 << 0) +# define R500_OUT_FMT_C_16 (3 << 0) +# define R500_OUT_FMT_C2_16 (4 << 0) +# define R500_OUT_FMT_C4_16 (5 << 0) +# define R500_OUT_FMT_C_16_MPEG (6 << 0) +# define R500_OUT_FMT_C2_16_MPEG (7 << 0) +# define R500_OUT_FMT_C2_4 (8 << 0) +# define R500_OUT_FMT_C_3_3_2 (9 << 0) +# define R500_OUT_FMT_C_6_5_6 (10 << 0) +# define R500_OUT_FMT_C_11_11_10 (11 << 0) +# define R500_OUT_FMT_C_10_11_11 (12 << 0) +# define R500_OUT_FMT_C_2_10_10_10 (13 << 0) +/* #define R500_OUT_FMT_RESERVED (14 << 0) */ +# define R500_OUT_FMT_UNUSED (15 << 0) +# define R500_OUT_FMT_C_16_FP (16 << 0) +# define R500_OUT_FMT_C2_16_FP (17 << 0) +# define R500_OUT_FMT_C4_16_FP (18 << 0) +# define R500_OUT_FMT_C_32_FP (19 << 0) +# define R500_OUT_FMT_C2_32_FP (20 << 0) +# define R500_OUT_FMT_C4_32_FP (21 << 0) +# define R500_C0_SEL_A (0 << 8) +# define R500_C0_SEL_R (1 << 8) +# define R500_C0_SEL_G (2 << 8) +# define R500_C0_SEL_B (3 << 8) +# define R500_C1_SEL_A (0 << 10) +# define R500_C1_SEL_R (1 << 10) +# define R500_C1_SEL_G (2 << 10) +# define R500_C1_SEL_B (3 << 10) +# define R500_C2_SEL_A (0 << 12) +# define R500_C2_SEL_R (1 << 12) +# define R500_C2_SEL_G (2 << 12) +# define R500_C2_SEL_B (3 << 12) +# define R500_C3_SEL_A (0 << 14) +# define R500_C3_SEL_R (1 << 14) +# define R500_C3_SEL_G (2 << 14) +# define R500_C3_SEL_B (3 << 14) +# define R500_OUT_SIGN(x) (x << 16) +# define R500_ROUND_ADJ (1 << 20) +#define R500_US_PIXSIZE 0x4604 +# define R500_PIX_SIZE(x) (x) +#define R500_US_TEX_ADDR_0 0x9800 +# define R500_TEX_SRC_ADDR(x) (x << 0) +# define R500_TEX_SRC_ADDR_REL (1 << 7) +# define R500_TEX_SRC_S_SWIZ_R (0 << 8) +# define R500_TEX_SRC_S_SWIZ_G (1 << 8) +# define R500_TEX_SRC_S_SWIZ_B (2 << 8) +# define R500_TEX_SRC_S_SWIZ_A (3 << 8) +# define R500_TEX_SRC_T_SWIZ_R (0 << 10) +# define R500_TEX_SRC_T_SWIZ_G (1 << 10) +# define R500_TEX_SRC_T_SWIZ_B (2 << 10) +# define R500_TEX_SRC_T_SWIZ_A (3 << 10) +# define R500_TEX_SRC_R_SWIZ_R (0 << 12) +# define R500_TEX_SRC_R_SWIZ_G (1 << 12) +# define R500_TEX_SRC_R_SWIZ_B (2 << 12) +# define R500_TEX_SRC_R_SWIZ_A (3 << 12) +# define R500_TEX_SRC_Q_SWIZ_R (0 << 14) +# define R500_TEX_SRC_Q_SWIZ_G (1 << 14) +# define R500_TEX_SRC_Q_SWIZ_B (2 << 14) +# define R500_TEX_SRC_Q_SWIZ_A (3 << 14) +# define R500_TEX_DST_ADDR(x) (x << 16) +# define R500_TEX_DST_ADDR_REL (1 << 23) +# define R500_TEX_DST_R_SWIZ_R (0 << 24) +# define R500_TEX_DST_R_SWIZ_G (1 << 24) +# define R500_TEX_DST_R_SWIZ_B (2 << 24) +# define R500_TEX_DST_R_SWIZ_A (3 << 24) +# define R500_TEX_DST_G_SWIZ_R (0 << 26) +# define R500_TEX_DST_G_SWIZ_G (1 << 26) +# define R500_TEX_DST_G_SWIZ_B (2 << 26) +# define R500_TEX_DST_G_SWIZ_A (3 << 26) +# define R500_TEX_DST_B_SWIZ_R (0 << 28) +# define R500_TEX_DST_B_SWIZ_G (1 << 28) +# define R500_TEX_DST_B_SWIZ_B (2 << 28) +# define R500_TEX_DST_B_SWIZ_A (3 << 28) +# define R500_TEX_DST_A_SWIZ_R (0 << 30) +# define R500_TEX_DST_A_SWIZ_G (1 << 30) +# define R500_TEX_DST_A_SWIZ_B (2 << 30) +# define R500_TEX_DST_A_SWIZ_A (3 << 30) +#define R500_US_TEX_ADDR_DXDY_0 0xa000 +# define R500_DX_ADDR(x) (x << 0) +# define R500_DX_ADDR_REL (1 << 7) +# define R500_DX_S_SWIZ_R (0 << 8) +# define R500_DX_S_SWIZ_G (1 << 8) +# define R500_DX_S_SWIZ_B (2 << 8) +# define R500_DX_S_SWIZ_A (3 << 8) +# define R500_DX_T_SWIZ_R (0 << 10) +# define R500_DX_T_SWIZ_G (1 << 10) +# define R500_DX_T_SWIZ_B (2 << 10) +# define R500_DX_T_SWIZ_A (3 << 10) +# define R500_DX_R_SWIZ_R (0 << 12) +# define R500_DX_R_SWIZ_G (1 << 12) +# define R500_DX_R_SWIZ_B (2 << 12) +# define R500_DX_R_SWIZ_A (3 << 12) +# define R500_DX_Q_SWIZ_R (0 << 14) +# define R500_DX_Q_SWIZ_G (1 << 14) +# define R500_DX_Q_SWIZ_B (2 << 14) +# define R500_DX_Q_SWIZ_A (3 << 14) +# define R500_DY_ADDR(x) (x << 16) +# define R500_DY_ADDR_REL (1 << 17) +# define R500_DY_S_SWIZ_R (0 << 24) +# define R500_DY_S_SWIZ_G (1 << 24) +# define R500_DY_S_SWIZ_B (2 << 24) +# define R500_DY_S_SWIZ_A (3 << 24) +# define R500_DY_T_SWIZ_R (0 << 26) +# define R500_DY_T_SWIZ_G (1 << 26) +# define R500_DY_T_SWIZ_B (2 << 26) +# define R500_DY_T_SWIZ_A (3 << 26) +# define R500_DY_R_SWIZ_R (0 << 28) +# define R500_DY_R_SWIZ_G (1 << 28) +# define R500_DY_R_SWIZ_B (2 << 28) +# define R500_DY_R_SWIZ_A (3 << 28) +# define R500_DY_Q_SWIZ_R (0 << 30) +# define R500_DY_Q_SWIZ_G (1 << 30) +# define R500_DY_Q_SWIZ_B (2 << 30) +# define R500_DY_Q_SWIZ_A (3 << 30) +#define R500_US_TEX_INST_0 0x9000 +# define R500_TEX_ID(x) (x << 16) +# define R500_TEX_INST_NOP (0 << 22) +# define R500_TEX_INST_LD (1 << 22) +# define R500_TEX_INST_TEXKILL (2 << 22) +# define R500_TEX_INST_PROJ (3 << 22) +# define R500_TEX_INST_LODBIAS (4 << 22) +# define R500_TEX_INST_LOD (5 << 22) +# define R500_TEX_INST_DXDY (6 << 22) +# define R500_TEX_SEM_ACQUIRE (1 << 25) +# define R500_TEX_IGNORE_UNCOVERED (1 << 26) +# define R500_TEX_UNSCALED (1 << 27) +#define R300_US_W_FMT 0x46b4 +# define R300_W_FMT_W0 (0 << 0) +# define R300_W_FMT_W24 (1 << 0) +# define R300_W_FMT_W24FP (2 << 0) +# define R300_W_SRC_US (0 << 2) +# define R300_W_SRC_RAS (1 << 2) + + +/* Draw a primitive from vertex data in arrays loaded via 3D_LOAD_VBPNTR. + * Two parameter dwords: + * 0. VAP_VTX_FMT: The first parameter is not written to hardware + * 1. VAP_VF_CTL: The second parameter is a standard primitive emission dword. + */ +#define R300_PACKET3_3D_DRAW_VBUF 0x00002800 + +/* Draw a primitive from immediate vertices in this packet + * Up to 16382 dwords: + * 0. VAP_VTX_FMT: The first parameter is not written to hardware + * 1. VAP_VF_CTL: The second parameter is a standard primitive emission dword. + * 2 to end: Up to 16380 dwords of vertex data. + */ +#define R300_PACKET3_3D_DRAW_IMMD 0x00002900 + +/* Draw a primitive from vertex data in arrays loaded via 3D_LOAD_VBPNTR and + * immediate vertices in this packet + * Up to 16382 dwords: + * 0. VAP_VTX_FMT: The first parameter is not written to hardware + * 1. VAP_VF_CTL: The second parameter is a standard primitive emission dword. + * 2 to end: Up to 16380 dwords of vertex data. + */ +#define R300_PACKET3_3D_DRAW_INDX 0x00002A00 + + +/* Specify the full set of vertex arrays as (address, stride). + * The first parameter is the number of vertex arrays specified. + * The rest of the command is a variable length list of blocks, where + * each block is three dwords long and specifies two arrays. + * The first dword of a block is split into two words, the lower significant + * word refers to the first array, the more significant word to the second + * array in the block. + * The low byte of each word contains the size of an array entry in dwords, + * the high byte contains the stride of the array. + * The second dword of a block contains the pointer to the first array, + * the third dword of a block contains the pointer to the second array. + * Note that if the total number of arrays is odd, the third dword of + * the last block is omitted. + */ +#define R300_PACKET3_3D_LOAD_VBPNTR 0x00002F00 + +#define R300_PACKET3_INDX_BUFFER 0x00003300 +# define R300_EB_UNK1_SHIFT 24 +# define R300_EB_UNK1 (0x80<<24) +# define R300_EB_UNK2 0x0810 + +/* Same as R300_PACKET3_3D_DRAW_VBUF but without VAP_VTX_FMT */ +#define R300_PACKET3_3D_DRAW_VBUF_2 0x00003400 +/* Same as R300_PACKET3_3D_DRAW_IMMD but without VAP_VTX_FMT */ +#define R300_PACKET3_3D_DRAW_IMMD_2 0x00003500 +/* Same as R300_PACKET3_3D_DRAW_INDX but without VAP_VTX_FMT */ +#define R300_PACKET3_3D_DRAW_INDX_2 0x00003600 + +/* Clears a portion of hierachical Z RAM + * 3 dword parameters + * 0. START + * 1. COUNT: 13:0 (max is 0x3FFF) + * 2. CLEAR_VALUE: Value to write into HIZ RAM. + */ +#define R300_PACKET3_3D_CLEAR_HIZ 0x00003700 + +/* Draws a set of primitives using vertex buffers pointed by the state data. + * At least 2 Parameters: + * 0. VAP_VF_CNTL: The first parameter is a standard primitive emission dword. + * 2 to end: Data or indices (see other 3D_DRAW_* packets for details) + */ +#define R300_PACKET3_3D_DRAW_128 0x00003900 + +/* END: Packet 3 commands */ + + +/* Color formats for 2d packets + */ +#define R300_CP_COLOR_FORMAT_CI8 2 +#define R300_CP_COLOR_FORMAT_ARGB1555 3 +#define R300_CP_COLOR_FORMAT_RGB565 4 +#define R300_CP_COLOR_FORMAT_ARGB8888 6 +#define R300_CP_COLOR_FORMAT_RGB332 7 +#define R300_CP_COLOR_FORMAT_RGB8 9 +#define R300_CP_COLOR_FORMAT_ARGB4444 15 + +/* + * CP type-3 packets + */ +#define R300_CP_CMD_BITBLT_MULTI 0xC0009B00 + +#endif /* _R300_REG_H */ + +/* *INDENT-ON* */ + +/* vim: set foldenable foldmarker=\\{,\\} foldmethod=marker : */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index a853507fea..93441f624e 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -21,6 +21,127 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include "r300_context.h" +#include "r300_state.h" + +static uint32_t translate_blend_function(int blend_func) { + switch (blend_func) { + case PIPE_BLEND_ADD: + return R300_COMB_FCN_ADD_CLAMP; + case PIPE_BLEND_SUBTRACT: + return R300_COMB_FCN_SUB_CLAMP; + case PIPE_BLEND_REVERSE_SUBTRACT: + return R300_COMB_FCN_RSUB_CLAMP; + case PIPE_BLEND_MIN: + return R300_COMB_FCN_MIN; + case PIPE_BLEND_MAX: + return R300_COMB_FCN_MAX; + default: + /* XXX should be unreachable, handle this */ + break; + } + return 0; +} + +/* XXX we can also offer the D3D versions of some of these... */ +static uint32_t translate_blend_factor(int blend_fact) { + switch (blend_fact) { + case PIPE_BLENDFACTOR_ONE: + return R300_BLEND_GL_ONE; + case PIPE_BLENDFACTOR_SRC_COLOR: + return R300_BLEND_GL_SRC_COLOR; + case PIPE_BLENDFACTOR_SRC_ALPHA: + return R300_BLEND_GL_SRC_ALPHA; + case PIPE_BLENDFACTOR_DST_ALPHA: + return R300_BLEND_GL_DST_ALPHA; + case PIPE_BLENDFACTOR_DST_COLOR: + return R300_BLEND_GL_DST_COLOR; + case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE: + return R300_BLEND_GL_SRC_ALPHA_SATURATE; + case PIPE_BLENDFACTOR_CONST_COLOR: + return R300_BLEND_GL_CONST_COLOR; + case PIPE_BLENDFACTOR_CONST_ALPHA: + return R300_BLEND_GL_CONST_ALPHA; + /* XXX WTF are these? + case PIPE_BLENDFACTOR_SRC1_COLOR: + case PIPE_BLENDFACTOR_SRC1_ALPHA: */ + case PIPE_BLENDFACTOR_ZERO: + return R300_BLEND_GL_ZERO; + case PIPE_BLENDFACTOR_INV_SRC_COLOR: + return R300_BLEND_GL_ONE_MINUS_SRC_COLOR; + case PIPE_BLENDFACTOR_INV_SRC_ALPHA: + return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA; + case PIPE_BLENDFACTOR_INV_DST_ALPHA: + return R300_BLEND_GL_ONE_MINUS_DST_ALPHA; + case PIPE_BLENDFACTOR_INV_DST_COLOR: + return R300_BLEND_GL_ONE_MINUS_DST_COLOR; + case PIPE_BLENDFACTOR_INV_CONST_COLOR: + return R300_BLEND_GL_ONE_MINUS_CONST_COLOR; + case PIPE_BLENDFACTOR_INV_CONST_ALPHA: + return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA; + /* XXX see above + case PIPE_BLENDFACTOR_INV_SRC1_COLOR: + case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: */ + default: + /* XXX the mythical 0x16 blend factor! */ + break; + } + return 0; +} + +static void* r300_create_blend_state(struct pipe_context* pipe, + struct pipe_blend_state* state) +{ + struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); + + if (state->blend_enable) { + /* XXX for now, always do separate alpha... + * is it faster to do it with one reg? */ + blend->blend_control = R300_ALPHA_BLEND_ENABLE | + R300_SEPARATE_ALPHA_ENABLE | + R300_READ_ENABLE | + translate_blend_function(state->rgb_func) | + (translate_blend_factor(state->rgb_src_factor) << + R300_SRC_BLEND_SHIFT) | + (translate_blend_factor(state->rgb_dst_factor) << + R300_DST_BLEND_SHIFT); + blend->alpha_blend_control = + translate_blend_function(state->alpha_func) | + (translate_blend_factor(state->alpha_src_factor) << + R300_SRC_BLEND_SHIFT) | + (translate_blend_factor(state->alpha_dst_factor) << + R300_DST_BLEND_SHIFT); + } + + /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ + /* XXX are logicops still allowed if blending's disabled? + * Does Gallium take care of it for us? */ + if (state->logicop_enable) { + blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | + (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; + } + + if (state->dither) { + blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | + R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; + } + + return (void*)blend; +} + +static void r300_bind_blend_state(struct pipe_context* pipe, + void* state) +{ + struct r300_context* r300 = r300_context(pipe); + + r300->blend_state = (struct r300_blend_state*)state; + r300->dirty_state |= R300_NEW_BLEND; +} + +static void r300_delete_blend_state(struct pipe_context* pipe, + void* state) +{ + FREE(state); +} static void* r300_create_vs_state(struct pipe_context* pipe, struct pipe_shader_state* state) diff --git a/src/gallium/drivers/r300/r300_state.h b/src/gallium/drivers/r300/r300_state.h index 861425936a..ad363bf2af 100644 --- a/src/gallium/drivers/r300/r300_state.h +++ b/src/gallium/drivers/r300/r300_state.h @@ -23,4 +23,6 @@ #ifndef R300_STATE_H #define R300_STATE_H +#include "r300_reg.h" + #endif /* R300_STATE_H */ \ No newline at end of file -- cgit v1.2.3 From 28bb7f3206f023a9d3cfa020da344a57118a2efb Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 14 Jan 2009 00:49:48 -0800 Subject: r300: Add scissor state, fix build. --- src/gallium/drivers/r300/r300_context.h | 10 ++++++- src/gallium/drivers/r300/r300_state.c | 47 +++++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index b9fff0deab..6c64c9fa83 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -34,7 +34,13 @@ struct r300_blend_state { uint32_t dither; /* R300_RB3D_DITHER_CTL: 0x4e50 */ }; -#define R300_NEW_BLEND 0x1 +struct r300_scissor_state { + uint32_t scissor_top_left; /* R300_SC_SCISSORS_TL: 0x43e0 */ + uint32_t scissor_bottom_right; /* R300_SC_SCISSORS_BR: 0x43e4 */ +}; + +#define R300_NEW_BLEND 0x1 +#define R300_NEW_SCISSOR 0x2 struct r300_context { /* Parent class */ @@ -48,6 +54,8 @@ struct r300_context { /* Various CSO state objects. */ /* Blend state. */ struct r300_blend_state* blend_state; + /* Scissor state. */ + struct r300_scissor_state* scissor_state; /* Bitmask of dirty state objects. */ uint32_t dirty_state; diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 93441f624e..2e19955454 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -88,6 +88,9 @@ static uint32_t translate_blend_factor(int blend_fact) { return 0; } +/* Create a new blend state based on the CSO blend state. + * + * This encompasses alpha blending, logic/raster ops, and blend dithering. */ static void* r300_create_blend_state(struct pipe_context* pipe, struct pipe_blend_state* state) { @@ -128,6 +131,7 @@ static void* r300_create_blend_state(struct pipe_context* pipe, return (void*)blend; } +/* Bind blend state. */ static void r300_bind_blend_state(struct pipe_context* pipe, void* state) { @@ -137,12 +141,55 @@ static void r300_bind_blend_state(struct pipe_context* pipe, r300->dirty_state |= R300_NEW_BLEND; } +/* Free blend state. */ static void r300_delete_blend_state(struct pipe_context* pipe, void* state) { FREE(state); } +/* Create a new scissor state based on the CSO scissor state. + * + * This is only for the fragment scissors. */ +static void* r300_create_scissor_state(struct pipe_context* pipe, + struct pipe_scissor_state* state) +{ + uint32_t left, top, right, bottom; + struct r300_scissor_state* scissor = CALLOC_STRUCT(r300_scissor_state); + + /* So, a bit of info. The scissors are offset by R300_SCISSORS_OFFSET in + * both directions for all values, and can only be 13 bits wide. Why? + * We may never know. */ + left = (state->minx + R300_SCISSORS_OFFSET) & 0x1fff; + top = (state->miny + R300_SCISSORS_OFFSET) & 0x1fff; + right = (state->maxx + R300_SCISSORS_OFFSET) & 0x1fff; + bottom = (state->maxy + R300_SCISSORS_OFFSET) & 0x1fff; + + scissor->scissor_top_left = (left << R300_SCISSORS_X_SHIFT) | + (top << R300_SCISSORS_Y_SHIFT); + scissor->scissor_bottom_right = (right << R300_SCISSORS_X_SHIFT) | + (bottom << R300_SCISSORS_Y_SHIFT); + + return (void*)scissor; +} + +/* Bind scissor state.*/ +static void r300_bind_scissor_state(struct pipe_context* pipe, + void* state) +{ + struct r300_context* r300 = r300_context(pipe); + + r300->scissor_state = (struct r300_scissor_state*)state; + r300->dirty_state |= R300_NEW_SCISSOR; +} + +/* Delete scissor state. */ +static void r300_delete_scissor_state(struct pipe_context* pipe, + void* state) +{ + FREE(state); +} + static void* r300_create_vs_state(struct pipe_context* pipe, struct pipe_shader_state* state) { -- cgit v1.2.3 From bbb1c6f6298fcb1125a8170f22646f326b0ca74c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 14 Jan 2009 04:37:36 -0800 Subject: r300: Add DSA state. That's it for now. Just the "easy" stuff. Todo: - Rasterizer state, which is a lot more than just the RS. - Miscellaneous state which doesn't currently belong to any state object. - Shader assemblers? - Fix dynamic loading bugs. --- src/gallium/drivers/r300/r300_context.h | 15 ++- src/gallium/drivers/r300/r300_state.c | 162 ++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_state.h | 2 + 3 files changed, 178 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 6c64c9fa83..81c559cedf 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -34,13 +34,24 @@ struct r300_blend_state { uint32_t dither; /* R300_RB3D_DITHER_CTL: 0x4e50 */ }; +struct r300_dsa_state { + uint32_t alpha_function; /* R300_FG_ALPHA_FUNC: 0x4bd4 */ + uint32_t alpha_reference; /* R500_FG_ALPHA_VALUE: 0x4be0 */ + uint32_t z_buffer_control; /* R300_ZB_CNTL: 0x4f00 */ + uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */ + uint32_t stencil_ref_mask; /* R300_ZB_STENCILREFMASK: 0x4f08 */ + uint32_t z_buffer_top; /* R300_ZB_ZTOP: 0x4f14 */ + uint32_t stencil_ref_bf; /* R300_ZB_STENCILREFMASK_BF: 0x4fd4 */ +}; + struct r300_scissor_state { uint32_t scissor_top_left; /* R300_SC_SCISSORS_TL: 0x43e0 */ uint32_t scissor_bottom_right; /* R300_SC_SCISSORS_BR: 0x43e4 */ }; #define R300_NEW_BLEND 0x1 -#define R300_NEW_SCISSOR 0x2 +#define R300_NEW_DSA 0x2 +#define R300_NEW_SCISSOR 0x4 struct r300_context { /* Parent class */ @@ -54,6 +65,8 @@ struct r300_context { /* Various CSO state objects. */ /* Blend state. */ struct r300_blend_state* blend_state; + /* Depth, stencil, and alpha state. */ + struct r300_dsa_state* dsa_state; /* Scissor state. */ struct r300_scissor_state* scissor_state; diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 2e19955454..0f0660c403 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -148,6 +148,168 @@ static void r300_delete_blend_state(struct pipe_context* pipe, FREE(state); } +static uint32_t translate_depth_stencil_function(int zs_func) { + switch (zs_func) { + case PIPE_FUNC_NEVER: + return R300_ZS_NEVER; + case PIPE_FUNC_LESS: + return R300_ZS_LESS; + case PIPE_FUNC_EQUAL: + return R300_ZS_EQUAL; + case PIPE_FUNC_LEQUAL: + return R300_ZS_LEQUAL; + case PIPE_FUNC_GREATER: + return R300_ZS_GREATER; + case PIPE_FUNC_NOTEQUAL: + return R300_ZS_NOTEQUAL; + case PIPE_FUNC_GEQUAL: + return R300_ZS_GEQUAL; + case PIPE_FUNC_ALWAYS: + return R300_ZS_ALWAYS; + default: + /* XXX shouldn't be reachable */ + break; + } + return 0; +} + +static uint32_t translate_stencil_op(int s_op) { + switch (s_op) { + case PIPE_STENCIL_OP_KEEP: + return R300_ZS_KEEP; + case PIPE_STENCIL_OP_ZERO: + return R300_ZS_ZERO; + case PIPE_STENCIL_OP_REPLACE: + return R300_ZS_REPLACE; + case PIPE_STENCIL_OP_INCR: + return R300_ZS_INCR; + case PIPE_STENCIL_OP_DECR: + return R300_ZS_DECR; + case PIPE_STENCIL_OP_INCR_WRAP: + return R300_ZS_INCR_WRAP; + case PIPE_STENCIL_OP_DECR_WRAP: + return R300_ZS_DECR_WRAP; + case PIPE_STENCIL_OP_INVERT: + return R300_ZS_INVERT; + default: + /* XXX shouldn't be reachable */ + break; + } + return 0; +} + +static uint32_t translate_alpha_function(int alpha_func) { + switch (alpha_func) { + case PIPE_FUNC_NEVER: + return R300_FG_ALPHA_FUNC_NEVER; + case PIPE_FUNC_LESS: + return R300_FG_ALPHA_FUNC_LESS; + case PIPE_FUNC_EQUAL: + return R300_FG_ALPHA_FUNC_EQUAL; + case PIPE_FUNC_LEQUAL: + return R300_FG_ALPHA_FUNC_LE; + case PIPE_FUNC_GREATER: + return R300_FG_ALPHA_FUNC_GREATER; + case PIPE_FUNC_NOTEQUAL: + return R300_FG_ALPHA_FUNC_NOTEQUAL; + case PIPE_FUNC_GEQUAL: + return R300_FG_ALPHA_FUNC_GE; + case PIPE_FUNC_ALWAYS: + return R300_FG_ALPHA_FUNC_ALWAYS; + default: + /* XXX shouldn't be reachable */ + break; + } + return 0; +} + +/* Create a new depth, stencil, and alpha state based on the CSO dsa state. + * + * This contains the depth buffer, stencil buffer, alpha test, and such. + * On the Radeon, depth and stencil buffer setup are intertwined, which is + * the reason for some of the strange-looking assignments across registers. */ +static void* r300_create_dsa_state(struct pipe_context* pipe, + struct pipe_depth_stencil_alpha_state* state) +{ + struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); + + /* Depth test setup. */ + if (state->depth.enabled) { + dsa->z_buffer_control |= R300_Z_ENABLE; + + if (state->depth.writemask) { + dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; + } + + dsa->z_stencil_control |= + (translate_depth_stencil_function(state->depth.func) << + R300_Z_FUNC_SHIFT); + } + + /* Stencil buffer setup. */ + if (state->stencil[0].enabled) { + dsa->z_buffer_control |= R300_STENCIL_ENABLE; + dsa->z_stencil_control |= + (translate_depth_stencil_function(state->stencil[0].func) << + R300_S_FRONT_FUNC_SHIFT) | + (translate_stencil_op(state->stencil[0].fail_op) << + R300_S_FRONT_SFAIL_OP_SHIFT) | + (translate_stencil_op(state->stencil[0].zpass_op) << + R300_S_FRONT_ZPASS_OP_SHIFT) | + (translate_stencil_op(state->stencil[0].zfail_op) << + R300_S_FRONT_ZFAIL_OP_SHIFT); + + dsa->stencil_ref_mask = (state->stencil[0].ref_value) | + (state->stencil[0].value_mask << R300_STENCILMASK_SHIFT) | + (state->stencil[0].write_mask << R300_STENCILWRITEMASK_SHIFT); + + if (state->stencil[1].enabled) { + dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; + dsa->z_stencil_control |= + (translate_depth_stencil_function(state->stencil[1].func) << + R300_S_BACK_FUNC_SHIFT) | + (translate_stencil_op(state->stencil[1].fail_op) << + R300_S_BACK_SFAIL_OP_SHIFT) | + (translate_stencil_op(state->stencil[1].zpass_op) << + R300_S_BACK_ZPASS_OP_SHIFT) | + (translate_stencil_op(state->stencil[1].zfail_op) << + R300_S_BACK_ZFAIL_OP_SHIFT); + + dsa->stencil_ref_bf = (state->stencil[1].ref_value) | + (state->stencil[1].value_mask << R300_STENCILMASK_SHIFT) | + (state->stencil[1].write_mask << R300_STENCILWRITEMASK_SHIFT); + } + } + + /* Alpha test setup. */ + if (state->alpha.enabled) { + dsa->alpha_function = translate_alpha_function(state->alpha.func) | + R300_FG_ALPHA_FUNC_ENABLE; + dsa->alpha_reference = CLAMP(state->alpha.ref * 1023.0f, 0, 1023); + } else { + dsa->z_buffer_top = R300_ZTOP_ENABLE; + } + + return (void*)dsa; +} + +/* Bind DSA state. */ +static void r300_bind_dsa_state(struct pipe_context* pipe, + void* state) +{ + struct r300_context* r300 = r300_context(pipe); + + r300->dsa_state = (struct r300_dsa_state*)state; + r300->dirty_state |= R300_NEW_DSA; +} + +/* Free DSA state. */ +static void r300_delete_dsa_state(struct pipe_context* pipe, + void* state) +{ + FREE(state); +} + /* Create a new scissor state based on the CSO scissor state. * * This is only for the fragment scissors. */ diff --git a/src/gallium/drivers/r300/r300_state.h b/src/gallium/drivers/r300/r300_state.h index ad363bf2af..c8b742281e 100644 --- a/src/gallium/drivers/r300/r300_state.h +++ b/src/gallium/drivers/r300/r300_state.h @@ -25,4 +25,6 @@ #include "r300_reg.h" +#include "util/u_math.h" + #endif /* R300_STATE_H */ \ No newline at end of file -- cgit v1.2.3 From 21a5a133fff3ab1a068a11a32144dcb63f1d5020 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 14 Jan 2009 05:00:22 -0800 Subject: r300: Hook up state functions. Haha, should not have attempted the scissors. --- src/gallium/drivers/r300/r300_context.c | 2 ++ src/gallium/drivers/r300/r300_context.h | 8 ++--- src/gallium/drivers/r300/r300_state.c | 60 +++++++++++++-------------------- 3 files changed, 27 insertions(+), 43 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index b9a9c2e21c..67cc1e4586 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -54,5 +54,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300_init_surface_functions(r300); + r300_init_state_functions(r300); + return &r300->context; } diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 81c559cedf..40c310abca 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -44,11 +44,6 @@ struct r300_dsa_state { uint32_t stencil_ref_bf; /* R300_ZB_STENCILREFMASK_BF: 0x4fd4 */ }; -struct r300_scissor_state { - uint32_t scissor_top_left; /* R300_SC_SCISSORS_TL: 0x43e0 */ - uint32_t scissor_bottom_right; /* R300_SC_SCISSORS_BR: 0x43e4 */ -}; - #define R300_NEW_BLEND 0x1 #define R300_NEW_DSA 0x2 #define R300_NEW_SCISSOR 0x4 @@ -68,7 +63,7 @@ struct r300_context { /* Depth, stencil, and alpha state. */ struct r300_dsa_state* dsa_state; /* Scissor state. */ - struct r300_scissor_state* scissor_state; + struct pipe_scissor_state* scissor_state; /* Bitmask of dirty state objects. */ uint32_t dirty_state; @@ -80,6 +75,7 @@ static struct r300_context* r300_context(struct pipe_context* context) { } /* Context initialization. */ +void r300_init_state_functions(struct r300_context* r300); void r300_init_surface_functions(struct r300_context* r300); struct pipe_context* r300_create_context(struct pipe_screen* screen, diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 0f0660c403..122e06c6e6 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -92,7 +92,7 @@ static uint32_t translate_blend_factor(int blend_fact) { * * This encompasses alpha blending, logic/raster ops, and blend dithering. */ static void* r300_create_blend_state(struct pipe_context* pipe, - struct pipe_blend_state* state) + const struct pipe_blend_state* state) { struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); @@ -310,48 +310,17 @@ static void r300_delete_dsa_state(struct pipe_context* pipe, FREE(state); } -/* Create a new scissor state based on the CSO scissor state. - * - * This is only for the fragment scissors. */ -static void* r300_create_scissor_state(struct pipe_context* pipe, - struct pipe_scissor_state* state) -{ - uint32_t left, top, right, bottom; - struct r300_scissor_state* scissor = CALLOC_STRUCT(r300_scissor_state); - - /* So, a bit of info. The scissors are offset by R300_SCISSORS_OFFSET in - * both directions for all values, and can only be 13 bits wide. Why? - * We may never know. */ - left = (state->minx + R300_SCISSORS_OFFSET) & 0x1fff; - top = (state->miny + R300_SCISSORS_OFFSET) & 0x1fff; - right = (state->maxx + R300_SCISSORS_OFFSET) & 0x1fff; - bottom = (state->maxy + R300_SCISSORS_OFFSET) & 0x1fff; - - scissor->scissor_top_left = (left << R300_SCISSORS_X_SHIFT) | - (top << R300_SCISSORS_Y_SHIFT); - scissor->scissor_bottom_right = (right << R300_SCISSORS_X_SHIFT) | - (bottom << R300_SCISSORS_Y_SHIFT); - - return (void*)scissor; -} - -/* Bind scissor state.*/ -static void r300_bind_scissor_state(struct pipe_context* pipe, - void* state) +static void r300_set_scissor_state(struct pipe_context* pipe, + struct pipe_scissor_state* state) { struct r300_context* r300 = r300_context(pipe); + draw_flush(r300->draw); - r300->scissor_state = (struct r300_scissor_state*)state; + /* XXX figure out how this memory doesn't get lost in space + memcpy(r300->scissor, scissor, sizeof(struct pipe_scissor_state)); */ r300->dirty_state |= R300_NEW_SCISSOR; } -/* Delete scissor state. */ -static void r300_delete_scissor_state(struct pipe_context* pipe, - void* state) -{ - FREE(state); -} - static void* r300_create_vs_state(struct pipe_context* pipe, struct pipe_shader_state* state) { @@ -371,4 +340,21 @@ static void r300_delete_vs_state(struct pipe_context* pipe, void* state) struct r300_context* context = r300_context(pipe); /* XXX handing this off to Draw for now */ draw_delete_vertex_shader(context->draw, (struct draw_vertex_shader*)state); +} + +void r300_init_state_functions(struct r300_context* r300) { + + r300->context.create_blend_state = r300_create_blend_state; + r300->context.bind_blend_state = r300_bind_blend_state; + r300->context.delete_blend_state = r300_delete_blend_state; + + r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; + r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; + r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; + + r300->context.set_scissor_state = r300_set_scissor_state; + + r300->context.create_vs_state = r300_create_vs_state; + r300->context.bind_vs_state = r300_bind_vs_state; + r300->context.delete_vs_state = r300_delete_vs_state; } \ No newline at end of file -- cgit v1.2.3 From 4ce81294943177eed99d7418f1a2f88573b578fe Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 14 Jan 2009 12:51:47 -0800 Subject: r300: Fix errant inlines. This should unbreak dynamic loading. --- src/gallium/drivers/r300/r300_context.h | 4 +++- src/gallium/drivers/r300/r300_screen.h | 3 +-- 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 40c310abca..0551275dcc 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -27,6 +27,8 @@ #include "pipe/p_context.h" #include "util/u_memory.h" +#include "r300_screen.h" + struct r300_blend_state { uint32_t blend_control; /* R300_RB3D_BLENDCNTL: 0x4e04 */ uint32_t alpha_blend_control; /* R300_RB3D_ABLENDCNTL: 0x4e08 */ @@ -82,4 +84,4 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, struct pipe_winsys* winsys, struct r300_winsys* r300_winsys); -#endif /* R300_CONTEXT_H */ \ No newline at end of file +#endif /* R300_CONTEXT_H */ diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index 36fc5aa67d..a1b97f218e 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -23,11 +23,10 @@ #ifndef R300_SCREEN_H #define R300_SCREEN_H +#include "pipe/p_inlines.h" #include "pipe/p_screen.h" #include "util/u_memory.h" -#include "r300_context.h" - struct r300_screen { /* Parent class */ struct pipe_screen screen; -- cgit v1.2.3 From a08a830fd3c22bdbad1ee840e4e56302152375f1 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 17 Jan 2009 01:41:52 -0800 Subject: r300: Add more state. pipe_rasterizer_state is big, and I'm still processing it. Todo: - LOL EVERYTHING - Moar cough syrup. - Even moar cough syrup. --- src/gallium/drivers/r300/r300_context.c | 8 +- src/gallium/drivers/r300/r300_context.h | 21 ++++- src/gallium/drivers/r300/r300_state.c | 136 +++++++++++++++++++++++++++++++- 3 files changed, 155 insertions(+), 10 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 67cc1e4586..6dfc9ed624 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -27,7 +27,8 @@ static void r300_destroy_context(struct pipe_context* context) { draw_destroy(r300->draw); - FREE(context); + FREE(r300->scissor_state); + FREE(r300); } struct pipe_context* r300_create_context(struct pipe_screen* screen, @@ -47,10 +48,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->draw = draw_create(); - /* XXX this is almost certainly wrong - * put this all in winsys, where we can get an FD - struct radeon_cs_manager* csm = radeon_cs_manager_gem_ctor(fd); - r300->cs = cs_gem_create(csm, 64 * 1024 / 4); */ + r300->scissor_state = CALLOC_STRUCT(r300_scissor_state); r300_init_surface_functions(r300); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 0551275dcc..ea057bcab7 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -46,9 +46,24 @@ struct r300_dsa_state { uint32_t stencil_ref_bf; /* R300_ZB_STENCILREFMASK_BF: 0x4fd4 */ }; +struct r300_rs_state { + uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */ + uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */ + uint32_t depth_scale_front; /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */ + uint32_t depth_offset_front; /* R300_SU_POLY_OFFSET_FRONT_OFFSET: 0x42a8 */ + uint32_t depth_scale_back; /* R300_SU_POLY_OFFSET_BACK_SCALE: 0x42ac */ + uint32_t depth_offset_back; /* R300_SU_POLY_OFFSET_BACK_OFFSET: 0x42b0 */ +}; + +struct r300_scissor_state { + uint32_t scissor_top_left; /* R300_SC_SCISSORS_TL: 0x43e0 */ + uint32_t scissor_bottom_right; /* R300_SC_SCISSORS_BR: 0x43e4 */ +}; + #define R300_NEW_BLEND 0x1 #define R300_NEW_DSA 0x2 -#define R300_NEW_SCISSOR 0x4 +#define R300_NEW_RS 0x4 +#define R300_NEW_SCISSOR 0x8 struct r300_context { /* Parent class */ @@ -64,8 +79,10 @@ struct r300_context { struct r300_blend_state* blend_state; /* Depth, stencil, and alpha state. */ struct r300_dsa_state* dsa_state; + /* Rasterizer state. */ + struct r300_rs_state* rs_state; /* Scissor state. */ - struct pipe_scissor_state* scissor_state; + struct r300_scissor_state* scissor_state; /* Bitmask of dirty state objects. */ uint32_t dirty_state; diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 122e06c6e6..7668b14c63 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -23,6 +23,23 @@ #include "r300_context.h" #include "r300_state.h" +/* r300_state: Functions used to intialize state context by translating + * Gallium state objects into semi-native r300 state objects. + * + * XXX break this file up into pieces if it gets too big! */ + +/* Pack a float into a dword. */ +static uint32_t pack_float_32(float f) +{ + union { + float f; + uint32_t u; + } u; + + u.f = f; + return u.u; +} + static uint32_t translate_blend_function(int blend_func) { switch (blend_func) { case PIPE_BLEND_ADD: @@ -229,7 +246,7 @@ static uint32_t translate_alpha_function(int alpha_func) { * On the Radeon, depth and stencil buffer setup are intertwined, which is * the reason for some of the strange-looking assignments across registers. */ static void* r300_create_dsa_state(struct pipe_context* pipe, - struct pipe_depth_stencil_alpha_state* state) + struct pipe_depth_stencil_alpha_state* state) { struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); @@ -309,6 +326,102 @@ static void r300_delete_dsa_state(struct pipe_context* pipe, { FREE(state); } +#if 0 +struct pipe_rasterizer_state +{ + unsigned flatshade:1; + unsigned light_twoside:1; + unsigned fill_cw:2; /**< PIPE_POLYGON_MODE_x */ + unsigned fill_ccw:2; /**< PIPE_POLYGON_MODE_x */ + unsigned scissor:1; + unsigned poly_smooth:1; + unsigned poly_stipple_enable:1; + unsigned point_smooth:1; + unsigned point_sprite:1; + unsigned point_size_per_vertex:1; /**< size computed in vertex shader */ + unsigned multisample:1; /* XXX maybe more ms state in future */ + unsigned line_smooth:1; + unsigned line_stipple_enable:1; + unsigned line_stipple_factor:8; /**< [1..256] actually */ + unsigned line_stipple_pattern:16; + unsigned line_last_pixel:1; + unsigned bypass_clipping:1; + unsigned bypass_vs:1; /**< Skip the vertex shader. Note that the shader is + still needed though, to indicate inputs/outputs */ + unsigned origin_lower_left:1; /**< Is (0,0) the lower-left corner? */ + unsigned flatshade_first:1; /**< take color attribute from the first vertex of a primitive */ + unsigned gl_rasterization_rules:1; /**< enable tweaks for GL rasterization? */ + + float line_width; + float point_size; /**< used when no per-vertex size */ + float point_size_min; /* XXX - temporary, will go away */ + float point_size_max; /* XXX - temporary, will go away */ + ubyte sprite_coord_mode[PIPE_MAX_SHADER_OUTPUTS]; /**< PIPE_SPRITE_COORD_ */ +}; +#endif +/* Create a new rasterizer state based on the CSO rasterizer state. + * + * This is a very large chunk of state, and covers most of the graphics + * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. + * + * In a not entirely unironic sidenote, this state has nearly nothing to do + * with the actual block on the Radeon called the rasterizer (RS). */ +static void* r300_create_rs_state(struct pipe_context* pipe, + struct pipe_rasterizer_state* state) +{ + struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); + + /* Radeons don't think in "CW/CCW", they think in "front/back". */ + if (state->front_winding == PIPE_WINDING_CW) { + rs->cull_mode = R300_FRONT_FACE_CW; + + if (state->offset_cw) { + rs->polygon_offset_enable |= R300_FRONT_ENABLE; + } + if (state->offset_ccw) { + rs->polygon_offset_enable |= R300_BACK_ENABLE; + } + } else { + rs->cull_mode = R300_FRONT_FACE_CCW; + + if (state->offset_ccw) { + rs->polygon_offset_enable |= R300_FRONT_ENABLE; + } + if (state->offset_cw) { + rs->polygon_offset_enable |= R300_BACK_ENABLE; + } + } + if (state->front_winding & state->cull_mode) { + rs->cull_mode |= R300_CULL_FRONT; + } + if (~(state->front_winding) & state->cull_mode) { + rs->cull_mode |= R300_CULL_BACK; + } + + if (rs->polygon_offset_enable) { + rs->depth_offset_front = rs->depth_offset_back = + pack_float_32(state->offset_units); + rs->depth_scale_front = rs->depth_scale_back = + pack_float_32(state->offset_scale); + } + + return (void*)rs; +} + +/* Bind rasterizer state. */ +static void r300_bind_rs_state(struct pipe_context* pipe, void* state) +{ + struct r300_context* r300 = r300_context(pipe); + + r300->rs_state = (struct r300_rs_state*)state; + r300->dirty_state |= R300_NEW_RS; +} + +/* Free rasterizer state. */ +static void r300_delete_rs_state(struct pipe_context* pipe, void* state) +{ + FREE(state); +} static void r300_set_scissor_state(struct pipe_context* pipe, struct pipe_scissor_state* state) @@ -316,8 +429,21 @@ static void r300_set_scissor_state(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); draw_flush(r300->draw); - /* XXX figure out how this memory doesn't get lost in space - memcpy(r300->scissor, scissor, sizeof(struct pipe_scissor_state)); */ + uint32_t left, top, right, bottom; + + /* So, a bit of info. The scissors are offset by R300_SCISSORS_OFFSET in + * both directions for all values, and can only be 13 bits wide. Why? + * We may never know. */ + left = (state->minx + R300_SCISSORS_OFFSET) & 0x1fff; + top = (state->miny + R300_SCISSORS_OFFSET) & 0x1fff; + right = (state->maxx + R300_SCISSORS_OFFSET) & 0x1fff; + bottom = (state->maxy + R300_SCISSORS_OFFSET) & 0x1fff; + + r300->scissor_state->scissor_top_left = (left << R300_SCISSORS_X_SHIFT) | + (top << R300_SCISSORS_Y_SHIFT); + r300->scissor_state->scissor_bottom_right = (right << R300_SCISSORS_X_SHIFT) | + (bottom << R300_SCISSORS_Y_SHIFT); + r300->dirty_state |= R300_NEW_SCISSOR; } @@ -348,6 +474,10 @@ void r300_init_state_functions(struct r300_context* r300) { r300->context.bind_blend_state = r300_bind_blend_state; r300->context.delete_blend_state = r300_delete_blend_state; + r300->context.create_rasterizer_state = r300_create_rs_state; + r300->context.bind_rasterizer_state = r300_bind_rs_state; + r300->context.delete_rasterizer_state = r300_delete_rs_state; + r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; -- cgit v1.2.3 From f3b53a5cb6a04b86ccd75cc38c73c8e3dd117894 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 17 Jan 2009 02:25:52 -0800 Subject: r300: Add blend color. --- src/gallium/drivers/r300/r300_context.c | 2 ++ src/gallium/drivers/r300/r300_context.h | 19 +++++++++++++++---- src/gallium/drivers/r300/r300_state.c | 29 +++++++++++++++++++++++++++++ 3 files changed, 46 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 6dfc9ed624..b072179f5b 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -27,6 +27,7 @@ static void r300_destroy_context(struct pipe_context* context) { draw_destroy(r300->draw); + FREE(r300->blend_color_state); FREE(r300->scissor_state); FREE(r300); } @@ -48,6 +49,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->draw = draw_create(); + r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); r300->scissor_state = CALLOC_STRUCT(r300_scissor_state); r300_init_surface_functions(r300); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index ea057bcab7..4cbbf96fb1 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -36,6 +36,14 @@ struct r300_blend_state { uint32_t dither; /* R300_RB3D_DITHER_CTL: 0x4e50 */ }; +struct r300_blend_color_state { + /* RV515 and earlier */ + uint32_t blend_color; /* R300_RB3D_BLEND_COLOR: 0x4e10 */ + /* R520 and newer */ + uint32_t blend_color_red_alpha; /* R500_RB3D_CONSTANT_COLOR_AR: 0x4ef8 */ + uint32_t blend_color_green_blue; /* R500_RB3D_CONSTANT_COLOR_GB: 0x4efc */ +}; + struct r300_dsa_state { uint32_t alpha_function; /* R300_FG_ALPHA_FUNC: 0x4bd4 */ uint32_t alpha_reference; /* R500_FG_ALPHA_VALUE: 0x4be0 */ @@ -60,10 +68,11 @@ struct r300_scissor_state { uint32_t scissor_bottom_right; /* R300_SC_SCISSORS_BR: 0x43e4 */ }; -#define R300_NEW_BLEND 0x1 -#define R300_NEW_DSA 0x2 -#define R300_NEW_RS 0x4 -#define R300_NEW_SCISSOR 0x8 +#define R300_NEW_BLEND 0x01 +#define R300_NEW_BLEND_COLOR 0x02 +#define R300_NEW_DSA 0x04 +#define R300_NEW_RS 0x08 +#define R300_NEW_SCISSOR 0x10 struct r300_context { /* Parent class */ @@ -77,6 +86,8 @@ struct r300_context { /* Various CSO state objects. */ /* Blend state. */ struct r300_blend_state* blend_state; + /* Blend color state. */ + struct r300_blend_color_state* blend_color_state; /* Depth, stencil, and alpha state. */ struct r300_dsa_state* dsa_state; /* Rasterizer state. */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 7668b14c63..4392078e74 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -165,6 +165,33 @@ static void r300_delete_blend_state(struct pipe_context* pipe, FREE(state); } +/* Set blend color. + * Setup both R300 and R500 registers, figure out later which one to write. */ +static void r300_set_blend_color(struct pipe_context* pipe, + const struct pipe_blend_color* color) +{ + struct r300_context* r300 = r300_context(pipe); + uint32_t r, g, b, a; + ubyte ur, ug, ub, ua; + + r = util_iround(color->color[0] * 1023.0f); + g = util_iround(color->color[1] * 1023.0f); + b = util_iround(color->color[2] * 1023.0f); + a = util_iround(color->color[3] * 1023.0f); + + ur = float_to_ubyte(color->color[0]); + ug = float_to_ubyte(color->color[1]); + ub = float_to_ubyte(color->color[2]); + ua = float_to_ubyte(color->color[3]); + + r300->blend_color_state->blend_color = (a << 24) | (r << 16) | (g << 8) | b; + + r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16); + r300->blend_color_state->blend_color_green_blue = ub | (ug << 16); + + r300->dirty_state |= R300_NEW_BLEND_COLOR; +} + static uint32_t translate_depth_stencil_function(int zs_func) { switch (zs_func) { case PIPE_FUNC_NEVER: @@ -474,6 +501,8 @@ void r300_init_state_functions(struct r300_context* r300) { r300->context.bind_blend_state = r300_bind_blend_state; r300->context.delete_blend_state = r300_delete_blend_state; + r300->context.set_blend_color = r300_set_blend_color; + r300->context.create_rasterizer_state = r300_create_rs_state; r300->context.bind_rasterizer_state = r300_bind_rs_state; r300->context.delete_rasterizer_state = r300_delete_rs_state; -- cgit v1.2.3 From 4ea17301c60a805394b8938174d8f436dc3deb6d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 17 Jan 2009 02:27:33 -0800 Subject: r300: Remove r300_state.h --- src/gallium/drivers/r300/r300_state.c | 4 +++- src/gallium/drivers/r300/r300_state.h | 30 ------------------------------ 2 files changed, 3 insertions(+), 31 deletions(-) delete mode 100644 src/gallium/drivers/r300/r300_state.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 4392078e74..cff4b30d16 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -20,8 +20,10 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#include "util/u_math.h" + #include "r300_context.h" -#include "r300_state.h" +#include "r300_reg.h" /* r300_state: Functions used to intialize state context by translating * Gallium state objects into semi-native r300 state objects. diff --git a/src/gallium/drivers/r300/r300_state.h b/src/gallium/drivers/r300/r300_state.h deleted file mode 100644 index c8b742281e..0000000000 --- a/src/gallium/drivers/r300/r300_state.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright 2008 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#ifndef R300_STATE_H -#define R300_STATE_H - -#include "r300_reg.h" - -#include "util/u_math.h" - -#endif /* R300_STATE_H */ \ No newline at end of file -- cgit v1.2.3 From 7961974fc28257b293961d35f15c0ce7a85f2669 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 17 Jan 2009 03:20:48 -0800 Subject: r300: Add a basic dirty state emit. I feel strangely unproductive. Must be the cold. --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_context.h | 11 ++-- src/gallium/drivers/r300/r300_cs.h | 3 ++ src/gallium/drivers/r300/r300_emit.c | 92 +++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_screen.c | 7 ++- 5 files changed, 108 insertions(+), 6 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_emit.c (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index bce7dcbf3a..644e6d0ba3 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -7,6 +7,7 @@ C_SOURCES = \ r300_blit.c \ r300_clear.c \ r300_context.c \ + r300_emit.c \ r300_screen.c \ r300_state.c \ r300_surface.c diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 4cbbf96fb1..ad1e4fc7c4 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -30,8 +30,8 @@ #include "r300_screen.h" struct r300_blend_state { - uint32_t blend_control; /* R300_RB3D_BLENDCNTL: 0x4e04 */ - uint32_t alpha_blend_control; /* R300_RB3D_ABLENDCNTL: 0x4e08 */ + uint32_t blend_control; /* R300_RB3D_CBLEND: 0x4e04 */ + uint32_t alpha_blend_control; /* R300_RB3D_ABLEND: 0x4e08 */ uint32_t rop; /* R300_RB3D_ROPCNTL: 0x4e18 */ uint32_t dither; /* R300_RB3D_DITHER_CTL: 0x4e50 */ }; @@ -51,16 +51,16 @@ struct r300_dsa_state { uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */ uint32_t stencil_ref_mask; /* R300_ZB_STENCILREFMASK: 0x4f08 */ uint32_t z_buffer_top; /* R300_ZB_ZTOP: 0x4f14 */ - uint32_t stencil_ref_bf; /* R300_ZB_STENCILREFMASK_BF: 0x4fd4 */ + uint32_t stencil_ref_bf; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */ }; struct r300_rs_state { - uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */ - uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */ uint32_t depth_scale_front; /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */ uint32_t depth_offset_front; /* R300_SU_POLY_OFFSET_FRONT_OFFSET: 0x42a8 */ uint32_t depth_scale_back; /* R300_SU_POLY_OFFSET_BACK_SCALE: 0x42ac */ uint32_t depth_offset_back; /* R300_SU_POLY_OFFSET_BACK_OFFSET: 0x42b0 */ + uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */ + uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */ }; struct r300_scissor_state { @@ -73,6 +73,7 @@ struct r300_scissor_state { #define R300_NEW_DSA 0x04 #define R300_NEW_RS 0x08 #define R300_NEW_SCISSOR 0x10 +#define R300_NEW_KITCHEN_SINK 0x1f struct r300_context { /* Parent class */ diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 92ed807657..3dacf25380 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -37,6 +37,9 @@ #define RADEON_GEM_DOMAIN_GTT 0x2 #define RADEON_GEM_DOMAIN_VRAM 0x4 +/* XXX stolen from radeon_reg.h */ +#define RADEON_CP_PACKET0 0x0 + #define CP_PACKET0(register, count) \ (RADEON_CP_PACKET0 | ((count) << 16) | ((register) >> 2)) diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c new file mode 100644 index 0000000000..8662830ee2 --- /dev/null +++ b/src/gallium/drivers/r300/r300_emit.c @@ -0,0 +1,92 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +/* r300_emit: Functions for emitting state. */ + +#include "r300_context.h" +#include "r300_cs.h" +#include "r300_screen.h" + +static void r300_emit_dirty_state(struct r300_context* r300) +{ + struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; + CS_LOCALS(r300); + + /* XXX check size */ + + if (r300->dirty_state & R300_NEW_BLEND) { + struct r300_blend_state* blend = r300->blend_state; + /* XXX next two are contiguous regs */ + OUT_CS_REG(R300_RB3D_CBLEND, blend->blend_control); + OUT_CS_REG(R300_RB3D_ABLEND, blend->alpha_blend_control); + OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop); + OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither); + } + + if (r300->dirty_state & R300_NEW_BLEND_COLOR) { + struct r300_blend_color_state* blend_color = r300->blend_color_state; + if (r300screen->is_r500) { + /* XXX next two are contiguous regs */ + OUT_CS_REG(R500_RB3D_CONSTANT_COLOR_AR, + blend_color->blend_color_red_alpha); + OUT_CS_REG(R500_RB3D_CONSTANT_COLOR_GB, + blend_color->blend_color_green_blue); + } else { + OUT_CS_REG(R300_RB3D_BLEND_COLOR, + blend_color->blend_color); + } + } + + if (r300->dirty_state & R300_NEW_DSA) { + struct r300_dsa_state* dsa = r300->dsa_state; + OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); + OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + /* XXX next three are contiguous regs */ + OUT_CS_REG(R300_ZB_CNTL, dsa->z_buffer_control); + OUT_CS_REG(R300_ZB_ZSTENCILCNTL, dsa->z_stencil_control); + OUT_CS_REG(R300_ZB_STENCILREFMASK, dsa->stencil_ref_mask); + OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); + if (r300screen->is_r500) { + OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); + } + } + + if (r300->dirty_state & R300_NEW_RS) { + struct r300_rs_state* rs = r300->rs_state; + /* XXX next six are contiguous regs */ + OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_SCALE, rs->depth_scale_front); + OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_OFFSET, rs->depth_offset_front); + OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_SCALE, rs->depth_scale_back); + OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_OFFSET, rs->depth_offset_back); + OUT_CS_REG(R300_SU_POLY_OFFSET_ENABLE, rs->polygon_offset_enable); + OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode); + } + + if (r300->dirty_state & R300_NEW_SCISSOR) { + struct r300_scissor_state* scissor = r300->scissor_state; + /* XXX next two are contiguous regs */ + OUT_CS_REG(R300_SC_SCISSORS_TL, scissor->scissor_top_left); + OUT_CS_REG(R300_SC_SCISSORS_BR, scissor->scissor_bottom_right); + } + + r300->dirty_state = 0; +} diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index dacde27888..5074e3e6fa 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -35,7 +35,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) { struct r300_screen* r300screen = r300_screen(pscreen); switch (param) { - /* Cases marked "IN THEORY" are possible on the hardware, + /* XXX cases marked "IN THEORY" are possible on the hardware, * but haven't been implemented yet. */ case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: /* XXX I'm told this goes up to 16 */ @@ -48,6 +48,11 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) { return 0; case PIPE_CAP_TWO_SIDED_STENCIL: /* IN THEORY */ + /* if (r300screen->is_r500) { + * return 1; + * } else { + * return 0; + * } */ return 0; case PIPE_CAP_ANISOTROPIC_FILTER: /* IN THEORY */ -- cgit v1.2.3 From 2e09845277ce75fa7d29020c5b119ad749522592 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 19 Jan 2009 21:03:24 -0800 Subject: r300: Various flags, small state tracking things. Getting these out of the way so more stuff can be put in. --- src/gallium/drivers/r300/r300_context.c | 3 +++ src/gallium/drivers/r300/r300_context.h | 3 +++ src/gallium/drivers/r300/r300_emit.c | 5 +++++ src/gallium/drivers/r300/r300_screen.c | 1 - src/gallium/drivers/r300/r300_state.c | 4 ++++ 5 files changed, 15 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index b072179f5b..798d6bdc6f 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -56,5 +56,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300_init_state_functions(r300); + r300->dirty_state = R300_NEW_KITCHEN_SINK; + r300->dirty_hw++; + return &r300->context; } diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index ad1e4fc7c4..be6214b7ae 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -55,6 +55,7 @@ struct r300_dsa_state { }; struct r300_rs_state { + uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ uint32_t depth_scale_front; /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */ uint32_t depth_offset_front; /* R300_SU_POLY_OFFSET_FRONT_OFFSET: 0x42a8 */ uint32_t depth_scale_back; /* R300_SU_POLY_OFFSET_BACK_SCALE: 0x42ac */ @@ -98,6 +99,8 @@ struct r300_context { /* Bitmask of dirty state objects. */ uint32_t dirty_state; + /* Flag indicating whether or not the HW is dirty. */ + uint32_t dirty_hw; }; /* Convenience cast wrapper. */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 8662830ee2..3c59a270b3 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -31,6 +31,10 @@ static void r300_emit_dirty_state(struct r300_context* r300) struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; CS_LOCALS(r300); + if (!(r300->dirty_state) && !(r300->dirty_hw)) { + return; + } + /* XXX check size */ if (r300->dirty_state & R300_NEW_BLEND) { @@ -72,6 +76,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) if (r300->dirty_state & R300_NEW_RS) { struct r300_rs_state* rs = r300->rs_state; + OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status); /* XXX next six are contiguous regs */ OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_SCALE, rs->depth_scale_front); OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_OFFSET, rs->depth_offset_front); diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 5074e3e6fa..5c1bab386f 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -123,7 +123,6 @@ static void* r300_surface_map(struct pipe_screen* screen, struct pipe_surface* surface, unsigned flags) { - /* XXX this is not quite right */ char* map = pipe_buffer_map(screen, surface->buffer, flags); if (!map) { diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index cff4b30d16..d73f4483db 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -434,6 +434,10 @@ static void* r300_create_rs_state(struct pipe_context* pipe, pack_float_32(state->offset_scale); } + /* XXX this is part of HW TCL */ + /* XXX endian control */ + rs->vap_control_status = R300_VAP_TCL_BYPASS; + return (void*)rs; } -- cgit v1.2.3 From 538a8149af3fc773a3d1e15d113cb4e3fadc57cd Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 20 Jan 2009 00:31:43 -0800 Subject: r300: Add chipset sorting and capabilities. Part one: Capabilities from classic Mesa. Damn, if only we didn't have so many fucking Radeons! --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_chipset.c | 391 ++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_chipset.h | 100 ++++++++ src/gallium/drivers/r300/r300_emit.c | 4 +- src/gallium/drivers/r300/r300_screen.c | 23 +- src/gallium/drivers/r300/r300_screen.h | 7 +- 6 files changed, 505 insertions(+), 21 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_chipset.c create mode 100644 src/gallium/drivers/r300/r300_chipset.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 644e6d0ba3..ad792e9aa8 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -5,6 +5,7 @@ LIBNAME = r300 C_SOURCES = \ r300_blit.c \ + r300_chipset.c \ r300_clear.c \ r300_context.c \ r300_emit.c \ diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c new file mode 100644 index 0000000000..926a9dda50 --- /dev/null +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -0,0 +1,391 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_chipset.h" + +/* r300_chipset: A file all to itself for deducing the various properties of + * Radeons. */ + +/* Parse a PCI ID and fill an r300_capabilities struct with information. */ +void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) +{ + caps->pci_id = pci_id; + + /* Note: These are not ordered by PCI ID. I leave that task to GCC, + * which will perform the ordering while collating jump tables. Instead, + * I've tried to group them according to capabilities and age. */ + switch (pci_id) { + case 0x4144: + caps->family = CHIP_FAMILY_R300; + caps->num_pipes = 1; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x4145: + case 0x4146: + case 0x4147: + case 0x4E44: + case 0x4E45: + case 0x4E46: + case 0x4E47: + caps->family = CHIP_FAMILY_R300; + caps->num_pipes = 2; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x4150: + case 0x4151: + case 0x4152: + case 0x4153: + case 0x4154: + case 0x4155: + case 0x4156: + case 0x4E50: + case 0x4E51: + case 0x4E52: + case 0x4E53: + case 0x4E54: + case 0x4E56: + caps->family = CHIP_FAMILY_RV350; + caps->num_pipes = 1; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x4148: + case 0x4149: + case 0x414A: + case 0x414B: + case 0x4E48: + case 0x4E49: + case 0x4E4B: + caps->family = CHIP_FAMILY_R350; + caps->num_pipes = 2; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x4E4A: + caps->family = CHIP_FAMILY_R360; + caps->num_pipes = 2; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x5460: + case 0x5462: + case 0x5464: + case 0x5B60: + case 0x5B62: + case 0x5B63: + case 0x5B64: + case 0x5B65: + caps->family = CHIP_FAMILY_RV370; + caps->num_pipes = 1; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x3150: + case 0x3152: + case 0x3154: + case 0x3E50: + case 0x3E54: + caps->family = CHIP_FAMILY_RV380; + caps->num_pipes = 1; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x4A48: + case 0x4A49: + case 0x4A4A: + case 0x4A4B: + case 0x4A4C: + case 0x4A4D: + case 0x4A4E: + case 0x4A4F: + case 0x4A50: + case 0x4A54: + caps->family = CHIP_FAMILY_R420; + caps->num_pipes = 4; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x5548: + case 0x5549: + case 0x554A: + case 0x554B: + case 0x5550: + case 0x5551: + case 0x5552: + case 0x5554: + case 0x5D57: + caps->family = CHIP_FAMILY_R423; + caps->num_pipes = 4; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x554C: + case 0x554D: + case 0x554E: + case 0x554F: + case 0x5D48: + case 0x5D49: + case 0x5D4A: + caps->family = CHIP_FAMILY_R430; + caps->num_pipes = 4; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x5D4C: + case 0x5D4D: + case 0x5D4E: + case 0x5D4F: + case 0x5D50: + case 0x5D52: + caps->family = CHIP_FAMILY_R480; + caps->num_pipes = 4; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x4B49: + case 0x4B4A: + case 0x4B4B: + case 0x4B4C: + caps->family = CHIP_FAMILY_R481; + caps->num_pipes = 4; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x5E4C: + case 0x5E4F: + case 0x564A: + case 0x564B: + case 0x564F: + case 0x5652: + case 0x5653: + case 0x5657: + case 0x5E48: + case 0x5E4A: + case 0x5E4B: + case 0x5E4D: + caps->family = CHIP_FAMILY_RV410; + caps->num_pipes = 1; + caps->has_tcl = TRUE; + caps->has_us = FALSE; + break; + + case 0x5954: + case 0x5955: + caps->family = CHIP_FAMILY_RS480; + caps->num_pipes = 1; /* CHECK ME */ + caps->has_tcl = FALSE; + caps->has_us = FALSE; + break; + + case 0x5974: + case 0x5975: + caps->family = CHIP_FAMILY_RS482; + caps->num_pipes = 1; /* CHECK ME */ + caps->has_tcl = FALSE; + caps->has_us = FALSE; + break; + + case 0x5A41: + case 0x5A42: + caps->family = CHIP_FAMILY_RS400; + caps->num_pipes = 1; /* CHECK ME */ + caps->has_tcl = FALSE; + caps->has_us = FALSE; + break; + + case 0x5A61: + case 0x5A62: + caps->family = CHIP_FAMILY_RC410; + caps->num_pipes = 1; /* CHECK ME */ + caps->has_tcl = FALSE; + caps->has_us = FALSE; + break; + + case 0x791E: + case 0x791F: + caps->family = CHIP_FAMILY_RS690; + caps->num_pipes = 1; /* CHECK ME */ + caps->has_tcl = FALSE; + caps->has_us = FALSE; /* CHECK ME */ + break; + + case 0x796C: + case 0x796D: + case 0x796E: + case 0x796F: + caps->family = CHIP_FAMILY_RS740; + caps->num_pipes = 1; /* CHECK ME */ + caps->has_tcl = FALSE; + caps->has_us = FALSE; /* CHECK ME */ + break; + + case 0x7100: + case 0x7101: + case 0x7102: + case 0x7103: + case 0x7104: + case 0x7105: + case 0x7106: + case 0x7108: + case 0x7109: + case 0x710A: + case 0x710B: + case 0x710C: + case 0x710E: + case 0x710F: + caps->family = CHIP_FAMILY_R520; + caps->num_pipes = 4; + caps->has_tcl = TRUE; + caps->has_us = TRUE; + break; + + case 0x7140: + case 0x7141: + case 0x7142: + case 0x7143: + case 0x7144: + case 0x7145: + case 0x7146: + case 0x7147: + case 0x7149: + case 0x714A: + case 0x714B: + case 0x714C: + case 0x714D: + case 0x714E: + case 0x714F: + case 0x7151: + case 0x7152: + case 0x7153: + case 0x715E: + case 0x715F: + case 0x7180: + case 0x7181: + case 0x7183: + case 0x7186: + case 0x7187: + case 0x7188: + case 0x718A: + case 0x718B: + case 0x718C: + case 0x718D: + case 0x718F: + case 0x7193: + case 0x7196: + case 0x719B: + case 0x719F: + case 0x7200: + case 0x7210: + case 0x7211: + caps->family = CHIP_FAMILY_RV515; + caps->num_pipes = 1; + caps->has_tcl = TRUE; + caps->has_us = TRUE; + break; + + case 0x71C0: + case 0x71C1: + case 0x71C2: + case 0x71C3: + case 0x71C4: + case 0x71C5: + case 0x71C6: + case 0x71C7: + case 0x71CD: + case 0x71CE: + case 0x71D2: + case 0x71D4: + case 0x71D5: + case 0x71D6: + case 0x71DA: + case 0x71DE: + caps->family = CHIP_FAMILY_RV530; + caps->num_pipes = 1; + caps->has_tcl = TRUE; + caps->has_us = TRUE; + break; + + case 0x7240: + case 0x7243: + case 0x7244: + case 0x7245: + case 0x7246: + case 0x7247: + case 0x7248: + case 0x7249: + case 0x724A: + case 0x724B: + case 0x724C: + case 0x724D: + case 0x724E: + case 0x724F: + case 0x7284: + caps->family = CHIP_FAMILY_R580; + caps->num_pipes = 4; + caps->has_tcl = TRUE; + caps->has_us = TRUE; + break; + + case 0x7280: + caps->family = CHIP_FAMILY_RV570; + caps->num_pipes = 4; + caps->has_tcl = TRUE; + caps->has_us = TRUE; + break; + + case 0x7281: + case 0x7283: + case 0x7287: + case 0x7288: + case 0x7289: + case 0x728B: + case 0x728C: + case 0x7290: + case 0x7291: + case 0x7293: + case 0x7297: + caps->family = CHIP_FAMILY_RV560; + caps->num_pipes = 4; + caps->has_tcl = TRUE; + caps->has_us = TRUE; + break; + + default: + /* XXX not an r300?! */ + assert(0); + break; + } +} diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h new file mode 100644 index 0000000000..98963db17e --- /dev/null +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -0,0 +1,100 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_CHIPSET_H +#define R300_CHIPSET_H + +#include "pipe/p_compiler.h" + +/* Structure containing all the possible information about a specific Radeon + * in the R3xx, R4xx, and R5xx families. */ +struct r300_capabilities { + /* PCI ID */ + uint32_t pci_id; + /* Chipset family */ + int family; + /* The number of Graphics Backend (GB) pipes */ + int num_pipes; + /* Whether or not TCL is physically present */ + boolean has_tcl; + /* Whether or not Universal Shaders (US) are used for fragment shaders */ + boolean has_us; +}; + +/* Enumeration for legibility and also telling which card we're running on. */ +enum { + CHIP_FAMILY_R300 = 0, + CHIP_FAMILY_R350, + CHIP_FAMILY_R360, + CHIP_FAMILY_RV350, + CHIP_FAMILY_RV370, + CHIP_FAMILY_RV380, + CHIP_FAMILY_R420, + CHIP_FAMILY_R423, + CHIP_FAMILY_R430, + CHIP_FAMILY_R480, + CHIP_FAMILY_R481, + CHIP_FAMILY_RV410, + CHIP_FAMILY_RS400, + CHIP_FAMILY_RC410, + CHIP_FAMILY_RS480, + CHIP_FAMILY_RS482, + CHIP_FAMILY_RS690, + CHIP_FAMILY_RS740, + CHIP_FAMILY_RV515, + CHIP_FAMILY_R520, + CHIP_FAMILY_RV530, + CHIP_FAMILY_R580, + CHIP_FAMILY_RV560, + CHIP_FAMILY_RV570 +}; + +static const char* chip_families[] = { + "R300", + "R350", + "R360", + "RV350", + "RV370", + "RV380", + "R420", + "R423", + "R430", + "R480", + "R481", + "RV410", + "RS400", + "RC410", + "RS480", + "RS482", + "RS690", + "RS740", + "RV515", + "R520", + "RV530", + "R580", + "RV560", + "RV570" +}; + +void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps); + +#endif /* R300_CHIPSET_H */ \ No newline at end of file diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 3c59a270b3..42096a9235 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -48,7 +48,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) if (r300->dirty_state & R300_NEW_BLEND_COLOR) { struct r300_blend_color_state* blend_color = r300->blend_color_state; - if (r300screen->is_r500) { + if (FALSE /*XXX*/) { /* XXX next two are contiguous regs */ OUT_CS_REG(R500_RB3D_CONSTANT_COLOR_AR, blend_color->blend_color_red_alpha); @@ -69,7 +69,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) OUT_CS_REG(R300_ZB_ZSTENCILCNTL, dsa->z_stencil_control); OUT_CS_REG(R300_ZB_STENCILREFMASK, dsa->stencil_ref_mask); OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); - if (r300screen->is_r500) { + if (FALSE /*XXX*/) { OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); } } diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 5c1bab386f..c75ff9414b 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -71,12 +71,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) { return 0; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: /* 12 == 2048x2048 */ - if (r300screen->is_r500) { - /* R500 can do 4096x4096 */ - return 13; - } else { - return 12; - } + return 12; case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: /* XXX educated guess */ return 8; @@ -142,21 +137,17 @@ static void r300_destroy_screen(struct pipe_screen* pscreen) { FREE(pscreen); } -struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, uint pci_id) { +struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, uint32_t pci_id) +{ struct r300_screen* r300screen = CALLOC_STRUCT(r300_screen); + struct r300_capabilities* caps = CALLOC_STRUCT(r300_capabilities); - if (!r300screen) + if (!r300screen || !caps) return NULL; - /* XXX break this into its own function? - switch (pci_id) { - default: - debug_printf("%s: unknown PCI ID 0x%x, cannot create screen!\n", - __FUNCTION__, pci_id); - return NULL; - } */ + r300_parse_chipset(pci_id, caps); - r300screen->pci_id = pci_id; + r300screen->caps = caps; r300screen->screen.winsys = winsys; r300screen->screen.destroy = r300_destroy_screen; r300screen->screen.get_name = r300_get_name; diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index a1b97f218e..b6c3d1f462 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -27,13 +27,14 @@ #include "pipe/p_screen.h" #include "util/u_memory.h" +#include "r300_chipset.h" + struct r300_screen { /* Parent class */ struct pipe_screen screen; - boolean is_r400; - boolean is_r500; - int pci_id; + /* Chipset capabilities */ + struct r300_capabilities* caps; }; /* Convenience cast wrapper. */ -- cgit v1.2.3 From 43f20357c8db2c90ae1f8360dbc2c71762a0478e Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 20 Jan 2009 01:11:08 -0800 Subject: r300: Use chip caps for something. Step two: Integration. Yay? Time to stop messing around with this and actually go do things. --- src/gallium/drivers/r300/r300_chipset.c | 54 ++++++--------------------------- src/gallium/drivers/r300/r300_chipset.h | 9 ++++-- src/gallium/drivers/r300/r300_emit.c | 4 +-- src/gallium/drivers/r300/r300_screen.c | 5 +-- 4 files changed, 20 insertions(+), 52 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 926a9dda50..1dc9b8cf3c 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -28,7 +28,10 @@ /* Parse a PCI ID and fill an r300_capabilities struct with information. */ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) { + /* Reasonable defaults */ caps->pci_id = pci_id; + caps->has_tcl = TRUE; + caps->is_r500 = FALSE; /* Note: These are not ordered by PCI ID. I leave that task to GCC, * which will perform the ordering while collating jump tables. Instead, @@ -37,8 +40,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4144: caps->family = CHIP_FAMILY_R300; caps->num_pipes = 1; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x4145: @@ -50,8 +51,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4E47: caps->family = CHIP_FAMILY_R300; caps->num_pipes = 2; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x4150: @@ -69,8 +68,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4E56: caps->family = CHIP_FAMILY_RV350; caps->num_pipes = 1; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x4148: @@ -82,15 +79,11 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4E4B: caps->family = CHIP_FAMILY_R350; caps->num_pipes = 2; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x4E4A: caps->family = CHIP_FAMILY_R360; caps->num_pipes = 2; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x5460: @@ -103,8 +96,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5B65: caps->family = CHIP_FAMILY_RV370; caps->num_pipes = 1; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x3150: @@ -114,8 +105,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x3E54: caps->family = CHIP_FAMILY_RV380; caps->num_pipes = 1; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x4A48: @@ -130,8 +119,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4A54: caps->family = CHIP_FAMILY_R420; caps->num_pipes = 4; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x5548: @@ -145,8 +132,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5D57: caps->family = CHIP_FAMILY_R423; caps->num_pipes = 4; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x554C: @@ -158,8 +143,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5D4A: caps->family = CHIP_FAMILY_R430; caps->num_pipes = 4; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x5D4C: @@ -170,8 +153,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5D52: caps->family = CHIP_FAMILY_R480; caps->num_pipes = 4; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x4B49: @@ -180,8 +161,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4B4C: caps->family = CHIP_FAMILY_R481; caps->num_pipes = 4; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x5E4C: @@ -198,8 +177,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5E4D: caps->family = CHIP_FAMILY_RV410; caps->num_pipes = 1; - caps->has_tcl = TRUE; - caps->has_us = FALSE; break; case 0x5954: @@ -207,7 +184,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) caps->family = CHIP_FAMILY_RS480; caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; - caps->has_us = FALSE; break; case 0x5974: @@ -215,7 +191,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) caps->family = CHIP_FAMILY_RS482; caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; - caps->has_us = FALSE; break; case 0x5A41: @@ -223,7 +198,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) caps->family = CHIP_FAMILY_RS400; caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; - caps->has_us = FALSE; break; case 0x5A61: @@ -231,7 +205,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) caps->family = CHIP_FAMILY_RC410; caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; - caps->has_us = FALSE; break; case 0x791E: @@ -239,7 +212,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) caps->family = CHIP_FAMILY_RS690; caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; - caps->has_us = FALSE; /* CHECK ME */ break; case 0x796C: @@ -249,7 +221,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) caps->family = CHIP_FAMILY_RS740; caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; - caps->has_us = FALSE; /* CHECK ME */ break; case 0x7100: @@ -268,8 +239,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x710F: caps->family = CHIP_FAMILY_R520; caps->num_pipes = 4; - caps->has_tcl = TRUE; - caps->has_us = TRUE; + caps->is_r500 = TRUE; break; case 0x7140: @@ -312,8 +282,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x7211: caps->family = CHIP_FAMILY_RV515; caps->num_pipes = 1; - caps->has_tcl = TRUE; - caps->has_us = TRUE; + caps->is_r500 = TRUE; break; case 0x71C0: @@ -334,8 +303,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x71DE: caps->family = CHIP_FAMILY_RV530; caps->num_pipes = 1; - caps->has_tcl = TRUE; - caps->has_us = TRUE; + caps->is_r500 = TRUE; break; case 0x7240: @@ -355,15 +323,13 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x7284: caps->family = CHIP_FAMILY_R580; caps->num_pipes = 4; - caps->has_tcl = TRUE; - caps->has_us = TRUE; + caps->is_r500 = TRUE; break; case 0x7280: caps->family = CHIP_FAMILY_RV570; caps->num_pipes = 4; - caps->has_tcl = TRUE; - caps->has_us = TRUE; + caps->is_r500 = TRUE; break; case 0x7281: @@ -379,13 +345,11 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x7297: caps->family = CHIP_FAMILY_RV560; caps->num_pipes = 4; - caps->has_tcl = TRUE; - caps->has_us = TRUE; + caps->is_r500 = TRUE; break; default: /* XXX not an r300?! */ - assert(0); break; } } diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index 98963db17e..c2d7ad3414 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -36,11 +36,14 @@ struct r300_capabilities { int num_pipes; /* Whether or not TCL is physically present */ boolean has_tcl; - /* Whether or not Universal Shaders (US) are used for fragment shaders */ - boolean has_us; + /* Whether or not this is an RV515 or newer; R500s have many features: + * - Extra bit on texture sizes + * - Blend color is split across two registers + * - Universal Shader (US) block used for fragment shaders */ + boolean is_r500; }; -/* Enumeration for legibility and also telling which card we're running on. */ +/* Enumerations for legibility and telling which card we're running on. */ enum { CHIP_FAMILY_R300 = 0, CHIP_FAMILY_R350, diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 42096a9235..bf6fd3224e 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -48,7 +48,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) if (r300->dirty_state & R300_NEW_BLEND_COLOR) { struct r300_blend_color_state* blend_color = r300->blend_color_state; - if (FALSE /*XXX*/) { + if (r300screen->caps->is_r500) { /* XXX next two are contiguous regs */ OUT_CS_REG(R500_RB3D_CONSTANT_COLOR_AR, blend_color->blend_color_red_alpha); @@ -69,7 +69,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) OUT_CS_REG(R300_ZB_ZSTENCILCNTL, dsa->z_stencil_control); OUT_CS_REG(R300_ZB_STENCILREFMASK, dsa->stencil_ref_mask); OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); - if (FALSE /*XXX*/) { + if (r300screen->caps->is_r500) { OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); } } diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index c75ff9414b..7bba567e83 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -27,8 +27,9 @@ static const char* r300_get_vendor(struct pipe_screen* pscreen) { } static const char* r300_get_name(struct pipe_screen* pscreen) { - /* XXX lazy */ - return "unknown"; + struct r300_screen* r300screen = r300_screen(pscreen); + + return chip_families[r300screen->caps->family]; } static int r300_get_param(struct pipe_screen* pscreen, int param) { -- cgit v1.2.3 From 502ddfcd57ff7ed1f2dac9171f51c45893ea3d92 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 20 Jan 2009 01:49:34 -0800 Subject: r300: Add path for pci_id in winsys. Needs to be hooked up to the getparam from the kernel. --- src/gallium/drivers/r300/r300_context.c | 2 +- src/gallium/drivers/r300/r300_context.h | 1 + src/gallium/drivers/r300/r300_winsys.h | 3 +++ src/gallium/winsys/drm/amd/amd_context.c | 4 +++- src/gallium/winsys/drm/amd/amd_r300.c | 4 +++- src/gallium/winsys/drm/amd/amd_r300.h | 2 +- 6 files changed, 12 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 798d6bdc6f..467594ec9b 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -43,7 +43,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->winsys = r300_winsys; r300->context.winsys = winsys; - r300->context.screen = r300_create_screen(winsys, 0x0); + r300->context.screen = r300_create_screen(winsys, r300_winsys->pci_id); r300->context.destroy = r300_destroy_context; diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index be6214b7ae..f4d801480a 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -28,6 +28,7 @@ #include "util/u_memory.h" #include "r300_screen.h" +#include "r300_winsys.h" struct r300_blend_state { uint32_t blend_control; /* R300_RB3D_CBLEND: 0x4e04 */ diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index 7711dc792d..319152c853 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -38,6 +38,9 @@ struct radeon_cs; struct r300_winsys { + /* PCI ID */ + uint32_t pci_id; + /* CS object. This is very much like Intel's batchbuffer. * Fill it full of dwords and relocs and then submit. * Repeat as needed. */ diff --git a/src/gallium/winsys/drm/amd/amd_context.c b/src/gallium/winsys/drm/amd/amd_context.c index 7784964867..53311684de 100644 --- a/src/gallium/winsys/drm/amd/amd_context.c +++ b/src/gallium/winsys/drm/amd/amd_context.c @@ -244,9 +244,11 @@ GLboolean amd_context_create(const __GLcontextModes *visual, if (GL_TRUE) { fprintf(stderr, "Creating r300 context..."); + /* XXX today we pretend to be a very lame R300 vvvvvv */ pipe = r300_create_context(NULL, amd_context->pipe_winsys, - amd_create_r300_winsys(amd_context->drm_fd)); + amd_create_r300_winsys(amd_context->drm_fd, + 0x4144)); } else { pipe = amd_create_softpipe(amd_context); } diff --git a/src/gallium/winsys/drm/amd/amd_r300.c b/src/gallium/winsys/drm/amd/amd_r300.c index 0f543df9e1..a7a70fdd7f 100644 --- a/src/gallium/winsys/drm/amd/amd_r300.c +++ b/src/gallium/winsys/drm/amd/amd_r300.c @@ -43,12 +43,14 @@ static void amd_r300_flush_cs(struct radeon_cs* cs) radeon_cs_erase(cs); } -struct r300_winsys* amd_create_r300_winsys(int fd) +struct r300_winsys* amd_create_r300_winsys(int fd, uint32_t pci_id) { struct r300_winsys* winsys = calloc(1, sizeof(struct r300_winsys)); struct radeon_cs_manager* csm = radeon_cs_manager_gem_ctor(fd); + winsys->pci_id = pci_id; + winsys->cs = radeon_cs_create(csm, 1024 * 64 / 4); winsys->check_cs = amd_r300_check_cs; diff --git a/src/gallium/winsys/drm/amd/amd_r300.h b/src/gallium/winsys/drm/amd/amd_r300.h index ef269454b3..0d229fe0c4 100644 --- a/src/gallium/winsys/drm/amd/amd_r300.h +++ b/src/gallium/winsys/drm/amd/amd_r300.h @@ -26,4 +26,4 @@ #include "amd_buffer.h" -struct r300_winsys* amd_create_r300_winsys(int fd); +struct r300_winsys* amd_create_r300_winsys(int fd, uint32_t pci_id); -- cgit v1.2.3 From 2b9ecaa6dd7d4282f1f8796d151bdda0390ab51f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 20 Jan 2009 15:26:41 -0800 Subject: r300: Fix missing free(). --- src/gallium/drivers/r300/r300_screen.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 7bba567e83..04b5a7772b 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -135,7 +135,10 @@ static void r300_surface_unmap(struct pipe_screen* screen, } static void r300_destroy_screen(struct pipe_screen* pscreen) { - FREE(pscreen); + struct r300_screen* r300screen = r300_screen(pscreen); + + FREE(r300screen->caps); + FREE(r300screen); } struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, uint32_t pci_id) -- cgit v1.2.3 From 54d137e079b9420e8aca55f37307ece45e9b71d8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 20 Jan 2009 15:27:46 -0800 Subject: r300: Fix indenting. --- src/gallium/drivers/r300/r300_screen.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 04b5a7772b..3cb61b4c4e 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -22,17 +22,20 @@ #include "r300_screen.h" -static const char* r300_get_vendor(struct pipe_screen* pscreen) { +static const char* r300_get_vendor(struct pipe_screen* pscreen) +{ return "X.Org R300 Project"; } -static const char* r300_get_name(struct pipe_screen* pscreen) { +static const char* r300_get_name(struct pipe_screen* pscreen) +{ struct r300_screen* r300screen = r300_screen(pscreen); return chip_families[r300screen->caps->family]; } -static int r300_get_param(struct pipe_screen* pscreen, int param) { +static int r300_get_param(struct pipe_screen* pscreen, int param) +{ struct r300_screen* r300screen = r300_screen(pscreen); switch (param) { @@ -87,7 +90,8 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) { } } -static float r300_get_paramf(struct pipe_screen* pscreen, int param) { +static float r300_get_paramf(struct pipe_screen* pscreen, int param) +{ switch (param) { case PIPE_CAP_MAX_LINE_WIDTH: case PIPE_CAP_MAX_LINE_WIDTH_AA: @@ -134,7 +138,8 @@ static void r300_surface_unmap(struct pipe_screen* screen, pipe_buffer_unmap(screen, surface->buffer); } -static void r300_destroy_screen(struct pipe_screen* pscreen) { +static void r300_destroy_screen(struct pipe_screen* pscreen) +{ struct r300_screen* r300screen = r300_screen(pscreen); FREE(r300screen->caps); -- cgit v1.2.3 From 8d1f386dcbdabaa4edf0301267f881e3831ad18a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 20 Jan 2009 15:38:43 -0800 Subject: r300: Set floating-point params. Note: I took those numbers from classic Mesa. I know that points are routinely used to clear buffers, but line width is probably wrong. --- src/gallium/drivers/r300/r300_screen.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 3cb61b4c4e..a241d606c0 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -95,18 +95,21 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) switch (param) { case PIPE_CAP_MAX_LINE_WIDTH: case PIPE_CAP_MAX_LINE_WIDTH_AA: - /* XXX look this up, lazy ass! */ - return 0.0; + /* XXX this is the biggest thing that will fit in that register. + * Perhaps the actual rendering limits are less? */ + return 10922.0f; case PIPE_CAP_MAX_POINT_WIDTH: case PIPE_CAP_MAX_POINT_WIDTH_AA: - /* XXX see above */ - return 255.0; + /* XXX this is the biggest thing that will fit in that register. + * Perhaps the actual rendering limits are less? */ + return 10922.0f; case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: - return 16.0; + return 16.0f; case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: - return 16.0; + return 16.0f; default: - return 0.0; + /* XXX implementation error? */ + return 0.0f; } } -- cgit v1.2.3 From 6885560de54db26683eb813756e09fa3822c3492 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 20 Jan 2009 15:42:11 -0800 Subject: r300: Fix constness, compile warnings, indentation in r300_state. --- src/gallium/drivers/r300/r300_state.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index d73f4483db..3978ca12b3 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -274,8 +274,9 @@ static uint32_t translate_alpha_function(int alpha_func) { * This contains the depth buffer, stencil buffer, alpha test, and such. * On the Radeon, depth and stencil buffer setup are intertwined, which is * the reason for some of the strange-looking assignments across registers. */ -static void* r300_create_dsa_state(struct pipe_context* pipe, - struct pipe_depth_stencil_alpha_state* state) +static void* + r300_create_dsa_state(struct pipe_context* pipe, + const struct pipe_depth_stencil_alpha_state* state) { struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); @@ -341,7 +342,7 @@ static void* r300_create_dsa_state(struct pipe_context* pipe, /* Bind DSA state. */ static void r300_bind_dsa_state(struct pipe_context* pipe, - void* state) + void* state) { struct r300_context* r300 = r300_context(pipe); @@ -351,7 +352,7 @@ static void r300_bind_dsa_state(struct pipe_context* pipe, /* Free DSA state. */ static void r300_delete_dsa_state(struct pipe_context* pipe, - void* state) + void* state) { FREE(state); } @@ -396,7 +397,7 @@ struct pipe_rasterizer_state * In a not entirely unironic sidenote, this state has nearly nothing to do * with the actual block on the Radeon called the rasterizer (RS). */ static void* r300_create_rs_state(struct pipe_context* pipe, - struct pipe_rasterizer_state* state) + const struct pipe_rasterizer_state* state) { struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); @@ -457,7 +458,7 @@ static void r300_delete_rs_state(struct pipe_context* pipe, void* state) } static void r300_set_scissor_state(struct pipe_context* pipe, - struct pipe_scissor_state* state) + const struct pipe_scissor_state* state) { struct r300_context* r300 = r300_context(pipe); draw_flush(r300->draw); @@ -481,7 +482,7 @@ static void r300_set_scissor_state(struct pipe_context* pipe, } static void* r300_create_vs_state(struct pipe_context* pipe, - struct pipe_shader_state* state) + const struct pipe_shader_state* state) { struct r300_context* context = r300_context(pipe); /* XXX handing this off to Draw for now */ -- cgit v1.2.3 From 22877265f4fdf66c75df391d6de95bd5c1584ea3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 21 Jan 2009 02:21:09 -0800 Subject: [BROKEN] r300: Add initial clear/fill code. Copied from mesa and still broken. Gimme a few to clean it up. --- src/gallium/drivers/r300/r300_cs.h | 24 ++- src/gallium/drivers/r300/r300_surface.c | 357 ++++++++++++++++++++++++++++++-- src/gallium/drivers/r300/r300_surface.h | 2 +- 3 files changed, 364 insertions(+), 19 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 3dacf25380..59ca985f40 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -26,6 +26,18 @@ #include "r300_reg.h" #include "r300_winsys.h" +/* Pack a 32-bit float into a dword. */ +static uint32_t pack_float_32(float f) +{ + union { + float f; + uint32_t u; + } u; + + u.f = f; + return u.u; +} + /* Yes, I know macros are ugly. However, they are much prettier than the code * that they neatly hide away, and don't have the cost of function setup,so * we're going to use them. */ @@ -47,7 +59,6 @@ struct r300_winsys* cs_winsys = context->winsys; \ struct radeon_cs* cs = cs_winsys->cs - #define CHECK_CS(size) \ cs_winsys->check_cs(cs, (size)) @@ -59,10 +70,19 @@ #define OUT_CS(value) \ cs_winsys->write_cs_dword(cs, value) +#define OUT_CS_32F(value) \ + cs_winsys->write_cs_dword(cs, pack_float_32(value)) + #define OUT_CS_REG(register, value) do { \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); } while (0) +/* Note: This expects count to be the number of registers, + * not the actual packet0 count! */ +#define OUT_CS_REG_SEQ(register, count) do { \ + OUT_CS(CP_PACKET0(register, ((count) - 1))); \ +} while (0) + #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ @@ -74,4 +94,4 @@ #define FLUSH_CS \ cs_winsys->flush_cs(cs) -#endif /* R300_CS_H */ \ No newline at end of file +#endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 4aa469b97e..60efe78c0b 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -22,29 +22,354 @@ #include "r300_surface.h" -/* Provides pipe_context's "surface_fill". */ -static void r300_surface_fill(struct pipe_context* context, +/* Provides pipe_context's "surface_fill". Commonly used for clearing + * buffers. */ +static void r300_surface_fill(struct pipe_context* pipe, struct pipe_surface* dest, unsigned x, unsigned y, unsigned w, unsigned h, unsigned color) { - /* Try accelerated fill first. */ - if (!r300_fill_blit(r300_context(context), - dest->block.size, - (short)dest->stride, - dest->buffer, - dest->offset, - (short)x, (short)y, - (short)w, (short)h, - color)) + struct r300_context* context = r300_context(pipe); + CS_LOCALS(context); + boolean has_tcl = FALSE; + boolean is_r500 = FALSE; + /* Emit a shitload of state, and then draw a point to clear the buffer. + * XXX it goes without saying that this needs to be cleaned up and + * shifted around to work with the rest of the driver's state handling. + */ + /* Sequence starting at R300_VAP_PROG_STREAM_CNTL_0 */ + OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 1); + if (has_tcl) { + OUT_CS(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_0_SHIFT) | ((R300_LAST_VEC | (1 << + R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_1_SHIFT))); + } else { + OUT_CS(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_0_SHIFT) | ((R300_LAST_VEC | (2 << + R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << + R300_DATA_TYPE_1_SHIFT))); + } + + /* Disable fog */ + OUT_CS_REG(R300_FG_FOG_BLEND, 0); + OUT_CS_REG(R300_FG_ALPHA_FUNC, 0); + + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, + ((((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | + (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | + (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | + (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | + ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | + R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << + R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE0_SHIFT) | + (((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | + (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | + (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | + (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | + ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | + R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << + R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE1_SHIFT))); + /* R300_VAP_INPUT_CNTL_0, R300_VAP_INPUT_CNTL_1 */ + OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2); + OUT_CS((R300_SEL_USER_COLOR_0 << R300_COLOR_0_ASSEMBLY_SHIFT)); + OUT_CS(R300_INPUT_CNTL_POS | R300_INPUT_CNTL_COLOR | R300_INPUT_CNTL_TC0); + + /* comes from fglrx startup of clear */ + OUT_CS_REG_SEQ(R300_SE_VTE_CNTL, 2); + OUT_CS(R300_VTX_W0_FMT | R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | + R300_VPORT_Z_OFFSET_ENA); + OUT_CS(0x8); + + OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xaaaaaaaa); + + OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); + OUT_CS(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | + R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT); + OUT_CS(0); /* no textures */ + + OUT_CS_REG(R300_TX_ENABLE, 0); + + OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); + OUT_CS_32F(1.0); + OUT_CS_32F(x); + OUT_CS_32F(1.0); + OUT_CS_32F(y); + OUT_CS_32F(1.0); + OUT_CS_32F(0.0); + + OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); + OUT_CS(0x0); + OUT_CS(0x0); + + OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_PS_UCP_MODE_CLIP_AS_TRIFAN | R300_CLIP_DISABLE); + + OUT_CS_REG(R300_GA_POINT_SIZE, ((w * 6) << R300_POINTSIZE_X_SHIFT) | + ((h * 6) << R300_POINTSIZE_Y_SHIFT)); + + if (is_r500) { + OUT_CS_REG_SEQ(R500_RS_IP_0, 8); + for (i = 0; i < 8; ++i) { + OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | + (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); + } + + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + /* XXX could hires be disabled for a speed boost? */ + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x0); + + OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); + } else { + OUT_CS_REG(R300_RS_IP_0, 8); + for (i = 0; i < 8; ++i) { + OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); + } + + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + /* XXX could hires be disabled for a speed boost? */ + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x0); + + OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); + } + + if (is_r500) { + OUT_CS_REG_SEQ(R500_US_CONFIG, 2); + OUT_CS(R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); + OUT_CS(0x0); + OUT_CS_REG_SEQ(R500_US_CODE_ADDR, 3); + OUT_CS(R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(1)); + OUT_CS(R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(1)); + OUT_CS(R500_US_CODE_OFFSET_ADDR(0)); + + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, 0x0); + + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | + R500_INST_LAST | + R500_INST_RGB_OMASK_R | + R500_INST_RGB_OMASK_G | + R500_INST_RGB_OMASK_B | + R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | + R500_INST_ALPHA_CLAMP); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_RGB_ADDR0(0) | + R500_RGB_ADDR1(0) | + R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | + R500_RGB_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_ADDR0(0) | + R500_ALPHA_ADDR1(0) | + R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | + R500_ALPHA_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGB_SEL_A_SRC0 | + R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | + R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | + R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | + R500_ALU_RGB_G_SWIZ_B_B); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_OP_CMP | + R500_ALPHA_SWIZ_A_A | + R500_ALPHA_SWIZ_B_A); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGBA_OP_CMP | + R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | + R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0); + + } else { + OUT_CS_REG_SEQ(R300_US_CONFIG, 3); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS_REG_SEQ(R300_US_CODE_ADDR_0, 4); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(R300_RGBA_OUT); + + OUT_CS_REG(R300_US_ALU_RGB_INST_0, + FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO))); + OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, + FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0)); + OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, + FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO))); + OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, + FP_SELA(0, NO, W, FP_TMP(0), 0, 0)); + } + + /* XXX */ + uint32_t vap_cntl; + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); + if (has_tcl) { + vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) | + (5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (12 << R300_VF_MAX_VTX_NUM_SHIFT)); + if (CHIP_FAMILY_RV515) + vap_cntl |= R500_TCL_STATE_OPTIMIZATION; + } else { + vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) | + (5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (5 << R300_VF_MAX_VTX_NUM_SHIFT)); + } + + if (CHIP_FAMILY_RV515) + vap_cntl |= (2 << R300_PVS_NUM_FPUS_SHIFT); + else if ((CHIP_FAMILY_RV530) || + (CHIP_FAMILY_RV560) || + (CHIP_FAMILY_RV570)) + vap_cntl |= (5 << R300_PVS_NUM_FPUS_SHIFT); + else if ((CHIP_FAMILY_RV410) || + (CHIP_FAMILY_R420)) + vap_cntl |= (6 << R300_PVS_NUM_FPUS_SHIFT); + else if ((CHIP_FAMILY_R520) || + (CHIP_FAMILY_R580)) + vap_cntl |= (8 << R300_PVS_NUM_FPUS_SHIFT); + else + vap_cntl |= (4 << R300_PVS_NUM_FPUS_SHIFT); + + OUT_CS_REG(R300_VAP_CNTL, vap_cntl); + + if (has_tcl) { + OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3); + OUT_CS((0 << R300_PVS_FIRST_INST_SHIFT) | + (0 << R300_PVS_XYZW_VALID_INST_SHIFT) | + (1 << R300_PVS_LAST_INST_SHIFT)); + OUT_CS((0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) | + (0 << R300_PVS_MAX_CONST_ADDR_SHIFT)); + OUT_CS(1 << R300_PVS_LAST_VTX_SRC_INST_SHIFT); + + OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 28)); + OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_ADDRESS, 0x0); + + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, + 0, 0xf, PVS_DST_REG_OUT)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(0, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, + PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, + PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(0, PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 1, 0xf, + PVS_DST_REG_OUT)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(1, PVS_SRC_SELECT_X, + PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, + PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, + VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(1, PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_SELECT_FORCE_0, + PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + } + /* Do the actual emit. */ + if (rrb) { + cbpitch = (rrb->pitch / rrb->cpp); + if (rrb->cpp == 4) + cbpitch |= R300_COLOR_FORMAT_ARGB8888; + else + cbpitch |= R300_COLOR_FORMAT_RGB565; + + if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ + cbpitch |= R300_COLOR_TILE_ENABLE; + } + } + + /* TODO in bufmgr */ + cp_wait(r300, R300_WAIT_3D | R300_WAIT_3D_CLEAN); + end_3d(rmesa); + + if (flags & CLEARBUFFER_COLOR) { + assert(rrb != 0); + BEGIN_BATCH_NO_AUTOSTATE(4); + OUT_BATCH_REGSEQ(R300_RB3D_COLOROFFSET0, 1); + OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_BATCH_REGVAL(R300_RB3D_COLORPITCH0, cbpitch); + END_BATCH(); + } +#if 0 + if (flags & (CLEARBUFFER_DEPTH | CLEARBUFFER_STENCIL)) { + assert(rrbd != 0); + cbpitch = (rrbd->pitch / rrbd->cpp); + if (rrbd->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ + cbpitch |= R300_DEPTHMACROTILE_ENABLE; + } + if (rrbd->bo->flags & RADEON_BO_FLAGS_MICRO_TILE){ + cbpitch |= R300_DEPTHMICROTILE_TILED; + } + BEGIN_BATCH_NO_AUTOSTATE(4); + OUT_BATCH_REGSEQ(R300_ZB_DEPTHOFFSET, 1); + OUT_BATCH_RELOC(0, rrbd->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_BATCH_REGVAL(R300_ZB_DEPTHPITCH, cbpitch); + END_BATCH(); + } + { - /* Fallback. */ - void* dest_map = context->screen->surface_map(context->screen, dest, - PIPE_BUFFER_USAGE_CPU_WRITE); - pipe_fill_rect(dest_map, &dest->block, dest->stride, x, y, w, h, color); - context->screen->surface_unmap(context->screen, dest); + uint32_t t1, t2; + + t1 = 0x0; + t2 = 0x0; + + if (flags & CLEARBUFFER_DEPTH) { + t1 |= R300_Z_ENABLE | R300_Z_WRITE_ENABLE; + t2 |= + (R300_ZS_ALWAYS << R300_Z_FUNC_SHIFT); + } + + if (flags & CLEARBUFFER_STENCIL) { + t1 |= R300_STENCIL_ENABLE; + t2 |= + (R300_ZS_ALWAYS << + R300_S_FRONT_FUNC_SHIFT) | + (R300_ZS_REPLACE << + R300_S_FRONT_SFAIL_OP_SHIFT) | + (R300_ZS_REPLACE << + R300_S_FRONT_ZPASS_OP_SHIFT) | + (R300_ZS_REPLACE << + R300_S_FRONT_ZFAIL_OP_SHIFT); + } + + OUT_BATCH_REGSEQ(R300_ZB_CNTL, 3); + OUT_BATCH(t1); + OUT_BATCH(t2); + OUT_BATCH(((ctx->Stencil.WriteMask[0] & R300_STENCILREF_MASK) << + R300_STENCILWRITEMASK_SHIFT) | + (ctx->Stencil.Clear & R300_STENCILREF_MASK)); + END_BATCH(); } +#endif + + OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); + OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | + (1 << R300_PRIM_NUM_VERTICES_SHIFT)); + OUT_CS_32F(w / 2.0); + OUT_CS_32F(h / 2.0); + /* XXX this should be the depth value to clear to */ + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + OUT_CS_32F(color); + OUT_CS_32F(color); + OUT_CS_32F(color); + OUT_CS_32F(color); + + /* XXX cp_wait(rmesa, R300_WAIT_3D | R300_WAIT_3D_CLEAN); */ } void r300_init_surface_functions(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 0b2fd0b32b..e807edd0e3 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -28,7 +28,7 @@ #include "util/u_rect.h" -#include "r300_blit.h" #include "r300_context.h" +#include "r300_cs.h" #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 7d63ff93cbf0f342c3736f4c8fae75157a62f0ea Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 21 Jan 2009 23:12:40 -0800 Subject: r300: Unbreak build, finish clear state. Completely untested, of course. --- src/gallium/drivers/r300/r300_reg.h | 12 +++++++++ src/gallium/drivers/r300/r300_surface.c | 43 +++++++++++++-------------------- src/gallium/drivers/r300/r300_surface.h | 3 +++ 3 files changed, 32 insertions(+), 26 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 8b3fe431ab..7f4a508b1b 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -3252,6 +3252,18 @@ enum { */ #define R300_CP_CMD_BITBLT_MULTI 0xC0009B00 +/* XXX Corbin's stuff from radeon and r200 */ + +#define RADEON_WAIT_UNTIL 0x1720 +# define RADEON_WAIT_CRTC_PFLIP (1 << 0) +# define RADEON_WAIT_2D_IDLECLEAN (1 << 16) +# define RADEON_WAIT_3D_IDLECLEAN (1 << 17) +# define RADEON_WAIT_HOST_IDLECLEAN (1 << 18) + +#define RADEON_CP_PACKET3 0xC0000000 + +#define R200_3D_DRAW_IMMD_2 0xC0003500 + #endif /* _R300_REG_H */ /* *INDENT-ON* */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 60efe78c0b..8a507d56e6 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -34,6 +34,8 @@ static void r300_surface_fill(struct pipe_context* pipe, CS_LOCALS(context); boolean has_tcl = FALSE; boolean is_r500 = FALSE; + /* For the for loops. */ + int i; /* Emit a shitload of state, and then draw a point to clear the buffer. * XXX it goes without saying that this needs to be cleaned up and * shifted around to work with the rest of the driver's state handling. @@ -239,6 +241,7 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_VAP_CNTL, vap_cntl); + /* XXX unbreak this if (has_tcl) { OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3); OUT_CS((0 << R300_PVS_FIRST_INST_SHIFT) | @@ -252,7 +255,7 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 28)); OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_ADDRESS, 0x0); + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_CODE_START); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 0, 0xf, PVS_DST_REG_OUT)); @@ -278,32 +281,17 @@ static void r300_surface_fill(struct pipe_context* pipe, PVS_SRC_SELECT_FORCE_0, PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); - } - /* Do the actual emit. */ - if (rrb) { - cbpitch = (rrb->pitch / rrb->cpp); - if (rrb->cpp == 4) - cbpitch |= R300_COLOR_FORMAT_ARGB8888; - else - cbpitch |= R300_COLOR_FORMAT_RGB565; - - if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ - cbpitch |= R300_COLOR_TILE_ENABLE; - } - } + } */ /* TODO in bufmgr */ - cp_wait(r300, R300_WAIT_3D | R300_WAIT_3D_CLEAN); - end_3d(rmesa); - - if (flags & CLEARBUFFER_COLOR) { - assert(rrb != 0); - BEGIN_BATCH_NO_AUTOSTATE(4); - OUT_BATCH_REGSEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_BATCH_REGVAL(R300_RB3D_COLORPITCH0, cbpitch); - END_BATCH(); - } + /* XXX this should be split off, also figure out WTF with the numbers */ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + /* XXX might have to switch to 2D */ + + OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); + OUT_CS_RELOC(0, dest->buffer, 0, RADEON_GEM_DOMAIN_VRAM, 0); + /* XXX this needs more TLC (or TCL, as it were) */ + OUT_CS_REG(R300_RB3D_COLORPITCH0, R300_COLOR_FORMAT_ARGB8888); #if 0 if (flags & (CLEARBUFFER_DEPTH | CLEARBUFFER_STENCIL)) { assert(rrbd != 0); @@ -369,7 +357,10 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(color); OUT_CS_32F(color); - /* XXX cp_wait(rmesa, R300_WAIT_3D | R300_WAIT_3D_CLEAN); */ + /* XXX this should be split off, also figure out WTF with the numbers */ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + + FLUSH_CS; } void r300_init_surface_functions(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index e807edd0e3..2d64a95412 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -31,4 +31,7 @@ #include "r300_context.h" #include "r300_cs.h" +/* XXX integrate this into r300_reg */ +#include "r300_fragprog.h" + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 0ff7cb7c89f0c9ac4e363296e53eada008717252 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 21 Jan 2009 23:48:47 -0800 Subject: r300: Add num_vert_pipes (and remove busted num_pipes.) --- src/gallium/drivers/r300/r300_chipset.c | 39 ++++++++++++--------------------- src/gallium/drivers/r300/r300_chipset.h | 8 ++++--- src/gallium/drivers/r300/r300_cs.h | 3 +++ src/gallium/drivers/r300/r300_surface.c | 27 ++++++++--------------- 4 files changed, 31 insertions(+), 46 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 1dc9b8cf3c..b7de2359cb 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -32,6 +32,8 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) caps->pci_id = pci_id; caps->has_tcl = TRUE; caps->is_r500 = FALSE; + caps->num_vert_pipes = 4; + /* Note: These are not ordered by PCI ID. I leave that task to GCC, * which will perform the ordering while collating jump tables. Instead, @@ -39,7 +41,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) switch (pci_id) { case 0x4144: caps->family = CHIP_FAMILY_R300; - caps->num_pipes = 1; break; case 0x4145: @@ -50,7 +51,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4E46: case 0x4E47: caps->family = CHIP_FAMILY_R300; - caps->num_pipes = 2; break; case 0x4150: @@ -67,7 +67,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4E54: case 0x4E56: caps->family = CHIP_FAMILY_RV350; - caps->num_pipes = 1; break; case 0x4148: @@ -78,12 +77,10 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4E49: case 0x4E4B: caps->family = CHIP_FAMILY_R350; - caps->num_pipes = 2; break; case 0x4E4A: caps->family = CHIP_FAMILY_R360; - caps->num_pipes = 2; break; case 0x5460: @@ -95,7 +92,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5B64: case 0x5B65: caps->family = CHIP_FAMILY_RV370; - caps->num_pipes = 1; break; case 0x3150: @@ -104,7 +100,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x3E50: case 0x3E54: caps->family = CHIP_FAMILY_RV380; - caps->num_pipes = 1; break; case 0x4A48: @@ -118,7 +113,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4A50: case 0x4A54: caps->family = CHIP_FAMILY_R420; - caps->num_pipes = 4; + caps->num_vert_pipes = 6; break; case 0x5548: @@ -131,7 +126,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5554: case 0x5D57: caps->family = CHIP_FAMILY_R423; - caps->num_pipes = 4; + caps->num_vert_pipes = 6; break; case 0x554C: @@ -142,7 +137,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5D49: case 0x5D4A: caps->family = CHIP_FAMILY_R430; - caps->num_pipes = 4; + caps->num_vert_pipes = 6; break; case 0x5D4C: @@ -152,7 +147,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5D50: case 0x5D52: caps->family = CHIP_FAMILY_R480; - caps->num_pipes = 4; + caps->num_vert_pipes = 6; break; case 0x4B49: @@ -160,7 +155,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x4B4B: case 0x4B4C: caps->family = CHIP_FAMILY_R481; - caps->num_pipes = 4; + caps->num_vert_pipes = 6; break; case 0x5E4C: @@ -176,41 +171,36 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x5E4B: case 0x5E4D: caps->family = CHIP_FAMILY_RV410; - caps->num_pipes = 1; + caps->num_vert_pipes = 6; break; case 0x5954: case 0x5955: caps->family = CHIP_FAMILY_RS480; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; case 0x5974: case 0x5975: caps->family = CHIP_FAMILY_RS482; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; case 0x5A41: case 0x5A42: caps->family = CHIP_FAMILY_RS400; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; case 0x5A61: case 0x5A62: caps->family = CHIP_FAMILY_RC410; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; case 0x791E: case 0x791F: caps->family = CHIP_FAMILY_RS690; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; @@ -219,7 +209,6 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x796E: case 0x796F: caps->family = CHIP_FAMILY_RS740; - caps->num_pipes = 1; /* CHECK ME */ caps->has_tcl = FALSE; break; @@ -238,7 +227,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x710E: case 0x710F: caps->family = CHIP_FAMILY_R520; - caps->num_pipes = 4; + caps->num_vert_pipes = 8; caps->is_r500 = TRUE; break; @@ -281,7 +270,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x7210: case 0x7211: caps->family = CHIP_FAMILY_RV515; - caps->num_pipes = 1; + caps->num_vert_pipes = 2; caps->is_r500 = TRUE; break; @@ -302,7 +291,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x71DA: case 0x71DE: caps->family = CHIP_FAMILY_RV530; - caps->num_pipes = 1; + caps->num_vert_pipes = 5; caps->is_r500 = TRUE; break; @@ -322,13 +311,13 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x724F: case 0x7284: caps->family = CHIP_FAMILY_R580; - caps->num_pipes = 4; + caps->num_vert_pipes = 8; caps->is_r500 = TRUE; break; case 0x7280: caps->family = CHIP_FAMILY_RV570; - caps->num_pipes = 4; + caps->num_vert_pipes = 5; caps->is_r500 = TRUE; break; @@ -344,7 +333,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) case 0x7293: case 0x7297: caps->family = CHIP_FAMILY_RV560; - caps->num_pipes = 4; + caps->num_vert_pipes = 5; caps->is_r500 = TRUE; break; diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index c2d7ad3414..548d7a6c50 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -32,8 +32,10 @@ struct r300_capabilities { uint32_t pci_id; /* Chipset family */ int family; - /* The number of Graphics Backend (GB) pipes */ - int num_pipes; + /* The number of vertex pipes */ + int num_vert_pipes; + /* The number of fragment pipes */ + int num_frag_pipes; /* Whether or not TCL is physically present */ boolean has_tcl; /* Whether or not this is an RV515 or newer; R500s have many features: @@ -100,4 +102,4 @@ static const char* chip_families[] = { void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps); -#endif /* R300_CHIPSET_H */ \ No newline at end of file +#endif /* R300_CHIPSET_H */ diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 59ca985f40..67cb5ee7d1 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -55,6 +55,9 @@ static uint32_t pack_float_32(float f) #define CP_PACKET0(register, count) \ (RADEON_CP_PACKET0 | ((count) << 16) | ((register) >> 2)) +#define CP_PACKET3(op, count) \ + (RADEON_CP_PACKET3 | (op) | ((count) << 16)) + #define CS_LOCALS(context) \ struct r300_winsys* cs_winsys = context->winsys; \ struct radeon_cs* cs = cs_winsys->cs diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 8a507d56e6..dd1c8862a7 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -30,10 +30,11 @@ static void r300_surface_fill(struct pipe_context* pipe, unsigned w, unsigned h, unsigned color) { - struct r300_context* context = r300_context(pipe); - CS_LOCALS(context); - boolean has_tcl = FALSE; - boolean is_r500 = FALSE; + struct r300_context* r300 = r300_context(pipe); + CS_LOCALS(r300); + struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; + boolean has_tcl = caps->has_tcl; + boolean is_r500 = caps->is_r500; /* For the for loops. */ int i; /* Emit a shitload of state, and then draw a point to clear the buffer. @@ -224,20 +225,8 @@ static void r300_surface_fill(struct pipe_context* pipe, (5 << R300_VF_MAX_VTX_NUM_SHIFT)); } - if (CHIP_FAMILY_RV515) - vap_cntl |= (2 << R300_PVS_NUM_FPUS_SHIFT); - else if ((CHIP_FAMILY_RV530) || - (CHIP_FAMILY_RV560) || - (CHIP_FAMILY_RV570)) - vap_cntl |= (5 << R300_PVS_NUM_FPUS_SHIFT); - else if ((CHIP_FAMILY_RV410) || - (CHIP_FAMILY_R420)) - vap_cntl |= (6 << R300_PVS_NUM_FPUS_SHIFT); - else if ((CHIP_FAMILY_R520) || - (CHIP_FAMILY_R580)) - vap_cntl |= (8 << R300_PVS_NUM_FPUS_SHIFT); - else - vap_cntl |= (4 << R300_PVS_NUM_FPUS_SHIFT); + vap_cntl |= (caps->num_vert_pipes << + R300_PVS_NUM_FPUS_SHIFT); OUT_CS_REG(R300_VAP_CNTL, vap_cntl); @@ -361,6 +350,8 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); FLUSH_CS; + + r300->dirty_state = R300_NEW_KITCHEN_SINK; } void r300_init_surface_functions(struct r300_context* r300) -- cgit v1.2.3 From 90a96cb2addf48b3b48c039a8dc6de9e53bfb6df Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 22 Jan 2009 03:45:14 -0800 Subject: r300: Add sampler state skeleton. Heh, serendipitous sibilance. Anyway, need to flesh this out. --- src/gallium/drivers/r300/r300_context.h | 20 +++++++++----- src/gallium/drivers/r300/r300_state.c | 47 ++++++++++++++++++++++++++++++--- 2 files changed, 56 insertions(+), 11 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index f4d801480a..3877c9855d 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -65,17 +65,21 @@ struct r300_rs_state { uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */ }; +struct r300_sampler_state { +}; + struct r300_scissor_state { uint32_t scissor_top_left; /* R300_SC_SCISSORS_TL: 0x43e0 */ uint32_t scissor_bottom_right; /* R300_SC_SCISSORS_BR: 0x43e4 */ }; -#define R300_NEW_BLEND 0x01 -#define R300_NEW_BLEND_COLOR 0x02 -#define R300_NEW_DSA 0x04 -#define R300_NEW_RS 0x08 -#define R300_NEW_SCISSOR 0x10 -#define R300_NEW_KITCHEN_SINK 0x1f +#define R300_NEW_BLEND 0x0001 +#define R300_NEW_BLEND_COLOR 0x0002 +#define R300_NEW_DSA 0x0004 +#define R300_NEW_RS 0x0008 +#define R300_NEW_SAMPLER 0x0010 +#define R300_NEW_SCISSOR 0x1000 +#define R300_NEW_KITCHEN_SINK 0x1fff struct r300_context { /* Parent class */ @@ -95,9 +99,11 @@ struct r300_context { struct r300_dsa_state* dsa_state; /* Rasterizer state. */ struct r300_rs_state* rs_state; + /* Sampler states. */ + struct r300_sampler_state* sampler_states[8]; + int sampler_count; /* Scissor state. */ struct r300_scissor_state* scissor_state; - /* Bitmask of dirty state objects. */ uint32_t dirty_state; /* Flag indicating whether or not the HW is dirty. */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 3978ca12b3..7fb0fc2eba 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -457,6 +457,41 @@ static void r300_delete_rs_state(struct pipe_context* pipe, void* state) FREE(state); } +static void* + r300_create_sampler_state(struct pipe_context* pipe, + const struct pipe_sampler_state* state) +{ + struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); + + return (void*)sampler; +} + +static void r300_bind_sampler_states(struct pipe_context* pipe, + unsigned count, + void** states) +{ + struct r300_context* r300 = r300_context(pipe); + int i = 0; + + if (count > 8) { + return; + } + + for (i; i < count; i++) { + if (r300->sampler_states[i] != states[i]) { + r300->sampler_states[i] = states[i]; + r300->dirty_state |= (R300_NEW_SAMPLER << i); + } + } + + r300->sampler_count = count; +} + +static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) +{ + FREE(state); +} + static void r300_set_scissor_state(struct pipe_context* pipe, const struct pipe_scissor_state* state) { @@ -510,17 +545,21 @@ void r300_init_state_functions(struct r300_context* r300) { r300->context.set_blend_color = r300_set_blend_color; + r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; + r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; + r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; + r300->context.create_rasterizer_state = r300_create_rs_state; r300->context.bind_rasterizer_state = r300_bind_rs_state; r300->context.delete_rasterizer_state = r300_delete_rs_state; - r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; - r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; - r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; + r300->context.create_sampler_state = r300_create_sampler_state; + r300->context.bind_sampler_states = r300_bind_sampler_states; + r300->context.delete_sampler_state = r300_delete_sampler_state; r300->context.set_scissor_state = r300_set_scissor_state; r300->context.create_vs_state = r300_create_vs_state; r300->context.bind_vs_state = r300_bind_vs_state; r300->context.delete_vs_state = r300_delete_vs_state; -} \ No newline at end of file +} -- cgit v1.2.3 From ecb7f29f74c8f7456302267fe31b1de4bcc103c5 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 22 Jan 2009 13:34:21 -0800 Subject: amd/r300: Wire up GETPARAM ioctls. Whoo, stuff is starting to look cleaner and cleaner. --- src/gallium/drivers/r300/r300_chipset.c | 5 ++--- src/gallium/drivers/r300/r300_chipset.h | 2 +- src/gallium/drivers/r300/r300_context.c | 2 +- src/gallium/drivers/r300/r300_screen.c | 8 +++++-- src/gallium/drivers/r300/r300_screen.h | 4 +++- src/gallium/drivers/r300/r300_winsys.h | 5 ++++- src/gallium/winsys/drm/amd/amd_context.c | 9 ++++---- src/gallium/winsys/drm/amd/amd_r300.c | 38 +++++++++++++++++++++++++++++--- src/gallium/winsys/drm/amd/amd_r300.h | 7 +++++- 9 files changed, 62 insertions(+), 18 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index b7de2359cb..f2dc8aedaa 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -26,10 +26,9 @@ * Radeons. */ /* Parse a PCI ID and fill an r300_capabilities struct with information. */ -void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) +void r300_parse_chipset(struct r300_capabilities* caps) { /* Reasonable defaults */ - caps->pci_id = pci_id; caps->has_tcl = TRUE; caps->is_r500 = FALSE; caps->num_vert_pipes = 4; @@ -38,7 +37,7 @@ void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps) /* Note: These are not ordered by PCI ID. I leave that task to GCC, * which will perform the ordering while collating jump tables. Instead, * I've tried to group them according to capabilities and age. */ - switch (pci_id) { + switch (caps->pci_id) { case 0x4144: caps->family = CHIP_FAMILY_R300; break; diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index 548d7a6c50..f1502ff76c 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -100,6 +100,6 @@ static const char* chip_families[] = { "RV570" }; -void r300_parse_chipset(uint32_t pci_id, struct r300_capabilities* caps); +void r300_parse_chipset(struct r300_capabilities* caps); #endif /* R300_CHIPSET_H */ diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 467594ec9b..f254b2f2a3 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -43,7 +43,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->winsys = r300_winsys; r300->context.winsys = winsys; - r300->context.screen = r300_create_screen(winsys, r300_winsys->pci_id); + r300->context.screen = r300_create_screen(winsys, r300_winsys); r300->context.destroy = r300_destroy_context; diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index a241d606c0..63ddd3b6a6 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -149,7 +149,8 @@ static void r300_destroy_screen(struct pipe_screen* pscreen) FREE(r300screen); } -struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, uint32_t pci_id) +struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, + struct r300_winsys* r300_winsys) { struct r300_screen* r300screen = CALLOC_STRUCT(r300_screen); struct r300_capabilities* caps = CALLOC_STRUCT(r300_capabilities); @@ -157,7 +158,10 @@ struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, uint32_t pci_ if (!r300screen || !caps) return NULL; - r300_parse_chipset(pci_id, caps); + caps->pci_id = r300_winsys->pci_id; + caps->num_frag_pipes = r300_winsys->gb_pipes; + + r300_parse_chipset(caps); r300screen->caps = caps; r300screen->screen.winsys = winsys; diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index b6c3d1f462..83d5a75d0a 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -28,6 +28,7 @@ #include "util/u_memory.h" #include "r300_chipset.h" +#include "r300_winsys.h" struct r300_screen { /* Parent class */ @@ -43,6 +44,7 @@ static struct r300_screen* r300_screen(struct pipe_screen* screen) { } /* Creates a new r300 screen. */ -struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, uint pci_id); +struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, + struct r300_winsys* r300_winsys); #endif /* R300_SCREEN_H */ diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index 319152c853..867d65b7de 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -41,6 +41,9 @@ struct r300_winsys { /* PCI ID */ uint32_t pci_id; + /* GB pipe count */ + uint32_t gb_pipes; + /* CS object. This is very much like Intel's batchbuffer. * Fill it full of dwords and relocs and then submit. * Repeat as needed. */ @@ -89,4 +92,4 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, } #endif -#endif /* R300_WINSYS_H */ \ No newline at end of file +#endif /* R300_WINSYS_H */ diff --git a/src/gallium/winsys/drm/amd/amd_context.c b/src/gallium/winsys/drm/amd/amd_context.c index 53311684de..7a486c93a5 100644 --- a/src/gallium/winsys/drm/amd/amd_context.c +++ b/src/gallium/winsys/drm/amd/amd_context.c @@ -244,11 +244,10 @@ GLboolean amd_context_create(const __GLcontextModes *visual, if (GL_TRUE) { fprintf(stderr, "Creating r300 context..."); - /* XXX today we pretend to be a very lame R300 vvvvvv */ - pipe = r300_create_context(NULL, - amd_context->pipe_winsys, - amd_create_r300_winsys(amd_context->drm_fd, - 0x4144)); + pipe = + r300_create_context(NULL, + amd_context->pipe_winsys, + amd_create_r300_winsys(amd_context->drm_fd)); } else { pipe = amd_create_softpipe(amd_context); } diff --git a/src/gallium/winsys/drm/amd/amd_r300.c b/src/gallium/winsys/drm/amd/amd_r300.c index a7a70fdd7f..04295e8281 100644 --- a/src/gallium/winsys/drm/amd/amd_r300.c +++ b/src/gallium/winsys/drm/amd/amd_r300.c @@ -43,13 +43,45 @@ static void amd_r300_flush_cs(struct radeon_cs* cs) radeon_cs_erase(cs); } -struct r300_winsys* amd_create_r300_winsys(int fd, uint32_t pci_id) +/* Helper function to do the ioctls needed for setup and init. */ +static void do_ioctls(struct r300_winsys* winsys, int fd) +{ + drm_radeon_getparam_t gp; + uint32_t target; + int retval; + + /* XXX is this cast safe? */ + gp.value = (int*)⌖ + + /* First, get PCI ID */ + gp.param = RADEON_PARAM_DEVICE_ID; + retval = drmCommandWriteRead(fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp)); + if (retval) { + fprintf(stderr, "%s: Failed to get PCI ID, error number %d", + __FUNCTION__, retval); + exit(1); + } + winsys->pci_id = target; + + /* Then, get the number of pixel pipes */ + gp.param = RADEON_PARAM_NUM_GB_PIPES; + retval = drmCommandWriteRead(fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp)); + if (retval) { + fprintf(stderr, "%s: Failed to get GB pipe count, error number %d", + __FUNCTION__, retval); + exit(1); + } + winsys->gb_pipes = target; + +} + +struct r300_winsys* amd_create_r300_winsys(int fd) { struct r300_winsys* winsys = calloc(1, sizeof(struct r300_winsys)); - struct radeon_cs_manager* csm = radeon_cs_manager_gem_ctor(fd); + do_ioctls(winsys, fd); - winsys->pci_id = pci_id; + struct radeon_cs_manager* csm = radeon_cs_manager_gem_ctor(fd); winsys->cs = radeon_cs_create(csm, 1024 * 64 / 4); diff --git a/src/gallium/winsys/drm/amd/amd_r300.h b/src/gallium/winsys/drm/amd/amd_r300.h index 0d229fe0c4..d80c23594c 100644 --- a/src/gallium/winsys/drm/amd/amd_r300.h +++ b/src/gallium/winsys/drm/amd/amd_r300.h @@ -20,10 +20,15 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +/* XXX WTF is this! I shouldn't have to include those first three! FUCK! */ +#include +#include +#include "drm.h" +#include "radeon_drm.h" #include "radeon_cs.h" #include "r300_winsys.h" #include "amd_buffer.h" -struct r300_winsys* amd_create_r300_winsys(int fd, uint32_t pci_id); +struct r300_winsys* amd_create_r300_winsys(int fd); -- cgit v1.2.3 From 0648bc9f65f1c6700b442e57ac0e82404fb60c2d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 22 Jan 2009 16:51:34 -0800 Subject: r300: Add texture stubs. --- src/gallium/drivers/r300/Makefile | 3 ++- src/gallium/drivers/r300/r300_screen.c | 23 ++++++++++++++++++++++ src/gallium/drivers/r300/r300_screen.h | 1 + src/gallium/drivers/r300/r300_texture.c | 35 +++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_texture.h | 33 +++++++++++++++++++++++++++++++ 5 files changed, 94 insertions(+), 1 deletion(-) create mode 100644 src/gallium/drivers/r300/r300_texture.c create mode 100644 src/gallium/drivers/r300/r300_texture.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index ad792e9aa8..f1b1a615b8 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -11,7 +11,8 @@ C_SOURCES = \ r300_emit.c \ r300_screen.c \ r300_state.c \ - r300_surface.c + r300_surface.c \ + r300_texture.c include ../../Makefile.template diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 63ddd3b6a6..2b83ae060c 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -113,12 +113,33 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) } } +/* XXX moar formats */ +static boolean check_tex_2d_format(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_I8_UNORM: + return TRUE; + default: + break; + } + + return FALSE; +} + +/* XXX moar targets */ static boolean r300_is_format_supported(struct pipe_screen* pscreen, enum pipe_format format, enum pipe_texture_target target, unsigned tex_usage, unsigned geom_flags) { + switch (target) { + case PIPE_TEXTURE_2D: + return check_tex_2d_format(format); + default: + break; + } + return FALSE; } @@ -174,5 +195,7 @@ struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, r300screen->screen.surface_map = r300_surface_map; r300screen->screen.surface_unmap = r300_surface_unmap; + r300_init_screen_texture_functions(&r300screen->screen); + return &r300screen->screen; } diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index 83d5a75d0a..b45ce5e8c6 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -28,6 +28,7 @@ #include "util/u_memory.h" #include "r300_chipset.h" +#include "r300_texture.h" #include "r300_winsys.h" struct r300_screen { diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c new file mode 100644 index 0000000000..30d9e64b4c --- /dev/null +++ b/src/gallium/drivers/r300/r300_texture.c @@ -0,0 +1,35 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_texture.h" + +/* Create a new texture. */ +static struct pipe_texture* + r300_texture_create(struct pipe_screen* screen, + const struct pipe_texture* template) +{ +} + +void r300_init_screen_texture_functions(struct pipe_screen* screen) +{ + screen->texture_create = r300_texture_create; +} diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h new file mode 100644 index 0000000000..9d14cf81a6 --- /dev/null +++ b/src/gallium/drivers/r300/r300_texture.h @@ -0,0 +1,33 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_TEXTURE_H +#define R300_TEXTURE_H + +#include "pipe/p_screen.h" + +struct r300_texture { +}; + +void r300_init_screen_texture_functions(struct pipe_screen* screen); + +#endif /* R300_TEXTURE_H */ -- cgit v1.2.3 From 2f37387786f1d0d6beded5afc29d36f744f1c948 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 22 Jan 2009 21:47:05 -0800 Subject: r300: Add texture sampler state. Easy compared to the actual texture handling code. --- src/gallium/drivers/r300/r300_context.h | 3 + src/gallium/drivers/r300/r300_state.c | 113 ++++++++++++++++++++++++++++++-- 2 files changed, 111 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 3877c9855d..3cb5df4e20 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -66,6 +66,9 @@ struct r300_rs_state { }; struct r300_sampler_state { + uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */ + uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */ + uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */ }; struct r300_scissor_state { diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 7fb0fc2eba..8e15a429fb 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -21,6 +21,7 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include "util/u_math.h" +#include "util/u_pack_color.h" #include "r300_context.h" #include "r300_reg.h" @@ -457,11 +458,113 @@ static void r300_delete_rs_state(struct pipe_context* pipe, void* state) FREE(state); } +static uint32_t translate_wrap(int wrap) { + switch (wrap) { + case PIPE_TEX_WRAP_REPEAT: + return R300_TX_REPEAT; + case PIPE_TEX_WRAP_CLAMP: + return R300_TX_CLAMP; + case PIPE_TEX_WRAP_CLAMP_TO_EDGE: + return R300_TX_CLAMP_TO_EDGE; + case PIPE_TEX_WRAP_CLAMP_TO_BORDER: + return R300_TX_CLAMP_TO_BORDER; + case PIPE_TEX_WRAP_MIRROR_REPEAT: + return R300_TX_REPEAT | R300_TX_MIRRORED; + case PIPE_TEX_WRAP_MIRROR_CLAMP: + return R300_TX_CLAMP | R300_TX_MIRRORED; + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: + return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED; + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: + return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED; + default: + /* XXX handle this? */ + return 0; + } +} + +static uint32_t translate_tex_filters(int min, int mag, int mip) { + uint32_t retval = 0; + switch (min) { + case PIPE_TEX_FILTER_NEAREST: + retval |= R300_TX_MIN_FILTER_NEAREST; + case PIPE_TEX_FILTER_LINEAR: + retval |= R300_TX_MIN_FILTER_LINEAR; + case PIPE_TEX_FILTER_ANISO: + retval |= R300_TX_MIN_FILTER_ANISO; + default: + /* XXX WTF?! */ + break; + } + switch (mag) { + case PIPE_TEX_FILTER_NEAREST: + retval |= R300_TX_MAG_FILTER_NEAREST; + case PIPE_TEX_FILTER_LINEAR: + retval |= R300_TX_MAG_FILTER_LINEAR; + case PIPE_TEX_FILTER_ANISO: + retval |= R300_TX_MAG_FILTER_ANISO; + default: + /* XXX WTF?! */ + break; + } + switch (mip) { + case PIPE_TEX_MIPFILTER_NONE: + retval |= R300_TX_MIN_FILTER_MIP_NONE; + case PIPE_TEX_MIPFILTER_NEAREST: + retval |= R300_TX_MIN_FILTER_MIP_NEAREST; + case PIPE_TEX_MIPFILTER_LINEAR: + retval |= R300_TX_MIN_FILTER_MIP_LINEAR; + default: + /* XXX WTF?! */ + break; + } + + return retval; +} + +static uint32_t anisotropy(float max_aniso) { + if (max_aniso >= 16.0f) { + return R300_TX_MAX_ANISO_16_TO_1; + } else if (max_aniso >= 8.0f) { + return R300_TX_MAX_ANISO_8_TO_1; + } else if (max_aniso >= 4.0f) { + return R300_TX_MAX_ANISO_4_TO_1; + } else if (max_aniso >= 2.0f) { + return R300_TX_MAX_ANISO_2_TO_1; + } else { + return R300_TX_MAX_ANISO_1_TO_1; + } +} + static void* r300_create_sampler_state(struct pipe_context* pipe, const struct pipe_sampler_state* state) { + struct r300_context* r300 = r300_context(pipe); struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); + int lod_bias; + + sampler->filter0 |= + (translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | + (translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | + (translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); + + sampler->filter0 |= translate_tex_filters(state->min_img_filter, + state->mag_img_filter, + state->min_mip_filter); + + lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); + + sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; + + sampler->filter1 |= anisotropy(state->max_anisotropy); + + util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM, + &sampler->border_color); + + /* R500-specific fixups and optimizations */ + if (r300_screen(r300->context.screen)->caps->is_r500) { + sampler->filter1 |= R500_BORDER_FIX; + } return (void*)sampler; } @@ -471,15 +574,15 @@ static void r300_bind_sampler_states(struct pipe_context* pipe, void** states) { struct r300_context* r300 = r300_context(pipe); - int i = 0; + int i; if (count > 8) { return; } - for (i; i < count; i++) { + for (i = 0; i < count; i++) { if (r300->sampler_states[i] != states[i]) { - r300->sampler_states[i] = states[i]; + r300->sampler_states[i] = (struct r300_sampler_state*)states[i]; r300->dirty_state |= (R300_NEW_SAMPLER << i); } } @@ -510,8 +613,8 @@ static void r300_set_scissor_state(struct pipe_context* pipe, r300->scissor_state->scissor_top_left = (left << R300_SCISSORS_X_SHIFT) | (top << R300_SCISSORS_Y_SHIFT); - r300->scissor_state->scissor_bottom_right = (right << R300_SCISSORS_X_SHIFT) | - (bottom << R300_SCISSORS_Y_SHIFT); + r300->scissor_state->scissor_bottom_right = + (right << R300_SCISSORS_X_SHIFT) | (bottom << R300_SCISSORS_Y_SHIFT); r300->dirty_state |= R300_NEW_SCISSOR; } -- cgit v1.2.3 From 8e11e0121466efa34cfc14d299b43455a30b198c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 23 Jan 2009 02:46:52 -0800 Subject: r300: Add initial pipe_texture handling. Still primitive and needing to be fleshed out, but it's a start. --- src/gallium/drivers/r300/r300_context.h | 14 ++++++ src/gallium/drivers/r300/r300_texture.c | 76 +++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_texture.h | 5 ++- 3 files changed, 93 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 3cb5df4e20..f162aa4b64 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -84,6 +84,20 @@ struct r300_scissor_state { #define R300_NEW_SCISSOR 0x1000 #define R300_NEW_KITCHEN_SINK 0x1fff +struct r300_texture { + /* Parent class */ + struct pipe_texture tex; + + /* Offsets into the buffer. */ + unsigned offset[PIPE_MAX_TEXTURE_LEVELS]; + + /* Total size of this texture, in bytes. */ + unsigned size; + + /* Pipe buffer backing this texture. */ + struct pipe_buffer* buffer; +}; + struct r300_context { /* Parent class */ struct pipe_context context; diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 30d9e64b4c..2f6c52b137 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -22,14 +22,90 @@ #include "r300_texture.h" +static int minify(int i) +{ + return MAX2(1, i >> 1); +} + +static void r300_setup_miptree(struct r300_texture* tex) +{ + struct pipe_texture* base = &tex->tex; + int stride, size, offset; + + for (int i = 0; i <= base->last_level; i++) { + if (i > 0) { + base->width[i] = minify(base->width[i-1]); + base->height[i] = minify(base->height[i-1]); + base->depth[i] = minify(base->depth[i-1]); + } + + base->nblocksx[i] = pf_get_nblocksx(&base->block, base->width[i]); + base->nblocksy[i] = pf_get_nblocksy(&base->block, base->width[i]); + + /* Radeons enjoy things in multiples of 32. */ + /* XXX NPOT -> 64, not 32 */ + stride = (base->nblocksx[i] * base->block.size + 31) & ~31; + size = stride * base->nblocksy[i] * base->depth[i]; + + /* XXX 64 for NPOT */ + tex->offset[i] = (tex->size + 31) & ~31; + tex->size = tex->offset[i] + size; + } +} + /* Create a new texture. */ static struct pipe_texture* r300_texture_create(struct pipe_screen* screen, const struct pipe_texture* template) { + struct r300_screen* r300screen = r300_screen(screen); + + struct r300_texture* tex = CALLOC_STRUCT(r300_texture); + + if (!tex) { + return NULL; + } + + tex->tex = *template; + tex->tex.refcount = 1; + tex->tex.screen = screen; + + r300_setup_miptree(tex); + + tex->buffer = screen->winsys->buffer_create(screen->winsys, 32, + PIPE_BUFFER_USAGE_PIXEL, + tex->size); + + if (!tex->buffer) { + FREE(tex); + return NULL; + } + + return (struct pipe_texture*)tex; +} + +static void r300_texture_release(struct pipe_screen* screen, + struct pipe_texture** texture) +{ + if (!*texture) { + return; + } + + (*texture)->refcount--; + + if ((*texture)->refcount <= 0) { + struct r300_texture* tex = (struct r300_texture*)*texture; + + pipe_buffer_reference(screen, &tex->buffer, NULL); + + FREE(tex); + } + + *texture = NULL; } void r300_init_screen_texture_functions(struct pipe_screen* screen) { screen->texture_create = r300_texture_create; + screen->texture_release = r300_texture_release; } diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h index 9d14cf81a6..7964229a94 100644 --- a/src/gallium/drivers/r300/r300_texture.h +++ b/src/gallium/drivers/r300/r300_texture.h @@ -25,8 +25,9 @@ #include "pipe/p_screen.h" -struct r300_texture { -}; +#include "util/u_math.h" + +#include "r300_context.h" void r300_init_screen_texture_functions(struct pipe_screen* screen); -- cgit v1.2.3 From 471129c7a14fb585ede198970e59270c4afa5310 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 23 Jan 2009 03:09:15 -0800 Subject: r300: Add more pipe_texture stuff. This is enough to sate glxinfo, for now. --- src/gallium/drivers/r300/r300_texture.c | 54 +++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 2f6c52b137..c1df905033 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -104,8 +104,62 @@ static void r300_texture_release(struct pipe_screen* screen, *texture = NULL; } +static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, + struct pipe_texture* texture, + unsigned face, + unsigned level, + unsigned zslice, + unsigned flags) +{ + struct r300_texture* tex = (struct r300_texture*)texture; + struct pipe_surface* surface = CALLOC_STRUCT(pipe_surface); + unsigned offset; + + /* XXX this is certainly dependent on tex target */ + offset = tex->offset[level]; + + if (surface) { + surface->refcount = 1; + surface->winsys = screen->winsys; + pipe_texture_reference(&surface->texture, texture); + pipe_buffer_reference(screen, &surface->buffer, tex->buffer); + surface->format = texture->format; + surface->width = texture->width[level]; + surface->height = texture->height[level]; + surface->block = texture->block; + surface->nblocksx = texture->nblocksx[level]; + surface->nblocksy = texture->nblocksy[level]; + /* XXX save the actual stride instead plz kthnxbai */ + surface->stride = + (texture->nblocksx[level] * texture->block.size + 31) & ~31; + surface->offset = offset; + surface->usage = flags; + surface->status = PIPE_SURFACE_STATUS_DEFINED; + } + + return surface; +} + +static void r300_tex_surface_release(struct pipe_screen* screen, + struct pipe_surface** surface) +{ + struct pipe_surface* s = *surface; + + s->refcount--; + + if (s->refcount <= 0) { + pipe_texture_reference(&s->texture, NULL); + pipe_buffer_reference(screen, &s->buffer, NULL); + FREE(s); + } + + *surface = NULL; +} + void r300_init_screen_texture_functions(struct pipe_screen* screen) { screen->texture_create = r300_texture_create; screen->texture_release = r300_texture_release; + screen->get_tex_surface = r300_get_tex_surface; + screen->tex_surface_release = r300_tex_surface_release; } -- cgit v1.2.3 From 45cb94217ebd55a4d38264ce83806062ba25a478 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 23 Jan 2009 15:08:27 -0800 Subject: r300: Add fragment shader stubs. Not looking forward to filling these out at all. --- src/gallium/drivers/r300/r300_context.h | 21 ++++++++++++++------- src/gallium/drivers/r300/r300_emit.c | 2 +- src/gallium/drivers/r300/r300_state.c | 32 +++++++++++++++++++++++++++++++- 3 files changed, 46 insertions(+), 9 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index f162aa4b64..0d7ba581cc 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -55,6 +55,9 @@ struct r300_dsa_state { uint32_t stencil_ref_bf; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */ }; +struct r300_fs_state { +}; + struct r300_rs_state { uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ uint32_t depth_scale_front; /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */ @@ -76,13 +79,15 @@ struct r300_scissor_state { uint32_t scissor_bottom_right; /* R300_SC_SCISSORS_BR: 0x43e4 */ }; -#define R300_NEW_BLEND 0x0001 -#define R300_NEW_BLEND_COLOR 0x0002 -#define R300_NEW_DSA 0x0004 -#define R300_NEW_RS 0x0008 -#define R300_NEW_SAMPLER 0x0010 -#define R300_NEW_SCISSOR 0x1000 -#define R300_NEW_KITCHEN_SINK 0x1fff +#define R300_NEW_BLEND 0x0001 +#define R300_NEW_BLEND_COLOR 0x0002 +#define R300_NEW_DSA 0x0004 +#define R300_NEW_FRAGMENT_SHADER 0x0008 +#define R300_NEW_RASTERIZER 0x0010 +#define R300_NEW_SAMPLER 0x0020 +#define R300_NEW_SCISSOR 0x2000 +#define R300_NEW_VERTEX_SHADER 0x4000 +#define R300_NEW_KITCHEN_SINK 0x7fff struct r300_texture { /* Parent class */ @@ -114,6 +119,8 @@ struct r300_context { struct r300_blend_color_state* blend_color_state; /* Depth, stencil, and alpha state. */ struct r300_dsa_state* dsa_state; + /* Fragment shader state. */ + struct r300_fs_state* fs_state; /* Rasterizer state. */ struct r300_rs_state* rs_state; /* Sampler states. */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index bf6fd3224e..19bfcbdd5b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -74,7 +74,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) } } - if (r300->dirty_state & R300_NEW_RS) { + if (r300->dirty_state & R300_NEW_RASTERIZER) { struct r300_rs_state* rs = r300->rs_state; OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status); /* XXX next six are contiguous regs */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 8e15a429fb..9d9a4ec202 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -357,6 +357,32 @@ static void r300_delete_dsa_state(struct pipe_context* pipe, { FREE(state); } + +/* Create fragment shader state. */ +static void* r300_create_fs_state(struct pipe_context* pipe, + const struct pipe_shader_state* state) +{ + struct r300_fs_state* fs = CALLOC_STRUCT(r300_fs_state); + + return (void*)fs; +} + +/* Bind fragment shader state. */ +static void r300_bind_fs_state(struct pipe_context* pipe, void* state) +{ + struct r300_context* r300 = r300_context(pipe); + + r300->fs_state = (struct r300_fs_state*)state; + + r300->dirty_state |= R300_NEW_FRAGMENT_SHADER; +} + +/* Delect fragment shader state. */ +static void r300_delete_fs_state(struct pipe_context* pipe, void* state) +{ + FREE(state); +} + #if 0 struct pipe_rasterizer_state { @@ -449,7 +475,7 @@ static void r300_bind_rs_state(struct pipe_context* pipe, void* state) struct r300_context* r300 = r300_context(pipe); r300->rs_state = (struct r300_rs_state*)state; - r300->dirty_state |= R300_NEW_RS; + r300->dirty_state |= R300_NEW_RASTERIZER; } /* Free rasterizer state. */ @@ -652,6 +678,10 @@ void r300_init_state_functions(struct r300_context* r300) { r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; + r300->context.create_fs_state = r300_create_fs_state; + r300->context.bind_fs_state = r300_bind_fs_state; + r300->context.delete_fs_state = r300_delete_fs_state; + r300->context.create_rasterizer_state = r300_create_rs_state; r300->context.bind_rasterizer_state = r300_bind_rs_state; r300->context.delete_rasterizer_state = r300_delete_rs_state; -- cgit v1.2.3 From 1a5eea0c1e9ce6162ed6b07c337bffe62cb3c221 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 23 Jan 2009 17:01:04 -0800 Subject: r300: Finish basic state setup. I have successfully fooled glxinfo into believing that I am a competent writer of code. Next step is to trick trivial/clear. --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_context.c | 2 ++ src/gallium/drivers/r300/r300_screen.c | 1 + src/gallium/drivers/r300/r300_texture.c | 31 +++++++++++++++++++++++++++++++ 4 files changed, 35 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index f1b1a615b8..1f67692166 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -9,6 +9,7 @@ C_SOURCES = \ r300_clear.c \ r300_context.c \ r300_emit.c \ + r300_flush.c \ r300_screen.c \ r300_state.c \ r300_surface.c \ diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index f254b2f2a3..314b2f0a11 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -52,6 +52,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); r300->scissor_state = CALLOC_STRUCT(r300_scissor_state); + r300_init_flush_functions(r300); + r300_init_surface_functions(r300); r300_init_state_functions(r300); diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 2b83ae060c..bd5aa4f466 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -117,6 +117,7 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) static boolean check_tex_2d_format(enum pipe_format format) { switch (format) { + case PIPE_FORMAT_A8R8G8B8_UNORM: case PIPE_FORMAT_I8_UNORM: return TRUE; default: diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index c1df905033..4adfe478c3 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -156,10 +156,41 @@ static void r300_tex_surface_release(struct pipe_screen* screen, *surface = NULL; } +static struct pipe_texture* + r300_texture_blanket(struct pipe_screen* screen, + const struct pipe_texture* base, + const unsigned* stride, + struct pipe_buffer* buffer) +{ + struct r300_texture* tex; + + if (base->target != PIPE_TEXTURE_2D || + base->last_level != 0 || + base->depth[0] != 1) { + return NULL; + } + + tex = CALLOC_STRUCT(r300_texture); + if (!tex) { + return NULL; + } + + tex->tex = *base; + tex->tex.refcount = 1; + tex->tex.screen = screen; + + /* XXX tex->stride = *stride; */ + + pipe_buffer_reference(screen, &tex->buffer, buffer); + + return (struct pipe_texture*)tex; +} + void r300_init_screen_texture_functions(struct pipe_screen* screen) { screen->texture_create = r300_texture_create; screen->texture_release = r300_texture_release; screen->get_tex_surface = r300_get_tex_surface; screen->tex_surface_release = r300_tex_surface_release; + screen->texture_blanket = r300_texture_blanket; } -- cgit v1.2.3 From 1a503019d73701ed311b15107f314bc84968bdb7 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 01:32:14 -0800 Subject: r300: Moar state handlers. Ah, my code's so bad. It's amazing. --- src/gallium/drivers/r300/r300_chipset.c | 3 ++ src/gallium/drivers/r300/r300_context.h | 9 ++++ src/gallium/drivers/r300/r300_state.c | 76 +++++++++++++++++++++++++++++++++ 3 files changed, 88 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index f2dc8aedaa..494c9e54c0 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -340,4 +340,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) /* XXX not an r300?! */ break; } + + /* Force off TCL for now */ + caps->has_tcl = FALSE; } diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 0d7ba581cc..52ddfa1df9 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -79,6 +79,9 @@ struct r300_scissor_state { uint32_t scissor_bottom_right; /* R300_SC_SCISSORS_BR: 0x43e4 */ }; +struct r300_texture_state { +}; + #define R300_NEW_BLEND 0x0001 #define R300_NEW_BLEND_COLOR 0x0002 #define R300_NEW_DSA 0x0004 @@ -121,6 +124,8 @@ struct r300_context { struct r300_dsa_state* dsa_state; /* Fragment shader state. */ struct r300_fs_state* fs_state; + /* Framebuffer state. We currently don't need our own version of this. */ + struct pipe_framebuffer_state framebuffer_state; /* Rasterizer state. */ struct r300_rs_state* rs_state; /* Sampler states. */ @@ -128,6 +133,10 @@ struct r300_context { int sampler_count; /* Scissor state. */ struct r300_scissor_state* scissor_state; + /* Texture states. */ + struct r300_texture* textures[8]; + struct r300_texture_state* texture_states[8]; + int texture_count; /* Bitmask of dirty state objects. */ uint32_t dirty_state; /* Flag indicating whether or not the HW is dirty. */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 9d9a4ec202..4f9d44bbfd 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -195,6 +195,15 @@ static void r300_set_blend_color(struct pipe_context* pipe, r300->dirty_state |= R300_NEW_BLEND_COLOR; } +static void r300_set_clip_state(struct pipe_context* pipe, + const struct pipe_clip_state* state) +{ + struct r300_context* r300 = r300_context(pipe); + /* XXX Draw */ + draw_flush(r300->draw); + draw_set_clip_state(r300->draw, state); +} + static uint32_t translate_depth_stencil_function(int zs_func) { switch (zs_func) { case PIPE_FUNC_NEVER: @@ -358,6 +367,19 @@ static void r300_delete_dsa_state(struct pipe_context* pipe, FREE(state); } +static void + r300_set_framebuffer_state(struct pipe_context* pipe, + const struct pipe_framebuffer_state* state) +{ + struct r300_context* r300 = r300_context(pipe); + + draw_flush(r300->draw); + + r300->framebuffer_state = *state; + + /* XXX do we need to mark dirty state? */ +} + /* Create fragment shader state. */ static void* r300_create_fs_state(struct pipe_context* pipe, const struct pipe_shader_state* state) @@ -383,6 +405,12 @@ static void r300_delete_fs_state(struct pipe_context* pipe, void* state) FREE(state); } +static void r300_set_polygon_stipple(struct pipe_context* pipe, + const struct pipe_poly_stipple* state) +{ + /* XXX */ +} + #if 0 struct pipe_rasterizer_state { @@ -621,6 +649,36 @@ static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) FREE(state); } +static void r300_set_sampler_textures(struct pipe_context* pipe, + unsigned count, + struct pipe_texture** texture) +{ + struct r300_context* r300 = r300_context(pipe); + int i; + + /* XXX magic num */ + if (count > 8) { + return; + } + + for (i = 0; i < count; i++) { + if (r300->textures[i] != (struct r300_texture*)texture[i]) { + pipe_texture_reference((struct pipe_texture**)&r300->textures[i], + texture[i]); + /* XXX NEW_TEXTURE instead? */ + r300->dirty_state |= (R300_NEW_SAMPLER << i); + } + } + + for (i = count; i < 8; i++) { + /* XXX also state change? */ + pipe_texture_reference((struct pipe_texture**)&r300->textures[i], + NULL); + } + + r300->texture_count = count; +} + static void r300_set_scissor_state(struct pipe_context* pipe, const struct pipe_scissor_state* state) { @@ -645,6 +703,14 @@ static void r300_set_scissor_state(struct pipe_context* pipe, r300->dirty_state |= R300_NEW_SCISSOR; } +static void r300_set_viewport_state(struct pipe_context* pipe, + const struct pipe_viewport_state* state) +{ + struct r300_context* r300 = r300_context(pipe); + /* XXX handing this off to Draw for now */ + draw_set_viewport_state(r300->draw, state); +} + static void* r300_create_vs_state(struct pipe_context* pipe, const struct pipe_shader_state* state) { @@ -674,14 +740,20 @@ void r300_init_state_functions(struct r300_context* r300) { r300->context.set_blend_color = r300_set_blend_color; + r300->context.set_clip_state = r300_set_clip_state; + r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; + r300->context.set_framebuffer_state = r300_set_framebuffer_state; + r300->context.create_fs_state = r300_create_fs_state; r300->context.bind_fs_state = r300_bind_fs_state; r300->context.delete_fs_state = r300_delete_fs_state; + r300->context.set_polygon_stipple = r300_set_polygon_stipple; + r300->context.create_rasterizer_state = r300_create_rs_state; r300->context.bind_rasterizer_state = r300_bind_rs_state; r300->context.delete_rasterizer_state = r300_delete_rs_state; @@ -690,8 +762,12 @@ void r300_init_state_functions(struct r300_context* r300) { r300->context.bind_sampler_states = r300_bind_sampler_states; r300->context.delete_sampler_state = r300_delete_sampler_state; + r300->context.set_sampler_textures = r300_set_sampler_textures; + r300->context.set_scissor_state = r300_set_scissor_state; + r300->context.set_viewport_state = r300_set_viewport_state; + r300->context.create_vs_state = r300_create_vs_state; r300->context.bind_vs_state = r300_bind_vs_state; r300->context.delete_vs_state = r300_delete_vs_state; -- cgit v1.2.3 From 7d3d3c75cc1bade8eeb7cbbabd290e2b30dc3100 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 01:49:57 -0800 Subject: r300: Plan for the next state setters. --- src/gallium/drivers/r300/r300_state.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 4f9d44bbfd..e52d8ec9c2 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -732,8 +732,8 @@ static void r300_delete_vs_state(struct pipe_context* pipe, void* state) draw_delete_vertex_shader(context->draw, (struct draw_vertex_shader*)state); } -void r300_init_state_functions(struct r300_context* r300) { - +void r300_init_state_functions(struct r300_context* r300) +{ r300->context.create_blend_state = r300_create_blend_state; r300->context.bind_blend_state = r300_bind_blend_state; r300->context.delete_blend_state = r300_delete_blend_state; @@ -742,10 +742,14 @@ void r300_init_state_functions(struct r300_context* r300) { r300->context.set_clip_state = r300_set_clip_state; + /* XXX r300->context.set_constant_buffer = r300_set_constant_buffer; */ + r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; + /* XXX r300->context.set_edgeflags = r300_set_edgeflags; */ + r300->context.set_framebuffer_state = r300_set_framebuffer_state; r300->context.create_fs_state = r300_create_fs_state; @@ -768,6 +772,9 @@ void r300_init_state_functions(struct r300_context* r300) { r300->context.set_viewport_state = r300_set_viewport_state; + /* XXX r300->context.set_vertex_buffers = r300_set_vertex_buffers; + * XXX r300->context.set_vertex_elements = r300_set_vertex_elements; */ + r300->context.create_vs_state = r300_create_vs_state; r300->context.bind_vs_state = r300_bind_vs_state; r300->context.delete_vs_state = r300_delete_vs_state; -- cgit v1.2.3 From 1aa2ecf3533154337947dbac2ace54fadf031692 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 02:03:35 -0800 Subject: r300: Put r300_blit to bed. Not going to be using the blitter. Period. --- src/gallium/drivers/r300/Makefile | 1 - src/gallium/drivers/r300/r300_blit.c | 96 ------------------------------------ src/gallium/drivers/r300/r300_blit.h | 43 ---------------- 3 files changed, 140 deletions(-) delete mode 100644 src/gallium/drivers/r300/r300_blit.c delete mode 100644 src/gallium/drivers/r300/r300_blit.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 1f67692166..1d61b31605 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -4,7 +4,6 @@ include $(TOP)/configs/current LIBNAME = r300 C_SOURCES = \ - r300_blit.c \ r300_chipset.c \ r300_clear.c \ r300_context.c \ diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c deleted file mode 100644 index 6bcfbc0d79..0000000000 --- a/src/gallium/drivers/r300/r300_blit.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright 2008 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#include "r300_blit.h" - -/* Does a "paint" into the specified rectangle. - * Returns 1 on success, 0 on error. */ -int r300_fill_blit(struct r300_context* r300, - unsigned cpp, - short dst_pitch, - struct pipe_buffer* dst_buffer, - unsigned dst_offset, - short x, short y, - short w, short h, - unsigned color) -{ - CS_LOCALS(r300); - uint32_t dest_type; -#if 0 - /* Check for fallbacks. */ - /* XXX we can do YUV surfaces, too, but only in 3D mode. Hmm... */ - switch(cpp) { - case 2: - case 6: - dest_type = ATI_DATATYPE_CI8; - break; - case 4: - dest_type = ATI_DATATYPE_RGB565; - break; - case 8: - dest_type = ATI_DATATYPE_ARGB8888; - break; - default: - /* Whatever this is, we can't fill it. (Yet.) */ - return 0; - } - - /* XXX odds are *incredibly* good that we were in 3D just a bit ago, - * so flush here first. */ - - BEGIN_CS(10 + 2 + 2); - - /* Set up the 2D engine. */ - OUT_CS_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, - RADEON_DEFAULT_SC_RIGHT_MAX | RADEON_DEFAULT_SC_BOTTOM_MAX); - OUT_CS_REG(RADEON_DP_GUI_MASTER_CNTL, - RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_SOLID_COLOR | - (dest_type << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP3_P | - RADEON_GMC_CLR_CMP_CNTL_DIS); - /* XXX pack this? */ - OUT_CS_REG(RADEON_DP_BRUSH_FRGD_CLR, color); - OUT_CS_REG(RADEON_DP_BRUSH_BKGD_CLR, 0x00000000); - OUT_CS_REG(RADEON_DP_SRC_FRGD_CLR, 0xffffffff); - OUT_CS_REG(RADEON_DP_SRC_BKGD_CLR, 0x00000000); - /* XXX what should this be? */ - OUT_CS_REG(RADEON_DP_WRITE_MASK, 0x00000000); - OUT_CS_REG(RADEON_DP_CNTL, - RADEON_DST_X_LEFT_TO_RIGHT | RADEON_DST_Y_TOP_TO_BOTTOM); - OUT_CS_REG(RADEON_DST_PITCH_OFFSET, 0x0); - OUT_CS_RELOC(dst_buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - - /* Do the actual paint. */ - OUT_CS_REG(RADEON_DST_Y_X, (y << 16) | x); - OUT_CS_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); - - /* Let the 2D engine settle. */ - OUT_CS_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); - OUT_CS_REG(RADEON_WAIT_UNTIL, - RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE); - - END_CS; -#endif - return 1; -} diff --git a/src/gallium/drivers/r300/r300_blit.h b/src/gallium/drivers/r300/r300_blit.h deleted file mode 100644 index 740cbcdea5..0000000000 --- a/src/gallium/drivers/r300/r300_blit.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright 2008 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#ifndef R300_BLIT_H -#define R300_BLIT_H - -#include "pipe/p_state.h" - -#include "r300_context.h" -#include "r300_cs.h" - -/* Forward declarations. */ -struct r300_context; - -extern int r300_fill_blit(struct r300_context* r300, - unsigned cpp, - short dst_pitch, - struct pipe_buffer* dst_buffer, - unsigned dst_offset, - short x, short y, - short w, short h, - unsigned color); - -#endif /* R300_BLIT_H */ \ No newline at end of file -- cgit v1.2.3 From e54732eb3db8452a99fcc2ad68fb644cecba6a20 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 02:12:55 -0800 Subject: r300: Remove radeon_reg. Wonder why this was ever committed... --- src/gallium/drivers/r300/radeon_reg.h | 5324 --------------------------------- 1 file changed, 5324 deletions(-) delete mode 100644 src/gallium/drivers/r300/radeon_reg.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/radeon_reg.h b/src/gallium/drivers/r300/radeon_reg.h deleted file mode 100644 index e2fcb70a95..0000000000 --- a/src/gallium/drivers/r300/radeon_reg.h +++ /dev/null @@ -1,5324 +0,0 @@ -/* - * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and - * VA Linux Systems Inc., Fremont, California. - * - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation on the rights to use, copy, modify, merge, - * publish, distribute, sublicense, and/or sell copies of the Software, - * and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR - * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/* - * Authors: - * Kevin E. Martin - * Rickard E. Faith - * Alan Hourihane - * - * References: - * - * !!!! FIXME !!!! - * RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical - * Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April - * 1999. - * - * !!!! FIXME !!!! - * RAGE 128 Software Development Manual (Technical Reference Manual P/N - * SDK-G04000 Rev. 0.01), ATI Technologies: June 1999. - * - */ - -/* !!!! FIXME !!!! NOTE: THIS FILE HAS BEEN CONVERTED FROM r128_reg.h - * AND CONTAINS REGISTERS AND REGISTER DEFINITIONS THAT ARE NOT CORRECT - * ON THE RADEON. A FULL AUDIT OF THIS CODE IS NEEDED! */ - -/* XXX clean this bitch up */ - -#ifndef _RADEON_REG_H_ -#define _RADEON_REG_H_ - -#define ATI_DATATYPE_VQ 0 -#define ATI_DATATYPE_CI4 1 -#define ATI_DATATYPE_CI8 2 -#define ATI_DATATYPE_ARGB1555 3 -#define ATI_DATATYPE_RGB565 4 -#define ATI_DATATYPE_RGB888 5 -#define ATI_DATATYPE_ARGB8888 6 -#define ATI_DATATYPE_RGB332 7 -#define ATI_DATATYPE_Y8 8 -#define ATI_DATATYPE_RGB8 9 -#define ATI_DATATYPE_CI16 10 -#define ATI_DATATYPE_VYUY_422 11 -#define ATI_DATATYPE_YVYU_422 12 -#define ATI_DATATYPE_AYUV_444 14 -#define ATI_DATATYPE_ARGB4444 15 - - /* Registers for 2D/Video/Overlay */ -#define RADEON_ADAPTER_ID 0x0f2c /* PCI */ -#define RADEON_AGP_BASE 0x0170 -#define RADEON_AGP_CNTL 0x0174 -# define RADEON_AGP_APER_SIZE_256MB (0x00 << 0) -# define RADEON_AGP_APER_SIZE_128MB (0x20 << 0) -# define RADEON_AGP_APER_SIZE_64MB (0x30 << 0) -# define RADEON_AGP_APER_SIZE_32MB (0x38 << 0) -# define RADEON_AGP_APER_SIZE_16MB (0x3c << 0) -# define RADEON_AGP_APER_SIZE_8MB (0x3e << 0) -# define RADEON_AGP_APER_SIZE_4MB (0x3f << 0) -# define RADEON_AGP_APER_SIZE_MASK (0x3f << 0) -#define RADEON_STATUS_PCI_CONFIG 0x06 -# define RADEON_CAP_LIST 0x100000 -#define RADEON_CAPABILITIES_PTR_PCI_CONFIG 0x34 /* offset in PCI config*/ -# define RADEON_CAP_PTR_MASK 0xfc /* mask off reserved bits of CAP_PTR */ -# define RADEON_CAP_ID_NULL 0x00 /* End of capability list */ -# define RADEON_CAP_ID_AGP 0x02 /* AGP capability ID */ -# define RADEON_CAP_ID_EXP 0x10 /* PCI Express */ -#define RADEON_AGP_COMMAND 0x0f60 /* PCI */ -#define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config*/ -# define RADEON_AGP_ENABLE (1<<8) -#define RADEON_AGP_PLL_CNTL 0x000b /* PLL */ -#define RADEON_AGP_STATUS 0x0f5c /* PCI */ -# define RADEON_AGP_1X_MODE 0x01 -# define RADEON_AGP_2X_MODE 0x02 -# define RADEON_AGP_4X_MODE 0x04 -# define RADEON_AGP_FW_MODE 0x10 -# define RADEON_AGP_MODE_MASK 0x17 -# define RADEON_AGPv3_MODE 0x08 -# define RADEON_AGPv3_4X_MODE 0x01 -# define RADEON_AGPv3_8X_MODE 0x02 -#define RADEON_ATTRDR 0x03c1 /* VGA */ -#define RADEON_ATTRDW 0x03c0 /* VGA */ -#define RADEON_ATTRX 0x03c0 /* VGA */ -#define RADEON_AUX_SC_CNTL 0x1660 -# define RADEON_AUX1_SC_EN (1 << 0) -# define RADEON_AUX1_SC_MODE_OR (0 << 1) -# define RADEON_AUX1_SC_MODE_NAND (1 << 1) -# define RADEON_AUX2_SC_EN (1 << 2) -# define RADEON_AUX2_SC_MODE_OR (0 << 3) -# define RADEON_AUX2_SC_MODE_NAND (1 << 3) -# define RADEON_AUX3_SC_EN (1 << 4) -# define RADEON_AUX3_SC_MODE_OR (0 << 5) -# define RADEON_AUX3_SC_MODE_NAND (1 << 5) -#define RADEON_AUX1_SC_BOTTOM 0x1670 -#define RADEON_AUX1_SC_LEFT 0x1664 -#define RADEON_AUX1_SC_RIGHT 0x1668 -#define RADEON_AUX1_SC_TOP 0x166c -#define RADEON_AUX2_SC_BOTTOM 0x1680 -#define RADEON_AUX2_SC_LEFT 0x1674 -#define RADEON_AUX2_SC_RIGHT 0x1678 -#define RADEON_AUX2_SC_TOP 0x167c -#define RADEON_AUX3_SC_BOTTOM 0x1690 -#define RADEON_AUX3_SC_LEFT 0x1684 -#define RADEON_AUX3_SC_RIGHT 0x1688 -#define RADEON_AUX3_SC_TOP 0x168c -#define RADEON_AUX_WINDOW_HORZ_CNTL 0x02d8 -#define RADEON_AUX_WINDOW_VERT_CNTL 0x02dc - -#define RADEON_BASE_CODE 0x0f0b -#define RADEON_BIOS_0_SCRATCH 0x0010 -# define RADEON_FP_PANEL_SCALABLE (1 << 16) -# define RADEON_FP_PANEL_SCALE_EN (1 << 17) -# define RADEON_FP_CHIP_SCALE_EN (1 << 18) -# define RADEON_DRIVER_BRIGHTNESS_EN (1 << 26) -# define RADEON_DISPLAY_ROT_MASK (3 << 28) -# define RADEON_DISPLAY_ROT_00 (0 << 28) -# define RADEON_DISPLAY_ROT_90 (1 << 28) -# define RADEON_DISPLAY_ROT_180 (2 << 28) -# define RADEON_DISPLAY_ROT_270 (3 << 28) -#define RADEON_BIOS_1_SCRATCH 0x0014 -#define RADEON_BIOS_2_SCRATCH 0x0018 -#define RADEON_BIOS_3_SCRATCH 0x001c -#define RADEON_BIOS_4_SCRATCH 0x0020 -# define RADEON_CRT1_ATTACHED_MASK (3 << 0) -# define RADEON_CRT1_ATTACHED_MONO (1 << 0) -# define RADEON_CRT1_ATTACHED_COLOR (2 << 0) -# define RADEON_LCD1_ATTACHED (1 << 2) -# define RADEON_DFP1_ATTACHED (1 << 3) -# define RADEON_TV1_ATTACHED_MASK (3 << 4) -# define RADEON_TV1_ATTACHED_COMP (1 << 4) -# define RADEON_TV1_ATTACHED_SVIDEO (2 << 4) -# define RADEON_CRT2_ATTACHED_MASK (3 << 8) -# define RADEON_CRT2_ATTACHED_MONO (1 << 8) -# define RADEON_CRT2_ATTACHED_COLOR (2 << 8) -# define RADEON_DFP2_ATTACHED (1 << 11) -#define RADEON_BIOS_5_SCRATCH 0x0024 -# define RADEON_LCD1_ON (1 << 0) -# define RADEON_CRT1_ON (1 << 1) -# define RADEON_TV1_ON (1 << 2) -# define RADEON_DFP1_ON (1 << 3) -# define RADEON_CRT2_ON (1 << 5) -# define RADEON_CV1_ON (1 << 6) -# define RADEON_DFP2_ON (1 << 7) -# define RADEON_LCD1_CRTC_MASK (1 << 8) -# define RADEON_LCD1_CRTC_SHIFT 8 -# define RADEON_CRT1_CRTC_MASK (1 << 9) -# define RADEON_CRT1_CRTC_SHIFT 9 -# define RADEON_TV1_CRTC_MASK (1 << 10) -# define RADEON_TV1_CRTC_SHIFT 10 -# define RADEON_DFP1_CRTC_MASK (1 << 11) -# define RADEON_DFP1_CRTC_SHIFT 11 -# define RADEON_CRT2_CRTC_MASK (1 << 12) -# define RADEON_CRT2_CRTC_SHIFT 12 -# define RADEON_CV1_CRTC_MASK (1 << 13) -# define RADEON_CV1_CRTC_SHIFT 13 -# define RADEON_DFP2_CRTC_MASK (1 << 14) -# define RADEON_DFP2_CRTC_SHIFT 14 -#define RADEON_BIOS_6_SCRATCH 0x0028 -# define RADEON_ACC_MODE_CHANGE (1 << 2) -# define RADEON_EXT_DESKTOP_MODE (1 << 3) -# define RADEON_LCD_DPMS_ON (1 << 20) -# define RADEON_CRT_DPMS_ON (1 << 21) -# define RADEON_TV_DPMS_ON (1 << 22) -# define RADEON_DFP_DPMS_ON (1 << 23) -# define RADEON_DPMS_MASK (3 << 24) -# define RADEON_DPMS_ON (0 << 24) -# define RADEON_DPMS_STANDBY (1 << 24) -# define RADEON_DPMS_SUSPEND (2 << 24) -# define RADEON_DPMS_OFF (3 << 24) -# define RADEON_SCREEN_BLANKING (1 << 26) -# define RADEON_DRIVER_CRITICAL (1 << 27) -# define RADEON_DISPLAY_SWITCHING_DIS (1 << 30) -#define RADEON_BIOS_7_SCRATCH 0x002c -# define RADEON_SYS_HOTKEY (1 << 10) -# define RADEON_DRV_LOADED (1 << 12) -#define RADEON_BIOS_ROM 0x0f30 /* PCI */ -#define RADEON_BIST 0x0f0f /* PCI */ -#define RADEON_BRUSH_DATA0 0x1480 -#define RADEON_BRUSH_DATA1 0x1484 -#define RADEON_BRUSH_DATA10 0x14a8 -#define RADEON_BRUSH_DATA11 0x14ac -#define RADEON_BRUSH_DATA12 0x14b0 -#define RADEON_BRUSH_DATA13 0x14b4 -#define RADEON_BRUSH_DATA14 0x14b8 -#define RADEON_BRUSH_DATA15 0x14bc -#define RADEON_BRUSH_DATA16 0x14c0 -#define RADEON_BRUSH_DATA17 0x14c4 -#define RADEON_BRUSH_DATA18 0x14c8 -#define RADEON_BRUSH_DATA19 0x14cc -#define RADEON_BRUSH_DATA2 0x1488 -#define RADEON_BRUSH_DATA20 0x14d0 -#define RADEON_BRUSH_DATA21 0x14d4 -#define RADEON_BRUSH_DATA22 0x14d8 -#define RADEON_BRUSH_DATA23 0x14dc -#define RADEON_BRUSH_DATA24 0x14e0 -#define RADEON_BRUSH_DATA25 0x14e4 -#define RADEON_BRUSH_DATA26 0x14e8 -#define RADEON_BRUSH_DATA27 0x14ec -#define RADEON_BRUSH_DATA28 0x14f0 -#define RADEON_BRUSH_DATA29 0x14f4 -#define RADEON_BRUSH_DATA3 0x148c -#define RADEON_BRUSH_DATA30 0x14f8 -#define RADEON_BRUSH_DATA31 0x14fc -#define RADEON_BRUSH_DATA32 0x1500 -#define RADEON_BRUSH_DATA33 0x1504 -#define RADEON_BRUSH_DATA34 0x1508 -#define RADEON_BRUSH_DATA35 0x150c -#define RADEON_BRUSH_DATA36 0x1510 -#define RADEON_BRUSH_DATA37 0x1514 -#define RADEON_BRUSH_DATA38 0x1518 -#define RADEON_BRUSH_DATA39 0x151c -#define RADEON_BRUSH_DATA4 0x1490 -#define RADEON_BRUSH_DATA40 0x1520 -#define RADEON_BRUSH_DATA41 0x1524 -#define RADEON_BRUSH_DATA42 0x1528 -#define RADEON_BRUSH_DATA43 0x152c -#define RADEON_BRUSH_DATA44 0x1530 -#define RADEON_BRUSH_DATA45 0x1534 -#define RADEON_BRUSH_DATA46 0x1538 -#define RADEON_BRUSH_DATA47 0x153c -#define RADEON_BRUSH_DATA48 0x1540 -#define RADEON_BRUSH_DATA49 0x1544 -#define RADEON_BRUSH_DATA5 0x1494 -#define RADEON_BRUSH_DATA50 0x1548 -#define RADEON_BRUSH_DATA51 0x154c -#define RADEON_BRUSH_DATA52 0x1550 -#define RADEON_BRUSH_DATA53 0x1554 -#define RADEON_BRUSH_DATA54 0x1558 -#define RADEON_BRUSH_DATA55 0x155c -#define RADEON_BRUSH_DATA56 0x1560 -#define RADEON_BRUSH_DATA57 0x1564 -#define RADEON_BRUSH_DATA58 0x1568 -#define RADEON_BRUSH_DATA59 0x156c -#define RADEON_BRUSH_DATA6 0x1498 -#define RADEON_BRUSH_DATA60 0x1570 -#define RADEON_BRUSH_DATA61 0x1574 -#define RADEON_BRUSH_DATA62 0x1578 -#define RADEON_BRUSH_DATA63 0x157c -#define RADEON_BRUSH_DATA7 0x149c -#define RADEON_BRUSH_DATA8 0x14a0 -#define RADEON_BRUSH_DATA9 0x14a4 -#define RADEON_BRUSH_SCALE 0x1470 -#define RADEON_BRUSH_Y_X 0x1474 -#define RADEON_BUS_CNTL 0x0030 -# define RADEON_BUS_MASTER_DIS (1 << 6) -# define RADEON_BUS_BIOS_DIS_ROM (1 << 12) -# define RADEON_BUS_RD_DISCARD_EN (1 << 24) -# define RADEON_BUS_RD_ABORT_EN (1 << 25) -# define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) -# define RADEON_BUS_WRT_BURST (1 << 29) -# define RADEON_BUS_READ_BURST (1 << 30) -#define RADEON_BUS_CNTL1 0x0034 -# define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) - -#define RADEON_CACHE_CNTL 0x1724 -#define RADEON_CACHE_LINE 0x0f0c /* PCI */ -#define RADEON_CAPABILITIES_ID 0x0f50 /* PCI */ -#define RADEON_CAPABILITIES_PTR 0x0f34 /* PCI */ -#define RADEON_CLK_PIN_CNTL 0x0001 /* PLL */ -# define RADEON_SCLK_DYN_START_CNTL (1 << 15) -#define RADEON_CLOCK_CNTL_DATA 0x000c -#define RADEON_CLOCK_CNTL_INDEX 0x0008 -# define RADEON_PLL_WR_EN (1 << 7) -# define RADEON_PLL_DIV_SEL (3 << 8) -# define RADEON_PLL2_DIV_SEL_MASK ~(3 << 8) -#define RADEON_CLK_PWRMGT_CNTL 0x0014 -# define RADEON_ENGIN_DYNCLK_MODE (1 << 12) -# define RADEON_ACTIVE_HILO_LAT_MASK (3 << 13) -# define RADEON_ACTIVE_HILO_LAT_SHIFT 13 -# define RADEON_DISP_DYN_STOP_LAT_MASK (1 << 12) -# define RADEON_MC_BUSY (1 << 16) -# define RADEON_DLL_READY (1 << 19) -# define RADEON_CG_NO1_DEBUG_0 (1 << 24) -# define RADEON_CG_NO1_DEBUG_MASK (0x1f << 24) -# define RADEON_DYN_STOP_MODE_MASK (7 << 21) -# define RADEON_TVPLL_PWRMGT_OFF (1 << 30) -# define RADEON_TVCLK_TURNOFF (1 << 31) -#define RADEON_PLL_PWRMGT_CNTL 0x0015 -# define RADEON_TCL_BYPASS_DISABLE (1 << 20) -#define RADEON_CLR_CMP_CLR_3D 0x1a24 -#define RADEON_CLR_CMP_CLR_DST 0x15c8 -#define RADEON_CLR_CMP_CLR_SRC 0x15c4 -#define RADEON_CLR_CMP_CNTL 0x15c0 -# define RADEON_SRC_CMP_EQ_COLOR (4 << 0) -# define RADEON_SRC_CMP_NEQ_COLOR (5 << 0) -# define RADEON_CLR_CMP_SRC_SOURCE (1 << 24) -#define RADEON_CLR_CMP_MASK 0x15cc -# define RADEON_CLR_CMP_MSK 0xffffffff -#define RADEON_CLR_CMP_MASK_3D 0x1A28 -#define RADEON_COMMAND 0x0f04 /* PCI */ -#define RADEON_COMPOSITE_SHADOW_ID 0x1a0c -#define RADEON_CONFIG_APER_0_BASE 0x0100 -#define RADEON_CONFIG_APER_1_BASE 0x0104 -#define RADEON_CONFIG_APER_SIZE 0x0108 -#define RADEON_CONFIG_BONDS 0x00e8 -#define RADEON_CONFIG_CNTL 0x00e0 -# define RADEON_CFG_ATI_REV_A11 (0 << 16) -# define RADEON_CFG_ATI_REV_A12 (1 << 16) -# define RADEON_CFG_ATI_REV_A13 (2 << 16) -# define RADEON_CFG_ATI_REV_ID_MASK (0xf << 16) -#define RADEON_CONFIG_MEMSIZE 0x00f8 -#define RADEON_CONFIG_MEMSIZE_EMBEDDED 0x0114 -#define RADEON_CONFIG_REG_1_BASE 0x010c -#define RADEON_CONFIG_REG_APER_SIZE 0x0110 -#define RADEON_CONFIG_XSTRAP 0x00e4 -#define RADEON_CONSTANT_COLOR_C 0x1d34 -# define RADEON_CONSTANT_COLOR_MASK 0x00ffffff -# define RADEON_CONSTANT_COLOR_ONE 0x00ffffff -# define RADEON_CONSTANT_COLOR_ZERO 0x00000000 -#define RADEON_CRC_CMDFIFO_ADDR 0x0740 -#define RADEON_CRC_CMDFIFO_DOUT 0x0744 -#define RADEON_GRPH_BUFFER_CNTL 0x02f0 -# define RADEON_GRPH_START_REQ_MASK (0x7f) -# define RADEON_GRPH_START_REQ_SHIFT 0 -# define RADEON_GRPH_STOP_REQ_MASK (0x7f<<8) -# define RADEON_GRPH_STOP_REQ_SHIFT 8 -# define RADEON_GRPH_CRITICAL_POINT_MASK (0x7f<<16) -# define RADEON_GRPH_CRITICAL_POINT_SHIFT 16 -# define RADEON_GRPH_CRITICAL_CNTL (1<<28) -# define RADEON_GRPH_BUFFER_SIZE (1<<29) -# define RADEON_GRPH_CRITICAL_AT_SOF (1<<30) -# define RADEON_GRPH_STOP_CNTL (1<<31) -#define RADEON_GRPH2_BUFFER_CNTL 0x03f0 -# define RADEON_GRPH2_START_REQ_MASK (0x7f) -# define RADEON_GRPH2_START_REQ_SHIFT 0 -# define RADEON_GRPH2_STOP_REQ_MASK (0x7f<<8) -# define RADEON_GRPH2_STOP_REQ_SHIFT 8 -# define RADEON_GRPH2_CRITICAL_POINT_MASK (0x7f<<16) -# define RADEON_GRPH2_CRITICAL_POINT_SHIFT 16 -# define RADEON_GRPH2_CRITICAL_CNTL (1<<28) -# define RADEON_GRPH2_BUFFER_SIZE (1<<29) -# define RADEON_GRPH2_CRITICAL_AT_SOF (1<<30) -# define RADEON_GRPH2_STOP_CNTL (1<<31) -#define RADEON_CRTC_CRNT_FRAME 0x0214 -#define RADEON_CRTC_EXT_CNTL 0x0054 -# define RADEON_CRTC_VGA_XOVERSCAN (1 << 0) -# define RADEON_VGA_ATI_LINEAR (1 << 3) -# define RADEON_XCRT_CNT_EN (1 << 6) -# define RADEON_CRTC_HSYNC_DIS (1 << 8) -# define RADEON_CRTC_VSYNC_DIS (1 << 9) -# define RADEON_CRTC_DISPLAY_DIS (1 << 10) -# define RADEON_CRTC_SYNC_TRISTAT (1 << 11) -# define RADEON_CRTC_CRT_ON (1 << 15) -#define RADEON_CRTC_EXT_CNTL_DPMS_BYTE 0x0055 -# define RADEON_CRTC_HSYNC_DIS_BYTE (1 << 0) -# define RADEON_CRTC_VSYNC_DIS_BYTE (1 << 1) -# define RADEON_CRTC_DISPLAY_DIS_BYTE (1 << 2) -#define RADEON_CRTC_GEN_CNTL 0x0050 -# define RADEON_CRTC_DBL_SCAN_EN (1 << 0) -# define RADEON_CRTC_INTERLACE_EN (1 << 1) -# define RADEON_CRTC_CSYNC_EN (1 << 4) -# define RADEON_CRTC_ICON_EN (1 << 15) -# define RADEON_CRTC_CUR_EN (1 << 16) -# define RADEON_CRTC_CUR_MODE_MASK (7 << 20) -# define RADEON_CRTC_EXT_DISP_EN (1 << 24) -# define RADEON_CRTC_EN (1 << 25) -# define RADEON_CRTC_DISP_REQ_EN_B (1 << 26) -#define RADEON_CRTC2_GEN_CNTL 0x03f8 -# define RADEON_CRTC2_DBL_SCAN_EN (1 << 0) -# define RADEON_CRTC2_INTERLACE_EN (1 << 1) -# define RADEON_CRTC2_SYNC_TRISTAT (1 << 4) -# define RADEON_CRTC2_HSYNC_TRISTAT (1 << 5) -# define RADEON_CRTC2_VSYNC_TRISTAT (1 << 6) -# define RADEON_CRTC2_CRT2_ON (1 << 7) -# define RADEON_CRTC2_PIX_WIDTH_SHIFT 8 -# define RADEON_CRTC2_PIX_WIDTH_MASK (0xf << 8) -# define RADEON_CRTC2_ICON_EN (1 << 15) -# define RADEON_CRTC2_CUR_EN (1 << 16) -# define RADEON_CRTC2_CUR_MODE_MASK (7 << 20) -# define RADEON_CRTC2_DISP_DIS (1 << 23) -# define RADEON_CRTC2_EN (1 << 25) -# define RADEON_CRTC2_DISP_REQ_EN_B (1 << 26) -# define RADEON_CRTC2_CSYNC_EN (1 << 27) -# define RADEON_CRTC2_HSYNC_DIS (1 << 28) -# define RADEON_CRTC2_VSYNC_DIS (1 << 29) -#define RADEON_CRTC_MORE_CNTL 0x27c -# define RADEON_CRTC_AUTO_HORZ_CENTER_EN (1<<2) -# define RADEON_CRTC_AUTO_VERT_CENTER_EN (1<<3) -# define RADEON_CRTC_H_CUTOFF_ACTIVE_EN (1<<4) -# define RADEON_CRTC_V_CUTOFF_ACTIVE_EN (1<<5) -#define RADEON_CRTC_GUI_TRIG_VLINE 0x0218 -#define RADEON_CRTC_H_SYNC_STRT_WID 0x0204 -# define RADEON_CRTC_H_SYNC_STRT_PIX (0x07 << 0) -# define RADEON_CRTC_H_SYNC_STRT_CHAR (0x3ff << 3) -# define RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT 3 -# define RADEON_CRTC_H_SYNC_WID (0x3f << 16) -# define RADEON_CRTC_H_SYNC_WID_SHIFT 16 -# define RADEON_CRTC_H_SYNC_POL (1 << 23) -#define RADEON_CRTC2_H_SYNC_STRT_WID 0x0304 -# define RADEON_CRTC2_H_SYNC_STRT_PIX (0x07 << 0) -# define RADEON_CRTC2_H_SYNC_STRT_CHAR (0x3ff << 3) -# define RADEON_CRTC2_H_SYNC_STRT_CHAR_SHIFT 3 -# define RADEON_CRTC2_H_SYNC_WID (0x3f << 16) -# define RADEON_CRTC2_H_SYNC_WID_SHIFT 16 -# define RADEON_CRTC2_H_SYNC_POL (1 << 23) -#define RADEON_CRTC_H_TOTAL_DISP 0x0200 -# define RADEON_CRTC_H_TOTAL (0x03ff << 0) -# define RADEON_CRTC_H_TOTAL_SHIFT 0 -# define RADEON_CRTC_H_DISP (0x01ff << 16) -# define RADEON_CRTC_H_DISP_SHIFT 16 -#define RADEON_CRTC2_H_TOTAL_DISP 0x0300 -# define RADEON_CRTC2_H_TOTAL (0x03ff << 0) -# define RADEON_CRTC2_H_TOTAL_SHIFT 0 -# define RADEON_CRTC2_H_DISP (0x01ff << 16) -# define RADEON_CRTC2_H_DISP_SHIFT 16 - -#define RADEON_CRTC_OFFSET_RIGHT 0x0220 -#define RADEON_CRTC_OFFSET 0x0224 -# define RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET (1<<30) -# define RADEON_CRTC_OFFSET__OFFSET_LOCK (1<<31) - -#define RADEON_CRTC2_OFFSET 0x0324 -# define RADEON_CRTC2_OFFSET__GUI_TRIG_OFFSET (1<<30) -# define RADEON_CRTC2_OFFSET__OFFSET_LOCK (1<<31) -#define RADEON_CRTC_OFFSET_CNTL 0x0228 -# define RADEON_CRTC_TILE_LINE_SHIFT 0 -# define RADEON_CRTC_TILE_LINE_RIGHT_SHIFT 4 -# define R300_CRTC_X_Y_MODE_EN_RIGHT (1 << 6) -# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_MASK (3 << 7) -# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_AUTO (0 << 7) -# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_SINGLE (1 << 7) -# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_DOUBLE (2 << 7) -# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_DIS (3 << 7) -# define R300_CRTC_X_Y_MODE_EN (1 << 9) -# define R300_CRTC_MICRO_TILE_BUFFER_MASK (3 << 10) -# define R300_CRTC_MICRO_TILE_BUFFER_AUTO (0 << 10) -# define R300_CRTC_MICRO_TILE_BUFFER_SINGLE (1 << 10) -# define R300_CRTC_MICRO_TILE_BUFFER_DOUBLE (2 << 10) -# define R300_CRTC_MICRO_TILE_BUFFER_DIS (3 << 10) -# define R300_CRTC_MICRO_TILE_EN_RIGHT (1 << 12) -# define R300_CRTC_MICRO_TILE_EN (1 << 13) -# define R300_CRTC_MACRO_TILE_EN_RIGHT (1 << 14) -# define R300_CRTC_MACRO_TILE_EN (1 << 15) -# define RADEON_CRTC_TILE_EN_RIGHT (1 << 14) -# define RADEON_CRTC_TILE_EN (1 << 15) -# define RADEON_CRTC_OFFSET_FLIP_CNTL (1 << 16) -# define RADEON_CRTC_STEREO_OFFSET_EN (1 << 17) - -#define R300_CRTC_TILE_X0_Y0 0x0350 -#define R300_CRTC2_TILE_X0_Y0 0x0358 - -#define RADEON_CRTC2_OFFSET_CNTL 0x0328 -# define RADEON_CRTC2_OFFSET_FLIP_CNTL (1 << 16) -# define RADEON_CRTC2_TILE_EN (1 << 15) -#define RADEON_CRTC_PITCH 0x022c -# define RADEON_CRTC_PITCH__SHIFT 0 -# define RADEON_CRTC_PITCH__RIGHT_SHIFT 16 - -#define RADEON_CRTC2_PITCH 0x032c -#define RADEON_CRTC_STATUS 0x005c -# define RADEON_CRTC_VBLANK_SAVE (1 << 1) -# define RADEON_CRTC_VBLANK_SAVE_CLEAR (1 << 1) -#define RADEON_CRTC2_STATUS 0x03fc -# define RADEON_CRTC2_VBLANK_SAVE (1 << 1) -# define RADEON_CRTC2_VBLANK_SAVE_CLEAR (1 << 1) -#define RADEON_CRTC_V_SYNC_STRT_WID 0x020c -# define RADEON_CRTC_V_SYNC_STRT (0x7ff << 0) -# define RADEON_CRTC_V_SYNC_STRT_SHIFT 0 -# define RADEON_CRTC_V_SYNC_WID (0x1f << 16) -# define RADEON_CRTC_V_SYNC_WID_SHIFT 16 -# define RADEON_CRTC_V_SYNC_POL (1 << 23) -#define RADEON_CRTC2_V_SYNC_STRT_WID 0x030c -# define RADEON_CRTC2_V_SYNC_STRT (0x7ff << 0) -# define RADEON_CRTC2_V_SYNC_STRT_SHIFT 0 -# define RADEON_CRTC2_V_SYNC_WID (0x1f << 16) -# define RADEON_CRTC2_V_SYNC_WID_SHIFT 16 -# define RADEON_CRTC2_V_SYNC_POL (1 << 23) -#define RADEON_CRTC_V_TOTAL_DISP 0x0208 -# define RADEON_CRTC_V_TOTAL (0x07ff << 0) -# define RADEON_CRTC_V_TOTAL_SHIFT 0 -# define RADEON_CRTC_V_DISP (0x07ff << 16) -# define RADEON_CRTC_V_DISP_SHIFT 16 -#define RADEON_CRTC2_V_TOTAL_DISP 0x0308 -# define RADEON_CRTC2_V_TOTAL (0x07ff << 0) -# define RADEON_CRTC2_V_TOTAL_SHIFT 0 -# define RADEON_CRTC2_V_DISP (0x07ff << 16) -# define RADEON_CRTC2_V_DISP_SHIFT 16 -#define RADEON_CRTC_VLINE_CRNT_VLINE 0x0210 -# define RADEON_CRTC_CRNT_VLINE_MASK (0x7ff << 16) -#define RADEON_CRTC2_CRNT_FRAME 0x0314 -#define RADEON_CRTC2_GUI_TRIG_VLINE 0x0318 -#define RADEON_CRTC2_STATUS 0x03fc -#define RADEON_CRTC2_VLINE_CRNT_VLINE 0x0310 -#define RADEON_CRTC8_DATA 0x03d5 /* VGA, 0x3b5 */ -#define RADEON_CRTC8_IDX 0x03d4 /* VGA, 0x3b4 */ -#define RADEON_CUR_CLR0 0x026c -#define RADEON_CUR_CLR1 0x0270 -#define RADEON_CUR_HORZ_VERT_OFF 0x0268 -#define RADEON_CUR_HORZ_VERT_POSN 0x0264 -#define RADEON_CUR_OFFSET 0x0260 -# define RADEON_CUR_LOCK (1 << 31) -#define RADEON_CUR2_CLR0 0x036c -#define RADEON_CUR2_CLR1 0x0370 -#define RADEON_CUR2_HORZ_VERT_OFF 0x0368 -#define RADEON_CUR2_HORZ_VERT_POSN 0x0364 -#define RADEON_CUR2_OFFSET 0x0360 -# define RADEON_CUR2_LOCK (1 << 31) - -#define RADEON_DAC_CNTL 0x0058 -# define RADEON_DAC_RANGE_CNTL (3 << 0) -# define RADEON_DAC_RANGE_CNTL_PS2 (2 << 0) -# define RADEON_DAC_RANGE_CNTL_MASK 0x03 -# define RADEON_DAC_BLANKING (1 << 2) -# define RADEON_DAC_CMP_EN (1 << 3) -# define RADEON_DAC_CMP_OUTPUT (1 << 7) -# define RADEON_DAC_8BIT_EN (1 << 8) -# define RADEON_DAC_TVO_EN (1 << 10) -# define RADEON_DAC_VGA_ADR_EN (1 << 13) -# define RADEON_DAC_PDWN (1 << 15) -# define RADEON_DAC_MASK_ALL (0xff << 24) -#define RADEON_DAC_CNTL2 0x007c -# define RADEON_DAC2_TV_CLK_SEL (0 << 1) -# define RADEON_DAC2_DAC_CLK_SEL (1 << 0) -# define RADEON_DAC2_DAC2_CLK_SEL (1 << 1) -# define RADEON_DAC2_PALETTE_ACC_CTL (1 << 5) -# define RADEON_DAC2_CMP_EN (1 << 7) -# define RADEON_DAC2_CMP_OUT_R (1 << 8) -# define RADEON_DAC2_CMP_OUT_G (1 << 9) -# define RADEON_DAC2_CMP_OUT_B (1 << 10) -# define RADEON_DAC2_CMP_OUTPUT (1 << 11) -#define RADEON_DAC_EXT_CNTL 0x0280 -# define RADEON_DAC2_FORCE_BLANK_OFF_EN (1 << 0) -# define RADEON_DAC2_FORCE_DATA_EN (1 << 1) -# define RADEON_DAC_FORCE_BLANK_OFF_EN (1 << 4) -# define RADEON_DAC_FORCE_DATA_EN (1 << 5) -# define RADEON_DAC_FORCE_DATA_SEL_MASK (3 << 6) -# define RADEON_DAC_FORCE_DATA_SEL_R (0 << 6) -# define RADEON_DAC_FORCE_DATA_SEL_G (1 << 6) -# define RADEON_DAC_FORCE_DATA_SEL_B (2 << 6) -# define RADEON_DAC_FORCE_DATA_SEL_RGB (3 << 6) -# define RADEON_DAC_FORCE_DATA_MASK 0x0003ff00 -# define RADEON_DAC_FORCE_DATA_SHIFT 8 -#define RADEON_DAC_MACRO_CNTL 0x0d04 -# define RADEON_DAC_PDWN_R (1 << 16) -# define RADEON_DAC_PDWN_G (1 << 17) -# define RADEON_DAC_PDWN_B (1 << 18) -#define RADEON_TV_DAC_CNTL 0x088c -# define RADEON_TV_DAC_NBLANK (1 << 0) -# define RADEON_TV_DAC_NHOLD (1 << 1) -# define RADEON_TV_DAC_PEDESTAL (1 << 2) -# define RADEON_TV_MONITOR_DETECT_EN (1 << 4) -# define RADEON_TV_DAC_CMPOUT (1 << 5) -# define RADEON_TV_DAC_STD_MASK (3 << 8) -# define RADEON_TV_DAC_STD_PAL (0 << 8) -# define RADEON_TV_DAC_STD_NTSC (1 << 8) -# define RADEON_TV_DAC_STD_PS2 (2 << 8) -# define RADEON_TV_DAC_STD_RS343 (3 << 8) -# define RADEON_TV_DAC_BGSLEEP (1 << 6) -# define RADEON_TV_DAC_BGADJ_MASK (0xf << 16) -# define RADEON_TV_DAC_BGADJ_SHIFT 16 -# define RADEON_TV_DAC_DACADJ_MASK (0xf << 20) -# define RADEON_TV_DAC_DACADJ_SHIFT 20 -# define RADEON_TV_DAC_RDACPD (1 << 24) -# define RADEON_TV_DAC_GDACPD (1 << 25) -# define RADEON_TV_DAC_BDACPD (1 << 26) -# define RADEON_TV_DAC_RDACDET (1 << 29) -# define RADEON_TV_DAC_GDACDET (1 << 30) -# define RADEON_TV_DAC_BDACDET (1 << 31) -# define R420_TV_DAC_DACADJ_MASK (0x1f << 20) -# define R420_TV_DAC_RDACPD (1 << 25) -# define R420_TV_DAC_GDACPD (1 << 26) -# define R420_TV_DAC_BDACPD (1 << 27) -# define R420_TV_DAC_TVENABLE (1 << 28) -#define RADEON_DISP_HW_DEBUG 0x0d14 -# define RADEON_CRT2_DISP1_SEL (1 << 5) -#define RADEON_DISP_OUTPUT_CNTL 0x0d64 -# define RADEON_DISP_DAC_SOURCE_MASK 0x03 -# define RADEON_DISP_DAC2_SOURCE_MASK 0x0c -# define RADEON_DISP_DAC_SOURCE_CRTC2 0x01 -# define RADEON_DISP_DAC_SOURCE_RMX 0x02 -# define RADEON_DISP_DAC_SOURCE_LTU 0x03 -# define RADEON_DISP_DAC2_SOURCE_CRTC2 0x04 -# define RADEON_DISP_TVDAC_SOURCE_MASK (0x03 << 2) -# define RADEON_DISP_TVDAC_SOURCE_CRTC 0x0 -# define RADEON_DISP_TVDAC_SOURCE_CRTC2 (0x01 << 2) -# define RADEON_DISP_TVDAC_SOURCE_RMX (0x02 << 2) -# define RADEON_DISP_TVDAC_SOURCE_LTU (0x03 << 2) -# define RADEON_DISP_TRANS_MATRIX_MASK (0x03 << 4) -# define RADEON_DISP_TRANS_MATRIX_ALPHA_MSB (0x00 << 4) -# define RADEON_DISP_TRANS_MATRIX_GRAPHICS (0x01 << 4) -# define RADEON_DISP_TRANS_MATRIX_VIDEO (0x02 << 4) -# define RADEON_DISP_TV_SOURCE_CRTC (1 << 16) /* crtc1 or crtc2 */ -# define RADEON_DISP_TV_SOURCE_LTU (0 << 16) /* linear transform unit */ -#define RADEON_DISP_TV_OUT_CNTL 0x0d6c -# define RADEON_DISP_TV_PATH_SRC_CRTC2 (1 << 16) -# define RADEON_DISP_TV_PATH_SRC_CRTC1 (0 << 16) -#define RADEON_DAC_CRC_SIG 0x02cc -#define RADEON_DAC_DATA 0x03c9 /* VGA */ -#define RADEON_DAC_MASK 0x03c6 /* VGA */ -#define RADEON_DAC_R_INDEX 0x03c7 /* VGA */ -#define RADEON_DAC_W_INDEX 0x03c8 /* VGA */ -#define RADEON_DDA_CONFIG 0x02e0 -#define RADEON_DDA_ON_OFF 0x02e4 -#define RADEON_DEFAULT_OFFSET 0x16e0 -#define RADEON_DEFAULT_PITCH 0x16e4 -#define RADEON_DEFAULT_SC_BOTTOM_RIGHT 0x16e8 -# define RADEON_DEFAULT_SC_RIGHT_MAX (0x1fff << 0) -# define RADEON_DEFAULT_SC_BOTTOM_MAX (0x1fff << 16) -#define RADEON_DESTINATION_3D_CLR_CMP_VAL 0x1820 -#define RADEON_DESTINATION_3D_CLR_CMP_MSK 0x1824 -#define RADEON_DEVICE_ID 0x0f02 /* PCI */ -#define RADEON_DISP_MISC_CNTL 0x0d00 -# define RADEON_SOFT_RESET_GRPH_PP (1 << 0) -#define RADEON_DISP_MERGE_CNTL 0x0d60 -# define RADEON_DISP_ALPHA_MODE_MASK 0x03 -# define RADEON_DISP_ALPHA_MODE_KEY 0 -# define RADEON_DISP_ALPHA_MODE_PER_PIXEL 1 -# define RADEON_DISP_ALPHA_MODE_GLOBAL 2 -# define RADEON_DISP_RGB_OFFSET_EN (1 << 8) -# define RADEON_DISP_GRPH_ALPHA_MASK (0xff << 16) -# define RADEON_DISP_OV0_ALPHA_MASK (0xff << 24) -# define RADEON_DISP_LIN_TRANS_BYPASS (0x01 << 9) -#define RADEON_DISP2_MERGE_CNTL 0x0d68 -# define RADEON_DISP2_RGB_OFFSET_EN (1 << 8) -#define RADEON_DISP_LIN_TRANS_GRPH_A 0x0d80 -#define RADEON_DISP_LIN_TRANS_GRPH_B 0x0d84 -#define RADEON_DISP_LIN_TRANS_GRPH_C 0x0d88 -#define RADEON_DISP_LIN_TRANS_GRPH_D 0x0d8c -#define RADEON_DISP_LIN_TRANS_GRPH_E 0x0d90 -#define RADEON_DISP_LIN_TRANS_GRPH_F 0x0d98 -#define RADEON_DP_BRUSH_BKGD_CLR 0x1478 -#define RADEON_DP_BRUSH_FRGD_CLR 0x147c -#define RADEON_DP_CNTL 0x16c0 -# define RADEON_DST_X_LEFT_TO_RIGHT (1 << 0) -# define RADEON_DST_Y_TOP_TO_BOTTOM (1 << 1) -# define RADEON_DP_DST_TILE_LINEAR (0 << 3) -# define RADEON_DP_DST_TILE_MACRO (1 << 3) -# define RADEON_DP_DST_TILE_MICRO (2 << 3) -# define RADEON_DP_DST_TILE_BOTH (3 << 3) -#define RADEON_DP_CNTL_XDIR_YDIR_YMAJOR 0x16d0 -# define RADEON_DST_Y_MAJOR (1 << 2) -# define RADEON_DST_Y_DIR_TOP_TO_BOTTOM (1 << 15) -# define RADEON_DST_X_DIR_LEFT_TO_RIGHT (1 << 31) -#define RADEON_DP_DATATYPE 0x16c4 -# define RADEON_HOST_BIG_ENDIAN_EN (1 << 29) -#define RADEON_DP_GUI_MASTER_CNTL 0x146c -# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) -# define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1) -# define RADEON_GMC_SRC_CLIPPING (1 << 2) -# define RADEON_GMC_DST_CLIPPING (1 << 3) -# define RADEON_GMC_BRUSH_DATATYPE_MASK (0x0f << 4) -# define RADEON_GMC_BRUSH_8X8_MONO_FG_BG (0 << 4) -# define RADEON_GMC_BRUSH_8X8_MONO_FG_LA (1 << 4) -# define RADEON_GMC_BRUSH_1X8_MONO_FG_BG (4 << 4) -# define RADEON_GMC_BRUSH_1X8_MONO_FG_LA (5 << 4) -# define RADEON_GMC_BRUSH_32x1_MONO_FG_BG (6 << 4) -# define RADEON_GMC_BRUSH_32x1_MONO_FG_LA (7 << 4) -# define RADEON_GMC_BRUSH_32x32_MONO_FG_BG (8 << 4) -# define RADEON_GMC_BRUSH_32x32_MONO_FG_LA (9 << 4) -# define RADEON_GMC_BRUSH_8x8_COLOR (10 << 4) -# define RADEON_GMC_BRUSH_1X8_COLOR (12 << 4) -# define RADEON_GMC_BRUSH_SOLID_COLOR (13 << 4) -# define RADEON_GMC_BRUSH_NONE (15 << 4) -# define RADEON_GMC_DST_8BPP_CI (2 << 8) -# define RADEON_GMC_DST_15BPP (3 << 8) -# define RADEON_GMC_DST_16BPP (4 << 8) -# define RADEON_GMC_DST_24BPP (5 << 8) -# define RADEON_GMC_DST_32BPP (6 << 8) -# define RADEON_GMC_DST_8BPP_RGB (7 << 8) -# define RADEON_GMC_DST_Y8 (8 << 8) -# define RADEON_GMC_DST_RGB8 (9 << 8) -# define RADEON_GMC_DST_VYUY (11 << 8) -# define RADEON_GMC_DST_YVYU (12 << 8) -# define RADEON_GMC_DST_AYUV444 (14 << 8) -# define RADEON_GMC_DST_ARGB4444 (15 << 8) -# define RADEON_GMC_DST_DATATYPE_MASK (0x0f << 8) -# define RADEON_GMC_DST_DATATYPE_SHIFT 8 -# define RADEON_GMC_SRC_DATATYPE_MASK (3 << 12) -# define RADEON_GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12) -# define RADEON_GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12) -# define RADEON_GMC_SRC_DATATYPE_COLOR (3 << 12) -# define RADEON_GMC_BYTE_PIX_ORDER (1 << 14) -# define RADEON_GMC_BYTE_MSB_TO_LSB (0 << 14) -# define RADEON_GMC_BYTE_LSB_TO_MSB (1 << 14) -# define RADEON_GMC_CONVERSION_TEMP (1 << 15) -# define RADEON_GMC_CONVERSION_TEMP_6500 (0 << 15) -# define RADEON_GMC_CONVERSION_TEMP_9300 (1 << 15) -# define RADEON_GMC_ROP3_MASK (0xff << 16) -# define RADEON_DP_SRC_SOURCE_MASK (7 << 24) -# define RADEON_DP_SRC_SOURCE_MEMORY (2 << 24) -# define RADEON_DP_SRC_SOURCE_HOST_DATA (3 << 24) -# define RADEON_GMC_3D_FCN_EN (1 << 27) -# define RADEON_GMC_CLR_CMP_CNTL_DIS (1 << 28) -# define RADEON_GMC_AUX_CLIP_DIS (1 << 29) -# define RADEON_GMC_WR_MSK_DIS (1 << 30) -# define RADEON_GMC_LD_BRUSH_Y_X (1 << 31) -# define RADEON_ROP3_ZERO 0x00000000 -# define RADEON_ROP3_DSa 0x00880000 -# define RADEON_ROP3_SDna 0x00440000 -# define RADEON_ROP3_S 0x00cc0000 -# define RADEON_ROP3_DSna 0x00220000 -# define RADEON_ROP3_D 0x00aa0000 -# define RADEON_ROP3_DSx 0x00660000 -# define RADEON_ROP3_DSo 0x00ee0000 -# define RADEON_ROP3_DSon 0x00110000 -# define RADEON_ROP3_DSxn 0x00990000 -# define RADEON_ROP3_Dn 0x00550000 -# define RADEON_ROP3_SDno 0x00dd0000 -# define RADEON_ROP3_Sn 0x00330000 -# define RADEON_ROP3_DSno 0x00bb0000 -# define RADEON_ROP3_DSan 0x00770000 -# define RADEON_ROP3_ONE 0x00ff0000 -# define RADEON_ROP3_DPa 0x00a00000 -# define RADEON_ROP3_PDna 0x00500000 -# define RADEON_ROP3_P 0x00f00000 -# define RADEON_ROP3_DPna 0x000a0000 -# define RADEON_ROP3_D 0x00aa0000 -# define RADEON_ROP3_DPx 0x005a0000 -# define RADEON_ROP3_DPo 0x00fa0000 -# define RADEON_ROP3_DPon 0x00050000 -# define RADEON_ROP3_PDxn 0x00a50000 -# define RADEON_ROP3_PDno 0x00f50000 -# define RADEON_ROP3_Pn 0x000f0000 -# define RADEON_ROP3_DPno 0x00af0000 -# define RADEON_ROP3_DPan 0x005f0000 -#define RADEON_DP_GUI_MASTER_CNTL_C 0x1c84 -#define RADEON_DP_MIX 0x16c8 -#define RADEON_DP_SRC_BKGD_CLR 0x15dc -#define RADEON_DP_SRC_FRGD_CLR 0x15d8 -#define RADEON_DP_WRITE_MASK 0x16cc -#define RADEON_DST_BRES_DEC 0x1630 -#define RADEON_DST_BRES_ERR 0x1628 -#define RADEON_DST_BRES_INC 0x162c -#define RADEON_DST_BRES_LNTH 0x1634 -#define RADEON_DST_BRES_LNTH_SUB 0x1638 -#define RADEON_DST_HEIGHT 0x1410 -#define RADEON_DST_HEIGHT_WIDTH 0x143c -#define RADEON_DST_HEIGHT_WIDTH_8 0x158c -#define RADEON_DST_HEIGHT_WIDTH_BW 0x15b4 -#define RADEON_DST_HEIGHT_Y 0x15a0 -#define RADEON_DST_LINE_START 0x1600 -#define RADEON_DST_LINE_END 0x1604 -#define RADEON_DST_LINE_PATCOUNT 0x1608 -# define RADEON_BRES_CNTL_SHIFT 8 -#define RADEON_DST_OFFSET 0x1404 -#define RADEON_DST_PITCH 0x1408 -#define RADEON_DST_PITCH_OFFSET 0x142c -#define RADEON_DST_PITCH_OFFSET_C 0x1c80 -# define RADEON_PITCH_SHIFT 21 -# define RADEON_DST_TILE_LINEAR (0 << 30) -# define RADEON_DST_TILE_MACRO (1 << 30) -# define RADEON_DST_TILE_MICRO (2 << 30) -# define RADEON_DST_TILE_BOTH (3 << 30) -#define RADEON_DST_WIDTH 0x140c -#define RADEON_DST_WIDTH_HEIGHT 0x1598 -#define RADEON_DST_WIDTH_X 0x1588 -#define RADEON_DST_WIDTH_X_INCY 0x159c -#define RADEON_DST_X 0x141c -#define RADEON_DST_X_SUB 0x15a4 -#define RADEON_DST_X_Y 0x1594 -#define RADEON_DST_Y 0x1420 -#define RADEON_DST_Y_SUB 0x15a8 -#define RADEON_DST_Y_X 0x1438 - -#define RADEON_FCP_CNTL 0x0910 -# define RADEON_FCP0_SRC_PCICLK 0 -# define RADEON_FCP0_SRC_PCLK 1 -# define RADEON_FCP0_SRC_PCLKb 2 -# define RADEON_FCP0_SRC_HREF 3 -# define RADEON_FCP0_SRC_GND 4 -# define RADEON_FCP0_SRC_HREFb 5 -#define RADEON_FLUSH_1 0x1704 -#define RADEON_FLUSH_2 0x1708 -#define RADEON_FLUSH_3 0x170c -#define RADEON_FLUSH_4 0x1710 -#define RADEON_FLUSH_5 0x1714 -#define RADEON_FLUSH_6 0x1718 -#define RADEON_FLUSH_7 0x171c -#define RADEON_FOG_3D_TABLE_START 0x1810 -#define RADEON_FOG_3D_TABLE_END 0x1814 -#define RADEON_FOG_3D_TABLE_DENSITY 0x181c -#define RADEON_FOG_TABLE_INDEX 0x1a14 -#define RADEON_FOG_TABLE_DATA 0x1a18 -#define RADEON_FP_CRTC_H_TOTAL_DISP 0x0250 -#define RADEON_FP_CRTC_V_TOTAL_DISP 0x0254 -# define RADEON_FP_CRTC_H_TOTAL_MASK 0x000003ff -# define RADEON_FP_CRTC_H_DISP_MASK 0x01ff0000 -# define RADEON_FP_CRTC_V_TOTAL_MASK 0x00000fff -# define RADEON_FP_CRTC_V_DISP_MASK 0x0fff0000 -# define RADEON_FP_H_SYNC_STRT_CHAR_MASK 0x00001ff8 -# define RADEON_FP_H_SYNC_WID_MASK 0x003f0000 -# define RADEON_FP_V_SYNC_STRT_MASK 0x00000fff -# define RADEON_FP_V_SYNC_WID_MASK 0x001f0000 -# define RADEON_FP_CRTC_H_TOTAL_SHIFT 0x00000000 -# define RADEON_FP_CRTC_H_DISP_SHIFT 0x00000010 -# define RADEON_FP_CRTC_V_TOTAL_SHIFT 0x00000000 -# define RADEON_FP_CRTC_V_DISP_SHIFT 0x00000010 -# define RADEON_FP_H_SYNC_STRT_CHAR_SHIFT 0x00000003 -# define RADEON_FP_H_SYNC_WID_SHIFT 0x00000010 -# define RADEON_FP_V_SYNC_STRT_SHIFT 0x00000000 -# define RADEON_FP_V_SYNC_WID_SHIFT 0x00000010 -#define RADEON_FP_GEN_CNTL 0x0284 -# define RADEON_FP_FPON (1 << 0) -# define RADEON_FP_BLANK_EN (1 << 1) -# define RADEON_FP_TMDS_EN (1 << 2) -# define RADEON_FP_PANEL_FORMAT (1 << 3) -# define RADEON_FP_EN_TMDS (1 << 7) -# define RADEON_FP_DETECT_SENSE (1 << 8) -# define R200_FP_SOURCE_SEL_MASK (3 << 10) -# define R200_FP_SOURCE_SEL_CRTC1 (0 << 10) -# define R200_FP_SOURCE_SEL_CRTC2 (1 << 10) -# define R200_FP_SOURCE_SEL_RMX (2 << 10) -# define R200_FP_SOURCE_SEL_TRANS (3 << 10) -# define RADEON_FP_SEL_CRTC1 (0 << 13) -# define RADEON_FP_SEL_CRTC2 (1 << 13) -# define RADEON_FP_CRTC_DONT_SHADOW_HPAR (1 << 15) -# define RADEON_FP_CRTC_DONT_SHADOW_VPAR (1 << 16) -# define RADEON_FP_CRTC_DONT_SHADOW_HEND (1 << 17) -# define RADEON_FP_CRTC_USE_SHADOW_VEND (1 << 18) -# define RADEON_FP_RMX_HVSYNC_CONTROL_EN (1 << 20) -# define RADEON_FP_DFP_SYNC_SEL (1 << 21) -# define RADEON_FP_CRTC_LOCK_8DOT (1 << 22) -# define RADEON_FP_CRT_SYNC_SEL (1 << 23) -# define RADEON_FP_USE_SHADOW_EN (1 << 24) -# define RADEON_FP_CRT_SYNC_ALT (1 << 26) -#define RADEON_FP2_GEN_CNTL 0x0288 -# define RADEON_FP2_BLANK_EN (1 << 1) -# define RADEON_FP2_ON (1 << 2) -# define RADEON_FP2_PANEL_FORMAT (1 << 3) -# define RADEON_FP2_DETECT_SENSE (1 << 8) -# define R200_FP2_SOURCE_SEL_MASK (3 << 10) -# define R200_FP2_SOURCE_SEL_CRTC1 (0 << 10) -# define R200_FP2_SOURCE_SEL_CRTC2 (1 << 10) -# define R200_FP2_SOURCE_SEL_RMX (2 << 10) -# define R200_FP2_SOURCE_SEL_TRANS_UNIT (3 << 10) -# define RADEON_FP2_SRC_SEL_MASK (3 << 13) -# define RADEON_FP2_SRC_SEL_CRTC2 (1 << 13) -# define RADEON_FP2_FP_POL (1 << 16) -# define RADEON_FP2_LP_POL (1 << 17) -# define RADEON_FP2_SCK_POL (1 << 18) -# define RADEON_FP2_LCD_CNTL_MASK (7 << 19) -# define RADEON_FP2_PAD_FLOP_EN (1 << 22) -# define RADEON_FP2_CRC_EN (1 << 23) -# define RADEON_FP2_CRC_READ_EN (1 << 24) -# define RADEON_FP2_DVO_EN (1 << 25) -# define RADEON_FP2_DVO_RATE_SEL_SDR (1 << 26) -# define R200_FP2_DVO_RATE_SEL_SDR (1 << 27) -# define R300_FP2_DVO_CLOCK_MODE_SINGLE (1 << 28) -# define R300_FP2_DVO_DUAL_CHANNEL_EN (1 << 29) -#define RADEON_FP_H_SYNC_STRT_WID 0x02c4 -#define RADEON_FP_H2_SYNC_STRT_WID 0x03c4 -#define RADEON_FP_HORZ_STRETCH 0x028c -#define RADEON_FP_HORZ2_STRETCH 0x038c -# define RADEON_HORZ_STRETCH_RATIO_MASK 0xffff -# define RADEON_HORZ_STRETCH_RATIO_MAX 4096 -# define RADEON_HORZ_PANEL_SIZE (0x1ff << 16) -# define RADEON_HORZ_PANEL_SHIFT 16 -# define RADEON_HORZ_STRETCH_PIXREP (0 << 25) -# define RADEON_HORZ_STRETCH_BLEND (1 << 26) -# define RADEON_HORZ_STRETCH_ENABLE (1 << 25) -# define RADEON_HORZ_AUTO_RATIO (1 << 27) -# define RADEON_HORZ_FP_LOOP_STRETCH (0x7 << 28) -# define RADEON_HORZ_AUTO_RATIO_INC (1 << 31) -#define RADEON_FP_HORZ_VERT_ACTIVE 0x0278 -#define RADEON_FP_V_SYNC_STRT_WID 0x02c8 -#define RADEON_FP_VERT_STRETCH 0x0290 -#define RADEON_FP_V2_SYNC_STRT_WID 0x03c8 -#define RADEON_FP_VERT2_STRETCH 0x0390 -# define RADEON_VERT_PANEL_SIZE (0xfff << 12) -# define RADEON_VERT_PANEL_SHIFT 12 -# define RADEON_VERT_STRETCH_RATIO_MASK 0xfff -# define RADEON_VERT_STRETCH_RATIO_SHIFT 0 -# define RADEON_VERT_STRETCH_RATIO_MAX 4096 -# define RADEON_VERT_STRETCH_ENABLE (1 << 25) -# define RADEON_VERT_STRETCH_LINEREP (0 << 26) -# define RADEON_VERT_STRETCH_BLEND (1 << 26) -# define RADEON_VERT_AUTO_RATIO_EN (1 << 27) -# define RADEON_VERT_AUTO_RATIO_INC (1 << 31) -# define RADEON_VERT_STRETCH_RESERVED 0x71000000 -#define RS400_FP_2ND_GEN_CNTL 0x0384 -# define RS400_FP_2ND_ON (1 << 0) -# define RS400_FP_2ND_BLANK_EN (1 << 1) -# define RS400_TMDS_2ND_EN (1 << 2) -# define RS400_PANEL_FORMAT_2ND (1 << 3) -# define RS400_FP_2ND_EN_TMDS (1 << 7) -# define RS400_FP_2ND_DETECT_SENSE (1 << 8) -# define RS400_FP_2ND_SOURCE_SEL_MASK (3 << 10) -# define RS400_FP_2ND_SOURCE_SEL_CRTC1 (0 << 10) -# define RS400_FP_2ND_SOURCE_SEL_CRTC2 (1 << 10) -# define RS400_FP_2ND_SOURCE_SEL_RMX (2 << 10) -# define RS400_FP_2ND_DETECT_EN (1 << 12) -# define RS400_HPD_2ND_SEL (1 << 13) -#define RS400_FP2_2_GEN_CNTL 0x0388 -# define RS400_FP2_2_BLANK_EN (1 << 1) -# define RS400_FP2_2_ON (1 << 2) -# define RS400_FP2_2_PANEL_FORMAT (1 << 3) -# define RS400_FP2_2_DETECT_SENSE (1 << 8) -# define RS400_FP2_2_SOURCE_SEL_MASK (3 << 10) -# define RS400_FP2_2_SOURCE_SEL_CRTC1 (0 << 10) -# define RS400_FP2_2_SOURCE_SEL_CRTC2 (1 << 10) -# define RS400_FP2_2_SOURCE_SEL_RMX (2 << 10) -# define RS400_FP2_2_DVO2_EN (1 << 25) -#define RS400_TMDS2_CNTL 0x0394 -#define RS400_TMDS2_TRANSMITTER_CNTL 0x03a4 -# define RS400_TMDS2_PLLEN (1 << 0) -# define RS400_TMDS2_PLLRST (1 << 1) - -#define RADEON_GEN_INT_CNTL 0x0040 -#define RADEON_GEN_INT_STATUS 0x0044 -# define RADEON_VSYNC_INT_AK (1 << 2) -# define RADEON_VSYNC_INT (1 << 2) -# define RADEON_VSYNC2_INT_AK (1 << 6) -# define RADEON_VSYNC2_INT (1 << 6) -#define RADEON_GENENB 0x03c3 /* VGA */ -#define RADEON_GENFC_RD 0x03ca /* VGA */ -#define RADEON_GENFC_WT 0x03da /* VGA, 0x03ba */ -#define RADEON_GENMO_RD 0x03cc /* VGA */ -#define RADEON_GENMO_WT 0x03c2 /* VGA */ -#define RADEON_GENS0 0x03c2 /* VGA */ -#define RADEON_GENS1 0x03da /* VGA, 0x03ba */ -#define RADEON_GPIO_MONID 0x0068 /* DDC interface via I2C */ -#define RADEON_GPIO_MONIDB 0x006c -#define RADEON_GPIO_CRT2_DDC 0x006c -#define RADEON_GPIO_DVI_DDC 0x0064 -#define RADEON_GPIO_VGA_DDC 0x0060 -# define RADEON_GPIO_A_0 (1 << 0) -# define RADEON_GPIO_A_1 (1 << 1) -# define RADEON_GPIO_Y_0 (1 << 8) -# define RADEON_GPIO_Y_1 (1 << 9) -# define RADEON_GPIO_Y_SHIFT_0 8 -# define RADEON_GPIO_Y_SHIFT_1 9 -# define RADEON_GPIO_EN_0 (1 << 16) -# define RADEON_GPIO_EN_1 (1 << 17) -# define RADEON_GPIO_MASK_0 (1 << 24) /*??*/ -# define RADEON_GPIO_MASK_1 (1 << 25) /*??*/ -#define RADEON_GRPH8_DATA 0x03cf /* VGA */ -#define RADEON_GRPH8_IDX 0x03ce /* VGA */ -#define RADEON_GUI_SCRATCH_REG0 0x15e0 -#define RADEON_GUI_SCRATCH_REG1 0x15e4 -#define RADEON_GUI_SCRATCH_REG2 0x15e8 -#define RADEON_GUI_SCRATCH_REG3 0x15ec -#define RADEON_GUI_SCRATCH_REG4 0x15f0 -#define RADEON_GUI_SCRATCH_REG5 0x15f4 - -#define RADEON_HEADER 0x0f0e /* PCI */ -#define RADEON_HOST_DATA0 0x17c0 -#define RADEON_HOST_DATA1 0x17c4 -#define RADEON_HOST_DATA2 0x17c8 -#define RADEON_HOST_DATA3 0x17cc -#define RADEON_HOST_DATA4 0x17d0 -#define RADEON_HOST_DATA5 0x17d4 -#define RADEON_HOST_DATA6 0x17d8 -#define RADEON_HOST_DATA7 0x17dc -#define RADEON_HOST_DATA_LAST 0x17e0 -#define RADEON_HOST_PATH_CNTL 0x0130 -# define RADEON_HDP_SOFT_RESET (1 << 26) -# define RADEON_HDP_APER_CNTL (1 << 23) -#define RADEON_HTOTAL_CNTL 0x0009 /* PLL */ -# define RADEON_HTOT_CNTL_VGA_EN (1 << 28) -#define RADEON_HTOTAL2_CNTL 0x002e /* PLL */ - - /* Multimedia I2C bus */ -#define RADEON_I2C_CNTL_0 0x0090 -#define RADEON_I2C_DONE (1<<0) -#define RADEON_I2C_NACK (1<<1) -#define RADEON_I2C_HALT (1<<2) -#define RADEON_I2C_SOFT_RST (1<<5) -#define RADEON_I2C_DRIVE_EN (1<<6) -#define RADEON_I2C_DRIVE_SEL (1<<7) -#define RADEON_I2C_START (1<<8) -#define RADEON_I2C_STOP (1<<9) -#define RADEON_I2C_RECEIVE (1<<10) -#define RADEON_I2C_ABORT (1<<11) -#define RADEON_I2C_GO (1<<12) -#define RADEON_I2C_CNTL_1 0x0094 -#define RADEON_I2C_SEL (1<<16) -#define RADEON_I2C_EN (1<<17) -#define RADEON_I2C_DATA 0x0098 - -#define RADEON_DVI_I2C_CNTL_0 0x02e0 -#define RADEON_DVI_I2C_CNTL_1 0x02e4 /* ? */ -#define RADEON_DVI_I2C_DATA 0x02e8 - -#define RADEON_INTERRUPT_LINE 0x0f3c /* PCI */ -#define RADEON_INTERRUPT_PIN 0x0f3d /* PCI */ -#define RADEON_IO_BASE 0x0f14 /* PCI */ - -#define RADEON_LATENCY 0x0f0d /* PCI */ -#define RADEON_LEAD_BRES_DEC 0x1608 -#define RADEON_LEAD_BRES_LNTH 0x161c -#define RADEON_LEAD_BRES_LNTH_SUB 0x1624 -#define RADEON_LVDS_GEN_CNTL 0x02d0 -# define RADEON_LVDS_ON (1 << 0) -# define RADEON_LVDS_DISPLAY_DIS (1 << 1) -# define RADEON_LVDS_PANEL_TYPE (1 << 2) -# define RADEON_LVDS_PANEL_FORMAT (1 << 3) -# define RADEON_LVDS_RST_FM (1 << 6) -# define RADEON_LVDS_EN (1 << 7) -# define RADEON_LVDS_BL_MOD_LEVEL_SHIFT 8 -# define RADEON_LVDS_BL_MOD_LEVEL_MASK (0xff << 8) -# define RADEON_LVDS_BL_MOD_EN (1 << 16) -# define RADEON_LVDS_DIGON (1 << 18) -# define RADEON_LVDS_BLON (1 << 19) -# define RADEON_LVDS_SEL_CRTC2 (1 << 23) -#define RADEON_LVDS_PLL_CNTL 0x02d4 -# define RADEON_HSYNC_DELAY_SHIFT 28 -# define RADEON_HSYNC_DELAY_MASK (0xf << 28) -# define RADEON_LVDS_PLL_EN (1 << 16) -# define RADEON_LVDS_PLL_RESET (1 << 17) -# define R300_LVDS_SRC_SEL_MASK (3 << 18) -# define R300_LVDS_SRC_SEL_CRTC1 (0 << 18) -# define R300_LVDS_SRC_SEL_CRTC2 (1 << 18) -# define R300_LVDS_SRC_SEL_RMX (2 << 18) - -#define RADEON_MAX_LATENCY 0x0f3f /* PCI */ -#define RADEON_MC_AGP_LOCATION 0x014c -#define RADEON_MC_FB_LOCATION 0x0148 -#define RADEON_DISPLAY_BASE_ADDR 0x23c -#define RADEON_DISPLAY2_BASE_ADDR 0x33c -#define RADEON_OV0_BASE_ADDR 0x43c -#define RADEON_NB_TOM 0x15c -#define R300_MC_INIT_MISC_LAT_TIMER 0x180 -# define R300_MC_DISP0R_INIT_LAT_SHIFT 8 -# define R300_MC_DISP0R_INIT_LAT_MASK 0xf -# define R300_MC_DISP1R_INIT_LAT_SHIFT 12 -# define R300_MC_DISP1R_INIT_LAT_MASK 0xf -#define RADEON_MCLK_CNTL 0x0012 /* PLL */ -# define RADEON_FORCEON_MCLKA (1 << 16) -# define RADEON_FORCEON_MCLKB (1 << 17) -# define RADEON_FORCEON_YCLKA (1 << 18) -# define RADEON_FORCEON_YCLKB (1 << 19) -# define RADEON_FORCEON_MC (1 << 20) -# define RADEON_FORCEON_AIC (1 << 21) -# define R300_DISABLE_MC_MCLKA (1 << 21) -# define R300_DISABLE_MC_MCLKB (1 << 21) -#define RADEON_MCLK_MISC 0x001f /* PLL */ -# define RADEON_MC_MCLK_MAX_DYN_STOP_LAT (1 << 12) -# define RADEON_IO_MCLK_MAX_DYN_STOP_LAT (1 << 13) -# define RADEON_MC_MCLK_DYN_ENABLE (1 << 14) -# define RADEON_IO_MCLK_DYN_ENABLE (1 << 15) -#define RADEON_LCD_GPIO_MASK 0x01a0 -#define RADEON_GPIOPAD_EN 0x01a0 -#define RADEON_LCD_GPIO_Y_REG 0x01a4 -#define RADEON_MDGPIO_A_REG 0x01ac -#define RADEON_MDGPIO_EN_REG 0x01b0 -#define RADEON_MDGPIO_MASK 0x0198 -#define RADEON_GPIOPAD_MASK 0x0198 -#define RADEON_GPIOPAD_A 0x019c -#define RADEON_MDGPIO_Y_REG 0x01b4 -#define RADEON_MEM_ADDR_CONFIG 0x0148 -#define RADEON_MEM_BASE 0x0f10 /* PCI */ -#define RADEON_MEM_CNTL 0x0140 -# define RADEON_MEM_NUM_CHANNELS_MASK 0x01 -# define RADEON_MEM_USE_B_CH_ONLY (1 << 1) -# define RV100_HALF_MODE (1 << 3) -# define R300_MEM_NUM_CHANNELS_MASK 0x03 -# define R300_MEM_USE_CD_CH_ONLY (1 << 2) -#define RADEON_MEM_TIMING_CNTL 0x0144 /* EXT_MEM_CNTL */ -#define RADEON_MEM_INIT_LAT_TIMER 0x0154 -#define RADEON_MEM_INTF_CNTL 0x014c -#define RADEON_MEM_SDRAM_MODE_REG 0x0158 -# define RADEON_SDRAM_MODE_MASK 0xffff0000 -# define RADEON_B3MEM_RESET_MASK 0x6fffffff -# define RADEON_MEM_CFG_TYPE_DDR (1 << 30) -#define RADEON_MEM_STR_CNTL 0x0150 -# define RADEON_MEM_PWRUP_COMPL_A (1 << 0) -# define RADEON_MEM_PWRUP_COMPL_B (1 << 1) -# define R300_MEM_PWRUP_COMPL_C (1 << 2) -# define R300_MEM_PWRUP_COMPL_D (1 << 3) -# define RADEON_MEM_PWRUP_COMPLETE 0x03 -# define R300_MEM_PWRUP_COMPLETE 0x0f -#define RADEON_MC_STATUS 0x0150 -# define RADEON_MC_IDLE (1 << 2) -# define R300_MC_IDLE (1 << 4) -#define RADEON_MEM_VGA_RP_SEL 0x003c -#define RADEON_MEM_VGA_WP_SEL 0x0038 -#define RADEON_MIN_GRANT 0x0f3e /* PCI */ -#define RADEON_MM_DATA 0x0004 -#define RADEON_MM_INDEX 0x0000 -#define RADEON_MPLL_CNTL 0x000e /* PLL */ -#define RADEON_MPP_TB_CONFIG 0x01c0 /* ? */ -#define RADEON_MPP_GP_CONFIG 0x01c8 /* ? */ -#define RADEON_SEPROM_CNTL1 0x01c0 -# define RADEON_SCK_PRESCALE_SHIFT 24 -# define RADEON_SCK_PRESCALE_MASK (0xff << 24) -#define R300_MC_IND_INDEX 0x01f8 -# define R300_MC_IND_ADDR_MASK 0x3f -# define R300_MC_IND_WR_EN (1 << 8) -#define R300_MC_IND_DATA 0x01fc -#define R300_MC_READ_CNTL_AB 0x017c -# define R300_MEM_RBS_POSITION_A_MASK 0x03 -#define R300_MC_READ_CNTL_CD_mcind 0x24 -# define R300_MEM_RBS_POSITION_C_MASK 0x03 - -#define RADEON_N_VIF_COUNT 0x0248 - -#define RADEON_OV0_AUTO_FLIP_CNTL 0x0470 -# define RADEON_OV0_AUTO_FLIP_CNTL_SOFT_BUF_NUM 0x00000007 -# define RADEON_OV0_AUTO_FLIP_CNTL_SOFT_REPEAT_FIELD 0x00000008 -# define RADEON_OV0_AUTO_FLIP_CNTL_SOFT_BUF_ODD 0x00000010 -# define RADEON_OV0_AUTO_FLIP_CNTL_IGNORE_REPEAT_FIELD 0x00000020 -# define RADEON_OV0_AUTO_FLIP_CNTL_SOFT_EOF_TOGGLE 0x00000040 -# define RADEON_OV0_AUTO_FLIP_CNTL_VID_PORT_SELECT 0x00000300 -# define RADEON_OV0_AUTO_FLIP_CNTL_P1_FIRST_LINE_EVEN 0x00010000 -# define RADEON_OV0_AUTO_FLIP_CNTL_SHIFT_EVEN_DOWN 0x00040000 -# define RADEON_OV0_AUTO_FLIP_CNTL_SHIFT_ODD_DOWN 0x00080000 -# define RADEON_OV0_AUTO_FLIP_CNTL_FIELD_POL_SOURCE 0x00800000 - -#define RADEON_OV0_COLOUR_CNTL 0x04E0 -#define RADEON_OV0_DEINTERLACE_PATTERN 0x0474 -#define RADEON_OV0_EXCLUSIVE_HORZ 0x0408 -# define RADEON_EXCL_HORZ_START_MASK 0x000000ff -# define RADEON_EXCL_HORZ_END_MASK 0x0000ff00 -# define RADEON_EXCL_HORZ_BACK_PORCH_MASK 0x00ff0000 -# define RADEON_EXCL_HORZ_EXCLUSIVE_EN 0x80000000 -#define RADEON_OV0_EXCLUSIVE_VERT 0x040C -# define RADEON_EXCL_VERT_START_MASK 0x000003ff -# define RADEON_EXCL_VERT_END_MASK 0x03ff0000 -#define RADEON_OV0_FILTER_CNTL 0x04A0 -# define RADEON_FILTER_PROGRAMMABLE_COEF 0x0 -# define RADEON_FILTER_HC_COEF_HORZ_Y 0x1 -# define RADEON_FILTER_HC_COEF_HORZ_UV 0x2 -# define RADEON_FILTER_HC_COEF_VERT_Y 0x4 -# define RADEON_FILTER_HC_COEF_VERT_UV 0x8 -# define RADEON_FILTER_HARDCODED_COEF 0xf -# define RADEON_FILTER_COEF_MASK 0xf - -#define RADEON_OV0_FOUR_TAP_COEF_0 0x04B0 -#define RADEON_OV0_FOUR_TAP_COEF_1 0x04B4 -#define RADEON_OV0_FOUR_TAP_COEF_2 0x04B8 -#define RADEON_OV0_FOUR_TAP_COEF_3 0x04BC -#define RADEON_OV0_FOUR_TAP_COEF_4 0x04C0 -#define RADEON_OV0_FLAG_CNTL 0x04DC -#define RADEON_OV0_GAMMA_000_00F 0x0d40 -#define RADEON_OV0_GAMMA_010_01F 0x0d44 -#define RADEON_OV0_GAMMA_020_03F 0x0d48 -#define RADEON_OV0_GAMMA_040_07F 0x0d4c -#define RADEON_OV0_GAMMA_080_0BF 0x0e00 -#define RADEON_OV0_GAMMA_0C0_0FF 0x0e04 -#define RADEON_OV0_GAMMA_100_13F 0x0e08 -#define RADEON_OV0_GAMMA_140_17F 0x0e0c -#define RADEON_OV0_GAMMA_180_1BF 0x0e10 -#define RADEON_OV0_GAMMA_1C0_1FF 0x0e14 -#define RADEON_OV0_GAMMA_200_23F 0x0e18 -#define RADEON_OV0_GAMMA_240_27F 0x0e1c -#define RADEON_OV0_GAMMA_280_2BF 0x0e20 -#define RADEON_OV0_GAMMA_2C0_2FF 0x0e24 -#define RADEON_OV0_GAMMA_300_33F 0x0e28 -#define RADEON_OV0_GAMMA_340_37F 0x0e2c -#define RADEON_OV0_GAMMA_380_3BF 0x0d50 -#define RADEON_OV0_GAMMA_3C0_3FF 0x0d54 -#define RADEON_OV0_GRAPHICS_KEY_CLR_LOW 0x04EC -#define RADEON_OV0_GRAPHICS_KEY_CLR_HIGH 0x04F0 -#define RADEON_OV0_H_INC 0x0480 -#define RADEON_OV0_KEY_CNTL 0x04F4 -# define RADEON_VIDEO_KEY_FN_MASK 0x00000003L -# define RADEON_VIDEO_KEY_FN_FALSE 0x00000000L -# define RADEON_VIDEO_KEY_FN_TRUE 0x00000001L -# define RADEON_VIDEO_KEY_FN_EQ 0x00000002L -# define RADEON_VIDEO_KEY_FN_NE 0x00000003L -# define RADEON_GRAPHIC_KEY_FN_MASK 0x00000030L -# define RADEON_GRAPHIC_KEY_FN_FALSE 0x00000000L -# define RADEON_GRAPHIC_KEY_FN_TRUE 0x00000010L -# define RADEON_GRAPHIC_KEY_FN_EQ 0x00000020L -# define RADEON_GRAPHIC_KEY_FN_NE 0x00000030L -# define RADEON_CMP_MIX_MASK 0x00000100L -# define RADEON_CMP_MIX_OR 0x00000000L -# define RADEON_CMP_MIX_AND 0x00000100L -#define RADEON_OV0_LIN_TRANS_A 0x0d20 -#define RADEON_OV0_LIN_TRANS_B 0x0d24 -#define RADEON_OV0_LIN_TRANS_C 0x0d28 -#define RADEON_OV0_LIN_TRANS_D 0x0d2c -#define RADEON_OV0_LIN_TRANS_E 0x0d30 -#define RADEON_OV0_LIN_TRANS_F 0x0d34 -#define RADEON_OV0_P1_BLANK_LINES_AT_TOP 0x0430 -# define RADEON_P1_BLNK_LN_AT_TOP_M1_MASK 0x00000fffL -# define RADEON_P1_ACTIVE_LINES_M1 0x0fff0000L -#define RADEON_OV0_P1_H_ACCUM_INIT 0x0488 -#define RADEON_OV0_P1_V_ACCUM_INIT 0x0428 -# define RADEON_OV0_P1_MAX_LN_IN_PER_LN_OUT 0x00000003L -# define RADEON_OV0_P1_V_ACCUM_INIT_MASK 0x01ff8000L -#define RADEON_OV0_P1_X_START_END 0x0494 -#define RADEON_OV0_P2_X_START_END 0x0498 -#define RADEON_OV0_P23_BLANK_LINES_AT_TOP 0x0434 -# define RADEON_P23_BLNK_LN_AT_TOP_M1_MASK 0x000007ffL -# define RADEON_P23_ACTIVE_LINES_M1 0x07ff0000L -#define RADEON_OV0_P23_H_ACCUM_INIT 0x048C -#define RADEON_OV0_P23_V_ACCUM_INIT 0x042C -#define RADEON_OV0_P3_X_START_END 0x049C -#define RADEON_OV0_REG_LOAD_CNTL 0x0410 -# define RADEON_REG_LD_CTL_LOCK 0x00000001L -# define RADEON_REG_LD_CTL_VBLANK_DURING_LOCK 0x00000002L -# define RADEON_REG_LD_CTL_STALL_GUI_UNTIL_FLIP 0x00000004L -# define RADEON_REG_LD_CTL_LOCK_READBACK 0x00000008L -# define RADEON_REG_LD_CTL_FLIP_READBACK 0x00000010L -#define RADEON_OV0_SCALE_CNTL 0x0420 -# define RADEON_SCALER_HORZ_PICK_NEAREST 0x00000004L -# define RADEON_SCALER_VERT_PICK_NEAREST 0x00000008L -# define RADEON_SCALER_SIGNED_UV 0x00000010L -# define RADEON_SCALER_GAMMA_SEL_MASK 0x00000060L -# define RADEON_SCALER_GAMMA_SEL_BRIGHT 0x00000000L -# define RADEON_SCALER_GAMMA_SEL_G22 0x00000020L -# define RADEON_SCALER_GAMMA_SEL_G18 0x00000040L -# define RADEON_SCALER_GAMMA_SEL_G14 0x00000060L -# define RADEON_SCALER_COMCORE_SHIFT_UP_ONE 0x00000080L -# define RADEON_SCALER_SURFAC_FORMAT 0x00000f00L -# define RADEON_SCALER_SOURCE_15BPP 0x00000300L -# define RADEON_SCALER_SOURCE_16BPP 0x00000400L -# define RADEON_SCALER_SOURCE_32BPP 0x00000600L -# define RADEON_SCALER_SOURCE_YUV9 0x00000900L -# define RADEON_SCALER_SOURCE_YUV12 0x00000A00L -# define RADEON_SCALER_SOURCE_VYUY422 0x00000B00L -# define RADEON_SCALER_SOURCE_YVYU422 0x00000C00L -# define RADEON_SCALER_ADAPTIVE_DEINT 0x00001000L -# define RADEON_SCALER_TEMPORAL_DEINT 0x00002000L -# define RADEON_SCALER_CRTC_SEL 0x00004000L -# define RADEON_SCALER_SMART_SWITCH 0x00008000L -# define RADEON_SCALER_BURST_PER_PLANE 0x007F0000L -# define RADEON_SCALER_DOUBLE_BUFFER 0x01000000L -# define RADEON_SCALER_DIS_LIMIT 0x08000000L -# define RADEON_SCALER_LIN_TRANS_BYPASS 0x10000000L -# define RADEON_SCALER_INT_EMU 0x20000000L -# define RADEON_SCALER_ENABLE 0x40000000L -# define RADEON_SCALER_SOFT_RESET 0x80000000L -#define RADEON_OV0_STEP_BY 0x0484 -#define RADEON_OV0_TEST 0x04F8 -#define RADEON_OV0_V_INC 0x0424 -#define RADEON_OV0_VID_BUF_PITCH0_VALUE 0x0460 -#define RADEON_OV0_VID_BUF_PITCH1_VALUE 0x0464 -#define RADEON_OV0_VID_BUF0_BASE_ADRS 0x0440 -# define RADEON_VIF_BUF0_PITCH_SEL 0x00000001L -# define RADEON_VIF_BUF0_TILE_ADRS 0x00000002L -# define RADEON_VIF_BUF0_BASE_ADRS_MASK 0x03fffff0L -# define RADEON_VIF_BUF0_1ST_LINE_LSBS_MASK 0x48000000L -#define RADEON_OV0_VID_BUF1_BASE_ADRS 0x0444 -# define RADEON_VIF_BUF1_PITCH_SEL 0x00000001L -# define RADEON_VIF_BUF1_TILE_ADRS 0x00000002L -# define RADEON_VIF_BUF1_BASE_ADRS_MASK 0x03fffff0L -# define RADEON_VIF_BUF1_1ST_LINE_LSBS_MASK 0x48000000L -#define RADEON_OV0_VID_BUF2_BASE_ADRS 0x0448 -# define RADEON_VIF_BUF2_PITCH_SEL 0x00000001L -# define RADEON_VIF_BUF2_TILE_ADRS 0x00000002L -# define RADEON_VIF_BUF2_BASE_ADRS_MASK 0x03fffff0L -# define RADEON_VIF_BUF2_1ST_LINE_LSBS_MASK 0x48000000L -#define RADEON_OV0_VID_BUF3_BASE_ADRS 0x044C -#define RADEON_OV0_VID_BUF4_BASE_ADRS 0x0450 -#define RADEON_OV0_VID_BUF5_BASE_ADRS 0x0454 -#define RADEON_OV0_VIDEO_KEY_CLR_HIGH 0x04E8 -#define RADEON_OV0_VIDEO_KEY_CLR_LOW 0x04E4 -#define RADEON_OV0_Y_X_START 0x0400 -#define RADEON_OV0_Y_X_END 0x0404 -#define RADEON_OV1_Y_X_START 0x0600 -#define RADEON_OV1_Y_X_END 0x0604 -#define RADEON_OVR_CLR 0x0230 -#define RADEON_OVR_WID_LEFT_RIGHT 0x0234 -#define RADEON_OVR_WID_TOP_BOTTOM 0x0238 - -/* first capture unit */ - -#define RADEON_CAP0_BUF0_OFFSET 0x0920 -#define RADEON_CAP0_BUF1_OFFSET 0x0924 -#define RADEON_CAP0_BUF0_EVEN_OFFSET 0x0928 -#define RADEON_CAP0_BUF1_EVEN_OFFSET 0x092C - -#define RADEON_CAP0_BUF_PITCH 0x0930 -#define RADEON_CAP0_V_WINDOW 0x0934 -#define RADEON_CAP0_H_WINDOW 0x0938 -#define RADEON_CAP0_VBI0_OFFSET 0x093C -#define RADEON_CAP0_VBI1_OFFSET 0x0940 -#define RADEON_CAP0_VBI_V_WINDOW 0x0944 -#define RADEON_CAP0_VBI_H_WINDOW 0x0948 -#define RADEON_CAP0_PORT_MODE_CNTL 0x094C -#define RADEON_CAP0_TRIG_CNTL 0x0950 -#define RADEON_CAP0_DEBUG 0x0954 -#define RADEON_CAP0_CONFIG 0x0958 -# define RADEON_CAP0_CONFIG_CONTINUOS 0x00000001 -# define RADEON_CAP0_CONFIG_START_FIELD_EVEN 0x00000002 -# define RADEON_CAP0_CONFIG_START_BUF_GET 0x00000004 -# define RADEON_CAP0_CONFIG_START_BUF_SET 0x00000008 -# define RADEON_CAP0_CONFIG_BUF_TYPE_ALT 0x00000010 -# define RADEON_CAP0_CONFIG_BUF_TYPE_FRAME 0x00000020 -# define RADEON_CAP0_CONFIG_ONESHOT_MODE_FRAME 0x00000040 -# define RADEON_CAP0_CONFIG_BUF_MODE_DOUBLE 0x00000080 -# define RADEON_CAP0_CONFIG_BUF_MODE_TRIPLE 0x00000100 -# define RADEON_CAP0_CONFIG_MIRROR_EN 0x00000200 -# define RADEON_CAP0_CONFIG_ONESHOT_MIRROR_EN 0x00000400 -# define RADEON_CAP0_CONFIG_VIDEO_SIGNED_UV 0x00000800 -# define RADEON_CAP0_CONFIG_ANC_DECODE_EN 0x00001000 -# define RADEON_CAP0_CONFIG_VBI_EN 0x00002000 -# define RADEON_CAP0_CONFIG_SOFT_PULL_DOWN_EN 0x00004000 -# define RADEON_CAP0_CONFIG_VIP_EXTEND_FLAG_EN 0x00008000 -# define RADEON_CAP0_CONFIG_FAKE_FIELD_EN 0x00010000 -# define RADEON_CAP0_CONFIG_ODD_ONE_MORE_LINE 0x00020000 -# define RADEON_CAP0_CONFIG_EVEN_ONE_MORE_LINE 0x00040000 -# define RADEON_CAP0_CONFIG_HORZ_DIVIDE_2 0x00080000 -# define RADEON_CAP0_CONFIG_HORZ_DIVIDE_4 0x00100000 -# define RADEON_CAP0_CONFIG_VERT_DIVIDE_2 0x00200000 -# define RADEON_CAP0_CONFIG_VERT_DIVIDE_4 0x00400000 -# define RADEON_CAP0_CONFIG_FORMAT_BROOKTREE 0x00000000 -# define RADEON_CAP0_CONFIG_FORMAT_CCIR656 0x00800000 -# define RADEON_CAP0_CONFIG_FORMAT_ZV 0x01000000 -# define RADEON_CAP0_CONFIG_FORMAT_VIP 0x01800000 -# define RADEON_CAP0_CONFIG_FORMAT_TRANSPORT 0x02000000 -# define RADEON_CAP0_CONFIG_HORZ_DECIMATOR 0x04000000 -# define RADEON_CAP0_CONFIG_VIDEO_IN_YVYU422 0x00000000 -# define RADEON_CAP0_CONFIG_VIDEO_IN_VYUY422 0x20000000 -# define RADEON_CAP0_CONFIG_VBI_DIVIDE_2 0x40000000 -# define RADEON_CAP0_CONFIG_VBI_DIVIDE_4 0x80000000 -#define RADEON_CAP0_ANC_ODD_OFFSET 0x095C -#define RADEON_CAP0_ANC_EVEN_OFFSET 0x0960 -#define RADEON_CAP0_ANC_H_WINDOW 0x0964 -#define RADEON_CAP0_VIDEO_SYNC_TEST 0x0968 -#define RADEON_CAP0_ONESHOT_BUF_OFFSET 0x096C -#define RADEON_CAP0_BUF_STATUS 0x0970 -/* #define RADEON_CAP0_DWNSC_XRATIO 0x0978 */ -/* #define RADEON_CAP0_XSHARPNESS 0x097C */ -#define RADEON_CAP0_VBI2_OFFSET 0x0980 -#define RADEON_CAP0_VBI3_OFFSET 0x0984 -#define RADEON_CAP0_ANC2_OFFSET 0x0988 -#define RADEON_CAP0_ANC3_OFFSET 0x098C -#define RADEON_VID_BUFFER_CONTROL 0x0900 - -/* second capture unit */ - -#define RADEON_CAP1_BUF0_OFFSET 0x0990 -#define RADEON_CAP1_BUF1_OFFSET 0x0994 -#define RADEON_CAP1_BUF0_EVEN_OFFSET 0x0998 -#define RADEON_CAP1_BUF1_EVEN_OFFSET 0x099C - -#define RADEON_CAP1_BUF_PITCH 0x09A0 -#define RADEON_CAP1_V_WINDOW 0x09A4 -#define RADEON_CAP1_H_WINDOW 0x09A8 -#define RADEON_CAP1_VBI_ODD_OFFSET 0x09AC -#define RADEON_CAP1_VBI_EVEN_OFFSET 0x09B0 -#define RADEON_CAP1_VBI_V_WINDOW 0x09B4 -#define RADEON_CAP1_VBI_H_WINDOW 0x09B8 -#define RADEON_CAP1_PORT_MODE_CNTL 0x09BC -#define RADEON_CAP1_TRIG_CNTL 0x09C0 -#define RADEON_CAP1_DEBUG 0x09C4 -#define RADEON_CAP1_CONFIG 0x09C8 -#define RADEON_CAP1_ANC_ODD_OFFSET 0x09CC -#define RADEON_CAP1_ANC_EVEN_OFFSET 0x09D0 -#define RADEON_CAP1_ANC_H_WINDOW 0x09D4 -#define RADEON_CAP1_VIDEO_SYNC_TEST 0x09D8 -#define RADEON_CAP1_ONESHOT_BUF_OFFSET 0x09DC -#define RADEON_CAP1_BUF_STATUS 0x09E0 -#define RADEON_CAP1_DWNSC_XRATIO 0x09E8 -#define RADEON_CAP1_XSHARPNESS 0x09EC - -/* misc multimedia registers */ - -#define RADEON_IDCT_RUNS 0x1F80 -#define RADEON_IDCT_LEVELS 0x1F84 -#define RADEON_IDCT_CONTROL 0x1FBC -#define RADEON_IDCT_AUTH_CONTROL 0x1F88 -#define RADEON_IDCT_AUTH 0x1F8C - -#define RADEON_P2PLL_CNTL 0x002a /* P2PLL */ -# define RADEON_P2PLL_RESET (1 << 0) -# define RADEON_P2PLL_SLEEP (1 << 1) -# define RADEON_P2PLL_PVG_MASK (7 << 11) -# define RADEON_P2PLL_PVG_SHIFT 11 -# define RADEON_P2PLL_ATOMIC_UPDATE_EN (1 << 16) -# define RADEON_P2PLL_VGA_ATOMIC_UPDATE_EN (1 << 17) -# define RADEON_P2PLL_ATOMIC_UPDATE_VSYNC (1 << 18) -#define RADEON_P2PLL_DIV_0 0x002c -# define RADEON_P2PLL_FB0_DIV_MASK 0x07ff -# define RADEON_P2PLL_POST0_DIV_MASK 0x00070000 -#define RADEON_P2PLL_REF_DIV 0x002B /* PLL */ -# define RADEON_P2PLL_REF_DIV_MASK 0x03ff -# define RADEON_P2PLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */ -# define RADEON_P2PLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */ -# define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18) -# define R300_PPLL_REF_DIV_ACC_SHIFT 18 -#define RADEON_PALETTE_DATA 0x00b4 -#define RADEON_PALETTE_30_DATA 0x00b8 -#define RADEON_PALETTE_INDEX 0x00b0 -#define RADEON_PCI_GART_PAGE 0x017c -#define RADEON_PIXCLKS_CNTL 0x002d -# define RADEON_PIX2CLK_SRC_SEL_MASK 0x03 -# define RADEON_PIX2CLK_SRC_SEL_CPUCLK 0x00 -# define RADEON_PIX2CLK_SRC_SEL_PSCANCLK 0x01 -# define RADEON_PIX2CLK_SRC_SEL_BYTECLK 0x02 -# define RADEON_PIX2CLK_SRC_SEL_P2PLLCLK 0x03 -# define RADEON_PIX2CLK_ALWAYS_ONb (1<<6) -# define RADEON_PIX2CLK_DAC_ALWAYS_ONb (1<<7) -# define RADEON_PIXCLK_TV_SRC_SEL (1 << 8) -# define RADEON_DISP_TVOUT_PIXCLK_TV_ALWAYS_ONb (1 << 9) -# define R300_DVOCLK_ALWAYS_ONb (1 << 10) -# define RADEON_PIXCLK_BLEND_ALWAYS_ONb (1 << 11) -# define RADEON_PIXCLK_GV_ALWAYS_ONb (1 << 12) -# define RADEON_PIXCLK_DIG_TMDS_ALWAYS_ONb (1 << 13) -# define R300_PIXCLK_DVO_ALWAYS_ONb (1 << 13) -# define RADEON_PIXCLK_LVDS_ALWAYS_ONb (1 << 14) -# define RADEON_PIXCLK_TMDS_ALWAYS_ONb (1 << 15) -# define R300_PIXCLK_TRANS_ALWAYS_ONb (1 << 16) -# define R300_PIXCLK_TVO_ALWAYS_ONb (1 << 17) -# define R300_P2G2CLK_ALWAYS_ONb (1 << 18) -# define R300_P2G2CLK_DAC_ALWAYS_ONb (1 << 19) -# define R300_DISP_DAC_PIXCLK_DAC2_BLANK_OFF (1 << 23) -#define RADEON_PLANE_3D_MASK_C 0x1d44 -#define RADEON_PLL_TEST_CNTL 0x0013 /* PLL */ -# define RADEON_PLL_MASK_READ_B (1 << 9) -#define RADEON_PMI_CAP_ID 0x0f5c /* PCI */ -#define RADEON_PMI_DATA 0x0f63 /* PCI */ -#define RADEON_PMI_NXT_CAP_PTR 0x0f5d /* PCI */ -#define RADEON_PMI_PMC_REG 0x0f5e /* PCI */ -#define RADEON_PMI_PMCSR_REG 0x0f60 /* PCI */ -#define RADEON_PMI_REGISTER 0x0f5c /* PCI */ -#define RADEON_PPLL_CNTL 0x0002 /* PLL */ -# define RADEON_PPLL_RESET (1 << 0) -# define RADEON_PPLL_SLEEP (1 << 1) -# define RADEON_PPLL_PVG_MASK (7 << 11) -# define RADEON_PPLL_PVG_SHIFT 11 -# define RADEON_PPLL_ATOMIC_UPDATE_EN (1 << 16) -# define RADEON_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17) -# define RADEON_PPLL_ATOMIC_UPDATE_VSYNC (1 << 18) -#define RADEON_PPLL_DIV_0 0x0004 /* PLL */ -#define RADEON_PPLL_DIV_1 0x0005 /* PLL */ -#define RADEON_PPLL_DIV_2 0x0006 /* PLL */ -#define RADEON_PPLL_DIV_3 0x0007 /* PLL */ -# define RADEON_PPLL_FB3_DIV_MASK 0x07ff -# define RADEON_PPLL_POST3_DIV_MASK 0x00070000 -#define RADEON_PPLL_REF_DIV 0x0003 /* PLL */ -# define RADEON_PPLL_REF_DIV_MASK 0x03ff -# define RADEON_PPLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */ -# define RADEON_PPLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */ -#define RADEON_PWR_MNGMT_CNTL_STATUS 0x0f60 /* PCI */ - -#define RADEON_RBBM_GUICNTL 0x172c -# define RADEON_HOST_DATA_SWAP_NONE (0 << 0) -# define RADEON_HOST_DATA_SWAP_16BIT (1 << 0) -# define RADEON_HOST_DATA_SWAP_32BIT (2 << 0) -# define RADEON_HOST_DATA_SWAP_HDW (3 << 0) -#define RADEON_RBBM_SOFT_RESET 0x00f0 -# define RADEON_SOFT_RESET_CP (1 << 0) -# define RADEON_SOFT_RESET_HI (1 << 1) -# define RADEON_SOFT_RESET_SE (1 << 2) -# define RADEON_SOFT_RESET_RE (1 << 3) -# define RADEON_SOFT_RESET_PP (1 << 4) -# define RADEON_SOFT_RESET_E2 (1 << 5) -# define RADEON_SOFT_RESET_RB (1 << 6) -# define RADEON_SOFT_RESET_HDP (1 << 7) -#define RADEON_RBBM_STATUS 0x0e40 -# define RADEON_RBBM_FIFOCNT_MASK 0x007f -# define RADEON_RBBM_ACTIVE (1 << 31) -#define RADEON_RB2D_DSTCACHE_CTLSTAT 0x342c -# define RADEON_RB2D_DC_FLUSH (3 << 0) -# define RADEON_RB2D_DC_FREE (3 << 2) -# define RADEON_RB2D_DC_FLUSH_ALL 0xf -# define RADEON_RB2D_DC_BUSY (1 << 31) -#define RADEON_RB2D_DSTCACHE_MODE 0x3428 -#define RADEON_DSTCACHE_CTLSTAT 0x1714 - -#define RADEON_RB3D_ZCACHE_MODE 0x3250 -#define RADEON_RB3D_ZCACHE_CTLSTAT 0x3254 -# define RADEON_RB3D_ZC_FLUSH_ALL 0x5 -#define RADEON_RB3D_DSTCACHE_MODE 0x3258 -# define RADEON_RB3D_DC_CACHE_ENABLE (0) -# define RADEON_RB3D_DC_2D_CACHE_DISABLE (1) -# define RADEON_RB3D_DC_3D_CACHE_DISABLE (2) -# define RADEON_RB3D_DC_CACHE_DISABLE (3) -# define RADEON_RB3D_DC_2D_CACHE_LINESIZE_128 (1 << 2) -# define RADEON_RB3D_DC_3D_CACHE_LINESIZE_128 (2 << 2) -# define RADEON_RB3D_DC_2D_CACHE_AUTOFLUSH (1 << 8) -# define RADEON_RB3D_DC_3D_CACHE_AUTOFLUSH (2 << 8) -# define R200_RB3D_DC_2D_CACHE_AUTOFREE (1 << 10) -# define R200_RB3D_DC_3D_CACHE_AUTOFREE (2 << 10) -# define RADEON_RB3D_DC_FORCE_RMW (1 << 16) -# define RADEON_RB3D_DC_DISABLE_RI_FILL (1 << 24) -# define RADEON_RB3D_DC_DISABLE_RI_READ (1 << 25) - -#define RADEON_RB3D_DSTCACHE_CTLSTAT 0x325C -# define RADEON_RB3D_DC_FLUSH (3 << 0) -# define RADEON_RB3D_DC_FREE (3 << 2) -# define RADEON_RB3D_DC_FLUSH_ALL 0xf -# define RADEON_RB3D_DC_BUSY (1 << 31) - -#define RADEON_REG_BASE 0x0f18 /* PCI */ -#define RADEON_REGPROG_INF 0x0f09 /* PCI */ -#define RADEON_REVISION_ID 0x0f08 /* PCI */ - -#define RADEON_SC_BOTTOM 0x164c -#define RADEON_SC_BOTTOM_RIGHT 0x16f0 -#define RADEON_SC_BOTTOM_RIGHT_C 0x1c8c -#define RADEON_SC_LEFT 0x1640 -#define RADEON_SC_RIGHT 0x1644 -#define RADEON_SC_TOP 0x1648 -#define RADEON_SC_TOP_LEFT 0x16ec -#define RADEON_SC_TOP_LEFT_C 0x1c88 -# define RADEON_SC_SIGN_MASK_LO 0x8000 -# define RADEON_SC_SIGN_MASK_HI 0x80000000 -#define RADEON_SCLK_CNTL 0x000d /* PLL */ -# define RADEON_SCLK_SRC_SEL_MASK 0x0007 -# define RADEON_DYN_STOP_LAT_MASK 0x00007ff8 -# define RADEON_CP_MAX_DYN_STOP_LAT 0x0008 -# define RADEON_SCLK_FORCEON_MASK 0xffff8000 -# define RADEON_SCLK_FORCE_DISP2 (1<<15) -# define RADEON_SCLK_FORCE_CP (1<<16) -# define RADEON_SCLK_FORCE_HDP (1<<17) -# define RADEON_SCLK_FORCE_DISP1 (1<<18) -# define RADEON_SCLK_FORCE_TOP (1<<19) -# define RADEON_SCLK_FORCE_E2 (1<<20) -# define RADEON_SCLK_FORCE_SE (1<<21) -# define RADEON_SCLK_FORCE_IDCT (1<<22) -# define RADEON_SCLK_FORCE_VIP (1<<23) -# define RADEON_SCLK_FORCE_RE (1<<24) -# define RADEON_SCLK_FORCE_PB (1<<25) -# define RADEON_SCLK_FORCE_TAM (1<<26) -# define RADEON_SCLK_FORCE_TDM (1<<27) -# define RADEON_SCLK_FORCE_RB (1<<28) -# define RADEON_SCLK_FORCE_TV_SCLK (1<<29) -# define RADEON_SCLK_FORCE_SUBPIC (1<<30) -# define RADEON_SCLK_FORCE_OV0 (1<<31) -# define R300_SCLK_FORCE_VAP (1<<21) -# define R300_SCLK_FORCE_SR (1<<25) -# define R300_SCLK_FORCE_PX (1<<26) -# define R300_SCLK_FORCE_TX (1<<27) -# define R300_SCLK_FORCE_US (1<<28) -# define R300_SCLK_FORCE_SU (1<<30) -#define R300_SCLK_CNTL2 0x1e /* PLL */ -# define R300_SCLK_TCL_MAX_DYN_STOP_LAT (1<<10) -# define R300_SCLK_GA_MAX_DYN_STOP_LAT (1<<11) -# define R300_SCLK_CBA_MAX_DYN_STOP_LAT (1<<12) -# define R300_SCLK_FORCE_TCL (1<<13) -# define R300_SCLK_FORCE_CBA (1<<14) -# define R300_SCLK_FORCE_GA (1<<15) -#define RADEON_SCLK_MORE_CNTL 0x0035 /* PLL */ -# define RADEON_SCLK_MORE_MAX_DYN_STOP_LAT 0x0007 -# define RADEON_SCLK_MORE_FORCEON 0x0700 -#define RADEON_SDRAM_MODE_REG 0x0158 -#define RADEON_SEQ8_DATA 0x03c5 /* VGA */ -#define RADEON_SEQ8_IDX 0x03c4 /* VGA */ -#define RADEON_SNAPSHOT_F_COUNT 0x0244 -#define RADEON_SNAPSHOT_VH_COUNTS 0x0240 -#define RADEON_SNAPSHOT_VIF_COUNT 0x024c -#define RADEON_SRC_OFFSET 0x15ac -#define RADEON_SRC_PITCH 0x15b0 -#define RADEON_SRC_PITCH_OFFSET 0x1428 -#define RADEON_SRC_SC_BOTTOM 0x165c -#define RADEON_SRC_SC_BOTTOM_RIGHT 0x16f4 -#define RADEON_SRC_SC_RIGHT 0x1654 -#define RADEON_SRC_X 0x1414 -#define RADEON_SRC_X_Y 0x1590 -#define RADEON_SRC_Y 0x1418 -#define RADEON_SRC_Y_X 0x1434 -#define RADEON_STATUS 0x0f06 /* PCI */ -#define RADEON_SUBPIC_CNTL 0x0540 /* ? */ -#define RADEON_SUB_CLASS 0x0f0a /* PCI */ -#define RADEON_SURFACE_CNTL 0x0b00 -# define RADEON_SURF_TRANSLATION_DIS (1 << 8) -# define RADEON_NONSURF_AP0_SWP_16BPP (1 << 20) -# define RADEON_NONSURF_AP0_SWP_32BPP (1 << 21) -# define RADEON_NONSURF_AP1_SWP_16BPP (1 << 22) -# define RADEON_NONSURF_AP1_SWP_32BPP (1 << 23) -#define RADEON_SURFACE0_INFO 0x0b0c -# define RADEON_SURF_TILE_COLOR_MACRO (0 << 16) -# define RADEON_SURF_TILE_COLOR_BOTH (1 << 16) -# define RADEON_SURF_TILE_DEPTH_32BPP (2 << 16) -# define RADEON_SURF_TILE_DEPTH_16BPP (3 << 16) -# define R200_SURF_TILE_NONE (0 << 16) -# define R200_SURF_TILE_COLOR_MACRO (1 << 16) -# define R200_SURF_TILE_COLOR_MICRO (2 << 16) -# define R200_SURF_TILE_COLOR_BOTH (3 << 16) -# define R200_SURF_TILE_DEPTH_32BPP (4 << 16) -# define R200_SURF_TILE_DEPTH_16BPP (5 << 16) -# define R300_SURF_TILE_NONE (0 << 16) -# define R300_SURF_TILE_COLOR_MACRO (1 << 16) -# define R300_SURF_TILE_DEPTH_32BPP (2 << 16) -# define RADEON_SURF_AP0_SWP_16BPP (1 << 20) -# define RADEON_SURF_AP0_SWP_32BPP (1 << 21) -# define RADEON_SURF_AP1_SWP_16BPP (1 << 22) -# define RADEON_SURF_AP1_SWP_32BPP (1 << 23) -#define RADEON_SURFACE0_LOWER_BOUND 0x0b04 -#define RADEON_SURFACE0_UPPER_BOUND 0x0b08 -#define RADEON_SURFACE1_INFO 0x0b1c -#define RADEON_SURFACE1_LOWER_BOUND 0x0b14 -#define RADEON_SURFACE1_UPPER_BOUND 0x0b18 -#define RADEON_SURFACE2_INFO 0x0b2c -#define RADEON_SURFACE2_LOWER_BOUND 0x0b24 -#define RADEON_SURFACE2_UPPER_BOUND 0x0b28 -#define RADEON_SURFACE3_INFO 0x0b3c -#define RADEON_SURFACE3_LOWER_BOUND 0x0b34 -#define RADEON_SURFACE3_UPPER_BOUND 0x0b38 -#define RADEON_SURFACE4_INFO 0x0b4c -#define RADEON_SURFACE4_LOWER_BOUND 0x0b44 -#define RADEON_SURFACE4_UPPER_BOUND 0x0b48 -#define RADEON_SURFACE5_INFO 0x0b5c -#define RADEON_SURFACE5_LOWER_BOUND 0x0b54 -#define RADEON_SURFACE5_UPPER_BOUND 0x0b58 -#define RADEON_SURFACE6_INFO 0x0b6c -#define RADEON_SURFACE6_LOWER_BOUND 0x0b64 -#define RADEON_SURFACE6_UPPER_BOUND 0x0b68 -#define RADEON_SURFACE7_INFO 0x0b7c -#define RADEON_SURFACE7_LOWER_BOUND 0x0b74 -#define RADEON_SURFACE7_UPPER_BOUND 0x0b78 -#define RADEON_SW_SEMAPHORE 0x013c - -#define RADEON_TEST_DEBUG_CNTL 0x0120 -#define RADEON_TEST_DEBUG_CNTL__TEST_DEBUG_OUT_EN 0x00000001 - -#define RADEON_TEST_DEBUG_MUX 0x0124 -#define RADEON_TEST_DEBUG_OUT 0x012c -#define RADEON_TMDS_PLL_CNTL 0x02a8 -#define RADEON_TMDS_TRANSMITTER_CNTL 0x02a4 -# define RADEON_TMDS_TRANSMITTER_PLLEN 1 -# define RADEON_TMDS_TRANSMITTER_PLLRST 2 -#define RADEON_TRAIL_BRES_DEC 0x1614 -#define RADEON_TRAIL_BRES_ERR 0x160c -#define RADEON_TRAIL_BRES_INC 0x1610 -#define RADEON_TRAIL_X 0x1618 -#define RADEON_TRAIL_X_SUB 0x1620 - -#define RADEON_VCLK_ECP_CNTL 0x0008 /* PLL */ -# define RADEON_VCLK_SRC_SEL_MASK 0x03 -# define RADEON_VCLK_SRC_SEL_CPUCLK 0x00 -# define RADEON_VCLK_SRC_SEL_PSCANCLK 0x01 -# define RADEON_VCLK_SRC_SEL_BYTECLK 0x02 -# define RADEON_VCLK_SRC_SEL_PPLLCLK 0x03 -# define RADEON_PIXCLK_ALWAYS_ONb (1<<6) -# define RADEON_PIXCLK_DAC_ALWAYS_ONb (1<<7) -# define R300_DISP_DAC_PIXCLK_DAC_BLANK_OFF (1<<23) - -#define RADEON_VENDOR_ID 0x0f00 /* PCI */ -#define RADEON_VGA_DDA_CONFIG 0x02e8 -#define RADEON_VGA_DDA_ON_OFF 0x02ec -#define RADEON_VID_BUFFER_CONTROL 0x0900 -#define RADEON_VIDEOMUX_CNTL 0x0190 - - /* VIP bus */ -#define RADEON_VIPH_CH0_DATA 0x0c00 -#define RADEON_VIPH_CH1_DATA 0x0c04 -#define RADEON_VIPH_CH2_DATA 0x0c08 -#define RADEON_VIPH_CH3_DATA 0x0c0c -#define RADEON_VIPH_CH0_ADDR 0x0c10 -#define RADEON_VIPH_CH1_ADDR 0x0c14 -#define RADEON_VIPH_CH2_ADDR 0x0c18 -#define RADEON_VIPH_CH3_ADDR 0x0c1c -#define RADEON_VIPH_CH0_SBCNT 0x0c20 -#define RADEON_VIPH_CH1_SBCNT 0x0c24 -#define RADEON_VIPH_CH2_SBCNT 0x0c28 -#define RADEON_VIPH_CH3_SBCNT 0x0c2c -#define RADEON_VIPH_CH0_ABCNT 0x0c30 -#define RADEON_VIPH_CH1_ABCNT 0x0c34 -#define RADEON_VIPH_CH2_ABCNT 0x0c38 -#define RADEON_VIPH_CH3_ABCNT 0x0c3c -#define RADEON_VIPH_CONTROL 0x0c40 -# define RADEON_VIP_BUSY 0 -# define RADEON_VIP_IDLE 1 -# define RADEON_VIP_RESET 2 -# define RADEON_VIPH_EN (1 << 21) -#define RADEON_VIPH_DV_LAT 0x0c44 -#define RADEON_VIPH_BM_CHUNK 0x0c48 -#define RADEON_VIPH_DV_INT 0x0c4c -#define RADEON_VIPH_TIMEOUT_STAT 0x0c50 -#define RADEON_VIPH_TIMEOUT_STAT__VIPH_REG_STAT 0x00000010 -#define RADEON_VIPH_TIMEOUT_STAT__VIPH_REG_AK 0x00000010 -#define RADEON_VIPH_TIMEOUT_STAT__VIPH_REGR_DIS 0x01000000 - -#define RADEON_VIPH_REG_DATA 0x0084 -#define RADEON_VIPH_REG_ADDR 0x0080 - - -#define RADEON_WAIT_UNTIL 0x1720 -# define RADEON_WAIT_CRTC_PFLIP (1 << 0) -# define RADEON_WAIT_RE_CRTC_VLINE (1 << 1) -# define RADEON_WAIT_FE_CRTC_VLINE (1 << 2) -# define RADEON_WAIT_CRTC_VLINE (1 << 3) -# define RADEON_WAIT_DMA_VID_IDLE (1 << 8) -# define RADEON_WAIT_DMA_GUI_IDLE (1 << 9) -# define RADEON_WAIT_CMDFIFO (1 << 10) /* wait for CMDFIFO_ENTRIES */ -# define RADEON_WAIT_OV0_FLIP (1 << 11) -# define RADEON_WAIT_AGP_FLUSH (1 << 13) -# define RADEON_WAIT_2D_IDLE (1 << 14) -# define RADEON_WAIT_3D_IDLE (1 << 15) -# define RADEON_WAIT_2D_IDLECLEAN (1 << 16) -# define RADEON_WAIT_3D_IDLECLEAN (1 << 17) -# define RADEON_WAIT_HOST_IDLECLEAN (1 << 18) -# define RADEON_CMDFIFO_ENTRIES_SHIFT 10 -# define RADEON_CMDFIFO_ENTRIES_MASK 0x7f -# define RADEON_WAIT_VAP_IDLE (1 << 28) -# define RADEON_WAIT_BOTH_CRTC_PFLIP (1 << 30) -# define RADEON_ENG_DISPLAY_SELECT_CRTC0 (0 << 31) -# define RADEON_ENG_DISPLAY_SELECT_CRTC1 (1 << 31) - -#define RADEON_X_MPLL_REF_FB_DIV 0x000a /* PLL */ -#define RADEON_XCLK_CNTL 0x000d /* PLL */ -#define RADEON_XDLL_CNTL 0x000c /* PLL */ -#define RADEON_XPLL_CNTL 0x000b /* PLL */ - - - - /* Registers for 3D/TCL */ -#define RADEON_PP_BORDER_COLOR_0 0x1d40 -#define RADEON_PP_BORDER_COLOR_1 0x1d44 -#define RADEON_PP_BORDER_COLOR_2 0x1d48 -#define RADEON_PP_CNTL 0x1c38 -# define RADEON_STIPPLE_ENABLE (1 << 0) -# define RADEON_SCISSOR_ENABLE (1 << 1) -# define RADEON_PATTERN_ENABLE (1 << 2) -# define RADEON_SHADOW_ENABLE (1 << 3) -# define RADEON_TEX_ENABLE_MASK (0xf << 4) -# define RADEON_TEX_0_ENABLE (1 << 4) -# define RADEON_TEX_1_ENABLE (1 << 5) -# define RADEON_TEX_2_ENABLE (1 << 6) -# define RADEON_TEX_3_ENABLE (1 << 7) -# define RADEON_TEX_BLEND_ENABLE_MASK (0xf << 12) -# define RADEON_TEX_BLEND_0_ENABLE (1 << 12) -# define RADEON_TEX_BLEND_1_ENABLE (1 << 13) -# define RADEON_TEX_BLEND_2_ENABLE (1 << 14) -# define RADEON_TEX_BLEND_3_ENABLE (1 << 15) -# define RADEON_PLANAR_YUV_ENABLE (1 << 20) -# define RADEON_SPECULAR_ENABLE (1 << 21) -# define RADEON_FOG_ENABLE (1 << 22) -# define RADEON_ALPHA_TEST_ENABLE (1 << 23) -# define RADEON_ANTI_ALIAS_NONE (0 << 24) -# define RADEON_ANTI_ALIAS_LINE (1 << 24) -# define RADEON_ANTI_ALIAS_POLY (2 << 24) -# define RADEON_ANTI_ALIAS_LINE_POLY (3 << 24) -# define RADEON_BUMP_MAP_ENABLE (1 << 26) -# define RADEON_BUMPED_MAP_T0 (0 << 27) -# define RADEON_BUMPED_MAP_T1 (1 << 27) -# define RADEON_BUMPED_MAP_T2 (2 << 27) -# define RADEON_TEX_3D_ENABLE_0 (1 << 29) -# define RADEON_TEX_3D_ENABLE_1 (1 << 30) -# define RADEON_MC_ENABLE (1 << 31) -#define RADEON_PP_FOG_COLOR 0x1c18 -# define RADEON_FOG_COLOR_MASK 0x00ffffff -# define RADEON_FOG_VERTEX (0 << 24) -# define RADEON_FOG_TABLE (1 << 24) -# define RADEON_FOG_USE_DEPTH (0 << 25) -# define RADEON_FOG_USE_DIFFUSE_ALPHA (2 << 25) -# define RADEON_FOG_USE_SPEC_ALPHA (3 << 25) -#define RADEON_PP_LUM_MATRIX 0x1d00 -#define RADEON_PP_MISC 0x1c14 -# define RADEON_REF_ALPHA_MASK 0x000000ff -# define RADEON_ALPHA_TEST_FAIL (0 << 8) -# define RADEON_ALPHA_TEST_LESS (1 << 8) -# define RADEON_ALPHA_TEST_LEQUAL (2 << 8) -# define RADEON_ALPHA_TEST_EQUAL (3 << 8) -# define RADEON_ALPHA_TEST_GEQUAL (4 << 8) -# define RADEON_ALPHA_TEST_GREATER (5 << 8) -# define RADEON_ALPHA_TEST_NEQUAL (6 << 8) -# define RADEON_ALPHA_TEST_PASS (7 << 8) -# define RADEON_ALPHA_TEST_OP_MASK (7 << 8) -# define RADEON_CHROMA_FUNC_FAIL (0 << 16) -# define RADEON_CHROMA_FUNC_PASS (1 << 16) -# define RADEON_CHROMA_FUNC_NEQUAL (2 << 16) -# define RADEON_CHROMA_FUNC_EQUAL (3 << 16) -# define RADEON_CHROMA_KEY_NEAREST (0 << 18) -# define RADEON_CHROMA_KEY_ZERO (1 << 18) -# define RADEON_SHADOW_ID_AUTO_INC (1 << 20) -# define RADEON_SHADOW_FUNC_EQUAL (0 << 21) -# define RADEON_SHADOW_FUNC_NEQUAL (1 << 21) -# define RADEON_SHADOW_PASS_1 (0 << 22) -# define RADEON_SHADOW_PASS_2 (1 << 22) -# define RADEON_RIGHT_HAND_CUBE_D3D (0 << 24) -# define RADEON_RIGHT_HAND_CUBE_OGL (1 << 24) -#define RADEON_PP_ROT_MATRIX_0 0x1d58 -#define RADEON_PP_ROT_MATRIX_1 0x1d5c -#define RADEON_PP_TXFILTER_0 0x1c54 -#define RADEON_PP_TXFILTER_1 0x1c6c -#define RADEON_PP_TXFILTER_2 0x1c84 -# define RADEON_MAG_FILTER_NEAREST (0 << 0) -# define RADEON_MAG_FILTER_LINEAR (1 << 0) -# define RADEON_MAG_FILTER_MASK (1 << 0) -# define RADEON_MIN_FILTER_NEAREST (0 << 1) -# define RADEON_MIN_FILTER_LINEAR (1 << 1) -# define RADEON_MIN_FILTER_NEAREST_MIP_NEAREST (2 << 1) -# define RADEON_MIN_FILTER_NEAREST_MIP_LINEAR (3 << 1) -# define RADEON_MIN_FILTER_LINEAR_MIP_NEAREST (6 << 1) -# define RADEON_MIN_FILTER_LINEAR_MIP_LINEAR (7 << 1) -# define RADEON_MIN_FILTER_ANISO_NEAREST (8 << 1) -# define RADEON_MIN_FILTER_ANISO_LINEAR (9 << 1) -# define RADEON_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (10 << 1) -# define RADEON_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR (11 << 1) -# define RADEON_MIN_FILTER_MASK (15 << 1) -# define RADEON_MAX_ANISO_1_TO_1 (0 << 5) -# define RADEON_MAX_ANISO_2_TO_1 (1 << 5) -# define RADEON_MAX_ANISO_4_TO_1 (2 << 5) -# define RADEON_MAX_ANISO_8_TO_1 (3 << 5) -# define RADEON_MAX_ANISO_16_TO_1 (4 << 5) -# define RADEON_MAX_ANISO_MASK (7 << 5) -# define RADEON_LOD_BIAS_MASK (0xff << 8) -# define RADEON_LOD_BIAS_SHIFT 8 -# define RADEON_MAX_MIP_LEVEL_MASK (0x0f << 16) -# define RADEON_MAX_MIP_LEVEL_SHIFT 16 -# define RADEON_YUV_TO_RGB (1 << 20) -# define RADEON_YUV_TEMPERATURE_COOL (0 << 21) -# define RADEON_YUV_TEMPERATURE_HOT (1 << 21) -# define RADEON_YUV_TEMPERATURE_MASK (1 << 21) -# define RADEON_WRAPEN_S (1 << 22) -# define RADEON_CLAMP_S_WRAP (0 << 23) -# define RADEON_CLAMP_S_MIRROR (1 << 23) -# define RADEON_CLAMP_S_CLAMP_LAST (2 << 23) -# define RADEON_CLAMP_S_MIRROR_CLAMP_LAST (3 << 23) -# define RADEON_CLAMP_S_CLAMP_BORDER (4 << 23) -# define RADEON_CLAMP_S_MIRROR_CLAMP_BORDER (5 << 23) -# define RADEON_CLAMP_S_CLAMP_GL (6 << 23) -# define RADEON_CLAMP_S_MIRROR_CLAMP_GL (7 << 23) -# define RADEON_CLAMP_S_MASK (7 << 23) -# define RADEON_WRAPEN_T (1 << 26) -# define RADEON_CLAMP_T_WRAP (0 << 27) -# define RADEON_CLAMP_T_MIRROR (1 << 27) -# define RADEON_CLAMP_T_CLAMP_LAST (2 << 27) -# define RADEON_CLAMP_T_MIRROR_CLAMP_LAST (3 << 27) -# define RADEON_CLAMP_T_CLAMP_BORDER (4 << 27) -# define RADEON_CLAMP_T_MIRROR_CLAMP_BORDER (5 << 27) -# define RADEON_CLAMP_T_CLAMP_GL (6 << 27) -# define RADEON_CLAMP_T_MIRROR_CLAMP_GL (7 << 27) -# define RADEON_CLAMP_T_MASK (7 << 27) -# define RADEON_BORDER_MODE_OGL (0 << 31) -# define RADEON_BORDER_MODE_D3D (1 << 31) -#define RADEON_PP_TXFORMAT_0 0x1c58 -#define RADEON_PP_TXFORMAT_1 0x1c70 -#define RADEON_PP_TXFORMAT_2 0x1c88 -# define RADEON_TXFORMAT_I8 (0 << 0) -# define RADEON_TXFORMAT_AI88 (1 << 0) -# define RADEON_TXFORMAT_RGB332 (2 << 0) -# define RADEON_TXFORMAT_ARGB1555 (3 << 0) -# define RADEON_TXFORMAT_RGB565 (4 << 0) -# define RADEON_TXFORMAT_ARGB4444 (5 << 0) -# define RADEON_TXFORMAT_ARGB8888 (6 << 0) -# define RADEON_TXFORMAT_RGBA8888 (7 << 0) -# define RADEON_TXFORMAT_Y8 (8 << 0) -# define RADEON_TXFORMAT_VYUY422 (10 << 0) -# define RADEON_TXFORMAT_YVYU422 (11 << 0) -# define RADEON_TXFORMAT_DXT1 (12 << 0) -# define RADEON_TXFORMAT_DXT23 (14 << 0) -# define RADEON_TXFORMAT_DXT45 (15 << 0) -# define RADEON_TXFORMAT_FORMAT_MASK (31 << 0) -# define RADEON_TXFORMAT_FORMAT_SHIFT 0 -# define RADEON_TXFORMAT_APPLE_YUV_MODE (1 << 5) -# define RADEON_TXFORMAT_ALPHA_IN_MAP (1 << 6) -# define RADEON_TXFORMAT_NON_POWER2 (1 << 7) -# define RADEON_TXFORMAT_WIDTH_MASK (15 << 8) -# define RADEON_TXFORMAT_WIDTH_SHIFT 8 -# define RADEON_TXFORMAT_HEIGHT_MASK (15 << 12) -# define RADEON_TXFORMAT_HEIGHT_SHIFT 12 -# define RADEON_TXFORMAT_F5_WIDTH_MASK (15 << 16) -# define RADEON_TXFORMAT_F5_WIDTH_SHIFT 16 -# define RADEON_TXFORMAT_F5_HEIGHT_MASK (15 << 20) -# define RADEON_TXFORMAT_F5_HEIGHT_SHIFT 20 -# define RADEON_TXFORMAT_ST_ROUTE_STQ0 (0 << 24) -# define RADEON_TXFORMAT_ST_ROUTE_MASK (3 << 24) -# define RADEON_TXFORMAT_ST_ROUTE_STQ1 (1 << 24) -# define RADEON_TXFORMAT_ST_ROUTE_STQ2 (2 << 24) -# define RADEON_TXFORMAT_ENDIAN_NO_SWAP (0 << 26) -# define RADEON_TXFORMAT_ENDIAN_16BPP_SWAP (1 << 26) -# define RADEON_TXFORMAT_ENDIAN_32BPP_SWAP (2 << 26) -# define RADEON_TXFORMAT_ENDIAN_HALFDW_SWAP (3 << 26) -# define RADEON_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28) -# define RADEON_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29) -# define RADEON_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) -# define RADEON_TXFORMAT_PERSPECTIVE_ENABLE (1 << 31) -#define RADEON_PP_CUBIC_FACES_0 0x1d24 -#define RADEON_PP_CUBIC_FACES_1 0x1d28 -#define RADEON_PP_CUBIC_FACES_2 0x1d2c -# define RADEON_FACE_WIDTH_1_SHIFT 0 -# define RADEON_FACE_HEIGHT_1_SHIFT 4 -# define RADEON_FACE_WIDTH_1_MASK (0xf << 0) -# define RADEON_FACE_HEIGHT_1_MASK (0xf << 4) -# define RADEON_FACE_WIDTH_2_SHIFT 8 -# define RADEON_FACE_HEIGHT_2_SHIFT 12 -# define RADEON_FACE_WIDTH_2_MASK (0xf << 8) -# define RADEON_FACE_HEIGHT_2_MASK (0xf << 12) -# define RADEON_FACE_WIDTH_3_SHIFT 16 -# define RADEON_FACE_HEIGHT_3_SHIFT 20 -# define RADEON_FACE_WIDTH_3_MASK (0xf << 16) -# define RADEON_FACE_HEIGHT_3_MASK (0xf << 20) -# define RADEON_FACE_WIDTH_4_SHIFT 24 -# define RADEON_FACE_HEIGHT_4_SHIFT 28 -# define RADEON_FACE_WIDTH_4_MASK (0xf << 24) -# define RADEON_FACE_HEIGHT_4_MASK (0xf << 28) - -#define RADEON_PP_TXOFFSET_0 0x1c5c -#define RADEON_PP_TXOFFSET_1 0x1c74 -#define RADEON_PP_TXOFFSET_2 0x1c8c -# define RADEON_TXO_ENDIAN_NO_SWAP (0 << 0) -# define RADEON_TXO_ENDIAN_BYTE_SWAP (1 << 0) -# define RADEON_TXO_ENDIAN_WORD_SWAP (2 << 0) -# define RADEON_TXO_ENDIAN_HALFDW_SWAP (3 << 0) -# define RADEON_TXO_MACRO_LINEAR (0 << 2) -# define RADEON_TXO_MACRO_TILE (1 << 2) -# define RADEON_TXO_MICRO_LINEAR (0 << 3) -# define RADEON_TXO_MICRO_TILE_X2 (1 << 3) -# define RADEON_TXO_MICRO_TILE_OPT (2 << 3) -# define RADEON_TXO_OFFSET_MASK 0xffffffe0 -# define RADEON_TXO_OFFSET_SHIFT 5 - -#define RADEON_PP_CUBIC_OFFSET_T0_0 0x1dd0 /* bits [31:5] */ -#define RADEON_PP_CUBIC_OFFSET_T0_1 0x1dd4 -#define RADEON_PP_CUBIC_OFFSET_T0_2 0x1dd8 -#define RADEON_PP_CUBIC_OFFSET_T0_3 0x1ddc -#define RADEON_PP_CUBIC_OFFSET_T0_4 0x1de0 -#define RADEON_PP_CUBIC_OFFSET_T1_0 0x1e00 -#define RADEON_PP_CUBIC_OFFSET_T1_1 0x1e04 -#define RADEON_PP_CUBIC_OFFSET_T1_2 0x1e08 -#define RADEON_PP_CUBIC_OFFSET_T1_3 0x1e0c -#define RADEON_PP_CUBIC_OFFSET_T1_4 0x1e10 -#define RADEON_PP_CUBIC_OFFSET_T2_0 0x1e14 -#define RADEON_PP_CUBIC_OFFSET_T2_1 0x1e18 -#define RADEON_PP_CUBIC_OFFSET_T2_2 0x1e1c -#define RADEON_PP_CUBIC_OFFSET_T2_3 0x1e20 -#define RADEON_PP_CUBIC_OFFSET_T2_4 0x1e24 - -#define RADEON_PP_TEX_SIZE_0 0x1d04 /* NPOT */ -#define RADEON_PP_TEX_SIZE_1 0x1d0c -#define RADEON_PP_TEX_SIZE_2 0x1d14 -# define RADEON_TEX_USIZE_MASK (0x7ff << 0) -# define RADEON_TEX_USIZE_SHIFT 0 -# define RADEON_TEX_VSIZE_MASK (0x7ff << 16) -# define RADEON_TEX_VSIZE_SHIFT 16 -# define RADEON_SIGNED_RGB_MASK (1 << 30) -# define RADEON_SIGNED_RGB_SHIFT 30 -# define RADEON_SIGNED_ALPHA_MASK (1 << 31) -# define RADEON_SIGNED_ALPHA_SHIFT 31 -#define RADEON_PP_TEX_PITCH_0 0x1d08 /* NPOT */ -#define RADEON_PP_TEX_PITCH_1 0x1d10 /* NPOT */ -#define RADEON_PP_TEX_PITCH_2 0x1d18 /* NPOT */ -/* note: bits 13-5: 32 byte aligned stride of texture map */ - -#define RADEON_PP_TXCBLEND_0 0x1c60 -#define RADEON_PP_TXCBLEND_1 0x1c78 -#define RADEON_PP_TXCBLEND_2 0x1c90 -# define RADEON_COLOR_ARG_A_SHIFT 0 -# define RADEON_COLOR_ARG_A_MASK (0x1f << 0) -# define RADEON_COLOR_ARG_A_ZERO (0 << 0) -# define RADEON_COLOR_ARG_A_CURRENT_COLOR (2 << 0) -# define RADEON_COLOR_ARG_A_CURRENT_ALPHA (3 << 0) -# define RADEON_COLOR_ARG_A_DIFFUSE_COLOR (4 << 0) -# define RADEON_COLOR_ARG_A_DIFFUSE_ALPHA (5 << 0) -# define RADEON_COLOR_ARG_A_SPECULAR_COLOR (6 << 0) -# define RADEON_COLOR_ARG_A_SPECULAR_ALPHA (7 << 0) -# define RADEON_COLOR_ARG_A_TFACTOR_COLOR (8 << 0) -# define RADEON_COLOR_ARG_A_TFACTOR_ALPHA (9 << 0) -# define RADEON_COLOR_ARG_A_T0_COLOR (10 << 0) -# define RADEON_COLOR_ARG_A_T0_ALPHA (11 << 0) -# define RADEON_COLOR_ARG_A_T1_COLOR (12 << 0) -# define RADEON_COLOR_ARG_A_T1_ALPHA (13 << 0) -# define RADEON_COLOR_ARG_A_T2_COLOR (14 << 0) -# define RADEON_COLOR_ARG_A_T2_ALPHA (15 << 0) -# define RADEON_COLOR_ARG_A_T3_COLOR (16 << 0) -# define RADEON_COLOR_ARG_A_T3_ALPHA (17 << 0) -# define RADEON_COLOR_ARG_B_SHIFT 5 -# define RADEON_COLOR_ARG_B_MASK (0x1f << 5) -# define RADEON_COLOR_ARG_B_ZERO (0 << 5) -# define RADEON_COLOR_ARG_B_CURRENT_COLOR (2 << 5) -# define RADEON_COLOR_ARG_B_CURRENT_ALPHA (3 << 5) -# define RADEON_COLOR_ARG_B_DIFFUSE_COLOR (4 << 5) -# define RADEON_COLOR_ARG_B_DIFFUSE_ALPHA (5 << 5) -# define RADEON_COLOR_ARG_B_SPECULAR_COLOR (6 << 5) -# define RADEON_COLOR_ARG_B_SPECULAR_ALPHA (7 << 5) -# define RADEON_COLOR_ARG_B_TFACTOR_COLOR (8 << 5) -# define RADEON_COLOR_ARG_B_TFACTOR_ALPHA (9 << 5) -# define RADEON_COLOR_ARG_B_T0_COLOR (10 << 5) -# define RADEON_COLOR_ARG_B_T0_ALPHA (11 << 5) -# define RADEON_COLOR_ARG_B_T1_COLOR (12 << 5) -# define RADEON_COLOR_ARG_B_T1_ALPHA (13 << 5) -# define RADEON_COLOR_ARG_B_T2_COLOR (14 << 5) -# define RADEON_COLOR_ARG_B_T2_ALPHA (15 << 5) -# define RADEON_COLOR_ARG_B_T3_COLOR (16 << 5) -# define RADEON_COLOR_ARG_B_T3_ALPHA (17 << 5) -# define RADEON_COLOR_ARG_C_SHIFT 10 -# define RADEON_COLOR_ARG_C_MASK (0x1f << 10) -# define RADEON_COLOR_ARG_C_ZERO (0 << 10) -# define RADEON_COLOR_ARG_C_CURRENT_COLOR (2 << 10) -# define RADEON_COLOR_ARG_C_CURRENT_ALPHA (3 << 10) -# define RADEON_COLOR_ARG_C_DIFFUSE_COLOR (4 << 10) -# define RADEON_COLOR_ARG_C_DIFFUSE_ALPHA (5 << 10) -# define RADEON_COLOR_ARG_C_SPECULAR_COLOR (6 << 10) -# define RADEON_COLOR_ARG_C_SPECULAR_ALPHA (7 << 10) -# define RADEON_COLOR_ARG_C_TFACTOR_COLOR (8 << 10) -# define RADEON_COLOR_ARG_C_TFACTOR_ALPHA (9 << 10) -# define RADEON_COLOR_ARG_C_T0_COLOR (10 << 10) -# define RADEON_COLOR_ARG_C_T0_ALPHA (11 << 10) -# define RADEON_COLOR_ARG_C_T1_COLOR (12 << 10) -# define RADEON_COLOR_ARG_C_T1_ALPHA (13 << 10) -# define RADEON_COLOR_ARG_C_T2_COLOR (14 << 10) -# define RADEON_COLOR_ARG_C_T2_ALPHA (15 << 10) -# define RADEON_COLOR_ARG_C_T3_COLOR (16 << 10) -# define RADEON_COLOR_ARG_C_T3_ALPHA (17 << 10) -# define RADEON_COMP_ARG_A (1 << 15) -# define RADEON_COMP_ARG_A_SHIFT 15 -# define RADEON_COMP_ARG_B (1 << 16) -# define RADEON_COMP_ARG_B_SHIFT 16 -# define RADEON_COMP_ARG_C (1 << 17) -# define RADEON_COMP_ARG_C_SHIFT 17 -# define RADEON_BLEND_CTL_MASK (7 << 18) -# define RADEON_BLEND_CTL_ADD (0 << 18) -# define RADEON_BLEND_CTL_SUBTRACT (1 << 18) -# define RADEON_BLEND_CTL_ADDSIGNED (2 << 18) -# define RADEON_BLEND_CTL_BLEND (3 << 18) -# define RADEON_BLEND_CTL_DOT3 (4 << 18) -# define RADEON_SCALE_SHIFT 21 -# define RADEON_SCALE_MASK (3 << 21) -# define RADEON_SCALE_1X (0 << 21) -# define RADEON_SCALE_2X (1 << 21) -# define RADEON_SCALE_4X (2 << 21) -# define RADEON_CLAMP_TX (1 << 23) -# define RADEON_T0_EQ_TCUR (1 << 24) -# define RADEON_T1_EQ_TCUR (1 << 25) -# define RADEON_T2_EQ_TCUR (1 << 26) -# define RADEON_T3_EQ_TCUR (1 << 27) -# define RADEON_COLOR_ARG_MASK 0x1f -# define RADEON_COMP_ARG_SHIFT 15 -#define RADEON_PP_TXABLEND_0 0x1c64 -#define RADEON_PP_TXABLEND_1 0x1c7c -#define RADEON_PP_TXABLEND_2 0x1c94 -# define RADEON_ALPHA_ARG_A_SHIFT 0 -# define RADEON_ALPHA_ARG_A_MASK (0xf << 0) -# define RADEON_ALPHA_ARG_A_ZERO (0 << 0) -# define RADEON_ALPHA_ARG_A_CURRENT_ALPHA (1 << 0) -# define RADEON_ALPHA_ARG_A_DIFFUSE_ALPHA (2 << 0) -# define RADEON_ALPHA_ARG_A_SPECULAR_ALPHA (3 << 0) -# define RADEON_ALPHA_ARG_A_TFACTOR_ALPHA (4 << 0) -# define RADEON_ALPHA_ARG_A_T0_ALPHA (5 << 0) -# define RADEON_ALPHA_ARG_A_T1_ALPHA (6 << 0) -# define RADEON_ALPHA_ARG_A_T2_ALPHA (7 << 0) -# define RADEON_ALPHA_ARG_A_T3_ALPHA (8 << 0) -# define RADEON_ALPHA_ARG_B_SHIFT 4 -# define RADEON_ALPHA_ARG_B_MASK (0xf << 4) -# define RADEON_ALPHA_ARG_B_ZERO (0 << 4) -# define RADEON_ALPHA_ARG_B_CURRENT_ALPHA (1 << 4) -# define RADEON_ALPHA_ARG_B_DIFFUSE_ALPHA (2 << 4) -# define RADEON_ALPHA_ARG_B_SPECULAR_ALPHA (3 << 4) -# define RADEON_ALPHA_ARG_B_TFACTOR_ALPHA (4 << 4) -# define RADEON_ALPHA_ARG_B_T0_ALPHA (5 << 4) -# define RADEON_ALPHA_ARG_B_T1_ALPHA (6 << 4) -# define RADEON_ALPHA_ARG_B_T2_ALPHA (7 << 4) -# define RADEON_ALPHA_ARG_B_T3_ALPHA (8 << 4) -# define RADEON_ALPHA_ARG_C_SHIFT 8 -# define RADEON_ALPHA_ARG_C_MASK (0xf << 8) -# define RADEON_ALPHA_ARG_C_ZERO (0 << 8) -# define RADEON_ALPHA_ARG_C_CURRENT_ALPHA (1 << 8) -# define RADEON_ALPHA_ARG_C_DIFFUSE_ALPHA (2 << 8) -# define RADEON_ALPHA_ARG_C_SPECULAR_ALPHA (3 << 8) -# define RADEON_ALPHA_ARG_C_TFACTOR_ALPHA (4 << 8) -# define RADEON_ALPHA_ARG_C_T0_ALPHA (5 << 8) -# define RADEON_ALPHA_ARG_C_T1_ALPHA (6 << 8) -# define RADEON_ALPHA_ARG_C_T2_ALPHA (7 << 8) -# define RADEON_ALPHA_ARG_C_T3_ALPHA (8 << 8) -# define RADEON_DOT_ALPHA_DONT_REPLICATE (1 << 9) -# define RADEON_ALPHA_ARG_MASK 0xf - -#define RADEON_PP_TFACTOR_0 0x1c68 -#define RADEON_PP_TFACTOR_1 0x1c80 -#define RADEON_PP_TFACTOR_2 0x1c98 - -#define RADEON_RB3D_BLENDCNTL 0x1c20 -# define RADEON_COMB_FCN_MASK (3 << 12) -# define RADEON_COMB_FCN_ADD_CLAMP (0 << 12) -# define RADEON_COMB_FCN_ADD_NOCLAMP (1 << 12) -# define RADEON_COMB_FCN_SUB_CLAMP (2 << 12) -# define RADEON_COMB_FCN_SUB_NOCLAMP (3 << 12) -# define RADEON_SRC_BLEND_GL_ZERO (32 << 16) -# define RADEON_SRC_BLEND_GL_ONE (33 << 16) -# define RADEON_SRC_BLEND_GL_SRC_COLOR (34 << 16) -# define RADEON_SRC_BLEND_GL_ONE_MINUS_SRC_COLOR (35 << 16) -# define RADEON_SRC_BLEND_GL_DST_COLOR (36 << 16) -# define RADEON_SRC_BLEND_GL_ONE_MINUS_DST_COLOR (37 << 16) -# define RADEON_SRC_BLEND_GL_SRC_ALPHA (38 << 16) -# define RADEON_SRC_BLEND_GL_ONE_MINUS_SRC_ALPHA (39 << 16) -# define RADEON_SRC_BLEND_GL_DST_ALPHA (40 << 16) -# define RADEON_SRC_BLEND_GL_ONE_MINUS_DST_ALPHA (41 << 16) -# define RADEON_SRC_BLEND_GL_SRC_ALPHA_SATURATE (42 << 16) -# define RADEON_SRC_BLEND_MASK (63 << 16) -# define RADEON_DST_BLEND_GL_ZERO (32 << 24) -# define RADEON_DST_BLEND_GL_ONE (33 << 24) -# define RADEON_DST_BLEND_GL_SRC_COLOR (34 << 24) -# define RADEON_DST_BLEND_GL_ONE_MINUS_SRC_COLOR (35 << 24) -# define RADEON_DST_BLEND_GL_DST_COLOR (36 << 24) -# define RADEON_DST_BLEND_GL_ONE_MINUS_DST_COLOR (37 << 24) -# define RADEON_DST_BLEND_GL_SRC_ALPHA (38 << 24) -# define RADEON_DST_BLEND_GL_ONE_MINUS_SRC_ALPHA (39 << 24) -# define RADEON_DST_BLEND_GL_DST_ALPHA (40 << 24) -# define RADEON_DST_BLEND_GL_ONE_MINUS_DST_ALPHA (41 << 24) -# define RADEON_DST_BLEND_MASK (63 << 24) -#define RADEON_RB3D_CNTL 0x1c3c -# define RADEON_ALPHA_BLEND_ENABLE (1 << 0) -# define RADEON_PLANE_MASK_ENABLE (1 << 1) -# define RADEON_DITHER_ENABLE (1 << 2) -# define RADEON_ROUND_ENABLE (1 << 3) -# define RADEON_SCALE_DITHER_ENABLE (1 << 4) -# define RADEON_DITHER_INIT (1 << 5) -# define RADEON_ROP_ENABLE (1 << 6) -# define RADEON_STENCIL_ENABLE (1 << 7) -# define RADEON_Z_ENABLE (1 << 8) -# define RADEON_DEPTH_XZ_OFFEST_ENABLE (1 << 9) -# define RADEON_COLOR_FORMAT_ARGB1555 (3 << 10) -# define RADEON_COLOR_FORMAT_RGB565 (4 << 10) -# define RADEON_COLOR_FORMAT_ARGB8888 (6 << 10) -# define RADEON_COLOR_FORMAT_RGB332 (7 << 10) -# define RADEON_COLOR_FORMAT_Y8 (8 << 10) -# define RADEON_COLOR_FORMAT_RGB8 (9 << 10) -# define RADEON_COLOR_FORMAT_YUV422_VYUY (11 << 10) -# define RADEON_COLOR_FORMAT_YUV422_YVYU (12 << 10) -# define RADEON_COLOR_FORMAT_aYUV444 (14 << 10) -# define RADEON_COLOR_FORMAT_ARGB4444 (15 << 10) -# define RADEON_CLRCMP_FLIP_ENABLE (1 << 14) -#define RADEON_RB3D_COLOROFFSET 0x1c40 -# define RADEON_COLOROFFSET_MASK 0xfffffff0 -#define RADEON_RB3D_COLORPITCH 0x1c48 -# define RADEON_COLORPITCH_MASK 0x000001ff8 -# define RADEON_COLOR_TILE_ENABLE (1 << 16) -# define RADEON_COLOR_MICROTILE_ENABLE (1 << 17) -# define RADEON_COLOR_ENDIAN_NO_SWAP (0 << 18) -# define RADEON_COLOR_ENDIAN_WORD_SWAP (1 << 18) -# define RADEON_COLOR_ENDIAN_DWORD_SWAP (2 << 18) -#define RADEON_RB3D_DEPTHOFFSET 0x1c24 -#define RADEON_RB3D_DEPTHPITCH 0x1c28 -# define RADEON_DEPTHPITCH_MASK 0x00001ff8 -# define RADEON_DEPTH_ENDIAN_NO_SWAP (0 << 18) -# define RADEON_DEPTH_ENDIAN_WORD_SWAP (1 << 18) -# define RADEON_DEPTH_ENDIAN_DWORD_SWAP (2 << 18) -#define RADEON_RB3D_PLANEMASK 0x1d84 -#define RADEON_RB3D_ROPCNTL 0x1d80 -# define RADEON_ROP_MASK (15 << 8) -# define RADEON_ROP_CLEAR (0 << 8) -# define RADEON_ROP_NOR (1 << 8) -# define RADEON_ROP_AND_INVERTED (2 << 8) -# define RADEON_ROP_COPY_INVERTED (3 << 8) -# define RADEON_ROP_AND_REVERSE (4 << 8) -# define RADEON_ROP_INVERT (5 << 8) -# define RADEON_ROP_XOR (6 << 8) -# define RADEON_ROP_NAND (7 << 8) -# define RADEON_ROP_AND (8 << 8) -# define RADEON_ROP_EQUIV (9 << 8) -# define RADEON_ROP_NOOP (10 << 8) -# define RADEON_ROP_OR_INVERTED (11 << 8) -# define RADEON_ROP_COPY (12 << 8) -# define RADEON_ROP_OR_REVERSE (13 << 8) -# define RADEON_ROP_OR (14 << 8) -# define RADEON_ROP_SET (15 << 8) -#define RADEON_RB3D_STENCILREFMASK 0x1d7c -# define RADEON_STENCIL_REF_SHIFT 0 -# define RADEON_STENCIL_REF_MASK (0xff << 0) -# define RADEON_STENCIL_MASK_SHIFT 16 -# define RADEON_STENCIL_VALUE_MASK (0xff << 16) -# define RADEON_STENCIL_WRITEMASK_SHIFT 24 -# define RADEON_STENCIL_WRITE_MASK (0xff << 24) -#define RADEON_RB3D_ZSTENCILCNTL 0x1c2c -# define RADEON_DEPTH_FORMAT_MASK (0xf << 0) -# define RADEON_DEPTH_FORMAT_16BIT_INT_Z (0 << 0) -# define RADEON_DEPTH_FORMAT_24BIT_INT_Z (2 << 0) -# define RADEON_DEPTH_FORMAT_24BIT_FLOAT_Z (3 << 0) -# define RADEON_DEPTH_FORMAT_32BIT_INT_Z (4 << 0) -# define RADEON_DEPTH_FORMAT_32BIT_FLOAT_Z (5 << 0) -# define RADEON_DEPTH_FORMAT_16BIT_FLOAT_W (7 << 0) -# define RADEON_DEPTH_FORMAT_24BIT_FLOAT_W (9 << 0) -# define RADEON_DEPTH_FORMAT_32BIT_FLOAT_W (11 << 0) -# define RADEON_Z_TEST_NEVER (0 << 4) -# define RADEON_Z_TEST_LESS (1 << 4) -# define RADEON_Z_TEST_LEQUAL (2 << 4) -# define RADEON_Z_TEST_EQUAL (3 << 4) -# define RADEON_Z_TEST_GEQUAL (4 << 4) -# define RADEON_Z_TEST_GREATER (5 << 4) -# define RADEON_Z_TEST_NEQUAL (6 << 4) -# define RADEON_Z_TEST_ALWAYS (7 << 4) -# define RADEON_Z_TEST_MASK (7 << 4) -# define RADEON_STENCIL_TEST_NEVER (0 << 12) -# define RADEON_STENCIL_TEST_LESS (1 << 12) -# define RADEON_STENCIL_TEST_LEQUAL (2 << 12) -# define RADEON_STENCIL_TEST_EQUAL (3 << 12) -# define RADEON_STENCIL_TEST_GEQUAL (4 << 12) -# define RADEON_STENCIL_TEST_GREATER (5 << 12) -# define RADEON_STENCIL_TEST_NEQUAL (6 << 12) -# define RADEON_STENCIL_TEST_ALWAYS (7 << 12) -# define RADEON_STENCIL_TEST_MASK (0x7 << 12) -# define RADEON_STENCIL_FAIL_KEEP (0 << 16) -# define RADEON_STENCIL_FAIL_ZERO (1 << 16) -# define RADEON_STENCIL_FAIL_REPLACE (2 << 16) -# define RADEON_STENCIL_FAIL_INC (3 << 16) -# define RADEON_STENCIL_FAIL_DEC (4 << 16) -# define RADEON_STENCIL_FAIL_INVERT (5 << 16) -# define RADEON_STENCIL_FAIL_MASK (0x7 << 16) -# define RADEON_STENCIL_ZPASS_KEEP (0 << 20) -# define RADEON_STENCIL_ZPASS_ZERO (1 << 20) -# define RADEON_STENCIL_ZPASS_REPLACE (2 << 20) -# define RADEON_STENCIL_ZPASS_INC (3 << 20) -# define RADEON_STENCIL_ZPASS_DEC (4 << 20) -# define RADEON_STENCIL_ZPASS_INVERT (5 << 20) -# define RADEON_STENCIL_ZPASS_MASK (0x7 << 20) -# define RADEON_STENCIL_ZFAIL_KEEP (0 << 24) -# define RADEON_STENCIL_ZFAIL_ZERO (1 << 24) -# define RADEON_STENCIL_ZFAIL_REPLACE (2 << 24) -# define RADEON_STENCIL_ZFAIL_INC (3 << 24) -# define RADEON_STENCIL_ZFAIL_DEC (4 << 24) -# define RADEON_STENCIL_ZFAIL_INVERT (5 << 24) -# define RADEON_STENCIL_ZFAIL_MASK (0x7 << 24) -# define RADEON_Z_COMPRESSION_ENABLE (1 << 28) -# define RADEON_FORCE_Z_DIRTY (1 << 29) -# define RADEON_Z_WRITE_ENABLE (1 << 30) -#define RADEON_RE_LINE_PATTERN 0x1cd0 -# define RADEON_LINE_PATTERN_MASK 0x0000ffff -# define RADEON_LINE_REPEAT_COUNT_SHIFT 16 -# define RADEON_LINE_PATTERN_START_SHIFT 24 -# define RADEON_LINE_PATTERN_LITTLE_BIT_ORDER (0 << 28) -# define RADEON_LINE_PATTERN_BIG_BIT_ORDER (1 << 28) -# define RADEON_LINE_PATTERN_AUTO_RESET (1 << 29) -#define RADEON_RE_LINE_STATE 0x1cd4 -# define RADEON_LINE_CURRENT_PTR_SHIFT 0 -# define RADEON_LINE_CURRENT_COUNT_SHIFT 8 -#define RADEON_RE_MISC 0x26c4 -# define RADEON_STIPPLE_COORD_MASK 0x1f -# define RADEON_STIPPLE_X_OFFSET_SHIFT 0 -# define RADEON_STIPPLE_X_OFFSET_MASK (0x1f << 0) -# define RADEON_STIPPLE_Y_OFFSET_SHIFT 8 -# define RADEON_STIPPLE_Y_OFFSET_MASK (0x1f << 8) -# define RADEON_STIPPLE_LITTLE_BIT_ORDER (0 << 16) -# define RADEON_STIPPLE_BIG_BIT_ORDER (1 << 16) -#define RADEON_RE_SOLID_COLOR 0x1c1c -#define RADEON_RE_TOP_LEFT 0x26c0 -# define RADEON_RE_LEFT_SHIFT 0 -# define RADEON_RE_TOP_SHIFT 16 -#define RADEON_RE_WIDTH_HEIGHT 0x1c44 -# define RADEON_RE_WIDTH_SHIFT 0 -# define RADEON_RE_HEIGHT_SHIFT 16 - -#define RADEON_SE_CNTL 0x1c4c -# define RADEON_FFACE_CULL_CW (0 << 0) -# define RADEON_FFACE_CULL_CCW (1 << 0) -# define RADEON_FFACE_CULL_DIR_MASK (1 << 0) -# define RADEON_BFACE_CULL (0 << 1) -# define RADEON_BFACE_SOLID (3 << 1) -# define RADEON_FFACE_CULL (0 << 3) -# define RADEON_FFACE_SOLID (3 << 3) -# define RADEON_FFACE_CULL_MASK (3 << 3) -# define RADEON_BADVTX_CULL_DISABLE (1 << 5) -# define RADEON_FLAT_SHADE_VTX_0 (0 << 6) -# define RADEON_FLAT_SHADE_VTX_1 (1 << 6) -# define RADEON_FLAT_SHADE_VTX_2 (2 << 6) -# define RADEON_FLAT_SHADE_VTX_LAST (3 << 6) -# define RADEON_DIFFUSE_SHADE_SOLID (0 << 8) -# define RADEON_DIFFUSE_SHADE_FLAT (1 << 8) -# define RADEON_DIFFUSE_SHADE_GOURAUD (2 << 8) -# define RADEON_DIFFUSE_SHADE_MASK (3 << 8) -# define RADEON_ALPHA_SHADE_SOLID (0 << 10) -# define RADEON_ALPHA_SHADE_FLAT (1 << 10) -# define RADEON_ALPHA_SHADE_GOURAUD (2 << 10) -# define RADEON_ALPHA_SHADE_MASK (3 << 10) -# define RADEON_SPECULAR_SHADE_SOLID (0 << 12) -# define RADEON_SPECULAR_SHADE_FLAT (1 << 12) -# define RADEON_SPECULAR_SHADE_GOURAUD (2 << 12) -# define RADEON_SPECULAR_SHADE_MASK (3 << 12) -# define RADEON_FOG_SHADE_SOLID (0 << 14) -# define RADEON_FOG_SHADE_FLAT (1 << 14) -# define RADEON_FOG_SHADE_GOURAUD (2 << 14) -# define RADEON_FOG_SHADE_MASK (3 << 14) -# define RADEON_ZBIAS_ENABLE_POINT (1 << 16) -# define RADEON_ZBIAS_ENABLE_LINE (1 << 17) -# define RADEON_ZBIAS_ENABLE_TRI (1 << 18) -# define RADEON_WIDELINE_ENABLE (1 << 20) -# define RADEON_VPORT_XY_XFORM_ENABLE (1 << 24) -# define RADEON_VPORT_Z_XFORM_ENABLE (1 << 25) -# define RADEON_VTX_PIX_CENTER_D3D (0 << 27) -# define RADEON_VTX_PIX_CENTER_OGL (1 << 27) -# define RADEON_ROUND_MODE_TRUNC (0 << 28) -# define RADEON_ROUND_MODE_ROUND (1 << 28) -# define RADEON_ROUND_MODE_ROUND_EVEN (2 << 28) -# define RADEON_ROUND_MODE_ROUND_ODD (3 << 28) -# define RADEON_ROUND_PREC_16TH_PIX (0 << 30) -# define RADEON_ROUND_PREC_8TH_PIX (1 << 30) -# define RADEON_ROUND_PREC_4TH_PIX (2 << 30) -# define RADEON_ROUND_PREC_HALF_PIX (3 << 30) -#define R200_RE_CNTL 0x1c50 -# define R200_STIPPLE_ENABLE 0x1 -# define R200_SCISSOR_ENABLE 0x2 -# define R200_PATTERN_ENABLE 0x4 -# define R200_PERSPECTIVE_ENABLE 0x8 -# define R200_POINT_SMOOTH 0x20 -# define R200_VTX_STQ0_D3D 0x00010000 -# define R200_VTX_STQ1_D3D 0x00040000 -# define R200_VTX_STQ2_D3D 0x00100000 -# define R200_VTX_STQ3_D3D 0x00400000 -# define R200_VTX_STQ4_D3D 0x01000000 -# define R200_VTX_STQ5_D3D 0x04000000 -#define RADEON_SE_CNTL_STATUS 0x2140 -# define RADEON_VC_NO_SWAP (0 << 0) -# define RADEON_VC_16BIT_SWAP (1 << 0) -# define RADEON_VC_32BIT_SWAP (2 << 0) -# define RADEON_VC_HALF_DWORD_SWAP (3 << 0) -# define RADEON_TCL_BYPASS (1 << 8) -#define RADEON_SE_COORD_FMT 0x1c50 -# define RADEON_VTX_XY_PRE_MULT_1_OVER_W0 (1 << 0) -# define RADEON_VTX_Z_PRE_MULT_1_OVER_W0 (1 << 1) -# define RADEON_VTX_ST0_NONPARAMETRIC (1 << 8) -# define RADEON_VTX_ST1_NONPARAMETRIC (1 << 9) -# define RADEON_VTX_ST2_NONPARAMETRIC (1 << 10) -# define RADEON_VTX_ST3_NONPARAMETRIC (1 << 11) -# define RADEON_VTX_W0_NORMALIZE (1 << 12) -# define RADEON_VTX_W0_IS_NOT_1_OVER_W0 (1 << 16) -# define RADEON_VTX_ST0_PRE_MULT_1_OVER_W0 (1 << 17) -# define RADEON_VTX_ST1_PRE_MULT_1_OVER_W0 (1 << 19) -# define RADEON_VTX_ST2_PRE_MULT_1_OVER_W0 (1 << 21) -# define RADEON_VTX_ST3_PRE_MULT_1_OVER_W0 (1 << 23) -# define RADEON_TEX1_W_ROUTING_USE_W0 (0 << 26) -# define RADEON_TEX1_W_ROUTING_USE_Q1 (1 << 26) -#define RADEON_SE_LINE_WIDTH 0x1db8 -#define RADEON_SE_TCL_LIGHT_MODEL_CTL 0x226c -# define RADEON_LIGHTING_ENABLE (1 << 0) -# define RADEON_LIGHT_IN_MODELSPACE (1 << 1) -# define RADEON_LOCAL_VIEWER (1 << 2) -# define RADEON_NORMALIZE_NORMALS (1 << 3) -# define RADEON_RESCALE_NORMALS (1 << 4) -# define RADEON_SPECULAR_LIGHTS (1 << 5) -# define RADEON_DIFFUSE_SPECULAR_COMBINE (1 << 6) -# define RADEON_LIGHT_ALPHA (1 << 7) -# define RADEON_LOCAL_LIGHT_VEC_GL (1 << 8) -# define RADEON_LIGHT_NO_NORMAL_AMBIENT_ONLY (1 << 9) -# define RADEON_LM_SOURCE_STATE_PREMULT 0 -# define RADEON_LM_SOURCE_STATE_MULT 1 -# define RADEON_LM_SOURCE_VERTEX_DIFFUSE 2 -# define RADEON_LM_SOURCE_VERTEX_SPECULAR 3 -# define RADEON_EMISSIVE_SOURCE_SHIFT 16 -# define RADEON_AMBIENT_SOURCE_SHIFT 18 -# define RADEON_DIFFUSE_SOURCE_SHIFT 20 -# define RADEON_SPECULAR_SOURCE_SHIFT 22 -#define RADEON_SE_TCL_MATERIAL_AMBIENT_RED 0x2220 -#define RADEON_SE_TCL_MATERIAL_AMBIENT_GREEN 0x2224 -#define RADEON_SE_TCL_MATERIAL_AMBIENT_BLUE 0x2228 -#define RADEON_SE_TCL_MATERIAL_AMBIENT_ALPHA 0x222c -#define RADEON_SE_TCL_MATERIAL_DIFFUSE_RED 0x2230 -#define RADEON_SE_TCL_MATERIAL_DIFFUSE_GREEN 0x2234 -#define RADEON_SE_TCL_MATERIAL_DIFFUSE_BLUE 0x2238 -#define RADEON_SE_TCL_MATERIAL_DIFFUSE_ALPHA 0x223c -#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED 0x2210 -#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_GREEN 0x2214 -#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_BLUE 0x2218 -#define RADEON_SE_TCL_MATERIAL_EMMISSIVE_ALPHA 0x221c -#define RADEON_SE_TCL_MATERIAL_SPECULAR_RED 0x2240 -#define RADEON_SE_TCL_MATERIAL_SPECULAR_GREEN 0x2244 -#define RADEON_SE_TCL_MATERIAL_SPECULAR_BLUE 0x2248 -#define RADEON_SE_TCL_MATERIAL_SPECULAR_ALPHA 0x224c -#define RADEON_SE_TCL_MATRIX_SELECT_0 0x225c -# define RADEON_MODELVIEW_0_SHIFT 0 -# define RADEON_MODELVIEW_1_SHIFT 4 -# define RADEON_MODELVIEW_2_SHIFT 8 -# define RADEON_MODELVIEW_3_SHIFT 12 -# define RADEON_IT_MODELVIEW_0_SHIFT 16 -# define RADEON_IT_MODELVIEW_1_SHIFT 20 -# define RADEON_IT_MODELVIEW_2_SHIFT 24 -# define RADEON_IT_MODELVIEW_3_SHIFT 28 -#define RADEON_SE_TCL_MATRIX_SELECT_1 0x2260 -# define RADEON_MODELPROJECT_0_SHIFT 0 -# define RADEON_MODELPROJECT_1_SHIFT 4 -# define RADEON_MODELPROJECT_2_SHIFT 8 -# define RADEON_MODELPROJECT_3_SHIFT 12 -# define RADEON_TEXMAT_0_SHIFT 16 -# define RADEON_TEXMAT_1_SHIFT 20 -# define RADEON_TEXMAT_2_SHIFT 24 -# define RADEON_TEXMAT_3_SHIFT 28 - - -#define RADEON_SE_TCL_OUTPUT_VTX_FMT 0x2254 -# define RADEON_TCL_VTX_W0 (1 << 0) -# define RADEON_TCL_VTX_FP_DIFFUSE (1 << 1) -# define RADEON_TCL_VTX_FP_ALPHA (1 << 2) -# define RADEON_TCL_VTX_PK_DIFFUSE (1 << 3) -# define RADEON_TCL_VTX_FP_SPEC (1 << 4) -# define RADEON_TCL_VTX_FP_FOG (1 << 5) -# define RADEON_TCL_VTX_PK_SPEC (1 << 6) -# define RADEON_TCL_VTX_ST0 (1 << 7) -# define RADEON_TCL_VTX_ST1 (1 << 8) -# define RADEON_TCL_VTX_Q1 (1 << 9) -# define RADEON_TCL_VTX_ST2 (1 << 10) -# define RADEON_TCL_VTX_Q2 (1 << 11) -# define RADEON_TCL_VTX_ST3 (1 << 12) -# define RADEON_TCL_VTX_Q3 (1 << 13) -# define RADEON_TCL_VTX_Q0 (1 << 14) -# define RADEON_TCL_VTX_WEIGHT_COUNT_SHIFT 15 -# define RADEON_TCL_VTX_NORM0 (1 << 18) -# define RADEON_TCL_VTX_XY1 (1 << 27) -# define RADEON_TCL_VTX_Z1 (1 << 28) -# define RADEON_TCL_VTX_W1 (1 << 29) -# define RADEON_TCL_VTX_NORM1 (1 << 30) -# define RADEON_TCL_VTX_Z0 (1 << 31) - -#define RADEON_SE_TCL_OUTPUT_VTX_SEL 0x2258 -# define RADEON_TCL_COMPUTE_XYZW (1 << 0) -# define RADEON_TCL_COMPUTE_DIFFUSE (1 << 1) -# define RADEON_TCL_COMPUTE_SPECULAR (1 << 2) -# define RADEON_TCL_FORCE_NAN_IF_COLOR_NAN (1 << 3) -# define RADEON_TCL_FORCE_INORDER_PROC (1 << 4) -# define RADEON_TCL_TEX_INPUT_TEX_0 0 -# define RADEON_TCL_TEX_INPUT_TEX_1 1 -# define RADEON_TCL_TEX_INPUT_TEX_2 2 -# define RADEON_TCL_TEX_INPUT_TEX_3 3 -# define RADEON_TCL_TEX_COMPUTED_TEX_0 8 -# define RADEON_TCL_TEX_COMPUTED_TEX_1 9 -# define RADEON_TCL_TEX_COMPUTED_TEX_2 10 -# define RADEON_TCL_TEX_COMPUTED_TEX_3 11 -# define RADEON_TCL_TEX_0_OUTPUT_SHIFT 16 -# define RADEON_TCL_TEX_1_OUTPUT_SHIFT 20 -# define RADEON_TCL_TEX_2_OUTPUT_SHIFT 24 -# define RADEON_TCL_TEX_3_OUTPUT_SHIFT 28 - -#define RADEON_SE_TCL_PER_LIGHT_CTL_0 0x2270 -# define RADEON_LIGHT_0_ENABLE (1 << 0) -# define RADEON_LIGHT_0_ENABLE_AMBIENT (1 << 1) -# define RADEON_LIGHT_0_ENABLE_SPECULAR (1 << 2) -# define RADEON_LIGHT_0_IS_LOCAL (1 << 3) -# define RADEON_LIGHT_0_IS_SPOT (1 << 4) -# define RADEON_LIGHT_0_DUAL_CONE (1 << 5) -# define RADEON_LIGHT_0_ENABLE_RANGE_ATTEN (1 << 6) -# define RADEON_LIGHT_0_CONSTANT_RANGE_ATTEN (1 << 7) -# define RADEON_LIGHT_0_SHIFT 0 -# define RADEON_LIGHT_1_ENABLE (1 << 16) -# define RADEON_LIGHT_1_ENABLE_AMBIENT (1 << 17) -# define RADEON_LIGHT_1_ENABLE_SPECULAR (1 << 18) -# define RADEON_LIGHT_1_IS_LOCAL (1 << 19) -# define RADEON_LIGHT_1_IS_SPOT (1 << 20) -# define RADEON_LIGHT_1_DUAL_CONE (1 << 21) -# define RADEON_LIGHT_1_ENABLE_RANGE_ATTEN (1 << 22) -# define RADEON_LIGHT_1_CONSTANT_RANGE_ATTEN (1 << 23) -# define RADEON_LIGHT_1_SHIFT 16 -#define RADEON_SE_TCL_PER_LIGHT_CTL_1 0x2274 -# define RADEON_LIGHT_2_SHIFT 0 -# define RADEON_LIGHT_3_SHIFT 16 -#define RADEON_SE_TCL_PER_LIGHT_CTL_2 0x2278 -# define RADEON_LIGHT_4_SHIFT 0 -# define RADEON_LIGHT_5_SHIFT 16 -#define RADEON_SE_TCL_PER_LIGHT_CTL_3 0x227c -# define RADEON_LIGHT_6_SHIFT 0 -# define RADEON_LIGHT_7_SHIFT 16 - -#define RADEON_SE_TCL_SHININESS 0x2250 - -#define RADEON_SE_TCL_TEXTURE_PROC_CTL 0x2268 -# define RADEON_TEXGEN_TEXMAT_0_ENABLE (1 << 0) -# define RADEON_TEXGEN_TEXMAT_1_ENABLE (1 << 1) -# define RADEON_TEXGEN_TEXMAT_2_ENABLE (1 << 2) -# define RADEON_TEXGEN_TEXMAT_3_ENABLE (1 << 3) -# define RADEON_TEXMAT_0_ENABLE (1 << 4) -# define RADEON_TEXMAT_1_ENABLE (1 << 5) -# define RADEON_TEXMAT_2_ENABLE (1 << 6) -# define RADEON_TEXMAT_3_ENABLE (1 << 7) -# define RADEON_TEXGEN_INPUT_MASK 0xf -# define RADEON_TEXGEN_INPUT_TEXCOORD_0 0 -# define RADEON_TEXGEN_INPUT_TEXCOORD_1 1 -# define RADEON_TEXGEN_INPUT_TEXCOORD_2 2 -# define RADEON_TEXGEN_INPUT_TEXCOORD_3 3 -# define RADEON_TEXGEN_INPUT_OBJ 4 -# define RADEON_TEXGEN_INPUT_EYE 5 -# define RADEON_TEXGEN_INPUT_EYE_NORMAL 6 -# define RADEON_TEXGEN_INPUT_EYE_REFLECT 7 -# define RADEON_TEXGEN_INPUT_EYE_NORMALIZED 8 -# define RADEON_TEXGEN_0_INPUT_SHIFT 16 -# define RADEON_TEXGEN_1_INPUT_SHIFT 20 -# define RADEON_TEXGEN_2_INPUT_SHIFT 24 -# define RADEON_TEXGEN_3_INPUT_SHIFT 28 - -#define RADEON_SE_TCL_UCP_VERT_BLEND_CTL 0x2264 -# define RADEON_UCP_IN_CLIP_SPACE (1 << 0) -# define RADEON_UCP_IN_MODEL_SPACE (1 << 1) -# define RADEON_UCP_ENABLE_0 (1 << 2) -# define RADEON_UCP_ENABLE_1 (1 << 3) -# define RADEON_UCP_ENABLE_2 (1 << 4) -# define RADEON_UCP_ENABLE_3 (1 << 5) -# define RADEON_UCP_ENABLE_4 (1 << 6) -# define RADEON_UCP_ENABLE_5 (1 << 7) -# define RADEON_TCL_FOG_MASK (3 << 8) -# define RADEON_TCL_FOG_DISABLE (0 << 8) -# define RADEON_TCL_FOG_EXP (1 << 8) -# define RADEON_TCL_FOG_EXP2 (2 << 8) -# define RADEON_TCL_FOG_LINEAR (3 << 8) -# define RADEON_RNG_BASED_FOG (1 << 10) -# define RADEON_LIGHT_TWOSIDE (1 << 11) -# define RADEON_BLEND_OP_COUNT_MASK (7 << 12) -# define RADEON_BLEND_OP_COUNT_SHIFT 12 -# define RADEON_POSITION_BLEND_OP_ENABLE (1 << 16) -# define RADEON_NORMAL_BLEND_OP_ENABLE (1 << 17) -# define RADEON_VERTEX_BLEND_SRC_0_PRIMARY (1 << 18) -# define RADEON_VERTEX_BLEND_SRC_0_SECONDARY (1 << 18) -# define RADEON_VERTEX_BLEND_SRC_1_PRIMARY (1 << 19) -# define RADEON_VERTEX_BLEND_SRC_1_SECONDARY (1 << 19) -# define RADEON_VERTEX_BLEND_SRC_2_PRIMARY (1 << 20) -# define RADEON_VERTEX_BLEND_SRC_2_SECONDARY (1 << 20) -# define RADEON_VERTEX_BLEND_SRC_3_PRIMARY (1 << 21) -# define RADEON_VERTEX_BLEND_SRC_3_SECONDARY (1 << 21) -# define RADEON_VERTEX_BLEND_WGT_MINUS_ONE (1 << 22) -# define RADEON_CULL_FRONT_IS_CW (0 << 28) -# define RADEON_CULL_FRONT_IS_CCW (1 << 28) -# define RADEON_CULL_FRONT (1 << 29) -# define RADEON_CULL_BACK (1 << 30) -# define RADEON_FORCE_W_TO_ONE (1 << 31) - -#define RADEON_SE_VPORT_XSCALE 0x1d98 -#define RADEON_SE_VPORT_XOFFSET 0x1d9c -#define RADEON_SE_VPORT_YSCALE 0x1da0 -#define RADEON_SE_VPORT_YOFFSET 0x1da4 -#define RADEON_SE_VPORT_ZSCALE 0x1da8 -#define RADEON_SE_VPORT_ZOFFSET 0x1dac -#define RADEON_SE_ZBIAS_FACTOR 0x1db0 -#define RADEON_SE_ZBIAS_CONSTANT 0x1db4 - -#define RADEON_SE_VTX_FMT 0x2080 -# define RADEON_SE_VTX_FMT_XY 0x00000000 -# define RADEON_SE_VTX_FMT_W0 0x00000001 -# define RADEON_SE_VTX_FMT_FPCOLOR 0x00000002 -# define RADEON_SE_VTX_FMT_FPALPHA 0x00000004 -# define RADEON_SE_VTX_FMT_PKCOLOR 0x00000008 -# define RADEON_SE_VTX_FMT_FPSPEC 0x00000010 -# define RADEON_SE_VTX_FMT_FPFOG 0x00000020 -# define RADEON_SE_VTX_FMT_PKSPEC 0x00000040 -# define RADEON_SE_VTX_FMT_ST0 0x00000080 -# define RADEON_SE_VTX_FMT_ST1 0x00000100 -# define RADEON_SE_VTX_FMT_Q1 0x00000200 -# define RADEON_SE_VTX_FMT_ST2 0x00000400 -# define RADEON_SE_VTX_FMT_Q2 0x00000800 -# define RADEON_SE_VTX_FMT_ST3 0x00001000 -# define RADEON_SE_VTX_FMT_Q3 0x00002000 -# define RADEON_SE_VTX_FMT_Q0 0x00004000 -# define RADEON_SE_VTX_FMT_BLND_WEIGHT_CNT_MASK 0x00038000 -# define RADEON_SE_VTX_FMT_N0 0x00040000 -# define RADEON_SE_VTX_FMT_XY1 0x08000000 -# define RADEON_SE_VTX_FMT_Z1 0x10000000 -# define RADEON_SE_VTX_FMT_W1 0x20000000 -# define RADEON_SE_VTX_FMT_N1 0x40000000 -# define RADEON_SE_VTX_FMT_Z 0x80000000 - -#define RADEON_SE_VF_CNTL 0x2084 -# define RADEON_VF_PRIM_TYPE_POINT_LIST 1 -# define RADEON_VF_PRIM_TYPE_LINE_LIST 2 -# define RADEON_VF_PRIM_TYPE_LINE_STRIP 3 -# define RADEON_VF_PRIM_TYPE_TRIANGLE_LIST 4 -# define RADEON_VF_PRIM_TYPE_TRIANGLE_FAN 5 -# define RADEON_VF_PRIM_TYPE_TRIANGLE_STRIP 6 -# define RADEON_VF_PRIM_TYPE_TRIANGLE_FLAG 7 -# define RADEON_VF_PRIM_TYPE_RECTANGLE_LIST 8 -# define RADEON_VF_PRIM_TYPE_POINT_LIST_3 9 -# define RADEON_VF_PRIM_TYPE_LINE_LIST_3 10 -# define RADEON_VF_PRIM_TYPE_SPIRIT_LIST 11 -# define RADEON_VF_PRIM_TYPE_LINE_LOOP 12 -# define RADEON_VF_PRIM_TYPE_QUAD_LIST 13 -# define RADEON_VF_PRIM_TYPE_QUAD_STRIP 14 -# define RADEON_VF_PRIM_TYPE_POLYGON 15 -# define RADEON_VF_PRIM_WALK_STATE (0<<4) -# define RADEON_VF_PRIM_WALK_INDEX (1<<4) -# define RADEON_VF_PRIM_WALK_LIST (2<<4) -# define RADEON_VF_PRIM_WALK_DATA (3<<4) -# define RADEON_VF_COLOR_ORDER_RGBA (1<<6) -# define RADEON_VF_RADEON_MODE (1<<8) -# define RADEON_VF_TCL_OUTPUT_CTL_ENA (1<<9) -# define RADEON_VF_PROG_STREAM_ENA (1<<10) -# define RADEON_VF_INDEX_SIZE_SHIFT 11 -# define RADEON_VF_NUM_VERTICES_SHIFT 16 - -#define RADEON_SE_PORT_DATA0 0x2000 - -#define R200_SE_VAP_CNTL 0x2080 -# define R200_VAP_TCL_ENABLE 0x00000001 -# define R200_VAP_SINGLE_BUF_STATE_ENABLE 0x00000010 -# define R200_VAP_FORCE_W_TO_ONE 0x00010000 -# define R200_VAP_D3D_TEX_DEFAULT 0x00020000 -# define R200_VAP_VF_MAX_VTX_NUM__SHIFT 18 -# define R200_VAP_VF_MAX_VTX_NUM (9 << 18) -# define R200_VAP_DX_CLIP_SPACE_DEF 0x00400000 -#define R200_VF_MAX_VTX_INDX 0x210c -#define R200_VF_MIN_VTX_INDX 0x2110 -#define R200_SE_VTE_CNTL 0x20b0 -# define R200_VPORT_X_SCALE_ENA 0x00000001 -# define R200_VPORT_X_OFFSET_ENA 0x00000002 -# define R200_VPORT_Y_SCALE_ENA 0x00000004 -# define R200_VPORT_Y_OFFSET_ENA 0x00000008 -# define R200_VPORT_Z_SCALE_ENA 0x00000010 -# define R200_VPORT_Z_OFFSET_ENA 0x00000020 -# define R200_VTX_XY_FMT 0x00000100 -# define R200_VTX_Z_FMT 0x00000200 -# define R200_VTX_W0_FMT 0x00000400 -# define R200_VTX_W0_NORMALIZE 0x00000800 -# define R200_VTX_ST_DENORMALIZED 0x00001000 -#define R200_SE_VAP_CNTL_STATUS 0x2140 -# define R200_VC_NO_SWAP (0 << 0) -# define R200_VC_16BIT_SWAP (1 << 0) -# define R200_VC_32BIT_SWAP (2 << 0) -#define R200_PP_TXFILTER_0 0x2c00 -#define R200_PP_TXFILTER_1 0x2c20 -#define R200_PP_TXFILTER_2 0x2c40 -#define R200_PP_TXFILTER_3 0x2c60 -#define R200_PP_TXFILTER_4 0x2c80 -#define R200_PP_TXFILTER_5 0x2ca0 -# define R200_MAG_FILTER_NEAREST (0 << 0) -# define R200_MAG_FILTER_LINEAR (1 << 0) -# define R200_MAG_FILTER_MASK (1 << 0) -# define R200_MIN_FILTER_NEAREST (0 << 1) -# define R200_MIN_FILTER_LINEAR (1 << 1) -# define R200_MIN_FILTER_NEAREST_MIP_NEAREST (2 << 1) -# define R200_MIN_FILTER_NEAREST_MIP_LINEAR (3 << 1) -# define R200_MIN_FILTER_LINEAR_MIP_NEAREST (6 << 1) -# define R200_MIN_FILTER_LINEAR_MIP_LINEAR (7 << 1) -# define R200_MIN_FILTER_ANISO_NEAREST (8 << 1) -# define R200_MIN_FILTER_ANISO_LINEAR (9 << 1) -# define R200_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (10 << 1) -# define R200_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR (11 << 1) -# define R200_MIN_FILTER_MASK (15 << 1) -# define R200_MAX_ANISO_1_TO_1 (0 << 5) -# define R200_MAX_ANISO_2_TO_1 (1 << 5) -# define R200_MAX_ANISO_4_TO_1 (2 << 5) -# define R200_MAX_ANISO_8_TO_1 (3 << 5) -# define R200_MAX_ANISO_16_TO_1 (4 << 5) -# define R200_MAX_ANISO_MASK (7 << 5) -# define R200_MAX_MIP_LEVEL_MASK (0x0f << 16) -# define R200_MAX_MIP_LEVEL_SHIFT 16 -# define R200_YUV_TO_RGB (1 << 20) -# define R200_YUV_TEMPERATURE_COOL (0 << 21) -# define R200_YUV_TEMPERATURE_HOT (1 << 21) -# define R200_YUV_TEMPERATURE_MASK (1 << 21) -# define R200_WRAPEN_S (1 << 22) -# define R200_CLAMP_S_WRAP (0 << 23) -# define R200_CLAMP_S_MIRROR (1 << 23) -# define R200_CLAMP_S_CLAMP_LAST (2 << 23) -# define R200_CLAMP_S_MIRROR_CLAMP_LAST (3 << 23) -# define R200_CLAMP_S_CLAMP_BORDER (4 << 23) -# define R200_CLAMP_S_MIRROR_CLAMP_BORDER (5 << 23) -# define R200_CLAMP_S_CLAMP_GL (6 << 23) -# define R200_CLAMP_S_MIRROR_CLAMP_GL (7 << 23) -# define R200_CLAMP_S_MASK (7 << 23) -# define R200_WRAPEN_T (1 << 26) -# define R200_CLAMP_T_WRAP (0 << 27) -# define R200_CLAMP_T_MIRROR (1 << 27) -# define R200_CLAMP_T_CLAMP_LAST (2 << 27) -# define R200_CLAMP_T_MIRROR_CLAMP_LAST (3 << 27) -# define R200_CLAMP_T_CLAMP_BORDER (4 << 27) -# define R200_CLAMP_T_MIRROR_CLAMP_BORDER (5 << 27) -# define R200_CLAMP_T_CLAMP_GL (6 << 27) -# define R200_CLAMP_T_MIRROR_CLAMP_GL (7 << 27) -# define R200_CLAMP_T_MASK (7 << 27) -# define R200_KILL_LT_ZERO (1 << 30) -# define R200_BORDER_MODE_OGL (0 << 31) -# define R200_BORDER_MODE_D3D (1 << 31) -#define R200_PP_TXFORMAT_0 0x2c04 -#define R200_PP_TXFORMAT_1 0x2c24 -#define R200_PP_TXFORMAT_2 0x2c44 -#define R200_PP_TXFORMAT_3 0x2c64 -#define R200_PP_TXFORMAT_4 0x2c84 -#define R200_PP_TXFORMAT_5 0x2ca4 -# define R200_TXFORMAT_I8 (0 << 0) -# define R200_TXFORMAT_AI88 (1 << 0) -# define R200_TXFORMAT_RGB332 (2 << 0) -# define R200_TXFORMAT_ARGB1555 (3 << 0) -# define R200_TXFORMAT_RGB565 (4 << 0) -# define R200_TXFORMAT_ARGB4444 (5 << 0) -# define R200_TXFORMAT_ARGB8888 (6 << 0) -# define R200_TXFORMAT_RGBA8888 (7 << 0) -# define R200_TXFORMAT_Y8 (8 << 0) -# define R200_TXFORMAT_AVYU4444 (9 << 0) -# define R200_TXFORMAT_VYUY422 (10 << 0) -# define R200_TXFORMAT_YVYU422 (11 << 0) -# define R200_TXFORMAT_DXT1 (12 << 0) -# define R200_TXFORMAT_DXT23 (14 << 0) -# define R200_TXFORMAT_DXT45 (15 << 0) -# define R200_TXFORMAT_ABGR8888 (22 << 0) -# define R200_TXFORMAT_FORMAT_MASK (31 << 0) -# define R200_TXFORMAT_FORMAT_SHIFT 0 -# define R200_TXFORMAT_ALPHA_IN_MAP (1 << 6) -# define R200_TXFORMAT_NON_POWER2 (1 << 7) -# define R200_TXFORMAT_WIDTH_MASK (15 << 8) -# define R200_TXFORMAT_WIDTH_SHIFT 8 -# define R200_TXFORMAT_HEIGHT_MASK (15 << 12) -# define R200_TXFORMAT_HEIGHT_SHIFT 12 -# define R200_TXFORMAT_F5_WIDTH_MASK (15 << 16) /* cube face 5 */ -# define R200_TXFORMAT_F5_WIDTH_SHIFT 16 -# define R200_TXFORMAT_F5_HEIGHT_MASK (15 << 20) -# define R200_TXFORMAT_F5_HEIGHT_SHIFT 20 -# define R200_TXFORMAT_ST_ROUTE_STQ0 (0 << 24) -# define R200_TXFORMAT_ST_ROUTE_STQ1 (1 << 24) -# define R200_TXFORMAT_ST_ROUTE_STQ2 (2 << 24) -# define R200_TXFORMAT_ST_ROUTE_STQ3 (3 << 24) -# define R200_TXFORMAT_ST_ROUTE_STQ4 (4 << 24) -# define R200_TXFORMAT_ST_ROUTE_STQ5 (5 << 24) -# define R200_TXFORMAT_ST_ROUTE_MASK (7 << 24) -# define R200_TXFORMAT_ST_ROUTE_SHIFT 24 -# define R200_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28) -# define R200_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29) -# define R200_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) -#define R200_PP_TXFORMAT_X_0 0x2c08 -#define R200_PP_TXFORMAT_X_1 0x2c28 -#define R200_PP_TXFORMAT_X_2 0x2c48 -#define R200_PP_TXFORMAT_X_3 0x2c68 -#define R200_PP_TXFORMAT_X_4 0x2c88 -#define R200_PP_TXFORMAT_X_5 0x2ca8 - -#define R200_PP_TXSIZE_0 0x2c0c /* NPOT only */ -#define R200_PP_TXSIZE_1 0x2c2c /* NPOT only */ -#define R200_PP_TXSIZE_2 0x2c4c /* NPOT only */ -#define R200_PP_TXSIZE_3 0x2c6c /* NPOT only */ -#define R200_PP_TXSIZE_4 0x2c8c /* NPOT only */ -#define R200_PP_TXSIZE_5 0x2cac /* NPOT only */ - -#define R200_PP_TXPITCH_0 0x2c10 /* NPOT only */ -#define R200_PP_TXPITCH_1 0x2c30 /* NPOT only */ -#define R200_PP_TXPITCH_2 0x2c50 /* NPOT only */ -#define R200_PP_TXPITCH_3 0x2c70 /* NPOT only */ -#define R200_PP_TXPITCH_4 0x2c90 /* NPOT only */ -#define R200_PP_TXPITCH_5 0x2cb0 /* NPOT only */ - -#define R200_PP_TXOFFSET_0 0x2d00 -# define R200_TXO_ENDIAN_NO_SWAP (0 << 0) -# define R200_TXO_ENDIAN_BYTE_SWAP (1 << 0) -# define R200_TXO_ENDIAN_WORD_SWAP (2 << 0) -# define R200_TXO_ENDIAN_HALFDW_SWAP (3 << 0) -# define R200_TXO_MACRO_LINEAR (0 << 2) -# define R200_TXO_MACRO_TILE (1 << 2) -# define R200_TXO_MICRO_LINEAR (0 << 3) -# define R200_TXO_MICRO_TILE (1 << 3) -# define R200_TXO_OFFSET_MASK 0xffffffe0 -# define R200_TXO_OFFSET_SHIFT 5 -#define R200_PP_TXOFFSET_1 0x2d18 -#define R200_PP_TXOFFSET_2 0x2d30 -#define R200_PP_TXOFFSET_3 0x2d48 -#define R200_PP_TXOFFSET_4 0x2d60 -#define R200_PP_TXOFFSET_5 0x2d78 - -#define R200_PP_TFACTOR_0 0x2ee0 -#define R200_PP_TFACTOR_1 0x2ee4 -#define R200_PP_TFACTOR_2 0x2ee8 -#define R200_PP_TFACTOR_3 0x2eec -#define R200_PP_TFACTOR_4 0x2ef0 -#define R200_PP_TFACTOR_5 0x2ef4 - -#define R200_PP_TXCBLEND_0 0x2f00 -# define R200_TXC_ARG_A_ZERO (0) -# define R200_TXC_ARG_A_CURRENT_COLOR (2) -# define R200_TXC_ARG_A_CURRENT_ALPHA (3) -# define R200_TXC_ARG_A_DIFFUSE_COLOR (4) -# define R200_TXC_ARG_A_DIFFUSE_ALPHA (5) -# define R200_TXC_ARG_A_SPECULAR_COLOR (6) -# define R200_TXC_ARG_A_SPECULAR_ALPHA (7) -# define R200_TXC_ARG_A_TFACTOR_COLOR (8) -# define R200_TXC_ARG_A_TFACTOR_ALPHA (9) -# define R200_TXC_ARG_A_R0_COLOR (10) -# define R200_TXC_ARG_A_R0_ALPHA (11) -# define R200_TXC_ARG_A_R1_COLOR (12) -# define R200_TXC_ARG_A_R1_ALPHA (13) -# define R200_TXC_ARG_A_R2_COLOR (14) -# define R200_TXC_ARG_A_R2_ALPHA (15) -# define R200_TXC_ARG_A_R3_COLOR (16) -# define R200_TXC_ARG_A_R3_ALPHA (17) -# define R200_TXC_ARG_A_R4_COLOR (18) -# define R200_TXC_ARG_A_R4_ALPHA (19) -# define R200_TXC_ARG_A_R5_COLOR (20) -# define R200_TXC_ARG_A_R5_ALPHA (21) -# define R200_TXC_ARG_A_TFACTOR1_COLOR (26) -# define R200_TXC_ARG_A_TFACTOR1_ALPHA (27) -# define R200_TXC_ARG_A_MASK (31 << 0) -# define R200_TXC_ARG_A_SHIFT 0 -# define R200_TXC_ARG_B_ZERO (0 << 5) -# define R200_TXC_ARG_B_CURRENT_COLOR (2 << 5) -# define R200_TXC_ARG_B_CURRENT_ALPHA (3 << 5) -# define R200_TXC_ARG_B_DIFFUSE_COLOR (4 << 5) -# define R200_TXC_ARG_B_DIFFUSE_ALPHA (5 << 5) -# define R200_TXC_ARG_B_SPECULAR_COLOR (6 << 5) -# define R200_TXC_ARG_B_SPECULAR_ALPHA (7 << 5) -# define R200_TXC_ARG_B_TFACTOR_COLOR (8 << 5) -# define R200_TXC_ARG_B_TFACTOR_ALPHA (9 << 5) -# define R200_TXC_ARG_B_R0_COLOR (10 << 5) -# define R200_TXC_ARG_B_R0_ALPHA (11 << 5) -# define R200_TXC_ARG_B_R1_COLOR (12 << 5) -# define R200_TXC_ARG_B_R1_ALPHA (13 << 5) -# define R200_TXC_ARG_B_R2_COLOR (14 << 5) -# define R200_TXC_ARG_B_R2_ALPHA (15 << 5) -# define R200_TXC_ARG_B_R3_COLOR (16 << 5) -# define R200_TXC_ARG_B_R3_ALPHA (17 << 5) -# define R200_TXC_ARG_B_R4_COLOR (18 << 5) -# define R200_TXC_ARG_B_R4_ALPHA (19 << 5) -# define R200_TXC_ARG_B_R5_COLOR (20 << 5) -# define R200_TXC_ARG_B_R5_ALPHA (21 << 5) -# define R200_TXC_ARG_B_TFACTOR1_COLOR (26 << 5) -# define R200_TXC_ARG_B_TFACTOR1_ALPHA (27 << 5) -# define R200_TXC_ARG_B_MASK (31 << 5) -# define R200_TXC_ARG_B_SHIFT 5 -# define R200_TXC_ARG_C_ZERO (0 << 10) -# define R200_TXC_ARG_C_CURRENT_COLOR (2 << 10) -# define R200_TXC_ARG_C_CURRENT_ALPHA (3 << 10) -# define R200_TXC_ARG_C_DIFFUSE_COLOR (4 << 10) -# define R200_TXC_ARG_C_DIFFUSE_ALPHA (5 << 10) -# define R200_TXC_ARG_C_SPECULAR_COLOR (6 << 10) -# define R200_TXC_ARG_C_SPECULAR_ALPHA (7 << 10) -# define R200_TXC_ARG_C_TFACTOR_COLOR (8 << 10) -# define R200_TXC_ARG_C_TFACTOR_ALPHA (9 << 10) -# define R200_TXC_ARG_C_R0_COLOR (10 << 10) -# define R200_TXC_ARG_C_R0_ALPHA (11 << 10) -# define R200_TXC_ARG_C_R1_COLOR (12 << 10) -# define R200_TXC_ARG_C_R1_ALPHA (13 << 10) -# define R200_TXC_ARG_C_R2_COLOR (14 << 10) -# define R200_TXC_ARG_C_R2_ALPHA (15 << 10) -# define R200_TXC_ARG_C_R3_COLOR (16 << 10) -# define R200_TXC_ARG_C_R3_ALPHA (17 << 10) -# define R200_TXC_ARG_C_R4_COLOR (18 << 10) -# define R200_TXC_ARG_C_R4_ALPHA (19 << 10) -# define R200_TXC_ARG_C_R5_COLOR (20 << 10) -# define R200_TXC_ARG_C_R5_ALPHA (21 << 10) -# define R200_TXC_ARG_C_TFACTOR1_COLOR (26 << 10) -# define R200_TXC_ARG_C_TFACTOR1_ALPHA (27 << 10) -# define R200_TXC_ARG_C_MASK (31 << 10) -# define R200_TXC_ARG_C_SHIFT 10 -# define R200_TXC_COMP_ARG_A (1 << 16) -# define R200_TXC_COMP_ARG_A_SHIFT (16) -# define R200_TXC_BIAS_ARG_A (1 << 17) -# define R200_TXC_SCALE_ARG_A (1 << 18) -# define R200_TXC_NEG_ARG_A (1 << 19) -# define R200_TXC_COMP_ARG_B (1 << 20) -# define R200_TXC_COMP_ARG_B_SHIFT (20) -# define R200_TXC_BIAS_ARG_B (1 << 21) -# define R200_TXC_SCALE_ARG_B (1 << 22) -# define R200_TXC_NEG_ARG_B (1 << 23) -# define R200_TXC_COMP_ARG_C (1 << 24) -# define R200_TXC_COMP_ARG_C_SHIFT (24) -# define R200_TXC_BIAS_ARG_C (1 << 25) -# define R200_TXC_SCALE_ARG_C (1 << 26) -# define R200_TXC_NEG_ARG_C (1 << 27) -# define R200_TXC_OP_MADD (0 << 28) -# define R200_TXC_OP_CND0 (2 << 28) -# define R200_TXC_OP_LERP (3 << 28) -# define R200_TXC_OP_DOT3 (4 << 28) -# define R200_TXC_OP_DOT4 (5 << 28) -# define R200_TXC_OP_CONDITIONAL (6 << 28) -# define R200_TXC_OP_DOT2_ADD (7 << 28) -# define R200_TXC_OP_MASK (7 << 28) -#define R200_PP_TXCBLEND2_0 0x2f04 -# define R200_TXC_TFACTOR_SEL_SHIFT 0 -# define R200_TXC_TFACTOR_SEL_MASK 0x7 -# define R200_TXC_TFACTOR1_SEL_SHIFT 4 -# define R200_TXC_TFACTOR1_SEL_MASK (0x7 << 4) -# define R200_TXC_SCALE_SHIFT 8 -# define R200_TXC_SCALE_MASK (7 << 8) -# define R200_TXC_SCALE_1X (0 << 8) -# define R200_TXC_SCALE_2X (1 << 8) -# define R200_TXC_SCALE_4X (2 << 8) -# define R200_TXC_SCALE_8X (3 << 8) -# define R200_TXC_SCALE_INV2 (5 << 8) -# define R200_TXC_SCALE_INV4 (6 << 8) -# define R200_TXC_SCALE_INV8 (7 << 8) -# define R200_TXC_CLAMP_SHIFT 12 -# define R200_TXC_CLAMP_MASK (3 << 12) -# define R200_TXC_CLAMP_WRAP (0 << 12) -# define R200_TXC_CLAMP_0_1 (1 << 12) -# define R200_TXC_CLAMP_8_8 (2 << 12) -# define R200_TXC_OUTPUT_REG_MASK (7 << 16) -# define R200_TXC_OUTPUT_REG_NONE (0 << 16) -# define R200_TXC_OUTPUT_REG_R0 (1 << 16) -# define R200_TXC_OUTPUT_REG_R1 (2 << 16) -# define R200_TXC_OUTPUT_REG_R2 (3 << 16) -# define R200_TXC_OUTPUT_REG_R3 (4 << 16) -# define R200_TXC_OUTPUT_REG_R4 (5 << 16) -# define R200_TXC_OUTPUT_REG_R5 (6 << 16) -# define R200_TXC_OUTPUT_MASK_MASK (7 << 20) -# define R200_TXC_OUTPUT_MASK_RGB (0 << 20) -# define R200_TXC_OUTPUT_MASK_RG (1 << 20) -# define R200_TXC_OUTPUT_MASK_RB (2 << 20) -# define R200_TXC_OUTPUT_MASK_R (3 << 20) -# define R200_TXC_OUTPUT_MASK_GB (4 << 20) -# define R200_TXC_OUTPUT_MASK_G (5 << 20) -# define R200_TXC_OUTPUT_MASK_B (6 << 20) -# define R200_TXC_OUTPUT_MASK_NONE (7 << 20) -# define R200_TXC_REPL_NORMAL 0 -# define R200_TXC_REPL_RED 1 -# define R200_TXC_REPL_GREEN 2 -# define R200_TXC_REPL_BLUE 3 -# define R200_TXC_REPL_ARG_A_SHIFT 26 -# define R200_TXC_REPL_ARG_A_MASK (3 << 26) -# define R200_TXC_REPL_ARG_B_SHIFT 28 -# define R200_TXC_REPL_ARG_B_MASK (3 << 28) -# define R200_TXC_REPL_ARG_C_SHIFT 30 -# define R200_TXC_REPL_ARG_C_MASK (3 << 30) -#define R200_PP_TXABLEND_0 0x2f08 -# define R200_TXA_ARG_A_ZERO (0) -# define R200_TXA_ARG_A_CURRENT_ALPHA (2) /* guess */ -# define R200_TXA_ARG_A_CURRENT_BLUE (3) /* guess */ -# define R200_TXA_ARG_A_DIFFUSE_ALPHA (4) -# define R200_TXA_ARG_A_DIFFUSE_BLUE (5) -# define R200_TXA_ARG_A_SPECULAR_ALPHA (6) -# define R200_TXA_ARG_A_SPECULAR_BLUE (7) -# define R200_TXA_ARG_A_TFACTOR_ALPHA (8) -# define R200_TXA_ARG_A_TFACTOR_BLUE (9) -# define R200_TXA_ARG_A_R0_ALPHA (10) -# define R200_TXA_ARG_A_R0_BLUE (11) -# define R200_TXA_ARG_A_R1_ALPHA (12) -# define R200_TXA_ARG_A_R1_BLUE (13) -# define R200_TXA_ARG_A_R2_ALPHA (14) -# define R200_TXA_ARG_A_R2_BLUE (15) -# define R200_TXA_ARG_A_R3_ALPHA (16) -# define R200_TXA_ARG_A_R3_BLUE (17) -# define R200_TXA_ARG_A_R4_ALPHA (18) -# define R200_TXA_ARG_A_R4_BLUE (19) -# define R200_TXA_ARG_A_R5_ALPHA (20) -# define R200_TXA_ARG_A_R5_BLUE (21) -# define R200_TXA_ARG_A_TFACTOR1_ALPHA (26) -# define R200_TXA_ARG_A_TFACTOR1_BLUE (27) -# define R200_TXA_ARG_A_MASK (31 << 0) -# define R200_TXA_ARG_A_SHIFT 0 -# define R200_TXA_ARG_B_ZERO (0 << 5) -# define R200_TXA_ARG_B_CURRENT_ALPHA (2 << 5) /* guess */ -# define R200_TXA_ARG_B_CURRENT_BLUE (3 << 5) /* guess */ -# define R200_TXA_ARG_B_DIFFUSE_ALPHA (4 << 5) -# define R200_TXA_ARG_B_DIFFUSE_BLUE (5 << 5) -# define R200_TXA_ARG_B_SPECULAR_ALPHA (6 << 5) -# define R200_TXA_ARG_B_SPECULAR_BLUE (7 << 5) -# define R200_TXA_ARG_B_TFACTOR_ALPHA (8 << 5) -# define R200_TXA_ARG_B_TFACTOR_BLUE (9 << 5) -# define R200_TXA_ARG_B_R0_ALPHA (10 << 5) -# define R200_TXA_ARG_B_R0_BLUE (11 << 5) -# define R200_TXA_ARG_B_R1_ALPHA (12 << 5) -# define R200_TXA_ARG_B_R1_BLUE (13 << 5) -# define R200_TXA_ARG_B_R2_ALPHA (14 << 5) -# define R200_TXA_ARG_B_R2_BLUE (15 << 5) -# define R200_TXA_ARG_B_R3_ALPHA (16 << 5) -# define R200_TXA_ARG_B_R3_BLUE (17 << 5) -# define R200_TXA_ARG_B_R4_ALPHA (18 << 5) -# define R200_TXA_ARG_B_R4_BLUE (19 << 5) -# define R200_TXA_ARG_B_R5_ALPHA (20 << 5) -# define R200_TXA_ARG_B_R5_BLUE (21 << 5) -# define R200_TXA_ARG_B_TFACTOR1_ALPHA (26 << 5) -# define R200_TXA_ARG_B_TFACTOR1_BLUE (27 << 5) -# define R200_TXA_ARG_B_MASK (31 << 5) -# define R200_TXA_ARG_B_SHIFT 5 -# define R200_TXA_ARG_C_ZERO (0 << 10) -# define R200_TXA_ARG_C_CURRENT_ALPHA (2 << 10) /* guess */ -# define R200_TXA_ARG_C_CURRENT_BLUE (3 << 10) /* guess */ -# define R200_TXA_ARG_C_DIFFUSE_ALPHA (4 << 10) -# define R200_TXA_ARG_C_DIFFUSE_BLUE (5 << 10) -# define R200_TXA_ARG_C_SPECULAR_ALPHA (6 << 10) -# define R200_TXA_ARG_C_SPECULAR_BLUE (7 << 10) -# define R200_TXA_ARG_C_TFACTOR_ALPHA (8 << 10) -# define R200_TXA_ARG_C_TFACTOR_BLUE (9 << 10) -# define R200_TXA_ARG_C_R0_ALPHA (10 << 10) -# define R200_TXA_ARG_C_R0_BLUE (11 << 10) -# define R200_TXA_ARG_C_R1_ALPHA (12 << 10) -# define R200_TXA_ARG_C_R1_BLUE (13 << 10) -# define R200_TXA_ARG_C_R2_ALPHA (14 << 10) -# define R200_TXA_ARG_C_R2_BLUE (15 << 10) -# define R200_TXA_ARG_C_R3_ALPHA (16 << 10) -# define R200_TXA_ARG_C_R3_BLUE (17 << 10) -# define R200_TXA_ARG_C_R4_ALPHA (18 << 10) -# define R200_TXA_ARG_C_R4_BLUE (19 << 10) -# define R200_TXA_ARG_C_R5_ALPHA (20 << 10) -# define R200_TXA_ARG_C_R5_BLUE (21 << 10) -# define R200_TXA_ARG_C_TFACTOR1_ALPHA (26 << 10) -# define R200_TXA_ARG_C_TFACTOR1_BLUE (27 << 10) -# define R200_TXA_ARG_C_MASK (31 << 10) -# define R200_TXA_ARG_C_SHIFT 10 -# define R200_TXA_COMP_ARG_A (1 << 16) -# define R200_TXA_COMP_ARG_A_SHIFT (16) -# define R200_TXA_BIAS_ARG_A (1 << 17) -# define R200_TXA_SCALE_ARG_A (1 << 18) -# define R200_TXA_NEG_ARG_A (1 << 19) -# define R200_TXA_COMP_ARG_B (1 << 20) -# define R200_TXA_COMP_ARG_B_SHIFT (20) -# define R200_TXA_BIAS_ARG_B (1 << 21) -# define R200_TXA_SCALE_ARG_B (1 << 22) -# define R200_TXA_NEG_ARG_B (1 << 23) -# define R200_TXA_COMP_ARG_C (1 << 24) -# define R200_TXA_COMP_ARG_C_SHIFT (24) -# define R200_TXA_BIAS_ARG_C (1 << 25) -# define R200_TXA_SCALE_ARG_C (1 << 26) -# define R200_TXA_NEG_ARG_C (1 << 27) -# define R200_TXA_OP_MADD (0 << 28) -# define R200_TXA_OP_CND0 (2 << 28) -# define R200_TXA_OP_LERP (3 << 28) -# define R200_TXA_OP_CONDITIONAL (6 << 28) -# define R200_TXA_OP_MASK (7 << 28) -#define R200_PP_TXABLEND2_0 0x2f0c -# define R200_TXA_TFACTOR_SEL_SHIFT 0 -# define R200_TXA_TFACTOR_SEL_MASK 0x7 -# define R200_TXA_TFACTOR1_SEL_SHIFT 4 -# define R200_TXA_TFACTOR1_SEL_MASK (0x7 << 4) -# define R200_TXA_SCALE_SHIFT 8 -# define R200_TXA_SCALE_MASK (7 << 8) -# define R200_TXA_SCALE_1X (0 << 8) -# define R200_TXA_SCALE_2X (1 << 8) -# define R200_TXA_SCALE_4X (2 << 8) -# define R200_TXA_SCALE_8X (3 << 8) -# define R200_TXA_SCALE_INV2 (5 << 8) -# define R200_TXA_SCALE_INV4 (6 << 8) -# define R200_TXA_SCALE_INV8 (7 << 8) -# define R200_TXA_CLAMP_SHIFT 12 -# define R200_TXA_CLAMP_MASK (3 << 12) -# define R200_TXA_CLAMP_WRAP (0 << 12) -# define R200_TXA_CLAMP_0_1 (1 << 12) -# define R200_TXA_CLAMP_8_8 (2 << 12) -# define R200_TXA_OUTPUT_REG_MASK (7 << 16) -# define R200_TXA_OUTPUT_REG_NONE (0 << 16) -# define R200_TXA_OUTPUT_REG_R0 (1 << 16) -# define R200_TXA_OUTPUT_REG_R1 (2 << 16) -# define R200_TXA_OUTPUT_REG_R2 (3 << 16) -# define R200_TXA_OUTPUT_REG_R3 (4 << 16) -# define R200_TXA_OUTPUT_REG_R4 (5 << 16) -# define R200_TXA_OUTPUT_REG_R5 (6 << 16) -# define R200_TXA_DOT_ALPHA (1 << 20) -# define R200_TXA_REPL_NORMAL 0 -# define R200_TXA_REPL_RED 1 -# define R200_TXA_REPL_GREEN 2 -# define R200_TXA_REPL_ARG_A_SHIFT 26 -# define R200_TXA_REPL_ARG_A_MASK (3 << 26) -# define R200_TXA_REPL_ARG_B_SHIFT 28 -# define R200_TXA_REPL_ARG_B_MASK (3 << 28) -# define R200_TXA_REPL_ARG_C_SHIFT 30 -# define R200_TXA_REPL_ARG_C_MASK (3 << 30) - -#define R200_SE_VTX_FMT_0 0x2088 -# define R200_VTX_XY 0 /* always have xy */ -# define R200_VTX_Z0 (1<<0) -# define R200_VTX_W0 (1<<1) -# define R200_VTX_WEIGHT_COUNT_SHIFT (2) -# define R200_VTX_PV_MATRIX_SEL (1<<5) -# define R200_VTX_N0 (1<<6) -# define R200_VTX_POINT_SIZE (1<<7) -# define R200_VTX_DISCRETE_FOG (1<<8) -# define R200_VTX_SHININESS_0 (1<<9) -# define R200_VTX_SHININESS_1 (1<<10) -# define R200_VTX_COLOR_NOT_PRESENT 0 -# define R200_VTX_PK_RGBA 1 -# define R200_VTX_FP_RGB 2 -# define R200_VTX_FP_RGBA 3 -# define R200_VTX_COLOR_MASK 3 -# define R200_VTX_COLOR_0_SHIFT 11 -# define R200_VTX_COLOR_1_SHIFT 13 -# define R200_VTX_COLOR_2_SHIFT 15 -# define R200_VTX_COLOR_3_SHIFT 17 -# define R200_VTX_COLOR_4_SHIFT 19 -# define R200_VTX_COLOR_5_SHIFT 21 -# define R200_VTX_COLOR_6_SHIFT 23 -# define R200_VTX_COLOR_7_SHIFT 25 -# define R200_VTX_XY1 (1<<28) -# define R200_VTX_Z1 (1<<29) -# define R200_VTX_W1 (1<<30) -# define R200_VTX_N1 (1<<31) -#define R200_SE_VTX_FMT_1 0x208c -# define R200_VTX_TEX0_COMP_CNT_SHIFT 0 -# define R200_VTX_TEX1_COMP_CNT_SHIFT 3 -# define R200_VTX_TEX2_COMP_CNT_SHIFT 6 -# define R200_VTX_TEX3_COMP_CNT_SHIFT 9 -# define R200_VTX_TEX4_COMP_CNT_SHIFT 12 -# define R200_VTX_TEX5_COMP_CNT_SHIFT 15 - -#define R200_SE_TCL_OUTPUT_VTX_FMT_0 0x2090 -#define R200_SE_TCL_OUTPUT_VTX_FMT_1 0x2094 -#define R200_SE_TCL_OUTPUT_VTX_COMP_SEL 0x2250 -# define R200_OUTPUT_XYZW (1<<0) -# define R200_OUTPUT_COLOR_0 (1<<8) -# define R200_OUTPUT_COLOR_1 (1<<9) -# define R200_OUTPUT_TEX_0 (1<<16) -# define R200_OUTPUT_TEX_1 (1<<17) -# define R200_OUTPUT_TEX_2 (1<<18) -# define R200_OUTPUT_TEX_3 (1<<19) -# define R200_OUTPUT_TEX_4 (1<<20) -# define R200_OUTPUT_TEX_5 (1<<21) -# define R200_OUTPUT_TEX_MASK (0x3f<<16) -# define R200_OUTPUT_DISCRETE_FOG (1<<24) -# define R200_OUTPUT_PT_SIZE (1<<25) -# define R200_FORCE_INORDER_PROC (1<<31) -#define R200_PP_CNTL_X 0x2cc4 -#define R200_PP_TXMULTI_CTL_0 0x2c1c -#define R200_SE_VTX_STATE_CNTL 0x2180 -# define R200_UPDATE_USER_COLOR_0_ENA_MASK (1<<16) - - /* Registers for CP and Microcode Engine */ -#define RADEON_CP_ME_RAM_ADDR 0x07d4 -#define RADEON_CP_ME_RAM_RADDR 0x07d8 -#define RADEON_CP_ME_RAM_DATAH 0x07dc -#define RADEON_CP_ME_RAM_DATAL 0x07e0 - -#define RADEON_CP_RB_BASE 0x0700 -#define RADEON_CP_RB_CNTL 0x0704 -#define RADEON_CP_RB_RPTR_ADDR 0x070c -#define RADEON_CP_RB_RPTR 0x0710 -#define RADEON_CP_RB_WPTR 0x0714 - -#define RADEON_CP_IB_BASE 0x0738 -#define RADEON_CP_IB_BUFSZ 0x073c - -#define RADEON_CP_CSQ_CNTL 0x0740 -# define RADEON_CSQ_CNT_PRIMARY_MASK (0xff << 0) -# define RADEON_CSQ_PRIDIS_INDDIS (0 << 28) -# define RADEON_CSQ_PRIPIO_INDDIS (1 << 28) -# define RADEON_CSQ_PRIBM_INDDIS (2 << 28) -# define RADEON_CSQ_PRIPIO_INDBM (3 << 28) -# define RADEON_CSQ_PRIBM_INDBM (4 << 28) -# define RADEON_CSQ_PRIPIO_INDPIO (15 << 28) -#define RADEON_CP_CSQ_STAT 0x07f8 -# define RADEON_CSQ_RPTR_PRIMARY_MASK (0xff << 0) -# define RADEON_CSQ_WPTR_PRIMARY_MASK (0xff << 8) -# define RADEON_CSQ_RPTR_INDIRECT_MASK (0xff << 16) -# define RADEON_CSQ_WPTR_INDIRECT_MASK (0xff << 24) -#define RADEON_CP_CSQ_ADDR 0x07f0 -#define RADEON_CP_CSQ_DATA 0x07f4 -#define RADEON_CP_CSQ_APER_PRIMARY 0x1000 -#define RADEON_CP_CSQ_APER_INDIRECT 0x1300 - -#define RADEON_CP_RB_WPTR_DELAY 0x0718 -# define RADEON_PRE_WRITE_TIMER_SHIFT 0 -# define RADEON_PRE_WRITE_LIMIT_SHIFT 23 - -#define RADEON_AIC_CNTL 0x01d0 -# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) -#define RADEON_AIC_LO_ADDR 0x01dc - - - - /* Constants */ -#define RADEON_LAST_FRAME_REG RADEON_GUI_SCRATCH_REG0 -#define RADEON_LAST_CLEAR_REG RADEON_GUI_SCRATCH_REG2 - - - - /* CP packet types */ -#define RADEON_CP_PACKET0 0x00000000 -#define RADEON_CP_PACKET1 0x40000000 -#define RADEON_CP_PACKET2 0x80000000 -#define RADEON_CP_PACKET3 0xC0000000 -# define RADEON_CP_PACKET_MASK 0xC0000000 -# define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000 -# define RADEON_CP_PACKET_MAX_DWORDS (1 << 12) -# define RADEON_CP_PACKET0_REG_MASK 0x000007ff -# define RADEON_CP_PACKET1_REG0_MASK 0x000007ff -# define RADEON_CP_PACKET1_REG1_MASK 0x003ff800 - -#define RADEON_CP_PACKET0_ONE_REG_WR 0x00008000 - -#define RADEON_CP_PACKET3_NOP 0xC0001000 -#define RADEON_CP_PACKET3_NEXT_CHAR 0xC0001900 -#define RADEON_CP_PACKET3_PLY_NEXTSCAN 0xC0001D00 -#define RADEON_CP_PACKET3_SET_SCISSORS 0xC0001E00 -#define RADEON_CP_PACKET3_3D_RNDR_GEN_INDX_PRIM 0xC0002300 -#define RADEON_CP_PACKET3_LOAD_MICROCODE 0xC0002400 -#define RADEON_CP_PACKET3_WAIT_FOR_IDLE 0xC0002600 -#define RADEON_CP_PACKET3_3D_DRAW_VBUF 0xC0002800 -#define RADEON_CP_PACKET3_3D_DRAW_IMMD 0xC0002900 -#define RADEON_CP_PACKET3_3D_DRAW_INDX 0xC0002A00 -#define RADEON_CP_PACKET3_LOAD_PALETTE 0xC0002C00 -#define R200_CP_PACKET3_3D_DRAW_IMMD_2 0xc0003500 -#define RADEON_CP_PACKET3_3D_LOAD_VBPNTR 0xC0002F00 -#define RADEON_CP_PACKET3_CNTL_PAINT 0xC0009100 -#define RADEON_CP_PACKET3_CNTL_BITBLT 0xC0009200 -#define RADEON_CP_PACKET3_CNTL_SMALLTEXT 0xC0009300 -#define RADEON_CP_PACKET3_CNTL_HOSTDATA_BLT 0xC0009400 -#define RADEON_CP_PACKET3_CNTL_POLYLINE 0xC0009500 -#define RADEON_CP_PACKET3_CNTL_POLYSCANLINES 0xC0009800 -#define RADEON_CP_PACKET3_CNTL_PAINT_MULTI 0xC0009A00 -#define RADEON_CP_PACKET3_CNTL_BITBLT_MULTI 0xC0009B00 -#define RADEON_CP_PACKET3_CNTL_TRANS_BITBLT 0xC0009C00 - - -#define RADEON_CP_VC_FRMT_XY 0x00000000 -#define RADEON_CP_VC_FRMT_W0 0x00000001 -#define RADEON_CP_VC_FRMT_FPCOLOR 0x00000002 -#define RADEON_CP_VC_FRMT_FPALPHA 0x00000004 -#define RADEON_CP_VC_FRMT_PKCOLOR 0x00000008 -#define RADEON_CP_VC_FRMT_FPSPEC 0x00000010 -#define RADEON_CP_VC_FRMT_FPFOG 0x00000020 -#define RADEON_CP_VC_FRMT_PKSPEC 0x00000040 -#define RADEON_CP_VC_FRMT_ST0 0x00000080 -#define RADEON_CP_VC_FRMT_ST1 0x00000100 -#define RADEON_CP_VC_FRMT_Q1 0x00000200 -#define RADEON_CP_VC_FRMT_ST2 0x00000400 -#define RADEON_CP_VC_FRMT_Q2 0x00000800 -#define RADEON_CP_VC_FRMT_ST3 0x00001000 -#define RADEON_CP_VC_FRMT_Q3 0x00002000 -#define RADEON_CP_VC_FRMT_Q0 0x00004000 -#define RADEON_CP_VC_FRMT_BLND_WEIGHT_CNT_MASK 0x00038000 -#define RADEON_CP_VC_FRMT_N0 0x00040000 -#define RADEON_CP_VC_FRMT_XY1 0x08000000 -#define RADEON_CP_VC_FRMT_Z1 0x10000000 -#define RADEON_CP_VC_FRMT_W1 0x20000000 -#define RADEON_CP_VC_FRMT_N1 0x40000000 -#define RADEON_CP_VC_FRMT_Z 0x80000000 - -#define RADEON_CP_VC_CNTL_PRIM_TYPE_NONE 0x00000000 -#define RADEON_CP_VC_CNTL_PRIM_TYPE_POINT 0x00000001 -#define RADEON_CP_VC_CNTL_PRIM_TYPE_LINE 0x00000002 -#define RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP 0x00000003 -#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004 -#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005 -#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006 -#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_TYPE_2 0x00000007 -#define RADEON_CP_VC_CNTL_PRIM_TYPE_RECT_LIST 0x00000008 -#define RADEON_CP_VC_CNTL_PRIM_TYPE_3VRT_POINT_LIST 0x00000009 -#define RADEON_CP_VC_CNTL_PRIM_TYPE_3VRT_LINE_LIST 0x0000000a -#define RADEON_CP_VC_CNTL_PRIM_TYPE_QUAD_LIST 0x0000000d -#define RADEON_CP_VC_CNTL_PRIM_WALK_IND 0x00000010 -#define RADEON_CP_VC_CNTL_PRIM_WALK_LIST 0x00000020 -#define RADEON_CP_VC_CNTL_PRIM_WALK_RING 0x00000030 -#define RADEON_CP_VC_CNTL_COLOR_ORDER_BGRA 0x00000000 -#define RADEON_CP_VC_CNTL_COLOR_ORDER_RGBA 0x00000040 -#define RADEON_CP_VC_CNTL_MAOS_ENABLE 0x00000080 -#define RADEON_CP_VC_CNTL_VTX_FMT_NON_RADEON_MODE 0x00000000 -#define RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE 0x00000100 -#define RADEON_CP_VC_CNTL_TCL_DISABLE 0x00000000 -#define RADEON_CP_VC_CNTL_TCL_ENABLE 0x00000200 -#define RADEON_CP_VC_CNTL_NUM_SHIFT 16 - -#define RADEON_VS_MATRIX_0_ADDR 0 -#define RADEON_VS_MATRIX_1_ADDR 4 -#define RADEON_VS_MATRIX_2_ADDR 8 -#define RADEON_VS_MATRIX_3_ADDR 12 -#define RADEON_VS_MATRIX_4_ADDR 16 -#define RADEON_VS_MATRIX_5_ADDR 20 -#define RADEON_VS_MATRIX_6_ADDR 24 -#define RADEON_VS_MATRIX_7_ADDR 28 -#define RADEON_VS_MATRIX_8_ADDR 32 -#define RADEON_VS_MATRIX_9_ADDR 36 -#define RADEON_VS_MATRIX_10_ADDR 40 -#define RADEON_VS_MATRIX_11_ADDR 44 -#define RADEON_VS_MATRIX_12_ADDR 48 -#define RADEON_VS_MATRIX_13_ADDR 52 -#define RADEON_VS_MATRIX_14_ADDR 56 -#define RADEON_VS_MATRIX_15_ADDR 60 -#define RADEON_VS_LIGHT_AMBIENT_ADDR 64 -#define RADEON_VS_LIGHT_DIFFUSE_ADDR 72 -#define RADEON_VS_LIGHT_SPECULAR_ADDR 80 -#define RADEON_VS_LIGHT_DIRPOS_ADDR 88 -#define RADEON_VS_LIGHT_HWVSPOT_ADDR 96 -#define RADEON_VS_LIGHT_ATTENUATION_ADDR 104 -#define RADEON_VS_MATRIX_EYE2CLIP_ADDR 112 -#define RADEON_VS_UCP_ADDR 116 -#define RADEON_VS_GLOBAL_AMBIENT_ADDR 122 -#define RADEON_VS_FOG_PARAM_ADDR 123 -#define RADEON_VS_EYE_VECTOR_ADDR 124 - -#define RADEON_SS_LIGHT_DCD_ADDR 0 -#define RADEON_SS_LIGHT_SPOT_EXPONENT_ADDR 8 -#define RADEON_SS_LIGHT_SPOT_CUTOFF_ADDR 16 -#define RADEON_SS_LIGHT_SPECULAR_THRESH_ADDR 24 -#define RADEON_SS_LIGHT_RANGE_CUTOFF_ADDR 32 -#define RADEON_SS_VERT_GUARD_CLIP_ADJ_ADDR 48 -#define RADEON_SS_VERT_GUARD_DISCARD_ADJ_ADDR 49 -#define RADEON_SS_HORZ_GUARD_CLIP_ADJ_ADDR 50 -#define RADEON_SS_HORZ_GUARD_DISCARD_ADJ_ADDR 51 -#define RADEON_SS_SHININESS 60 - -#define RADEON_TV_MASTER_CNTL 0x0800 -# define RADEON_TV_ASYNC_RST (1 << 0) -# define RADEON_CRT_ASYNC_RST (1 << 1) -# define RADEON_RESTART_PHASE_FIX (1 << 3) -# define RADEON_TV_FIFO_ASYNC_RST (1 << 4) -# define RADEON_VIN_ASYNC_RST (1 << 5) -# define RADEON_AUD_ASYNC_RST (1 << 6) -# define RADEON_DVS_ASYNC_RST (1 << 7) -# define RADEON_CRT_FIFO_CE_EN (1 << 9) -# define RADEON_TV_FIFO_CE_EN (1 << 10) -# define RADEON_RE_SYNC_NOW_SEL_MASK (3 << 14) -# define RADEON_TVCLK_ALWAYS_ONb (1 << 30) -# define RADEON_TV_ON (1 << 31) -#define RADEON_TV_PRE_DAC_MUX_CNTL 0x0888 -# define RADEON_Y_RED_EN (1 << 0) -# define RADEON_C_GRN_EN (1 << 1) -# define RADEON_CMP_BLU_EN (1 << 2) -# define RADEON_DAC_DITHER_EN (1 << 3) -# define RADEON_RED_MX_FORCE_DAC_DATA (6 << 4) -# define RADEON_GRN_MX_FORCE_DAC_DATA (6 << 8) -# define RADEON_BLU_MX_FORCE_DAC_DATA (6 << 12) -# define RADEON_TV_FORCE_DAC_DATA_SHIFT 16 -#define RADEON_TV_RGB_CNTL 0x0804 -# define RADEON_SWITCH_TO_BLUE (1 << 4) -# define RADEON_RGB_DITHER_EN (1 << 5) -# define RADEON_RGB_SRC_SEL_MASK (3 << 8) -# define RADEON_RGB_SRC_SEL_CRTC1 (0 << 8) -# define RADEON_RGB_SRC_SEL_RMX (1 << 8) -# define RADEON_RGB_SRC_SEL_CRTC2 (2 << 8) -# define RADEON_RGB_CONVERT_BY_PASS (1 << 10) -# define RADEON_UVRAM_READ_MARGIN_SHIFT 16 -# define RADEON_FIFORAM_FFMACRO_READ_MARGIN_SHIFT 20 -# define RADEON_TVOUT_SCALE_EN (1 << 26) -#define RADEON_TV_SYNC_CNTL 0x0808 -# define RADEON_SYNC_OE (1 << 0) -# define RADEON_SYNC_OUT (1 << 1) -# define RADEON_SYNC_IN (1 << 2) -# define RADEON_SYNC_PUB (1 << 3) -# define RADEON_SYNC_PD (1 << 4) -# define RADEON_TV_SYNC_IO_DRIVE (1 << 5) -#define RADEON_TV_HTOTAL 0x080c -#define RADEON_TV_HDISP 0x0810 -#define RADEON_TV_HSTART 0x0818 -#define RADEON_TV_HCOUNT 0x081C -#define RADEON_TV_VTOTAL 0x0820 -#define RADEON_TV_VDISP 0x0824 -#define RADEON_TV_VCOUNT 0x0828 -#define RADEON_TV_FTOTAL 0x082c -#define RADEON_TV_FCOUNT 0x0830 -#define RADEON_TV_FRESTART 0x0834 -#define RADEON_TV_HRESTART 0x0838 -#define RADEON_TV_VRESTART 0x083c -#define RADEON_TV_HOST_READ_DATA 0x0840 -#define RADEON_TV_HOST_WRITE_DATA 0x0844 -#define RADEON_TV_HOST_RD_WT_CNTL 0x0848 -# define RADEON_HOST_FIFO_RD (1 << 12) -# define RADEON_HOST_FIFO_RD_ACK (1 << 13) -# define RADEON_HOST_FIFO_WT (1 << 14) -# define RADEON_HOST_FIFO_WT_ACK (1 << 15) -#define RADEON_TV_VSCALER_CNTL1 0x084c -# define RADEON_UV_INC_MASK 0xffff -# define RADEON_UV_INC_SHIFT 0 -# define RADEON_Y_W_EN (1 << 24) -# define RADEON_RESTART_FIELD (1 << 29) /* restart on field 0 */ -# define RADEON_Y_DEL_W_SIG_SHIFT 26 -#define RADEON_TV_TIMING_CNTL 0x0850 -# define RADEON_H_INC_MASK 0xfff -# define RADEON_H_INC_SHIFT 0 -# define RADEON_REQ_Y_FIRST (1 << 19) -# define RADEON_FORCE_BURST_ALWAYS (1 << 21) -# define RADEON_UV_POST_SCALE_BYPASS (1 << 23) -# define RADEON_UV_OUTPUT_POST_SCALE_SHIFT 24 -#define RADEON_TV_VSCALER_CNTL2 0x0854 -# define RADEON_DITHER_MODE (1 << 0) -# define RADEON_Y_OUTPUT_DITHER_EN (1 << 1) -# define RADEON_UV_OUTPUT_DITHER_EN (1 << 2) -# define RADEON_UV_TO_BUF_DITHER_EN (1 << 3) -#define RADEON_TV_Y_FALL_CNTL 0x0858 -# define RADEON_Y_FALL_PING_PONG (1 << 16) -# define RADEON_Y_COEF_EN (1 << 17) -#define RADEON_TV_Y_RISE_CNTL 0x085c -# define RADEON_Y_RISE_PING_PONG (1 << 16) -#define RADEON_TV_Y_SAW_TOOTH_CNTL 0x0860 -#define RADEON_TV_UPSAMP_AND_GAIN_CNTL 0x0864 -# define RADEON_YUPSAMP_EN (1 << 0) -# define RADEON_UVUPSAMP_EN (1 << 2) -#define RADEON_TV_GAIN_LIMIT_SETTINGS 0x0868 -# define RADEON_Y_GAIN_LIMIT_SHIFT 0 -# define RADEON_UV_GAIN_LIMIT_SHIFT 16 -#define RADEON_TV_LINEAR_GAIN_SETTINGS 0x086c -# define RADEON_Y_GAIN_SHIFT 0 -# define RADEON_UV_GAIN_SHIFT 16 -#define RADEON_TV_MODULATOR_CNTL1 0x0870 -# define RADEON_YFLT_EN (1 << 2) -# define RADEON_UVFLT_EN (1 << 3) -# define RADEON_ALT_PHASE_EN (1 << 6) -# define RADEON_SYNC_TIP_LEVEL (1 << 7) -# define RADEON_BLANK_LEVEL_SHIFT 8 -# define RADEON_SET_UP_LEVEL_SHIFT 16 -# define RADEON_SLEW_RATE_LIMIT (1 << 23) -# define RADEON_CY_FILT_BLEND_SHIFT 28 -#define RADEON_TV_MODULATOR_CNTL2 0x0874 -# define RADEON_TV_U_BURST_LEVEL_MASK 0x1ff -# define RADEON_TV_V_BURST_LEVEL_MASK 0x1ff -# define RADEON_TV_V_BURST_LEVEL_SHIFT 16 -#define RADEON_TV_CRC_CNTL 0x0890 -#define RADEON_TV_UV_ADR 0x08ac -# define RADEON_MAX_UV_ADR_MASK 0x000000ff -# define RADEON_MAX_UV_ADR_SHIFT 0 -# define RADEON_TABLE1_BOT_ADR_MASK 0x0000ff00 -# define RADEON_TABLE1_BOT_ADR_SHIFT 8 -# define RADEON_TABLE3_TOP_ADR_MASK 0x00ff0000 -# define RADEON_TABLE3_TOP_ADR_SHIFT 16 -# define RADEON_HCODE_TABLE_SEL_MASK 0x06000000 -# define RADEON_HCODE_TABLE_SEL_SHIFT 25 -# define RADEON_VCODE_TABLE_SEL_MASK 0x18000000 -# define RADEON_VCODE_TABLE_SEL_SHIFT 27 -# define RADEON_TV_MAX_FIFO_ADDR 0x1a7 -# define RADEON_TV_MAX_FIFO_ADDR_INTERNAL 0x1ff -#define RADEON_TV_PLL_FINE_CNTL 0x0020 /* PLL */ -#define RADEON_TV_PLL_CNTL 0x0021 /* PLL */ -# define RADEON_TV_M0LO_MASK 0xff -# define RADEON_TV_M0HI_MASK 0x7 -# define RADEON_TV_M0HI_SHIFT 18 -# define RADEON_TV_N0LO_MASK 0x1ff -# define RADEON_TV_N0LO_SHIFT 8 -# define RADEON_TV_N0HI_MASK 0x3 -# define RADEON_TV_N0HI_SHIFT 21 -# define RADEON_TV_P_MASK 0xf -# define RADEON_TV_P_SHIFT 24 -# define RADEON_TV_SLIP_EN (1 << 23) -# define RADEON_TV_DTO_EN (1 << 28) -#define RADEON_TV_PLL_CNTL1 0x0022 /* PLL */ -# define RADEON_TVPLL_RESET (1 << 1) -# define RADEON_TVPLL_SLEEP (1 << 3) -# define RADEON_TVPLL_REFCLK_SEL (1 << 4) -# define RADEON_TVPCP_SHIFT 8 -# define RADEON_TVPCP_MASK (7 << 8) -# define RADEON_TVPVG_SHIFT 11 -# define RADEON_TVPVG_MASK (7 << 11) -# define RADEON_TVPDC_SHIFT 14 -# define RADEON_TVPDC_MASK (3 << 14) -# define RADEON_TVPLL_TEST_DIS (1 << 31) -# define RADEON_TVCLK_SRC_SEL_TVPLL (1 << 30) - -#define RS400_DISP2_REQ_CNTL1 0xe30 -# define RS400_DISP2_START_REQ_LEVEL_SHIFT 0 -# define RS400_DISP2_START_REQ_LEVEL_MASK 0x3ff -# define RS400_DISP2_STOP_REQ_LEVEL_SHIFT 12 -# define RS400_DISP2_STOP_REQ_LEVEL_MASK 0x3ff -# define RS400_DISP2_ALLOW_FID_LEVEL_SHIFT 22 -# define RS400_DISP2_ALLOW_FID_LEVEL_MASK 0x3ff -#define RS400_DISP2_REQ_CNTL2 0xe34 -# define RS400_DISP2_CRITICAL_POINT_START_SHIFT 12 -# define RS400_DISP2_CRITICAL_POINT_START_MASK 0x3ff -# define RS400_DISP2_CRITICAL_POINT_STOP_SHIFT 22 -# define RS400_DISP2_CRITICAL_POINT_STOP_MASK 0x3ff -#define RS400_DMIF_MEM_CNTL1 0xe38 -# define RS400_DISP2_START_ADR_SHIFT 0 -# define RS400_DISP2_START_ADR_MASK 0x3ff -# define RS400_DISP1_CRITICAL_POINT_START_SHIFT 12 -# define RS400_DISP1_CRITICAL_POINT_START_MASK 0x3ff -# define RS400_DISP1_CRITICAL_POINT_STOP_SHIFT 22 -# define RS400_DISP1_CRITICAL_POINT_STOP_MASK 0x3ff -#define RS400_DISP1_REQ_CNTL1 0xe3c -# define RS400_DISP1_START_REQ_LEVEL_SHIFT 0 -# define RS400_DISP1_START_REQ_LEVEL_MASK 0x3ff -# define RS400_DISP1_STOP_REQ_LEVEL_SHIFT 12 -# define RS400_DISP1_STOP_REQ_LEVEL_MASK 0x3ff -# define RS400_DISP1_ALLOW_FID_LEVEL_SHIFT 22 -# define RS400_DISP1_ALLOW_FID_LEVEL_MASK 0x3ff - -#define RS690_MC_INDEX 0x78 -# define RS690_MC_INDEX_MASK 0x1ff -# define RS690_MC_INDEX_WR_EN (1 << 9) -# define RS690_MC_INDEX_WR_ACK 0x7f -#define RS690_MC_DATA 0x7c - -#define RS690_MC_FB_LOCATION 0x100 -#define RS690_MC_AGP_LOCATION 0x101 -#define RS690_MC_AGP_BASE 0x102 -#define RS690_MC_AGP_BASE_2 0x103 -#define RS690_MC_INIT_MISC_LAT_TIMER 0x104 -#define RS690_MC_STATUS 0x90 -#define RS690_MC_STATUS_IDLE (1 << 0) - -#define RS600_MC_INDEX 0x78 -# define RS600_MC_INDEX_MASK 0xff -# define RS600_MC_INDEX_WR_EN (1 << 8) -# define RS600_MC_INDEX_WR_ACK 0xff -#define RS600_MC_DATA 0x7c - -#define RS600_MC_FB_LOCATION 0xA -#define RS600_MC_STATUS 0x0 -#define RS600_MC_STATUS_IDLE (1 << 0) - -#define AVIVO_MC_INDEX 0x0070 -#define R520_MC_STATUS 0x00 -# define R520_MC_STATUS_IDLE (1 << 1) -#define RV515_MC_STATUS 0x08 -# define RV515_MC_STATUS_IDLE (1 << 4) -#define RV515_MC_INIT_MISC_LAT_TIMER 0x09 -#define AVIVO_MC_DATA 0x0074 - -#define RV515_MC_FB_LOCATION 0x1 -#define RV515_MC_AGP_LOCATION 0x2 -#define RV515_MC_AGP_BASE 0x3 -#define RV515_MC_AGP_BASE_2 0x4 -#define RV515_MC_CNTL 0x5 -# define RV515_MEM_NUM_CHANNELS_MASK 0x3 -#define R520_MC_FB_LOCATION 0x4 -#define R520_MC_AGP_LOCATION 0x5 -#define R520_MC_AGP_BASE 0x6 -#define R520_MC_AGP_BASE_2 0x7 -#define R520_MC_CNTL0 0x8 -# define R520_MEM_NUM_CHANNELS_MASK (0x3 << 24) -# define R520_MEM_NUM_CHANNELS_SHIFT 24 -# define R520_MC_CHANNEL_SIZE (1 << 23) - -#define R600_RAMCFG 0x2408 -# define R600_CHANSIZE (1 << 7) -# define R600_CHANSIZE_OVERRIDE (1 << 10) - -#define AVIVO_HDP_FB_LOCATION 0x134 - -#define AVIVO_VGA_RENDER_CONTROL 0x0300 -# define AVIVO_VGA_VSTATUS_CNTL_MASK (3 << 16) -#define AVIVO_D1VGA_CONTROL 0x0330 -# define AVIVO_DVGA_CONTROL_MODE_ENABLE (1<<0) -# define AVIVO_DVGA_CONTROL_TIMING_SELECT (1<<8) -# define AVIVO_DVGA_CONTROL_SYNC_POLARITY_SELECT (1<<9) -# define AVIVO_DVGA_CONTROL_OVERSCAN_TIMING_SELECT (1<<10) -# define AVIVO_DVGA_CONTROL_OVERSCAN_COLOR_EN (1<<16) -# define AVIVO_DVGA_CONTROL_ROTATE (1<<24) -#define AVIVO_D2VGA_CONTROL 0x0338 - -#define AVIVO_EXT1_PPLL_REF_DIV_SRC 0x400 -#define AVIVO_EXT1_PPLL_REF_DIV 0x404 -#define AVIVO_EXT1_PPLL_UPDATE_LOCK 0x408 -#define AVIVO_EXT1_PPLL_UPDATE_CNTL 0x40c - -#define AVIVO_EXT2_PPLL_REF_DIV_SRC 0x410 -#define AVIVO_EXT2_PPLL_REF_DIV 0x414 -#define AVIVO_EXT2_PPLL_UPDATE_LOCK 0x418 -#define AVIVO_EXT2_PPLL_UPDATE_CNTL 0x41c - -#define AVIVO_EXT1_PPLL_FB_DIV 0x430 -#define AVIVO_EXT2_PPLL_FB_DIV 0x434 - -#define AVIVO_EXT1_PPLL_POST_DIV_SRC 0x438 -#define AVIVO_EXT1_PPLL_POST_DIV 0x43c - -#define AVIVO_EXT2_PPLL_POST_DIV_SRC 0x440 -#define AVIVO_EXT2_PPLL_POST_DIV 0x444 - -#define AVIVO_EXT1_PPLL_CNTL 0x448 -#define AVIVO_EXT2_PPLL_CNTL 0x44c - -#define AVIVO_P1PLL_CNTL 0x450 -#define AVIVO_P2PLL_CNTL 0x454 -#define AVIVO_P1PLL_INT_SS_CNTL 0x458 -#define AVIVO_P2PLL_INT_SS_CNTL 0x45c -#define AVIVO_P1PLL_TMDSA_CNTL 0x460 -#define AVIVO_P2PLL_LVTMA_CNTL 0x464 - -#define AVIVO_PCLK_CRTC1_CNTL 0x480 -#define AVIVO_PCLK_CRTC2_CNTL 0x484 - -#define AVIVO_D1CRTC_H_TOTAL 0x6000 -#define AVIVO_D1CRTC_H_BLANK_START_END 0x6004 -#define AVIVO_D1CRTC_H_SYNC_A 0x6008 -#define AVIVO_D1CRTC_H_SYNC_A_CNTL 0x600c -#define AVIVO_D1CRTC_H_SYNC_B 0x6010 -#define AVIVO_D1CRTC_H_SYNC_B_CNTL 0x6014 - -#define AVIVO_D1CRTC_V_TOTAL 0x6020 -#define AVIVO_D1CRTC_V_BLANK_START_END 0x6024 -#define AVIVO_D1CRTC_V_SYNC_A 0x6028 -#define AVIVO_D1CRTC_V_SYNC_A_CNTL 0x602c -#define AVIVO_D1CRTC_V_SYNC_B 0x6030 -#define AVIVO_D1CRTC_V_SYNC_B_CNTL 0x6034 - -#define AVIVO_D1CRTC_CONTROL 0x6080 -# define AVIVO_CRTC_EN (1<<0) -#define AVIVO_D1CRTC_BLANK_CONTROL 0x6084 -#define AVIVO_D1CRTC_INTERLACE_CONTROL 0x6088 -#define AVIVO_D1CRTC_INTERLACE_STATUS 0x608c -#define AVIVO_D1CRTC_STEREO_CONTROL 0x60c4 - -/* master controls */ -#define AVIVO_DC_CRTC_MASTER_EN 0x60f8 -#define AVIVO_DC_CRTC_TV_CONTROL 0x60fc - -#define AVIVO_D1GRPH_ENABLE 0x6100 -#define AVIVO_D1GRPH_CONTROL 0x6104 -# define AVIVO_D1GRPH_CONTROL_DEPTH_8BPP (0<<0) -# define AVIVO_D1GRPH_CONTROL_DEPTH_16BPP (1<<0) -# define AVIVO_D1GRPH_CONTROL_DEPTH_32BPP (2<<0) -# define AVIVO_D1GRPH_CONTROL_DEPTH_64BPP (3<<0) - -# define AVIVO_D1GRPH_CONTROL_8BPP_INDEXED (0<<8) - -# define AVIVO_D1GRPH_CONTROL_16BPP_ARGB1555 (0<<8) -# define AVIVO_D1GRPH_CONTROL_16BPP_RGB565 (1<<8) -# define AVIVO_D1GRPH_CONTROL_16BPP_ARGB4444 (2<<8) -# define AVIVO_D1GRPH_CONTROL_16BPP_AI88 (3<<8) -# define AVIVO_D1GRPH_CONTROL_16BPP_MONO16 (4<<8) - -# define AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888 (0<<8) -# define AVIVO_D1GRPH_CONTROL_32BPP_ARGB2101010 (1<<8) -# define AVIVO_D1GRPH_CONTROL_32BPP_DIGITAL (2<<8) -# define AVIVO_D1GRPH_CONTROL_32BPP_8B_ARGB2101010 (3<<8) - - -# define AVIVO_D1GRPH_CONTROL_64BPP_ARGB16161616 (0<<8) - -# define AVIVO_D1GRPH_SWAP_RB (1<<16) -# define AVIVO_D1GRPH_TILED (1<<20) -# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1<<21) - -#define AVIVO_D1GRPH_LUT_SEL 0x6108 -#define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 -#define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 -#define AVIVO_D1GRPH_PITCH 0x6120 -#define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124 -#define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128 -#define AVIVO_D1GRPH_X_START 0x612c -#define AVIVO_D1GRPH_Y_START 0x6130 -#define AVIVO_D1GRPH_X_END 0x6134 -#define AVIVO_D1GRPH_Y_END 0x6138 -#define AVIVO_D1GRPH_UPDATE 0x6144 -# define AVIVO_D1GRPH_UPDATE_LOCK (1<<16) -#define AVIVO_D1GRPH_FLIP_CONTROL 0x6148 - -#define AVIVO_D1CUR_CONTROL 0x6400 -# define AVIVO_D1CURSOR_EN (1<<0) -# define AVIVO_D1CURSOR_MODE_SHIFT 8 -# define AVIVO_D1CURSOR_MODE_MASK (0x3<<8) -# define AVIVO_D1CURSOR_MODE_24BPP (0x2) -#define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408 -#define AVIVO_D1CUR_SIZE 0x6410 -#define AVIVO_D1CUR_POSITION 0x6414 -#define AVIVO_D1CUR_HOT_SPOT 0x6418 -#define AVIVO_D1CUR_UPDATE 0x6424 -# define AVIVO_D1CURSOR_UPDATE_LOCK (1 << 16) - -#define AVIVO_DC_LUT_RW_SELECT 0x6480 -#define AVIVO_DC_LUT_RW_MODE 0x6484 -#define AVIVO_DC_LUT_RW_INDEX 0x6488 -#define AVIVO_DC_LUT_SEQ_COLOR 0x648c -#define AVIVO_DC_LUT_PWL_DATA 0x6490 -#define AVIVO_DC_LUT_30_COLOR 0x6494 -#define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498 -#define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c -#define AVIVO_DC_LUT_AUTOFILL 0x64a0 - -#define AVIVO_DC_LUTA_CONTROL 0x64c0 -#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4 -#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8 -#define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc -#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0 -#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4 -#define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8 - -#define AVIVO_DC_LB_MEMORY_SPLIT 0x6520 -# define AVIVO_DC_LB_MEMORY_SPLIT_MASK 0x3 -# define AVIVO_DC_LB_MEMORY_SPLIT_SHIFT 0 -# define AVIVO_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF 0 -# define AVIVO_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q 1 -# define AVIVO_DC_LB_MEMORY_SPLIT_D1_ONLY 2 -# define AVIVO_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q 3 -# define AVIVO_DC_LB_MEMORY_SPLIT_SHIFT_MODE (1 << 2) -# define AVIVO_DC_LB_DISP1_END_ADR_SHIFT 4 -# define AVIVO_DC_LB_DISP1_END_ADR_MASK 0x7ff - -#define AVIVO_D1MODE_DATA_FORMAT 0x6528 -# define AVIVO_D1MODE_INTERLEAVE_EN (1 << 0) -#define AVIVO_D1MODE_DESKTOP_HEIGHT 0x652c -#define AVIVO_D1MODE_VIEWPORT_START 0x6580 -#define AVIVO_D1MODE_VIEWPORT_SIZE 0x6584 -#define AVIVO_D1MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6588 -#define AVIVO_D1MODE_EXT_OVERSCAN_TOP_BOTTOM 0x658c - -#define AVIVO_D1SCL_SCALER_ENABLE 0x6590 -#define AVIVO_D1SCL_SCALER_TAP_CONTROL 0x6594 -#define AVIVO_D1SCL_UPDATE 0x65cc -# define AVIVO_D1SCL_UPDATE_LOCK (1<<16) - -/* second crtc */ -#define AVIVO_D2CRTC_H_TOTAL 0x6800 -#define AVIVO_D2CRTC_H_BLANK_START_END 0x6804 -#define AVIVO_D2CRTC_H_SYNC_A 0x6808 -#define AVIVO_D2CRTC_H_SYNC_A_CNTL 0x680c -#define AVIVO_D2CRTC_H_SYNC_B 0x6810 -#define AVIVO_D2CRTC_H_SYNC_B_CNTL 0x6814 - -#define AVIVO_D2CRTC_V_TOTAL 0x6820 -#define AVIVO_D2CRTC_V_BLANK_START_END 0x6824 -#define AVIVO_D2CRTC_V_SYNC_A 0x6828 -#define AVIVO_D2CRTC_V_SYNC_A_CNTL 0x682c -#define AVIVO_D2CRTC_V_SYNC_B 0x6830 -#define AVIVO_D2CRTC_V_SYNC_B_CNTL 0x6834 - -#define AVIVO_D2CRTC_CONTROL 0x6880 -#define AVIVO_D2CRTC_BLANK_CONTROL 0x6884 -#define AVIVO_D2CRTC_INTERLACE_CONTROL 0x6888 -#define AVIVO_D2CRTC_INTERLACE_STATUS 0x688c -#define AVIVO_D2CRTC_STEREO_CONTROL 0x68c4 - -#define AVIVO_D2GRPH_ENABLE 0x6900 -#define AVIVO_D2GRPH_CONTROL 0x6904 -#define AVIVO_D2GRPH_LUT_SEL 0x6908 -#define AVIVO_D2GRPH_PRIMARY_SURFACE_ADDRESS 0x6910 -#define AVIVO_D2GRPH_SECONDARY_SURFACE_ADDRESS 0x6918 -#define AVIVO_D2GRPH_PITCH 0x6920 -#define AVIVO_D2GRPH_SURFACE_OFFSET_X 0x6924 -#define AVIVO_D2GRPH_SURFACE_OFFSET_Y 0x6928 -#define AVIVO_D2GRPH_X_START 0x692c -#define AVIVO_D2GRPH_Y_START 0x6930 -#define AVIVO_D2GRPH_X_END 0x6934 -#define AVIVO_D2GRPH_Y_END 0x6938 -#define AVIVO_D2GRPH_UPDATE 0x6944 -#define AVIVO_D2GRPH_FLIP_CONTROL 0x6948 - -#define AVIVO_D2CUR_CONTROL 0x6c00 -#define AVIVO_D2CUR_SURFACE_ADDRESS 0x6c08 -#define AVIVO_D2CUR_SIZE 0x6c10 -#define AVIVO_D2CUR_POSITION 0x6c14 - -#define AVIVO_D2MODE_DATA_FORMAT 0x6d28 -#define AVIVO_D2MODE_DESKTOP_HEIGHT 0x6d2c -#define AVIVO_D2MODE_VIEWPORT_START 0x6d80 -#define AVIVO_D2MODE_VIEWPORT_SIZE 0x6d84 -#define AVIVO_D2MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6d88 -#define AVIVO_D2MODE_EXT_OVERSCAN_TOP_BOTTOM 0x6d8c - -#define AVIVO_D2SCL_SCALER_ENABLE 0x6d90 -#define AVIVO_D2SCL_SCALER_TAP_CONTROL 0x6d94 -#define AVIVO_D2SCL_UPDATE 0x6dcc - -#define AVIVO_DDIA_BIT_DEPTH_CONTROL 0x7214 - -#define AVIVO_DACA_ENABLE 0x7800 -# define AVIVO_DAC_ENABLE (1 << 0) -#define AVIVO_DACA_SOURCE_SELECT 0x7804 -# define AVIVO_DAC_SOURCE_CRTC1 (0 << 0) -# define AVIVO_DAC_SOURCE_CRTC2 (1 << 0) -# define AVIVO_DAC_SOURCE_TV (2 << 0) - -#define AVIVO_DACA_FORCE_OUTPUT_CNTL 0x783c -# define AVIVO_DACA_FORCE_OUTPUT_CNTL_FORCE_DATA_EN (1 << 0) -# define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_SHIFT (8) -# define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_BLUE (1 << 0) -# define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_GREEN (1 << 1) -# define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_SEL_RED (1 << 2) -# define AVIVO_DACA_FORCE_OUTPUT_CNTL_DATA_ON_BLANKB_ONLY (1 << 24) -#define AVIVO_DACA_POWERDOWN 0x7850 -# define AVIVO_DACA_POWERDOWN_POWERDOWN (1 << 0) -# define AVIVO_DACA_POWERDOWN_BLUE (1 << 8) -# define AVIVO_DACA_POWERDOWN_GREEN (1 << 16) -# define AVIVO_DACA_POWERDOWN_RED (1 << 24) - -#define AVIVO_DACB_ENABLE 0x7a00 -#define AVIVO_DACB_SOURCE_SELECT 0x7a04 -#define AVIVO_DACB_FORCE_OUTPUT_CNTL 0x7a3c -# define AVIVO_DACB_FORCE_OUTPUT_CNTL_FORCE_DATA_EN (1 << 0) -# define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_SHIFT (8) -# define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_BLUE (1 << 0) -# define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_GREEN (1 << 1) -# define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_SEL_RED (1 << 2) -# define AVIVO_DACB_FORCE_OUTPUT_CNTL_DATA_ON_BLANKB_ONLY (1 << 24) -#define AVIVO_DACB_POWERDOWN 0x7a50 -# define AVIVO_DACB_POWERDOWN_POWERDOWN (1 << 0) -# define AVIVO_DACB_POWERDOWN_BLUE (1 << 8) -# define AVIVO_DACB_POWERDOWN_GREEN (1 << 16) -# define AVIVO_DACB_POWERDOWN_RED - -#define AVIVO_TMDSA_CNTL 0x7880 -# define AVIVO_TMDSA_CNTL_ENABLE (1 << 0) -# define AVIVO_TMDSA_CNTL_HPD_MASK (1 << 4) -# define AVIVO_TMDSA_CNTL_HPD_SELECT (1 << 8) -# define AVIVO_TMDSA_CNTL_SYNC_PHASE (1 << 12) -# define AVIVO_TMDSA_CNTL_PIXEL_ENCODING (1 << 16) -# define AVIVO_TMDSA_CNTL_DUAL_LINK_ENABLE (1 << 24) -# define AVIVO_TMDSA_CNTL_SWAP (1 << 28) -#define AVIVO_TMDSA_SOURCE_SELECT 0x7884 -/* 78a8 appears to be some kind of (reasonably tolerant) clock? - * 78d0 definitely hits the transmitter, definitely clock. */ -/* MYSTERY1 This appears to control dithering? */ -#define AVIVO_TMDSA_BIT_DEPTH_CONTROL 0x7894 -# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN (1 << 0) -# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH (1 << 4) -# define AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN (1 << 8) -# define AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH (1 << 12) -# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN (1 << 16) -# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH (1 << 20) -# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL (1 << 24) -# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET (1 << 26) -#define AVIVO_TMDSA_DCBALANCER_CONTROL 0x78d0 -# define AVIVO_TMDSA_DCBALANCER_CONTROL_EN (1 << 0) -# define AVIVO_TMDSA_DCBALANCER_CONTROL_TEST_EN (1 << 8) -# define AVIVO_TMDSA_DCBALANCER_CONTROL_TEST_IN_SHIFT (16) -# define AVIVO_TMDSA_DCBALANCER_CONTROL_FORCE (1 << 24) -#define AVIVO_TMDSA_DATA_SYNCHRONIZATION 0x78d8 -# define AVIVO_TMDSA_DATA_SYNCHRONIZATION_DSYNSEL (1 << 0) -# define AVIVO_TMDSA_DATA_SYNCHRONIZATION_PFREQCHG (1 << 8) -#define AVIVO_TMDSA_CLOCK_ENABLE 0x7900 -#define AVIVO_TMDSA_TRANSMITTER_ENABLE 0x7904 -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX0_ENABLE (1 << 0) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKC0EN (1 << 1) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD00EN (1 << 2) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD01EN (1 << 3) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD02EN (1 << 4) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX1_ENABLE (1 << 8) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD10EN (1 << 10) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD11EN (1 << 11) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD12EN (1 << 12) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX_ENABLE_HPD_MASK (1 << 16) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKCEN_HPD_MASK (1 << 17) -# define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKDEN_HPD_MASK (1 << 18) - -#define AVIVO_TMDSA_TRANSMITTER_CONTROL 0x7910 -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE (1 << 0) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET (1 << 1) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_HPD_MASK_SHIFT (2) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_IDSCKSEL (1 << 4) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_BGSLEEP (1 << 5) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_PWRUP_SEQ_EN (1 << 6) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TMCLK (1 << 8) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TMCLK_FROM_PADS (1 << 13) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TDCLK (1 << 14) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_TDCLK_FROM_PADS (1 << 15) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_CLK_PATTERN_SHIFT (16) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_BYPASS_PLL (1 << 28) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_USE_CLK_DATA (1 << 29) -# define AVIVO_TMDSA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL (1 << 31) - -#define AVIVO_LVTMA_CNTL 0x7a80 -# define AVIVO_LVTMA_CNTL_ENABLE (1 << 0) -# define AVIVO_LVTMA_CNTL_HPD_MASK (1 << 4) -# define AVIVO_LVTMA_CNTL_HPD_SELECT (1 << 8) -# define AVIVO_LVTMA_CNTL_SYNC_PHASE (1 << 12) -# define AVIVO_LVTMA_CNTL_PIXEL_ENCODING (1 << 16) -# define AVIVO_LVTMA_CNTL_DUAL_LINK_ENABLE (1 << 24) -# define AVIVO_LVTMA_CNTL_SWAP (1 << 28) -#define AVIVO_LVTMA_SOURCE_SELECT 0x7a84 -#define AVIVO_LVTMA_COLOR_FORMAT 0x7a88 -#define AVIVO_LVTMA_BIT_DEPTH_CONTROL 0x7a94 -# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_EN (1 << 0) -# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH (1 << 4) -# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN (1 << 8) -# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH (1 << 12) -# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN (1 << 16) -# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH (1 << 20) -# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL (1 << 24) -# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET (1 << 26) - - - -#define AVIVO_LVTMA_DCBALANCER_CONTROL 0x7ad0 -# define AVIVO_LVTMA_DCBALANCER_CONTROL_EN (1 << 0) -# define AVIVO_LVTMA_DCBALANCER_CONTROL_TEST_EN (1 << 8) -# define AVIVO_LVTMA_DCBALANCER_CONTROL_TEST_IN_SHIFT (16) -# define AVIVO_LVTMA_DCBALANCER_CONTROL_FORCE (1 << 24) - -#define AVIVO_LVTMA_DATA_SYNCHRONIZATION 0x78d8 -# define AVIVO_LVTMA_DATA_SYNCHRONIZATION_DSYNSEL (1 << 0) -# define AVIVO_LVTMA_DATA_SYNCHRONIZATION_PFREQCHG (1 << 8) -#define R500_LVTMA_CLOCK_ENABLE 0x7b00 -#define R600_LVTMA_CLOCK_ENABLE 0x7b04 - -#define R500_LVTMA_TRANSMITTER_ENABLE 0x7b04 -#define R600_LVTMA_TRANSMITTER_ENABLE 0x7b08 -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC0EN (1 << 1) -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD00EN (1 << 2) -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD01EN (1 << 3) -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD02EN (1 << 4) -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD03EN (1 << 5) -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC1EN (1 << 9) -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD10EN (1 << 10) -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD11EN (1 << 11) -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD12EN (1 << 12) -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKCEN_HPD_MASK (1 << 17) -# define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKDEN_HPD_MASK (1 << 18) - -#define R500_LVTMA_TRANSMITTER_CONTROL 0x7b10 -#define R600_LVTMA_TRANSMITTER_CONTROL 0x7b14 -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_ENABLE (1 << 0) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_RESET (1 << 1) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_HPD_MASK_SHIFT (2) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_IDSCKSEL (1 << 4) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_BGSLEEP (1 << 5) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_PWRUP_SEQ_EN (1 << 6) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TMCLK (1 << 8) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TMCLK_FROM_PADS (1 << 13) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TDCLK (1 << 14) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_TDCLK_FROM_PADS (1 << 15) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_CLK_PATTERN_SHIFT (16) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_BYPASS_PLL (1 << 28) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_USE_CLK_DATA (1 << 29) -# define AVIVO_LVTMA_TRANSMITTER_CONTROL_INPUT_TEST_CLK_SEL (1 << 31) - -#define R500_LVTMA_PWRSEQ_CNTL 0x7af0 -#define R600_LVTMA_PWRSEQ_CNTL 0x7af4 -# define AVIVO_LVTMA_PWRSEQ_EN (1 << 0) -# define AVIVO_LVTMA_PWRSEQ_PLL_ENABLE_MASK (1 << 2) -# define AVIVO_LVTMA_PWRSEQ_PLL_RESET_MASK (1 << 3) -# define AVIVO_LVTMA_PWRSEQ_TARGET_STATE (1 << 4) -# define AVIVO_LVTMA_SYNCEN (1 << 8) -# define AVIVO_LVTMA_SYNCEN_OVRD (1 << 9) -# define AVIVO_LVTMA_SYNCEN_POL (1 << 10) -# define AVIVO_LVTMA_DIGON (1 << 16) -# define AVIVO_LVTMA_DIGON_OVRD (1 << 17) -# define AVIVO_LVTMA_DIGON_POL (1 << 18) -# define AVIVO_LVTMA_BLON (1 << 24) -# define AVIVO_LVTMA_BLON_OVRD (1 << 25) -# define AVIVO_LVTMA_BLON_POL (1 << 26) - -#define R500_LVTMA_PWRSEQ_STATE 0x7af4 -#define R600_LVTMA_PWRSEQ_STATE 0x7af8 -# define AVIVO_LVTMA_PWRSEQ_STATE_TARGET_STATE_R (1 << 0) -# define AVIVO_LVTMA_PWRSEQ_STATE_DIGON (1 << 1) -# define AVIVO_LVTMA_PWRSEQ_STATE_SYNCEN (1 << 2) -# define AVIVO_LVTMA_PWRSEQ_STATE_BLON (1 << 3) -# define AVIVO_LVTMA_PWRSEQ_STATE_DONE (1 << 4) -# define AVIVO_LVTMA_PWRSEQ_STATE_STATUS_SHIFT (8) - -#define AVIVO_LVDS_BACKLIGHT_CNTL 0x7af8 -# define AVIVO_LVDS_BACKLIGHT_CNTL_EN (1 << 0) -# define AVIVO_LVDS_BACKLIGHT_LEVEL_MASK 0x0000ff00 -# define AVIVO_LVDS_BACKLIGHT_LEVEL_SHIFT 8 - -#define AVIVO_DVOA_BIT_DEPTH_CONTROL 0x7988 - -#define AVIVO_GPIO_0 0x7e30 -#define AVIVO_GPIO_1 0x7e40 -#define AVIVO_GPIO_2 0x7e50 -#define AVIVO_GPIO_3 0x7e60 - -#define AVIVO_DC_GPIO_HPD_Y 0x7e9c - -#define AVIVO_I2C_STATUS 0x7d30 -# define AVIVO_I2C_STATUS_DONE (1 << 0) -# define AVIVO_I2C_STATUS_NACK (1 << 1) -# define AVIVO_I2C_STATUS_HALT (1 << 2) -# define AVIVO_I2C_STATUS_GO (1 << 3) -# define AVIVO_I2C_STATUS_MASK 0x7 -/* If radeon_mm_i2c is to be believed, this is HALT, NACK, and maybe - * DONE? */ -# define AVIVO_I2C_STATUS_CMD_RESET 0x7 -# define AVIVO_I2C_STATUS_CMD_WAIT (1 << 3) -#define AVIVO_I2C_STOP 0x7d34 -#define AVIVO_I2C_START_CNTL 0x7d38 -# define AVIVO_I2C_START (1 << 8) -# define AVIVO_I2C_CONNECTOR0 (0 << 16) -# define AVIVO_I2C_CONNECTOR1 (1 << 16) -#define R520_I2C_START (1<<0) -#define R520_I2C_STOP (1<<1) -#define R520_I2C_RX (1<<2) -#define R520_I2C_EN (1<<8) -#define R520_I2C_DDC1 (0<<16) -#define R520_I2C_DDC2 (1<<16) -#define R520_I2C_DDC3 (2<<16) -#define R520_I2C_DDC_MASK (3<<16) -#define AVIVO_I2C_CONTROL2 0x7d3c -# define AVIVO_I2C_7D3C_SIZE_SHIFT 8 -# define AVIVO_I2C_7D3C_SIZE_MASK (0xf << 8) -#define AVIVO_I2C_CONTROL3 0x7d40 -/* Reading is done 4 bytes at a time: read the bottom 8 bits from - * 7d44, four times in a row. - * Writing is a little more complex. First write DATA with - * 0xnnnnnnzz, then 0xnnnnnnyy, where nnnnnn is some non-deterministic - * magic number, zz is, I think, the slave address, and yy is the byte - * you want to write. */ -#define AVIVO_I2C_DATA 0x7d44 -#define R520_I2C_ADDR_COUNT_MASK (0x7) -#define R520_I2C_DATA_COUNT_SHIFT (8) -#define R520_I2C_DATA_COUNT_MASK (0xF00) -#define AVIVO_I2C_CNTL 0x7d50 -# define AVIVO_I2C_EN (1 << 0) -# define AVIVO_I2C_RESET (1 << 8) - -#define R600_GENERAL_PWRMGT 0x618 -# define R600_OPEN_DRAIN_PADS (1 << 11) - -#define R600_LOWER_GPIO_ENABLE 0x710 -#define R600_CTXSW_VID_LOWER_GPIO_CNTL 0x718 -#define R600_HIGH_VID_LOWER_GPIO_CNTL 0x71c -#define R600_MEDIUM_VID_LOWER_GPIO_CNTL 0x720 -#define R600_LOW_VID_LOWER_GPIO_CNTL 0x724 - -#define R600_MC_VM_FB_LOCATION 0x2180 -#define R600_MC_VM_AGP_TOP 0x2184 -#define R600_MC_VM_AGP_BOT 0x2188 -#define R600_MC_VM_AGP_BASE 0x218c -#define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2190 -#define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2194 -#define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x2198 - -#define R700_MC_VM_FB_LOCATION 0x2024 - -#define R600_HDP_NONSURFACE_BASE 0x2c04 - -#define R600_BUS_CNTL 0x5420 -#define R600_CONFIG_CNTL 0x5424 -#define R600_CONFIG_MEMSIZE 0x5428 -#define R600_CONFIG_F0_BASE 0x542C -#define R600_CONFIG_APER_SIZE 0x5430 - -#define R600_ROM_CNTL 0x1600 -# define R600_SCK_OVERWRITE (1 << 1) -# define R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT 28 -# define R600_SCK_PRESCALE_CRYSTAL_CLK_MASK (0xf << 28) - -#define R600_BIOS_0_SCRATCH 0x1724 -#define R600_BIOS_1_SCRATCH 0x1728 -#define R600_BIOS_2_SCRATCH 0x172c -#define R600_BIOS_3_SCRATCH 0x1730 -#define R600_BIOS_4_SCRATCH 0x1734 -#define R600_BIOS_5_SCRATCH 0x1738 -#define R600_BIOS_6_SCRATCH 0x173c -#define R600_BIOS_7_SCRATCH 0x1740 - -#define R300_GB_TILE_CONFIG 0x4018 -# define R300_ENABLE_TILING (1 << 0) -# define R300_PIPE_COUNT_RV350 (0 << 1) -# define R300_PIPE_COUNT_R300 (3 << 1) -# define R300_PIPE_COUNT_R420_3P (6 << 1) -# define R300_PIPE_COUNT_R420 (7 << 1) -# define R300_TILE_SIZE_8 (0 << 4) -# define R300_TILE_SIZE_16 (1 << 4) -# define R300_TILE_SIZE_32 (2 << 4) -# define R300_SUBPIXEL_1_12 (0 << 16) -# define R300_SUBPIXEL_1_16 (1 << 16) -#define R300_GB_SELECT 0x401c -#define R300_GB_ENABLE 0x4008 -#define R300_GB_AA_CONFIG 0x4020 -#define R400_GB_PIPE_SELECT 0x402c -#define R300_GB_MSPOS0 0x4010 -# define R300_MS_X0_SHIFT 0 -# define R300_MS_Y0_SHIFT 4 -# define R300_MS_X1_SHIFT 8 -# define R300_MS_Y1_SHIFT 12 -# define R300_MS_X2_SHIFT 16 -# define R300_MS_Y2_SHIFT 20 -# define R300_MSBD0_Y_SHIFT 24 -# define R300_MSBD0_X_SHIFT 28 -#define R300_GB_MSPOS1 0x4014 -# define R300_MS_X3_SHIFT 0 -# define R300_MS_Y3_SHIFT 4 -# define R300_MS_X4_SHIFT 8 -# define R300_MS_Y4_SHIFT 12 -# define R300_MS_X5_SHIFT 16 -# define R300_MS_Y5_SHIFT 20 -# define R300_MSBD1_SHIFT 24 - -#define R300_GA_ENHANCE 0x4274 -# define R300_GA_DEADLOCK_CNTL (1 << 0) -# define R300_GA_FASTSYNC_CNTL (1 << 1) - -#define R300_GA_POLY_MODE 0x4288 -# define R300_FRONT_PTYPE_POINT (0 << 4) -# define R300_FRONT_PTYPE_LINE (1 << 4) -# define R300_FRONT_PTYPE_TRIANGE (2 << 4) -# define R300_BACK_PTYPE_POINT (0 << 7) -# define R300_BACK_PTYPE_LINE (1 << 7) -# define R300_BACK_PTYPE_TRIANGE (2 << 7) -#define R300_GA_ROUND_MODE 0x428c -# define R300_GEOMETRY_ROUND_TRUNC (0 << 0) -# define R300_GEOMETRY_ROUND_NEAREST (1 << 0) -# define R300_COLOR_ROUND_TRUNC (0 << 2) -# define R300_COLOR_ROUND_NEAREST (1 << 2) -#define R300_GA_COLOR_CONTROL 0x4278 -# define R300_RGB0_SHADING_SOLID (0 << 0) -# define R300_RGB0_SHADING_FLAT (1 << 0) -# define R300_RGB0_SHADING_GOURAUD (2 << 0) -# define R300_ALPHA0_SHADING_SOLID (0 << 2) -# define R300_ALPHA0_SHADING_FLAT (1 << 2) -# define R300_ALPHA0_SHADING_GOURAUD (2 << 2) -# define R300_RGB1_SHADING_SOLID (0 << 4) -# define R300_RGB1_SHADING_FLAT (1 << 4) -# define R300_RGB1_SHADING_GOURAUD (2 << 4) -# define R300_ALPHA1_SHADING_SOLID (0 << 6) -# define R300_ALPHA1_SHADING_FLAT (1 << 6) -# define R300_ALPHA1_SHADING_GOURAUD (2 << 6) -# define R300_RGB2_SHADING_SOLID (0 << 8) -# define R300_RGB2_SHADING_FLAT (1 << 8) -# define R300_RGB2_SHADING_GOURAUD (2 << 8) -# define R300_ALPHA2_SHADING_SOLID (0 << 10) -# define R300_ALPHA2_SHADING_FLAT (1 << 10) -# define R300_ALPHA2_SHADING_GOURAUD (2 << 10) -# define R300_RGB3_SHADING_SOLID (0 << 12) -# define R300_RGB3_SHADING_FLAT (1 << 12) -# define R300_RGB3_SHADING_GOURAUD (2 << 12) -# define R300_ALPHA3_SHADING_SOLID (0 << 14) -# define R300_ALPHA3_SHADING_FLAT (1 << 14) -# define R300_ALPHA3_SHADING_GOURAUD (2 << 14) -#define R300_GA_OFFSET 0x4290 - -#define R500_SU_REG_DEST 0x42c8 - -#define R300_VAP_CNTL_STATUS 0x2140 -# define R300_PVS_BYPASS (1 << 8) -#define R300_VAP_PVS_STATE_FLUSH_REG 0x2284 -#define R300_VAP_CNTL 0x2080 -# define R300_PVS_NUM_SLOTS_SHIFT 0 -# define R300_PVS_NUM_CNTLRS_SHIFT 4 -# define R300_PVS_NUM_FPUS_SHIFT 8 -# define R300_VF_MAX_VTX_NUM_SHIFT 18 -# define R300_GL_CLIP_SPACE_DEF (0 << 22) -# define R300_DX_CLIP_SPACE_DEF (1 << 22) -# define R500_TCL_STATE_OPTIMIZATION (1 << 23) -#define R300_VAP_VTE_CNTL 0x20B0 -# define R300_VPORT_X_SCALE_ENA (1 << 0) -# define R300_VPORT_X_OFFSET_ENA (1 << 1) -# define R300_VPORT_Y_SCALE_ENA (1 << 2) -# define R300_VPORT_Y_OFFSET_ENA (1 << 3) -# define R300_VPORT_Z_SCALE_ENA (1 << 4) -# define R300_VPORT_Z_OFFSET_ENA (1 << 5) -# define R300_VTX_XY_FMT (1 << 8) -# define R300_VTX_Z_FMT (1 << 9) -# define R300_VTX_W0_FMT (1 << 10) -#define R300_VAP_VTX_STATE_CNTL 0x2180 -#define R300_VAP_PSC_SGN_NORM_CNTL 0x21DC -#define R300_VAP_PROG_STREAM_CNTL_0 0x2150 -# define R300_DATA_TYPE_0_SHIFT 0 -# define R300_DATA_TYPE_FLOAT_1 0 -# define R300_DATA_TYPE_FLOAT_2 1 -# define R300_DATA_TYPE_FLOAT_3 2 -# define R300_DATA_TYPE_FLOAT_4 3 -# define R300_DATA_TYPE_BYTE 4 -# define R300_DATA_TYPE_D3DCOLOR 5 -# define R300_DATA_TYPE_SHORT_2 6 -# define R300_DATA_TYPE_SHORT_4 7 -# define R300_DATA_TYPE_VECTOR_3_TTT 8 -# define R300_DATA_TYPE_VECTOR_3_EET 9 -# define R300_SKIP_DWORDS_0_SHIFT 4 -# define R300_DST_VEC_LOC_0_SHIFT 8 -# define R300_LAST_VEC_0 (1 << 13) -# define R300_SIGNED_0 (1 << 14) -# define R300_NORMALIZE_0 (1 << 15) -# define R300_DATA_TYPE_1_SHIFT 16 -# define R300_SKIP_DWORDS_1_SHIFT 20 -# define R300_DST_VEC_LOC_1_SHIFT 24 -# define R300_LAST_VEC_1 (1 << 29) -# define R300_SIGNED_1 (1 << 30) -# define R300_NORMALIZE_1 (1 << 31) -#define R300_VAP_PROG_STREAM_CNTL_1 0x2154 -# define R300_DATA_TYPE_2_SHIFT 0 -# define R300_SKIP_DWORDS_2_SHIFT 4 -# define R300_DST_VEC_LOC_2_SHIFT 8 -# define R300_LAST_VEC_2 (1 << 13) -# define R300_SIGNED_2 (1 << 14) -# define R300_NORMALIZE_2 (1 << 15) -# define R300_DATA_TYPE_3_SHIFT 16 -# define R300_SKIP_DWORDS_3_SHIFT 20 -# define R300_DST_VEC_LOC_3_SHIFT 24 -# define R300_LAST_VEC_3 (1 << 29) -# define R300_SIGNED_3 (1 << 30) -# define R300_NORMALIZE_3 (1 << 31) -#define R300_VAP_PROG_STREAM_CNTL_EXT_0 0x21e0 -# define R300_SWIZZLE_SELECT_X_0_SHIFT 0 -# define R300_SWIZZLE_SELECT_Y_0_SHIFT 3 -# define R300_SWIZZLE_SELECT_Z_0_SHIFT 6 -# define R300_SWIZZLE_SELECT_W_0_SHIFT 9 -# define R300_SWIZZLE_SELECT_X 0 -# define R300_SWIZZLE_SELECT_Y 1 -# define R300_SWIZZLE_SELECT_Z 2 -# define R300_SWIZZLE_SELECT_W 3 -# define R300_SWIZZLE_SELECT_FP_ZERO 4 -# define R300_SWIZZLE_SELECT_FP_ONE 5 -# define R300_WRITE_ENA_0_SHIFT 12 -# define R300_WRITE_ENA_X 1 -# define R300_WRITE_ENA_Y 2 -# define R300_WRITE_ENA_Z 4 -# define R300_WRITE_ENA_W 8 -# define R300_SWIZZLE_SELECT_X_1_SHIFT 16 -# define R300_SWIZZLE_SELECT_Y_1_SHIFT 19 -# define R300_SWIZZLE_SELECT_Z_1_SHIFT 22 -# define R300_SWIZZLE_SELECT_W_1_SHIFT 25 -# define R300_WRITE_ENA_1_SHIFT 28 -#define R300_VAP_PROG_STREAM_CNTL_EXT_1 0x21e4 -# define R300_SWIZZLE_SELECT_X_2_SHIFT 0 -# define R300_SWIZZLE_SELECT_Y_2_SHIFT 3 -# define R300_SWIZZLE_SELECT_Z_2_SHIFT 6 -# define R300_SWIZZLE_SELECT_W_2_SHIFT 9 -# define R300_WRITE_ENA_2_SHIFT 12 -# define R300_SWIZZLE_SELECT_X_3_SHIFT 16 -# define R300_SWIZZLE_SELECT_Y_3_SHIFT 19 -# define R300_SWIZZLE_SELECT_Z_3_SHIFT 22 -# define R300_SWIZZLE_SELECT_W_3_SHIFT 25 -# define R300_WRITE_ENA_3_SHIFT 28 -#define R300_VAP_PVS_CODE_CNTL_0 0x22D0 -# define R300_PVS_FIRST_INST_SHIFT 0 -# define R300_PVS_XYZW_VALID_INST_SHIFT 10 -# define R300_PVS_LAST_INST_SHIFT 20 -#define R300_VAP_PVS_CODE_CNTL_1 0x22D8 -# define R300_PVS_LAST_VTX_SRC_INST_SHIFT 0 -#define R300_VAP_PVS_VECTOR_INDX_REG 0x2200 -#define R300_VAP_PVS_VECTOR_DATA_REG 0x2204 -/* PVS instructions */ -/* Opcode and dst instruction */ -#define R300_PVS_DST_OPCODE(x) (x << 0) -/* Vector ops */ -# define R300_VECTOR_NO_OP 0 -# define R300_VE_DOT_PRODUCT 1 -# define R300_VE_MULTIPLY 2 -# define R300_VE_ADD 3 -# define R300_VE_MULTIPLY_ADD 4 -# define R300_VE_DISTANCE_VECTOR 5 -# define R300_VE_FRACTION 6 -# define R300_VE_MAXIMUM 7 -# define R300_VE_MINIMUM 8 -# define R300_VE_SET_GREATER_THAN_EQUAL 9 -# define R300_VE_SET_LESS_THAN 10 -# define R300_VE_MULTIPLYX2_ADD 11 -# define R300_VE_MULTIPLY_CLAMP 12 -# define R300_VE_FLT2FIX_DX 13 -# define R300_VE_FLT2FIX_DX_RND 14 -/* R500 additions */ -# define R500_VE_PRED_SET_EQ_PUSH 15 -# define R500_VE_PRED_SET_GT_PUSH 16 -# define R500_VE_PRED_SET_GTE_PUSH 17 -# define R500_VE_PRED_SET_NEQ_PUSH 18 -# define R500_VE_COND_WRITE_EQ 19 -# define R500_VE_COND_WRITE_GT 20 -# define R500_VE_COND_WRITE_GTE 21 -# define R500_VE_COND_WRITE_NEQ 22 -# define R500_VE_COND_MUX_EQ 23 -# define R500_VE_COND_MUX_GT 24 -# define R500_VE_COND_MUX_GTE 25 -# define R500_VE_SET_GREATER_THAN 26 -# define R500_VE_SET_EQUAL 27 -# define R500_VE_SET_NOT_EQUAL 28 -/* Math ops */ -# define R300_MATH_NO_OP 0 -# define R300_ME_EXP_BASE2_DX 1 -# define R300_ME_LOG_BASE2_DX 2 -# define R300_ME_EXP_BASEE_FF 3 -# define R300_ME_LIGHT_COEFF_DX 4 -# define R300_ME_POWER_FUNC_FF 5 -# define R300_ME_RECIP_DX 6 -# define R300_ME_RECIP_FF 7 -# define R300_ME_RECIP_SQRT_DX 8 -# define R300_ME_RECIP_SQRT_FF 9 -# define R300_ME_MULTIPLY 10 -# define R300_ME_EXP_BASE2_FULL_DX 11 -# define R300_ME_LOG_BASE2_FULL_DX 12 -# define R300_ME_POWER_FUNC_FF_CLAMP_B 13 -# define R300_ME_POWER_FUNC_FF_CLAMP_B1 14 -# define R300_ME_POWER_FUNC_FF_CLAMP_01 15 -# define R300_ME_SIN 16 -# define R300_ME_COS 17 -/* R500 additions */ -# define R500_ME_LOG_BASE2_IEEE 18 -# define R500_ME_RECIP_IEEE 19 -# define R500_ME_RECIP_SQRT_IEEE 20 -# define R500_ME_PRED_SET_EQ 21 -# define R500_ME_PRED_SET_GT 22 -# define R500_ME_PRED_SET_GTE 23 -# define R500_ME_PRED_SET_NEQ 24 -# define R500_ME_PRED_SET_CLR 25 -# define R500_ME_PRED_SET_INV 26 -# define R500_ME_PRED_SET_POP 27 -# define R500_ME_PRED_SET_RESTORE 28 -/* macro */ -# define R300_PVS_MACRO_OP_2CLK_MADD 0 -# define R300_PVS_MACRO_OP_2CLK_M2X_ADD 1 -#define R300_PVS_DST_MATH_INST (1 << 6) -#define R300_PVS_DST_MACRO_INST (1 << 7) -#define R300_PVS_DST_REG_TYPE(x) (x << 8) -# define R300_PVS_DST_REG_TEMPORARY 0 -# define R300_PVS_DST_REG_A0 1 -# define R300_PVS_DST_REG_OUT 2 -# define R500_PVS_DST_REG_OUT_REPL_X 3 -# define R300_PVS_DST_REG_ALT_TEMPORARY 4 -# define R300_PVS_DST_REG_INPUT 5 -#define R300_PVS_DST_ADDR_MODE_1 (1 << 12) -#define R300_PVS_DST_OFFSET(x) (x << 13) -#define R300_PVS_DST_WE_X (1 << 20) -#define R300_PVS_DST_WE_Y (1 << 21) -#define R300_PVS_DST_WE_Z (1 << 22) -#define R300_PVS_DST_WE_W (1 << 23) -#define R300_PVS_DST_VE_SAT (1 << 24) -#define R300_PVS_DST_ME_SAT (1 << 25) -#define R300_PVS_DST_PRED_ENABLE (1 << 26) -#define R300_PVS_DST_PRED_SENSE (1 << 27) -#define R300_PVS_DST_DUAL_MATH_OP (1 << 28) -#define R300_PVS_DST_ADDR_SEL(x) (x << 29) -#define R300_PVS_DST_ADDR_MODE_0 (1 << 31) -/* src operand instruction */ -#define R300_PVS_SRC_REG_TYPE(x) (x << 0) -# define R300_PVS_SRC_REG_TEMPORARY 0 -# define R300_PVS_SRC_REG_INPUT 1 -# define R300_PVS_SRC_REG_CONSTANT 2 -# define R300_PVS_SRC_REG_ALT_TEMPORARY 3 -#define R300_SPARE_0 (1 << 2) -#define R300_PVS_SRC_ABS_XYZW (1 << 3) -#define R300_PVS_SRC_ADDR_MODE_0 (1 << 4) -#define R300_PVS_SRC_OFFSET(x) (x << 5) -#define R300_PVS_SRC_SWIZZLE_X(x) (x << 13) -#define R300_PVS_SRC_SWIZZLE_Y(x) (x << 16) -#define R300_PVS_SRC_SWIZZLE_Z(x) (x << 19) -#define R300_PVS_SRC_SWIZZLE_W(x) (x << 22) -# define R300_PVS_SRC_SELECT_X 0 -# define R300_PVS_SRC_SELECT_Y 1 -# define R300_PVS_SRC_SELECT_Z 2 -# define R300_PVS_SRC_SELECT_W 3 -# define R300_PVS_SRC_SELECT_FORCE_0 4 -# define R300_PVS_SRC_SELECT_FORCE_1 5 -#define R300_PVS_SRC_NEG_X (1 << 25) -#define R300_PVS_SRC_NEG_Y (1 << 26) -#define R300_PVS_SRC_NEG_Z (1 << 27) -#define R300_PVS_SRC_NEG_W (1 << 28) -#define R300_PVS_SRC_ADDR_SEL(x) (x << 29) -#define R300_PVS_SRC_ADDR_MODE_1 (1 << 31) - -#define R300_VAP_PVS_FLOW_CNTL_OPC 0x22dc -#define R300_VAP_OUT_VTX_FMT_0 0x2090 -# define R300_VTX_POS_PRESENT (1 << 0) -# define R300_VTX_COLOR_0_PRESENT (1 << 1) -# define R300_VTX_COLOR_1_PRESENT (1 << 2) -# define R300_VTX_COLOR_2_PRESENT (1 << 3) -# define R300_VTX_COLOR_3_PRESENT (1 << 4) -# define R300_VTX_PT_SIZE_PRESENT (1 << 16) -#define R300_VAP_OUT_VTX_FMT_1 0x2094 -# define R300_TEX_0_COMP_CNT_SHIFT 0 -# define R300_TEX_1_COMP_CNT_SHIFT 3 -# define R300_TEX_2_COMP_CNT_SHIFT 6 -# define R300_TEX_3_COMP_CNT_SHIFT 9 -# define R300_TEX_4_COMP_CNT_SHIFT 12 -# define R300_TEX_5_COMP_CNT_SHIFT 15 -# define R300_TEX_6_COMP_CNT_SHIFT 18 -# define R300_TEX_7_COMP_CNT_SHIFT 21 -#define R300_VAP_VTX_SIZE 0x20b4 -#define R300_VAP_GB_VERT_CLIP_ADJ 0x2220 -#define R300_VAP_GB_VERT_DISC_ADJ 0x2224 -#define R300_VAP_GB_HORZ_CLIP_ADJ 0x2228 -#define R300_VAP_GB_HORZ_DISC_ADJ 0x222c -#define R300_VAP_CLIP_CNTL 0x221c -# define R300_UCP_ENA_0 (1 << 0) -# define R300_UCP_ENA_1 (1 << 1) -# define R300_UCP_ENA_2 (1 << 2) -# define R300_UCP_ENA_3 (1 << 3) -# define R300_UCP_ENA_4 (1 << 4) -# define R300_UCP_ENA_5 (1 << 5) -# define R300_PS_UCP_MODE_SHIFT 14 -# define R300_CLIP_DISABLE (1 << 16) -# define R300_UCP_CULL_ONLY_ENA (1 << 17) -# define R300_BOUNDARY_EDGE_FLAG_ENA (1 << 18) -#define R300_VAP_PVS_STATE_FLUSH_REG 0x2284 - -#define R500_VAP_INDEX_OFFSET 0x208c - -#define R300_SU_TEX_WRAP 0x42a0 -#define R300_SU_POLY_OFFSET_ENABLE 0x42b4 -#define R300_SU_CULL_MODE 0x42b8 -# define R300_CULL_FRONT (1 << 0) -# define R300_CULL_BACK (1 << 1) -# define R300_FACE_POS (0 << 2) -# define R300_FACE_NEG (1 << 2) -#define R300_SU_DEPTH_SCALE 0x42c0 -#define R300_SU_DEPTH_OFFSET 0x42c4 - -#define R300_RS_COUNT 0x4300 -# define R300_RS_COUNT_IT_COUNT_SHIFT 0 -# define R300_RS_COUNT_IC_COUNT_SHIFT 7 -# define R300_RS_COUNT_HIRES_EN (1 << 18) - -#define R300_RS_IP_0 0x4310 -#define R300_RS_IP_1 0x4314 -# define R300_RS_TEX_PTR(x) (x << 0) -# define R300_RS_COL_PTR(x) (x << 6) -# define R300_RS_COL_FMT(x) (x << 9) -# define R300_RS_COL_FMT_RGBA 0 -# define R300_RS_COL_FMT_RGB0 2 -# define R300_RS_COL_FMT_RGB1 3 -# define R300_RS_COL_FMT_000A 4 -# define R300_RS_COL_FMT_0000 5 -# define R300_RS_COL_FMT_0001 6 -# define R300_RS_COL_FMT_111A 8 -# define R300_RS_COL_FMT_1110 9 -# define R300_RS_COL_FMT_1111 10 -# define R300_RS_SEL_S(x) (x << 13) -# define R300_RS_SEL_T(x) (x << 16) -# define R300_RS_SEL_R(x) (x << 19) -# define R300_RS_SEL_Q(x) (x << 22) -# define R300_RS_SEL_C0 0 -# define R300_RS_SEL_C1 1 -# define R300_RS_SEL_C2 2 -# define R300_RS_SEL_C3 3 -# define R300_RS_SEL_K0 4 -# define R300_RS_SEL_K1 5 -#define R300_RS_INST_COUNT 0x4304 -# define R300_INST_COUNT_RS(x) (x << 0) -# define R300_RS_W_EN (1 << 4) -# define R300_TX_OFFSET_RS(x) (x << 5) -#define R300_RS_INST_0 0x4330 -#define R300_RS_INST_1 0x4334 -# define R300_INST_TEX_ID(x) (x << 0) -# define R300_RS_INST_TEX_CN_WRITE (1 << 3) -# define R300_INST_TEX_ADDR(x) (x << 6) - -#define R300_TX_INVALTAGS 0x4100 -#define R300_TX_FILTER0_0 0x4400 -#define R300_TX_FILTER0_1 0x4404 -# define R300_TX_CLAMP_S(x) (x << 0) -# define R300_TX_CLAMP_T(x) (x << 3) -# define R300_TX_CLAMP_R(x) (x << 6) -# define R300_TX_CLAMP_WRAP 0 -# define R300_TX_CLAMP_MIRROR 1 -# define R300_TX_CLAMP_CLAMP_LAST 2 -# define R300_TX_CLAMP_MIRROR_CLAMP_LAST 3 -# define R300_TX_CLAMP_CLAMP_BORDER 4 -# define R300_TX_CLAMP_MIRROR_CLAMP_BORDER 5 -# define R300_TX_CLAMP_CLAMP_GL 6 -# define R300_TX_CLAMP_MIRROR_CLAMP_GL 7 -# define R300_TX_MAG_FILTER_NEAREST (1 << 9) -# define R300_TX_MIN_FILTER_NEAREST (1 << 11) -# define R300_TX_MAG_FILTER_LINEAR (2 << 9) -# define R300_TX_MIN_FILTER_LINEAR (2 << 11) -# define R300_TX_ID_SHIFT 28 -#define R300_TX_FILTER1_0 0x4440 -#define R300_TX_FILTER1_1 0x4444 -#define R300_TX_FORMAT0_0 0x4480 -#define R300_TX_FORMAT0_1 0x4484 -# define R300_TXWIDTH_SHIFT 0 -# define R300_TXHEIGHT_SHIFT 11 -# define R300_NUM_LEVELS_SHIFT 26 -# define R300_NUM_LEVELS_MASK 0x -# define R300_TXPROJECTED (1 << 30) -# define R300_TXPITCH_EN (1 << 31) -#define R300_TX_FORMAT1_0 0x44c0 -#define R300_TX_FORMAT1_1 0x44c4 -# define R300_TX_FORMAT_X8 0x0 -# define R300_TX_FORMAT_X16 0x1 -# define R300_TX_FORMAT_Y4X4 0x2 -# define R300_TX_FORMAT_Y8X8 0x3 -# define R300_TX_FORMAT_Y16X16 0x4 -# define R300_TX_FORMAT_Z3Y3X2 0x5 -# define R300_TX_FORMAT_Z5Y6X5 0x6 -# define R300_TX_FORMAT_Z6Y5X5 0x7 -# define R300_TX_FORMAT_Z11Y11X10 0x8 -# define R300_TX_FORMAT_Z10Y11X11 0x9 -# define R300_TX_FORMAT_W4Z4Y4X4 0xA -# define R300_TX_FORMAT_W1Z5Y5X5 0xB -# define R300_TX_FORMAT_W8Z8Y8X8 0xC -# define R300_TX_FORMAT_W2Z10Y10X10 0xD -# define R300_TX_FORMAT_W16Z16Y16X16 0xE -# define R300_TX_FORMAT_DXT1 0xF -# define R300_TX_FORMAT_DXT3 0x10 -# define R300_TX_FORMAT_DXT5 0x11 -# define R300_TX_FORMAT_D3DMFT_CxV8U8 0x12 /* no swizzle */ -# define R300_TX_FORMAT_A8R8G8B8 0x13 /* no swizzle */ -# define R300_TX_FORMAT_B8G8_B8G8 0x14 /* no swizzle */ -# define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */ -# define R300_TX_FORMAT_VYUY422 0x14 /* no swizzle */ -# define R300_TX_FORMAT_YVYU422 0x15 /* no swizzle */ -# define R300_TX_FORMAT_X24_Y8 0x1e -# define R300_TX_FORMAT_X32 0x1e - /* Floating point formats */ - /* Note - hardware supports both 16 and 32 bit floating point */ -# define R300_TX_FORMAT_FL_I16 0x18 -# define R300_TX_FORMAT_FL_I16A16 0x19 -# define R300_TX_FORMAT_FL_R16G16B16A16 0x1A -# define R300_TX_FORMAT_FL_I32 0x1B -# define R300_TX_FORMAT_FL_I32A32 0x1C -# define R300_TX_FORMAT_FL_R32G32B32A32 0x1D - /* alpha modes, convenience mostly */ - /* if you have alpha, pick constant appropriate to the - number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */ -# define R300_TX_FORMAT_ALPHA_1CH 0x000 -# define R300_TX_FORMAT_ALPHA_2CH 0x200 -# define R300_TX_FORMAT_ALPHA_4CH 0x600 -# define R300_TX_FORMAT_ALPHA_NONE 0xA00 - /* Swizzling */ - /* constants */ -# define R300_TX_FORMAT_X 0 -# define R300_TX_FORMAT_Y 1 -# define R300_TX_FORMAT_Z 2 -# define R300_TX_FORMAT_W 3 -# define R300_TX_FORMAT_ZERO 4 -# define R300_TX_FORMAT_ONE 5 - /* 2.0*Z, everything above 1.0 is set to 0.0 */ -# define R300_TX_FORMAT_CUT_Z 6 - /* 2.0*W, everything above 1.0 is set to 0.0 */ -# define R300_TX_FORMAT_CUT_W 7 - -# define R300_TX_FORMAT_B_SHIFT 18 -# define R300_TX_FORMAT_G_SHIFT 15 -# define R300_TX_FORMAT_R_SHIFT 12 -# define R300_TX_FORMAT_A_SHIFT 9 - - /* Convenience macro to take care of layout and swizzling */ -# define R300_EASY_TX_FORMAT(B, G, R, A, FMT) ( \ - ((R300_TX_FORMAT_##B)< Date: Sat, 24 Jan 2009 03:34:17 -0800 Subject: r300: Add some useful debugging information; remove a couple compile warnings. Deck chairs on the Titanic. --- src/gallium/drivers/r300/r300_chipset.h | 27 ------------- src/gallium/drivers/r300/r300_cs.h | 16 ++++++-- src/gallium/drivers/r300/r300_screen.c | 72 +++++++++++++++++++++++++++++---- 3 files changed, 77 insertions(+), 38 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index f1502ff76c..c4104a65cb 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -73,33 +73,6 @@ enum { CHIP_FAMILY_RV570 }; -static const char* chip_families[] = { - "R300", - "R350", - "R360", - "RV350", - "RV370", - "RV380", - "R420", - "R423", - "R430", - "R480", - "R481", - "RV410", - "RS400", - "RC410", - "RS480", - "RS482", - "RS690", - "RS740", - "RV515", - "R520", - "RV530", - "R580", - "RV560", - "RV570" -}; - void r300_parse_chipset(struct r300_capabilities* caps); #endif /* R300_CHIPSET_H */ diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 67cb5ee7d1..2dcb92d9af 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -67,6 +67,8 @@ static uint32_t pack_float_32(float f) #define BEGIN_CS(size) do { \ CHECK_CS(size); \ + debug_printf("r300: BEGIN_CS in %s (%s:%d)", __FUNCTION__, __FILE__, \ + __LINE__); \ cs_winsys->begin_cs(cs, (size), __FILE__, __FUNCTION__, __LINE__); \ } while (0) @@ -91,10 +93,16 @@ static uint32_t pack_float_32(float f) cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ } while (0) -#define END_CS \ - cs_winsys->end_cs(cs, __FILE__, __FUNCTION__, __LINE__) +#define END_CS do { \ + debug_printf("r300: END_CS in %s (%s:%d)", __FUNCTION__, __FILE__, \ + __LINE__); \ + cs_winsys->end_cs(cs, __FILE__, __FUNCTION__, __LINE__); \ +} while (0) -#define FLUSH_CS \ - cs_winsys->flush_cs(cs) +#define FLUSH_CS do { \ + debug_printf("r300: FLUSH_CS in %s (%s:%d)", __FUNCTION__, __FILE__, \ + __LINE__); \ + cs_winsys->flush_cs(cs); \ +} while (0) #endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index bd5aa4f466..dc1e41749f 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -22,11 +22,44 @@ #include "r300_screen.h" +/* Return the identifier behind whom the brave coders responsible for this + * amalgamation of code, sweat, and duct tape, routinely obscure their names. + * + * ...I should have just put "Corbin Simpson", but I'm not that cool. + * + * (Or egotistical. Yet.) */ static const char* r300_get_vendor(struct pipe_screen* pscreen) { return "X.Org R300 Project"; } +static const char* chip_families[] = { + "R300", + "R350", + "R360", + "RV350", + "RV370", + "RV380", + "R420", + "R423", + "R430", + "R480", + "R481", + "RV410", + "RS400", + "RC410", + "RS480", + "RS482", + "RS690", + "RS740", + "RV515", + "R520", + "RV530", + "R580", + "RV560", + "RV570" +}; + static const char* r300_get_name(struct pipe_screen* pscreen) { struct r300_screen* r300screen = r300_screen(pscreen); @@ -74,18 +107,39 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) /* IN THEORY */ return 0; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - /* 12 == 2048x2048 */ - return 12; + if (r300screen->caps->is_r500) { + /* 13 == 4096x4096 */ + return 13; + } else { + /* 12 == 2048x2048 */ + return 12; + } case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - /* XXX educated guess */ - return 8; + /* So, technically, the limit is the same as above, but some math + * shows why this is silly. Assuming RGBA, 4cpp, we can see that + * 4096*4096*4096 = 64.0 GiB exactly, so it's not exactly + * practical. However, if at some point a game really wants this, + * then we can remove this limit. */ + if (r300screen->caps->is_r500) { + /* 9 == 256x256x256 */ + return 9; + } else { + /* 8 == 128*128*128 */ + return 8; + } case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - /* XXX educated guess */ - return 11; + if (r300screen->caps->is_r500) { + /* 13 == 4096x4096 */ + return 13; + } else { + /* 12 == 2048x2048 */ + return 12; + } case PIPE_CAP_MAX_RENDER_TARGETS: /* XXX 4 eventually */ return 1; default: + debug_printf("r300: Implementation error: Bad param %d", param); return 0; } } @@ -108,7 +162,7 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: return 16.0f; default: - /* XXX implementation error? */ + debug_printf("r300: Implementation error: Bad paramf %d", param); return 0.0f; } } @@ -121,6 +175,8 @@ static boolean check_tex_2d_format(enum pipe_format format) case PIPE_FORMAT_I8_UNORM: return TRUE; default: + debug_printf("r300: Warning: Got unknown format: %d, in %s", + format, __FUNCTION__); break; } @@ -138,6 +194,8 @@ static boolean r300_is_format_supported(struct pipe_screen* pscreen, case PIPE_TEXTURE_2D: return check_tex_2d_format(format); default: + debug_printf("r300: Warning: Got unknown format target: %d", + format); break; } -- cgit v1.2.3 From 161f4068aa5f8b556d0c00c3e31192b3736aada5 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 04:03:11 -0800 Subject: r300: More state setters. --- src/gallium/drivers/r300/r300_state.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index e52d8ec9c2..1f6abc2385 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -704,13 +704,33 @@ static void r300_set_scissor_state(struct pipe_context* pipe, } static void r300_set_viewport_state(struct pipe_context* pipe, - const struct pipe_viewport_state* state) + const struct pipe_viewport_state* state) { struct r300_context* r300 = r300_context(pipe); /* XXX handing this off to Draw for now */ draw_set_viewport_state(r300->draw, state); } +static void r300_set_vertex_buffers(struct pipe_context* pipe, + unsigned count, + const struct pipe_vertex_buffer* buffers) +{ + struct r300_context* r300 = r300_context(pipe); + /* XXX Draw */ + draw_flush(r300->draw); + draw_set_vertex_buffers(r300->draw, count, buffers); +} + +static void r300_set_vertex_elements(struct pipe_context* pipe, + unsigned count, + const struct pipe_vertex_element* elements) +{ + struct r300_context* r300 = r300_context(pipe); + /* XXX Draw */ + draw_flush(r300->draw); + draw_set_vertex_elements(r300->draw, count, elements); +} + static void* r300_create_vs_state(struct pipe_context* pipe, const struct pipe_shader_state* state) { @@ -772,8 +792,8 @@ void r300_init_state_functions(struct r300_context* r300) r300->context.set_viewport_state = r300_set_viewport_state; - /* XXX r300->context.set_vertex_buffers = r300_set_vertex_buffers; - * XXX r300->context.set_vertex_elements = r300_set_vertex_elements; */ + r300->context.set_vertex_buffers = r300_set_vertex_buffers; + r300->context.set_vertex_elements = r300_set_vertex_elements; r300->context.create_vs_state = r300_create_vs_state; r300->context.bind_vs_state = r300_bind_vs_state; -- cgit v1.2.3 From f2a7d4f2e8e890e69e1dfa9067db4e90df63989f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 04:03:27 -0800 Subject: r300: Newlines, dammit! --- src/gallium/drivers/r300/r300_cs.h | 6 +++--- src/gallium/drivers/r300/r300_screen.c | 10 ++++++---- 2 files changed, 9 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 2dcb92d9af..e6860cbaf7 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -67,7 +67,7 @@ static uint32_t pack_float_32(float f) #define BEGIN_CS(size) do { \ CHECK_CS(size); \ - debug_printf("r300: BEGIN_CS in %s (%s:%d)", __FUNCTION__, __FILE__, \ + debug_printf("r300: BEGIN_CS in %s (%s:%d)\n", __FUNCTION__, __FILE__, \ __LINE__); \ cs_winsys->begin_cs(cs, (size), __FILE__, __FUNCTION__, __LINE__); \ } while (0) @@ -94,13 +94,13 @@ static uint32_t pack_float_32(float f) } while (0) #define END_CS do { \ - debug_printf("r300: END_CS in %s (%s:%d)", __FUNCTION__, __FILE__, \ + debug_printf("r300: END_CS in %s (%s:%d)\n", __FUNCTION__, __FILE__, \ __LINE__); \ cs_winsys->end_cs(cs, __FILE__, __FUNCTION__, __LINE__); \ } while (0) #define FLUSH_CS do { \ - debug_printf("r300: FLUSH_CS in %s (%s:%d)", __FUNCTION__, __FILE__, \ + debug_printf("r300: FLUSH_CS in %s (%s:%d)\n", __FUNCTION__, __FILE__, \ __LINE__); \ cs_winsys->flush_cs(cs); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index dc1e41749f..25ddb0e8c6 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -139,7 +139,8 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) /* XXX 4 eventually */ return 1; default: - debug_printf("r300: Implementation error: Bad param %d", param); + debug_printf("r300: Implementation error: Bad param %d\n", + param); return 0; } } @@ -162,7 +163,8 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: return 16.0f; default: - debug_printf("r300: Implementation error: Bad paramf %d", param); + debug_printf("r300: Implementation error: Bad paramf %d\n", + param); return 0.0f; } } @@ -175,7 +177,7 @@ static boolean check_tex_2d_format(enum pipe_format format) case PIPE_FORMAT_I8_UNORM: return TRUE; default: - debug_printf("r300: Warning: Got unknown format: %d, in %s", + debug_printf("r300: Warning: Got unknown format: %d, in %s\n", format, __FUNCTION__); break; } @@ -194,7 +196,7 @@ static boolean r300_is_format_supported(struct pipe_screen* pscreen, case PIPE_TEXTURE_2D: return check_tex_2d_format(format); default: - debug_printf("r300: Warning: Got unknown format target: %d", + debug_printf("r300: Warning: Got unknown format target: %d\n", format); break; } -- cgit v1.2.3 From f045988ee101fbef77f280f37f56967e6a95c5f2 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 04:08:33 -0800 Subject: r300: Add more capabilities. --- src/gallium/drivers/r300/r300_screen.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 25ddb0e8c6..6de97a79e1 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -80,9 +80,6 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) case PIPE_CAP_NPOT_TEXTURES: /* IN THEORY */ return 0; - case PIPE_CAP_S3TC: - /* IN THEORY */ - return 0; case PIPE_CAP_TWO_SIDED_STENCIL: /* IN THEORY */ /* if (r300screen->is_r500) { @@ -91,21 +88,27 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) * return 0; * } */ return 0; + case PIPE_CAP_GLSL: + /* IN THEORY */ + return 0; + case PIPE_CAP_S3TC: + /* IN THEORY */ + return 0; case PIPE_CAP_ANISOTROPIC_FILTER: /* IN THEORY */ return 0; case PIPE_CAP_POINT_SPRITE: /* IN THEORY */ return 0; + case PIPE_CAP_MAX_RENDER_TARGETS: + /* XXX 4 eventually */ + return 1; case PIPE_CAP_OCCLUSION_QUERY: /* IN THEORY */ return 0; case PIPE_CAP_TEXTURE_SHADOW_MAP: /* IN THEORY */ return 0; - case PIPE_CAP_GLSL: - /* IN THEORY */ - return 0; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: if (r300screen->caps->is_r500) { /* 13 == 4096x4096 */ @@ -135,9 +138,13 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) /* 12 == 2048x2048 */ return 12; } - case PIPE_CAP_MAX_RENDER_TARGETS: - /* XXX 4 eventually */ + case PIPE_CAP_TEXTURE_MIRROR_CLAMP: + return 1; + case PIPE_CAP_TEXTURE_MIRROR_REPEAT: return 1; + case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: + /* XXX guessing */ + return 2; default: debug_printf("r300: Implementation error: Bad param %d\n", param); -- cgit v1.2.3 From 57b062f77551f0111fd210a2d8dd44be6acfc818 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 04:11:03 -0800 Subject: r300: Make format names legible. --- src/gallium/drivers/r300/r300_screen.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 6de97a79e1..607dfe911c 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -184,8 +184,8 @@ static boolean check_tex_2d_format(enum pipe_format format) case PIPE_FORMAT_I8_UNORM: return TRUE; default: - debug_printf("r300: Warning: Got unknown format: %d, in %s\n", - format, __FUNCTION__); + debug_printf("r300: Warning: Got unknown format: %s, in %s\n", + pf_name(format), __FUNCTION__); break; } -- cgit v1.2.3 From 188f61d43ae82c63d557d25282e349926321e3d0 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 05:44:01 -0800 Subject: r300: Hook up clear, set it to fallback. --- src/gallium/drivers/r300/r300_context.c | 2 ++ src/gallium/drivers/r300/r300_context.h | 1 + src/gallium/drivers/r300/r300_state.c | 18 ++++++++++++++++-- src/gallium/drivers/r300/r300_surface.c | 8 +++++++- 4 files changed, 26 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 314b2f0a11..e63e1278bf 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -47,6 +47,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.destroy = r300_destroy_context; + r300->context.clear = r300_clear; + r300->draw = draw_create(); r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 52ddfa1df9..f246c57f48 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -27,6 +27,7 @@ #include "pipe/p_context.h" #include "util/u_memory.h" +#include "r300_clear.h" #include "r300_screen.h" #include "r300_winsys.h" diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 1f6abc2385..907ebe5c75 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -204,6 +204,14 @@ static void r300_set_clip_state(struct pipe_context* pipe, draw_set_clip_state(r300->draw, state); } +static void + r300_set_constant_buffer(struct pipe_context* pipe, + uint shader, uint index, + const struct pipe_constant_buffer* buffer) +{ + /* XXX */ +} + static uint32_t translate_depth_stencil_function(int zs_func) { switch (zs_func) { case PIPE_FUNC_NEVER: @@ -367,6 +375,12 @@ static void r300_delete_dsa_state(struct pipe_context* pipe, FREE(state); } +static void r300_set_edgeflags(struct pipe_context* pipe, + const unsigned* bitfield) +{ + /* XXX you know it's bad when i915 has this blank too */ +} + static void r300_set_framebuffer_state(struct pipe_context* pipe, const struct pipe_framebuffer_state* state) @@ -762,13 +776,13 @@ void r300_init_state_functions(struct r300_context* r300) r300->context.set_clip_state = r300_set_clip_state; - /* XXX r300->context.set_constant_buffer = r300_set_constant_buffer; */ + r300->context.set_constant_buffer = r300_set_constant_buffer; r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; - /* XXX r300->context.set_edgeflags = r300_set_edgeflags; */ + r300->context.set_edgeflags = r300_set_edgeflags; r300->context.set_framebuffer_state = r300_set_framebuffer_state; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index dd1c8862a7..c9957a0af2 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -30,6 +30,12 @@ static void r300_surface_fill(struct pipe_context* pipe, unsigned w, unsigned h, unsigned color) { + +void *dst_map = pipe->screen->surface_map( pipe->screen, dest, +PIPE_BUFFER_USAGE_CPU_WRITE ); +pipe_fill_rect(dst_map, &dest->block, dest->stride, x, y, w, h, color); +pipe->screen->surface_unmap(pipe->screen, dest); +return; struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; @@ -278,7 +284,7 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX might have to switch to 2D */ OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_CS_RELOC(0, dest->buffer, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX this needs more TLC (or TCL, as it were) */ OUT_CS_REG(R300_RB3D_COLORPITCH0, R300_COLOR_FORMAT_ARGB8888); #if 0 -- cgit v1.2.3 From f40e6988bdbdc89a7753d5a28323757e58f3e01f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 24 Jan 2009 06:21:00 -0800 Subject: Rebased to gallium-0.2, Jan 24 2009. --- src/gallium/drivers/r300/r300_texture.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 4adfe478c3..eb7c9d06f5 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -120,7 +120,6 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, if (surface) { surface->refcount = 1; - surface->winsys = screen->winsys; pipe_texture_reference(&surface->texture, texture); pipe_buffer_reference(screen, &surface->buffer, tex->buffer); surface->format = texture->format; -- cgit v1.2.3 From 412cf4d38be628200982208b7f93bb17530bb6db Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 25 Jan 2009 16:29:02 -0800 Subject: BROKEN This commit is only to protect against data loss, so please skip it when bisecting. Thanks. --- src/gallium/drivers/r300/r300_cs.h | 15 +- src/gallium/drivers/r300/r300_surface.c | 320 ++++++++++++++++++++++++++++++- src/gallium/winsys/drm/amd/amd_context.c | 2 +- 3 files changed, 322 insertions(+), 15 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index e6860cbaf7..edcfb9628f 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -72,19 +72,24 @@ static uint32_t pack_float_32(float f) cs_winsys->begin_cs(cs, (size), __FILE__, __FUNCTION__, __LINE__); \ } while (0) -#define OUT_CS(value) \ - cs_winsys->write_cs_dword(cs, value) +#define OUT_CS(value) do { \ + cs_winsys->write_cs_dword(cs, value); \ +} while (0) -#define OUT_CS_32F(value) \ - cs_winsys->write_cs_dword(cs, pack_float_32(value)) +#define OUT_CS_32F(value) do { \ + cs_winsys->write_cs_dword(cs, pack_float_32(value)); \ +} while (0) #define OUT_CS_REG(register, value) do { \ + debug_printf("writing 0x%x to register 0x%x\n", value, register); \ OUT_CS(CP_PACKET0(register, 0)); \ - OUT_CS(value); } while (0) + OUT_CS(value); \ +} while (0) /* Note: This expects count to be the number of registers, * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ + debug_printf("writing register sequence 0x%x\n", register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index c9957a0af2..8afa06dec8 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -30,14 +30,9 @@ static void r300_surface_fill(struct pipe_context* pipe, unsigned w, unsigned h, unsigned color) { - -void *dst_map = pipe->screen->surface_map( pipe->screen, dest, -PIPE_BUFFER_USAGE_CPU_WRITE ); -pipe_fill_rect(dst_map, &dest->block, dest->stride, x, y, w, h, color); -pipe->screen->surface_unmap(pipe->screen, dest); -return; struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); +#if 0 struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; boolean has_tcl = caps->has_tcl; boolean is_r500 = caps->is_r500; @@ -47,6 +42,13 @@ return; * XXX it goes without saying that this needs to be cleaned up and * shifted around to work with the rest of the driver's state handling. */ + BEGIN_CS(450); + /* XXX */ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + OUT_CS_REG(R300_TX_INVALTAGS, 0x0); + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + OUT_CS_REG(R300_TX_INVALTAGS, 0x0); + /* Sequence starting at R300_VAP_PROG_STREAM_CNTL_0 */ OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 1); if (has_tcl) { @@ -93,8 +95,23 @@ return; R300_VPORT_Z_OFFSET_ENA); OUT_CS(0x8); + /* XXX */ + OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); + OUT_CS(0xFFFFFF); + OUT_CS(0x0); + + OUT_CS_REG(R300_VAP_CNTL_STATUS, 0x0); + + OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); + OUT_CS(0x3f800000); + OUT_CS(0x3f800000); + OUT_CS(0x3f800000); + OUT_CS(0x3f800000); + OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xaaaaaaaa); + OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); + OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); OUT_CS(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT); @@ -135,7 +152,7 @@ return; OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); } else { - OUT_CS_REG(R300_RS_IP_0, 8); + OUT_CS_REG_SEQ(R300_RS_IP_0, 8); for (i = 0; i < 8; ++i) { OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); } @@ -287,7 +304,6 @@ return; OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX this needs more TLC (or TCL, as it were) */ OUT_CS_REG(R300_RB3D_COLORPITCH0, R300_COLOR_FORMAT_ARGB8888); -#if 0 if (flags & (CLEARBUFFER_DEPTH | CLEARBUFFER_STENCIL)) { assert(rrbd != 0); cbpitch = (rrbd->pitch / rrbd->cpp); @@ -337,7 +353,11 @@ return; (ctx->Stencil.Clear & R300_STENCILREF_MASK)); END_BATCH(); } -#endif + + OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); + OUT_CS(0x0); + OUT_CS(0x0); + OUT_CS(0x0); OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | @@ -355,7 +375,289 @@ return; /* XXX this should be split off, also figure out WTF with the numbers */ OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); + END_CS; FLUSH_CS; +#endif +BEGIN_CS(276); +OUT_CS_REG(0x1720, 0x00068000); +OUT_CS_REG(0x4100, 0x00000000); +OUT_CS_REG(0x1720, 0x00068000); +OUT_CS_REG(0x1D98, 0x43000000); +OUT_CS_REG(0x1D9C, 0x43002000); +OUT_CS_REG(0x1DA0, 0xC3000000); +OUT_CS_REG(0x1DA4, 0x43002000); +OUT_CS_REG(0x1DA8, 0x3F000000); +OUT_CS_REG(0x1DAC, 0x3F000000); +OUT_CS_REG(0x2284, 0x00000000); +OUT_CS_REG(0x2080, 0x0030046A); +OUT_CS_REG(0x20B0, 0x0000043F); +OUT_CS_REG(0x20B4, 0x00000008); +OUT_CS_REG(0x2134, 0x00FFFFFF); +OUT_CS_REG(0x2138, 0x00000000); +OUT_CS_REG(0x2140, 0x00000000); +OUT_CS_REG(0x2150, 0x00000000); +OUT_CS_REG(0x21E0, 0x00000000); +OUT_CS_REG(0x2180, 0x00000000); +OUT_CS_REG(0x2184, 0x00000000); +OUT_CS_REG(0x21DC, 0xAAAAAAAA); +OUT_CS_REG(0x221C, 0x00000000); +OUT_CS_REG(0x2220, 0x3F800000); +OUT_CS_REG(0x2224, 0x3F800000); +OUT_CS_REG(0x2228, 0x3F800000); +OUT_CS_REG(0x222C, 0x3F800000); +OUT_CS_REG(0x2288, 0x0000FFFF); +OUT_CS_REG(0x2090, 0x00000000); +OUT_CS_REG(0x2094, 0x00000000); +OUT_CS_REG(0x22D0, 0x00000000); +OUT_CS_REG(0x22D4, 0x00000000); +OUT_CS_REG(0x22D8, 0x00000000); +OUT_CS_REG(0x4008, 0x00000007); +OUT_CS_REG(0x4010, 0x66666666); +OUT_CS_REG(0x4014, 0x06666666); +OUT_CS_REG(0x4018, 0x00000011); +OUT_CS_REG(0x401C, 0x00000004); +OUT_CS_REG(0x4020, 0x00000000); +OUT_CS_REG(0x4104, 0x00000000); +OUT_CS_REG(0x4200, 0x00000000); +OUT_CS_REG(0x4204, 0x00000000); +OUT_CS_REG(0x4208, 0x3F800000); +OUT_CS_REG(0x420C, 0x3F800000); +OUT_CS_REG(0x4214, 0x00050005); +OUT_CS_REG(0x421C, 0x00060006); +OUT_CS_REG(0x4230, 0x18000006); +OUT_CS_REG(0x4234, 0x00020006); +OUT_CS_REG(0x4238, 0x3BAAAAAB); +OUT_CS_REG(0x4234, 0x00030006); +OUT_CS_REG(0x4260, 0x00000000); +OUT_CS_REG(0x4264, 0x00000000); +OUT_CS_REG(0x4268, 0x3F800000); +OUT_CS_REG(0x4274, 0x00000002); +OUT_CS_REG(0x4278, 0x0003AAAA); +OUT_CS_REG(0x427C, 0x00000000); +OUT_CS_REG(0x4280, 0x00000000); +OUT_CS_REG(0x4288, 0x00000000); +OUT_CS_REG(0x428C, 0x00000001); +OUT_CS_REG(0x4290, 0x00000000); +OUT_CS_REG(0x4294, 0x3DBF1412); +OUT_CS_REG(0x4298, 0x00000000); +OUT_CS_REG(0x42A0, 0x00000000); +OUT_CS_REG(0x42A4, 0x00000000); +OUT_CS_REG(0x42A8, 0x00000000); +OUT_CS_REG(0x42AC, 0x00000000); +OUT_CS_REG(0x42B0, 0x00000000); +OUT_CS_REG(0x42B4, 0x00000000); +OUT_CS_REG(0x42B8, 0x00000000); +OUT_CS_REG(0x42C0, 0x4B7FFFFF); +OUT_CS_REG(0x42C4, 0x00000000); +OUT_CS_REG(0x4300, 0x00000000); +OUT_CS_REG(0x4304, 0x00000000); +OUT_CS_REG(0x4310, 0x00000000); +OUT_CS_REG(0x4314, 0x00000000); +OUT_CS_REG(0x4318, 0x00000000); +OUT_CS_REG(0x431C, 0x00000000); +OUT_CS_REG(0x4320, 0x00000000); +OUT_CS_REG(0x4324, 0x00000000); +OUT_CS_REG(0x4328, 0x00000000); +OUT_CS_REG(0x432C, 0x00000000); +OUT_CS_REG(0x4330, 0x00000000); +OUT_CS_REG(0x43A4, 0x0000001C); +OUT_CS_REG(0x43A8, 0x2DA49525); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x46A4, 0x00001B00); +OUT_CS_REG(0x46A8, 0x00001B0F); +OUT_CS_REG(0x46AC, 0x00001B0F); +OUT_CS_REG(0x46B0, 0x00001B0F); +OUT_CS_REG(0x46B4, 0x00000001); +OUT_CS_REG(0x4600, 0x00000000); +OUT_CS_REG(0x4604, 0x00000000); +OUT_CS_REG(0x4608, 0x00000000); +OUT_CS_REG(0x4610, 0x00000000); +OUT_CS_REG(0x4614, 0x00000000); +OUT_CS_REG(0x4618, 0x00000000); +OUT_CS_REG(0x461C, 0x00000000); +OUT_CS_REG(0x48C0, 0x00000000); +OUT_CS_REG(0x46C0, 0x00000000); +OUT_CS_REG(0x49C0, 0x00000000); +OUT_CS_REG(0x47C0, 0x00000000); +OUT_CS_REG(0x4BC0, 0x00000002); +OUT_CS_REG(0x4BC8, 0x00000000); +OUT_CS_REG(0x4BCC, 0x00000000); +OUT_CS_REG(0x4BD0, 0x00000000); +OUT_CS_REG(0x4BD4, 0x00000000); +OUT_CS_REG(0x4BD8, 0x00000000); +OUT_CS_REG(0x4BD8, 0x00000000); +OUT_CS_REG(0x4E00, 0x00000000); +OUT_CS_REG(0x4E04, 0x20210000); +OUT_CS_REG(0x4E08, 0x20210000); +OUT_CS_REG(0x4E0C, 0x0000000F); +OUT_CS_REG(0x4E10, 0x00000000); +OUT_CS_REG(0x4E18, 0x00000000); +OUT_CS_REG(0x4E28, 0x00000000); +OUT_CS_REG(0x4E38, 0x00C00100); +OUT_CS_REG(0x4E50, 0x00000000); +OUT_CS_REG(0x4E54, 0x00000000); +OUT_CS_REG(0x4E58, 0x00000000); +OUT_CS_REG(0x4E5C, 0x00000000); +OUT_CS_REG(0x4E60, 0x00000000); +OUT_CS_REG(0x4E64, 0x00000000); +OUT_CS_REG(0x4E68, 0x00000000); +OUT_CS_REG(0x4E6C, 0x00000000); +OUT_CS_REG(0x4E70, 0x00000000); +OUT_CS_REG(0x4E88, 0x00000000); +OUT_CS_REG(0x4EA0, 0x00000000); +OUT_CS_REG(0x4EA4, 0xFFFFFFFF); +OUT_CS_REG(0x4F00, 0x00000010); +OUT_CS_REG(0x4F04, 0x00038038); +OUT_CS_REG(0x4F08, 0x00FFFF00); +OUT_CS_REG(0x4F10, 0x00000002); +OUT_CS_REG(0x4F14, 0x00000001); +OUT_CS_REG(0x4F18, 0x00000003); +OUT_CS_REG(0x4F1C, 0x00000000); +OUT_CS_REG(0x4F20, 0x00000000); +OUT_CS_REG(0x4F24, 0x00000100); +OUT_CS_REG(0x4F28, 0x00000000); +OUT_CS_REG(0x4F30, 0x00000000); +OUT_CS_REG(0x4F34, 0x00000000); +OUT_CS_REG(0x4F44, 0x00000000); +OUT_CS_REG(0x4F54, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000406); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x3F800000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000400); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000401); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000402); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000403); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000404); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000405); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2150, 0x21030003); +OUT_CS_REG(0x4BC0, 0x00000000); +OUT_CS_REG(0x21E0, 0xF688F688); +OUT_CS_REG(0x2180, 0x00000001); +OUT_CS_REG(0x2184, 0x00000405); +OUT_CS_REG(0x20B0, 0x0000043F); +OUT_CS_REG(0x20B4, 0x00000008); +OUT_CS_REG(0x21DC, 0xAAAAAAAA); +OUT_CS_REG(0x2090, 0x00000003); +OUT_CS_REG(0x2094, 0x00000000); +OUT_CS_REG(0x4104, 0x00000000); +OUT_CS_REG(0x1D98, 0x3F800000); +OUT_CS_REG(0x1D9C, 0x00000000); +OUT_CS_REG(0x1DA0, 0x3F800000); +OUT_CS_REG(0x1DA4, 0x00000000); +OUT_CS_REG(0x1DA8, 0x3F800000); +OUT_CS_REG(0x1DAC, 0x00000000); +OUT_CS_REG(0x4BD4, 0x00000000); +OUT_CS_REG(0x4E04, 0x00000000); +OUT_CS_REG(0x4E08, 0x00000000); +OUT_CS_REG(0x221C, 0x0001C000); +OUT_CS_REG(0x421C, 0x06000600); +OUT_CS_REG(0x4310, 0x00D10000); +OUT_CS_REG(0x4314, 0x00D10000); +OUT_CS_REG(0x4318, 0x00D10000); +OUT_CS_REG(0x431C, 0x00D10000); +OUT_CS_REG(0x4320, 0x00D10000); +OUT_CS_REG(0x4324, 0x00D10000); +OUT_CS_REG(0x4328, 0x00D10000); +OUT_CS_REG(0x432C, 0x00D10000); +OUT_CS_REG(0x4300, 0x00040080); +OUT_CS_REG(0x4304, 0x00000000); +OUT_CS_REG(0x4330, 0x00004000); +OUT_CS_REG(0x4600, 0x00000000); +OUT_CS_REG(0x4604, 0x00000000); +OUT_CS_REG(0x4608, 0x00000000); +OUT_CS_REG(0x4610, 0x00000000); +OUT_CS_REG(0x4614, 0x00000000); +OUT_CS_REG(0x4618, 0x00000000); +OUT_CS_REG(0x461C, 0x00400000); +OUT_CS_REG(0x48C0, 0x00050A80); +OUT_CS_REG(0x46C0, 0x1C000000); +OUT_CS_REG(0x49C0, 0x00040889); +OUT_CS_REG(0x47C0, 0x01000000); +OUT_CS_REG(0x2284, 0x00000000); +OUT_CS_REG(0x2080, 0x0030045A); +OUT_CS_REG(0x22D0, 0x00100000); +OUT_CS_REG(0x22D4, 0x00000000); +OUT_CS_REG(0x22D8, 0x00000001); +OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(0x1720, 0x10008000); +OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(0x2284, 0x00000001); +OUT_CS_REG(0x2200, 0x00000000); +OUT_CS_REG(0x2208, 0x00F00203); +OUT_CS_REG(0x2208, 0x00D10001); +OUT_CS_REG(0x2208, 0x01248001); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x2208, 0x00F02203); +OUT_CS_REG(0x2208, 0x00D10021); +OUT_CS_REG(0x2208, 0x01248021); +OUT_CS_REG(0x2208, 0x00000000); +OUT_CS_REG(0x1720, 0x00068000); +OUT_CS_REG(0x4E28, 0x00000000); +OUT_CS_REG(0x4E38, 0x00C00100); +OUT_CS_REG(0x4E0C, 0x0000000F); +OUT_CS_REG(0x4F00, 0x00000000); +OUT_CS_REG(0x4F04, 0x00000000); +OUT_CS_REG(0x4F08, 0x00FF0000); +OUT_CS_REG(0x4E4C, 0x0000000A); +OUT_CS_REG(0x4F18, 0x00000003); +OUT_CS_REG(0x1720, 0x00068000); + +END_CS; +FLUSH_CS; r300->dirty_state = R300_NEW_KITCHEN_SINK; } diff --git a/src/gallium/winsys/drm/amd/amd_context.c b/src/gallium/winsys/drm/amd/amd_context.c index df8eb850c8..9b3c9c2ab2 100644 --- a/src/gallium/winsys/drm/amd/amd_context.c +++ b/src/gallium/winsys/drm/amd/amd_context.c @@ -242,7 +242,7 @@ GLboolean amd_context_create(const __GLcontextModes *visual, return GL_FALSE; } - if (GL_TRUE) { + if (1) { fprintf(stderr, "Creating r300 context...\n"); pipe = r300_create_context(NULL, -- cgit v1.2.3 From 29a4f5493529042d1068a7d35da1e7f542474503 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 25 Jan 2009 21:35:26 -0800 Subject: r300: Working trivial/clear for RV410. This might work for other people too. --- src/gallium/drivers/r300/r300_cs.h | 8 +- src/gallium/drivers/r300/r300_cs_inlines.h | 35 +++ src/gallium/drivers/r300/r300_surface.c | 404 +++-------------------------- 3 files changed, 80 insertions(+), 367 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_cs_inlines.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index edcfb9628f..d515c2f025 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -81,7 +81,7 @@ static uint32_t pack_float_32(float f) } while (0) #define OUT_CS_REG(register, value) do { \ - debug_printf("writing 0x%x to register 0x%x\n", value, register); \ + debug_printf("r300: writing 0x%x to register 0x%x\n", value, register); \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); \ } while (0) @@ -89,11 +89,13 @@ static uint32_t pack_float_32(float f) /* Note: This expects count to be the number of registers, * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ - debug_printf("writing register sequence 0x%x\n", register); \ + debug_printf("r300: writing register sequence 0x%x\n", register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ + debug_printf("r300: writing relocation for buffer %p, offset %d\n", \ + bo, offset); \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ } while (0) @@ -110,4 +112,6 @@ static uint32_t pack_float_32(float f) cs_winsys->flush_cs(cs); \ } while (0) +#include "r300_cs_inlines.h" + #endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h new file mode 100644 index 0000000000..aa0e647008 --- /dev/null +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -0,0 +1,35 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +/* r300_cs_inlines: This is just a handful of useful inlines for sending + * (very) common instructions to the CS buffer. Should only be included from + * r300_cs.h, probably. */ + +#ifdef R300_CS_H + +#define R300_PACIFY do { \ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | \ + (1 << 18) | (1 << 31)); \ +} while (0) + + +#endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 8afa06dec8..226cc7fc6c 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -32,356 +32,18 @@ static void r300_surface_fill(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); -#if 0 - struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; - boolean has_tcl = caps->has_tcl; - boolean is_r500 = caps->is_r500; - /* For the for loops. */ - int i; - /* Emit a shitload of state, and then draw a point to clear the buffer. - * XXX it goes without saying that this needs to be cleaned up and - * shifted around to work with the rest of the driver's state handling. - */ - BEGIN_CS(450); - /* XXX */ - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); - OUT_CS_REG(R300_TX_INVALTAGS, 0x0); - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); - OUT_CS_REG(R300_TX_INVALTAGS, 0x0); + float r, g, b, a; + r = (float)((color >> 16) & 0xff) / 255.0f; + g = (float)((color >> 8) & 0xff) / 255.0f; + b = (float)((color >> 0) & 0xff) / 255.0f; + debug_printf("r300: Filling surface %p at (%d,%d)," + " dimensions %dx%d, color 0x%x\n", + dest, x, y, w, h, color); - /* Sequence starting at R300_VAP_PROG_STREAM_CNTL_0 */ - OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 1); - if (has_tcl) { - OUT_CS(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << - R300_DATA_TYPE_0_SHIFT) | ((R300_LAST_VEC | (1 << - R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << - R300_DATA_TYPE_1_SHIFT))); - } else { - OUT_CS(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << - R300_DATA_TYPE_0_SHIFT) | ((R300_LAST_VEC | (2 << - R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << - R300_DATA_TYPE_1_SHIFT))); - } - - /* Disable fog */ - OUT_CS_REG(R300_FG_FOG_BLEND, 0); - OUT_CS_REG(R300_FG_ALPHA_FUNC, 0); - - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, - ((((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | - (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | - (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | - (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | - ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | - R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << - R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE0_SHIFT) | - (((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | - (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | - (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | - (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | - ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | - R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << - R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE1_SHIFT))); - /* R300_VAP_INPUT_CNTL_0, R300_VAP_INPUT_CNTL_1 */ - OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2); - OUT_CS((R300_SEL_USER_COLOR_0 << R300_COLOR_0_ASSEMBLY_SHIFT)); - OUT_CS(R300_INPUT_CNTL_POS | R300_INPUT_CNTL_COLOR | R300_INPUT_CNTL_TC0); - - /* comes from fglrx startup of clear */ - OUT_CS_REG_SEQ(R300_SE_VTE_CNTL, 2); - OUT_CS(R300_VTX_W0_FMT | R300_VPORT_X_SCALE_ENA | - R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | - R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | - R300_VPORT_Z_OFFSET_ENA); - OUT_CS(0x8); - - /* XXX */ - OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); - OUT_CS(0xFFFFFF); - OUT_CS(0x0); - - OUT_CS_REG(R300_VAP_CNTL_STATUS, 0x0); - - OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); - OUT_CS(0x3f800000); - OUT_CS(0x3f800000); - OUT_CS(0x3f800000); - OUT_CS(0x3f800000); - - OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xaaaaaaaa); - - OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); - - OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); - OUT_CS(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | - R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT); - OUT_CS(0); /* no textures */ - - OUT_CS_REG(R300_TX_ENABLE, 0); - - OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); - OUT_CS_32F(1.0); - OUT_CS_32F(x); - OUT_CS_32F(1.0); - OUT_CS_32F(y); - OUT_CS_32F(1.0); - OUT_CS_32F(0.0); - - OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); - OUT_CS(0x0); - OUT_CS(0x0); - - OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_PS_UCP_MODE_CLIP_AS_TRIFAN | R300_CLIP_DISABLE); - - OUT_CS_REG(R300_GA_POINT_SIZE, ((w * 6) << R300_POINTSIZE_X_SHIFT) | - ((h * 6) << R300_POINTSIZE_Y_SHIFT)); - - if (is_r500) { - OUT_CS_REG_SEQ(R500_RS_IP_0, 8); - for (i = 0; i < 8; ++i) { - OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | - (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | - (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | - (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); - } - - OUT_CS_REG_SEQ(R300_RS_COUNT, 2); - /* XXX could hires be disabled for a speed boost? */ - OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS(0x0); - - OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); - } else { - OUT_CS_REG_SEQ(R300_RS_IP_0, 8); - for (i = 0; i < 8; ++i) { - OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); - } - - OUT_CS_REG_SEQ(R300_RS_COUNT, 2); - /* XXX could hires be disabled for a speed boost? */ - OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS(0x0); - - OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); - } - - if (is_r500) { - OUT_CS_REG_SEQ(R500_US_CONFIG, 2); - OUT_CS(R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); - OUT_CS(0x0); - OUT_CS_REG_SEQ(R500_US_CODE_ADDR, 3); - OUT_CS(R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(1)); - OUT_CS(R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(1)); - OUT_CS(R500_US_CODE_OFFSET_ADDR(0)); - - OUT_CS_REG(R500_GA_US_VECTOR_INDEX, 0x0); - - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | - R500_INST_LAST | - R500_INST_RGB_OMASK_R | - R500_INST_RGB_OMASK_G | - R500_INST_RGB_OMASK_B | - R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | - R500_INST_ALPHA_CLAMP); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_RGB_ADDR0(0) | - R500_RGB_ADDR1(0) | - R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | - R500_RGB_ADDR2_CONST); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_ADDR0(0) | - R500_ALPHA_ADDR1(0) | - R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | - R500_ALPHA_ADDR2_CONST); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGB_SEL_A_SRC0 | - R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | - R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | - R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | - R500_ALU_RGB_G_SWIZ_B_B); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_OP_CMP | - R500_ALPHA_SWIZ_A_A | - R500_ALPHA_SWIZ_B_A); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGBA_OP_CMP | - R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | - R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0); - - } else { - OUT_CS_REG_SEQ(R300_US_CONFIG, 3); - OUT_CS(0x0); - OUT_CS(0x0); - OUT_CS(0x0); - OUT_CS_REG_SEQ(R300_US_CODE_ADDR_0, 4); - OUT_CS(0x0); - OUT_CS(0x0); - OUT_CS(0x0); - OUT_CS(R300_RGBA_OUT); - - OUT_CS_REG(R300_US_ALU_RGB_INST_0, - FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO))); - OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, - FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0)); - OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, - FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO))); - OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, - FP_SELA(0, NO, W, FP_TMP(0), 0, 0)); - } - - /* XXX */ - uint32_t vap_cntl; - OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); - if (has_tcl) { - vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) | - (5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (12 << R300_VF_MAX_VTX_NUM_SHIFT)); - if (CHIP_FAMILY_RV515) - vap_cntl |= R500_TCL_STATE_OPTIMIZATION; - } else { - vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) | - (5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (5 << R300_VF_MAX_VTX_NUM_SHIFT)); - } - - vap_cntl |= (caps->num_vert_pipes << - R300_PVS_NUM_FPUS_SHIFT); - - OUT_CS_REG(R300_VAP_CNTL, vap_cntl); - - /* XXX unbreak this - if (has_tcl) { - OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3); - OUT_CS((0 << R300_PVS_FIRST_INST_SHIFT) | - (0 << R300_PVS_XYZW_VALID_INST_SHIFT) | - (1 << R300_PVS_LAST_INST_SHIFT)); - OUT_CS((0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) | - (0 << R300_PVS_MAX_CONST_ADDR_SHIFT)); - OUT_CS(1 << R300_PVS_LAST_VTX_SRC_INST_SHIFT); - - OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 28)); - OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); - OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); - OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_CODE_START); - - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, - 0, 0xf, PVS_DST_REG_OUT)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(0, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, - PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, - PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(0, PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); - - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 1, 0xf, - PVS_DST_REG_OUT)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(1, PVS_SRC_SELECT_X, - PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, - PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, - VSF_FLAG_NONE)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, PVS_SRC_OPERAND(1, PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_SELECT_FORCE_0, - PVS_SRC_REG_INPUT, VSF_FLAG_NONE)); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); - } */ - - /* TODO in bufmgr */ - /* XXX this should be split off, also figure out WTF with the numbers */ - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); - /* XXX might have to switch to 2D */ - - OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - /* XXX this needs more TLC (or TCL, as it were) */ - OUT_CS_REG(R300_RB3D_COLORPITCH0, R300_COLOR_FORMAT_ARGB8888); - if (flags & (CLEARBUFFER_DEPTH | CLEARBUFFER_STENCIL)) { - assert(rrbd != 0); - cbpitch = (rrbd->pitch / rrbd->cpp); - if (rrbd->bo->flags & RADEON_BO_FLAGS_MACRO_TILE){ - cbpitch |= R300_DEPTHMACROTILE_ENABLE; - } - if (rrbd->bo->flags & RADEON_BO_FLAGS_MICRO_TILE){ - cbpitch |= R300_DEPTHMICROTILE_TILED; - } - BEGIN_BATCH_NO_AUTOSTATE(4); - OUT_BATCH_REGSEQ(R300_ZB_DEPTHOFFSET, 1); - OUT_BATCH_RELOC(0, rrbd->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_BATCH_REGVAL(R300_ZB_DEPTHPITCH, cbpitch); - END_BATCH(); - } - - { - uint32_t t1, t2; - - t1 = 0x0; - t2 = 0x0; - - if (flags & CLEARBUFFER_DEPTH) { - t1 |= R300_Z_ENABLE | R300_Z_WRITE_ENABLE; - t2 |= - (R300_ZS_ALWAYS << R300_Z_FUNC_SHIFT); - } - - if (flags & CLEARBUFFER_STENCIL) { - t1 |= R300_STENCIL_ENABLE; - t2 |= - (R300_ZS_ALWAYS << - R300_S_FRONT_FUNC_SHIFT) | - (R300_ZS_REPLACE << - R300_S_FRONT_SFAIL_OP_SHIFT) | - (R300_ZS_REPLACE << - R300_S_FRONT_ZPASS_OP_SHIFT) | - (R300_ZS_REPLACE << - R300_S_FRONT_ZFAIL_OP_SHIFT); - } - - OUT_BATCH_REGSEQ(R300_ZB_CNTL, 3); - OUT_BATCH(t1); - OUT_BATCH(t2); - OUT_BATCH(((ctx->Stencil.WriteMask[0] & R300_STENCILREF_MASK) << - R300_STENCILWRITEMASK_SHIFT) | - (ctx->Stencil.Clear & R300_STENCILREF_MASK)); - END_BATCH(); - } - - OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); - OUT_CS(0x0); - OUT_CS(0x0); - OUT_CS(0x0); - - OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); - OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | - (1 << R300_PRIM_NUM_VERTICES_SHIFT)); - OUT_CS_32F(w / 2.0); - OUT_CS_32F(h / 2.0); - /* XXX this should be the depth value to clear to */ - OUT_CS_32F(1.0); - OUT_CS_32F(1.0); - OUT_CS_32F(color); - OUT_CS_32F(color); - OUT_CS_32F(color); - OUT_CS_32F(color); - - /* XXX this should be split off, also figure out WTF with the numbers */ - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | (1 << 18)); - - END_CS; - FLUSH_CS; -#endif BEGIN_CS(276); -OUT_CS_REG(0x1720, 0x00068000); +R300_PACIFY; OUT_CS_REG(0x4100, 0x00000000); -OUT_CS_REG(0x1720, 0x00068000); +R300_PACIFY; OUT_CS_REG(0x1D98, 0x43000000); OUT_CS_REG(0x1D9C, 0x43002000); OUT_CS_REG(0x1DA0, 0xC3000000); @@ -423,7 +85,6 @@ OUT_CS_REG(0x4204, 0x00000000); OUT_CS_REG(0x4208, 0x3F800000); OUT_CS_REG(0x420C, 0x3F800000); OUT_CS_REG(0x4214, 0x00050005); -OUT_CS_REG(0x421C, 0x00060006); OUT_CS_REG(0x4230, 0x18000006); OUT_CS_REG(0x4234, 0x00020006); OUT_CS_REG(0x4238, 0x3BAAAAAB); @@ -492,8 +153,6 @@ OUT_CS_REG(0x4E08, 0x20210000); OUT_CS_REG(0x4E0C, 0x0000000F); OUT_CS_REG(0x4E10, 0x00000000); OUT_CS_REG(0x4E18, 0x00000000); -OUT_CS_REG(0x4E28, 0x00000000); -OUT_CS_REG(0x4E38, 0x00C00100); OUT_CS_REG(0x4E50, 0x00000000); OUT_CS_REG(0x4E54, 0x00000000); OUT_CS_REG(0x4E58, 0x00000000); @@ -513,15 +172,13 @@ OUT_CS_REG(0x4F10, 0x00000002); OUT_CS_REG(0x4F14, 0x00000001); OUT_CS_REG(0x4F18, 0x00000003); OUT_CS_REG(0x4F1C, 0x00000000); -OUT_CS_REG(0x4F20, 0x00000000); -OUT_CS_REG(0x4F24, 0x00000100); OUT_CS_REG(0x4F28, 0x00000000); OUT_CS_REG(0x4F30, 0x00000000); OUT_CS_REG(0x4F34, 0x00000000); OUT_CS_REG(0x4F44, 0x00000000); OUT_CS_REG(0x4F54, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000406); @@ -530,7 +187,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x3F800000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000400); @@ -539,7 +196,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000401); @@ -548,7 +205,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000402); @@ -557,7 +214,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000403); @@ -566,7 +223,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000404); @@ -575,7 +232,7 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000405); @@ -604,7 +261,8 @@ OUT_CS_REG(0x4BD4, 0x00000000); OUT_CS_REG(0x4E04, 0x00000000); OUT_CS_REG(0x4E08, 0x00000000); OUT_CS_REG(0x221C, 0x0001C000); -OUT_CS_REG(0x421C, 0x06000600); +OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | + ((w * 6) << R300_POINTSIZE_X_SHIFT)); OUT_CS_REG(0x4310, 0x00D10000); OUT_CS_REG(0x4314, 0x00D10000); OUT_CS_REG(0x4318, 0x00D10000); @@ -633,7 +291,7 @@ OUT_CS_REG(0x22D0, 0x00100000); OUT_CS_REG(0x22D4, 0x00000000); OUT_CS_REG(0x22D8, 0x00000001); OUT_CS_REG(0x43E8, 0x00000000); -OUT_CS_REG(0x1720, 0x10008000); +R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); OUT_CS_REG(0x2284, 0x00000001); OUT_CS_REG(0x2200, 0x00000000); @@ -645,16 +303,32 @@ OUT_CS_REG(0x2208, 0x00F02203); OUT_CS_REG(0x2208, 0x00D10021); OUT_CS_REG(0x2208, 0x01248021); OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x1720, 0x00068000); -OUT_CS_REG(0x4E28, 0x00000000); -OUT_CS_REG(0x4E38, 0x00C00100); +R300_PACIFY; +OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); +OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); +//OUT_CS_REG(0x4E38, 0x00C00100); OUT_CS_REG(0x4E0C, 0x0000000F); OUT_CS_REG(0x4F00, 0x00000000); OUT_CS_REG(0x4F04, 0x00000000); OUT_CS_REG(0x4F08, 0x00FF0000); + +/* XXX Packet3 */ +OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); +OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | +(1 << R300_PRIM_NUM_VERTICES_SHIFT)); +OUT_CS_32F(w / 2.0); +OUT_CS_32F(h / 2.0); +/* XXX this should be the depth value to clear to */ +OUT_CS_32F(1.0); +OUT_CS_32F(1.0); +OUT_CS_32F(r); +OUT_CS_32F(g); +OUT_CS_32F(b); +OUT_CS_32F(1.0); + OUT_CS_REG(0x4E4C, 0x0000000A); OUT_CS_REG(0x4F18, 0x00000003); -OUT_CS_REG(0x1720, 0x00068000); +R300_PACIFY; END_CS; FLUSH_CS; -- cgit v1.2.3 From 3e3122467f1e9f6dde77762d1a35a56f89fb25ce Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 26 Jan 2009 02:18:56 -0800 Subject: r300: Deobfuscate a few registers, fix inaccurate variable names. It's not "pipes", it's floating-point vertex processors. Completely different. --- src/gallium/drivers/r300/r300_chipset.c | 26 +++++++++++++------------- src/gallium/drivers/r300/r300_chipset.h | 9 +++++---- src/gallium/drivers/r300/r300_surface.c | 10 +++++++--- 3 files changed, 25 insertions(+), 20 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 494c9e54c0..4c84be26ef 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -31,7 +31,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) /* Reasonable defaults */ caps->has_tcl = TRUE; caps->is_r500 = FALSE; - caps->num_vert_pipes = 4; + caps->num_vert_fpus = 4; /* Note: These are not ordered by PCI ID. I leave that task to GCC, @@ -112,7 +112,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x4A50: case 0x4A54: caps->family = CHIP_FAMILY_R420; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x5548: @@ -125,7 +125,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x5554: case 0x5D57: caps->family = CHIP_FAMILY_R423; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x554C: @@ -136,7 +136,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x5D49: case 0x5D4A: caps->family = CHIP_FAMILY_R430; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x5D4C: @@ -146,7 +146,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x5D50: case 0x5D52: caps->family = CHIP_FAMILY_R480; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x4B49: @@ -154,7 +154,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x4B4B: case 0x4B4C: caps->family = CHIP_FAMILY_R481; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x5E4C: @@ -170,7 +170,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x5E4B: case 0x5E4D: caps->family = CHIP_FAMILY_RV410; - caps->num_vert_pipes = 6; + caps->num_vert_fpus = 6; break; case 0x5954: @@ -226,7 +226,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x710E: case 0x710F: caps->family = CHIP_FAMILY_R520; - caps->num_vert_pipes = 8; + caps->num_vert_fpus = 8; caps->is_r500 = TRUE; break; @@ -269,7 +269,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x7210: case 0x7211: caps->family = CHIP_FAMILY_RV515; - caps->num_vert_pipes = 2; + caps->num_vert_fpus = 2; caps->is_r500 = TRUE; break; @@ -290,7 +290,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x71DA: case 0x71DE: caps->family = CHIP_FAMILY_RV530; - caps->num_vert_pipes = 5; + caps->num_vert_fpus = 5; caps->is_r500 = TRUE; break; @@ -310,13 +310,13 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x724F: case 0x7284: caps->family = CHIP_FAMILY_R580; - caps->num_vert_pipes = 8; + caps->num_vert_fpus = 8; caps->is_r500 = TRUE; break; case 0x7280: caps->family = CHIP_FAMILY_RV570; - caps->num_vert_pipes = 5; + caps->num_vert_fpus = 5; caps->is_r500 = TRUE; break; @@ -332,7 +332,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x7293: case 0x7297: caps->family = CHIP_FAMILY_RV560; - caps->num_vert_pipes = 5; + caps->num_vert_fpus = 5; caps->is_r500 = TRUE; break; diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index c4104a65cb..a9cd372ec5 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -32,14 +32,15 @@ struct r300_capabilities { uint32_t pci_id; /* Chipset family */ int family; - /* The number of vertex pipes */ - int num_vert_pipes; + /* The number of vertex floating-point units */ + int num_vert_fpus; /* The number of fragment pipes */ int num_frag_pipes; /* Whether or not TCL is physically present */ boolean has_tcl; - /* Whether or not this is an RV515 or newer; R500s have many features: - * - Extra bit on texture sizes + /* Whether or not this is an RV515 or newer; R500s have many differences + * that require extra consideration, compared to their R3xx cousins: + * - Extra bit of width and height on texture sizes * - Blend color is split across two registers * - Universal Shader (US) block used for fragment shaders */ boolean is_r500; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 226cc7fc6c..9a4b3455d1 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -32,6 +32,7 @@ static void r300_surface_fill(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); + struct r300_capabilities* caps = ((struct r300_screen*)pipe->screen)->caps; float r, g, b, a; r = (float)((color >> 16) & 0xff) / 255.0f; g = (float)((color >> 8) & 0xff) / 255.0f; @@ -51,7 +52,6 @@ OUT_CS_REG(0x1DA4, 0x43002000); OUT_CS_REG(0x1DA8, 0x3F000000); OUT_CS_REG(0x1DAC, 0x3F000000); OUT_CS_REG(0x2284, 0x00000000); -OUT_CS_REG(0x2080, 0x0030046A); OUT_CS_REG(0x20B0, 0x0000043F); OUT_CS_REG(0x20B4, 0x00000008); OUT_CS_REG(0x2134, 0x00FFFFFF); @@ -76,7 +76,8 @@ OUT_CS_REG(0x22D8, 0x00000000); OUT_CS_REG(0x4008, 0x00000007); OUT_CS_REG(0x4010, 0x66666666); OUT_CS_REG(0x4014, 0x06666666); -OUT_CS_REG(0x4018, 0x00000011); +/* XXX why doesn't classic Mesa write the number of pipes, too? */ +OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16); OUT_CS_REG(0x401C, 0x00000004); OUT_CS_REG(0x4020, 0x00000000); OUT_CS_REG(0x4104, 0x00000000); @@ -286,7 +287,10 @@ OUT_CS_REG(0x46C0, 0x1C000000); OUT_CS_REG(0x49C0, 0x00040889); OUT_CS_REG(0x47C0, 0x01000000); OUT_CS_REG(0x2284, 0x00000000); -OUT_CS_REG(0x2080, 0x0030045A); +/* XXX these magic numbers should be explained when + * this becomes a cached state object */ +OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); OUT_CS_REG(0x22D0, 0x00100000); OUT_CS_REG(0x22D4, 0x00000000); OUT_CS_REG(0x22D8, 0x00000001); -- cgit v1.2.3 From 2c2f819a1de0fc29866fdf90cce4550b0d2a0bad Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 26 Jan 2009 10:26:41 -0800 Subject: r300: Add r300_flush. Haha, I always do this. --- src/gallium/drivers/r300/r300_flush.c | 42 +++++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_flush.h | 33 +++++++++++++++++++++++++++ 2 files changed, 75 insertions(+) create mode 100644 src/gallium/drivers/r300/r300_flush.c create mode 100644 src/gallium/drivers/r300/r300_flush.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_flush.c b/src/gallium/drivers/r300/r300_flush.c new file mode 100644 index 0000000000..3766f0a0a7 --- /dev/null +++ b/src/gallium/drivers/r300/r300_flush.c @@ -0,0 +1,42 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_flush.h" + +static void r300_flush(struct pipe_context* pipe, + unsigned flags, + struct pipe_fence_handle** fence) +{ + struct r300_context* r300 = r300_context(pipe); + CS_LOCALS(r300); + + if (r300->dirty_hw) { + FLUSH_CS; + r300->dirty_state = R300_NEW_KITCHEN_SINK; + r300->dirty_hw = 0; + } +} + +void r300_init_flush_functions(struct r300_context* r300) +{ + r300->context.flush = r300_flush; +} diff --git a/src/gallium/drivers/r300/r300_flush.h b/src/gallium/drivers/r300/r300_flush.h new file mode 100644 index 0000000000..a1b224b39c --- /dev/null +++ b/src/gallium/drivers/r300/r300_flush.h @@ -0,0 +1,33 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_FLUSH_H +#define R300_FLUSH_H + +#include "pipe/p_context.h" + +#include "r300_context.h" +#include "r300_cs.h" + +void r300_init_flush_functions(struct r300_context* r300); + +#endif /* R300_FLUSH_H */ -- cgit v1.2.3 From f1ba451bcc7764fd2b92fc8408f6b52c1d670b1f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 03:40:46 -0800 Subject: r300: Set up blend state emit, clean up blend registers. Also add at least one missing register to r300_reg. --- src/gallium/drivers/r300/r300_emit.c | 18 +++++++++----- src/gallium/drivers/r300/r300_reg.h | 2 ++ src/gallium/drivers/r300/r300_surface.c | 42 +++++++++++++++++---------------- src/gallium/drivers/r300/r300_surface.h | 9 +++++-- 4 files changed, 43 insertions(+), 28 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 19bfcbdd5b..de606cfab7 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -26,6 +26,17 @@ #include "r300_cs.h" #include "r300_screen.h" +void r300_emit_blend_state(struct r300_context* r300, + struct r300_blend_state* blend) +{ + CS_LOCALS(r300); + OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); + OUT_CS(blend->blend_control); + OUT_CS(blend->alpha_blend_control); + OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop); + OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither); +} + static void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; @@ -38,12 +49,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) /* XXX check size */ if (r300->dirty_state & R300_NEW_BLEND) { - struct r300_blend_state* blend = r300->blend_state; - /* XXX next two are contiguous regs */ - OUT_CS_REG(R300_RB3D_CBLEND, blend->blend_control); - OUT_CS_REG(R300_RB3D_ABLEND, blend->alpha_blend_control); - OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop); - OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither); + r300_emit_blend_state(r300, r300->blend_state); } if (r300->dirty_state & R300_NEW_BLEND_COLOR) { diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 7f4a508b1b..c1796ad7a8 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -151,6 +151,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_VTX_W0_FMT (1 << 10) # define R300_SERIAL_PROC_ENA (1 << 11) +#define R300_VAP_VTX_SIZE 0x20b4 + /* BEGIN: Vertex data assembly - lots of uncertainties */ /* gap */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 9a4b3455d1..6c7784dd4d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -43,24 +43,30 @@ static void r300_surface_fill(struct pipe_context* pipe, BEGIN_CS(276); R300_PACIFY; -OUT_CS_REG(0x4100, 0x00000000); +OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; +/* Viewport setup */ OUT_CS_REG(0x1D98, 0x43000000); OUT_CS_REG(0x1D9C, 0x43002000); OUT_CS_REG(0x1DA0, 0xC3000000); OUT_CS_REG(0x1DA4, 0x43002000); OUT_CS_REG(0x1DA8, 0x3F000000); OUT_CS_REG(0x1DAC, 0x3F000000); -OUT_CS_REG(0x2284, 0x00000000); -OUT_CS_REG(0x20B0, 0x0000043F); -OUT_CS_REG(0x20B4, 0x00000008); -OUT_CS_REG(0x2134, 0x00FFFFFF); -OUT_CS_REG(0x2138, 0x00000000); -OUT_CS_REG(0x2140, 0x00000000); -OUT_CS_REG(0x2150, 0x00000000); -OUT_CS_REG(0x21E0, 0x00000000); -OUT_CS_REG(0x2180, 0x00000000); -OUT_CS_REG(0x2184, 0x00000000); +/* Flush PVS. */ +OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); + +OUT_CS_REG(R300_SE_VTE_CNTL, R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | + R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT); +/* Vertex size. */ +OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); +/* Max and min vertex index clamp. */ +OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF); +OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); +/* XXX endian */ +OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); +OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); OUT_CS_REG(0x21DC, 0xAAAAAAAA); OUT_CS_REG(0x221C, 0x00000000); OUT_CS_REG(0x2220, 0x3F800000); @@ -149,12 +155,8 @@ OUT_CS_REG(0x4BD4, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4E00, 0x00000000); -OUT_CS_REG(0x4E04, 0x20210000); -OUT_CS_REG(0x4E08, 0x20210000); OUT_CS_REG(0x4E0C, 0x0000000F); OUT_CS_REG(0x4E10, 0x00000000); -OUT_CS_REG(0x4E18, 0x00000000); -OUT_CS_REG(0x4E50, 0x00000000); OUT_CS_REG(0x4E54, 0x00000000); OUT_CS_REG(0x4E58, 0x00000000); OUT_CS_REG(0x4E5C, 0x00000000); @@ -243,9 +245,9 @@ OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2150, 0x21030003); OUT_CS_REG(0x4BC0, 0x00000000); -OUT_CS_REG(0x21E0, 0xF688F688); -OUT_CS_REG(0x2180, 0x00000001); -OUT_CS_REG(0x2184, 0x00000405); +OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); +OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); +OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); OUT_CS_REG(0x20B0, 0x0000043F); OUT_CS_REG(0x20B4, 0x00000008); OUT_CS_REG(0x21DC, 0xAAAAAAAA); @@ -259,8 +261,8 @@ OUT_CS_REG(0x1DA4, 0x00000000); OUT_CS_REG(0x1DA8, 0x3F800000); OUT_CS_REG(0x1DAC, 0x00000000); OUT_CS_REG(0x4BD4, 0x00000000); -OUT_CS_REG(0x4E04, 0x00000000); -OUT_CS_REG(0x4E08, 0x00000000); +r300_emit_blend_state(r300, &blend_clear_state); +/* XXX emit blend state */ OUT_CS_REG(0x221C, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 2d64a95412..6d71601b98 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -30,8 +30,13 @@ #include "r300_context.h" #include "r300_cs.h" +#include "r300_emit.h" -/* XXX integrate this into r300_reg */ -#include "r300_fragprog.h" +const struct r300_blend_state blend_clear_state = { + .blend_control = 0x0, + .alpha_blend_control = 0x0, + .rop = 0x0, + .dither = 0x0, +}; #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 2cb90c8e805d010ba4594264dd9edbbb7f95513a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 04:03:38 -0800 Subject: r300: Count BEGIN_CS, END_CS, warn if count is off. --- src/gallium/drivers/r300/r300_cs.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index d515c2f025..653e2fdafa 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -60,7 +60,8 @@ static uint32_t pack_float_32(float f) #define CS_LOCALS(context) \ struct r300_winsys* cs_winsys = context->winsys; \ - struct radeon_cs* cs = cs_winsys->cs + struct radeon_cs* cs = cs_winsys->cs; \ + int cs_count; #define CHECK_CS(size) \ cs_winsys->check_cs(cs, (size)) @@ -70,6 +71,7 @@ static uint32_t pack_float_32(float f) debug_printf("r300: BEGIN_CS in %s (%s:%d)\n", __FUNCTION__, __FILE__, \ __LINE__); \ cs_winsys->begin_cs(cs, (size), __FILE__, __FUNCTION__, __LINE__); \ + int cs_count = size; \ } while (0) #define OUT_CS(value) do { \ @@ -103,6 +105,8 @@ static uint32_t pack_float_32(float f) #define END_CS do { \ debug_printf("r300: END_CS in %s (%s:%d)\n", __FUNCTION__, __FILE__, \ __LINE__); \ + if (cs_count != 0) \ + debug_printf("r300: Warning: cs_count off by %d\n", cs_count); \ cs_winsys->end_cs(cs, __FILE__, __FUNCTION__, __LINE__); \ } while (0) -- cgit v1.2.3 From bea0c5812bd2795b514725d2a3788add3dc209af Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 04:04:57 -0800 Subject: r300: Add blend color state emit. Slow and steady wins the race. Or something like that. --- src/gallium/drivers/r300/r300_emit.c | 40 ++++++++++++++++++++------------- src/gallium/drivers/r300/r300_emit.h | 31 +++++++++++++++++++++++++ src/gallium/drivers/r300/r300_surface.c | 6 ++++- src/gallium/drivers/r300/r300_surface.h | 6 +++++ 4 files changed, 67 insertions(+), 16 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_emit.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index de606cfab7..e091352c3b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -22,24 +22,44 @@ /* r300_emit: Functions for emitting state. */ -#include "r300_context.h" -#include "r300_cs.h" -#include "r300_screen.h" +#include "r300_emit.h" void r300_emit_blend_state(struct r300_context* r300, struct r300_blend_state* blend) { CS_LOCALS(r300); + BEGIN_CS(7); OUT_CS_REG_SEQ(R300_RB3D_CBLEND, 2); OUT_CS(blend->blend_control); OUT_CS(blend->alpha_blend_control); OUT_CS_REG(R300_RB3D_ROPCNTL, blend->rop); OUT_CS_REG(R300_RB3D_DITHER_CTL, blend->dither); + END_CS; +} + +void r300_emit_blend_color_state(struct r300_context* r300, + struct r300_blend_color_state* bc) +{ + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; + CS_LOCALS(r300); + if (r300screen->caps->is_r500) { + BEGIN_CS(3); + OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2); + OUT_CS(bc->blend_color_red_alpha); + OUT_CS(bc->blend_color_green_blue); + END_CS; + } else { + BEGIN_CS(2); + OUT_CS_REG(R300_RB3D_BLEND_COLOR, bc->blend_color); + END_CS; + } } static void r300_emit_dirty_state(struct r300_context* r300) { - struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; CS_LOCALS(r300); if (!(r300->dirty_state) && !(r300->dirty_hw)) { @@ -53,17 +73,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) } if (r300->dirty_state & R300_NEW_BLEND_COLOR) { - struct r300_blend_color_state* blend_color = r300->blend_color_state; - if (r300screen->caps->is_r500) { - /* XXX next two are contiguous regs */ - OUT_CS_REG(R500_RB3D_CONSTANT_COLOR_AR, - blend_color->blend_color_red_alpha); - OUT_CS_REG(R500_RB3D_CONSTANT_COLOR_GB, - blend_color->blend_color_green_blue); - } else { - OUT_CS_REG(R300_RB3D_BLEND_COLOR, - blend_color->blend_color); - } + r300_emit_blend_color_state(r300, r300->blend_color_state); } if (r300->dirty_state & R300_NEW_DSA) { diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h new file mode 100644 index 0000000000..5756b6acf4 --- /dev/null +++ b/src/gallium/drivers/r300/r300_emit.h @@ -0,0 +1,31 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_context.h" +#include "r300_cs.h" +#include "r300_screen.h" + +void r300_emit_blend_state(struct r300_context* r300, + struct r300_blend_state* blend); + +void r300_emit_blend_color_state(struct r300_context* r300, + struct r300_blend_color_state* bc); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 6c7784dd4d..2e5a572f47 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -156,6 +156,9 @@ OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4E00, 0x00000000); OUT_CS_REG(0x4E0C, 0x0000000F); + +r300_emit_blend_color_state(r300, &blend_color_clear_state); + OUT_CS_REG(0x4E10, 0x00000000); OUT_CS_REG(0x4E54, 0x00000000); OUT_CS_REG(0x4E58, 0x00000000); @@ -261,8 +264,9 @@ OUT_CS_REG(0x1DA4, 0x00000000); OUT_CS_REG(0x1DA8, 0x3F800000); OUT_CS_REG(0x1DAC, 0x00000000); OUT_CS_REG(0x4BD4, 0x00000000); + r300_emit_blend_state(r300, &blend_clear_state); -/* XXX emit blend state */ + OUT_CS_REG(0x221C, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 6d71601b98..8ec7151f4d 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -39,4 +39,10 @@ const struct r300_blend_state blend_clear_state = { .dither = 0x0, }; +const struct r300_blend_color_state blend_color_clear_state = { + .blend_color = 0x0, + .blend_color_red_alpha = 0x0, + .blend_color_green_blue = 0x0, +}; + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 2e635ef563e2bff50e7a2af4f505bbd066865723 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 04:48:19 -0800 Subject: r300: Add dsa state emit. Seeing a pattern yet? --- src/gallium/drivers/r300/r300_emit.c | 31 ++++++++++++++++++++----------- src/gallium/drivers/r300/r300_emit.h | 3 +++ src/gallium/drivers/r300/r300_surface.c | 9 +++------ src/gallium/drivers/r300/r300_surface.h | 10 ++++++++++ 4 files changed, 36 insertions(+), 17 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index e091352c3b..d8de766c31 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -56,6 +56,25 @@ void r300_emit_blend_color_state(struct r300_context* r300, } } +void r300_emit_dsa_state(struct r300_context* r300, + struct r300_dsa_state* dsa) +{ + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; + CS_LOCALS(r300); + BEGIN_CS(r300screen->caps->is_r500 ? 12 : 10); + OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); + OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); + OUT_CS(dsa->z_buffer_control); + OUT_CS(dsa->z_stencil_control); + OUT_CS(dsa->stencil_ref_mask); + OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); + if (r300screen->caps->is_r500) { + OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); + } +} + static void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = @@ -77,17 +96,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) } if (r300->dirty_state & R300_NEW_DSA) { - struct r300_dsa_state* dsa = r300->dsa_state; - OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); - OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); - /* XXX next three are contiguous regs */ - OUT_CS_REG(R300_ZB_CNTL, dsa->z_buffer_control); - OUT_CS_REG(R300_ZB_ZSTENCILCNTL, dsa->z_stencil_control); - OUT_CS_REG(R300_ZB_STENCILREFMASK, dsa->stencil_ref_mask); - OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); - if (r300screen->caps->is_r500) { - OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); - } + r300_emit_dsa_state(r300, r300->dsa_state); } if (r300->dirty_state & R300_NEW_RASTERIZER) { diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 5756b6acf4..98287bc1f3 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -29,3 +29,6 @@ void r300_emit_blend_state(struct r300_context* r300, void r300_emit_blend_color_state(struct r300_context* r300, struct r300_blend_color_state* bc); + +void r300_emit_dsa_state(struct r300_context* r300, + struct r300_dsa_state* dsa); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 2e5a572f47..aab1850144 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -151,7 +151,6 @@ OUT_CS_REG(0x4BC0, 0x00000002); OUT_CS_REG(0x4BC8, 0x00000000); OUT_CS_REG(0x4BCC, 0x00000000); OUT_CS_REG(0x4BD0, 0x00000000); -OUT_CS_REG(0x4BD4, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4BD8, 0x00000000); OUT_CS_REG(0x4E00, 0x00000000); @@ -175,7 +174,6 @@ OUT_CS_REG(0x4F00, 0x00000010); OUT_CS_REG(0x4F04, 0x00038038); OUT_CS_REG(0x4F08, 0x00FFFF00); OUT_CS_REG(0x4F10, 0x00000002); -OUT_CS_REG(0x4F14, 0x00000001); OUT_CS_REG(0x4F18, 0x00000003); OUT_CS_REG(0x4F1C, 0x00000000); OUT_CS_REG(0x4F28, 0x00000000); @@ -313,15 +311,14 @@ OUT_CS_REG(0x2208, 0x00F02203); OUT_CS_REG(0x2208, 0x00D10021); OUT_CS_REG(0x2208, 0x01248021); OUT_CS_REG(0x2208, 0x00000000); + +r300_emit_dsa_state(r300, &dsa_clear_state); + R300_PACIFY; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); //OUT_CS_REG(0x4E38, 0x00C00100); OUT_CS_REG(0x4E0C, 0x0000000F); -OUT_CS_REG(0x4F00, 0x00000000); -OUT_CS_REG(0x4F04, 0x00000000); -OUT_CS_REG(0x4F08, 0x00FF0000); - /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 8ec7151f4d..2b89698ca5 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -45,4 +45,14 @@ const struct r300_blend_color_state blend_color_clear_state = { .blend_color_green_blue = 0x0, }; +const struct r300_dsa_state dsa_clear_state = { + .alpha_function = 0x0, + .alpha_reference = 0x0, + .z_buffer_control = 0x0, + .z_stencil_control = 0x0, + .stencil_ref_mask = 0x0, + .z_buffer_top = R300_ZTOP_ENABLE, + .stencil_ref_bf = 0x0, +}; + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 962d2e678f4da6ffef4f21f2fa9b062747bfbb85 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 15:12:01 -0800 Subject: r300: Clean up PVS upload emits. --- src/gallium/drivers/r300/r300_surface.c | 82 +++++---------------------------- 1 file changed, 11 insertions(+), 71 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index aab1850144..c0b020f81d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -184,66 +184,6 @@ OUT_CS_REG(0x4F54, 0x00000000); OUT_CS_REG(0x43E8, 0x00000000); R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000406); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x3F800000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000400); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000401); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000402); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000403); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000404); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); -R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000405); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00000000); OUT_CS_REG(0x2150, 0x21030003); OUT_CS_REG(0x4BC0, 0x00000000); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); @@ -290,7 +230,6 @@ OUT_CS_REG(0x48C0, 0x00050A80); OUT_CS_REG(0x46C0, 0x1C000000); OUT_CS_REG(0x49C0, 0x00040889); OUT_CS_REG(0x47C0, 0x01000000); -OUT_CS_REG(0x2284, 0x00000000); /* XXX these magic numbers should be explained when * this becomes a cached state object */ OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | @@ -301,16 +240,17 @@ OUT_CS_REG(0x22D8, 0x00000001); OUT_CS_REG(0x43E8, 0x00000000); R300_PACIFY; OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2284, 0x00000001); -OUT_CS_REG(0x2200, 0x00000000); -OUT_CS_REG(0x2208, 0x00F00203); -OUT_CS_REG(0x2208, 0x00D10001); -OUT_CS_REG(0x2208, 0x01248001); -OUT_CS_REG(0x2208, 0x00000000); -OUT_CS_REG(0x2208, 0x00F02203); -OUT_CS_REG(0x2208, 0x00D10021); -OUT_CS_REG(0x2208, 0x01248021); -OUT_CS_REG(0x2208, 0x00000000); +/* XXX translate these back into normal instructions */ +OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); +OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); +OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); r300_emit_dsa_state(r300, &dsa_clear_state); -- cgit v1.2.3 From 9814fca71897a11f635945224105eb40c021d787 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 17:56:44 -0800 Subject: r300: Cleanup first part of RS block. Working towards r500-ability. --- src/gallium/drivers/r300/r300_surface.c | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index c0b020f81d..728a0076b7 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -33,6 +33,7 @@ static void r300_surface_fill(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); struct r300_capabilities* caps = ((struct r300_screen*)pipe->screen)->caps; + int i; float r, g, b, a; r = (float)((color >> 16) & 0xff) / 255.0f; g = (float)((color >> 8) & 0xff) / 255.0f; @@ -117,8 +118,6 @@ OUT_CS_REG(0x42B4, 0x00000000); OUT_CS_REG(0x42B8, 0x00000000); OUT_CS_REG(0x42C0, 0x4B7FFFFF); OUT_CS_REG(0x42C4, 0x00000000); -OUT_CS_REG(0x4300, 0x00000000); -OUT_CS_REG(0x4304, 0x00000000); OUT_CS_REG(0x4310, 0x00000000); OUT_CS_REG(0x4314, 0x00000000); OUT_CS_REG(0x4318, 0x00000000); @@ -208,16 +207,26 @@ r300_emit_blend_state(r300, &blend_clear_state); OUT_CS_REG(0x221C, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); -OUT_CS_REG(0x4310, 0x00D10000); -OUT_CS_REG(0x4314, 0x00D10000); -OUT_CS_REG(0x4318, 0x00D10000); -OUT_CS_REG(0x431C, 0x00D10000); -OUT_CS_REG(0x4320, 0x00D10000); -OUT_CS_REG(0x4324, 0x00D10000); -OUT_CS_REG(0x4328, 0x00D10000); -OUT_CS_REG(0x432C, 0x00D10000); -OUT_CS_REG(0x4300, 0x00040080); -OUT_CS_REG(0x4304, 0x00000000); + +/* XXX RS block setup */ +if (caps->is_r500) { + OUT_CS_REG_SEQ(R500_RS_IP_0, 8); + for (i = 0; i < 8; i++) { + /* I like the operator macros more than the shift macros... */ + OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | + (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); + } +} else { + OUT_CS_REG_SEQ(R300_RS_IP_0, 8); + for (i = 0; i < 8; i++) { + OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); + } +} +OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); +OUT_CS_REG(R300_RS_INST_COUNT, 0x0); + OUT_CS_REG(0x4330, 0x00004000); OUT_CS_REG(0x4600, 0x00000000); OUT_CS_REG(0x4604, 0x00000000); -- cgit v1.2.3 From 3f1bc7ed3285de255d0a76f1ed3e439f3b668d9b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 27 Jan 2009 18:09:14 -0800 Subject: r300: Moar RS cleanup. How could I possibly miss these? --- src/gallium/drivers/r300/r300_surface.c | 9 --------- 1 file changed, 9 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 728a0076b7..47a3aac77d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -118,15 +118,6 @@ OUT_CS_REG(0x42B4, 0x00000000); OUT_CS_REG(0x42B8, 0x00000000); OUT_CS_REG(0x42C0, 0x4B7FFFFF); OUT_CS_REG(0x42C4, 0x00000000); -OUT_CS_REG(0x4310, 0x00000000); -OUT_CS_REG(0x4314, 0x00000000); -OUT_CS_REG(0x4318, 0x00000000); -OUT_CS_REG(0x431C, 0x00000000); -OUT_CS_REG(0x4320, 0x00000000); -OUT_CS_REG(0x4324, 0x00000000); -OUT_CS_REG(0x4328, 0x00000000); -OUT_CS_REG(0x432C, 0x00000000); -OUT_CS_REG(0x4330, 0x00000000); OUT_CS_REG(0x43A4, 0x0000001C); OUT_CS_REG(0x43A8, 0x2DA49525); OUT_CS_REG(0x43E8, 0x00FFFFFF); -- cgit v1.2.3 From f6add70ef889b609a114baf8f6bcb43413caa702 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 28 Jan 2009 02:40:18 -0800 Subject: r300: Fix small r300_reg typo. --- src/gallium/drivers/r300/r300_reg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index c1796ad7a8..37f168ed4c 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -658,7 +658,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_GB_FOG_SELECT_C3A (3 << 0) # define R300_GB_FOG_SELECT_1_1_W (4 << 0) # define R300_GB_FOG_SELECT_Z (5 << 0) -# define R300_GB_DEPTH_SELECT_Z (0 << 3 +# define R300_GB_DEPTH_SELECT_Z (0 << 3) # define R300_GB_DEPTH_SELECT_1_1_W (1 << 3) # define R300_GB_W_SELECT_1_W (0 << 4) # define R300_GB_W_SELECT_1 (1 << 4) -- cgit v1.2.3 From 80dc1801409f9913cc37b8fc8e68c692bc8a22ca Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 28 Jan 2009 02:51:51 -0800 Subject: r300: A handful of thingys. --- src/gallium/drivers/r300/r300_cs.h | 6 ++-- src/gallium/drivers/r300/r300_emit.c | 1 + src/gallium/drivers/r300/r300_reg.h | 2 +- src/gallium/drivers/r300/r300_surface.c | 54 ++++++++++++++++++--------------- 4 files changed, 35 insertions(+), 28 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 653e2fdafa..42ec9fb094 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -61,7 +61,7 @@ static uint32_t pack_float_32(float f) #define CS_LOCALS(context) \ struct r300_winsys* cs_winsys = context->winsys; \ struct radeon_cs* cs = cs_winsys->cs; \ - int cs_count; + int cs_count = 0; #define CHECK_CS(size) \ cs_winsys->check_cs(cs, (size)) @@ -75,11 +75,13 @@ static uint32_t pack_float_32(float f) } while (0) #define OUT_CS(value) do { \ - cs_winsys->write_cs_dword(cs, value); \ + cs_winsys->write_cs_dword(cs, (value)); \ + cs_count--; \ } while (0) #define OUT_CS_32F(value) do { \ cs_winsys->write_cs_dword(cs, pack_float_32(value)); \ + cs_count--; \ } while (0) #define OUT_CS_REG(register, value) do { \ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index d8de766c31..4ae8a46637 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -73,6 +73,7 @@ void r300_emit_dsa_state(struct r300_context* r300, if (r300screen->caps->is_r500) { OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); } + END_CS; } static void r300_emit_dirty_state(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 37f168ed4c..c1d5009b86 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -670,7 +670,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_GB_FOG_STUFF_COMP_MASK 0x00000c00 /* Specifies the graphics pipeline configuration for antialiasing. */ -#define GB_AA_CONFIG 0x4020 +#define R300_GB_AA_CONFIG 0x4020 # define GB_AA_CONFIG_AA_DISABLE (0 << 0) # define GB_AA_CONFIG_AA_ENABLE (1 << 0) # define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2 (0 << 1) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 47a3aac77d..fc756133b4 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -68,30 +68,31 @@ OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); /* XXX endian */ OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); -OUT_CS_REG(0x21DC, 0xAAAAAAAA); -OUT_CS_REG(0x221C, 0x00000000); -OUT_CS_REG(0x2220, 0x3F800000); -OUT_CS_REG(0x2224, 0x3F800000); -OUT_CS_REG(0x2228, 0x3F800000); -OUT_CS_REG(0x222C, 0x3F800000); -OUT_CS_REG(0x2288, 0x0000FFFF); -OUT_CS_REG(0x2090, 0x00000000); -OUT_CS_REG(0x2094, 0x00000000); -OUT_CS_REG(0x22D0, 0x00000000); -OUT_CS_REG(0x22D4, 0x00000000); -OUT_CS_REG(0x22D8, 0x00000000); -OUT_CS_REG(0x4008, 0x00000007); -OUT_CS_REG(0x4010, 0x66666666); -OUT_CS_REG(0x4014, 0x06666666); +/* XXX magic number not in r300_reg */ +OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); +OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0); +OUT_CS_REG(R300_VAP_GB_VERT_CLIP_ADJ, 4); +OUT_CS_32F(1.0); +OUT_CS_32F(1.0); +OUT_CS_32F(1.0); +OUT_CS_32F(1.0); +/* XXX is this too long? */ +OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xFFFF); +OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | + R300_GB_LINE_STUFF_ENABLE | R300_GB_TRIANGLE_STUFF_ENABLE); +/* XXX more magic numbers */ +OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); +OUT_CS_REG(R300_GB_MSPOS1, 0x66666666); /* XXX why doesn't classic Mesa write the number of pipes, too? */ OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16); -OUT_CS_REG(0x401C, 0x00000004); -OUT_CS_REG(0x4020, 0x00000000); -OUT_CS_REG(0x4104, 0x00000000); -OUT_CS_REG(0x4200, 0x00000000); -OUT_CS_REG(0x4204, 0x00000000); -OUT_CS_REG(0x4208, 0x3F800000); -OUT_CS_REG(0x420C, 0x3F800000); +OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); +OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); +/* XXX point tex stuffing */ +OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4); +OUT_CS_32F(0.0); +OUT_CS_32F(0.0); +OUT_CS_32F(1.0); +OUT_CS_32F(1.0); OUT_CS_REG(0x4214, 0x00050005); OUT_CS_REG(0x4230, 0x18000006); OUT_CS_REG(0x4234, 0x00020006); @@ -184,7 +185,7 @@ OUT_CS_REG(0x20B4, 0x00000008); OUT_CS_REG(0x21DC, 0xAAAAAAAA); OUT_CS_REG(0x2090, 0x00000003); OUT_CS_REG(0x2094, 0x00000000); -OUT_CS_REG(0x4104, 0x00000000); +OUT_CS_REG(R300_TX_ENABLE, 0x0); OUT_CS_REG(0x1D98, 0x3F800000); OUT_CS_REG(0x1D9C, 0x00000000); OUT_CS_REG(0x1DA0, 0x3F800000); @@ -273,8 +274,11 @@ OUT_CS_32F(g); OUT_CS_32F(b); OUT_CS_32F(1.0); -OUT_CS_REG(0x4E4C, 0x0000000A); -OUT_CS_REG(0x4F18, 0x00000003); +/* XXX figure out why this is 0xA and not 0x2 */ +/* XXX OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); +OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, + R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | + R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */ R300_PACIFY; END_CS; -- cgit v1.2.3 From 84ec4d6bedf33bf03ff7a778632eef7b209944cb Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 28 Jan 2009 02:57:08 -0800 Subject: Ack, forgot to update the index again. --- src/gallium/drivers/r300/r300_cs.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 42ec9fb094..5686e5a6e9 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -68,10 +68,10 @@ static uint32_t pack_float_32(float f) #define BEGIN_CS(size) do { \ CHECK_CS(size); \ - debug_printf("r300: BEGIN_CS in %s (%s:%d)\n", __FUNCTION__, __FILE__, \ - __LINE__); \ + debug_printf("r300: BEGIN_CS, count %d, in %s (%s:%d)\n", \ + size, __FUNCTION__, __FILE__, __LINE__); \ cs_winsys->begin_cs(cs, (size), __FILE__, __FUNCTION__, __LINE__); \ - int cs_count = size; \ + cs_count = size; \ } while (0) #define OUT_CS(value) do { \ -- cgit v1.2.3 From 588d8f3befa007e03ffb124033e6879330ad9614 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 28 Jan 2009 03:06:08 -0800 Subject: r300: Fix a few more registers. --- src/gallium/drivers/r300/r300_surface.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index fc756133b4..0ef26d4305 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -93,11 +93,13 @@ OUT_CS_32F(0.0); OUT_CS_32F(0.0); OUT_CS_32F(1.0); OUT_CS_32F(1.0); -OUT_CS_REG(0x4214, 0x00050005); -OUT_CS_REG(0x4230, 0x18000006); -OUT_CS_REG(0x4234, 0x00020006); -OUT_CS_REG(0x4238, 0x3BAAAAAB); +OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | + (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); +/* XXX should this be related to the actual point size? */ +OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 | + (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT)); OUT_CS_REG(0x4234, 0x00030006); +OUT_CS_REG(0x4238, 0x3BAAAAAB); OUT_CS_REG(0x4260, 0x00000000); OUT_CS_REG(0x4264, 0x00000000); OUT_CS_REG(0x4268, 0x3F800000); -- cgit v1.2.3 From 00f96d054d782fd0fa7b103b857fb19d3e4a1472 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Wed, 28 Jan 2009 14:53:39 +0100 Subject: r300: name registers for human readability Signed-off-by: Corbin Simpson --- src/gallium/drivers/r300/r300_surface.c | 206 ++++++++++++++++---------------- 1 file changed, 103 insertions(+), 103 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 0ef26d4305..48e0f54db9 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -47,12 +47,12 @@ R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; /* Viewport setup */ -OUT_CS_REG(0x1D98, 0x43000000); -OUT_CS_REG(0x1D9C, 0x43002000); -OUT_CS_REG(0x1DA0, 0xC3000000); -OUT_CS_REG(0x1DA4, 0x43002000); -OUT_CS_REG(0x1DA8, 0x3F000000); -OUT_CS_REG(0x1DAC, 0x3F000000); +OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x43000000); +OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x43002000); +OUT_CS_REG(R300_SE_VPORT_YSCALE, 0xC3000000); +OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x43002000); +OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F000000); +OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x3F000000); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -98,61 +98,61 @@ OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | /* XXX should this be related to the actual point size? */ OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 | (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT)); -OUT_CS_REG(0x4234, 0x00030006); -OUT_CS_REG(0x4238, 0x3BAAAAAB); -OUT_CS_REG(0x4260, 0x00000000); -OUT_CS_REG(0x4264, 0x00000000); -OUT_CS_REG(0x4268, 0x3F800000); -OUT_CS_REG(0x4274, 0x00000002); -OUT_CS_REG(0x4278, 0x0003AAAA); -OUT_CS_REG(0x427C, 0x00000000); -OUT_CS_REG(0x4280, 0x00000000); -OUT_CS_REG(0x4288, 0x00000000); -OUT_CS_REG(0x428C, 0x00000001); -OUT_CS_REG(0x4290, 0x00000000); -OUT_CS_REG(0x4294, 0x3DBF1412); -OUT_CS_REG(0x4298, 0x00000000); -OUT_CS_REG(0x42A0, 0x00000000); -OUT_CS_REG(0x42A4, 0x00000000); -OUT_CS_REG(0x42A8, 0x00000000); -OUT_CS_REG(0x42AC, 0x00000000); -OUT_CS_REG(0x42B0, 0x00000000); -OUT_CS_REG(0x42B4, 0x00000000); -OUT_CS_REG(0x42B8, 0x00000000); -OUT_CS_REG(0x42C0, 0x4B7FFFFF); -OUT_CS_REG(0x42C4, 0x00000000); -OUT_CS_REG(0x43A4, 0x0000001C); -OUT_CS_REG(0x43A8, 0x2DA49525); -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x46A4, 0x00001B00); +OUT_CS_REG(R300_GA_LINE_CNTL, 0x00030006); +OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, 0x3BAAAAAB); +OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, 0x00000000); +OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); +OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); +OUT_CS_REG(R300_GA_ENHANCE, 0x00000002); +OUT_CS_REG(R300_GA_COLOR_CONTROL, 0x0003AAAA); +OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000); +OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000); +OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000); +OUT_CS_REG(R300_GA_ROUND_MODE, 0x00000001); +OUT_CS_REG(R300_GA_OFFSET, 0x00000000); +OUT_CS_REG(R300_GA_FOG_SCALE, 0x3DBF1412); +OUT_CS_REG(R300_GA_FOG_OFFSET, 0x00000000); +OUT_CS_REG(R300_SU_TEX_WRAP, 0x00000000); +OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_SCALE, 0x00000000); +OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_OFFSET, 0x00000000); +OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_SCALE, 0x00000000); +OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_OFFSET, 0x00000000); +OUT_CS_REG(R300_SU_POLY_OFFSET_ENABLE, 0x00000000); +OUT_CS_REG(R300_SU_CULL_MODE, 0x00000000); +OUT_CS_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF); +OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); +OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); +OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); +OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); +OUT_CS_REG(R300_US_OUT_FMT, 0x00001B00); OUT_CS_REG(0x46A8, 0x00001B0F); OUT_CS_REG(0x46AC, 0x00001B0F); OUT_CS_REG(0x46B0, 0x00001B0F); -OUT_CS_REG(0x46B4, 0x00000001); -OUT_CS_REG(0x4600, 0x00000000); -OUT_CS_REG(0x4604, 0x00000000); -OUT_CS_REG(0x4608, 0x00000000); -OUT_CS_REG(0x4610, 0x00000000); -OUT_CS_REG(0x4614, 0x00000000); -OUT_CS_REG(0x4618, 0x00000000); -OUT_CS_REG(0x461C, 0x00000000); -OUT_CS_REG(0x48C0, 0x00000000); -OUT_CS_REG(0x46C0, 0x00000000); -OUT_CS_REG(0x49C0, 0x00000000); -OUT_CS_REG(0x47C0, 0x00000000); -OUT_CS_REG(0x4BC0, 0x00000002); -OUT_CS_REG(0x4BC8, 0x00000000); -OUT_CS_REG(0x4BCC, 0x00000000); -OUT_CS_REG(0x4BD0, 0x00000000); -OUT_CS_REG(0x4BD8, 0x00000000); -OUT_CS_REG(0x4BD8, 0x00000000); -OUT_CS_REG(0x4E00, 0x00000000); -OUT_CS_REG(0x4E0C, 0x0000000F); +OUT_CS_REG(R300_US_W_FMT, 0x00000001); +OUT_CS_REG(R300_US_CONFIG, 0x00000000); +OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); +OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00000000); +OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00000000); +OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x00000000); +OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00000000); +OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x00000000); +OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002); +OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); +OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); +OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x00000000); +OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); +OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); +OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); +OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); r300_emit_blend_color_state(r300, &blend_color_clear_state); -OUT_CS_REG(0x4E10, 0x00000000); -OUT_CS_REG(0x4E54, 0x00000000); +OUT_CS_REG(R300_RB3D_BLEND_COLOR, 0x00000000); +OUT_CS_REG(0x4E54, 0x00000000); OUT_CS_REG(0x4E58, 0x00000000); OUT_CS_REG(0x4E5C, 0x00000000); OUT_CS_REG(0x4E60, 0x00000000); @@ -160,45 +160,45 @@ OUT_CS_REG(0x4E64, 0x00000000); OUT_CS_REG(0x4E68, 0x00000000); OUT_CS_REG(0x4E6C, 0x00000000); OUT_CS_REG(0x4E70, 0x00000000); -OUT_CS_REG(0x4E88, 0x00000000); -OUT_CS_REG(0x4EA0, 0x00000000); -OUT_CS_REG(0x4EA4, 0xFFFFFFFF); -OUT_CS_REG(0x4F00, 0x00000010); -OUT_CS_REG(0x4F04, 0x00038038); -OUT_CS_REG(0x4F08, 0x00FFFF00); -OUT_CS_REG(0x4F10, 0x00000002); -OUT_CS_REG(0x4F18, 0x00000003); -OUT_CS_REG(0x4F1C, 0x00000000); -OUT_CS_REG(0x4F28, 0x00000000); +OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); +OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); +OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); +OUT_CS_REG(R300_ZB_CNTL, 0x00000010); +OUT_CS_REG(R300_ZB_ZSTENCILCNTL, 0x00038038); +OUT_CS_REG(R300_ZB_STENCILREFMASK, 0x00FFFF00); +OUT_CS_REG(R300_ZB_FORMAT, 0x00000002); +OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); +OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); +OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000); OUT_CS_REG(0x4F30, 0x00000000); OUT_CS_REG(0x4F34, 0x00000000); -OUT_CS_REG(0x4F44, 0x00000000); -OUT_CS_REG(0x4F54, 0x00000000); -OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); +OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); +OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000); R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); -OUT_CS_REG(0x2150, 0x21030003); -OUT_CS_REG(0x4BC0, 0x00000000); +OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); +OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x21030003); +OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); -OUT_CS_REG(0x20B0, 0x0000043F); -OUT_CS_REG(0x20B4, 0x00000008); -OUT_CS_REG(0x21DC, 0xAAAAAAAA); -OUT_CS_REG(0x2090, 0x00000003); -OUT_CS_REG(0x2094, 0x00000000); +OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); +OUT_CS_REG(R300_VAP_VTX_SIZE, 0x00000008); +OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); +OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); +OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); OUT_CS_REG(R300_TX_ENABLE, 0x0); -OUT_CS_REG(0x1D98, 0x3F800000); -OUT_CS_REG(0x1D9C, 0x00000000); -OUT_CS_REG(0x1DA0, 0x3F800000); -OUT_CS_REG(0x1DA4, 0x00000000); -OUT_CS_REG(0x1DA8, 0x3F800000); -OUT_CS_REG(0x1DAC, 0x00000000); -OUT_CS_REG(0x4BD4, 0x00000000); +OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x3F800000); +OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x00000000); +OUT_CS_REG(R300_SE_VPORT_YSCALE, 0x3F800000); +OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x00000000); +OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F800000); +OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x00000000); +OUT_CS_REG(R300_FG_ALPHA_FUNC, 0x00000000); r300_emit_blend_state(r300, &blend_clear_state); -OUT_CS_REG(0x221C, 0x0001C000); +OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); @@ -221,28 +221,28 @@ if (caps->is_r500) { OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); OUT_CS_REG(R300_RS_INST_COUNT, 0x0); -OUT_CS_REG(0x4330, 0x00004000); -OUT_CS_REG(0x4600, 0x00000000); -OUT_CS_REG(0x4604, 0x00000000); -OUT_CS_REG(0x4608, 0x00000000); -OUT_CS_REG(0x4610, 0x00000000); -OUT_CS_REG(0x4614, 0x00000000); -OUT_CS_REG(0x4618, 0x00000000); -OUT_CS_REG(0x461C, 0x00400000); -OUT_CS_REG(0x48C0, 0x00050A80); -OUT_CS_REG(0x46C0, 0x1C000000); -OUT_CS_REG(0x49C0, 0x00040889); -OUT_CS_REG(0x47C0, 0x01000000); +OUT_CS_REG(R300_RS_INST_0, 0x00004000); +OUT_CS_REG(R300_US_CONFIG, 0x00000000); +OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); +OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); +OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000); +OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80); +OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); +OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); +OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000); /* XXX these magic numbers should be explained when * this becomes a cached state object */ OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); -OUT_CS_REG(0x22D0, 0x00100000); -OUT_CS_REG(0x22D4, 0x00000000); -OUT_CS_REG(0x22D8, 0x00000001); -OUT_CS_REG(0x43E8, 0x00000000); +OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); +OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); +OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); +OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000); R300_PACIFY; -OUT_CS_REG(0x43E8, 0x00FFFFFF); +OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); /* XXX translate these back into normal instructions */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); @@ -260,8 +260,8 @@ r300_emit_dsa_state(r300, &dsa_clear_state); R300_PACIFY; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); -//OUT_CS_REG(0x4E38, 0x00C00100); -OUT_CS_REG(0x4E0C, 0x0000000F); +//OUT_CS_REG(R300_RB3D_COLORPITCH0, 0x00C00100); +OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | -- cgit v1.2.3 From f0fce46a48a1f0547a1e50ad54696c4b660c8dce Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Thu, 29 Jan 2009 00:12:32 +0100 Subject: r300: attempt at trivial/clear on r5xx --- src/gallium/drivers/r300/r300_cs.h | 4 +- src/gallium/drivers/r300/r300_reg.h | 25 ++++++++-- src/gallium/drivers/r300/r300_surface.c | 83 +++++++++++++++++++++++++-------- 3 files changed, 87 insertions(+), 25 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 5686e5a6e9..d15887fb1c 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -85,7 +85,7 @@ static uint32_t pack_float_32(float f) } while (0) #define OUT_CS_REG(register, value) do { \ - debug_printf("r300: writing 0x%x to register 0x%x\n", value, register); \ + debug_printf("r300: writing 0x%08X to register 0x%04X\n", value, register); \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); \ } while (0) @@ -93,7 +93,7 @@ static uint32_t pack_float_32(float f) /* Note: This expects count to be the number of registers, * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ - debug_printf("r300: writing register sequence 0x%x\n", register); \ + debug_printf("r300: writing register sequence of %d to 0x%04X\n", count, register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index c1d5009b86..9281e6656f 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1669,7 +1669,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_TEX_INST_MASK (7 << 15) /* Output format from the unfied shader */ -#define R300_US_OUT_FMT 0x46A4 +#define R300_US_OUT_FMT_0 0x46A4 # define R300_US_OUT_FMT_C4_8 (0 << 0) # define R300_US_OUT_FMT_C4_10 (1 << 0) # define R300_US_OUT_FMT_C4_10_GAMMA (2 << 0) @@ -1691,7 +1691,24 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_US_OUT_FMT_C4_16_FP (18 << 0) # define R300_US_OUT_FMT_C_32_FP (19 << 0) # define R300_US_OUT_FMT_C2_32_FP (20 << 0) -# define R300_US_OUT_FMT_C4_32_FP (20 << 0) +# define R300_US_OUT_FMT_C4_32_FP (21 << 0) +# define R300_C0_SEL_A (0 << 8) +# define R300_C0_SEL_R (1 << 8) +# define R300_C0_SEL_G (2 << 8) +# define R300_C0_SEL_B (3 << 8) +# define R300_C1_SEL_A (0 << 10) +# define R300_C1_SEL_R (1 << 10) +# define R300_C1_SEL_G (2 << 10) +# define R300_C1_SEL_B (3 << 10) +# define R300_C2_SEL_A (0 << 12) +# define R300_C2_SEL_R (1 << 12) +# define R300_C2_SEL_G (2 << 12) +# define R300_C2_SEL_B (3 << 12) +# define R300_C3_SEL_A (0 << 14) +# define R300_C3_SEL_R (1 << 14) +# define R300_C3_SEL_G (2 << 14) +# define R300_C3_SEL_B (3 << 14) +# define R300_OUT_SIGN(x) (x << 16) /* ALU * The ALU instructions register blocks are enumerated according to the order @@ -2987,7 +3004,7 @@ enum { # define R500_US_CODE_RANGE_ADDR(x) (x << 0) # define R500_US_CODE_RANGE_SIZE(x) (x << 16) #define R500_US_CONFIG 0x4600 -# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 1) +# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 0) #define R500_US_FC_ADDR_0 0xa000 # define R500_FC_BOOL_ADDR(x) (x << 0) # define R500_FC_INT_ADDR(x) (x << 8) @@ -3031,7 +3048,7 @@ enum { # define R500_FORMAT_TXHEIGHT(x) (x << 11) # define R500_FORMAT_TXDEPTH(x) (x << 22) /* _0 through _3 */ -#define R500_US_OUT_FMT_0 0x46a4 +#define R500_US_OUT_FMT_0 0x46A4 # define R500_OUT_FMT_C4_8 (0 << 0) # define R500_OUT_FMT_C4_10 (1 << 0) # define R500_OUT_FMT_C4_10_GAMMA (2 << 0) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 48e0f54db9..f2d0183c98 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,7 +42,7 @@ static void r300_surface_fill(struct pipe_context* pipe, " dimensions %dx%d, color 0x%x\n", dest, x, y, w, h, color); -BEGIN_CS(276); +BEGIN_CS((caps->is_r500) ? 367 : 276); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -88,10 +88,9 @@ OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16); OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); /* XXX point tex stuffing */ -OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4); +OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); OUT_CS_32F(0.0); -OUT_CS_32F(0.0); -OUT_CS_32F(1.0); +OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1); OUT_CS_32F(1.0); OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); @@ -124,10 +123,11 @@ OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); -OUT_CS_REG(R300_US_OUT_FMT, 0x00001B00); -OUT_CS_REG(0x46A8, 0x00001B0F); -OUT_CS_REG(0x46AC, 0x00001B0F); -OUT_CS_REG(0x46B0, 0x00001B0F); +OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); +OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R); +OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); +OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); +OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); OUT_CS_REG(R300_US_W_FMT, 0x00000001); OUT_CS_REG(R300_US_CONFIG, 0x00000000); OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); @@ -152,14 +152,10 @@ OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); r300_emit_blend_color_state(r300, &blend_color_clear_state); OUT_CS_REG(R300_RB3D_BLEND_COLOR, 0x00000000); -OUT_CS_REG(0x4E54, 0x00000000); -OUT_CS_REG(0x4E58, 0x00000000); -OUT_CS_REG(0x4E5C, 0x00000000); -OUT_CS_REG(0x4E60, 0x00000000); -OUT_CS_REG(0x4E64, 0x00000000); -OUT_CS_REG(0x4E68, 0x00000000); -OUT_CS_REG(0x4E6C, 0x00000000); -OUT_CS_REG(0x4E70, 0x00000000); +/* XXX: Oh the wonderful unknown */ +OUT_CS_REG_SEQ(0x4E54, 8); +for (i = 0; i < 8; i++) + OUT_CS(0x00000000); OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); @@ -202,16 +198,65 @@ OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); -/* XXX RS block setup */ +/* XXX RS block and fp setup */ if (caps->is_r500) { - OUT_CS_REG_SEQ(R500_RS_IP_0, 8); - for (i = 0; i < 8; i++) { + OUT_CS_REG_SEQ(R500_RS_IP_0, 16); + for (i = 0; i < 16; i++) { /* I like the operator macros more than the shift macros... */ OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); } + R300_PACIFY; + OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); + OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | + R500_US_CODE_END_ADDR(1)); + OUT_CS_REG(R500_US_CODE_RANGE, R500_US_CODE_RANGE_ADDR(0) | + R500_US_CODE_RANGE_SIZE(1)); + OUT_CS_REG(R500_US_CODE_OFFSET, R500_US_CODE_OFFSET_ADDR(0)); + R300_PACIFY; + OUT_CS_REG(R500_US_CMN_INST_0, + R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | + R500_INST_LAST | + R500_INST_RGB_OMASK_R | + R500_INST_RGB_OMASK_G | + R500_INST_RGB_OMASK_B | + R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | + R500_INST_ALPHA_CLAMP); + OUT_CS_REG(R500_US_ALU_RGB_ADDR_0, + R500_RGB_ADDR0(0) | + R500_RGB_ADDR1(0) | + R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | + R500_RGB_ADDR2_CONST); + OUT_CS_REG(R500_US_ALU_ALPHA_ADDR_0, + R500_ALPHA_ADDR0(0) | + R500_ALPHA_ADDR1(0) | + R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | + R500_ALPHA_ADDR2_CONST); + OUT_CS_REG(R500_US_ALU_RGB_INST_0, + R500_ALU_RGB_SEL_A_SRC0 | + R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | + R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | + R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | + R500_ALU_RGB_G_SWIZ_B_B); + OUT_CS_REG(R500_US_ALU_ALPHA_INST_0, + R500_ALPHA_OP_CMP | + R500_ALPHA_SWIZ_A_A | + R500_ALPHA_SWIZ_B_A); + OUT_CS_REG(R500_US_ALU_RGBA_INST_0, + R500_ALU_RGBA_OP_CMP | + R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | + R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0); } else { OUT_CS_REG_SEQ(R300_RS_IP_0, 8); for (i = 0; i < 8; i++) { -- cgit v1.2.3 From c199f330322921e01c8c30e3ea69a2a5291ae8ee Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 28 Jan 2009 21:33:35 -0800 Subject: r300: Unbreak emit, fix up a bunch of little things. --- src/gallium/drivers/r300/r300_cs.h | 9 +++- src/gallium/drivers/r300/r300_emit.c | 7 +++- src/gallium/drivers/r300/r300_surface.c | 73 +++++++++++++++++---------------- src/gallium/drivers/r300/r300_surface.h | 2 +- 4 files changed, 50 insertions(+), 41 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index d15887fb1c..734ccb13d9 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -85,7 +85,9 @@ static uint32_t pack_float_32(float f) } while (0) #define OUT_CS_REG(register, value) do { \ - debug_printf("r300: writing 0x%08X to register 0x%04X\n", value, register); \ + debug_printf("r300: writing 0x%08X to register 0x%04X\n", \ + value, register); \ + assert(register); \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); \ } while (0) @@ -93,13 +95,16 @@ static uint32_t pack_float_32(float f) /* Note: This expects count to be the number of registers, * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ - debug_printf("r300: writing register sequence of %d to 0x%04X\n", count, register); \ + debug_printf("r300: writing register sequence of %d to 0x%04X\n", \ + count, register); \ + assert(register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ debug_printf("r300: writing relocation for buffer %p, offset %d\n", \ bo, offset); \ + assert(bo); \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 4ae8a46637..c5f08a2404 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -62,9 +62,12 @@ void r300_emit_dsa_state(struct r300_context* r300, struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; CS_LOCALS(r300); - BEGIN_CS(r300screen->caps->is_r500 ? 12 : 10); + BEGIN_CS(r300screen->caps->is_r500 ? 12 : 8); OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); - OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + /* XXX figure out the r300 counterpart for this */ + if (r300screen->caps->is_r500) { + OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + } OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); OUT_CS(dsa->z_buffer_control); OUT_CS(dsa->z_stencil_control); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index f2d0183c98..185b56ff88 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,17 +42,10 @@ static void r300_surface_fill(struct pipe_context* pipe, " dimensions %dx%d, color 0x%x\n", dest, x, y, w, h, color); -BEGIN_CS((caps->is_r500) ? 367 : 276); +BEGIN_CS((caps->is_r500) ? 367 : 322); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; -/* Viewport setup */ -OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x43000000); -OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x43002000); -OUT_CS_REG(R300_SE_VPORT_YSCALE, 0xC3000000); -OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x43002000); -OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F000000); -OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x3F000000); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -71,7 +64,7 @@ OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); /* XXX magic number not in r300_reg */ OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0); -OUT_CS_REG(R300_VAP_GB_VERT_CLIP_ADJ, 4); +OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); OUT_CS_32F(1.0); OUT_CS_32F(1.0); OUT_CS_32F(1.0); @@ -149,9 +142,6 @@ OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); -r300_emit_blend_color_state(r300, &blend_color_clear_state); - -OUT_CS_REG(R300_RB3D_BLEND_COLOR, 0x00000000); /* XXX: Oh the wonderful unknown */ OUT_CS_REG_SEQ(0x4E54, 8); for (i = 0; i < 8; i++) @@ -184,16 +174,16 @@ OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); OUT_CS_REG(R300_TX_ENABLE, 0x0); -OUT_CS_REG(R300_SE_VPORT_XSCALE, 0x3F800000); -OUT_CS_REG(R300_SE_VPORT_XOFFSET, 0x00000000); -OUT_CS_REG(R300_SE_VPORT_YSCALE, 0x3F800000); -OUT_CS_REG(R300_SE_VPORT_YOFFSET, 0x00000000); -OUT_CS_REG(R300_SE_VPORT_ZSCALE, 0x3F800000); -OUT_CS_REG(R300_SE_VPORT_ZOFFSET, 0x00000000); +/* XXX viewport setup */ +OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); +OUT_CS_32F(1.0); +OUT_CS_32F(0.0); +OUT_CS_32F(1.0); +OUT_CS_32F(0.0); +OUT_CS_32F(1.0); +OUT_CS_32F(0.0); OUT_CS_REG(R300_FG_ALPHA_FUNC, 0x00000000); -r300_emit_blend_state(r300, &blend_clear_state); - OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); @@ -262,22 +252,22 @@ if (caps->is_r500) { for (i = 0; i < 8; i++) { OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); } -} -OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); -OUT_CS_REG(R300_RS_INST_COUNT, 0x0); + OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS_REG(R300_RS_INST_COUNT, 0x0); -OUT_CS_REG(R300_RS_INST_0, 0x00004000); -OUT_CS_REG(R300_US_CONFIG, 0x00000000); -OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); -OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000); -OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80); -OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); -OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); -OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000); + OUT_CS_REG(R300_RS_INST_0, 0x00004000); + OUT_CS_REG(R300_US_CONFIG, 0x00000000); + OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); + OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); + OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000); + OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80); + OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); + OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); + OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000); +} /* XXX these magic numbers should be explained when * this becomes a cached state object */ OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | @@ -300,12 +290,23 @@ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +r300_emit_blend_state(r300, &blend_clear_state); +r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); R300_PACIFY; +/* Flush colorbuffer and blend caches. */ +OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, + R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D | + R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_SIGNAL); +OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, + R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | + R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); + OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); -//OUT_CS_REG(R300_RB3D_COLORPITCH0, 0x00C00100); +OUT_CS_REG(R300_RB3D_COLORPITCH0, (w >> 1) | R300_COLOR_TILE_ENABLE | + R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 2b89698ca5..e1d53116a1 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -50,7 +50,7 @@ const struct r300_dsa_state dsa_clear_state = { .alpha_reference = 0x0, .z_buffer_control = 0x0, .z_stencil_control = 0x0, - .stencil_ref_mask = 0x0, + .stencil_ref_mask = R300_STENCILWRITEMASK_MASK, .z_buffer_top = R300_ZTOP_ENABLE, .stencil_ref_bf = 0x0, }; -- cgit v1.2.3 From 0c9d2bbb1296e7b5c812ce04f79aff2d8308907c Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Thu, 29 Jan 2009 20:24:34 +0100 Subject: r300: set up r5xx fragment shader; clear still broken --- src/gallium/drivers/r300/r300_emit.c | 6 +-- src/gallium/drivers/r300/r300_reg.h | 2 +- src/gallium/drivers/r300/r300_surface.c | 82 ++++++++++----------------------- 3 files changed, 29 insertions(+), 61 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index c5f08a2404..001aa02f41 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -62,11 +62,11 @@ void r300_emit_dsa_state(struct r300_context* r300, struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; CS_LOCALS(r300); - BEGIN_CS(r300screen->caps->is_r500 ? 12 : 8); + BEGIN_CS(r300screen->caps->is_r500 ? 8 : 8); OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); /* XXX figure out the r300 counterpart for this */ if (r300screen->caps->is_r500) { - OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); + /* OUT_CS_REG(R500_FG_ALPHA_VALUE, dsa->alpha_reference); */ } OUT_CS_REG_SEQ(R300_ZB_CNTL, 3); OUT_CS(dsa->z_buffer_control); @@ -74,7 +74,7 @@ void r300_emit_dsa_state(struct r300_context* r300, OUT_CS(dsa->stencil_ref_mask); OUT_CS_REG(R300_ZB_ZTOP, dsa->z_buffer_top); if (r300screen->caps->is_r500) { - OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); + /* OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); */ } END_CS; } diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 9281e6656f..f01e15b8dd 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -3004,7 +3004,7 @@ enum { # define R500_US_CODE_RANGE_ADDR(x) (x << 0) # define R500_US_CODE_RANGE_SIZE(x) (x << 16) #define R500_US_CONFIG 0x4600 -# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 0) +# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 1) #define R500_US_FC_ADDR_0 0xa000 # define R500_FC_BOOL_ADDR(x) (x << 0) # define R500_FC_INT_ADDR(x) (x << 8) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 185b56ff88..0503d8faed 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,7 +42,7 @@ static void r300_surface_fill(struct pipe_context* pipe, " dimensions %dx%d, color 0x%x\n", dest, x, y, w, h, color); -BEGIN_CS((caps->is_r500) ? 367 : 322); +BEGIN_CS((caps->is_r500) ? 300 : 322); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -122,17 +122,6 @@ OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); OUT_CS_REG(R300_US_W_FMT, 0x00000001); -OUT_CS_REG(R300_US_CONFIG, 0x00000000); -OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); -OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); -OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00000000); -OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00000000); -OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x00000000); -OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00000000); -OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x00000000); OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002); OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); @@ -149,9 +138,6 @@ for (i = 0; i < 8; i++) OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); -OUT_CS_REG(R300_ZB_CNTL, 0x00000010); -OUT_CS_REG(R300_ZB_ZSTENCILCNTL, 0x00038038); -OUT_CS_REG(R300_ZB_STENCILREFMASK, 0x00FFFF00); OUT_CS_REG(R300_ZB_FORMAT, 0x00000002); OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); @@ -182,7 +168,6 @@ OUT_CS_32F(1.0); OUT_CS_32F(0.0); OUT_CS_32F(1.0); OUT_CS_32F(0.0); -OUT_CS_REG(R300_FG_ALPHA_FUNC, 0x00000000); OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | @@ -200,53 +185,36 @@ if (caps->is_r500) { } R300_PACIFY; OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); + OUT_CS_REG(R500_US_PIXSIZE, 0x00000000); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(1)); OUT_CS_REG(R500_US_CODE_RANGE, R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(1)); OUT_CS_REG(R500_US_CODE_OFFSET, R500_US_CODE_OFFSET_ADDR(0)); R300_PACIFY; - OUT_CS_REG(R500_US_CMN_INST_0, - R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | - R500_INST_LAST | - R500_INST_RGB_OMASK_R | - R500_INST_RGB_OMASK_G | - R500_INST_RGB_OMASK_B | - R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | - R500_INST_ALPHA_CLAMP); - OUT_CS_REG(R500_US_ALU_RGB_ADDR_0, - R500_RGB_ADDR0(0) | - R500_RGB_ADDR1(0) | - R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | - R500_RGB_ADDR2_CONST); - OUT_CS_REG(R500_US_ALU_ALPHA_ADDR_0, - R500_ALPHA_ADDR0(0) | - R500_ALPHA_ADDR1(0) | - R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | - R500_ALPHA_ADDR2_CONST); - OUT_CS_REG(R500_US_ALU_RGB_INST_0, - R500_ALU_RGB_SEL_A_SRC0 | - R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | - R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | - R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | - R500_ALU_RGB_G_SWIZ_B_B); - OUT_CS_REG(R500_US_ALU_ALPHA_INST_0, - R500_ALPHA_OP_CMP | - R500_ALPHA_SWIZ_A_A | - R500_ALPHA_SWIZ_B_A); - OUT_CS_REG(R500_US_ALU_RGBA_INST_0, - R500_ALU_RGBA_OP_CMP | - R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | - R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0); + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, + 0 | R500_GA_US_VECTOR_INDEX_TYPE_INSTR); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_R | R500_INST_RGB_OMASK_G | R500_INST_RGB_OMASK_B | + R500_INST_ALPHA_OMASK | R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0); } else { OUT_CS_REG_SEQ(R300_RS_IP_0, 8); for (i = 0; i < 8; i++) { -- cgit v1.2.3 From 09b107058d11ac2362ea296556b68331ff04f193 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 29 Jan 2009 12:27:00 -0800 Subject: r300: Try to fix up RS a bit more. --- src/gallium/drivers/r300/r300_surface.c | 41 ++++++++++++++++++++------------- 1 file changed, 25 insertions(+), 16 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 0503d8faed..cc6b4f3d79 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -90,6 +90,7 @@ OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | /* XXX should this be related to the actual point size? */ OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 | (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT)); +/* XXX this big chunk should be refactored into rs_state */ OUT_CS_REG(R300_GA_LINE_CNTL, 0x00030006); OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, 0x3BAAAAAB); OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, 0x00000000); @@ -175,15 +176,20 @@ OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | /* XXX RS block and fp setup */ if (caps->is_r500) { - OUT_CS_REG_SEQ(R500_RS_IP_0, 16); - for (i = 0; i < 16; i++) { + OUT_CS_REG_SEQ(R500_RS_IP_0, 8); + for (i = 0; i < 8; i++) { /* I like the operator macros more than the shift macros... */ OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); } - R300_PACIFY; + /* XXX */ + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x0); + OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); + OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); OUT_CS_REG(R500_US_PIXSIZE, 0x00000000); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | @@ -220,21 +226,24 @@ if (caps->is_r500) { for (i = 0; i < 8; i++) { OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); } - OUT_CS_REG(R300_RS_COUNT, (1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS_REG(R300_RS_INST_COUNT, 0x0); + /* XXX */ + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x0); + OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); - OUT_CS_REG(R300_RS_INST_0, 0x00004000); - OUT_CS_REG(R300_US_CONFIG, 0x00000000); - OUT_CS_REG(R300_US_PIXSIZE, 0x00000000); - OUT_CS_REG(R300_US_CODE_OFFSET, 0x00000000); - OUT_CS_REG(R300_US_CODE_ADDR_0, 0x00000000); - OUT_CS_REG(R300_US_CODE_ADDR_1, 0x00000000); - OUT_CS_REG(R300_US_CODE_ADDR_2, 0x00000000); - OUT_CS_REG(R300_US_CODE_ADDR_3, 0x00400000); - OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x00050A80); + /* XXX magic numbers */ + OUT_CS_REG(R300_US_CONFIG, 0x0); + OUT_CS_REG(R300_US_PIXSIZE, 0x0); + OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); + OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x50A80); OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); - OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); - OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x01000000); + OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x40889); + OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1000000); } /* XXX these magic numbers should be explained when * this becomes a cached state object */ -- cgit v1.2.3 From e14a10691e1a0ca6b453faf705f94494113962de Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 29 Jan 2009 13:23:11 -0800 Subject: r300: Add cleaned-up clear fallback, sort more regs. --- src/gallium/drivers/r300/r300_reg.h | 10 +++++----- src/gallium/drivers/r300/r300_surface.c | 35 ++++++++++++++++++++++----------- 2 files changed, 28 insertions(+), 17 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index f01e15b8dd..dbd0cc28e2 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1233,11 +1233,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R300_RS_INST_0 0x4330 #define R300_RS_INST_1 0x4334 #define R300_RS_INST_2 0x4338 -#define R300_RS_INST_3 0x433C /* GUESS */ -#define R300_RS_INST_4 0x4340 /* GUESS */ -#define R300_RS_INST_5 0x4344 /* GUESS */ -#define R300_RS_INST_6 0x4348 /* GUESS */ -#define R300_RS_INST_7 0x434C /* GUESS */ +#define R300_RS_INST_3 0x433C +#define R300_RS_INST_4 0x4340 +#define R300_RS_INST_5 0x4344 +#define R300_RS_INST_6 0x4348 +#define R300_RS_INST_7 0x434C # define R300_RS_INST_TEX_ID(x) ((x) << 0) # define R300_RS_INST_TEX_CN_WRITE (1 << 3) # define R300_RS_INST_TEX_ADDR_SHIFT 6 diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index cc6b4f3d79..3ffaee54b6 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,6 +42,16 @@ static void r300_surface_fill(struct pipe_context* pipe, " dimensions %dx%d, color 0x%x\n", dest, x, y, w, h, color); + /* Fallback? */ + if (0) { + debug_printf("r300: Falling back on surface clear..."); + void* map = pipe->screen->surface_map(pipe->screen, dest, + PIPE_BUFFER_USAGE_CPU_WRITE); + pipe_fill_rect(map, &dest->block, &dest->stride, x, y, w, h, color); + pipe->screen->surface_unmap(pipe->screen, dest); + return; + } + BEGIN_CS((caps->is_r500) ? 300 : 322); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); @@ -117,12 +127,6 @@ OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); -OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); -OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R); -OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); -OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); -OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_US_OUT_FMT_UNUSED); -OUT_CS_REG(R300_US_W_FMT, 0x00000001); OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002); OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); @@ -164,9 +168,9 @@ OUT_CS_REG(R300_TX_ENABLE, 0x0); /* XXX viewport setup */ OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); OUT_CS_32F(1.0); -OUT_CS_32F(0.0); +OUT_CS_32F((float)x); OUT_CS_32F(1.0); -OUT_CS_32F(0.0); +OUT_CS_32F((float)y); OUT_CS_32F(1.0); OUT_CS_32F(0.0); @@ -224,17 +228,18 @@ if (caps->is_r500) { } else { OUT_CS_REG_SEQ(R300_RS_IP_0, 8); for (i = 0; i < 8; i++) { - OUT_CS(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3)); + OUT_CS(R300_RS_SEL_T(R300_RS_SEL_K0) | + R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1)); } /* XXX */ OUT_CS_REG_SEQ(R300_RS_COUNT, 2); OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS(0x0); + OUT_CS(1); OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); /* XXX magic numbers */ - OUT_CS_REG(R300_US_CONFIG, 0x0); - OUT_CS_REG(R300_US_PIXSIZE, 0x0); + OUT_CS_REG(R300_US_CONFIG, 0); + OUT_CS_REG(R300_US_PIXSIZE, 2); OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); @@ -244,6 +249,12 @@ if (caps->is_r500) { OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x40889); OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1000000); + OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); + OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); } /* XXX these magic numbers should be explained when * this becomes a cached state object */ -- cgit v1.2.3 From 8c8bdcde6d9eb1cda7bf268cd75ca7676e220075 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 29 Jan 2009 15:50:46 -0800 Subject: r300: Add line stipple state to rs_state. --- src/gallium/drivers/r300/r300_context.h | 10 ++++++---- src/gallium/drivers/r300/r300_state.c | 12 +++++++++--- 2 files changed, 15 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index f246c57f48..13982784ff 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -61,12 +61,14 @@ struct r300_fs_state { struct r300_rs_state { uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ - uint32_t depth_scale_front; /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */ - uint32_t depth_offset_front; /* R300_SU_POLY_OFFSET_FRONT_OFFSET: 0x42a8 */ - uint32_t depth_scale_back; /* R300_SU_POLY_OFFSET_BACK_SCALE: 0x42ac */ - uint32_t depth_offset_back; /* R300_SU_POLY_OFFSET_BACK_OFFSET: 0x42b0 */ + uint32_t depth_scale_front; /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */ + uint32_t depth_offset_front;/* R300_SU_POLY_OFFSET_FRONT_OFFSET: 0x42a8 */ + uint32_t depth_scale_back; /* R300_SU_POLY_OFFSET_BACK_SCALE: 0x42ac */ + uint32_t depth_offset_back; /* R300_SU_POLY_OFFSET_BACK_OFFSET: 0x42b0 */ uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */ uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */ + uint32_t line_stipple_config; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */ + uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */ }; struct r300_sampler_state { diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 907ebe5c75..ee947feb5a 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -440,9 +440,6 @@ struct pipe_rasterizer_state unsigned point_size_per_vertex:1; /**< size computed in vertex shader */ unsigned multisample:1; /* XXX maybe more ms state in future */ unsigned line_smooth:1; - unsigned line_stipple_enable:1; - unsigned line_stipple_factor:8; /**< [1..256] actually */ - unsigned line_stipple_pattern:16; unsigned line_last_pixel:1; unsigned bypass_clipping:1; unsigned bypass_vs:1; /**< Skip the vertex shader. Note that the shader is @@ -504,6 +501,15 @@ static void* r300_create_rs_state(struct pipe_context* pipe, pack_float_32(state->offset_scale); } + if (state->line_stipple_enable) { + rs->line_stipple_config = + R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | + (pack_float_32((float)state->line_stipple_factor) & + R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); + /* XXX this might need to be scaled up */ + rs->line_stipple_value = state->line_stipple_pattern; + } + /* XXX this is part of HW TCL */ /* XXX endian control */ rs->vap_control_status = R300_VAP_TCL_BYPASS; -- cgit v1.2.3 From 70b508bffba723b58817e375447c1695d9d5602b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 30 Jan 2009 01:24:03 -0800 Subject: r300: Split rs_state emit into its own function. --- src/gallium/drivers/r300/r300_emit.c | 29 ++++++++++++++++++++--------- src/gallium/drivers/r300/r300_emit.h | 4 +++- 2 files changed, 23 insertions(+), 10 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 001aa02f41..de5719db8d 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -79,6 +79,25 @@ void r300_emit_dsa_state(struct r300_context* r300, END_CS; } +void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) +{ + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; + CS_LOCALS(r300); + BEGIN_CS(14); + OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status); + OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6); + OUT_CS(rs->depth_scale_front); + OUT_CS(rs->depth_offset_front); + OUT_CS(rs->depth_scale_back); + OUT_CS(rs->depth_offset_back); + OUT_CS(rs->polygon_offset_enable); + OUT_CS(rs->cull_mode); + OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config); + OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value); + END_CS; +} + static void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = @@ -104,15 +123,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) } if (r300->dirty_state & R300_NEW_RASTERIZER) { - struct r300_rs_state* rs = r300->rs_state; - OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status); - /* XXX next six are contiguous regs */ - OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_SCALE, rs->depth_scale_front); - OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_OFFSET, rs->depth_offset_front); - OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_SCALE, rs->depth_scale_back); - OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_OFFSET, rs->depth_offset_back); - OUT_CS_REG(R300_SU_POLY_OFFSET_ENABLE, rs->polygon_offset_enable); - OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode); + r300_emit_rs_state(r300, r300->rs_state); } if (r300->dirty_state & R300_NEW_SCISSOR) { diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 98287bc1f3..b6e69386f9 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -31,4 +31,6 @@ void r300_emit_blend_color_state(struct r300_context* r300, struct r300_blend_color_state* bc); void r300_emit_dsa_state(struct r300_context* r300, - struct r300_dsa_state* dsa); + struct r300_dsa_state* dsa); + +void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs); -- cgit v1.2.3 From e6e6b493b6123df675d5222b0e78087a370aea01 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 30 Jan 2009 02:17:48 -0800 Subject: r300: Add more rs_state, fix indents on dsa_state. --- src/gallium/drivers/r300/r300_context.h | 2 ++ src/gallium/drivers/r300/r300_state.c | 51 ++++++++++++++++++--------------- 2 files changed, 30 insertions(+), 23 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 13982784ff..0cb0ec20d5 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -61,6 +61,8 @@ struct r300_fs_state { struct r300_rs_state { uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ + uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */ + uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */ uint32_t depth_scale_front; /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */ uint32_t depth_offset_front;/* R300_SU_POLY_OFFSET_FRONT_OFFSET: 0x42a8 */ uint32_t depth_scale_back; /* R300_SU_POLY_OFFSET_BACK_SCALE: 0x42ac */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index ee947feb5a..d81aee94e3 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -307,8 +307,8 @@ static void* } dsa->z_stencil_control |= - (translate_depth_stencil_function(state->depth.func) << - R300_Z_FUNC_SHIFT); + (translate_depth_stencil_function(state->depth.func) << + R300_Z_FUNC_SHIFT); } /* Stencil buffer setup. */ @@ -331,25 +331,25 @@ static void* if (state->stencil[1].enabled) { dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; dsa->z_stencil_control |= - (translate_depth_stencil_function(state->stencil[1].func) << - R300_S_BACK_FUNC_SHIFT) | - (translate_stencil_op(state->stencil[1].fail_op) << - R300_S_BACK_SFAIL_OP_SHIFT) | - (translate_stencil_op(state->stencil[1].zpass_op) << - R300_S_BACK_ZPASS_OP_SHIFT) | - (translate_stencil_op(state->stencil[1].zfail_op) << - R300_S_BACK_ZFAIL_OP_SHIFT); + (translate_depth_stencil_function(state->stencil[1].func) << + R300_S_BACK_FUNC_SHIFT) | + (translate_stencil_op(state->stencil[1].fail_op) << + R300_S_BACK_SFAIL_OP_SHIFT) | + (translate_stencil_op(state->stencil[1].zpass_op) << + R300_S_BACK_ZPASS_OP_SHIFT) | + (translate_stencil_op(state->stencil[1].zfail_op) << + R300_S_BACK_ZFAIL_OP_SHIFT); dsa->stencil_ref_bf = (state->stencil[1].ref_value) | - (state->stencil[1].value_mask << R300_STENCILMASK_SHIFT) | - (state->stencil[1].write_mask << R300_STENCILWRITEMASK_SHIFT); + (state->stencil[1].value_mask << R300_STENCILMASK_SHIFT) | + (state->stencil[1].write_mask << R300_STENCILWRITEMASK_SHIFT); } } /* Alpha test setup. */ if (state->alpha.enabled) { dsa->alpha_function = translate_alpha_function(state->alpha.func) | - R300_FG_ALPHA_FUNC_ENABLE; + R300_FG_ALPHA_FUNC_ENABLE; dsa->alpha_reference = CLAMP(state->alpha.ref * 1023.0f, 0, 1023); } else { dsa->z_buffer_top = R300_ZTOP_ENABLE; @@ -437,7 +437,6 @@ struct pipe_rasterizer_state unsigned poly_stipple_enable:1; unsigned point_smooth:1; unsigned point_sprite:1; - unsigned point_size_per_vertex:1; /**< size computed in vertex shader */ unsigned multisample:1; /* XXX maybe more ms state in future */ unsigned line_smooth:1; unsigned line_last_pixel:1; @@ -447,14 +446,14 @@ struct pipe_rasterizer_state unsigned origin_lower_left:1; /**< Is (0,0) the lower-left corner? */ unsigned flatshade_first:1; /**< take color attribute from the first vertex of a primitive */ unsigned gl_rasterization_rules:1; /**< enable tweaks for GL rasterization? */ - - float line_width; - float point_size; /**< used when no per-vertex size */ - float point_size_min; /* XXX - temporary, will go away */ - float point_size_max; /* XXX - temporary, will go away */ ubyte sprite_coord_mode[PIPE_MAX_SHADER_OUTPUTS]; /**< PIPE_SPRITE_COORD_ */ }; #endif + +static INLINE int pack_float_16_6x(float f) { + return ((int)(f * 6.0) & 0xffff); +} + /* Create a new rasterizer state based on the CSO rasterizer state. * * This is a very large chunk of state, and covers most of the graphics @@ -467,6 +466,16 @@ static void* r300_create_rs_state(struct pipe_context* pipe, { struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); + /* XXX this is part of HW TCL */ + /* XXX endian control */ + rs->vap_control_status = R300_VAP_TCL_BYPASS; + + rs->point_size = pack_float_16_6x(state->point_size) | + (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); + + rs->line_control = pack_float_16_6x(state->line_width) | + R300_GA_LINE_CNTL_END_TYPE_COMP; + /* Radeons don't think in "CW/CCW", they think in "front/back". */ if (state->front_winding == PIPE_WINDING_CW) { rs->cull_mode = R300_FRONT_FACE_CW; @@ -510,10 +519,6 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->line_stipple_value = state->line_stipple_pattern; } - /* XXX this is part of HW TCL */ - /* XXX endian control */ - rs->vap_control_status = R300_VAP_TCL_BYPASS; - return (void*)rs; } -- cgit v1.2.3 From 38f610e5360a2beb46f92e75942745cfbfbac22a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 1 Feb 2009 23:43:30 -0800 Subject: r300: Add u_simple_screen support. --- src/gallium/drivers/r300/r300_screen.c | 1 + src/gallium/drivers/r300/r300_screen.h | 1 + 2 files changed, 2 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 607dfe911c..99dcf38f43 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -264,6 +264,7 @@ struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, r300screen->screen.surface_unmap = r300_surface_unmap; r300_init_screen_texture_functions(&r300screen->screen); + u_simple_screen_init(&r300screen->screen); return &r300screen->screen; } diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index b45ce5e8c6..2e25f61dbf 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -26,6 +26,7 @@ #include "pipe/p_inlines.h" #include "pipe/p_screen.h" #include "util/u_memory.h" +#include "util/u_simple_screen.h" #include "r300_chipset.h" #include "r300_texture.h" -- cgit v1.2.3 From ce6710e369d3b5c512ba8b315efc863fd41de734 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 1 Feb 2009 23:58:16 -0800 Subject: r300: Clean up after rebase. Fix a couple struct members, clear up a few texture lines. --- src/gallium/drivers/r300/r300_state.c | 11 ++++++----- src/gallium/drivers/r300/r300_texture.c | 8 ++++---- 2 files changed, 10 insertions(+), 9 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index d81aee94e3..96fdce903e 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -325,8 +325,8 @@ static void* R300_S_FRONT_ZFAIL_OP_SHIFT); dsa->stencil_ref_mask = (state->stencil[0].ref_value) | - (state->stencil[0].value_mask << R300_STENCILMASK_SHIFT) | - (state->stencil[0].write_mask << R300_STENCILWRITEMASK_SHIFT); + (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | + (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); if (state->stencil[1].enabled) { dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; @@ -341,8 +341,8 @@ static void* R300_S_BACK_ZFAIL_OP_SHIFT); dsa->stencil_ref_bf = (state->stencil[1].ref_value) | - (state->stencil[1].value_mask << R300_STENCILMASK_SHIFT) | - (state->stencil[1].write_mask << R300_STENCILWRITEMASK_SHIFT); + (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | + (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); } } @@ -350,7 +350,8 @@ static void* if (state->alpha.enabled) { dsa->alpha_function = translate_alpha_function(state->alpha.func) | R300_FG_ALPHA_FUNC_ENABLE; - dsa->alpha_reference = CLAMP(state->alpha.ref * 1023.0f, 0, 1023); + dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f, + 0, 1023); } else { dsa->z_buffer_top = R300_ZTOP_ENABLE; } diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index eb7c9d06f5..ae2d525d78 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -58,7 +58,7 @@ static struct pipe_texture* r300_texture_create(struct pipe_screen* screen, const struct pipe_texture* template) { - struct r300_screen* r300screen = r300_screen(screen); + /* XXX struct r300_screen* r300screen = r300_screen(screen); */ struct r300_texture* tex = CALLOC_STRUCT(r300_texture); @@ -72,9 +72,9 @@ static struct pipe_texture* r300_setup_miptree(tex); - tex->buffer = screen->winsys->buffer_create(screen->winsys, 32, - PIPE_BUFFER_USAGE_PIXEL, - tex->size); + tex->buffer = screen->buffer_create(screen->winsys, 32, + PIPE_BUFFER_USAGE_PIXEL, + tex->size); if (!tex->buffer) { FREE(tex); -- cgit v1.2.3 From a2416e3d7ecb2fcf18d93a08bc3cc3639ed97b39 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 2 Feb 2009 14:42:04 -0800 Subject: r300, amd: Oops, a couple more API changes. Somehow I forgot to commit these. --- src/gallium/drivers/r300/r300_texture.c | 2 +- src/gallium/winsys/drm/amd/amd_buffer.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index ae2d525d78..537425c1e2 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -72,7 +72,7 @@ static struct pipe_texture* r300_setup_miptree(tex); - tex->buffer = screen->buffer_create(screen->winsys, 32, + tex->buffer = screen->buffer_create(screen, 32, PIPE_BUFFER_USAGE_PIXEL, tex->size); diff --git a/src/gallium/winsys/drm/amd/amd_buffer.c b/src/gallium/winsys/drm/amd/amd_buffer.c index fb7c6f33ed..4b831c7fcc 100644 --- a/src/gallium/winsys/drm/amd/amd_buffer.c +++ b/src/gallium/winsys/drm/amd/amd_buffer.c @@ -231,7 +231,7 @@ struct pipe_surface *amd_surface_from_handle(struct amd_context *amd_context, pt = pipe_screen->texture_blanket(pipe_screen, &tmpl, &pitch, pb); if (pt == NULL) { - winsys_buffer_reference(pipe_winsys, &pb, NULL); + pipe_buffer_reference(pipe_screen, &pb, NULL); } ps = pipe_screen->get_tex_surface(pipe_screen, pt, 0, 0, 0, PIPE_BUFFER_USAGE_GPU_WRITE); -- cgit v1.2.3 From 33d798c4eab57293336082c7d011aa27af693bbb Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 2 Feb 2009 15:39:30 -0800 Subject: r300: Move some registers around. This fixes r500 hangs. --- src/gallium/drivers/r300/r300_cs_inlines.h | 2 ++ src/gallium/drivers/r300/r300_surface.c | 11 ++++------- 2 files changed, 6 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h index aa0e647008..71e6623699 100644 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -27,8 +27,10 @@ #ifdef R300_CS_H #define R300_PACIFY do { \ + OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); \ OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | \ (1 << 18) | (1 << 31)); \ + OUT_CS_REG(R300_SC_SCREENDOOR, 0xffffff); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 3ffaee54b6..4bccdbca29 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -151,9 +151,7 @@ OUT_CS_REG(0x4F30, 0x00000000); OUT_CS_REG(0x4F34, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); -OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000); R300_PACIFY; -OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x21030003); OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); @@ -263,9 +261,7 @@ OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); -OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000); R300_PACIFY; -OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); /* XXX translate these back into normal instructions */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); @@ -293,7 +289,8 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); -OUT_CS_REG(R300_RB3D_COLORPITCH0, (w >> 1) | R300_COLOR_TILE_ENABLE | +/* XXX this should not be so rigid */ +OUT_CS_REG(R300_RB3D_COLORPITCH0, (w / 4) | R300_COLOR_TILE_ENABLE | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ @@ -311,8 +308,8 @@ OUT_CS_32F(b); OUT_CS_32F(1.0); /* XXX figure out why this is 0xA and not 0x2 */ -/* XXX OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); -OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, +OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); +/* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */ R300_PACIFY; -- cgit v1.2.3 From fa3c59136e9dd788ee7d3689b6cb89dd27040a9e Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 2 Feb 2009 16:13:41 -0800 Subject: r300: Take care of some XXXes. --- src/gallium/drivers/r300/r300_chipset.c | 3 ++- src/gallium/drivers/r300/r300_screen.c | 11 +++++------ src/gallium/drivers/r300/r300_winsys.h | 1 - 3 files changed, 7 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 4c84be26ef..b0a7fe7d21 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -337,7 +337,8 @@ void r300_parse_chipset(struct r300_capabilities* caps) break; default: - /* XXX not an r300?! */ + debug_printf("r300: Warning: Unknown chipset 0x%x\n", + caps->pci_id); break; } diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 99dcf38f43..8e77e0ddd9 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -81,12 +81,11 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) /* IN THEORY */ return 0; case PIPE_CAP_TWO_SIDED_STENCIL: - /* IN THEORY */ - /* if (r300screen->is_r500) { - * return 1; - * } else { - * return 0; - * } */ + if (r300screen->is_r500) { + return 1; + } else { + return 0; + } return 0; case PIPE_CAP_GLSL: /* IN THEORY */ diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index 867d65b7de..5a3a212892 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -64,7 +64,6 @@ struct r300_winsys { int line); /* Write a dword to the command buffer. */ - /* XXX is this an okay name for this handle? */ void (*write_cs_dword)(struct radeon_cs* cs, uint32_t dword); /* Write a relocated dword to the command buffer. */ -- cgit v1.2.3 From 3aabfa46083daf60859bb26b65568de4cf40915f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 2 Feb 2009 16:39:43 -0800 Subject: r300: Clear up XXX in r300_state. --- src/gallium/drivers/r300/r300_state.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 96fdce903e..37770cd5c6 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -56,7 +56,7 @@ static uint32_t translate_blend_function(int blend_func) { case PIPE_BLEND_MAX: return R300_COMB_FCN_MAX; default: - /* XXX should be unreachable, handle this */ + debug_printf("r300: Unknown blend function %d\n", blend_func); break; } return 0; @@ -102,7 +102,7 @@ static uint32_t translate_blend_factor(int blend_fact) { case PIPE_BLENDFACTOR_INV_SRC1_COLOR: case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: */ default: - /* XXX the mythical 0x16 blend factor! */ + debug_printf("r300: Unknown blend factor %d\n", blend_fact); break; } return 0; @@ -231,7 +231,8 @@ static uint32_t translate_depth_stencil_function(int zs_func) { case PIPE_FUNC_ALWAYS: return R300_ZS_ALWAYS; default: - /* XXX shouldn't be reachable */ + debug_printf("r300: Unknown depth/stencil function %d\n", + zs_func); break; } return 0; @@ -256,7 +257,7 @@ static uint32_t translate_stencil_op(int s_op) { case PIPE_STENCIL_OP_INVERT: return R300_ZS_INVERT; default: - /* XXX shouldn't be reachable */ + debug_printf("r300: Unknown stencil op %d", s_op); break; } return 0; @@ -281,7 +282,7 @@ static uint32_t translate_alpha_function(int alpha_func) { case PIPE_FUNC_ALWAYS: return R300_FG_ALPHA_FUNC_ALWAYS; default: - /* XXX shouldn't be reachable */ + debug_printf("r300: Unknown alpha function %d", alpha_func); break; } return 0; @@ -557,7 +558,7 @@ static uint32_t translate_wrap(int wrap) { case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED; default: - /* XXX handle this? */ + debug_printf("r300: Unknown texture wrap %d", wrap); return 0; } } @@ -572,7 +573,7 @@ static uint32_t translate_tex_filters(int min, int mag, int mip) { case PIPE_TEX_FILTER_ANISO: retval |= R300_TX_MIN_FILTER_ANISO; default: - /* XXX WTF?! */ + debug_printf("r300: Unknown texture filter %d", min); break; } switch (mag) { @@ -583,7 +584,7 @@ static uint32_t translate_tex_filters(int min, int mag, int mip) { case PIPE_TEX_FILTER_ANISO: retval |= R300_TX_MAG_FILTER_ANISO; default: - /* XXX WTF?! */ + debug_printf("r300: Unknown texture filter %d", mag); break; } switch (mip) { @@ -594,7 +595,7 @@ static uint32_t translate_tex_filters(int min, int mag, int mip) { case PIPE_TEX_MIPFILTER_LINEAR: retval |= R300_TX_MIN_FILTER_MIP_LINEAR; default: - /* XXX WTF?! */ + debug_printf("r300: Unknown texture filter %d", mip); break; } -- cgit v1.2.3 From e1b04da9b35aad1f474f7396f206a7c124c6859b Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Tue, 3 Feb 2009 02:58:51 +0100 Subject: r300: fix compiler/linker errors --- src/gallium/drivers/r300/r300_chipset.c | 1 + src/gallium/drivers/r300/r300_screen.c | 2 +- src/gallium/drivers/r300/r300_state.c | 1 + src/gallium/drivers/r300/r300_surface.c | 4 ++-- 4 files changed, 5 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index b0a7fe7d21..7def62422a 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -21,6 +21,7 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include "r300_chipset.h" +#include "pipe/p_debug.h" /* r300_chipset: A file all to itself for deducing the various properties of * Radeons. */ diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 8e77e0ddd9..fd916fadbe 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -81,7 +81,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) /* IN THEORY */ return 0; case PIPE_CAP_TWO_SIDED_STENCIL: - if (r300screen->is_r500) { + if (r300screen->caps->is_r500) { return 1; } else { return 0; diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 37770cd5c6..6bb8379dd5 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -22,6 +22,7 @@ #include "util/u_math.h" #include "util/u_pack_color.h" +#include "pipe/p_debug.h" #include "r300_context.h" #include "r300_reg.h" diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 4bccdbca29..e03f3de371 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -52,7 +52,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } -BEGIN_CS((caps->is_r500) ? 300 : 322); +BEGIN_CS((caps->is_r500) ? 309 : 322); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -289,7 +289,7 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); -/* XXX this should not be so rigid */ +/* XXX this should not be so rigid and it still doesn't work right */ OUT_CS_REG(R300_RB3D_COLORPITCH0, (w / 4) | R300_COLOR_TILE_ENABLE | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); -- cgit v1.2.3 From e5018a5675603ec26e833bc0808e4150a6bba16a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 2 Feb 2009 20:33:57 -0800 Subject: r300: Add stubs for swtcl immediate emit. --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_context.c | 1 + src/gallium/drivers/r300/r300_swtcl_emit.c | 106 +++++++++++++++++++++++++++++ 3 files changed, 108 insertions(+) create mode 100644 src/gallium/drivers/r300/r300_swtcl_emit.c (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 1d61b31605..8906d1227a 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -12,6 +12,7 @@ C_SOURCES = \ r300_screen.c \ r300_state.c \ r300_surface.c \ + r300_swtcl_emit.c \ r300_texture.c include ../../Makefile.template diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index e63e1278bf..7b605ae87a 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -50,6 +50,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.clear = r300_clear; r300->draw = draw_create(); + /*XXX draw_set_rasterize_stage(r300->draw, r300_draw_swtcl_stage(r300));*/ r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); r300->scissor_state = CALLOC_STRUCT(r300_scissor_state); diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c new file mode 100644 index 0000000000..98340a7a7c --- /dev/null +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -0,0 +1,106 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "draw/draw_pipe.h" +#include "util/u_memory.h" + +#include "r300_context.h" +#include "r300_reg.h" + +/* r300_swtcl_emit: Primitive vertex emission using an immediate + * vertex buffer and no HW TCL. */ + +struct swtcl_stage { + /* Parent class */ + struct draw_stage draw; + + struct r300_context* r300; +}; + +static INLINE struct swtcl_stage* swtcl_stage(struct draw_stage* draw) { + return (struct swtcl_stage*)draw; +} + +static INLINE void r300_emit_prim(struct draw_stage* draw, + struct prim_header* prim, + unsigned hwprim, + unsigned count) +{ + struct r300_context* r300 = swtcl_stage(draw)->r300; +} + +/* Just as an aside... + * + * Radeons can do many more primitives: + * - Line strip + * - Triangle fan + * - Triangle strip + * - Line loop + * - Quads + * - Quad strip + * - Polygons + * + * The following were just the only ones in Draw. */ + +static void r300_emit_point(struct draw_stage* draw, struct prim_header* prim) +{ + r300_emit_prim(draw, prim, R300_VAP_VF_CNTL__PRIM_POINTS, 1); +} + +static void r300_emit_line(struct draw_stage* draw, struct prim_header* prim) +{ + r300_emit_prim(draw, prim, R300_VAP_VF_CNTL__PRIM_LINES, 2); +} + +static void r300_emit_tri(struct draw_stage* draw, struct prim_header* prim) +{ + r300_emit_prim(draw, prim, R300_VAP_VF_CNTL__PRIM_TRIANGLES, 3); +} + +static void r300_swtcl_flush(struct draw_stage* draw, unsigned flags) +{ +} + +static void r300_reset_stipple(struct draw_stage* draw) +{ + /* XXX */ +} + +static void r300_swtcl_destroy(struct draw_stage* draw) +{ + FREE(draw); +} + +struct draw_stage* r300_draw_swtcl_stage(struct r300_context* r300) +{ + struct swtcl_stage* swtcl = CALLOC_STRUCT(swtcl_stage); + + swtcl->r300 = r300; + swtcl->draw.point = r300_emit_point; + swtcl->draw.line = r300_emit_line; + swtcl->draw.tri = r300_emit_tri; + swtcl->draw.flush = r300_swtcl_flush; + swtcl->draw.reset_stipple_counter = r300_reset_stipple; + swtcl->draw.destroy = r300_swtcl_destroy; + + return &swtcl->draw; +} -- cgit v1.2.3 From f097465bb85d3ca212a23c2dcc9cf73988de9160 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 3 Feb 2009 22:55:30 -0800 Subject: r300: Moar swtcl emit. Still sucks, but getting there. --- src/gallium/drivers/r300/r300_swtcl_emit.c | 29 ++++++++++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index 98340a7a7c..f6e98d23e9 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -23,6 +23,7 @@ #include "draw/draw_pipe.h" #include "util/u_memory.h" +#include "r300_cs.h" #include "r300_context.h" #include "r300_reg.h" @@ -40,12 +41,34 @@ static INLINE struct swtcl_stage* swtcl_stage(struct draw_stage* draw) { return (struct swtcl_stage*)draw; } +static void r300_emit_vertex(struct r300_context* r300, + const struct vertex_header* vertex) +{ + /* XXX */ +} + static INLINE void r300_emit_prim(struct draw_stage* draw, struct prim_header* prim, unsigned hwprim, unsigned count) { struct r300_context* r300 = swtcl_stage(draw)->r300; + CS_LOCALS(r300); + int i; + + r300_emit_dirty_state(r300); + + /* XXX should be count * vtx size */ + BEGIN_CS(2 + count + 6); + OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, count)); + OUT_CS(hwprim | R300_PRIM_WALK_RING | + (count << R300_PRIM_NUM_VERTICES_SHIFT)); + + for (i = 0; i < count; i++) { + r300_emit_vertex(r300, prim->v[i]); + } + R300_PACIFY; + END_CS; } /* Just as an aside... @@ -63,17 +86,17 @@ static INLINE void r300_emit_prim(struct draw_stage* draw, static void r300_emit_point(struct draw_stage* draw, struct prim_header* prim) { - r300_emit_prim(draw, prim, R300_VAP_VF_CNTL__PRIM_POINTS, 1); + r300_emit_prim(draw, prim, R300_PRIM_TYPE_POINT, 1); } static void r300_emit_line(struct draw_stage* draw, struct prim_header* prim) { - r300_emit_prim(draw, prim, R300_VAP_VF_CNTL__PRIM_LINES, 2); + r300_emit_prim(draw, prim, R300_PRIM_TYPE_LINE, 2); } static void r300_emit_tri(struct draw_stage* draw, struct prim_header* prim) { - r300_emit_prim(draw, prim, R300_VAP_VF_CNTL__PRIM_TRIANGLES, 3); + r300_emit_prim(draw, prim, R300_PRIM_TYPE_TRI_LIST, 3); } static void r300_swtcl_flush(struct draw_stage* draw, unsigned flags) -- cgit v1.2.3 From 9f10b16790d7e4e224fc30cf105df944275d6353 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 4 Feb 2009 00:50:38 -0800 Subject: r300: A bit more cleanup and state handling. --- src/gallium/drivers/r300/r300_context.h | 20 +++++++++-------- src/gallium/drivers/r300/r300_state.c | 38 ++++++--------------------------- 2 files changed, 18 insertions(+), 40 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 0cb0ec20d5..e0aad66018 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -87,15 +87,17 @@ struct r300_scissor_state { struct r300_texture_state { }; -#define R300_NEW_BLEND 0x0001 -#define R300_NEW_BLEND_COLOR 0x0002 -#define R300_NEW_DSA 0x0004 -#define R300_NEW_FRAGMENT_SHADER 0x0008 -#define R300_NEW_RASTERIZER 0x0010 -#define R300_NEW_SAMPLER 0x0020 -#define R300_NEW_SCISSOR 0x2000 -#define R300_NEW_VERTEX_SHADER 0x4000 -#define R300_NEW_KITCHEN_SINK 0x7fff +#define R300_NEW_BLEND 0x000001 +#define R300_NEW_BLEND_COLOR 0x000002 +#define R300_NEW_DSA 0x000004 +#define R300_NEW_FRAMEBUFFERS 0x000008 +#define R300_NEW_FRAGMENT_SHADER 0x000010 +#define R300_NEW_RASTERIZER 0x000020 +#define R300_NEW_SAMPLER 0x000040 +#define R300_NEW_SCISSOR 0x004000 +#define R300_NEW_TEXTURE 0x008000 +#define R300_NEW_VERTEX_SHADER 0x800000 +#define R300_NEW_KITCHEN_SINK 0xffffff struct r300_texture { /* Parent class */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 6bb8379dd5..b4b50ce1a9 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -394,7 +394,7 @@ static void r300->framebuffer_state = *state; - /* XXX do we need to mark dirty state? */ + r300->dirty_state |= R300_NEW_FRAMEBUFFERS; } /* Create fragment shader state. */ @@ -428,31 +428,6 @@ static void r300_set_polygon_stipple(struct pipe_context* pipe, /* XXX */ } -#if 0 -struct pipe_rasterizer_state -{ - unsigned flatshade:1; - unsigned light_twoside:1; - unsigned fill_cw:2; /**< PIPE_POLYGON_MODE_x */ - unsigned fill_ccw:2; /**< PIPE_POLYGON_MODE_x */ - unsigned scissor:1; - unsigned poly_smooth:1; - unsigned poly_stipple_enable:1; - unsigned point_smooth:1; - unsigned point_sprite:1; - unsigned multisample:1; /* XXX maybe more ms state in future */ - unsigned line_smooth:1; - unsigned line_last_pixel:1; - unsigned bypass_clipping:1; - unsigned bypass_vs:1; /**< Skip the vertex shader. Note that the shader is - still needed though, to indicate inputs/outputs */ - unsigned origin_lower_left:1; /**< Is (0,0) the lower-left corner? */ - unsigned flatshade_first:1; /**< take color attribute from the first vertex of a primitive */ - unsigned gl_rasterization_rules:1; /**< enable tweaks for GL rasterization? */ - ubyte sprite_coord_mode[PIPE_MAX_SHADER_OUTPUTS]; /**< PIPE_SPRITE_COORD_ */ -}; -#endif - static INLINE int pack_float_16_6x(float f) { return ((int)(f * 6.0) & 0xffff); } @@ -693,15 +668,16 @@ static void r300_set_sampler_textures(struct pipe_context* pipe, if (r300->textures[i] != (struct r300_texture*)texture[i]) { pipe_texture_reference((struct pipe_texture**)&r300->textures[i], texture[i]); - /* XXX NEW_TEXTURE instead? */ - r300->dirty_state |= (R300_NEW_SAMPLER << i); + r300->dirty_state |= (R300_NEW_TEXTURE << i); } } for (i = count; i < 8; i++) { - /* XXX also state change? */ - pipe_texture_reference((struct pipe_texture**)&r300->textures[i], - NULL); + if (r300->textures[i]) { + pipe_texture_reference((struct pipe_texture**)&r300->textures[i], + NULL); + r300->dirty_state |= (R300_NEW_TEXTURE << i); + } } r300->texture_count = count; -- cgit v1.2.3 From fb8b794c69330924ad15083237b1a8a35eb62e31 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 4 Feb 2009 16:07:39 -0800 Subject: r300: Add shader state stubs. --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_context.h | 30 ++++++++++++++++++++---- src/gallium/drivers/r300/r300_state.c | 35 ++++++++++++++++++++++------ src/gallium/drivers/r300/r300_state_shader.c | 33 ++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_state_shader.h | 35 ++++++++++++++++++++++++++++ 5 files changed, 122 insertions(+), 12 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_state_shader.c create mode 100644 src/gallium/drivers/r300/r300_state_shader.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 8906d1227a..e83d943cd8 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -11,6 +11,7 @@ C_SOURCES = \ r300_flush.c \ r300_screen.c \ r300_state.c \ + r300_state_shader.c \ r300_surface.c \ r300_swtcl_emit.c \ r300_texture.c diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index e0aad66018..fb91c172f4 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -25,6 +25,7 @@ #include "draw/draw_context.h" #include "pipe/p_context.h" +#include "tgsi/tgsi_scan.h" #include "util/u_memory.h" #include "r300_clear.h" @@ -56,9 +57,6 @@ struct r300_dsa_state { uint32_t stencil_ref_bf; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */ }; -struct r300_fs_state { -}; - struct r300_rs_state { uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */ @@ -99,6 +97,28 @@ struct r300_texture_state { #define R300_NEW_VERTEX_SHADER 0x800000 #define R300_NEW_KITCHEN_SINK 0xffffff +/* The next several objects are not pure Radeon state; they inherit from + * various Gallium classes. */ + +struct r3xx_fragment_shader { + /* Parent class */ + struct pipe_shader_state state; + struct tgsi_shader_info info; + + /* Has this shader been translated yet? */ + boolean translated; +}; + +struct r300_fragment_shader { + /* Parent class */ + struct r3xx_fragment_shader shader; +}; + +struct r500_fragment_shader { + /* Parent class */ + struct r3xx_fragment_shader shader; +}; + struct r300_texture { /* Parent class */ struct pipe_texture tex; @@ -129,8 +149,8 @@ struct r300_context { struct r300_blend_color_state* blend_color_state; /* Depth, stencil, and alpha state. */ struct r300_dsa_state* dsa_state; - /* Fragment shader state. */ - struct r300_fs_state* fs_state; + /* Fragment shader. */ + struct r3xx_fragment_shader* fs; /* Framebuffer state. We currently don't need our own version of this. */ struct pipe_framebuffer_state framebuffer_state; /* Rasterizer state. */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index b4b50ce1a9..9392d72342 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -399,27 +399,48 @@ static void /* Create fragment shader state. */ static void* r300_create_fs_state(struct pipe_context* pipe, - const struct pipe_shader_state* state) + const struct pipe_shader_state* shader) { - struct r300_fs_state* fs = CALLOC_STRUCT(r300_fs_state); + struct r300_context* r300 = r300_context(pipe); + struct r3xx_fragment_shader* fs = NULL; + + if (r300_screen(r300->context.screen)->caps->is_r500) { + fs = + (struct r3xx_fragment_shader*)CALLOC_STRUCT(r500_fragment_shader); + } else { + fs = + (struct r3xx_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); + } + + /* Copy state directly into shader. */ + fs->state = *shader; return (void*)fs; } /* Bind fragment shader state. */ -static void r300_bind_fs_state(struct pipe_context* pipe, void* state) +static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) { struct r300_context* r300 = r300_context(pipe); + struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader; - r300->fs_state = (struct r300_fs_state*)state; + if (!fs->translated) { + if (r300_screen(r300->context.screen)->caps->is_r500) { + r500_translate_shader(r300, fs); + } else { + r300_translate_shader(r300, fs); + } + } + + r300->fs = fs; r300->dirty_state |= R300_NEW_FRAGMENT_SHADER; } -/* Delect fragment shader state. */ -static void r300_delete_fs_state(struct pipe_context* pipe, void* state) +/* Delete fragment shader state. */ +static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) { - FREE(state); + FREE(shader); } static void r300_set_polygon_stipple(struct pipe_context* pipe, diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c new file mode 100644 index 0000000000..e87172128f --- /dev/null +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -0,0 +1,33 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_state_shader.h" + +void r300_translate_shader(struct r300_context* r300, + struct r300_fragment_shader* fs) +{ +} + +void r500_translate_shader(struct r300_context* r300, + struct r500_fragment_shader* fs) +{ +} diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h new file mode 100644 index 0000000000..a20bd4276c --- /dev/null +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -0,0 +1,35 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_STATE_SHADER_H +#define R300_STATE_SHADER_H + +#include "r300_context.h" +#include "r300_screen.h" + +void r300_translate_shader(struct r300_context* r300, + struct r300_fragment_shader* fs); + +void r500_translate_shader(struct r300_context* r300, + struct r500_fragment_shader* fs); + +#endif /* R300_STATE_SHADER_H */ -- cgit v1.2.3 From be53dfa3b9ca4d1503fdbdf934569442175e30ef Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 5 Feb 2009 13:27:07 -0800 Subject: r300: Add framebuffer setup stub. --- src/gallium/drivers/r300/r300_emit.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index de5719db8d..c71b8d0b02 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -79,6 +79,22 @@ void r300_emit_dsa_state(struct r300_context* r300, END_CS; } +/* XXX add pitch, stride, z/stencil buf */ +void r300_emit_fb_state(struct r300_context* r300, + struct pipe_framebuffer_state* fb) +{ + CS_LOCALS(r300); + int i; + + BEGIN_CS((3 * fb->nr_cbufs) + 6); + for (i = 0; i < fb->nr_cbufs; i++) { + OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); + OUT_CS_RELOC(fb->cbufs[i]->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + } + R300_PACIFY; + END_CS; +} + void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) { struct r300_screen* r300screen = -- cgit v1.2.3 From 402d45d99b4533140aa706300da3154af2f376f0 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Thu, 5 Feb 2009 22:23:40 +0100 Subject: r300: working trivial/clear for r5xx --- src/gallium/drivers/r300/r300_surface.c | 4 ++-- src/gallium/drivers/r300/r300_texture.c | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index e03f3de371..3db013cd7e 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -290,8 +290,8 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX this should not be so rigid and it still doesn't work right */ -OUT_CS_REG(R300_RB3D_COLORPITCH0, (w / 4) | R300_COLOR_TILE_ENABLE | - R300_COLOR_FORMAT_ARGB8888); +debug_printf("Buffer width (stride): %d\n", dest->stride); +OUT_CS_REG(R300_RB3D_COLORPITCH0, (dest->stride >> 2) | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 537425c1e2..f9ad14f12b 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -44,11 +44,11 @@ static void r300_setup_miptree(struct r300_texture* tex) /* Radeons enjoy things in multiples of 32. */ /* XXX NPOT -> 64, not 32 */ - stride = (base->nblocksx[i] * base->block.size + 31) & ~31; + stride = (base->nblocksx[i] * base->block.size + 63) & ~63; size = stride * base->nblocksy[i] * base->depth[i]; /* XXX 64 for NPOT */ - tex->offset[i] = (tex->size + 31) & ~31; + tex->offset[i] = (tex->size + 63) & ~63; tex->size = tex->offset[i] + size; } } @@ -72,7 +72,7 @@ static struct pipe_texture* r300_setup_miptree(tex); - tex->buffer = screen->buffer_create(screen, 32, + tex->buffer = screen->buffer_create(screen, 63, PIPE_BUFFER_USAGE_PIXEL, tex->size); @@ -130,7 +130,7 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, surface->nblocksy = texture->nblocksy[level]; /* XXX save the actual stride instead plz kthnxbai */ surface->stride = - (texture->nblocksx[level] * texture->block.size + 31) & ~31; + (texture->nblocksx[level] * texture->block.size + 63) & ~63; surface->offset = offset; surface->usage = flags; surface->status = PIPE_SURFACE_STATUS_DEFINED; -- cgit v1.2.3 From 2e70971e4f1ac5278e9da67341e8c39518308d20 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 6 Feb 2009 01:59:26 -0800 Subject: r300: Clean up CS counting. --- src/gallium/drivers/r300/r300_cs.h | 1 + src/gallium/drivers/r300/r300_surface.c | 10 ++++++---- 2 files changed, 7 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 734ccb13d9..385b61a096 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -107,6 +107,7 @@ static uint32_t pack_float_32(float f) assert(bo); \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ + cs_count -= 2; \ } while (0) #define END_CS do { \ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 3db013cd7e..1ed4a4e3bc 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -39,8 +39,8 @@ static void r300_surface_fill(struct pipe_context* pipe, g = (float)((color >> 8) & 0xff) / 255.0f; b = (float)((color >> 0) & 0xff) / 255.0f; debug_printf("r300: Filling surface %p at (%d,%d)," - " dimensions %dx%d, color 0x%x\n", - dest, x, y, w, h, color); + " dimensions %dx%d (stride %d), color 0x%x\n", + dest, x, y, w, h, dest->stride, color); /* Fallback? */ if (0) { @@ -52,7 +52,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } -BEGIN_CS((caps->is_r500) ? 309 : 322); +BEGIN_CS((caps->is_r500) ? 309 : 280); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -273,11 +273,14 @@ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +R300_PACIFY; +END_CS; r300_emit_blend_state(r300, &blend_clear_state); r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); +BEGIN_CS(36); R300_PACIFY; /* Flush colorbuffer and blend caches. */ OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, @@ -290,7 +293,6 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX this should not be so rigid and it still doesn't work right */ -debug_printf("Buffer width (stride): %d\n", dest->stride); OUT_CS_REG(R300_RB3D_COLORPITCH0, (dest->stride >> 2) | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ -- cgit v1.2.3 From ea3398cf3395fd36ac6edc717f2680361ac5e239 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 8 Feb 2009 01:01:26 -0800 Subject: r300: Update to match pipe_surface changes. --- src/gallium/drivers/r300/r300_context.h | 4 ++++ src/gallium/drivers/r300/r300_emit.c | 4 +++- src/gallium/drivers/r300/r300_screen.c | 6 ++++-- src/gallium/drivers/r300/r300_surface.c | 3 ++- src/gallium/drivers/r300/r300_texture.c | 4 ---- 5 files changed, 13 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index fb91c172f4..376c57639d 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -179,8 +179,12 @@ static struct r300_context* r300_context(struct pipe_context* context) { void r300_init_state_functions(struct r300_context* r300); void r300_init_surface_functions(struct r300_context* r300); +/* Fun with includes: r300_winsys also declares this prototype. + * We'll just step out in that case... */ +#ifndef R300_WINSYS_H struct pipe_context* r300_create_context(struct pipe_screen* screen, struct pipe_winsys* winsys, struct r300_winsys* r300_winsys); +#endif #endif /* R300_CONTEXT_H */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index c71b8d0b02..585a9e729d 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -84,12 +84,14 @@ void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb) { CS_LOCALS(r300); + struct r300_texture* tex; int i; BEGIN_CS((3 * fb->nr_cbufs) + 6); for (i = 0; i < fb->nr_cbufs; i++) { + tex = (struct r300_texture*)fb->cbufs[i]->texture; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); - OUT_CS_RELOC(fb->cbufs[i]->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); } R300_PACIFY; END_CS; diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index fd916fadbe..8ed66a1660 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -214,7 +214,8 @@ static void* r300_surface_map(struct pipe_screen* screen, struct pipe_surface* surface, unsigned flags) { - char* map = pipe_buffer_map(screen, surface->buffer, flags); + struct r300_texture* tex = (struct r300_texture*)surface->texture; + char* map = pipe_buffer_map(screen, tex->buffer, flags); if (!map) { return NULL; @@ -226,7 +227,8 @@ static void* r300_surface_map(struct pipe_screen* screen, static void r300_surface_unmap(struct pipe_screen* screen, struct pipe_surface* surface) { - pipe_buffer_unmap(screen, surface->buffer); + struct r300_texture* tex = (struct r300_texture*)surface->texture; + pipe_buffer_unmap(screen, tex->buffer); } static void r300_destroy_screen(struct pipe_screen* pscreen) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 1ed4a4e3bc..bbd2ade64a 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -33,6 +33,7 @@ static void r300_surface_fill(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); struct r300_capabilities* caps = ((struct r300_screen*)pipe->screen)->caps; + struct r300_texture* tex = (struct r300_texture*)dest->texture; int i; float r, g, b, a; r = (float)((color >> 16) & 0xff) / 255.0f; @@ -291,7 +292,7 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); -OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); +OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX this should not be so rigid and it still doesn't work right */ OUT_CS_REG(R300_RB3D_COLORPITCH0, (dest->stride >> 2) | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index f9ad14f12b..7f57656a78 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -121,7 +121,6 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, if (surface) { surface->refcount = 1; pipe_texture_reference(&surface->texture, texture); - pipe_buffer_reference(screen, &surface->buffer, tex->buffer); surface->format = texture->format; surface->width = texture->width[level]; surface->height = texture->height[level]; @@ -148,7 +147,6 @@ static void r300_tex_surface_release(struct pipe_screen* screen, if (s->refcount <= 0) { pipe_texture_reference(&s->texture, NULL); - pipe_buffer_reference(screen, &s->buffer, NULL); FREE(s); } @@ -180,8 +178,6 @@ static struct pipe_texture* /* XXX tex->stride = *stride; */ - pipe_buffer_reference(screen, &tex->buffer, buffer); - return (struct pipe_texture*)tex; } -- cgit v1.2.3 From 360e700a43ce3914d7f336593f380562ca190898 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 8 Feb 2009 01:07:03 -0800 Subject: r300: Add SW TCL paths for clear. This should make things work for people on RSxxx chipsets. --- src/gallium/drivers/r300/r300_surface.c | 61 +++++++++++++++++++++++---------- 1 file changed, 42 insertions(+), 19 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index bbd2ade64a..1e1f96a7f9 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -153,7 +153,17 @@ OUT_CS_REG(0x4F34, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); R300_PACIFY; -OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x21030003); +if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); +} else { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); +} OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); @@ -173,7 +183,11 @@ OUT_CS_32F((float)y); OUT_CS_32F(1.0); OUT_CS_32F(0.0); -OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000); +if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE | + R300_PS_UCP_MODE_CLIP_AS_TRIFAN); +} + OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); @@ -257,23 +271,32 @@ if (caps->is_r500) { } /* XXX these magic numbers should be explained when * this becomes a cached state object */ -OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); -OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); -OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); -OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); -R300_PACIFY; -/* XXX translate these back into normal instructions */ -OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); -OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); -OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_CNTL, 0xA | + (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); + OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); + R300_PACIFY; + /* XXX translate these back into normal instructions */ + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); +} else { + OUT_CS_REG(R300_VAP_CNTL, 0xA | + (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); +} R300_PACIFY; END_CS; -- cgit v1.2.3 From 5425c4aa28721072085f128e902f5679ba31a963 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 8 Feb 2009 02:03:29 -0800 Subject: r300: Accidentally removed a pipe_buffer_reference that should be there. --- src/gallium/drivers/r300/r300_texture.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 7f57656a78..ff812c09f8 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -178,6 +178,8 @@ static struct pipe_texture* /* XXX tex->stride = *stride; */ + pipe_buffer_reference(screen, &tex->buffer, buffer); + return (struct pipe_texture*)tex; } -- cgit v1.2.3 From 08e324fff3b295bfd5b176ed1242ad838c6d5f25 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Feb 2009 16:52:15 -0800 Subject: r300-gallium: Fix typo in texture buffer size request. --- src/gallium/drivers/r300/r300_texture.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index ff812c09f8..bd35e089f9 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -72,7 +72,7 @@ static struct pipe_texture* r300_setup_miptree(tex); - tex->buffer = screen->buffer_create(screen, 63, + tex->buffer = screen->buffer_create(screen, 64, PIPE_BUFFER_USAGE_PIXEL, tex->size); -- cgit v1.2.3 From affe0311fa60489e56b854c09f713fae024a0b00 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Feb 2009 16:53:06 -0800 Subject: r300-gallium: Add r500 passthrough shader assembly. This allows a simple passthrough fragment shader to be provided on r500. --- src/gallium/drivers/r300/r300_context.h | 16 ++++++++++++ src/gallium/drivers/r300/r300_cs_inlines.h | 5 ++++ src/gallium/drivers/r300/r300_emit.c | 33 +++++++++++++++++++++++++ src/gallium/drivers/r300/r300_reg.h | 1 + src/gallium/drivers/r300/r300_state.c | 5 ++++ src/gallium/drivers/r300/r300_state_shader.c | 37 ++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_state_shader.h | 1 + 7 files changed, 98 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 376c57639d..a29201eaba 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -107,6 +107,12 @@ struct r3xx_fragment_shader { /* Has this shader been translated yet? */ boolean translated; + + /* Number of used instructions */ + int instruction_count; + + /* Pixel stack size */ + int stack_size; }; struct r300_fragment_shader { @@ -117,6 +123,16 @@ struct r300_fragment_shader { struct r500_fragment_shader { /* Parent class */ struct r3xx_fragment_shader shader; + + /* Machine instructions */ + struct { + uint32_t inst0; + uint32_t inst1; + uint32_t inst2; + uint32_t inst3; + uint32_t inst4; + uint32_t inst5; + } instructions[256]; /*< XXX magic number */ }; struct r300_texture { diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h index 71e6623699..b7c04fde1a 100644 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -26,6 +26,11 @@ #ifdef R300_CS_H +#define RADEON_ONE_REG_WR (1 << 15) + +#define CS_OUT_ONE_REG(register, count) \ + OUT_CS_REG_SEQ(register, (count | RADEON_ONE_REG_WR)) + #define R300_PACIFY do { \ OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); \ OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | \ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 585a9e729d..4d1b10de23 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -79,6 +79,39 @@ void r300_emit_dsa_state(struct r300_context* r300, END_CS; } +void r300_emit_fragment_shader(struct r300_context* r300, + struct r300_fragment_shader* shader) +{ + CS_LOCALS(r300); +} + +void r500_emit_fragment_shader(struct r300_context* r300, + struct r500_fragment_shader* shader) +{ + CS_LOCALS(r300); + int i = 0; + + BEGIN_CS(8 + (shader->shader.instruction_count * 6) + 6); + OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); + OUT_CS_REG(R500_US_PIXSIZE, shader->shader.stack_size); + OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | + R500_US_CODE_END_ADDR(shader->shader.instruction_count)); + + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR); + OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, + shader->shader.instruction_count * 6); + for (i = 0; i < shader->shader.instruction_count; i++) { + CS_OUT(shader->instructions[i].inst0); + CS_OUT(shader->instructions[i].inst1); + CS_OUT(shader->instructions[i].inst2); + CS_OUT(shader->instructions[i].inst3); + CS_OUT(shader->instructions[i].inst4); + CS_OUT(shader->instructions[i].inst5); + } + R300_PACIFY; + END_CS; +} + /* XXX add pitch, stride, z/stencil buf */ void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb) diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index dbd0cc28e2..9e86423efb 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -2973,6 +2973,7 @@ enum { # define R500_INST_RGB_OMASK_R (1 << 15) # define R500_INST_RGB_OMASK_G (1 << 16) # define R500_INST_RGB_OMASK_B (1 << 17) +# define R500_INST_RGB_OMASK_RGB (7 << 15) # define R500_INST_ALPHA_OMASK (1 << 18) # define R500_INST_RGB_CLAMP (1 << 19) # define R500_INST_ALPHA_CLAMP (1 << 20) diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 9392d72342..5fe2b8ea3e 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -432,6 +432,11 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) } } + if (!fs->translated) { + debug_printf("r300: Couldn't assemble fragment shader...\n"); + /* XXX exit here */ + } + r300->fs = fs; r300->dirty_state |= R300_NEW_FRAGMENT_SHADER; diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index e87172128f..710b7ee0a6 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -22,12 +22,49 @@ #include "r300_state_shader.h" +void r300_make_passthrough_fragment_shader(struct r300_fragment_shader* fs) +{ +} + +void r500_make_passthrough_fragment_shader(struct r500_fragment_shader* fs) +{ + fs->shader.instruction_count = 1; + fs->shader.stack_size = 0; + + fs->instructions[0].inst0 = R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | + R500_INST_LAST | + R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; + fs->instructions[0].inst1 = + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST; + fs->instructions[0].inst2 = + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST; + fs->instructions[0].inst3 = + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B; + fs->instructions[0].inst4 = + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A; + fs->instructions[0].inst5 = + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0; + + fs->shader.translated = true; +} + void r300_translate_shader(struct r300_context* r300, struct r300_fragment_shader* fs) { + r300_make_passthrough_fragment_shader(fs); } void r500_translate_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { + r500_make_passthrough_fragment_shader(fs); } diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index a20bd4276c..030ecaa56e 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -24,6 +24,7 @@ #define R300_STATE_SHADER_H #include "r300_context.h" +#include "r300_reg.h" #include "r300_screen.h" void r300_translate_shader(struct r300_context* r300, -- cgit v1.2.3 From f2a36d334c6fbe3787d44c6203f54ccb184fb923 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Fri, 13 Feb 2009 02:34:34 +0100 Subject: r300: minor fixes and clear up some surface_fill Signed-off-by: Corbin Simpson --- src/gallium/drivers/r300/r300_chipset.c | 4 +- src/gallium/drivers/r300/r300_cs_inlines.h | 2 - src/gallium/drivers/r300/r300_surface.c | 565 +++++++++++++++-------------- 3 files changed, 291 insertions(+), 280 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 7def62422a..794fa2b9b8 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -343,6 +343,6 @@ void r300_parse_chipset(struct r300_capabilities* caps) break; } - /* Force off TCL for now */ - caps->has_tcl = FALSE; + /* XXX SW TCL is broken so no forcing it off right now + caps->has_tcl = FALSE; */ } diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h index b7c04fde1a..2ca907dd90 100644 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -32,10 +32,8 @@ OUT_CS_REG_SEQ(register, (count | RADEON_ONE_REG_WR)) #define R300_PACIFY do { \ - OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); \ OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | \ (1 << 18) | (1 << 31)); \ - OUT_CS_REG(R300_SC_SCREENDOOR, 0xffffff); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 1e1f96a7f9..4bd8a25460 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -1,5 +1,6 @@ /* * Copyright 2008 Corbin Simpson + * Joakim Sindholt * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -53,295 +54,307 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } -BEGIN_CS((caps->is_r500) ? 309 : 280); -R300_PACIFY; -OUT_CS_REG(R300_TX_INVALTAGS, 0x0); -R300_PACIFY; -/* Flush PVS. */ -OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); - -OUT_CS_REG(R300_SE_VTE_CNTL, R300_VPORT_X_SCALE_ENA | - R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | - R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | - R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT); -/* Vertex size. */ -OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); -/* Max and min vertex index clamp. */ -OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF); -OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); -/* XXX endian */ -OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); -OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); -/* XXX magic number not in r300_reg */ -OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); -OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0); -OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); -OUT_CS_32F(1.0); -OUT_CS_32F(1.0); -OUT_CS_32F(1.0); -OUT_CS_32F(1.0); -/* XXX is this too long? */ -OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xFFFF); -OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | - R300_GB_LINE_STUFF_ENABLE | R300_GB_TRIANGLE_STUFF_ENABLE); -/* XXX more magic numbers */ -OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); -OUT_CS_REG(R300_GB_MSPOS1, 0x66666666); -/* XXX why doesn't classic Mesa write the number of pipes, too? */ -OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16); -OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); -OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); -/* XXX point tex stuffing */ -OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); -OUT_CS_32F(0.0); -OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1); -OUT_CS_32F(1.0); -OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | - (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); -/* XXX should this be related to the actual point size? */ -OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 | - (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT)); -/* XXX this big chunk should be refactored into rs_state */ -OUT_CS_REG(R300_GA_LINE_CNTL, 0x00030006); -OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, 0x3BAAAAAB); -OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, 0x00000000); -OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); -OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); -OUT_CS_REG(R300_GA_ENHANCE, 0x00000002); -OUT_CS_REG(R300_GA_COLOR_CONTROL, 0x0003AAAA); -OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000); -OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000); -OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000); -OUT_CS_REG(R300_GA_ROUND_MODE, 0x00000001); -OUT_CS_REG(R300_GA_OFFSET, 0x00000000); -OUT_CS_REG(R300_GA_FOG_SCALE, 0x3DBF1412); -OUT_CS_REG(R300_GA_FOG_OFFSET, 0x00000000); -OUT_CS_REG(R300_SU_TEX_WRAP, 0x00000000); -OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_SCALE, 0x00000000); -OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_OFFSET, 0x00000000); -OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_SCALE, 0x00000000); -OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_OFFSET, 0x00000000); -OUT_CS_REG(R300_SU_POLY_OFFSET_ENABLE, 0x00000000); -OUT_CS_REG(R300_SU_CULL_MODE, 0x00000000); -OUT_CS_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF); -OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); -OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); -OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); -OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); -OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002); -OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); -OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); -OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x00000000); -OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); -OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); -OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); -OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); - -/* XXX: Oh the wonderful unknown */ -OUT_CS_REG_SEQ(0x4E54, 8); -for (i = 0; i < 8; i++) - OUT_CS(0x00000000); -OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); -OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); -OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); -OUT_CS_REG(R300_ZB_FORMAT, 0x00000002); -OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); -OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); -OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000); -OUT_CS_REG(0x4F30, 0x00000000); -OUT_CS_REG(0x4F34, 0x00000000); -OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); -OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); -R300_PACIFY; -if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, - (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | - ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) | - R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); -} else { - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, - (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | - ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | - R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); -} -OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); -OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); -OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); -OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); -OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); -OUT_CS_REG(R300_VAP_VTX_SIZE, 0x00000008); -OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); -OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); -OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); -OUT_CS_REG(R300_TX_ENABLE, 0x0); -/* XXX viewport setup */ -OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); -OUT_CS_32F(1.0); -OUT_CS_32F((float)x); -OUT_CS_32F(1.0); -OUT_CS_32F((float)y); -OUT_CS_32F(1.0); -OUT_CS_32F(0.0); - -if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE | - R300_PS_UCP_MODE_CLIP_AS_TRIFAN); -} + BEGIN_CS((caps->is_r500 ? 222 : 213) + (caps->has_tcl ? 34 : 4)); + R300_PACIFY; + OUT_CS_REG(R300_TX_INVALTAGS, 0x0); + R300_PACIFY; + /* Flush PVS. */ + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); -OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | - ((w * 6) << R300_POINTSIZE_X_SHIFT)); + OUT_CS_REG(R300_SE_VTE_CNTL, R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | + R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT); + /* Vertex size. */ + OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); + /* Max and min vertex index clamp. */ + OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF); + OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); + /* XXX endian */ + OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); + /* XXX magic number not in r300_reg */ + OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); + OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0); + OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + /* XXX is this too long? */ + OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xFFFF); + OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | + R300_GB_LINE_STUFF_ENABLE | R300_GB_TRIANGLE_STUFF_ENABLE); + /* XXX more magic numbers */ + OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); + OUT_CS_REG(R300_GB_MSPOS1, 0x66666666); + /* XXX why doesn't classic Mesa write the number of pipes, too? */ + OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_ENABLE | + R300_GB_TILE_SIZE_16); + OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); + OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); + /* XXX point tex stuffing */ + OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); + OUT_CS_32F(0.0); + OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1); + OUT_CS_32F(1.0); + OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | + (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); + /* XXX should this be related to the actual point size? */ + OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 | + (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT)); + /* XXX this big chunk should be refactored into rs_state */ + OUT_CS_REG(R300_GA_LINE_CNTL, 0x00030006); + OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, 0x3BAAAAAB); + OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, 0x00000000); + OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); + OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); + OUT_CS_REG(R300_GA_ENHANCE, 0x00000002); + OUT_CS_REG(R300_GA_COLOR_CONTROL, 0x0003AAAA); + OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000); + OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000); + OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000); + OUT_CS_REG(R300_GA_ROUND_MODE, 0x00000001); + OUT_CS_REG(R300_GA_OFFSET, 0x00000000); + OUT_CS_REG(R300_GA_FOG_SCALE, 0x3DBF1412); + OUT_CS_REG(R300_GA_FOG_OFFSET, 0x00000000); + OUT_CS_REG(R300_SU_TEX_WRAP, 0x00000000); + OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_SCALE, 0x00000000); + OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_OFFSET, 0x00000000); + OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_SCALE, 0x00000000); + OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_OFFSET, 0x00000000); + OUT_CS_REG(R300_SU_POLY_OFFSET_ENABLE, 0x00000000); + OUT_CS_REG(R300_SU_CULL_MODE, 0x00000000); + OUT_CS_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF); + OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); + OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); + OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); + OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); + OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002); + OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); + OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); + OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x00000000); + OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); + OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); + OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); + OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); -/* XXX RS block and fp setup */ -if (caps->is_r500) { - OUT_CS_REG_SEQ(R500_RS_IP_0, 8); + /* XXX: Oh the wonderful unknown. + * Not writing these 8 regs seems to make no difference at all and seeing + * as how they're not documented, we should leave them out for now. + OUT_CS_REG_SEQ(0x4E54, 8); for (i = 0; i < 8; i++) { - /* I like the operator macros more than the shift macros... */ - OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | - (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | - (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | - (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); + OUT_CS(0x00000000); + } */ + OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); + OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); + OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); + OUT_CS_REG(R300_ZB_FORMAT, 0x00000002); + OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); + OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); + OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000); + OUT_CS_REG(0x4F30, 0x00000000); + OUT_CS_REG(0x4F34, 0x00000000); + OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); + OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); + R300_PACIFY; + if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); + } else { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); } - /* XXX */ - OUT_CS_REG_SEQ(R300_RS_COUNT, 2); - OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS(0x0); - OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); + OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); + OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); + OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); + OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); + OUT_CS_REG(R300_VAP_VTX_SIZE, 0x00000008); + OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); + OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); + OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); + OUT_CS_REG(R300_TX_ENABLE, 0x0); + /* XXX viewport setup */ + OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); + OUT_CS_32F(1.0); + OUT_CS_32F((float)x); + OUT_CS_32F(1.0); + OUT_CS_32F((float)y); + OUT_CS_32F(1.0); + OUT_CS_32F(0.0); - OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); - OUT_CS_REG(R500_US_PIXSIZE, 0x00000000); - OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | - R500_US_CODE_END_ADDR(1)); - OUT_CS_REG(R500_US_CODE_RANGE, R500_US_CODE_RANGE_ADDR(0) | - R500_US_CODE_RANGE_SIZE(1)); - OUT_CS_REG(R500_US_CODE_OFFSET, R500_US_CODE_OFFSET_ADDR(0)); - R300_PACIFY; - OUT_CS_REG(R500_GA_US_VECTOR_INDEX, - 0 | R500_GA_US_VECTOR_INDEX_TYPE_INSTR); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST | - R500_INST_RGB_OMASK_R | R500_INST_RGB_OMASK_G | R500_INST_RGB_OMASK_B | - R500_INST_ALPHA_OMASK | R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0); -} else { - OUT_CS_REG_SEQ(R300_RS_IP_0, 8); - for (i = 0; i < 8; i++) { - OUT_CS(R300_RS_SEL_T(R300_RS_SEL_K0) | - R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1)); + if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE | + R300_PS_UCP_MODE_CLIP_AS_TRIFAN); } - /* XXX */ - OUT_CS_REG_SEQ(R300_RS_COUNT, 2); - OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS(1); - OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); - /* XXX magic numbers */ - OUT_CS_REG(R300_US_CONFIG, 0); - OUT_CS_REG(R300_US_PIXSIZE, 2); - OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); - OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x50A80); - OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); - OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x40889); - OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1000000); - OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); - OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); -} -/* XXX these magic numbers should be explained when - * this becomes a cached state object */ -if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_CNTL, 0xA | - (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | - (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); - OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); - OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); - OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); + OUT_CS_REG(R300_GA_POINT_SIZE, + ((h * 6) & R300_POINTSIZE_Y_MASK) | + ((w * 6) << R300_POINTSIZE_X_SHIFT)); + + /* XXX RS block and fp setup */ + if (caps->is_r500) { + /* XXX We seem to be in disagreement about how many of these we have + * RS:RS_IP_[0-15] [R/W] 32 bits Access: 8/16/32 MMReg:0x4074-0x40b0 + * Now that's from the docs. I don't care what the mesa driver says */ + OUT_CS_REG_SEQ(R500_RS_IP_0, 16); + for (i = 0; i < 16; i++) { + OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | + (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); + } + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + OUT_CS(0x00000000); + OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); + + OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); + OUT_CS_REG(R500_US_PIXSIZE, 0x00000000); + OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | + R500_US_CODE_END_ADDR(1)); + OUT_CS_REG(R500_US_CODE_RANGE, R500_US_CODE_RANGE_ADDR(0) | + R500_US_CODE_RANGE_SIZE(1)); + OUT_CS_REG(R500_US_CODE_OFFSET, R500_US_CODE_OFFSET_ADDR(0)); + R300_PACIFY; + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, + 0 | R500_GA_US_VECTOR_INDEX_TYPE_INSTR); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_R | R500_INST_RGB_OMASK_G | + R500_INST_RGB_OMASK_B | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | + R500_ALPHA_ADDR1_CONST | R500_ALPHA_ADDR2(0) | + R500_ALPHA_ADDR2_CONST); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0); + } else { + OUT_CS_REG_SEQ(R300_RS_IP_0, 8); + for (i = 0; i < 8; i++) { + OUT_CS(R300_RS_SEL_T(R300_RS_SEL_K0) | + R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1)); + } + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); + /* XXX Shouldn't this be 0? */ + OUT_CS(1); + OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); + + /* XXX magic numbers */ + OUT_CS_REG(R300_US_CONFIG, 0); + OUT_CS_REG(R300_US_PIXSIZE, 2); + OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); + OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x50A80); + OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); + OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x40889); + OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1000000); + OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); + OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); + } + /* XXX these magic numbers should be explained when + * this becomes a cached state object */ + if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_CNTL, 0xA | + (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); + OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); + R300_PACIFY; + /* XXX translate these back into normal instructions */ + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); + OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + } else { + OUT_CS_REG(R300_VAP_CNTL, 0xA | + (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); + } R300_PACIFY; - /* XXX translate these back into normal instructions */ - OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); - OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); -} else { - OUT_CS_REG(R300_VAP_CNTL, 0xA | - (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | - (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); -} -R300_PACIFY; -END_CS; + END_CS; -r300_emit_blend_state(r300, &blend_clear_state); -r300_emit_blend_color_state(r300, &blend_color_clear_state); -r300_emit_dsa_state(r300, &dsa_clear_state); + r300_emit_blend_state(r300, &blend_clear_state); + r300_emit_blend_color_state(r300, &blend_color_clear_state); + r300_emit_dsa_state(r300, &dsa_clear_state); -BEGIN_CS(36); -R300_PACIFY; -/* Flush colorbuffer and blend caches. */ -OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, - R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D | - R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_SIGNAL); -OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, - R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | - R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); + BEGIN_CS(32); + R300_PACIFY; + /* Flush colorbuffer and blend caches. */ + OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, + R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D | + R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_SIGNAL); + OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, + R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | + R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); -OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); -OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); -/* XXX this should not be so rigid and it still doesn't work right */ -OUT_CS_REG(R300_RB3D_COLORPITCH0, (dest->stride >> 2) | R300_COLOR_FORMAT_ARGB8888); -OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); -/* XXX Packet3 */ -OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); -OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | -(1 << R300_PRIM_NUM_VERTICES_SHIFT)); -OUT_CS_32F(w / 2.0); -OUT_CS_32F(h / 2.0); -/* XXX this should be the depth value to clear to */ -OUT_CS_32F(1.0); -OUT_CS_32F(1.0); -OUT_CS_32F(r); -OUT_CS_32F(g); -OUT_CS_32F(b); -OUT_CS_32F(1.0); + OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); + OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + /* XXX (dest->stride >> 2) should be the buffer width in pixels however, + * this little calculation is only good as long as the buffer is 32bpp */ + OUT_CS_REG(R300_RB3D_COLORPITCH0, (dest->stride >> 2) | + R300_COLOR_FORMAT_ARGB8888); + OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); + /* XXX Packet3 */ + OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); + OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | + (1 << R300_PRIM_NUM_VERTICES_SHIFT)); + OUT_CS_32F(w / 2.0); + OUT_CS_32F(h / 2.0); + /* XXX this should be the depth value to clear to */ + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + OUT_CS_32F(r); + OUT_CS_32F(g); + OUT_CS_32F(b); + OUT_CS_32F(1.0); -/* XXX figure out why this is 0xA and not 0x2 */ -OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); -/* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, - R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | - R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */ -R300_PACIFY; + /* XXX figure out why this is 0xA and not 0x2 */ + OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); + /* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, + R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | + R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */ + OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000); + R300_PACIFY; + OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); -END_CS; -FLUSH_CS; + END_CS; + FLUSH_CS; r300->dirty_state = R300_NEW_KITCHEN_SINK; } -- cgit v1.2.3 From 637b24a5904ab78cbd3fc61ea5fe39c52be711ce Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Feb 2009 20:01:09 -0800 Subject: r300-gallium: Add r300 passthrough shader. --- src/gallium/drivers/r300/r300_context.h | 29 +++++++++++-- src/gallium/drivers/r300/r300_cs_inlines.h | 2 +- src/gallium/drivers/r300/r300_emit.c | 63 +++++++++++++++++++++------- src/gallium/drivers/r300/r300_state_shader.c | 12 +++++- 4 files changed, 87 insertions(+), 19 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index a29201eaba..54879f88f5 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -108,9 +108,6 @@ struct r3xx_fragment_shader { /* Has this shader been translated yet? */ boolean translated; - /* Number of used instructions */ - int instruction_count; - /* Pixel stack size */ int stack_size; }; @@ -118,12 +115,38 @@ struct r3xx_fragment_shader { struct r300_fragment_shader { /* Parent class */ struct r3xx_fragment_shader shader; + + /* Number of ALU instructions */ + int alu_instruction_count; + + /* Number of texture instructions */ + int tex_instruction_count; + + /* Number of texture indirections */ + int indirections; + + /* Indirection node offsets */ + int offset0; + int offset1; + int offset2; + int offset3; + + /* Machine instructions */ + struct { + uint32_t alu_rgb_inst; + uint32_t alu_rgb_addr; + uint32_t alu_alpha_inst; + uint32_t alu_alpha_addr; + } instructions[64]; /* XXX magic num */ }; struct r500_fragment_shader { /* Parent class */ struct r3xx_fragment_shader shader; + /* Number of used instructions */ + int instruction_count; + /* Machine instructions */ struct { uint32_t inst0; diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h index 2ca907dd90..a3ea4f900b 100644 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -28,7 +28,7 @@ #define RADEON_ONE_REG_WR (1 << 15) -#define CS_OUT_ONE_REG(register, count) \ +#define OUT_CS_ONE_REG(register, count) \ OUT_CS_REG_SEQ(register, (count | RADEON_ONE_REG_WR)) #define R300_PACIFY do { \ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 4d1b10de23..634a72991c 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -80,33 +80,58 @@ void r300_emit_dsa_state(struct r300_context* r300, } void r300_emit_fragment_shader(struct r300_context* r300, - struct r300_fragment_shader* shader) + struct r300_fragment_shader* fs) { CS_LOCALS(r300); + int i; + BEGIN_CS(0); + + OUT_CS_REG(R300_US_CONFIG, MAX(fs->indirections - 1, 0)); + OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size); + /* XXX figure out exactly how big the sizes are on this reg */ + OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); + /* XXX figure these ones out a bit better kthnx */ + OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_3, R300_RGBA_OUT); + + for (i = 0; i < fs->alu_instruction_count; i++) { + OUT_CS_REG(R300_US_ALU_RGB_INST_0 + (4 * i), + fs->instructions[i].alu_rgb_inst); + OUT_CS_REG(R300_US_ALU_RGB_ADDR_0 + (4 * i), + fs->instructions[i].alu_rgb_addr); + OUT_CS_REG(R300_US_ALU_ALPHA_INST_0 + (4 * i), + fs->instructions[i].alu_alpha_inst); + OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0 + (4 * i), + fs->instructions[i].alu_alpha_addr); + } + + END_CS; } void r500_emit_fragment_shader(struct r300_context* r300, - struct r500_fragment_shader* shader) + struct r500_fragment_shader* fs) { CS_LOCALS(r300); - int i = 0; + int i; - BEGIN_CS(8 + (shader->shader.instruction_count * 6) + 6); + BEGIN_CS(8 + (fs->instruction_count * 6) + 6); OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); - OUT_CS_REG(R500_US_PIXSIZE, shader->shader.stack_size); + OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | - R500_US_CODE_END_ADDR(shader->shader.instruction_count)); + R500_US_CODE_END_ADDR(fs->instruction_count)); OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR); OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, - shader->shader.instruction_count * 6); - for (i = 0; i < shader->shader.instruction_count; i++) { - CS_OUT(shader->instructions[i].inst0); - CS_OUT(shader->instructions[i].inst1); - CS_OUT(shader->instructions[i].inst2); - CS_OUT(shader->instructions[i].inst3); - CS_OUT(shader->instructions[i].inst4); - CS_OUT(shader->instructions[i].inst5); + fs->instruction_count * 6); + for (i = 0; i < fs->instruction_count; i++) { + OUT_CS(fs->instructions[i].inst0); + OUT_CS(fs->instructions[i].inst1); + OUT_CS(fs->instructions[i].inst2); + OUT_CS(fs->instructions[i].inst3); + OUT_CS(fs->instructions[i].inst4); + OUT_CS(fs->instructions[i].inst5); } R300_PACIFY; END_CS; @@ -173,6 +198,16 @@ static void r300_emit_dirty_state(struct r300_context* r300) r300_emit_dsa_state(r300, r300->dsa_state); } + if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) { + if (r300screen->caps->is_r500) { + r500_emit_fragment_shader(r300, + (struct r500_fragment_shader*)r300->fs); + } else { + r300_emit_fragment_shader(r300, + (struct r300_fragment_shader*)r300->fs); + } + } + if (r300->dirty_state & R300_NEW_RASTERIZER) { r300_emit_rs_state(r300, r300->rs_state); } diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 710b7ee0a6..824dbeb0aa 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -24,11 +24,21 @@ void r300_make_passthrough_fragment_shader(struct r300_fragment_shader* fs) { + fs->alu_instruction_count = 1; + fs->tex_instruction_count = 0; + fs->indirections = 1; + fs->shader.stack_size = 2; + + /* XXX decode these */ + fs->instructions[0].alu_rgb_inst = 0x50A80; + fs->instructions[0].alu_rgb_inst = 0x1C000000; + fs->instructions[0].alu_alpha_inst = 0x40889; + fs->instructions[0].alu_alpha_inst = 0x1000000; } void r500_make_passthrough_fragment_shader(struct r500_fragment_shader* fs) { - fs->shader.instruction_count = 1; + fs->instruction_count = 1; fs->shader.stack_size = 0; fs->instructions[0].inst0 = R500_INST_TYPE_OUT | -- cgit v1.2.3 From 0d60a3f33cbc071fb5aca95b96f35908059b0435 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Feb 2009 20:20:41 -0800 Subject: r300-gallium: r300 passthrough shader, static shader objects, and clear code. --- src/gallium/drivers/r300/r300_emit.c | 31 ++++++++----- src/gallium/drivers/r300/r300_state_shader.c | 51 ++-------------------- src/gallium/drivers/r300/r300_state_shader.h | 53 +++++++++++++++++++++++ src/gallium/drivers/r300/r300_surface.c | 65 +++++----------------------- src/gallium/drivers/r300/r300_surface.h | 1 + 5 files changed, 89 insertions(+), 112 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 634a72991c..8391663f7f 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -115,23 +115,32 @@ void r500_emit_fragment_shader(struct r300_context* r300, { CS_LOCALS(r300); int i; - - BEGIN_CS(8 + (fs->instruction_count * 6) + 6); + /* XXX Problem: OUT_CS_ONE_REG causes card crash */ + /* BEGIN_CS(8 + (shader->shader.instruction_count * 6) + 6); */ + BEGIN_CS(10 + (shader->shader.instruction_count * 12)); OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(fs->instruction_count)); OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR); - OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, - fs->instruction_count * 6); - for (i = 0; i < fs->instruction_count; i++) { - OUT_CS(fs->instructions[i].inst0); - OUT_CS(fs->instructions[i].inst1); - OUT_CS(fs->instructions[i].inst2); - OUT_CS(fs->instructions[i].inst3); - OUT_CS(fs->instructions[i].inst4); - OUT_CS(fs->instructions[i].inst5); + /* OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, + shader->shader.instruction_count * 6); + for (i = 0; i < shader->shader.instruction_count; i++) { + OUT_CS(shader->instructions[i].inst0); + OUT_CS(shader->instructions[i].inst1); + OUT_CS(shader->instructions[i].inst2); + OUT_CS(shader->instructions[i].inst3); + OUT_CS(shader->instructions[i].inst4); + OUT_CS(shader->instructions[i].inst5); + } */ + for (i = 0; i < shader->shader.instruction_count; i++) { + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst0); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst1); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst2); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst3); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst4); + OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst5); } R300_PACIFY; END_CS; diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 824dbeb0aa..352cb62df7 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -22,59 +22,16 @@ #include "r300_state_shader.h" -void r300_make_passthrough_fragment_shader(struct r300_fragment_shader* fs) -{ - fs->alu_instruction_count = 1; - fs->tex_instruction_count = 0; - fs->indirections = 1; - fs->shader.stack_size = 2; - - /* XXX decode these */ - fs->instructions[0].alu_rgb_inst = 0x50A80; - fs->instructions[0].alu_rgb_inst = 0x1C000000; - fs->instructions[0].alu_alpha_inst = 0x40889; - fs->instructions[0].alu_alpha_inst = 0x1000000; -} - -void r500_make_passthrough_fragment_shader(struct r500_fragment_shader* fs) -{ - fs->instruction_count = 1; - fs->shader.stack_size = 0; - - fs->instructions[0].inst0 = R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | - R500_INST_LAST | - R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; - fs->instructions[0].inst1 = - R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST; - fs->instructions[0].inst2 = - R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST; - fs->instructions[0].inst3 = - R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B; - fs->instructions[0].inst4 = - R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A; - fs->instructions[0].inst5 = - R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0; - - fs->shader.translated = true; -} - void r300_translate_shader(struct r300_context* r300, struct r300_fragment_shader* fs) { - r300_make_passthrough_fragment_shader(fs); + /* XXX fix this at some point */ + *fs = r300_passthrough_fragment_shader; } void r500_translate_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { - r500_make_passthrough_fragment_shader(fs); + /* XXX fix this at some point */ + *fs = r500_passthrough_fragment_shader; } diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 030ecaa56e..8e9ed5d59e 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -33,4 +33,57 @@ void r300_translate_shader(struct r300_context* r300, void r500_translate_shader(struct r300_context* r300, struct r500_fragment_shader* fs); +static const struct r300_fragment_shader r300_passthrough_fragment_shader = { + /* XXX This is the emission code. TODO: decode + OUT_CS_REG(R300_US_CONFIG, 0); + OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); + OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); + OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); */ + .alu_instruction_count = 1; + .tex_instruction_count = 0; + .indirections = 1; + .shader.stack_size = 2; + + /* XXX decode these */ + .instructions[0].alu_rgb_inst = 0x50A80; + .instructions[0].alu_rgb_inst = 0x1C000000; + .instructions[0].alu_alpha_inst = 0x40889; + .instructions[0].alu_alpha_inst = 0x1000000; +}; + +static const struct r500_fragment_shader r500_passthrough_fragment_shader = { + .shader.stack_size = 0, + .instruction_count = 1, + .instructions[0].inst0 = R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, + .instructions[0].inst1 = + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, + .instructions[0].inst2 = + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, + .instructions[0].inst3 = + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, + .instructions[0].inst4 = + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, + .instructions[0].inst5 = + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0, + .shader.translated = TRUE, +}; + #endif /* R300_STATE_SHADER_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 4bd8a25460..54ab778ce7 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -54,7 +54,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } - BEGIN_CS((caps->is_r500 ? 222 : 213) + (caps->has_tcl ? 34 : 4)); + BEGIN_CS(172 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -197,7 +197,7 @@ static void r300_surface_fill(struct pipe_context* pipe, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); - /* XXX RS block and fp setup */ + /* RS block setup */ if (caps->is_r500) { /* XXX We seem to be in disagreement about how many of these we have * RS:RS_IP_[0-15] [R/W] 32 bits Access: 8/16/32 MMReg:0x4074-0x40b0 @@ -213,40 +213,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); OUT_CS(0x00000000); OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); - - OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); - OUT_CS_REG(R500_US_PIXSIZE, 0x00000000); - OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | - R500_US_CODE_END_ADDR(1)); - OUT_CS_REG(R500_US_CODE_RANGE, R500_US_CODE_RANGE_ADDR(0) | - R500_US_CODE_RANGE_SIZE(1)); - OUT_CS_REG(R500_US_CODE_OFFSET, R500_US_CODE_OFFSET_ADDR(0)); - R300_PACIFY; - OUT_CS_REG(R500_GA_US_VECTOR_INDEX, - 0 | R500_GA_US_VECTOR_INDEX_TYPE_INSTR); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST | - R500_INST_RGB_OMASK_R | R500_INST_RGB_OMASK_G | - R500_INST_RGB_OMASK_B | R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | - R500_ALPHA_ADDR1_CONST | R500_ALPHA_ADDR2(0) | - R500_ALPHA_ADDR2_CONST); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, - R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0); } else { OUT_CS_REG_SEQ(R300_RS_IP_0, 8); for (i = 0; i < 8; i++) { @@ -258,26 +224,17 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX Shouldn't this be 0? */ OUT_CS(1); OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); + } + END_CS; - /* XXX magic numbers */ - OUT_CS_REG(R300_US_CONFIG, 0); - OUT_CS_REG(R300_US_PIXSIZE, 2); - OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); - OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x50A80); - OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000); - OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x40889); - OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1000000); - OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); - OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); + /* Fragment shader setup */ + if (caps->is_r500) { + r500_emit_fragment_shader(r300, &r500_passthrough_fragment_shader); + } else { + r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); } + + BEGIN_CS(2 + (caps->has_tcl ? 30 : 2)); /* XXX these magic numbers should be explained when * this becomes a cached state object */ if (caps->has_tcl) { diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index e1d53116a1..17d6c62fe8 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -31,6 +31,7 @@ #include "r300_context.h" #include "r300_cs.h" #include "r300_emit.h" +#include "r300_state_shader.h" const struct r300_blend_state blend_clear_state = { .blend_control = 0x0, -- cgit v1.2.3 From 92661bcbad13c8750f63e3a30b6c616d2f1094d3 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Fri, 13 Feb 2009 05:08:54 +0100 Subject: r300-gallium: fix OUT_CS_ONE_REG and use where applicable Signed-off-by: Corbin Simpson --- src/gallium/drivers/r300/r300_cs_inlines.h | 8 ++++++-- src/gallium/drivers/r300/r300_emit.c | 16 +++------------- src/gallium/drivers/r300/r300_surface.c | 26 ++++++++++++++------------ 3 files changed, 23 insertions(+), 27 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h index a3ea4f900b..98f9ee0451 100644 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -28,8 +28,12 @@ #define RADEON_ONE_REG_WR (1 << 15) -#define OUT_CS_ONE_REG(register, count) \ - OUT_CS_REG_SEQ(register, (count | RADEON_ONE_REG_WR)) +#define OUT_CS_ONE_REG(register, count) do { \ + debug_printf("r300: writing data sequence of %d to 0x%04X\n", \ + count, register); \ + assert(register); \ + OUT_CS(CP_PACKET0(register, ((count) - 1)) | RADEON_ONE_REG_WR); \ +} while (0) #define R300_PACIFY do { \ OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | \ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 8391663f7f..a4d520a674 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -114,17 +114,15 @@ void r500_emit_fragment_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { CS_LOCALS(r300); - int i; - /* XXX Problem: OUT_CS_ONE_REG causes card crash */ - /* BEGIN_CS(8 + (shader->shader.instruction_count * 6) + 6); */ - BEGIN_CS(10 + (shader->shader.instruction_count * 12)); + int i = 0; + BEGIN_CS(11 + (shader->shader.instruction_count * 6)); OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(fs->instruction_count)); OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR); - /* OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, + OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, shader->shader.instruction_count * 6); for (i = 0; i < shader->shader.instruction_count; i++) { OUT_CS(shader->instructions[i].inst0); @@ -133,14 +131,6 @@ void r500_emit_fragment_shader(struct r300_context* r300, OUT_CS(shader->instructions[i].inst3); OUT_CS(shader->instructions[i].inst4); OUT_CS(shader->instructions[i].inst5); - } */ - for (i = 0; i < shader->shader.instruction_count; i++) { - OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst0); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst1); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst2); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst3); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst4); - OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst5); } R300_PACIFY; END_CS; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 54ab778ce7..2c6af363f2 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -54,7 +54,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } - BEGIN_CS(172 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); + BEGIN_CS(168 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); R300_PACIFY; OUT_CS_REG(R300_TX_INVALTAGS, 0x0); R300_PACIFY; @@ -153,8 +153,9 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000); + /* XXX Moar unknown that should probably be left out. OUT_CS_REG(0x4F30, 0x00000000); - OUT_CS_REG(0x4F34, 0x00000000); + OUT_CS_REG(0x4F34, 0x00000000); */ OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); R300_PACIFY; @@ -233,8 +234,8 @@ static void r300_surface_fill(struct pipe_context* pipe, } else { r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); } - - BEGIN_CS(2 + (caps->has_tcl ? 30 : 2)); + + BEGIN_CS(2 + (caps->has_tcl ? 23 : 2)); /* XXX these magic numbers should be explained when * this becomes a cached state object */ if (caps->has_tcl) { @@ -249,14 +250,15 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX translate these back into normal instructions */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021); - OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0); + OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 8); + OUT_CS(0x00F00203); + OUT_CS(0x00D10001); + OUT_CS(0x01248001); + OUT_CS(0x00000000); + OUT_CS(0x00F02203); + OUT_CS(0x00D10021); + OUT_CS(0x01248021); + OUT_CS(0x00000000); } else { OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | -- cgit v1.2.3 From 1d2c31df41d2a52b306fd65bbb6c800e993a2798 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Feb 2009 20:35:17 -0800 Subject: r300-gallium: Fix build errors. --- src/gallium/drivers/r300/r300_emit.c | 18 +++++++++--------- src/gallium/drivers/r300/r300_state_shader.h | 16 ++++++++-------- src/gallium/drivers/r300/r300_surface.c | 2 +- 3 files changed, 18 insertions(+), 18 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index a4d520a674..a3b2772e15 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -115,7 +115,7 @@ void r500_emit_fragment_shader(struct r300_context* r300, { CS_LOCALS(r300); int i = 0; - BEGIN_CS(11 + (shader->shader.instruction_count * 6)); + BEGIN_CS(11 + (fs->instruction_count * 6)); OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | @@ -123,14 +123,14 @@ void r500_emit_fragment_shader(struct r300_context* r300, OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR); OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, - shader->shader.instruction_count * 6); - for (i = 0; i < shader->shader.instruction_count; i++) { - OUT_CS(shader->instructions[i].inst0); - OUT_CS(shader->instructions[i].inst1); - OUT_CS(shader->instructions[i].inst2); - OUT_CS(shader->instructions[i].inst3); - OUT_CS(shader->instructions[i].inst4); - OUT_CS(shader->instructions[i].inst5); + fs->instruction_count * 6); + for (i = 0; i < fs->instruction_count; i++) { + OUT_CS(fs->instructions[i].inst0); + OUT_CS(fs->instructions[i].inst1); + OUT_CS(fs->instructions[i].inst2); + OUT_CS(fs->instructions[i].inst3); + OUT_CS(fs->instructions[i].inst4); + OUT_CS(fs->instructions[i].inst5); } R300_PACIFY; END_CS; diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 8e9ed5d59e..a5f03b967b 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -47,16 +47,16 @@ static const struct r300_fragment_shader r300_passthrough_fragment_shader = { OUT_CS(R300_US_OUT_FMT_UNUSED); OUT_CS(R300_US_OUT_FMT_UNUSED); OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); */ - .alu_instruction_count = 1; - .tex_instruction_count = 0; - .indirections = 1; - .shader.stack_size = 2; + .alu_instruction_count = 1, + .tex_instruction_count = 0, + .indirections = 1, + .shader.stack_size = 2, /* XXX decode these */ - .instructions[0].alu_rgb_inst = 0x50A80; - .instructions[0].alu_rgb_inst = 0x1C000000; - .instructions[0].alu_alpha_inst = 0x40889; - .instructions[0].alu_alpha_inst = 0x1000000; + .instructions[0].alu_rgb_inst = 0x50A80, + .instructions[0].alu_rgb_inst = 0x1C000000, + .instructions[0].alu_alpha_inst = 0x40889, + .instructions[0].alu_alpha_inst = 0x1000000, }; static const struct r500_fragment_shader r500_passthrough_fragment_shader = { diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 2c6af363f2..7a4114554b 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -234,7 +234,7 @@ static void r300_surface_fill(struct pipe_context* pipe, } else { r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); } - + BEGIN_CS(2 + (caps->has_tcl ? 23 : 2)); /* XXX these magic numbers should be explained when * this becomes a cached state object */ -- cgit v1.2.3 From fe7863f3f82cda290334cecfde816e21a0e9f5d3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Feb 2009 20:47:15 -0800 Subject: r300-gallium: Fix linker error a few linker warnings. A few prototypes, a missing header, a misspelled macro. --- src/gallium/drivers/r300/r300_emit.c | 2 +- src/gallium/drivers/r300/r300_emit.h | 11 +++++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index a3b2772e15..c0990cabd9 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -86,7 +86,7 @@ void r300_emit_fragment_shader(struct r300_context* r300, int i; BEGIN_CS(0); - OUT_CS_REG(R300_US_CONFIG, MAX(fs->indirections - 1, 0)); + OUT_CS_REG(R300_US_CONFIG, MAX2(fs->indirections - 1, 0)); OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size); /* XXX figure out exactly how big the sizes are on this reg */ OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index b6e69386f9..4c5a6d292e 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -20,6 +20,8 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#include "util/u_math.h" + #include "r300_context.h" #include "r300_cs.h" #include "r300_screen.h" @@ -33,4 +35,13 @@ void r300_emit_blend_color_state(struct r300_context* r300, void r300_emit_dsa_state(struct r300_context* r300, struct r300_dsa_state* dsa); +void r300_emit_fragment_shader(struct r300_context* r300, + struct r300_fragment_shader* fs); + +void r500_emit_fragment_shader(struct r300_context* r300, + struct r500_fragment_shader* fs); + +void r300_emit_fb_state(struct r300_context* r300, + struct pipe_framebuffer_state* fb); + void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs); -- cgit v1.2.3 From 8a2d0005af34cfaf88b2d70168fdfb2c91e79045 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Feb 2009 23:36:21 -0800 Subject: r300-gallium: Take care of various bad dereferences in shader setup. Unbreaks glxinfo. --- src/gallium/drivers/r300/r300_state.c | 11 +++++------ src/gallium/drivers/r300/r300_state_shader.c | 24 ++++++++++++++++++++---- src/gallium/drivers/r300/r300_state_shader.h | 1 - 3 files changed, 25 insertions(+), 11 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 5fe2b8ea3e..2c0906aad8 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -424,7 +424,10 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) struct r300_context* r300 = r300_context(pipe); struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader; - if (!fs->translated) { + if (fs == NULL) { + r300->fs = NULL; + return; + } else if (!fs->translated) { if (r300_screen(r300->context.screen)->caps->is_r500) { r500_translate_shader(r300, fs); } else { @@ -432,11 +435,7 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) } } - if (!fs->translated) { - debug_printf("r300: Couldn't assemble fragment shader...\n"); - /* XXX exit here */ - } - + fs->translated = true; r300->fs = fs; r300->dirty_state |= R300_NEW_FRAGMENT_SHADER; diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 352cb62df7..cb606c409a 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -22,16 +22,32 @@ #include "r300_state_shader.h" +static void r300_copy_passthrough_shader(struct r300_fragment_shader* fs) +{ + struct r300_fragment_shader* pt = &r300_passthrough_fragment_shader; + fs->shader.stack_size = pt->shader.stack_size; + fs->alu_instruction_count = pt->alu_instruction_count; + fs->tex_instruction_count = pt->tex_instruction_count; + fs->indirections = pt->indirections; + fs->instructions[0] = pt->instructions[0]; +} + +static void r500_copy_passthrough_shader(struct r500_fragment_shader* fs) +{ + struct r500_fragment_shader* pt = &r500_passthrough_fragment_shader; + fs->shader.stack_size = pt->shader.stack_size; + fs->instruction_count = pt->instruction_count; + fs->instructions[0] = pt->instructions[0]; +} + void r300_translate_shader(struct r300_context* r300, struct r300_fragment_shader* fs) { - /* XXX fix this at some point */ - *fs = r300_passthrough_fragment_shader; + r300_copy_passthrough_shader(fs); } void r500_translate_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { - /* XXX fix this at some point */ - *fs = r500_passthrough_fragment_shader; + r500_copy_passthrough_shader(fs); } diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index a5f03b967b..108f5ec085 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -83,7 +83,6 @@ static const struct r500_fragment_shader r500_passthrough_fragment_shader = { R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | R500_ALU_RGBA_A_SWIZ_0, - .shader.translated = TRUE, }; #endif /* R300_STATE_SHADER_H */ -- cgit v1.2.3 From 073a73e4c7344db46ab89862e2fbc267da34969c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 13 Feb 2009 08:14:42 -0800 Subject: r300-gallium: Various thingies. Add formats to framebuffer emit, fix up shader function names, make sure fragment format is emitted for r500. --- src/gallium/drivers/r300/r300_emit.c | 18 ++++++++++++ src/gallium/drivers/r300/r300_reg.h | 43 +--------------------------- src/gallium/drivers/r300/r300_state.c | 5 ++-- src/gallium/drivers/r300/r300_state_shader.c | 4 +-- src/gallium/drivers/r300/r300_state_shader.h | 11 ++----- src/gallium/drivers/r300/r300_surface.c | 8 +++++- 6 files changed, 34 insertions(+), 55 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index c0990cabd9..8108b99f94 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -136,6 +136,21 @@ void r500_emit_fragment_shader(struct r300_context* r300, END_CS; } +/* Translate pipe_format into US_OUT_FMT. Note that formats are stored from + * C3 to C0. */ +uint32_t translate_out_fmt(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_A8R8G8B8_UNORM: + return R300_US_OUT_FMT_C4_8 | + R300_C0_SEL_B | R300_C1_SEL_G | + R300_C2_SEL_R | R300_C3_SEL_A; + default: + return R300_US_OUT_FMT_UNUSED; + } + return 0; +} + /* XXX add pitch, stride, z/stencil buf */ void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb) @@ -149,6 +164,9 @@ void r300_emit_fb_state(struct r300_context* r300, tex = (struct r300_texture*)fb->cbufs[i]->texture; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + + OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), + translate_out_fmt(fb->cbufs[i]->format)); } R300_PACIFY; END_CS; diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 9e86423efb..468e0a2e44 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1709,6 +1709,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_C3_SEL_G (2 << 14) # define R300_C3_SEL_B (3 << 14) # define R300_OUT_SIGN(x) (x << 16) +# define R500_ROUND_ADJ (1 << 20) /* ALU * The ALU instructions register blocks are enumerated according to the order @@ -3048,48 +3049,6 @@ enum { # define R500_FORMAT_TXWIDTH(x) (x << 0) # define R500_FORMAT_TXHEIGHT(x) (x << 11) # define R500_FORMAT_TXDEPTH(x) (x << 22) -/* _0 through _3 */ -#define R500_US_OUT_FMT_0 0x46A4 -# define R500_OUT_FMT_C4_8 (0 << 0) -# define R500_OUT_FMT_C4_10 (1 << 0) -# define R500_OUT_FMT_C4_10_GAMMA (2 << 0) -# define R500_OUT_FMT_C_16 (3 << 0) -# define R500_OUT_FMT_C2_16 (4 << 0) -# define R500_OUT_FMT_C4_16 (5 << 0) -# define R500_OUT_FMT_C_16_MPEG (6 << 0) -# define R500_OUT_FMT_C2_16_MPEG (7 << 0) -# define R500_OUT_FMT_C2_4 (8 << 0) -# define R500_OUT_FMT_C_3_3_2 (9 << 0) -# define R500_OUT_FMT_C_6_5_6 (10 << 0) -# define R500_OUT_FMT_C_11_11_10 (11 << 0) -# define R500_OUT_FMT_C_10_11_11 (12 << 0) -# define R500_OUT_FMT_C_2_10_10_10 (13 << 0) -/* #define R500_OUT_FMT_RESERVED (14 << 0) */ -# define R500_OUT_FMT_UNUSED (15 << 0) -# define R500_OUT_FMT_C_16_FP (16 << 0) -# define R500_OUT_FMT_C2_16_FP (17 << 0) -# define R500_OUT_FMT_C4_16_FP (18 << 0) -# define R500_OUT_FMT_C_32_FP (19 << 0) -# define R500_OUT_FMT_C2_32_FP (20 << 0) -# define R500_OUT_FMT_C4_32_FP (21 << 0) -# define R500_C0_SEL_A (0 << 8) -# define R500_C0_SEL_R (1 << 8) -# define R500_C0_SEL_G (2 << 8) -# define R500_C0_SEL_B (3 << 8) -# define R500_C1_SEL_A (0 << 10) -# define R500_C1_SEL_R (1 << 10) -# define R500_C1_SEL_G (2 << 10) -# define R500_C1_SEL_B (3 << 10) -# define R500_C2_SEL_A (0 << 12) -# define R500_C2_SEL_R (1 << 12) -# define R500_C2_SEL_G (2 << 12) -# define R500_C2_SEL_B (3 << 12) -# define R500_C3_SEL_A (0 << 14) -# define R500_C3_SEL_R (1 << 14) -# define R500_C3_SEL_G (2 << 14) -# define R500_C3_SEL_B (3 << 14) -# define R500_OUT_SIGN(x) (x << 16) -# define R500_ROUND_ADJ (1 << 20) #define R500_US_PIXSIZE 0x4604 # define R500_PIX_SIZE(x) (x) #define R500_US_TEX_ADDR_0 0x9800 diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 2c0906aad8..d02679c7c5 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -26,6 +26,7 @@ #include "r300_context.h" #include "r300_reg.h" +#include "r300_state_shader.h" /* r300_state: Functions used to intialize state context by translating * Gallium state objects into semi-native r300 state objects. @@ -429,9 +430,9 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) return; } else if (!fs->translated) { if (r300_screen(r300->context.screen)->caps->is_r500) { - r500_translate_shader(r300, fs); + r500_translate_fragment_shader(r300, (struct r500_fragment_shader*)fs); } else { - r300_translate_shader(r300, fs); + r300_translate_fragment_shader(r300, (struct r300_fragment_shader*)fs); } } diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index cb606c409a..d10ac55580 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -40,13 +40,13 @@ static void r500_copy_passthrough_shader(struct r500_fragment_shader* fs) fs->instructions[0] = pt->instructions[0]; } -void r300_translate_shader(struct r300_context* r300, +void r300_translate_fragment_shader(struct r300_context* r300, struct r300_fragment_shader* fs) { r300_copy_passthrough_shader(fs); } -void r500_translate_shader(struct r300_context* r300, +void r500_translate_fragment_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { r500_copy_passthrough_shader(fs); diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 108f5ec085..1d5d9ee943 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -27,10 +27,10 @@ #include "r300_reg.h" #include "r300_screen.h" -void r300_translate_shader(struct r300_context* r300, +void r300_translate_fragment_shader(struct r300_context* r300, struct r300_fragment_shader* fs); -void r500_translate_shader(struct r300_context* r300, +void r500_translate_fragment_shader(struct r300_context* r300, struct r500_fragment_shader* fs); static const struct r300_fragment_shader r300_passthrough_fragment_shader = { @@ -41,12 +41,7 @@ static const struct r300_fragment_shader r300_passthrough_fragment_shader = { OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); - OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); - OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); */ +*/ .alu_instruction_count = 1, .tex_instruction_count = 0, .indirections = 1, diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 7a4114554b..07837cb823 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -235,7 +235,13 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); } - BEGIN_CS(2 + (caps->has_tcl ? 23 : 2)); + BEGIN_CS(10 + (caps->has_tcl ? 23 : 2)); + OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); + OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); /* XXX these magic numbers should be explained when * this becomes a cached state object */ if (caps->has_tcl) { -- cgit v1.2.3 From 75f950c222152f78eb4f1e16ce2dd0c618e45961 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Feb 2009 18:45:19 -0800 Subject: r300-gallium: Update r300_reg from classic Mesa. Mostly needed a few defines for index buffers, but there's other goodies too. --- src/gallium/drivers/r300/r300_reg.h | 88 ++++++++++++++++++------------------- 1 file changed, 44 insertions(+), 44 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 468e0a2e44..be26b13b0b 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -64,7 +64,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R300_SE_VPORT_ZSCALE 0x1DA8 #define R300_SE_VPORT_ZOFFSET 0x1DAC - +#define R300_VAP_PORT_IDX0 0x2040 /* * Vertex Array Processing (VAP) Control */ @@ -732,8 +732,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R500_RS_IP_TEX_PTR_Q_SHIFT 18 #define R500_RS_IP_COL_PTR_SHIFT 24 #define R500_RS_IP_COL_FMT_SHIFT 27 -# define R500_RS_COL_PTR(x) (x << 24) -# define R500_RS_COL_FMT(x) (x << 27) +# define R500_RS_COL_PTR(x) ((x) << 24) +# define R500_RS_COL_FMT(x) ((x) << 27) /* gap */ #define R500_RS_IP_OFFSET_DIS (0 << 31) #define R500_RS_IP_OFFSET_EN (1 << 31) @@ -1175,8 +1175,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_RS_INTERP_SRC_SHIFT 2 /* TODO: check for removal */ # define R300_RS_INTERP_SRC_MASK (7 << 2) /* TODO: check for removal */ # define R300_RS_TEX_PTR(x) (x << 0) -# define R300_RS_COL_PTR(x) (x << 6) -# define R300_RS_COL_FMT(x) (x << 9) +# define R300_RS_COL_PTR(x) ((x) << 6) +# define R300_RS_COL_FMT(x) ((x) << 9) # define R300_RS_COL_FMT_RGBA 0 # define R300_RS_COL_FMT_RGB0 1 # define R300_RS_COL_FMT_RGB1 2 @@ -1186,10 +1186,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_RS_COL_FMT_111A 8 # define R300_RS_COL_FMT_1110 9 # define R300_RS_COL_FMT_1111 10 -# define R300_RS_SEL_S(x) (x << 13) -# define R300_RS_SEL_T(x) (x << 16) -# define R300_RS_SEL_R(x) (x << 19) -# define R300_RS_SEL_Q(x) (x << 22) +# define R300_RS_SEL_S(x) ((x) << 13) +# define R300_RS_SEL_T(x) ((x) << 16) +# define R300_RS_SEL_R(x) ((x) << 19) +# define R300_RS_SEL_Q(x) ((x) << 22) # define R300_RS_SEL_C0 0 # define R300_RS_SEL_C1 1 # define R300_RS_SEL_C2 2 @@ -1708,7 +1708,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_C3_SEL_R (1 << 14) # define R300_C3_SEL_G (2 << 14) # define R300_C3_SEL_B (3 << 14) -# define R300_OUT_SIGN(x) (x << 16) +# define R300_OUT_SIGN(x) ((x) << 16) # define R500_ROUND_ADJ (1 << 20) /* ALU @@ -2732,7 +2732,7 @@ enum { # define R500_ALPHA_OP_COS 13 # define R500_ALPHA_OP_MDH 14 # define R500_ALPHA_OP_MDV 15 -# define R500_ALPHA_ADDRD(x) (x << 4) +# define R500_ALPHA_ADDRD(x) ((x) << 4) # define R500_ALPHA_ADDRD_REL (1 << 11) # define R500_ALPHA_SEL_A_SHIFT 12 # define R500_ALPHA_SEL_A_SRC0 (0 << 12) @@ -2776,16 +2776,16 @@ enum { # define R500_ALPHA_OMOD_DIV_4 (5 << 26) # define R500_ALPHA_OMOD_DIV_8 (6 << 26) # define R500_ALPHA_OMOD_DISABLE (7 << 26) -# define R500_ALPHA_TARGET(x) (x << 29) +# define R500_ALPHA_TARGET(x) ((x) << 29) # define R500_ALPHA_W_OMASK (1 << 31) #define R500_US_ALU_ALPHA_ADDR_0 0x9800 -# define R500_ALPHA_ADDR0(x) (x << 0) +# define R500_ALPHA_ADDR0(x) ((x) << 0) # define R500_ALPHA_ADDR0_CONST (1 << 8) # define R500_ALPHA_ADDR0_REL (1 << 9) -# define R500_ALPHA_ADDR1(x) (x << 10) +# define R500_ALPHA_ADDR1(x) ((x) << 10) # define R500_ALPHA_ADDR1_CONST (1 << 18) # define R500_ALPHA_ADDR1_REL (1 << 19) -# define R500_ALPHA_ADDR2(x) (x << 20) +# define R500_ALPHA_ADDR2(x) ((x) << 20) # define R500_ALPHA_ADDR2_CONST (1 << 28) # define R500_ALPHA_ADDR2_REL (1 << 29) # define R500_ALPHA_SRCP_OP_1_MINUS_2A0 (0 << 30) @@ -2806,7 +2806,7 @@ enum { # define R500_ALU_RGBA_OP_SOP (10 << 0) # define R500_ALU_RGBA_OP_MDH (11 << 0) # define R500_ALU_RGBA_OP_MDV (12 << 0) -# define R500_ALU_RGBA_ADDRD(x) (x << 4) +# define R500_ALU_RGBA_ADDRD(x) ((x) << 4) # define R500_ALU_RGBA_ADDRD_REL (1 << 11) # define R500_ALU_RGBA_SEL_C_SHIFT 12 # define R500_ALU_RGBA_SEL_C_SRC0 (0 << 12) @@ -2933,16 +2933,16 @@ enum { # define R500_ALU_RGB_OMOD_DIV_4 (5 << 26) # define R500_ALU_RGB_OMOD_DIV_8 (6 << 26) # define R500_ALU_RGB_OMOD_DISABLE (7 << 26) -# define R500_ALU_RGB_TARGET(x) (x << 29) +# define R500_ALU_RGB_TARGET(x) ((x) << 29) # define R500_ALU_RGB_WMASK (1 << 31) #define R500_US_ALU_RGB_ADDR_0 0x9000 -# define R500_RGB_ADDR0(x) (x << 0) +# define R500_RGB_ADDR0(x) ((x) << 0) # define R500_RGB_ADDR0_CONST (1 << 8) # define R500_RGB_ADDR0_REL (1 << 9) -# define R500_RGB_ADDR1(x) (x << 10) +# define R500_RGB_ADDR1(x) ((x) << 10) # define R500_RGB_ADDR1_CONST (1 << 18) # define R500_RGB_ADDR1_REL (1 << 19) -# define R500_RGB_ADDR2(x) (x << 20) +# define R500_RGB_ADDR2(x) ((x) << 20) # define R500_RGB_ADDR2_CONST (1 << 28) # define R500_RGB_ADDR2_REL (1 << 29) # define R500_RGB_SRCP_OP_1_MINUS_2RGB0 (0 << 30) @@ -2998,19 +2998,19 @@ enum { /* note that these are 8 bit lengths, despite the offsets, at least for R500 */ #define R500_US_CODE_ADDR 0x4630 -# define R500_US_CODE_START_ADDR(x) (x << 0) -# define R500_US_CODE_END_ADDR(x) (x << 16) +# define R500_US_CODE_START_ADDR(x) ((x) << 0) +# define R500_US_CODE_END_ADDR(x) ((x) << 16) #define R500_US_CODE_OFFSET 0x4638 -# define R500_US_CODE_OFFSET_ADDR(x) (x << 0) +# define R500_US_CODE_OFFSET_ADDR(x) ((x) << 0) #define R500_US_CODE_RANGE 0x4634 -# define R500_US_CODE_RANGE_ADDR(x) (x << 0) -# define R500_US_CODE_RANGE_SIZE(x) (x << 16) +# define R500_US_CODE_RANGE_ADDR(x) ((x) << 0) +# define R500_US_CODE_RANGE_SIZE(x) ((x) << 16) #define R500_US_CONFIG 0x4600 # define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 1) #define R500_US_FC_ADDR_0 0xa000 -# define R500_FC_BOOL_ADDR(x) (x << 0) -# define R500_FC_INT_ADDR(x) (x << 8) -# define R500_FC_JUMP_ADDR(x) (x << 16) +# define R500_FC_BOOL_ADDR(x) ((x) << 0) +# define R500_FC_INT_ADDR(x) ((x) << 8) +# define R500_FC_JUMP_ADDR(x) ((x) << 16) # define R500_FC_JUMP_GLOBAL (1 << 31) #define R500_US_FC_BOOL_CONST 0x4620 # define R500_FC_KBOOL(x) (x) @@ -3031,8 +3031,8 @@ enum { # define R500_FC_A_OP_NONE (0 << 6) # define R500_FC_A_OP_POP (1 << 6) # define R500_FC_A_OP_PUSH (2 << 6) -# define R500_FC_JUMP_FUNC(x) (x << 8) -# define R500_FC_B_POP_CNT(x) (x << 16) +# define R500_FC_JUMP_FUNC(x) ((x) << 8) +# define R500_FC_B_POP_CNT(x) ((x) << 16) # define R500_FC_B_OP0_NONE (0 << 24) # define R500_FC_B_OP0_DECR (1 << 24) # define R500_FC_B_OP0_INCR (2 << 24) @@ -3041,18 +3041,18 @@ enum { # define R500_FC_B_OP1_INCR (2 << 26) # define R500_FC_IGNORE_UNCOVERED (1 << 28) #define R500_US_FC_INT_CONST_0 0x4c00 -# define R500_FC_INT_CONST_KR(x) (x << 0) -# define R500_FC_INT_CONST_KG(x) (x << 8) -# define R500_FC_INT_CONST_KB(x) (x << 16) +# define R500_FC_INT_CONST_KR(x) ((x) << 0) +# define R500_FC_INT_CONST_KG(x) ((x) << 8) +# define R500_FC_INT_CONST_KB(x) ((x) << 16) /* _0 through _15 */ #define R500_US_FORMAT0_0 0x4640 -# define R500_FORMAT_TXWIDTH(x) (x << 0) -# define R500_FORMAT_TXHEIGHT(x) (x << 11) -# define R500_FORMAT_TXDEPTH(x) (x << 22) +# define R500_FORMAT_TXWIDTH(x) ((x) << 0) +# define R500_FORMAT_TXHEIGHT(x) ((x) << 11) +# define R500_FORMAT_TXDEPTH(x) ((x) << 22) #define R500_US_PIXSIZE 0x4604 # define R500_PIX_SIZE(x) (x) #define R500_US_TEX_ADDR_0 0x9800 -# define R500_TEX_SRC_ADDR(x) (x << 0) +# define R500_TEX_SRC_ADDR(x) ((x) << 0) # define R500_TEX_SRC_ADDR_REL (1 << 7) # define R500_TEX_SRC_S_SWIZ_R (0 << 8) # define R500_TEX_SRC_S_SWIZ_G (1 << 8) @@ -3070,7 +3070,7 @@ enum { # define R500_TEX_SRC_Q_SWIZ_G (1 << 14) # define R500_TEX_SRC_Q_SWIZ_B (2 << 14) # define R500_TEX_SRC_Q_SWIZ_A (3 << 14) -# define R500_TEX_DST_ADDR(x) (x << 16) +# define R500_TEX_DST_ADDR(x) ((x) << 16) # define R500_TEX_DST_ADDR_REL (1 << 23) # define R500_TEX_DST_R_SWIZ_R (0 << 24) # define R500_TEX_DST_R_SWIZ_G (1 << 24) @@ -3089,7 +3089,7 @@ enum { # define R500_TEX_DST_A_SWIZ_B (2 << 30) # define R500_TEX_DST_A_SWIZ_A (3 << 30) #define R500_US_TEX_ADDR_DXDY_0 0xa000 -# define R500_DX_ADDR(x) (x << 0) +# define R500_DX_ADDR(x) ((x) << 0) # define R500_DX_ADDR_REL (1 << 7) # define R500_DX_S_SWIZ_R (0 << 8) # define R500_DX_S_SWIZ_G (1 << 8) @@ -3107,7 +3107,7 @@ enum { # define R500_DX_Q_SWIZ_G (1 << 14) # define R500_DX_Q_SWIZ_B (2 << 14) # define R500_DX_Q_SWIZ_A (3 << 14) -# define R500_DY_ADDR(x) (x << 16) +# define R500_DY_ADDR(x) ((x) << 16) # define R500_DY_ADDR_REL (1 << 17) # define R500_DY_S_SWIZ_R (0 << 24) # define R500_DY_S_SWIZ_G (1 << 24) @@ -3126,7 +3126,7 @@ enum { # define R500_DY_Q_SWIZ_B (2 << 30) # define R500_DY_Q_SWIZ_A (3 << 30) #define R500_US_TEX_INST_0 0x9000 -# define R500_TEX_ID(x) (x << 16) +# define R500_TEX_ID(x) ((x) << 16) # define R500_TEX_INST_NOP (0 << 22) # define R500_TEX_INST_LD (1 << 22) # define R500_TEX_INST_TEXKILL (2 << 22) @@ -3187,9 +3187,9 @@ enum { #define R300_PACKET3_3D_LOAD_VBPNTR 0x00002F00 #define R300_PACKET3_INDX_BUFFER 0x00003300 -# define R300_EB_UNK1_SHIFT 24 -# define R300_EB_UNK1 (0x80<<24) -# define R300_EB_UNK2 0x0810 +# define R300_INDX_BUFFER_DST_SHIFT 0 +# define R300_INDX_BUFFER_SKIP_SHIFT 16 +# define R300_INDX_BUFFER_ONE_REG_WR (1<<31) /* Same as R300_PACKET3_3D_DRAW_VBUF but without VAP_VTX_FMT */ #define R300_PACKET3_3D_DRAW_VBUF_2 0x00003400 -- cgit v1.2.3 From 81daa5323efbe798b11ea73d7ba289f3bb5e24cf Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Feb 2009 19:04:39 -0800 Subject: r300-gallium: Turn swtcl_emit into a vbuf_render stage. Movin' out of the Stone Ages. --- src/gallium/drivers/r300/r300_swtcl_emit.c | 290 +++++++++++++++++++---------- 1 file changed, 195 insertions(+), 95 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index 76ef48962b..b745cee63b 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -21,144 +21,244 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include "draw/draw_pipe.h" +#include "draw/draw_vbuf.h" #include "util/u_memory.h" #include "r300_cs.h" #include "r300_context.h" #include "r300_reg.h" -/* r300_swtcl_emit: Primitive vertex emission using an immediate - * vertex buffer and no HW TCL. */ +/* r300_swtcl_emit: Vertex and index buffer primitive emission. No HW TCL. */ -struct swtcl_stage { +struct r300_swtcl_render { /* Parent class */ - struct draw_stage draw; - + struct vbuf_render base; + + /* Pipe context */ struct r300_context* r300; + + /* Vertex information */ + size_t vertex_size; + unsigned prim; + unsigned hwprim; + + /* VBO */ + struct pipe_buffer* vbo; + size_t vbo_size; + size_t vbo_offset; + void* vbo_map; + size_t vbo_alloc_size; + size_t vbo_max_used; }; -static INLINE struct swtcl_stage* swtcl_stage(struct draw_stage* draw) { - return (struct swtcl_stage*)draw; +static INLINE struct r300_swtcl_render* +r300_swtcl_render(struct vbuf_render* render) +{ + return (struct r300_swtcl_render*)render; } -static INLINE void r300_emit_vertex(struct r300_context* r300, - const struct vertex_header* vertex) +static const struct vertex_info* +r300_swtcl_render_get_vertex_info(struct vbuf_render* render) { - struct vertex_info* vinfo = &r300->vertex_info; - CS_LOCALS(r300); - uint i, j; - - for (i = 0; i < vinfo->num_attribs; i++) { - j = vinfo->attrib[i].src_index; - switch (vinfo->attrib[i].emit) { - case EMIT_1F: - OUT_CS_32F(vertex->data[j][0]); - break; - case EMIT_2F: - OUT_CS_32F(vertex->data[j][0]); - OUT_CS_32F(vertex->data[j][1]); - break; - case EMIT_3F: - OUT_CS_32F(vertex->data[j][0]); - OUT_CS_32F(vertex->data[j][1]); - OUT_CS_32F(vertex->data[j][2]); - break; - case EMIT_4F: - OUT_CS_32F(vertex->data[j][0]); - OUT_CS_32F(vertex->data[j][1]); - OUT_CS_32F(vertex->data[j][2]); - OUT_CS_32F(vertex->data[j][3]); - break; - default: - debug_printf("r300: Unknown emit value %d\n", - vinfo->attrib[i].emit); - break; - } - } + struct r300_swtcl_render* r300render = r300_swtcl_render(render); + struct r300_context* r300 = r300render->r300; + + r300_update_derived_state(r300); + + return &r300->vertex_info; } -static INLINE void r300_emit_prim(struct draw_stage* draw, - struct prim_header* prim, - unsigned hwprim, - unsigned count) +static boolean r300_swtcl_render_allocate_vertices(struct vbuf_render* render, + ushort vertex_size, + ushort count) { - struct r300_context* r300 = swtcl_stage(draw)->r300; - CS_LOCALS(r300); - int i; + struct r300_swtcl_render* r300render = r300_swtcl_render(render); + struct r300_context* r300 = r300render->r300; + struct pipe_screen* screen = r300->context.screen; + size_t size = (size_t)vertex_size * (size_t)count; - r300_emit_dirty_state(r300); + if (r300render->vbo) { + pipe_buffer_reference(screen, r300render->vbo, NULL); + } - BEGIN_CS(3); - OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); - OUT_CS(r300->vertex_info.hwfmt[0]); - OUT_CS(r300->vertex_info.hwfmt[1]); - END_CS; + r300render->vbo_size = MAX2(size, r300render->vbo_alloc_size); + r300render->vbo_offset = 0; + r300render->vbo = pipe_buffer_create(screen, + 64, + PIPE_BUFFER_USAGE_VERTEX, + r300render->vbo_size); - BEGIN_CS(2 + (count * r300->vertex_info.size) + 2); - OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, count)); - OUT_CS(hwprim | R300_PRIM_WALK_RING | - (count << R300_PRIM_NUM_VERTICES_SHIFT)); + r300render->vertex_size = vertex_size; - for (i = 0; i < count; i++) { - r300_emit_vertex(r300, prim->v[i]); + if (r300render->vbo) { + return true; + } else { + return false; } - - END_CS; } -/* Just as an aside... - * - * Radeons can do many more primitives: - * - Line strip - * - Triangle fan - * - Triangle strip - * - Line loop - * - Quads - * - Quad strip - * - Polygons - * - * The following were just the only ones in Draw. */ - -static void r300_emit_point(struct draw_stage* draw, struct prim_header* prim) +static void* r300_swtcl_render_map_vertices(struct vbuf_render* render) { - r300_emit_prim(draw, prim, R300_PRIM_TYPE_POINT, 1); + struct r300_swtcl_render* r300render = r300_swtcl_render(render); + struct pipe_screen* screen = r300render->r300->context.screen; + + r300render->vbo_map = pipe_buffer_map(screen, r300render->vbo, + PIPE_BUFFER_USAGE_CPU_WRITE); + + return (unsigned char*)r300render->vbo_map + r300render->vbo_offset; } -static void r300_emit_line(struct draw_stage* draw, struct prim_header* prim) +static void* r300_swtcl_render_unmap_vertices(struct vbuf_render* render, + ushort min, + ushort max) { - r300_emit_prim(draw, prim, R300_PRIM_TYPE_LINE, 2); + struct r300_swtcl_render* r300render = r300_swtcl_render(render); + struct pipe_screen* screen = r300render->r300->context.screen; + + r300render->vbo_max_used = MAX2(r300render->vbo_max_used, + r300render->vertex_size * (max + 1)); + + pipe_buffer_unmap(screen, r300render->vbo); } -static void r300_emit_tri(struct draw_stage* draw, struct prim_header* prim) +static void r300_swtcl_render_release_vertices(struct vbuf_render* render) { - r300_emit_prim(draw, prim, R300_PRIM_TYPE_TRI_LIST, 3); + struct r300_swtcl_render* r300render = r300_swtcl_render(render); + struct pipe_screen* screen = r300render->r300->context.screen; + + pipe_buffer_reference(screen, r300render->vbo, NULL); } -static void r300_swtcl_flush(struct draw_stage* draw, unsigned flags) +static boolean r300_swtcl_render_set_primitive(struct vbuf_render* render, + unsigned prim) { + struct r300_swtcl_render* r300render = r300_swtcl_render(render); + r300render->prim = prim; + + switch (prim) { + case PIPE_PRIM_POINTS: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_POINTS; + break; + case PIPE_PRIM_LINES: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_LINES; + break; + case PIPE_PRIM_LINE_LOOP: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_LINE_LOOP; + break; + case PIPE_PRIM_LINE_STRIP: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_LINE_STRIP; + break; + case PIPE_PRIM_TRIANGLES: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_TRIANGLES; + break; + case PIPE_PRIM_TRIANGLE_STRIP: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; + break; + case PIPE_PRIM_TRIANGLE_FAN: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; + break; + case PIPE_PRIM_QUADS: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_QUADS; + break; + case PIPE_PRIM_QUAD_STRIP: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; + break; + case PIPE_PRIM_POLYGON: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_POLYGON; + break; + default: + return false; + break; + } + + return true; } -static void r300_reset_stipple(struct draw_stage* draw) +static void r300_swtcl_render_draw(struct vbuf_render* render, + const ushort* indices, + uint count) { - /* XXX */ + struct r300_swtcl_render* r300render = r300_swtcl_render(render); + struct r300_context* r300 = r300render->r300; + struct pipe_screen* screen = r300->context.screen; + struct pipe_buffer* index_buffer; + void* index_map; + + CS_LOCALS(r300); + + /* Make sure that all possible state is emitted. */ + r300_update_derived_state(r300); + r300_emit_dirty_state(r300); + + /* Send our indices into an index buffer. */ + index_buffer = pipe_buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, + count * 4); + if (!index_buffer) { + return; + } + + index_map = pipe_buffer_map(screen, index_buffer, + PIPE_BUFFER_USAGE_CPU_WRITE); + memcpy(index_map, indices, count * 4); + pipe_buffer_unmap(screen, index_buffer); + + /* Take care of vertex formats and routes */ + BEGIN_CS(3); + OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); + OUT_CS(r300->vertex_info.hwfmt[0]); + OUT_CS(r300->vertex_info.hwfmt[1]); + END_CS; + + /* Draw stuff! */ + BEGIN_CS(10); + OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX, 0)); + OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | + r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); + + OUT_CS(CP_PACKET3(R300_PACKET3_INDX_BUFFER, 2)); + OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2)); + OUT_CS_RELOC(index_buffer, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); + END_CS; } -static void r300_swtcl_destroy(struct draw_stage* draw) +static void r300_swtcl_render_destroy(struct vbuf_render* render) { - FREE(draw); + FREE(render); } -struct draw_stage* r300_draw_swtcl_stage(struct r300_context* r300) +static struct vbuf_render* r300_swtcl_render_create(struct r300_context* r300) { - struct swtcl_stage* swtcl = CALLOC_STRUCT(swtcl_stage); + struct r300_swtcl_render* r300render = CALLOC_STRUCT(r300_swtcl_render); + struct pipe_screen* screen = r300->context.screen; + + r300render->r300 = r300; + + /* XXX find real numbers plz */ + r300render->base.max_vertex_buffer_bytes = 128 * 1024; + r300render->base.max_indices = 16 * 1024; + + r300render->base.get_vertex_info = r300_swtcl_render_get_vertex_info; + r300render->base.allocate_vertices = r300_swtcl_render_allocate_vertices; + r300render->base.map_vertices = r300_swtcl_render_map_vertices; + r300render->base.unmap_vertices = r300_swtcl_render_unmap_vertices; + r300render->base.set_primitive = r300_swtcl_render_set_primitive; + r300render->base.draw = r300_swtcl_render_draw; + /* r300render->base.draw_arrays = r300_swtcl_render_draw_arrays; */ + r300render->base.release_vertices = r300_swtcl_render_release_vertices; + r300render->base.destroy = r300_swtcl_render_destroy; - swtcl->r300 = r300; - swtcl->draw.point = r300_emit_point; - swtcl->draw.line = r300_emit_line; - swtcl->draw.tri = r300_emit_tri; - swtcl->draw.flush = r300_swtcl_flush; - swtcl->draw.reset_stipple_counter = r300_reset_stipple; - swtcl->draw.destroy = r300_swtcl_destroy; + /* XXX bonghits ahead + r300render->vbo_alloc_size = 128 * 4096; + r300render->vbo_size = r300render->vbo_alloc_size; + r300render->vbo_offset = 0; + r300render->vbo = pipe_buffer_create(screen, + 64, + PIPE_BUFFER_USAGE_VERTEX, + r300render->vbo_size); + r300render->vbo_map = pipe_buffer_map(screen, + r300render->vbo, + PIPE_BUFFER_USAGE_CPU_WRITE); + pipe_buffer_unmap(screen, r300render->vbo); */ - return &swtcl->draw; + return &r300render->base; } -- cgit v1.2.3 From 46ef26eb90a28b009de9349f38f36972d828a575 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Feb 2009 19:23:09 -0800 Subject: r300-gallium: Hook up new swtcl vbuf stage. Hold on to your hats. --- src/gallium/drivers/r300/r300_swtcl_emit.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index b745cee63b..c8e7afb81b 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -262,3 +262,26 @@ static struct vbuf_render* r300_swtcl_render_create(struct r300_context* r300) return &r300render->base; } + +struct draw_stage* r300_draw_swtcl_stage(struct r300_context* r300) +{ + struct vbuf_render* render; + struct draw_stage* stage; + + render = r300_swtcl_render_create(r300); + + if (!render) { + return NULL; + } + + stage = draw_vbuf_stage(r300->draw, render); + + if (!stage) { + render->destroy(render); + return NULL; + } + + draw_set_render(r300->draw, render); + + return stage; +} -- cgit v1.2.3 From ecb177e198298bbf38fce75223c558d584446dee Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Feb 2009 21:30:55 -0800 Subject: r300-gallium: Consolidate state updates. --- src/gallium/drivers/r300/r300_emit.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index a2819294a4..0c86a9c92d 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -230,18 +230,23 @@ void r300_emit_dirty_state(struct r300_context* r300) return; } + r300_update_derived_state(r300); + /* XXX check size */ if (r300->dirty_state & R300_NEW_BLEND) { r300_emit_blend_state(r300, r300->blend_state); + r300->dirty_state &= ~R300_NEW_BLEND; } if (r300->dirty_state & R300_NEW_BLEND_COLOR) { r300_emit_blend_color_state(r300, r300->blend_color_state); + r300->dirty_state &= ~R300_NEW_BLEND_COLOR; } if (r300->dirty_state & R300_NEW_DSA) { r300_emit_dsa_state(r300, r300->dsa_state); + r300->dirty_state &= ~R300_NEW_DSA; } if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) { @@ -252,15 +257,16 @@ void r300_emit_dirty_state(struct r300_context* r300) r300_emit_fragment_shader(r300, (struct r300_fragment_shader*)r300->fs); } + r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER; } if (r300->dirty_state & R300_NEW_RASTERIZER) { r300_emit_rs_state(r300, r300->rs_state); + r300->dirty_state &= ~R300_NEW_RASTERIZER; } if (r300->dirty_state & R300_NEW_SCISSOR) { r300_emit_scissor_state(r300, r300->scissor_state); + r300->dirty_state &= ~R300_NEW_SCISSOR; } - - r300->dirty_state = 0; } -- cgit v1.2.3 From 8ec853d4dfa344773b0d024d9cbe67d04cebe05c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Feb 2009 21:31:33 -0800 Subject: r300-gallium: Properly init shader state. --- src/gallium/drivers/r300/r300_state.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index eae1a5698d..c8533d764d 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -435,6 +435,8 @@ static void* r300_create_fs_state(struct pipe_context* pipe, /* Copy state directly into shader. */ fs->state = *shader; + tgsi_scan_shader(shader->tokens, &fs->info); + return (void*)fs; } -- cgit v1.2.3 From 8e234d655dc3d8f8edefbf3bffdb726a331da2cd Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Feb 2009 21:32:40 -0800 Subject: r300-gallium: Add draw_arrays for swtcl_emit. The more I look at this, the more bugs I see. --- src/gallium/drivers/r300/r300_swtcl_emit.c | 32 ++++++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index c8e7afb81b..fb009247a5 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -174,6 +174,34 @@ static boolean r300_swtcl_render_set_primitive(struct vbuf_render* render, return true; } +static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, + unsigned start, + unsigned count) +{ + struct r300_swtcl_render* r300render = r300_swtcl_render(render); + struct r300_context* r300 = r300render->r300; + struct pipe_screen* screen = r300->context.screen; + + CS_LOCALS(r300); + + /* Make sure that all possible state is emitted. */ + r300_update_derived_state(r300); + r300_emit_dirty_state(r300); + + /* Take care of vertex formats and routes */ + BEGIN_CS(3); + OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); + OUT_CS(r300->vertex_info.hwfmt[0]); + OUT_CS(r300->vertex_info.hwfmt[1]); + END_CS; + + /* Draw stuff! */ + BEGIN_CS(2); + OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_VBUF_2, 0)); + OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | + r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); +} + static void r300_swtcl_render_draw(struct vbuf_render* render, const ushort* indices, uint count) @@ -211,7 +239,7 @@ static void r300_swtcl_render_draw(struct vbuf_render* render, /* Draw stuff! */ BEGIN_CS(10); - OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX, 0)); + OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0)); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); @@ -243,7 +271,7 @@ static struct vbuf_render* r300_swtcl_render_create(struct r300_context* r300) r300render->base.unmap_vertices = r300_swtcl_render_unmap_vertices; r300render->base.set_primitive = r300_swtcl_render_set_primitive; r300render->base.draw = r300_swtcl_render_draw; - /* r300render->base.draw_arrays = r300_swtcl_render_draw_arrays; */ + r300render->base.draw_arrays = r300_swtcl_render_draw_arrays; r300render->base.release_vertices = r300_swtcl_render_release_vertices; r300render->base.destroy = r300_swtcl_render_destroy; -- cgit v1.2.3 From e511110b71a7ea19c531d707080813d9d432341c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 13 Feb 2009 23:20:43 -0800 Subject: r300-gallium: Add derived state for vertex formats. Next up: The evil RS block. --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_context.h | 26 +++--- src/gallium/drivers/r300/r300_state_derived.c | 114 ++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_state_derived.h | 31 +++++++ 4 files changed, 161 insertions(+), 11 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_state_derived.c create mode 100644 src/gallium/drivers/r300/r300_state_derived.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index e83d943cd8..85b3f15ac5 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -11,6 +11,7 @@ C_SOURCES = \ r300_flush.c \ r300_screen.c \ r300_state.c \ + r300_state_derived.c \ r300_state_shader.c \ r300_surface.c \ r300_swtcl_emit.c \ diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 54879f88f5..caedbb8448 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -24,6 +24,7 @@ #define R300_CONTEXT_H #include "draw/draw_context.h" +#include "draw/draw_vertex.h" #include "pipe/p_context.h" #include "tgsi/tgsi_scan.h" #include "util/u_memory.h" @@ -85,17 +86,18 @@ struct r300_scissor_state { struct r300_texture_state { }; -#define R300_NEW_BLEND 0x000001 -#define R300_NEW_BLEND_COLOR 0x000002 -#define R300_NEW_DSA 0x000004 -#define R300_NEW_FRAMEBUFFERS 0x000008 -#define R300_NEW_FRAGMENT_SHADER 0x000010 -#define R300_NEW_RASTERIZER 0x000020 -#define R300_NEW_SAMPLER 0x000040 -#define R300_NEW_SCISSOR 0x004000 -#define R300_NEW_TEXTURE 0x008000 -#define R300_NEW_VERTEX_SHADER 0x800000 -#define R300_NEW_KITCHEN_SINK 0xffffff +#define R300_NEW_BLEND 0x0000001 +#define R300_NEW_BLEND_COLOR 0x0000002 +#define R300_NEW_DSA 0x0000004 +#define R300_NEW_FRAMEBUFFERS 0x0000008 +#define R300_NEW_FRAGMENT_SHADER 0x0000010 +#define R300_NEW_RASTERIZER 0x0000020 +#define R300_NEW_SAMPLER 0x0000040 +#define R300_NEW_SCISSOR 0x0004000 +#define R300_NEW_TEXTURE 0x0008000 +#define R300_NEW_VERTEX_FORMAT 0x0800000 +#define R300_NEW_VERTEX_SHADER 0x1000000 +#define R300_NEW_KITCHEN_SINK 0x1ffffff /* The next several objects are not pure Radeon state; they inherit from * various Gallium classes. */ @@ -203,6 +205,8 @@ struct r300_context { struct r300_texture* textures[8]; struct r300_texture_state* texture_states[8]; int texture_count; + /* Vertex information. */ + struct vertex_info vertex_info; /* Bitmask of dirty state objects. */ uint32_t dirty_state; /* Flag indicating whether or not the HW is dirty. */ diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c new file mode 100644 index 0000000000..fc2730d4c6 --- /dev/null +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -0,0 +1,114 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_state_derived.h" + +/* r300_state_derived: Various bits of state which are dependent upon + * currently bound CSO data. */ + +/* Update the vertex_info struct in our r300_context. + * + * The vertex_info struct describes the post-TCL format of vertices. It is + * required for Draw when doing SW TCL, and also for describing the + * dreaded RS block on R300 chipsets. */ +/* XXX this function should be able to handle vert shaders as well as draw */ +static void r300_update_vertex_layout(struct r300_context* r300) +{ + struct vertex_info vinfo; + boolean pos = false, psize = false, fog = false; + int i, texs = 0, cols = 0; + + struct tgsi_shader_info* info = &r300->fs->info; + memset(&vinfo, 0, sizeof(vinfo)); + + /* This is rather lame. Since draw_find_vs_output doesn't return an error + * when it can't find an output, we have to pre-iterate and count each + * output ourselves. */ + for (i = 0; i < info->num_inputs; i++) { + switch (info->input_semantic_name[i]) { + case TGSI_SEMANTIC_POSITION: + pos = true; + break; + case TGSI_SEMANTIC_COLOR: + cols++; + break; + case TGSI_SEMANTIC_FOG: + fog = true; + break; + case TGSI_SEMANTIC_PSIZE: + psize = true; + break; + case TGSI_SEMANTIC_GENERIC: + texs++; + break; + default: + debug_printf("r300: Unknown vertex input %d\n", + info->input_semantic_name[i]); + break; + } + } + + /* Do the actual vertex_info setup. + * + * vertex_info has four uints of hardware-specific data in it. + * vinfo.hwfmt[0] is VAP_OUT_VTX_FMT_0 + * vinfo.hwfmt[1] is VAP_OUT_VTX_FMT_1 */ + + if (pos) { + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_POS, + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); + vinfo.hwfmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; + } else { + debug_printf("r300: No vertex input for position in SW TCL;\n" + " this will probably end poorly.\n"); + } + + if (psize) { + draw_emit_vertex_attr(&vinfo, EMIT_1F, INTERP_LINEAR, + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_PSIZE, 0)); + vinfo.hwfmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; + } + + for (i = 0; i < cols; i++) { + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_COLOR, i)); + vinfo.hwfmt[0] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i); + } + + if (fog) { + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0)); + vinfo.hwfmt[0] |= + (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << cols); + } + + for (i = 0; i < texs; i++) { + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i)); + vinfo.hwfmt[1] |= (4 << (3 * i)); + } + + if (memcmp(&r300->vertex_info, &vinfo, sizeof(struct vertex_info))) { + memcpy(&r300->vertex_info, &vinfo, sizeof(struct vertex_info)); + r300->dirty_state |= R300_NEW_VERTEX_FORMAT; + } +} diff --git a/src/gallium/drivers/r300/r300_state_derived.h b/src/gallium/drivers/r300/r300_state_derived.h new file mode 100644 index 0000000000..11d0787d12 --- /dev/null +++ b/src/gallium/drivers/r300/r300_state_derived.h @@ -0,0 +1,31 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_STATE_DERIVED_H +#define R300_STATE_DERIVED_H + +#include "draw/draw_vertex.h" + +#include "r300_context.h" +#include "r300_reg.h" + +#endif /* R300_STATE_DERIVED_H */ -- cgit v1.2.3 From b45e5e2a12e91cecec8922e58b2fc3960ab7ae14 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 14 Feb 2009 01:55:38 -0800 Subject: r300-gallium: Emit Z/stencil buffer offset. --- src/gallium/drivers/r300/r300_emit.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 8108b99f94..21803443fe 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -168,6 +168,19 @@ void r300_emit_fb_state(struct r300_context* r300, OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), translate_out_fmt(fb->cbufs[i]->format)); } + + if (fb->zsbuf) { + tex = (struct r300_texture*)fb->zsbuf->texture; + OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1); + OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + } + + OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, + R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS | + R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D); + OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, + R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | + R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); R300_PACIFY; END_CS; } -- cgit v1.2.3 From 1c533bdeb6e2932120874754bb357790d4c923a8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 14 Feb 2009 02:06:17 -0800 Subject: r300-gallium: Add Z/stencil buffer format emit. Also set BEGIN_CS correctly. --- src/gallium/drivers/r300/r300_emit.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 21803443fe..75864c0ef6 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -151,7 +151,7 @@ uint32_t translate_out_fmt(enum pipe_format format) return 0; } -/* XXX add pitch, stride, z/stencil buf */ +/* XXX add pitch, stride */ void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb) { @@ -159,7 +159,7 @@ void r300_emit_fb_state(struct r300_context* r300, struct r300_texture* tex; int i; - BEGIN_CS((3 * fb->nr_cbufs) + 6); + BEGIN_CS((5 * fb->nr_cbufs) + (fb->zsbuf ? 5 : 0) + 6); for (i = 0; i < fb->nr_cbufs; i++) { tex = (struct r300_texture*)fb->cbufs[i]->texture; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); @@ -173,6 +173,12 @@ void r300_emit_fb_state(struct r300_context* r300, tex = (struct r300_texture*)fb->zsbuf->texture; OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1); OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + if (fb->zsbuf->format == PIPE_FORMAT_Z24S8_UNORM) { + OUT_CS_REG(R300_ZB_FORMAT, + R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL); + } else { + OUT_CS_REG(R300_ZB_FORMAT, 0x0); + } } OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, -- cgit v1.2.3 From 9a20ef0a52f8c4efd7431ccd59e32efecdc33893 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 14 Feb 2009 02:07:29 -0800 Subject: r300-gallium: Enable all four colorbuffer render targets. As far as I can tell all the state emission necessary has been set up. Well, except for the fragment shader, but c'mon, gimme a break. :3 --- src/gallium/drivers/r300/r300_screen.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 8ed66a1660..5088c13039 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -100,8 +100,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) /* IN THEORY */ return 0; case PIPE_CAP_MAX_RENDER_TARGETS: - /* XXX 4 eventually */ - return 1; + return 4; case PIPE_CAP_OCCLUSION_QUERY: /* IN THEORY */ return 0; -- cgit v1.2.3 From 5352ec3b870706467b538595d90bfacbef0f98d5 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 14 Feb 2009 02:24:30 -0800 Subject: r300-gallium: Update r300_screen comments and add a few formats. --- src/gallium/drivers/r300/r300_screen.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 5088c13039..d7354ad893 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -120,7 +120,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) * shows why this is silly. Assuming RGBA, 4cpp, we can see that * 4096*4096*4096 = 64.0 GiB exactly, so it's not exactly * practical. However, if at some point a game really wants this, - * then we can remove this limit. */ + * then we can remove or raise this limit. */ if (r300screen->caps->is_r500) { /* 9 == 256x256x256 */ return 9; @@ -141,7 +141,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) case PIPE_CAP_TEXTURE_MIRROR_REPEAT: return 1; case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: - /* XXX guessing */ + /* XXX guessing (what a terrible guess) */ return 2; default: debug_printf("r300: Implementation error: Bad param %d\n", @@ -174,13 +174,25 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) } } -/* XXX moar formats */ +/* XXX even moar formats */ static boolean check_tex_2d_format(enum pipe_format format) { switch (format) { + /* Colorbuffer */ case PIPE_FORMAT_A8R8G8B8_UNORM: + /* Texture */ case PIPE_FORMAT_I8_UNORM: + /* Z buffer */ + case PIPE_FORMAT_Z16_UNORM: + /* Z buffer with stencil */ + case PIPE_FORMAT_Z24S8_UNORM: return TRUE; + + /* These formats are explicitly not supported, in order to keep + * people from wasting their time trying to implement them... */ + case PIPE_FORMAT_S8Z24_UNORM: + return FALSE; + default: debug_printf("r300: Warning: Got unknown format: %s, in %s\n", pf_name(format), __FUNCTION__); -- cgit v1.2.3 From f176c94e49a50b05b3af9f748a67e2ebd2e1b8fd Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 14 Feb 2009 03:23:50 -0800 Subject: r300-gallium: Use fui instead of a roll-my-own. Man, util/u_math just gets better by the day. --- src/gallium/drivers/r300/r300_cs.h | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 385b61a096..3049702a94 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -23,21 +23,11 @@ #ifndef R300_CS_H #define R300_CS_H +#include "util/u_math.h" + #include "r300_reg.h" #include "r300_winsys.h" -/* Pack a 32-bit float into a dword. */ -static uint32_t pack_float_32(float f) -{ - union { - float f; - uint32_t u; - } u; - - u.f = f; - return u.u; -} - /* Yes, I know macros are ugly. However, they are much prettier than the code * that they neatly hide away, and don't have the cost of function setup,so * we're going to use them. */ @@ -80,7 +70,7 @@ static uint32_t pack_float_32(float f) } while (0) #define OUT_CS_32F(value) do { \ - cs_winsys->write_cs_dword(cs, pack_float_32(value)); \ + cs_winsys->write_cs_dword(cs, fui(value)); \ cs_count--; \ } while (0) -- cgit v1.2.3 From 39d0ac4826dd71ca7db224a14110017fdadea6fb Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 14 Feb 2009 04:11:27 -0800 Subject: r300-gallium: Clean up some clear registers. --- src/gallium/drivers/r300/r300_surface.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 07837cb823..30a0d06199 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -54,9 +54,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } - BEGIN_CS(168 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); - R300_PACIFY; - OUT_CS_REG(R300_TX_INVALTAGS, 0x0); + BEGIN_CS(164 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); R300_PACIFY; /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -235,7 +233,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); } - BEGIN_CS(10 + (caps->has_tcl ? 23 : 2)); + BEGIN_CS(8 + (caps->has_tcl ? 23 : 2)); OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); OUT_CS(R300_US_OUT_FMT_UNUSED); @@ -314,9 +312,7 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */ - OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000); - R300_PACIFY; - OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); + R300_SCREENDOOR; END_CS; FLUSH_CS; -- cgit v1.2.3 From 4e309b5d64e9b0b6da4bd34772af5d949bd4d62f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 14 Feb 2009 04:41:29 -0800 Subject: r300-gallium: Grab bag of goodies. Some fixes from glisse, moar swtcl emit setup, cleanup a bunch of regs, properly do clear flush, and BEGIN_CS count fixes. --- src/gallium/drivers/r300/r300_cs_inlines.h | 5 +++ src/gallium/drivers/r300/r300_emit.c | 6 ++-- src/gallium/drivers/r300/r300_surface.c | 16 +++------- src/gallium/drivers/r300/r300_swtcl_emit.c | 50 ++++++++++++++++++++++++++---- 4 files changed, 55 insertions(+), 22 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h index 98f9ee0451..16e412f586 100644 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -40,5 +40,10 @@ (1 << 18) | (1 << 31)); \ } while (0) +#define R300_SCREENDOOR do { \ + OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); \ + R300_PACIFY; \ + OUT_CS_REG(R300_SC_SCREENDOOR, 0xffffff); \ +} while (0) #endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 75864c0ef6..c6464e3eb6 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -115,7 +115,7 @@ void r500_emit_fragment_shader(struct r300_context* r300, { CS_LOCALS(r300); int i = 0; - BEGIN_CS(11 + (fs->instruction_count * 6)); + BEGIN_CS(9 + (fs->instruction_count * 6)); OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | @@ -132,7 +132,6 @@ void r500_emit_fragment_shader(struct r300_context* r300, OUT_CS(fs->instructions[i].inst4); OUT_CS(fs->instructions[i].inst5); } - R300_PACIFY; END_CS; } @@ -159,7 +158,7 @@ void r300_emit_fb_state(struct r300_context* r300, struct r300_texture* tex; int i; - BEGIN_CS((5 * fb->nr_cbufs) + (fb->zsbuf ? 5 : 0) + 6); + BEGIN_CS((5 * fb->nr_cbufs) + (fb->zsbuf ? 5 : 0) + 4); for (i = 0; i < fb->nr_cbufs; i++) { tex = (struct r300_texture*)fb->cbufs[i]->texture; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); @@ -187,7 +186,6 @@ void r300_emit_fb_state(struct r300_context* r300, OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); - R300_PACIFY; END_CS; } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 30a0d06199..392c7d318d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -54,8 +54,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } - BEGIN_CS(164 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); - R300_PACIFY; + BEGIN_CS(158 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -127,7 +126,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); - OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF); OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002); OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); @@ -156,7 +154,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(0x4F34, 0x00000000); */ OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); - R300_PACIFY; if (caps->has_tcl) { OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | @@ -233,7 +230,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); } - BEGIN_CS(8 + (caps->has_tcl ? 23 : 2)); + BEGIN_CS(8 + (caps->has_tcl ? 20 : 2)); OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); OUT_CS(R300_US_OUT_FMT_UNUSED); @@ -250,7 +247,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); - R300_PACIFY; /* XXX translate these back into normal instructions */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); @@ -269,15 +265,13 @@ static void r300_surface_fill(struct pipe_context* pipe, (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); } - R300_PACIFY; END_CS; r300_emit_blend_state(r300, &blend_clear_state); r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); - BEGIN_CS(32); - R300_PACIFY; + BEGIN_CS(24); /* Flush colorbuffer and blend caches. */ OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D | @@ -312,12 +306,10 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */ - R300_SCREENDOOR; END_CS; - FLUSH_CS; - r300->dirty_state = R300_NEW_KITCHEN_SINK; + r300->dirty_hw++; } void r300_init_surface_functions(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index f6e98d23e9..e51ac2c28d 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -41,10 +41,44 @@ static INLINE struct swtcl_stage* swtcl_stage(struct draw_stage* draw) { return (struct swtcl_stage*)draw; } -static void r300_emit_vertex(struct r300_context* r300, - const struct vertex_header* vertex) +static INLINE void r300_emit_vertex(struct r300_context* r300, + const struct vertex_header* vertex) { - /* XXX */ + struct vertex_info* vinfo = &r300->vertex_info; + CS_LOCALS(r300); + uint i, j; + + BEGIN_CS(vinfo->size); + + for (i = 0; i < vinfo->num_attribs; i++) { + j = vinfo->attrib[i].src_index; + switch (vinfo->attrib[i].emit) { + case EMIT_1F: + CS_OUT_32F(vertex->data[j][0]); + break; + case EMIT_2F: + CS_OUT_32F(vertex->data[j][0]); + CS_OUT_32F(vertex->data[j][1]); + break; + case EMIT_3F: + CS_OUT_32F(vertex->data[j][0]); + CS_OUT_32F(vertex->data[j][1]); + CS_OUT_32F(vertex->data[j][2]); + break; + case EMIT_4F: + CS_OUT_32F(vertex->data[j][0]); + CS_OUT_32F(vertex->data[j][1]); + CS_OUT_32F(vertex->data[j][2]); + CS_OUT_32F(vertex->data[j][3]); + break; + default: + debug_printf("r300: Unknown emit value %d\n", + vinfo->attrib[i].emit); + break; + } + } + + END_CS; } static INLINE void r300_emit_prim(struct draw_stage* draw, @@ -58,8 +92,12 @@ static INLINE void r300_emit_prim(struct draw_stage* draw, r300_emit_dirty_state(r300); - /* XXX should be count * vtx size */ - BEGIN_CS(2 + count + 6); + BEGIN_CS(3); + OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); + OUT_CS(r300->vertex_info.hwfmt[0]); + OUT_CS(r300->vertex_info.hwfmt[1]); + + BEGIN_CS(2 + (count * r300->vertex_info.size) + 2); OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, count)); OUT_CS(hwprim | R300_PRIM_WALK_RING | (count << R300_PRIM_NUM_VERTICES_SHIFT)); @@ -67,7 +105,7 @@ static INLINE void r300_emit_prim(struct draw_stage* draw, for (i = 0; i < count; i++) { r300_emit_vertex(r300, prim->v[i]); } - R300_PACIFY; + END_CS; } -- cgit v1.2.3 From 484858ae48fef039034cf43391883a432ac40c78 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 14 Feb 2009 15:24:44 -0800 Subject: r300-gallium: Fix scissors. Don't use SCISSORS_OFFSET since we're DRI2, and don't forget to set scissors in clear. --- src/gallium/drivers/r300/r300_cs_inlines.h | 4 ++-- src/gallium/drivers/r300/r300_emit.c | 16 ++++++++++++---- src/gallium/drivers/r300/r300_emit.h | 3 +++ src/gallium/drivers/r300/r300_state.c | 18 +++++------------- src/gallium/drivers/r300/r300_surface.c | 8 +++++++- 5 files changed, 29 insertions(+), 20 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h index 16e412f586..db931fd485 100644 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -36,8 +36,8 @@ } while (0) #define R300_PACIFY do { \ - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | \ - (1 << 18) | (1 << 31)); \ + OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 14) | (1 << 15) | (1 << 16) | (1 << 17) | \ + (1 << 18)); \ } while (0) #define R300_SCREENDOOR do { \ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index c6464e3eb6..cfc70362cc 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -208,6 +208,17 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) END_CS; } +void r300_emit_scissor_state(struct r300_context* r300, + struct r300_scissor_state* scissor) +{ + CS_LOCALS(r300); + BEGIN_CS(3); + OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); + OUT_CS(scissor->scissor_top_left); + OUT_CS(scissor->scissor_bottom_right); +} + +/* Emit all dirty state. */ static void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = @@ -247,10 +258,7 @@ static void r300_emit_dirty_state(struct r300_context* r300) } if (r300->dirty_state & R300_NEW_SCISSOR) { - struct r300_scissor_state* scissor = r300->scissor_state; - /* XXX next two are contiguous regs */ - OUT_CS_REG(R300_SC_SCISSORS_TL, scissor->scissor_top_left); - OUT_CS_REG(R300_SC_SCISSORS_BR, scissor->scissor_bottom_right); + r300_emit_scissor_state(r300, r300->scissor_state); } r300->dirty_state = 0; diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 4c5a6d292e..7642cfb39e 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -45,3 +45,6 @@ void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb); void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs); + +void r300_emit_scissor_state(struct r300_context* r300, + struct r300_scissor_state* scissor); diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index d02679c7c5..6ecd61e3a2 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -715,20 +715,12 @@ static void r300_set_scissor_state(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); draw_flush(r300->draw); - uint32_t left, top, right, bottom; - - /* So, a bit of info. The scissors are offset by R300_SCISSORS_OFFSET in - * both directions for all values, and can only be 13 bits wide. Why? - * We may never know. */ - left = (state->minx + R300_SCISSORS_OFFSET) & 0x1fff; - top = (state->miny + R300_SCISSORS_OFFSET) & 0x1fff; - right = (state->maxx + R300_SCISSORS_OFFSET) & 0x1fff; - bottom = (state->maxy + R300_SCISSORS_OFFSET) & 0x1fff; - - r300->scissor_state->scissor_top_left = (left << R300_SCISSORS_X_SHIFT) | - (top << R300_SCISSORS_Y_SHIFT); + r300->scissor_state->scissor_top_left = + (state->minx << R300_SCISSORS_X_SHIFT) | + (state->miny << R300_SCISSORS_Y_SHIFT); r300->scissor_state->scissor_bottom_right = - (right << R300_SCISSORS_X_SHIFT) | (bottom << R300_SCISSORS_Y_SHIFT); + (state->maxx << R300_SCISSORS_X_SHIFT) | + (state->maxy << R300_SCISSORS_Y_SHIFT); r300->dirty_state |= R300_NEW_SCISSOR; } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 392c7d318d..8c6b336aac 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -54,7 +54,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } - BEGIN_CS(158 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); + BEGIN_CS(161 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -189,10 +189,16 @@ static void r300_surface_fill(struct pipe_context* pipe, R300_PS_UCP_MODE_CLIP_AS_TRIFAN); } + /* The size of the point we're about to draw, in sixths of pixels */ OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); + /* Pixel scissors */ + OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); + OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT)); + OUT_CS((w << R300_SCISSORS_X_SHIFT) | (h << R300_SCISSORS_Y_SHIFT)); + /* RS block setup */ if (caps->is_r500) { /* XXX We seem to be in disagreement about how many of these we have -- cgit v1.2.3 From 82722a75c5d55bb8a553b525b4a1e481a7044718 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Feb 2009 02:52:47 -0800 Subject: r300-gallium: Add SC_CLIP_RULE to clear. This is a register that is in r300_demo but not r300_surface, so adding it in to see if it helps. --- src/gallium/drivers/r300/r300_surface.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 8c6b336aac..0a4710151a 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -194,6 +194,9 @@ static void r300_surface_fill(struct pipe_context* pipe, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); + /* XXX */ + OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); + /* Pixel scissors */ OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT)); -- cgit v1.2.3 From 1b77138a1effe2e18a9ce9e16c43852ff855a7be Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Feb 2009 02:53:34 -0800 Subject: r300-gallium: Add draw_arrays and friends. This is the last bit of Gallium-side plumbing for drawing things. From this point on, the only missing parts should be in r3xx-specific code areas... --- src/gallium/drivers/r300/r300_context.c | 76 +++++++++++++++++++++++++++++- src/gallium/drivers/r300/r300_context.h | 36 ++++++++++---- src/gallium/drivers/r300/r300_emit.c | 2 +- src/gallium/drivers/r300/r300_state.c | 28 ++++++++++- src/gallium/drivers/r300/r300_swtcl_emit.c | 20 ++++---- 5 files changed, 138 insertions(+), 24 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 7b605ae87a..37dc9e86d6 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -22,6 +22,76 @@ #include "r300_context.h" +static boolean r300_draw_range_elements(struct pipe_context* pipe, + struct pipe_buffer* indexBuffer, + unsigned indexSize, + unsigned minIndex, + unsigned maxIndex, + unsigned mode, + unsigned start, + unsigned count) +{ + struct r300_context* r300 = r300_context(pipe); + int i; + + if (r300->dirty_state) { + r300_update_derived_state(r300); + r300_emit_dirty_state(r300); + } + + for (i = 0; i < r300->vertex_buffer_count; i++) { + void* buf = pipe_buffer_map(pipe->screen, + r300->vertex_buffers[i].buffer, + PIPE_BUFFER_USAGE_CPU_READ); + draw_set_mapped_vertex_buffer(r300->draw, i, buf); + } + + if (indexBuffer) { + void* indices = pipe_buffer_map(pipe->screen, indexBuffer, + PIPE_BUFFER_USAGE_CPU_READ); + draw_set_mapped_element_buffer_range(r300->draw, indexSize, + minIndex, maxIndex, indices); + } else { + draw_set_mapped_element_buffer(r300->draw, 0, NULL); + } + + draw_set_mapped_constant_buffer(r300->draw, + r300->shader_constants[PIPE_SHADER_VERTEX].constants, + r300->shader_constants[PIPE_SHADER_VERTEX].user_count * + (sizeof(float) * 4)); + + /* Abandon all hope, ye who enter here. */ + draw_arrays(r300->draw, mode, start, count); + + for (i = 0; i < r300->vertex_buffer_count; i++) { + pipe_buffer_unmap(pipe->screen, r300->vertex_buffers[i].buffer); + draw_set_mapped_vertex_buffer(r300->draw, i, NULL); + } + + if (indexBuffer) { + pipe_buffer_unmap(pipe->screen, indexBuffer); + draw_set_mapped_element_buffer_range(r300->draw, 0, start, + start + count - 1, NULL); + } + + return true; +} + +static boolean r300_draw_elements(struct pipe_context* pipe, + struct pipe_buffer* indexBuffer, + unsigned indexSize, unsigned mode, + unsigned start, unsigned count) +{ + return r300_draw_range_elements(pipe, indexBuffer, indexSize, 0, ~0, + mode, start, count); +} + +static boolean r300_draw_arrays(struct pipe_context* pipe, unsigned mode, + unsigned start, unsigned count) +{ + return r300_draw_elements(pipe, NULL, 0, mode, start, count); +} + static void r300_destroy_context(struct pipe_context* context) { struct r300_context* r300 = r300_context(context); @@ -49,8 +119,12 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.clear = r300_clear; + r300->context.draw_arrays = r300_draw_arrays; + r300->context.draw_elements = r300_draw_elements; + r300->context.draw_range_elements = r300_draw_range_elements; + r300->draw = draw_create(); - /*XXX draw_set_rasterize_stage(r300->draw, r300_draw_swtcl_stage(r300));*/ + draw_set_rasterize_stage(r300->draw, r300_draw_swtcl_stage(r300)); r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); r300->scissor_state = CALLOC_STRUCT(r300_scissor_state); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index caedbb8448..53e41bf76d 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -88,20 +88,31 @@ struct r300_texture_state { #define R300_NEW_BLEND 0x0000001 #define R300_NEW_BLEND_COLOR 0x0000002 -#define R300_NEW_DSA 0x0000004 -#define R300_NEW_FRAMEBUFFERS 0x0000008 -#define R300_NEW_FRAGMENT_SHADER 0x0000010 -#define R300_NEW_RASTERIZER 0x0000020 -#define R300_NEW_SAMPLER 0x0000040 -#define R300_NEW_SCISSOR 0x0004000 -#define R300_NEW_TEXTURE 0x0008000 -#define R300_NEW_VERTEX_FORMAT 0x0800000 -#define R300_NEW_VERTEX_SHADER 0x1000000 -#define R300_NEW_KITCHEN_SINK 0x1ffffff +#define R300_NEW_CONSTANTS 0x0000004 +#define R300_NEW_DSA 0x0000008 +#define R300_NEW_FRAMEBUFFERS 0x0000010 +#define R300_NEW_FRAGMENT_SHADER 0x0000020 +#define R300_NEW_RASTERIZER 0x0000040 +#define R300_NEW_SAMPLER 0x0000080 +#define R300_NEW_SCISSOR 0x0008000 +#define R300_NEW_TEXTURE 0x0010000 +#define R300_NEW_VERTEX_FORMAT 0x1000000 +#define R300_NEW_VERTEX_SHADER 0x2000000 +#define R300_NEW_KITCHEN_SINK 0x3ffffff /* The next several objects are not pure Radeon state; they inherit from * various Gallium classes. */ +struct r300_constant_buffer { + /* Buffer of constants */ + /* XXX first number should be raised */ + float constants[8][4]; + /* Number of user-defined constants */ + int user_count; + /* Total number of constants */ + int count; +}; + struct r3xx_fragment_shader { /* Parent class */ struct pipe_shader_state state; @@ -188,6 +199,8 @@ struct r300_context { struct r300_blend_state* blend_state; /* Blend color state. */ struct r300_blend_color_state* blend_color_state; + /* Shader constants. */ + struct r300_constant_buffer shader_constants[PIPE_SHADER_TYPES]; /* Depth, stencil, and alpha state. */ struct r300_dsa_state* dsa_state; /* Fragment shader. */ @@ -205,6 +218,9 @@ struct r300_context { struct r300_texture* textures[8]; struct r300_texture_state* texture_states[8]; int texture_count; + /* Vertex buffers. */ + struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS]; + int vertex_buffer_count; /* Vertex information. */ struct vertex_info vertex_info; /* Bitmask of dirty state objects. */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index cfc70362cc..32c9681d2b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -219,7 +219,7 @@ void r300_emit_scissor_state(struct r300_context* r300, } /* Emit all dirty state. */ -static void r300_emit_dirty_state(struct r300_context* r300) +void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 6ecd61e3a2..559844f9b4 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -22,7 +22,9 @@ #include "util/u_math.h" #include "util/u_pack_color.h" + #include "pipe/p_debug.h" +#include "pipe/internal/p_winsys_screen.h" #include "r300_context.h" #include "r300_reg.h" @@ -211,7 +213,24 @@ static void uint shader, uint index, const struct pipe_constant_buffer* buffer) { - /* XXX */ + struct r300_context* r300 = r300_context(pipe); + + /* This entire chunk of code seems ever-so-slightly baked. + * It's as if I've got pipe_buffer* matryoshkas... */ + if (buffer && buffer->buffer && buffer->buffer->size) { + void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer, + PIPE_BUFFER_USAGE_CPU_READ); + memcpy(r300->shader_constants[shader].constants, + map, buffer->buffer->size); + pipe->winsys->buffer_unmap(pipe->winsys, map); + + r300->shader_constants[shader].user_count = + buffer->buffer->size / (sizeof(float) * 4); + } else { + r300->shader_constants[shader].user_count = 0; + } + + r300->dirty_state |= R300_NEW_CONSTANTS; } static uint32_t translate_depth_stencil_function(int zs_func) { @@ -738,7 +757,12 @@ static void r300_set_vertex_buffers(struct pipe_context* pipe, const struct pipe_vertex_buffer* buffers) { struct r300_context* r300 = r300_context(pipe); - /* XXX Draw */ + + memcpy(r300->vertex_buffers, buffers, + sizeof(struct pipe_vertex_buffer) * count); + + r300->vertex_buffer_count = count; + draw_flush(r300->draw); draw_set_vertex_buffers(r300->draw, count, buffers); } diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index e51ac2c28d..ca078d63e0 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -54,22 +54,22 @@ static INLINE void r300_emit_vertex(struct r300_context* r300, j = vinfo->attrib[i].src_index; switch (vinfo->attrib[i].emit) { case EMIT_1F: - CS_OUT_32F(vertex->data[j][0]); + OUT_CS_32F(vertex->data[j][0]); break; case EMIT_2F: - CS_OUT_32F(vertex->data[j][0]); - CS_OUT_32F(vertex->data[j][1]); + OUT_CS_32F(vertex->data[j][0]); + OUT_CS_32F(vertex->data[j][1]); break; case EMIT_3F: - CS_OUT_32F(vertex->data[j][0]); - CS_OUT_32F(vertex->data[j][1]); - CS_OUT_32F(vertex->data[j][2]); + OUT_CS_32F(vertex->data[j][0]); + OUT_CS_32F(vertex->data[j][1]); + OUT_CS_32F(vertex->data[j][2]); break; case EMIT_4F: - CS_OUT_32F(vertex->data[j][0]); - CS_OUT_32F(vertex->data[j][1]); - CS_OUT_32F(vertex->data[j][2]); - CS_OUT_32F(vertex->data[j][3]); + OUT_CS_32F(vertex->data[j][0]); + OUT_CS_32F(vertex->data[j][1]); + OUT_CS_32F(vertex->data[j][2]); + OUT_CS_32F(vertex->data[j][3]); break; default: debug_printf("r300: Unknown emit value %d\n", -- cgit v1.2.3 From b16d4399892dbf8ab2c72a60b46bbc03ee5cd9a6 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Feb 2009 03:03:28 -0800 Subject: r300-gallium: Include-guard r300_emit.h --- src/gallium/drivers/r300/r300_emit.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 7642cfb39e..f21ca33171 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -20,6 +20,9 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#ifndef R300_EMIT_H +#define R300_EMIT_H + #include "util/u_math.h" #include "r300_context.h" @@ -48,3 +51,9 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs); void r300_emit_scissor_state(struct r300_context* r300, struct r300_scissor_state* scissor); + + +/* Emit all dirty state. */ +void r300_emit_dirty_state(struct r300_context* r300); + +#endif /* R300_EMIT_H */ -- cgit v1.2.3 From 18f20b70b15f5daed28eb9f4fce1eccd46cf82d3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Feb 2009 03:13:16 -0800 Subject: r300-gallium: Ooops, forgot to apply this stash. "git stash": The cause of, and solution to, all my problems. --- src/gallium/drivers/r300/r300_state_derived.c | 20 ++++++++++++++++++++ src/gallium/drivers/r300/r300_state_derived.h | 2 ++ 2 files changed, 22 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index fc2730d4c6..df19f20fc8 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -107,8 +107,28 @@ static void r300_update_vertex_layout(struct r300_context* r300) vinfo.hwfmt[1] |= (4 << (3 * i)); } + draw_compute_vertex_size(&vinfo); + if (memcmp(&r300->vertex_info, &vinfo, sizeof(struct vertex_info))) { memcpy(&r300->vertex_info, &vinfo, sizeof(struct vertex_info)); r300->dirty_state |= R300_NEW_VERTEX_FORMAT; } } + +/* Set up the RS block. This is the part of the chipset that actually does + * the rasterization of vertices into fragments. This is also the part of the + * chipset that locks up if any part of it is even slightly wrong. */ +void r300_update_rs_block(struct r300_context* r300) +{ +} + +void r300_update_derived_state(struct r300_context* r300) +{ + if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) { + r300_update_vertex_layout(r300); + } + + if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) { + r300_update_rs_block(r300); + } +} diff --git a/src/gallium/drivers/r300/r300_state_derived.h b/src/gallium/drivers/r300/r300_state_derived.h index 11d0787d12..72ba6b928d 100644 --- a/src/gallium/drivers/r300/r300_state_derived.h +++ b/src/gallium/drivers/r300/r300_state_derived.h @@ -28,4 +28,6 @@ #include "r300_context.h" #include "r300_reg.h" +void r300_update_derived_state(struct r300_context* r300); + #endif /* R300_STATE_DERIVED_H */ -- cgit v1.2.3 From 1bb2fb498ee65ba29aa4098983116be3d81cc2da Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Feb 2009 03:33:56 -0800 Subject: r300-gallium: Set up draw rasterizer. --- src/gallium/drivers/r300/r300_context.h | 3 +++ src/gallium/drivers/r300/r300_state.c | 9 +++++++-- 2 files changed, 10 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 53e41bf76d..a3727c8fb4 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -59,6 +59,9 @@ struct r300_dsa_state { }; struct r300_rs_state { + /* XXX icky as fucking hell */ + struct pipe_rasterizer_state rs; + uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */ uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 559844f9b4..eae1a5698d 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -222,7 +222,7 @@ static void PIPE_BUFFER_USAGE_CPU_READ); memcpy(r300->shader_constants[shader].constants, map, buffer->buffer->size); - pipe->winsys->buffer_unmap(pipe->winsys, map); + pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer); r300->shader_constants[shader].user_count = buffer->buffer->size / (sizeof(float) * 4); @@ -542,6 +542,8 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->line_stipple_value = state->line_stipple_pattern; } + rs->rs = *state; + return (void*)rs; } @@ -549,8 +551,11 @@ static void* r300_create_rs_state(struct pipe_context* pipe, static void r300_bind_rs_state(struct pipe_context* pipe, void* state) { struct r300_context* r300 = r300_context(pipe); + struct r300_rs_state* rs = (struct r300_rs_state*)state; + + draw_set_rasterizer_state(r300->draw, &rs->rs); - r300->rs_state = (struct r300_rs_state*)state; + r300->rs_state = rs; r300->dirty_state |= R300_NEW_RASTERIZER; } -- cgit v1.2.3 From f211da4c67fbe0e67475efcd9535b9cf9e5ae467 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Feb 2009 03:55:16 -0800 Subject: r300-gallium: Fix BEGIN_CS and END_CS counting and mismatch. --- src/gallium/drivers/r300/r300_emit.c | 3 ++- src/gallium/drivers/r300/r300_surface.c | 2 +- src/gallium/drivers/r300/r300_swtcl_emit.c | 5 +---- 3 files changed, 4 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 32c9681d2b..a2819294a4 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -194,7 +194,7 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) struct r300_screen* r300screen = (struct r300_screen*)r300->context.screen; CS_LOCALS(r300); - BEGIN_CS(14); + BEGIN_CS(13); OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status); OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6); OUT_CS(rs->depth_scale_front); @@ -216,6 +216,7 @@ void r300_emit_scissor_state(struct r300_context* r300, OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); OUT_CS(scissor->scissor_top_left); OUT_CS(scissor->scissor_bottom_right); + END_CS; } /* Emit all dirty state. */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 0a4710151a..b2c4f4251d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -54,7 +54,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } - BEGIN_CS(161 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); + BEGIN_CS(163 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index ca078d63e0..76ef48962b 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -48,8 +48,6 @@ static INLINE void r300_emit_vertex(struct r300_context* r300, CS_LOCALS(r300); uint i, j; - BEGIN_CS(vinfo->size); - for (i = 0; i < vinfo->num_attribs; i++) { j = vinfo->attrib[i].src_index; switch (vinfo->attrib[i].emit) { @@ -77,8 +75,6 @@ static INLINE void r300_emit_vertex(struct r300_context* r300, break; } } - - END_CS; } static INLINE void r300_emit_prim(struct draw_stage* draw, @@ -96,6 +92,7 @@ static INLINE void r300_emit_prim(struct draw_stage* draw, OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); OUT_CS(r300->vertex_info.hwfmt[0]); OUT_CS(r300->vertex_info.hwfmt[1]); + END_CS; BEGIN_CS(2 + (count * r300->vertex_info.size) + 2); OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, count)); -- cgit v1.2.3 From ffbe28d25d755bc51d9f865ac176a110f6f8f5e0 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Feb 2009 03:56:03 -0800 Subject: r300-gallium: Add verbosity level to debugging. Makes it a bit more manageable to read through the console logs. --- src/gallium/drivers/r300/r300_cs.h | 14 +++++++++----- src/gallium/drivers/r300/r300_cs_inlines.h | 5 +++-- 2 files changed, 12 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 3049702a94..d8038ff1e1 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -34,6 +34,8 @@ #define MAX_CS_SIZE 64 * 1024 / 4 +#define VERY_VERBOSE_REGISTERS 0 + /* XXX stolen from radeon_drm.h */ #define RADEON_GEM_DOMAIN_CPU 0x1 #define RADEON_GEM_DOMAIN_GTT 0x2 @@ -75,8 +77,9 @@ } while (0) #define OUT_CS_REG(register, value) do { \ - debug_printf("r300: writing 0x%08X to register 0x%04X\n", \ - value, register); \ + if (VERY_VERBOSE_REGISTERS) \ + debug_printf("r300: writing 0x%08X to register 0x%04X\n", \ + value, register); \ assert(register); \ OUT_CS(CP_PACKET0(register, 0)); \ OUT_CS(value); \ @@ -85,8 +88,9 @@ /* Note: This expects count to be the number of registers, * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ - debug_printf("r300: writing register sequence of %d to 0x%04X\n", \ - count, register); \ + if (VERY_VERBOSE_REGISTERS) \ + debug_printf("r300: writing register sequence of %d to 0x%04X\n", \ + count, register); \ assert(register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) @@ -109,7 +113,7 @@ } while (0) #define FLUSH_CS do { \ - debug_printf("r300: FLUSH_CS in %s (%s:%d)\n", __FUNCTION__, __FILE__, \ + debug_printf("r300: FLUSH_CS in %s (%s:%d)\n\n", __FUNCTION__, __FILE__, \ __LINE__); \ cs_winsys->flush_cs(cs); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h index db931fd485..03bb608eb9 100644 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -29,8 +29,9 @@ #define RADEON_ONE_REG_WR (1 << 15) #define OUT_CS_ONE_REG(register, count) do { \ - debug_printf("r300: writing data sequence of %d to 0x%04X\n", \ - count, register); \ + if (VERY_VERBOSE_REGISTERS) \ + debug_printf("r300: writing data sequence of %d to 0x%04X\n", \ + count, register); \ assert(register); \ OUT_CS(CP_PACKET0(register, ((count) - 1)) | RADEON_ONE_REG_WR); \ } while (0) -- cgit v1.2.3 From d25304a2f7fd8dedf95bc3a5f195c63cbc1c1836 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Feb 2009 21:30:55 -0800 Subject: r300-gallium: Consolidate state updates. --- src/gallium/drivers/r300/r300_emit.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index a2819294a4..0c86a9c92d 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -230,18 +230,23 @@ void r300_emit_dirty_state(struct r300_context* r300) return; } + r300_update_derived_state(r300); + /* XXX check size */ if (r300->dirty_state & R300_NEW_BLEND) { r300_emit_blend_state(r300, r300->blend_state); + r300->dirty_state &= ~R300_NEW_BLEND; } if (r300->dirty_state & R300_NEW_BLEND_COLOR) { r300_emit_blend_color_state(r300, r300->blend_color_state); + r300->dirty_state &= ~R300_NEW_BLEND_COLOR; } if (r300->dirty_state & R300_NEW_DSA) { r300_emit_dsa_state(r300, r300->dsa_state); + r300->dirty_state &= ~R300_NEW_DSA; } if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) { @@ -252,15 +257,16 @@ void r300_emit_dirty_state(struct r300_context* r300) r300_emit_fragment_shader(r300, (struct r300_fragment_shader*)r300->fs); } + r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER; } if (r300->dirty_state & R300_NEW_RASTERIZER) { r300_emit_rs_state(r300, r300->rs_state); + r300->dirty_state &= ~R300_NEW_RASTERIZER; } if (r300->dirty_state & R300_NEW_SCISSOR) { r300_emit_scissor_state(r300, r300->scissor_state); + r300->dirty_state &= ~R300_NEW_SCISSOR; } - - r300->dirty_state = 0; } -- cgit v1.2.3 From c613e366a9c6ab9631f8101851163caec7437237 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Feb 2009 21:31:33 -0800 Subject: r300-gallium: Properly init shader state. --- src/gallium/drivers/r300/r300_state.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index eae1a5698d..c8533d764d 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -435,6 +435,8 @@ static void* r300_create_fs_state(struct pipe_context* pipe, /* Copy state directly into shader. */ fs->state = *shader; + tgsi_scan_shader(shader->tokens, &fs->info); + return (void*)fs; } -- cgit v1.2.3 From ea4bf267e4b023b08043f91ac44592fed1736e7f Mon Sep 17 00:00:00 2001 From: José Fonseca Date: Wed, 18 Feb 2009 12:05:26 +0000 Subject: util: Move p_debug.h into util module. The debug functions depend on several util function for os abstractions, and these depend on debug functions, so a seperate module is not possible. --- src/gallium/auxiliary/cso_cache/cso_cache.c | 2 +- src/gallium/auxiliary/cso_cache/cso_hash.c | 2 +- src/gallium/auxiliary/draw/draw_pipe_vbuf.c | 4 +- src/gallium/auxiliary/draw/draw_vs_aos.c | 2 +- src/gallium/auxiliary/gallivm/storagesoa.cpp | 2 +- src/gallium/auxiliary/indices/u_indices_gen.c | 2 +- src/gallium/auxiliary/indices/u_indices_gen.py | 2 +- src/gallium/auxiliary/pipebuffer/pb_buffer.h | 2 +- .../auxiliary/pipebuffer/pb_buffer_fenced.c | 2 +- .../auxiliary/pipebuffer/pb_buffer_fenced.h | 2 +- .../auxiliary/pipebuffer/pb_buffer_malloc.c | 2 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_alt.c | 2 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c | 2 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c | 2 +- .../auxiliary/pipebuffer/pb_bufmgr_fenced.c | 2 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c | 2 +- .../auxiliary/pipebuffer/pb_bufmgr_ondemand.c | 2 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c | 2 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c | 2 +- src/gallium/auxiliary/pipebuffer/pb_validate.c | 2 +- src/gallium/auxiliary/rtasm/rtasm_cpu.c | 2 +- src/gallium/auxiliary/rtasm/rtasm_execmem.c | 2 +- src/gallium/auxiliary/rtasm/rtasm_ppc.c | 2 +- src/gallium/auxiliary/rtasm/rtasm_x86sse.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_build.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_dump.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_dump_c.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_info.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_iterate.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_parse.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_ppc.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_sanity.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_sse2.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_text.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_transform.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_util.c | 2 +- src/gallium/auxiliary/util/Makefile | 2 +- src/gallium/auxiliary/util/SConscript | 6 +- src/gallium/auxiliary/util/p_debug.c | 782 --------------------- src/gallium/auxiliary/util/p_debug_mem.c | 311 -------- src/gallium/auxiliary/util/p_debug_prof.c | 320 --------- src/gallium/auxiliary/util/u_blit.c | 2 +- src/gallium/auxiliary/util/u_cache.c | 2 +- src/gallium/auxiliary/util/u_debug.c | 782 +++++++++++++++++++++ src/gallium/auxiliary/util/u_debug.h | 361 ++++++++++ src/gallium/auxiliary/util/u_debug_memory.c | 311 ++++++++ src/gallium/auxiliary/util/u_debug_profile.c | 320 +++++++++ src/gallium/auxiliary/util/u_gen_mipmap.c | 2 +- src/gallium/auxiliary/util/u_handle_table.c | 2 +- src/gallium/auxiliary/util/u_hash_table.c | 2 +- src/gallium/auxiliary/util/u_keymap.c | 2 +- src/gallium/auxiliary/util/u_linear.c | 2 +- src/gallium/auxiliary/util/u_math.h | 2 +- src/gallium/auxiliary/util/u_memory.h | 4 +- src/gallium/auxiliary/util/u_mm.c | 2 +- src/gallium/auxiliary/util/u_simple_shaders.c | 2 +- src/gallium/drivers/cell/spu/spu_util.c | 2 +- src/gallium/drivers/i915simple/i915_debug.c | 2 +- src/gallium/drivers/i915simple/i915_prim_vbuf.c | 2 +- src/gallium/drivers/i965simple/brw_eu_debug.c | 2 +- src/gallium/drivers/nouveau/nouveau_stateobj.h | 2 +- src/gallium/drivers/nv04/nv04_prim_vbuf.c | 2 +- src/gallium/drivers/nv10/nv10_prim_vbuf.c | 2 +- src/gallium/drivers/nv20/nv20_prim_vbuf.c | 2 +- src/gallium/drivers/r300/r300_chipset.c | 2 +- src/gallium/drivers/r300/r300_state.c | 2 +- src/gallium/drivers/trace/tr_context.h | 2 +- src/gallium/drivers/trace/tr_dump.c | 2 +- src/gallium/drivers/trace/tr_winsys.h | 2 +- src/gallium/include/pipe/p_debug.h | 361 ---------- src/gallium/include/pipe/p_format.h | 3 +- src/gallium/state_trackers/wgl/icd/stw_icd.c | 2 +- src/gallium/state_trackers/wgl/shared/stw_device.c | 2 +- .../state_trackers/wgl/shared/stw_pixelformat.c | 2 +- src/gallium/state_trackers/wgl/wgl/stw_wgl.c | 2 +- src/gallium/winsys/xlib/xlib_brw_aub.c | 2 +- src/mesa/state_tracker/st_mesa_to_tgsi.c | 2 +- 77 files changed, 1848 insertions(+), 1847 deletions(-) delete mode 100644 src/gallium/auxiliary/util/p_debug.c delete mode 100644 src/gallium/auxiliary/util/p_debug_mem.c delete mode 100644 src/gallium/auxiliary/util/p_debug_prof.c create mode 100644 src/gallium/auxiliary/util/u_debug.c create mode 100644 src/gallium/auxiliary/util/u_debug.h create mode 100644 src/gallium/auxiliary/util/u_debug_memory.c create mode 100644 src/gallium/auxiliary/util/u_debug_profile.c delete mode 100644 src/gallium/include/pipe/p_debug.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/auxiliary/cso_cache/cso_cache.c b/src/gallium/auxiliary/cso_cache/cso_cache.c index 6b1754ea00..0bc77a5728 100644 --- a/src/gallium/auxiliary/cso_cache/cso_cache.c +++ b/src/gallium/auxiliary/cso_cache/cso_cache.c @@ -28,7 +28,7 @@ /* Authors: Zack Rusin */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_memory.h" diff --git a/src/gallium/auxiliary/cso_cache/cso_hash.c b/src/gallium/auxiliary/cso_cache/cso_hash.c index 4e7664f9bf..288cef7b6f 100644 --- a/src/gallium/auxiliary/cso_cache/cso_hash.c +++ b/src/gallium/auxiliary/cso_cache/cso_hash.c @@ -30,7 +30,7 @@ * Zack Rusin */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_memory.h" #include "cso_hash.h" diff --git a/src/gallium/auxiliary/draw/draw_pipe_vbuf.c b/src/gallium/auxiliary/draw/draw_pipe_vbuf.c index 9153bc2f86..0c4e9412e2 100644 --- a/src/gallium/auxiliary/draw/draw_pipe_vbuf.c +++ b/src/gallium/auxiliary/draw/draw_pipe_vbuf.c @@ -29,12 +29,12 @@ * \file * Vertex buffer drawing stage. * - * \author José Fonseca + * \author Jose Fonseca * \author Keith Whitwell */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_math.h" #include "util/u_memory.h" diff --git a/src/gallium/auxiliary/draw/draw_vs_aos.c b/src/gallium/auxiliary/draw/draw_vs_aos.c index 78d139fd7d..46a36af418 100644 --- a/src/gallium/auxiliary/draw/draw_vs_aos.c +++ b/src/gallium/auxiliary/draw/draw_vs_aos.c @@ -32,7 +32,7 @@ #include "util/u_memory.h" #include "util/u_math.h" #include "pipe/p_shader_tokens.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_util.h" #include "tgsi/tgsi_exec.h" diff --git a/src/gallium/auxiliary/gallivm/storagesoa.cpp b/src/gallium/auxiliary/gallivm/storagesoa.cpp index e1e5cabcf5..4984ce985c 100644 --- a/src/gallium/auxiliary/gallivm/storagesoa.cpp +++ b/src/gallium/auxiliary/gallivm/storagesoa.cpp @@ -30,7 +30,7 @@ #include "gallivm_p.h" #include "pipe/p_shader_tokens.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include #include diff --git a/src/gallium/auxiliary/indices/u_indices_gen.c b/src/gallium/auxiliary/indices/u_indices_gen.c index 4c05b3eedb..3c981e5d7f 100644 --- a/src/gallium/auxiliary/indices/u_indices_gen.c +++ b/src/gallium/auxiliary/indices/u_indices_gen.c @@ -34,7 +34,7 @@ #include "indices/u_indices.h" #include "indices/u_indices_priv.h" #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_defines.h" #include "util/u_memory.h" diff --git a/src/gallium/auxiliary/indices/u_indices_gen.py b/src/gallium/auxiliary/indices/u_indices_gen.py index 0dc58d0cd0..af63d09930 100644 --- a/src/gallium/auxiliary/indices/u_indices_gen.py +++ b/src/gallium/auxiliary/indices/u_indices_gen.py @@ -72,7 +72,7 @@ def prolog(): #include "indices/u_indices.h" #include "indices/u_indices_priv.h" #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_defines.h" #include "util/u_memory.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer.h b/src/gallium/auxiliary/pipebuffer/pb_buffer.h index d8f1f02d68..e6b0b30ff4 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_buffer.h +++ b/src/gallium/auxiliary/pipebuffer/pb_buffer.h @@ -45,7 +45,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_error.h" #include "pipe/p_state.h" #include "pipe/p_inlines.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c index f9e6226436..0cddc95aa6 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c +++ b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c @@ -43,7 +43,7 @@ #include "pipe/p_compiler.h" #include "pipe/p_error.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_thread.h" #include "util/u_memory.h" #include "util/u_double_list.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.h b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.h index d1c9d4c17d..c2b29e974b 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.h +++ b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.h @@ -51,7 +51,7 @@ #define PB_BUFFER_FENCED_H_ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #ifdef __cplusplus diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer_malloc.c b/src/gallium/auxiliary/pipebuffer/pb_buffer_malloc.c index 53f497cfb0..282802b171 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_buffer_malloc.c +++ b/src/gallium/auxiliary/pipebuffer/pb_buffer_malloc.c @@ -34,7 +34,7 @@ */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_memory.h" #include "pb_buffer.h" #include "pb_bufmgr.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_alt.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_alt.c index c956924cc7..db67d46c56 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_alt.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_alt.c @@ -34,7 +34,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_memory.h" #include "pb_buffer.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c index a168853713..29117efe9b 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c @@ -35,7 +35,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_thread.h" #include "util/u_memory.h" #include "util/u_double_list.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c index 26d9c24aec..070bf3f517 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c @@ -34,7 +34,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_thread.h" #include "util/u_math.h" #include "util/u_memory.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_fenced.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_fenced.c index 47e9fee533..e352f5357b 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_fenced.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_fenced.c @@ -34,7 +34,7 @@ */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_memory.h" #include "pb_buffer.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c index 2f5a5d8ea0..f3b1ca73b0 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c @@ -34,7 +34,7 @@ #include "pipe/p_defines.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_thread.h" #include "util/u_memory.h" #include "util/u_double_list.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_ondemand.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_ondemand.c index ba02a84e62..3d9c7bba0b 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_ondemand.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_ondemand.c @@ -34,7 +34,7 @@ */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_memory.h" #include "pb_buffer.h" #include "pb_bufmgr.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c index a6ff37653e..12447acfd9 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c @@ -36,7 +36,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_thread.h" #include "pipe/p_defines.h" #include "util/u_memory.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c index 9b9fedccb4..a3259351b9 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c @@ -38,7 +38,7 @@ #include "pipe/p_compiler.h" #include "pipe/p_error.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_thread.h" #include "pipe/p_defines.h" #include "util/u_memory.h" diff --git a/src/gallium/auxiliary/pipebuffer/pb_validate.c b/src/gallium/auxiliary/pipebuffer/pb_validate.c index 94532bb4ce..150fd50618 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_validate.c +++ b/src/gallium/auxiliary/pipebuffer/pb_validate.c @@ -36,7 +36,7 @@ #include "pipe/p_compiler.h" #include "pipe/p_error.h" #include "util/u_memory.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pb_buffer.h" #include "pb_buffer_fenced.h" diff --git a/src/gallium/auxiliary/rtasm/rtasm_cpu.c b/src/gallium/auxiliary/rtasm/rtasm_cpu.c index 5499018b21..03bdd47238 100644 --- a/src/gallium/auxiliary/rtasm/rtasm_cpu.c +++ b/src/gallium/auxiliary/rtasm/rtasm_cpu.c @@ -26,7 +26,7 @@ **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "rtasm_cpu.h" diff --git a/src/gallium/auxiliary/rtasm/rtasm_execmem.c b/src/gallium/auxiliary/rtasm/rtasm_execmem.c index be7433baf8..5acc5bcb7b 100644 --- a/src/gallium/auxiliary/rtasm/rtasm_execmem.c +++ b/src/gallium/auxiliary/rtasm/rtasm_execmem.c @@ -31,7 +31,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_thread.h" #include "util/u_memory.h" diff --git a/src/gallium/auxiliary/rtasm/rtasm_ppc.c b/src/gallium/auxiliary/rtasm/rtasm_ppc.c index 1bb9026205..e3586482db 100644 --- a/src/gallium/auxiliary/rtasm/rtasm_ppc.c +++ b/src/gallium/auxiliary/rtasm/rtasm_ppc.c @@ -38,7 +38,7 @@ #include #include "util/u_memory.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "rtasm_execmem.h" #include "rtasm_ppc.h" diff --git a/src/gallium/auxiliary/rtasm/rtasm_x86sse.c b/src/gallium/auxiliary/rtasm/rtasm_x86sse.c index 99ee74cf14..57fcf6de2a 100644 --- a/src/gallium/auxiliary/rtasm/rtasm_x86sse.c +++ b/src/gallium/auxiliary/rtasm/rtasm_x86sse.c @@ -26,7 +26,7 @@ #if defined(PIPE_ARCH_X86) #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_pointer.h" #include "rtasm_execmem.h" diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c b/src/gallium/auxiliary/tgsi/tgsi_build.c index 17886540cf..a1891a140a 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_build.c +++ b/src/gallium/auxiliary/tgsi/tgsi_build.c @@ -25,7 +25,7 @@ * **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_shader_tokens.h" #include "tgsi_build.h" #include "tgsi_parse.h" diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c b/src/gallium/auxiliary/tgsi/tgsi_dump.c index ab2b1f2c58..d57cb9139f 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_dump.c +++ b/src/gallium/auxiliary/tgsi/tgsi_dump.c @@ -25,7 +25,7 @@ * **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_string.h" #include "tgsi_dump.h" #include "tgsi_info.h" diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump_c.c b/src/gallium/auxiliary/tgsi/tgsi_dump_c.c index 2ecf1e2f14..3dc61c48ca 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_dump_c.c +++ b/src/gallium/auxiliary/tgsi/tgsi_dump_c.c @@ -25,7 +25,7 @@ * **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_string.h" #include "tgsi_dump_c.h" #include "tgsi_build.h" diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c index 68c7a6b7f5..2b8a6f0fb1 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_info.c +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c @@ -25,7 +25,7 @@ * **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "tgsi_info.h" static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] = diff --git a/src/gallium/auxiliary/tgsi/tgsi_iterate.c b/src/gallium/auxiliary/tgsi/tgsi_iterate.c index 5371a88b96..d88c2558d8 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_iterate.c +++ b/src/gallium/auxiliary/tgsi/tgsi_iterate.c @@ -25,7 +25,7 @@ * **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "tgsi_iterate.h" boolean diff --git a/src/gallium/auxiliary/tgsi/tgsi_parse.c b/src/gallium/auxiliary/tgsi/tgsi_parse.c index d374b16f9a..22006edf3d 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_parse.c +++ b/src/gallium/auxiliary/tgsi/tgsi_parse.c @@ -25,7 +25,7 @@ * **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_shader_tokens.h" #include "tgsi_parse.h" #include "tgsi_build.h" diff --git a/src/gallium/auxiliary/tgsi/tgsi_ppc.c b/src/gallium/auxiliary/tgsi/tgsi_ppc.c index f365030e52..0c64ae5713 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_ppc.c +++ b/src/gallium/auxiliary/tgsi/tgsi_ppc.c @@ -33,7 +33,7 @@ #if defined(PIPE_ARCH_PPC) -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_shader_tokens.h" #include "util/u_math.h" #include "util/u_memory.h" diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c index bc7b941b78..76e773da91 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c +++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c @@ -25,7 +25,7 @@ * **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "tgsi_sanity.h" #include "tgsi_info.h" #include "tgsi_iterate.h" diff --git a/src/gallium/auxiliary/tgsi/tgsi_sse2.c b/src/gallium/auxiliary/tgsi/tgsi_sse2.c index a183603aea..d70bcd03c5 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_sse2.c +++ b/src/gallium/auxiliary/tgsi/tgsi_sse2.c @@ -29,7 +29,7 @@ #if defined(PIPE_ARCH_X86) -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_shader_tokens.h" #include "util/u_math.h" #if defined(PIPE_ARCH_SSE) diff --git a/src/gallium/auxiliary/tgsi/tgsi_text.c b/src/gallium/auxiliary/tgsi/tgsi_text.c index 1e822fbbea..58fe07c11d 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_text.c +++ b/src/gallium/auxiliary/tgsi/tgsi_text.c @@ -25,7 +25,7 @@ * **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "tgsi_text.h" #include "tgsi_build.h" #include "tgsi_info.h" diff --git a/src/gallium/auxiliary/tgsi/tgsi_transform.c b/src/gallium/auxiliary/tgsi/tgsi_transform.c index ea87da31e5..062c1be938 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_transform.c +++ b/src/gallium/auxiliary/tgsi/tgsi_transform.c @@ -31,7 +31,7 @@ * Authors: Brian Paul */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "tgsi_transform.h" diff --git a/src/gallium/auxiliary/tgsi/tgsi_util.c b/src/gallium/auxiliary/tgsi/tgsi_util.c index 50101a9bb0..71f8a6ca40 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_util.c +++ b/src/gallium/auxiliary/tgsi/tgsi_util.c @@ -25,7 +25,7 @@ * **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_shader_tokens.h" #include "tgsi_parse.h" #include "tgsi_build.h" diff --git a/src/gallium/auxiliary/util/Makefile b/src/gallium/auxiliary/util/Makefile index 44c2377721..671e671df2 100644 --- a/src/gallium/auxiliary/util/Makefile +++ b/src/gallium/auxiliary/util/Makefile @@ -4,7 +4,7 @@ include $(TOP)/configs/current LIBNAME = util C_SOURCES = \ - p_debug.c \ + u_debug.c \ u_blit.c \ u_cache.c \ u_draw_quad.c \ diff --git a/src/gallium/auxiliary/util/SConscript b/src/gallium/auxiliary/util/SConscript index 35f683fb8e..84e4c48476 100644 --- a/src/gallium/auxiliary/util/SConscript +++ b/src/gallium/auxiliary/util/SConscript @@ -3,11 +3,11 @@ Import('*') util = env.ConvenienceLibrary( target = 'util', source = [ - 'p_debug.c', - 'p_debug_mem.c', - 'p_debug_prof.c', 'u_blit.c', 'u_cache.c', + 'u_debug.c', + 'u_debug_memory.c', + 'u_debug_profile.c', 'u_draw_quad.c', 'u_gen_mipmap.c', 'u_handle_table.c', diff --git a/src/gallium/auxiliary/util/p_debug.c b/src/gallium/auxiliary/util/p_debug.c deleted file mode 100644 index f373f941dd..0000000000 --- a/src/gallium/auxiliary/util/p_debug.c +++ /dev/null @@ -1,782 +0,0 @@ -/************************************************************************** - * - * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. - * Copyright (c) 2008 VMware, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - - -#include "pipe/p_config.h" - -#include - - -#ifdef PIPE_SUBSYSTEM_WINDOWS_DISPLAY - -#include -#include - -#elif defined(PIPE_SUBSYSTEM_WINDOWS_CE) - -#include -#include -#include -#include - -#elif defined(PIPE_SUBSYSTEM_WINDOWS_USER) - -#ifndef WIN32_LEAN_AND_MEAN -#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers -#endif -#include - -#else - -#include -#include - -#endif - -#include "pipe/p_compiler.h" -#include "pipe/p_debug.h" -#include "pipe/p_format.h" -#include "pipe/p_state.h" -#include "pipe/p_inlines.h" -#include "util/u_memory.h" -#include "util/u_string.h" -#include "util/u_stream.h" -#include "util/u_math.h" -#include "util/u_tile.h" - - -#ifdef PIPE_SUBSYSTEM_WINDOWS_DISPLAY -static INLINE void -_EngDebugPrint(const char *format, ...) -{ - va_list ap; - va_start(ap, format); - EngDebugPrint("", (PCHAR)format, ap); - va_end(ap); -} -#endif - - -void _debug_vprintf(const char *format, va_list ap) -{ -#if defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) - /* EngDebugPrint does not handle float point arguments, so we need to use - * our own vsnprintf implementation. It is also very slow, so buffer until - * we find a newline. */ - static char buf[512] = {'\0'}; - size_t len = strlen(buf); - int ret = util_vsnprintf(buf + len, sizeof(buf) - len, format, ap); - if(ret > (int)(sizeof(buf) - len - 1) || util_strchr(buf + len, '\n')) { - _EngDebugPrint("%s", buf); - buf[0] = '\0'; - } -#elif defined(PIPE_SUBSYSTEM_WINDOWS_USER) - /* EngDebugPrint does not handle float point arguments, so we need to use - * our own vsnprintf implementation. It is also very slow, so buffer until - * we find a newline. */ - static char buf[512 + 1] = {'\0'}; - size_t len = strlen(buf); - int ret = util_vsnprintf(buf + len, sizeof(buf) - len, format, ap); - if(ret > (int)(sizeof(buf) - len - 1) || util_strchr(buf + len, '\n')) { - OutputDebugStringA(buf); - buf[0] = '\0'; - } -#elif defined(PIPE_SUBSYSTEM_WINDOWS_CE) - wchar_t *wide_format; - long wide_str_len; - char buf[512]; - int ret; -#if (_WIN32_WCE < 600) - ret = vsprintf(buf, format, ap); - if(ret < 0){ - sprintf(buf, "Cant handle debug print!"); - ret = 25; - } -#else - ret = vsprintf_s(buf, 512, format, ap); - if(ret < 0){ - sprintf_s(buf, 512, "Cant handle debug print!"); - ret = 25; - } -#endif - buf[ret] = '\0'; - /* Format is ascii - needs to be converted to wchar_t for printing */ - wide_str_len = MultiByteToWideChar(CP_ACP, 0, (const char *) buf, -1, NULL, 0); - wide_format = (wchar_t *) malloc((wide_str_len+1) * sizeof(wchar_t)); - if (wide_format) { - MultiByteToWideChar(CP_ACP, 0, (const char *) buf, -1, - wide_format, wide_str_len); - NKDbgPrintfW(wide_format, wide_format); - free(wide_format); - } -#elif defined(PIPE_SUBSYSTEM_WINDOWS_MINIPORT) - /* TODO */ -#else /* !PIPE_SUBSYSTEM_WINDOWS */ -#ifdef DEBUG - vfprintf(stderr, format, ap); -#endif -#endif -} - - -#ifdef DEBUG -void debug_print_blob( const char *name, - const void *blob, - unsigned size ) -{ - const unsigned *ublob = (const unsigned *)blob; - unsigned i; - - debug_printf("%s (%d dwords%s)\n", name, size/4, - size%4 ? "... plus a few bytes" : ""); - - for (i = 0; i < size/4; i++) { - debug_printf("%d:\t%08x\n", i, ublob[i]); - } -} -#endif - - -void _debug_break(void) -{ -#if defined(PIPE_ARCH_X86) && defined(PIPE_CC_GCC) - __asm("int3"); -#elif defined(PIPE_ARCH_X86) && defined(PIPE_CC_MSVC) - _asm {int 3}; -#elif defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) - EngDebugBreak(); -#else - abort(); -#endif -} - - -#ifdef PIPE_SUBSYSTEM_WINDOWS_DISPLAY -static const char * -find(const char *start, const char *end, char c) -{ - const char *p; - for(p = start; !end || p != end; ++p) { - if(*p == c) - return p; - if(*p < 32) - break; - } - return NULL; -} - -static int -compare(const char *start, const char *end, const char *s) -{ - const char *p, *q; - for(p = start, q = s; p != end && *q != '\0'; ++p, ++q) { - if(*p != *q) - return 0; - } - return p == end && *q == '\0'; -} - -static void -copy(char *dst, const char *start, const char *end, size_t n) -{ - const char *p; - char *q; - for(p = start, q = dst, n = n - 1; p != end && n; ++p, ++q, --n) - *q = *p; - *q = '\0'; -} -#endif - - -static INLINE const char * -_debug_get_option(const char *name) -{ -#if defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) - /* EngMapFile creates the file if it does not exists, so it must either be - * disabled on release versions (or put in a less conspicuous place). */ -#ifdef DEBUG - const char *result = NULL; - ULONG_PTR iFile = 0; - const void *pMap = NULL; - const char *sol, *eol, *sep; - static char output[1024]; - - pMap = EngMapFile(L"\\??\\c:\\gallium.cfg", 0, &iFile); - if(pMap) { - sol = (const char *)pMap; - while(1) { - /* TODO: handle LF line endings */ - eol = find(sol, NULL, '\r'); - if(!eol || eol == sol) - break; - sep = find(sol, eol, '='); - if(!sep) - break; - if(compare(sol, sep, name)) { - copy(output, sep + 1, eol, sizeof(output)); - result = output; - break; - } - sol = eol + 2; - } - EngUnmapFile(iFile); - } - return result; -#else - return NULL; -#endif -#elif defined(PIPE_SUBSYSTEM_WINDOWS_CE) || defined(PIPE_SUBSYSTEM_WINDOWS_MINIPORT) - /* TODO: implement */ - return NULL; -#else - return getenv(name); -#endif -} - -const char * -debug_get_option(const char *name, const char *dfault) -{ - const char *result; - - result = _debug_get_option(name); - if(!result) - result = dfault; - - debug_printf("%s: %s = %s\n", __FUNCTION__, name, result ? result : "(null)"); - - return result; -} - -boolean -debug_get_bool_option(const char *name, boolean dfault) -{ - const char *str = _debug_get_option(name); - boolean result; - - if(str == NULL) - result = dfault; - else if(!util_strcmp(str, "n")) - result = FALSE; - else if(!util_strcmp(str, "no")) - result = FALSE; - else if(!util_strcmp(str, "0")) - result = FALSE; - else if(!util_strcmp(str, "f")) - result = FALSE; - else if(!util_strcmp(str, "false")) - result = FALSE; - else - result = TRUE; - - debug_printf("%s: %s = %s\n", __FUNCTION__, name, result ? "TRUE" : "FALSE"); - - return result; -} - - -long -debug_get_num_option(const char *name, long dfault) -{ - long result; - const char *str; - - str = _debug_get_option(name); - if(!str) - result = dfault; - else { - long sign; - char c; - c = *str++; - if(c == '-') { - sign = -1; - c = *str++; - } - else { - sign = 1; - } - result = 0; - while('0' <= c && c <= '9') { - result = result*10 + (c - '0'); - c = *str++; - } - result *= sign; - } - - debug_printf("%s: %s = %li\n", __FUNCTION__, name, result); - - return result; -} - - -unsigned long -debug_get_flags_option(const char *name, - const struct debug_named_value *flags, - unsigned long dfault) -{ - unsigned long result; - const char *str; - - str = _debug_get_option(name); - if(!str) - result = dfault; - else if (!util_strcmp(str, "help")) { - result = dfault; - while (flags->name) { - debug_printf("%s: help for %s: %s [0x%lx]\n", __FUNCTION__, name, flags->name, flags->value); - flags++; - } - } - else { - result = 0; - while( flags->name ) { - if (!util_strcmp(str, "all") || util_strstr(str, flags->name )) - result |= flags->value; - ++flags; - } - } - - if (str) { - debug_printf("%s: %s = 0x%lx (%s)\n", __FUNCTION__, name, result, str); - } - else { - debug_printf("%s: %s = 0x%lx\n", __FUNCTION__, name, result); - } - - return result; -} - - -void _debug_assert_fail(const char *expr, - const char *file, - unsigned line, - const char *function) -{ - _debug_printf("%s:%u:%s: Assertion `%s' failed.\n", file, line, function, expr); -#if defined(PIPE_OS_WINDOWS) && !defined(PIPE_SUBSYSTEM_WINDOWS_USER) - if (debug_get_bool_option("GALLIUM_ABORT_ON_ASSERT", FALSE)) -#else - if (debug_get_bool_option("GALLIUM_ABORT_ON_ASSERT", TRUE)) -#endif - debug_break(); - else - _debug_printf("continuing...\n"); -} - - -const char * -debug_dump_enum(const struct debug_named_value *names, - unsigned long value) -{ - static char rest[64]; - - while(names->name) { - if(names->value == value) - return names->name; - ++names; - } - - util_snprintf(rest, sizeof(rest), "0x%08lx", value); - return rest; -} - - -const char * -debug_dump_enum_noprefix(const struct debug_named_value *names, - const char *prefix, - unsigned long value) -{ - static char rest[64]; - - while(names->name) { - if(names->value == value) { - const char *name = names->name; - while (*name == *prefix) { - name++; - prefix++; - } - return name; - } - ++names; - } - - - - util_snprintf(rest, sizeof(rest), "0x%08lx", value); - return rest; -} - - -const char * -debug_dump_flags(const struct debug_named_value *names, - unsigned long value) -{ - static char output[4096]; - static char rest[256]; - int first = 1; - - output[0] = '\0'; - - while(names->name) { - if((names->value & value) == names->value) { - if (!first) - util_strncat(output, "|", sizeof(output)); - else - first = 0; - util_strncat(output, names->name, sizeof(output)); - value &= ~names->value; - } - ++names; - } - - if (value) { - if (!first) - util_strncat(output, "|", sizeof(output)); - else - first = 0; - - util_snprintf(rest, sizeof(rest), "0x%08lx", value); - util_strncat(output, rest, sizeof(output)); - } - - if(first) - return "0"; - - return output; -} - - -static const struct debug_named_value pipe_format_names[] = { -#ifdef DEBUG - DEBUG_NAMED_VALUE(PIPE_FORMAT_NONE), - DEBUG_NAMED_VALUE(PIPE_FORMAT_A8R8G8B8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_X8R8G8B8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_B8G8R8A8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_B8G8R8X8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_A1R5G5B5_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_A4R4G4B4_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R5G6B5_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_A2B10G10R10_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_L8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_A8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_I8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_A8L8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_L16_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_YCBCR), - DEBUG_NAMED_VALUE(PIPE_FORMAT_YCBCR_REV), - DEBUG_NAMED_VALUE(PIPE_FORMAT_Z16_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_Z32_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_Z32_FLOAT), - DEBUG_NAMED_VALUE(PIPE_FORMAT_S8Z24_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_Z24S8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_X8Z24_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_Z24X8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_S8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R64_FLOAT), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R64G64_FLOAT), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R64G64B64_FLOAT), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R64G64B64A64_FLOAT), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32_FLOAT), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32_FLOAT), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32_FLOAT), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32A32_FLOAT), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32A32_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32A32_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32A32_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32A32_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16A16_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16A16_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16A16_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16A16_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8A8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8X8_UNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8A8_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8X8_USCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8A8_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8X8_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_B6G5R5_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_A8B8G8R8_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_X8B8G8R8_SNORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8A8_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8X8_SSCALED), - DEBUG_NAMED_VALUE(PIPE_FORMAT_L8_SRGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_A8L8_SRGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8_SRGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8A8_SRGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8X8_SRGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_A8R8G8B8_SRGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_X8R8G8B8_SRGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_B8G8R8A8_SRGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_B8G8R8X8_SRGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_X8UB8UG8SR8S_NORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_B6UG5SR5S_NORM), - DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT1_RGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT1_RGBA), - DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT3_RGBA), - DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT5_RGBA), - DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT1_SRGB), - DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT1_SRGBA), - DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT3_SRGBA), - DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT5_SRGBA), -#endif - DEBUG_NAMED_VALUE_END -}; - -#ifdef DEBUG -void debug_print_format(const char *msg, unsigned fmt ) -{ - debug_printf("%s: %s\n", msg, debug_dump_enum(pipe_format_names, fmt)); -} -#endif - -const char *pf_name( enum pipe_format format ) -{ - return debug_dump_enum(pipe_format_names, format); -} - - -#ifdef DEBUG -void debug_dump_image(const char *prefix, - unsigned format, unsigned cpp, - unsigned width, unsigned height, - unsigned stride, - const void *data) -{ -#ifdef PIPE_SUBSYSTEM_WINDOWS_DISPLAY - static unsigned no = 0; - char filename[256]; - WCHAR wfilename[sizeof(filename)]; - ULONG_PTR iFile = 0; - struct { - unsigned format; - unsigned cpp; - unsigned width; - unsigned height; - } header; - unsigned char *pMap = NULL; - unsigned i; - - util_snprintf(filename, sizeof(filename), "\\??\\c:\\%03u%s.raw", ++no, prefix); - for(i = 0; i < sizeof(filename); ++i) - wfilename[i] = (WCHAR)filename[i]; - - pMap = (unsigned char *)EngMapFile(wfilename, sizeof(header) + height*width*cpp, &iFile); - if(!pMap) - return; - - header.format = format; - header.cpp = cpp; - header.width = width; - header.height = height; - memcpy(pMap, &header, sizeof(header)); - pMap += sizeof(header); - - for(i = 0; i < height; ++i) { - memcpy(pMap, (unsigned char *)data + stride*i, cpp*width); - pMap += cpp*width; - } - - EngUnmapFile(iFile); -#endif -} - -void debug_dump_surface(const char *prefix, - struct pipe_surface *surface) -{ - unsigned surface_usage; - void *data; - - if (!surface) - goto error1; - - /* XXX: force mappable surface */ - surface_usage = surface->usage; - surface->usage |= PIPE_BUFFER_USAGE_CPU_READ; - - data = pipe_surface_map(surface, - PIPE_BUFFER_USAGE_CPU_READ); - if(!data) - goto error2; - - debug_dump_image(prefix, - surface->format, - surface->block.size, - surface->nblocksx, - surface->nblocksy, - surface->stride, - data); - - pipe_surface_unmap(surface); -error2: - surface->usage = surface_usage; -error1: - ; -} - - -#pragma pack(push,2) -struct bmp_file_header { - uint16_t bfType; - uint32_t bfSize; - uint16_t bfReserved1; - uint16_t bfReserved2; - uint32_t bfOffBits; -}; -#pragma pack(pop) - -struct bmp_info_header { - uint32_t biSize; - int32_t biWidth; - int32_t biHeight; - uint16_t biPlanes; - uint16_t biBitCount; - uint32_t biCompression; - uint32_t biSizeImage; - int32_t biXPelsPerMeter; - int32_t biYPelsPerMeter; - uint32_t biClrUsed; - uint32_t biClrImportant; -}; - -struct bmp_rgb_quad { - uint8_t rgbBlue; - uint8_t rgbGreen; - uint8_t rgbRed; - uint8_t rgbAlpha; -}; - -void -debug_dump_surface_bmp(const char *filename, - struct pipe_surface *surface) -{ -#ifndef PIPE_SUBSYSTEM_WINDOWS_MINIPORT - struct util_stream *stream; - unsigned surface_usage; - struct bmp_file_header bmfh; - struct bmp_info_header bmih; - float *rgba; - unsigned x, y; - - if (!surface) - goto error1; - - rgba = MALLOC(surface->width*4*sizeof(float)); - if(!rgba) - goto error1; - - bmfh.bfType = 0x4d42; - bmfh.bfSize = 14 + 40 + surface->height*surface->width*4; - bmfh.bfReserved1 = 0; - bmfh.bfReserved2 = 0; - bmfh.bfOffBits = 14 + 40; - - bmih.biSize = 40; - bmih.biWidth = surface->width; - bmih.biHeight = surface->height; - bmih.biPlanes = 1; - bmih.biBitCount = 32; - bmih.biCompression = 0; - bmih.biSizeImage = surface->height*surface->width*4; - bmih.biXPelsPerMeter = 0; - bmih.biYPelsPerMeter = 0; - bmih.biClrUsed = 0; - bmih.biClrImportant = 0; - - stream = util_stream_create(filename, bmfh.bfSize); - if(!stream) - goto error2; - - util_stream_write(stream, &bmfh, 14); - util_stream_write(stream, &bmih, 40); - - /* XXX: force mappable surface */ - surface_usage = surface->usage; - surface->usage |= PIPE_BUFFER_USAGE_CPU_READ; - - y = surface->height; - while(y--) { - pipe_get_tile_rgba(surface, - 0, y, surface->width, 1, - rgba); - for(x = 0; x < surface->width; ++x) - { - struct bmp_rgb_quad pixel; - pixel.rgbRed = float_to_ubyte(rgba[x*4 + 0]); - pixel.rgbGreen = float_to_ubyte(rgba[x*4 + 1]); - pixel.rgbBlue = float_to_ubyte(rgba[x*4 + 2]); - pixel.rgbAlpha = float_to_ubyte(rgba[x*4 + 3]); - util_stream_write(stream, &pixel, 4); - } - } - - surface->usage = surface_usage; - - util_stream_close(stream); -error2: - FREE(rgba); -error1: - ; -#endif -} - -#endif diff --git a/src/gallium/auxiliary/util/p_debug_mem.c b/src/gallium/auxiliary/util/p_debug_mem.c deleted file mode 100644 index 250fd60f63..0000000000 --- a/src/gallium/auxiliary/util/p_debug_mem.c +++ /dev/null @@ -1,311 +0,0 @@ -/************************************************************************** - * - * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -/** - * @file - * Memory debugging. - * - * @author José Fonseca - */ - -#include "pipe/p_config.h" - -#if defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) -#include -#include -#elif defined(PIPE_SUBSYSTEM_WINDOWS_MINIPORT) -#include -#else -#include -#include -#endif - -#include "pipe/p_debug.h" -#include "util/u_double_list.h" - - -#define DEBUG_MEMORY_MAGIC 0x6e34090aU - - -#if defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) && !defined(WINCE) -#define real_malloc(_size) EngAllocMem(0, _size, 'D3AG') -#define real_free(_ptr) EngFreeMem(_ptr) -#elif defined(PIPE_SUBSYSTEM_WINDOWS_MINIPORT) -#define real_malloc(_size) ExAllocatePool(0, _size) -#define real_free(_ptr) ExFreePool(_ptr) -#else -#define real_malloc(_size) malloc(_size) -#define real_free(_ptr) free(_ptr) -#endif - - -struct debug_memory_header -{ - struct list_head head; - - unsigned long no; - const char *file; - unsigned line; - const char *function; - size_t size; - unsigned magic; -}; - -struct debug_memory_footer -{ - unsigned magic; -}; - - -static struct list_head list = { &list, &list }; - -static unsigned long last_no = 0; - - -static INLINE struct debug_memory_header * -header_from_data(void *data) -{ - if(data) - return (struct debug_memory_header *)((char *)data - sizeof(struct debug_memory_header)); - else - return NULL; -} - -static INLINE void * -data_from_header(struct debug_memory_header *hdr) -{ - if(hdr) - return (void *)((char *)hdr + sizeof(struct debug_memory_header)); - else - return NULL; -} - -static INLINE struct debug_memory_footer * -footer_from_header(struct debug_memory_header *hdr) -{ - if(hdr) - return (struct debug_memory_footer *)((char *)hdr + sizeof(struct debug_memory_header) + hdr->size); - else - return NULL; -} - - -void * -debug_malloc(const char *file, unsigned line, const char *function, - size_t size) -{ - struct debug_memory_header *hdr; - struct debug_memory_footer *ftr; - - hdr = real_malloc(sizeof(*hdr) + size + sizeof(*ftr)); - if(!hdr) { - debug_printf("%s:%u:%s: out of memory when trying to allocate %lu bytes\n", - file, line, function, - (long unsigned)size); - return NULL; - } - - hdr->no = last_no++; - hdr->file = file; - hdr->line = line; - hdr->function = function; - hdr->size = size; - hdr->magic = DEBUG_MEMORY_MAGIC; - - ftr = footer_from_header(hdr); - ftr->magic = DEBUG_MEMORY_MAGIC; - - LIST_ADDTAIL(&hdr->head, &list); - - return data_from_header(hdr); -} - -void -debug_free(const char *file, unsigned line, const char *function, - void *ptr) -{ - struct debug_memory_header *hdr; - struct debug_memory_footer *ftr; - - if(!ptr) - return; - - hdr = header_from_data(ptr); - if(hdr->magic != DEBUG_MEMORY_MAGIC) { - debug_printf("%s:%u:%s: freeing bad or corrupted memory %p\n", - file, line, function, - ptr); - debug_assert(0); - return; - } - - ftr = footer_from_header(hdr); - if(ftr->magic != DEBUG_MEMORY_MAGIC) { - debug_printf("%s:%u:%s: buffer overflow %p\n", - hdr->file, hdr->line, hdr->function, - ptr); - debug_assert(0); - } - - LIST_DEL(&hdr->head); - hdr->magic = 0; - ftr->magic = 0; - - real_free(hdr); -} - -void * -debug_calloc(const char *file, unsigned line, const char *function, - size_t count, size_t size ) -{ - void *ptr = debug_malloc( file, line, function, count * size ); - if( ptr ) - memset( ptr, 0, count * size ); - return ptr; -} - -void * -debug_realloc(const char *file, unsigned line, const char *function, - void *old_ptr, size_t old_size, size_t new_size ) -{ - struct debug_memory_header *old_hdr, *new_hdr; - struct debug_memory_footer *old_ftr, *new_ftr; - void *new_ptr; - - if(!old_ptr) - return debug_malloc( file, line, function, new_size ); - - if(!new_size) { - debug_free( file, line, function, old_ptr ); - return NULL; - } - - old_hdr = header_from_data(old_ptr); - if(old_hdr->magic != DEBUG_MEMORY_MAGIC) { - debug_printf("%s:%u:%s: reallocating bad or corrupted memory %p\n", - file, line, function, - old_ptr); - debug_assert(0); - return NULL; - } - - old_ftr = footer_from_header(old_hdr); - if(old_ftr->magic != DEBUG_MEMORY_MAGIC) { - debug_printf("%s:%u:%s: buffer overflow %p\n", - old_hdr->file, old_hdr->line, old_hdr->function, - old_ptr); - debug_assert(0); - } - - /* alloc new */ - new_hdr = real_malloc(sizeof(*new_hdr) + new_size + sizeof(*new_ftr)); - if(!new_hdr) { - debug_printf("%s:%u:%s: out of memory when trying to allocate %lu bytes\n", - file, line, function, - (long unsigned)new_size); - return NULL; - } - new_hdr->no = old_hdr->no; - new_hdr->file = old_hdr->file; - new_hdr->line = old_hdr->line; - new_hdr->function = old_hdr->function; - new_hdr->size = new_size; - new_hdr->magic = DEBUG_MEMORY_MAGIC; - - new_ftr = footer_from_header(new_hdr); - new_ftr->magic = DEBUG_MEMORY_MAGIC; - - LIST_REPLACE(&old_hdr->head, &new_hdr->head); - - /* copy data */ - new_ptr = data_from_header(new_hdr); - memcpy( new_ptr, old_ptr, old_size < new_size ? old_size : new_size ); - - /* free old */ - old_hdr->magic = 0; - old_ftr->magic = 0; - real_free(old_hdr); - - return new_ptr; -} - -unsigned long -debug_memory_begin(void) -{ - return last_no; -} - -void -debug_memory_end(unsigned long start_no) -{ - size_t total_size = 0; - struct list_head *entry; - - if(start_no == last_no) - return; - - entry = list.prev; - for (; entry != &list; entry = entry->prev) { - struct debug_memory_header *hdr; - void *ptr; - struct debug_memory_footer *ftr; - - hdr = LIST_ENTRY(struct debug_memory_header, entry, head); - ptr = data_from_header(hdr); - ftr = footer_from_header(hdr); - - if(hdr->magic != DEBUG_MEMORY_MAGIC) { - debug_printf("%s:%u:%s: bad or corrupted memory %p\n", - hdr->file, hdr->line, hdr->function, - ptr); - debug_assert(0); - } - - if((start_no <= hdr->no && hdr->no < last_no) || - (last_no < start_no && (hdr->no < last_no || start_no <= hdr->no))) { - debug_printf("%s:%u:%s: %u bytes at %p not freed\n", - hdr->file, hdr->line, hdr->function, - hdr->size, ptr); - total_size += hdr->size; - } - - if(ftr->magic != DEBUG_MEMORY_MAGIC) { - debug_printf("%s:%u:%s: buffer overflow %p\n", - hdr->file, hdr->line, hdr->function, - ptr); - debug_assert(0); - } - } - - if(total_size) { - debug_printf("Total of %u KB of system memory apparently leaked\n", - (total_size + 1023)/1024); - } - else { - debug_printf("No memory leaks detected.\n"); - } -} diff --git a/src/gallium/auxiliary/util/p_debug_prof.c b/src/gallium/auxiliary/util/p_debug_prof.c deleted file mode 100644 index 5f9772ef91..0000000000 --- a/src/gallium/auxiliary/util/p_debug_prof.c +++ /dev/null @@ -1,320 +0,0 @@ -/************************************************************************** - * - * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -/** - * @file - * Poor-man profiling. - * - * @author José Fonseca - * - * @sa http://blogs.msdn.com/joshpoley/archive/2008/03/12/poor-man-s-profiler.aspx - * @sa http://www.johnpanzer.com/aci_cuj/index.html - */ - -#include "pipe/p_config.h" - -#if defined(PROFILE) && defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) - -#include -#include - -#include "pipe/p_debug.h" -#include "util/u_string.h" - - -#define PROFILE_TABLE_SIZE (1024*1024) -#define FILE_NAME_SIZE 256 - -struct debug_profile_entry -{ - uintptr_t caller; - uintptr_t callee; - uint64_t samples; -}; - -static unsigned long enabled = 0; - -static WCHAR wFileName[FILE_NAME_SIZE] = L"\\??\\c:\\00000000.prof"; -static ULONG_PTR iFile = 0; - -static struct debug_profile_entry *table = NULL; -static unsigned long free_table_entries = 0; -static unsigned long max_table_entries = 0; - -uint64_t start_stamp = 0; -uint64_t end_stamp = 0; - - -static void -debug_profile_entry(uintptr_t caller, uintptr_t callee, uint64_t samples) -{ - unsigned hash = ( caller + callee ) & PROFILE_TABLE_SIZE - 1; - - while(1) { - if(table[hash].caller == 0 && table[hash].callee == 0) { - table[hash].caller = caller; - table[hash].callee = callee; - table[hash].samples = samples; - --free_table_entries; - break; - } - else if(table[hash].caller == caller && table[hash].callee == callee) { - table[hash].samples += samples; - break; - } - else { - ++hash; - } - } -} - - -static uintptr_t caller_stack[1024]; -static unsigned last_caller = 0; - - -static int64_t delta(void) { - int64_t result = end_stamp - start_stamp; - if(result > UINT64_C(0xffffffff)) - result = 0; - return result; -} - - -static void __cdecl -debug_profile_enter(uintptr_t callee) -{ - uintptr_t caller = last_caller ? caller_stack[last_caller - 1] : 0; - - if (caller) - debug_profile_entry(caller, 0, delta()); - debug_profile_entry(caller, callee, 1); - caller_stack[last_caller++] = callee; -} - - -static void __cdecl -debug_profile_exit(uintptr_t callee) -{ - debug_profile_entry(callee, 0, delta()); - if(last_caller) - --last_caller; -} - - -/** - * Called at the start of every method or function. - * - * @sa http://msdn.microsoft.com/en-us/library/c63a9b7h.aspx - */ -void __declspec(naked) __cdecl -_penter(void) { - _asm { - push eax - mov eax, [enabled] - test eax, eax - jz skip - - push edx - - rdtsc - mov dword ptr [end_stamp], eax - mov dword ptr [end_stamp+4], edx - - xor eax, eax - mov [enabled], eax - - mov eax, [esp+8] - - push ebx - push ecx - push ebp - push edi - push esi - - push eax - call debug_profile_enter - add esp, 4 - - pop esi - pop edi - pop ebp - pop ecx - pop ebx - - mov eax, 1 - mov [enabled], eax - - rdtsc - mov dword ptr [start_stamp], eax - mov dword ptr [start_stamp+4], edx - - pop edx -skip: - pop eax - ret - } -} - - -/** - * Called at the end of Calls the end of every method or function. - * - * @sa http://msdn.microsoft.com/en-us/library/xc11y76y.aspx - */ -void __declspec(naked) __cdecl -_pexit(void) { - _asm { - push eax - mov eax, [enabled] - test eax, eax - jz skip - - push edx - - rdtsc - mov dword ptr [end_stamp], eax - mov dword ptr [end_stamp+4], edx - - xor eax, eax - mov [enabled], eax - - mov eax, [esp+8] - - push ebx - push ecx - push ebp - push edi - push esi - - push eax - call debug_profile_exit - add esp, 4 - - pop esi - pop edi - pop ebp - pop ecx - pop ebx - - mov eax, 1 - mov [enabled], eax - - rdtsc - mov dword ptr [start_stamp], eax - mov dword ptr [start_stamp+4], edx - - pop edx -skip: - pop eax - ret - } -} - - -/** - * Reference function for calibration. - */ -void __declspec(naked) -__debug_profile_reference(void) { - _asm { - call _penter - call _pexit - ret - } -} - - -void -debug_profile_start(void) -{ - WCHAR *p; - - // increment starting from the less significant digit - p = &wFileName[14]; - while(1) { - if(*p == '9') { - *p-- = '0'; - } - else { - *p += 1; - break; - } - } - - table = EngMapFile(wFileName, - PROFILE_TABLE_SIZE*sizeof(struct debug_profile_entry), - &iFile); - if(table) { - unsigned i; - - free_table_entries = max_table_entries = PROFILE_TABLE_SIZE; - memset(table, 0, PROFILE_TABLE_SIZE*sizeof(struct debug_profile_entry)); - - table[0].caller = (uintptr_t)&__debug_profile_reference; - table[0].callee = 0; - table[0].samples = 0; - --free_table_entries; - - _asm { - push edx - push eax - - rdtsc - mov dword ptr [start_stamp], eax - mov dword ptr [start_stamp+4], edx - - pop edx - pop eax - } - - last_caller = 0; - - enabled = 1; - - for(i = 0; i < 8; ++i) { - _asm { - call __debug_profile_reference - } - } - } -} - - -void -debug_profile_stop(void) -{ - enabled = 0; - - if(iFile) - EngUnmapFile(iFile); - iFile = 0; - table = NULL; - free_table_entries = max_table_entries = 0; -} - -#endif /* PROFILE */ diff --git a/src/gallium/auxiliary/util/u_blit.c b/src/gallium/auxiliary/util/u_blit.c index 841e9c01e7..efc3a874cc 100644 --- a/src/gallium/auxiliary/util/u_blit.c +++ b/src/gallium/auxiliary/util/u_blit.c @@ -34,7 +34,7 @@ #include "pipe/p_context.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_defines.h" #include "pipe/p_inlines.h" #include "pipe/p_shader_tokens.h" diff --git a/src/gallium/auxiliary/util/u_cache.c b/src/gallium/auxiliary/util/u_cache.c index 0a1a64259f..41cd38171f 100644 --- a/src/gallium/auxiliary/util/u_cache.c +++ b/src/gallium/auxiliary/util/u_cache.c @@ -36,7 +36,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_math.h" #include "util/u_memory.h" diff --git a/src/gallium/auxiliary/util/u_debug.c b/src/gallium/auxiliary/util/u_debug.c new file mode 100644 index 0000000000..43d424b1d6 --- /dev/null +++ b/src/gallium/auxiliary/util/u_debug.c @@ -0,0 +1,782 @@ +/************************************************************************** + * + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * Copyright (c) 2008 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +#include "pipe/p_config.h" + +#include + + +#ifdef PIPE_SUBSYSTEM_WINDOWS_DISPLAY + +#include +#include + +#elif defined(PIPE_SUBSYSTEM_WINDOWS_CE) + +#include +#include +#include +#include + +#elif defined(PIPE_SUBSYSTEM_WINDOWS_USER) + +#ifndef WIN32_LEAN_AND_MEAN +#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers +#endif +#include + +#else + +#include +#include + +#endif + +#include "pipe/p_compiler.h" +#include "util/u_debug.h" +#include "pipe/p_format.h" +#include "pipe/p_state.h" +#include "pipe/p_inlines.h" +#include "util/u_memory.h" +#include "util/u_string.h" +#include "util/u_stream.h" +#include "util/u_math.h" +#include "util/u_tile.h" + + +#ifdef PIPE_SUBSYSTEM_WINDOWS_DISPLAY +static INLINE void +_EngDebugPrint(const char *format, ...) +{ + va_list ap; + va_start(ap, format); + EngDebugPrint("", (PCHAR)format, ap); + va_end(ap); +} +#endif + + +void _debug_vprintf(const char *format, va_list ap) +{ +#if defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) + /* EngDebugPrint does not handle float point arguments, so we need to use + * our own vsnprintf implementation. It is also very slow, so buffer until + * we find a newline. */ + static char buf[512] = {'\0'}; + size_t len = strlen(buf); + int ret = util_vsnprintf(buf + len, sizeof(buf) - len, format, ap); + if(ret > (int)(sizeof(buf) - len - 1) || util_strchr(buf + len, '\n')) { + _EngDebugPrint("%s", buf); + buf[0] = '\0'; + } +#elif defined(PIPE_SUBSYSTEM_WINDOWS_USER) + /* EngDebugPrint does not handle float point arguments, so we need to use + * our own vsnprintf implementation. It is also very slow, so buffer until + * we find a newline. */ + static char buf[512 + 1] = {'\0'}; + size_t len = strlen(buf); + int ret = util_vsnprintf(buf + len, sizeof(buf) - len, format, ap); + if(ret > (int)(sizeof(buf) - len - 1) || util_strchr(buf + len, '\n')) { + OutputDebugStringA(buf); + buf[0] = '\0'; + } +#elif defined(PIPE_SUBSYSTEM_WINDOWS_CE) + wchar_t *wide_format; + long wide_str_len; + char buf[512]; + int ret; +#if (_WIN32_WCE < 600) + ret = vsprintf(buf, format, ap); + if(ret < 0){ + sprintf(buf, "Cant handle debug print!"); + ret = 25; + } +#else + ret = vsprintf_s(buf, 512, format, ap); + if(ret < 0){ + sprintf_s(buf, 512, "Cant handle debug print!"); + ret = 25; + } +#endif + buf[ret] = '\0'; + /* Format is ascii - needs to be converted to wchar_t for printing */ + wide_str_len = MultiByteToWideChar(CP_ACP, 0, (const char *) buf, -1, NULL, 0); + wide_format = (wchar_t *) malloc((wide_str_len+1) * sizeof(wchar_t)); + if (wide_format) { + MultiByteToWideChar(CP_ACP, 0, (const char *) buf, -1, + wide_format, wide_str_len); + NKDbgPrintfW(wide_format, wide_format); + free(wide_format); + } +#elif defined(PIPE_SUBSYSTEM_WINDOWS_MINIPORT) + /* TODO */ +#else /* !PIPE_SUBSYSTEM_WINDOWS */ +#ifdef DEBUG + vfprintf(stderr, format, ap); +#endif +#endif +} + + +#ifdef DEBUG +void debug_print_blob( const char *name, + const void *blob, + unsigned size ) +{ + const unsigned *ublob = (const unsigned *)blob; + unsigned i; + + debug_printf("%s (%d dwords%s)\n", name, size/4, + size%4 ? "... plus a few bytes" : ""); + + for (i = 0; i < size/4; i++) { + debug_printf("%d:\t%08x\n", i, ublob[i]); + } +} +#endif + + +void _debug_break(void) +{ +#if defined(PIPE_ARCH_X86) && defined(PIPE_CC_GCC) + __asm("int3"); +#elif defined(PIPE_ARCH_X86) && defined(PIPE_CC_MSVC) + _asm {int 3}; +#elif defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) + EngDebugBreak(); +#else + abort(); +#endif +} + + +#ifdef PIPE_SUBSYSTEM_WINDOWS_DISPLAY +static const char * +find(const char *start, const char *end, char c) +{ + const char *p; + for(p = start; !end || p != end; ++p) { + if(*p == c) + return p; + if(*p < 32) + break; + } + return NULL; +} + +static int +compare(const char *start, const char *end, const char *s) +{ + const char *p, *q; + for(p = start, q = s; p != end && *q != '\0'; ++p, ++q) { + if(*p != *q) + return 0; + } + return p == end && *q == '\0'; +} + +static void +copy(char *dst, const char *start, const char *end, size_t n) +{ + const char *p; + char *q; + for(p = start, q = dst, n = n - 1; p != end && n; ++p, ++q, --n) + *q = *p; + *q = '\0'; +} +#endif + + +static INLINE const char * +_debug_get_option(const char *name) +{ +#if defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) + /* EngMapFile creates the file if it does not exists, so it must either be + * disabled on release versions (or put in a less conspicuous place). */ +#ifdef DEBUG + const char *result = NULL; + ULONG_PTR iFile = 0; + const void *pMap = NULL; + const char *sol, *eol, *sep; + static char output[1024]; + + pMap = EngMapFile(L"\\??\\c:\\gallium.cfg", 0, &iFile); + if(pMap) { + sol = (const char *)pMap; + while(1) { + /* TODO: handle LF line endings */ + eol = find(sol, NULL, '\r'); + if(!eol || eol == sol) + break; + sep = find(sol, eol, '='); + if(!sep) + break; + if(compare(sol, sep, name)) { + copy(output, sep + 1, eol, sizeof(output)); + result = output; + break; + } + sol = eol + 2; + } + EngUnmapFile(iFile); + } + return result; +#else + return NULL; +#endif +#elif defined(PIPE_SUBSYSTEM_WINDOWS_CE) || defined(PIPE_SUBSYSTEM_WINDOWS_MINIPORT) + /* TODO: implement */ + return NULL; +#else + return getenv(name); +#endif +} + +const char * +debug_get_option(const char *name, const char *dfault) +{ + const char *result; + + result = _debug_get_option(name); + if(!result) + result = dfault; + + debug_printf("%s: %s = %s\n", __FUNCTION__, name, result ? result : "(null)"); + + return result; +} + +boolean +debug_get_bool_option(const char *name, boolean dfault) +{ + const char *str = _debug_get_option(name); + boolean result; + + if(str == NULL) + result = dfault; + else if(!util_strcmp(str, "n")) + result = FALSE; + else if(!util_strcmp(str, "no")) + result = FALSE; + else if(!util_strcmp(str, "0")) + result = FALSE; + else if(!util_strcmp(str, "f")) + result = FALSE; + else if(!util_strcmp(str, "false")) + result = FALSE; + else + result = TRUE; + + debug_printf("%s: %s = %s\n", __FUNCTION__, name, result ? "TRUE" : "FALSE"); + + return result; +} + + +long +debug_get_num_option(const char *name, long dfault) +{ + long result; + const char *str; + + str = _debug_get_option(name); + if(!str) + result = dfault; + else { + long sign; + char c; + c = *str++; + if(c == '-') { + sign = -1; + c = *str++; + } + else { + sign = 1; + } + result = 0; + while('0' <= c && c <= '9') { + result = result*10 + (c - '0'); + c = *str++; + } + result *= sign; + } + + debug_printf("%s: %s = %li\n", __FUNCTION__, name, result); + + return result; +} + + +unsigned long +debug_get_flags_option(const char *name, + const struct debug_named_value *flags, + unsigned long dfault) +{ + unsigned long result; + const char *str; + + str = _debug_get_option(name); + if(!str) + result = dfault; + else if (!util_strcmp(str, "help")) { + result = dfault; + while (flags->name) { + debug_printf("%s: help for %s: %s [0x%lx]\n", __FUNCTION__, name, flags->name, flags->value); + flags++; + } + } + else { + result = 0; + while( flags->name ) { + if (!util_strcmp(str, "all") || util_strstr(str, flags->name )) + result |= flags->value; + ++flags; + } + } + + if (str) { + debug_printf("%s: %s = 0x%lx (%s)\n", __FUNCTION__, name, result, str); + } + else { + debug_printf("%s: %s = 0x%lx\n", __FUNCTION__, name, result); + } + + return result; +} + + +void _debug_assert_fail(const char *expr, + const char *file, + unsigned line, + const char *function) +{ + _debug_printf("%s:%u:%s: Assertion `%s' failed.\n", file, line, function, expr); +#if defined(PIPE_OS_WINDOWS) && !defined(PIPE_SUBSYSTEM_WINDOWS_USER) + if (debug_get_bool_option("GALLIUM_ABORT_ON_ASSERT", FALSE)) +#else + if (debug_get_bool_option("GALLIUM_ABORT_ON_ASSERT", TRUE)) +#endif + debug_break(); + else + _debug_printf("continuing...\n"); +} + + +const char * +debug_dump_enum(const struct debug_named_value *names, + unsigned long value) +{ + static char rest[64]; + + while(names->name) { + if(names->value == value) + return names->name; + ++names; + } + + util_snprintf(rest, sizeof(rest), "0x%08lx", value); + return rest; +} + + +const char * +debug_dump_enum_noprefix(const struct debug_named_value *names, + const char *prefix, + unsigned long value) +{ + static char rest[64]; + + while(names->name) { + if(names->value == value) { + const char *name = names->name; + while (*name == *prefix) { + name++; + prefix++; + } + return name; + } + ++names; + } + + + + util_snprintf(rest, sizeof(rest), "0x%08lx", value); + return rest; +} + + +const char * +debug_dump_flags(const struct debug_named_value *names, + unsigned long value) +{ + static char output[4096]; + static char rest[256]; + int first = 1; + + output[0] = '\0'; + + while(names->name) { + if((names->value & value) == names->value) { + if (!first) + util_strncat(output, "|", sizeof(output)); + else + first = 0; + util_strncat(output, names->name, sizeof(output)); + value &= ~names->value; + } + ++names; + } + + if (value) { + if (!first) + util_strncat(output, "|", sizeof(output)); + else + first = 0; + + util_snprintf(rest, sizeof(rest), "0x%08lx", value); + util_strncat(output, rest, sizeof(output)); + } + + if(first) + return "0"; + + return output; +} + + +static const struct debug_named_value pipe_format_names[] = { +#ifdef DEBUG + DEBUG_NAMED_VALUE(PIPE_FORMAT_NONE), + DEBUG_NAMED_VALUE(PIPE_FORMAT_A8R8G8B8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_X8R8G8B8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_B8G8R8A8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_B8G8R8X8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_A1R5G5B5_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_A4R4G4B4_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R5G6B5_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_A2B10G10R10_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_L8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_A8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_I8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_A8L8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_L16_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_YCBCR), + DEBUG_NAMED_VALUE(PIPE_FORMAT_YCBCR_REV), + DEBUG_NAMED_VALUE(PIPE_FORMAT_Z16_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_Z32_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_Z32_FLOAT), + DEBUG_NAMED_VALUE(PIPE_FORMAT_S8Z24_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_Z24S8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_X8Z24_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_Z24X8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_S8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R64_FLOAT), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R64G64_FLOAT), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R64G64B64_FLOAT), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R64G64B64A64_FLOAT), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32_FLOAT), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32_FLOAT), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32_FLOAT), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32A32_FLOAT), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32A32_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32A32_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32A32_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R32G32B32A32_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16A16_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16A16_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16A16_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R16G16B16A16_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8A8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8X8_UNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8A8_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8X8_USCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8A8_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8X8_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_B6G5R5_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_A8B8G8R8_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_X8B8G8R8_SNORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8A8_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8X8_SSCALED), + DEBUG_NAMED_VALUE(PIPE_FORMAT_L8_SRGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_A8L8_SRGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8_SRGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8A8_SRGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_R8G8B8X8_SRGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_A8R8G8B8_SRGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_X8R8G8B8_SRGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_B8G8R8A8_SRGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_B8G8R8X8_SRGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_X8UB8UG8SR8S_NORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_B6UG5SR5S_NORM), + DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT1_RGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT1_RGBA), + DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT3_RGBA), + DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT5_RGBA), + DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT1_SRGB), + DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT1_SRGBA), + DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT3_SRGBA), + DEBUG_NAMED_VALUE(PIPE_FORMAT_DXT5_SRGBA), +#endif + DEBUG_NAMED_VALUE_END +}; + +#ifdef DEBUG +void debug_print_format(const char *msg, unsigned fmt ) +{ + debug_printf("%s: %s\n", msg, debug_dump_enum(pipe_format_names, fmt)); +} +#endif + +const char *pf_name( enum pipe_format format ) +{ + return debug_dump_enum(pipe_format_names, format); +} + + +#ifdef DEBUG +void debug_dump_image(const char *prefix, + unsigned format, unsigned cpp, + unsigned width, unsigned height, + unsigned stride, + const void *data) +{ +#ifdef PIPE_SUBSYSTEM_WINDOWS_DISPLAY + static unsigned no = 0; + char filename[256]; + WCHAR wfilename[sizeof(filename)]; + ULONG_PTR iFile = 0; + struct { + unsigned format; + unsigned cpp; + unsigned width; + unsigned height; + } header; + unsigned char *pMap = NULL; + unsigned i; + + util_snprintf(filename, sizeof(filename), "\\??\\c:\\%03u%s.raw", ++no, prefix); + for(i = 0; i < sizeof(filename); ++i) + wfilename[i] = (WCHAR)filename[i]; + + pMap = (unsigned char *)EngMapFile(wfilename, sizeof(header) + height*width*cpp, &iFile); + if(!pMap) + return; + + header.format = format; + header.cpp = cpp; + header.width = width; + header.height = height; + memcpy(pMap, &header, sizeof(header)); + pMap += sizeof(header); + + for(i = 0; i < height; ++i) { + memcpy(pMap, (unsigned char *)data + stride*i, cpp*width); + pMap += cpp*width; + } + + EngUnmapFile(iFile); +#endif +} + +void debug_dump_surface(const char *prefix, + struct pipe_surface *surface) +{ + unsigned surface_usage; + void *data; + + if (!surface) + goto error1; + + /* XXX: force mappable surface */ + surface_usage = surface->usage; + surface->usage |= PIPE_BUFFER_USAGE_CPU_READ; + + data = pipe_surface_map(surface, + PIPE_BUFFER_USAGE_CPU_READ); + if(!data) + goto error2; + + debug_dump_image(prefix, + surface->format, + surface->block.size, + surface->nblocksx, + surface->nblocksy, + surface->stride, + data); + + pipe_surface_unmap(surface); +error2: + surface->usage = surface_usage; +error1: + ; +} + + +#pragma pack(push,2) +struct bmp_file_header { + uint16_t bfType; + uint32_t bfSize; + uint16_t bfReserved1; + uint16_t bfReserved2; + uint32_t bfOffBits; +}; +#pragma pack(pop) + +struct bmp_info_header { + uint32_t biSize; + int32_t biWidth; + int32_t biHeight; + uint16_t biPlanes; + uint16_t biBitCount; + uint32_t biCompression; + uint32_t biSizeImage; + int32_t biXPelsPerMeter; + int32_t biYPelsPerMeter; + uint32_t biClrUsed; + uint32_t biClrImportant; +}; + +struct bmp_rgb_quad { + uint8_t rgbBlue; + uint8_t rgbGreen; + uint8_t rgbRed; + uint8_t rgbAlpha; +}; + +void +debug_dump_surface_bmp(const char *filename, + struct pipe_surface *surface) +{ +#ifndef PIPE_SUBSYSTEM_WINDOWS_MINIPORT + struct util_stream *stream; + unsigned surface_usage; + struct bmp_file_header bmfh; + struct bmp_info_header bmih; + float *rgba; + unsigned x, y; + + if (!surface) + goto error1; + + rgba = MALLOC(surface->width*4*sizeof(float)); + if(!rgba) + goto error1; + + bmfh.bfType = 0x4d42; + bmfh.bfSize = 14 + 40 + surface->height*surface->width*4; + bmfh.bfReserved1 = 0; + bmfh.bfReserved2 = 0; + bmfh.bfOffBits = 14 + 40; + + bmih.biSize = 40; + bmih.biWidth = surface->width; + bmih.biHeight = surface->height; + bmih.biPlanes = 1; + bmih.biBitCount = 32; + bmih.biCompression = 0; + bmih.biSizeImage = surface->height*surface->width*4; + bmih.biXPelsPerMeter = 0; + bmih.biYPelsPerMeter = 0; + bmih.biClrUsed = 0; + bmih.biClrImportant = 0; + + stream = util_stream_create(filename, bmfh.bfSize); + if(!stream) + goto error2; + + util_stream_write(stream, &bmfh, 14); + util_stream_write(stream, &bmih, 40); + + /* XXX: force mappable surface */ + surface_usage = surface->usage; + surface->usage |= PIPE_BUFFER_USAGE_CPU_READ; + + y = surface->height; + while(y--) { + pipe_get_tile_rgba(surface, + 0, y, surface->width, 1, + rgba); + for(x = 0; x < surface->width; ++x) + { + struct bmp_rgb_quad pixel; + pixel.rgbRed = float_to_ubyte(rgba[x*4 + 0]); + pixel.rgbGreen = float_to_ubyte(rgba[x*4 + 1]); + pixel.rgbBlue = float_to_ubyte(rgba[x*4 + 2]); + pixel.rgbAlpha = float_to_ubyte(rgba[x*4 + 3]); + util_stream_write(stream, &pixel, 4); + } + } + + surface->usage = surface_usage; + + util_stream_close(stream); +error2: + FREE(rgba); +error1: + ; +#endif +} + +#endif diff --git a/src/gallium/auxiliary/util/u_debug.h b/src/gallium/auxiliary/util/u_debug.h new file mode 100644 index 0000000000..b298b9b66d --- /dev/null +++ b/src/gallium/auxiliary/util/u_debug.h @@ -0,0 +1,361 @@ +/************************************************************************** + * + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/** + * @file + * Cross-platform debugging helpers. + * + * For now it just has assert and printf replacements, but it might be extended + * with stack trace reports and more advanced logging in the near future. + * + * @author Jose Fonseca + */ + +#ifndef U_DEBUG_H_ +#define U_DEBUG_H_ + + +#include + +#include "pipe/p_compiler.h" + + +#ifdef __cplusplus +extern "C" { +#endif + + +#if defined(DBG) || defined(DEBUG) +#ifndef DEBUG +#define DEBUG 1 +#endif +#else +#ifndef NDEBUG +#define NDEBUG 1 +#endif +#endif + + +/* MSVC bebore VC7 does not have the __FUNCTION__ macro */ +#if defined(_MSC_VER) && _MSC_VER < 1300 +#define __FUNCTION__ "???" +#endif + + +void _debug_vprintf(const char *format, va_list ap); + + +static INLINE void +_debug_printf(const char *format, ...) +{ + va_list ap; + va_start(ap, format); + _debug_vprintf(format, ap); + va_end(ap); +} + + +/** + * Print debug messages. + * + * The actual channel used to output debug message is platform specific. To + * avoid misformating or truncation, follow these rules of thumb: + * - output whole lines + * - avoid outputing large strings (512 bytes is the current maximum length + * that is guaranteed to be printed in all platforms) + */ +static INLINE void +debug_printf(const char *format, ...) +{ +#ifdef DEBUG + va_list ap; + va_start(ap, format); + _debug_vprintf(format, ap); + va_end(ap); +#else + (void) format; /* silence warning */ +#endif +} + + +#ifdef DEBUG +#define debug_vprintf(_format, _ap) _debug_vprintf(_format, _ap) +#else +#define debug_vprintf(_format, _ap) ((void)0) +#endif + + +#ifdef DEBUG +/** + * Dump a blob in hex to the same place that debug_printf sends its + * messages. + */ +void debug_print_blob( const char *name, const void *blob, unsigned size ); + +/* Print a message along with a prettified format string + */ +void debug_print_format(const char *msg, unsigned fmt ); +#else +#define debug_print_blob(_name, _blob, _size) ((void)0) +#define debug_print_format(_msg, _fmt) ((void)0) +#endif + + +void _debug_break(void); + + +/** + * Hard-coded breakpoint. + */ +#ifdef DEBUG +#if defined(PIPE_ARCH_X86) && defined(PIPE_CC_GCC) +#define debug_break() __asm("int3") +#elif defined(PIPE_ARCH_X86) && defined(PIPE_CC_MSVC) +#define debug_break() do { _asm {int 3} } while(0) +#else +#define debug_break() _debug_break() +#endif +#else /* !DEBUG */ +#define debug_break() ((void)0) +#endif /* !DEBUG */ + + +long +debug_get_num_option(const char *name, long dfault); + +void _debug_assert_fail(const char *expr, + const char *file, + unsigned line, + const char *function); + + +/** + * Assert macro + * + * Do not expect that the assert call terminates -- errors must be handled + * regardless of assert behavior. + */ +#ifdef DEBUG +#define debug_assert(expr) ((expr) ? (void)0 : _debug_assert_fail(#expr, __FILE__, __LINE__, __FUNCTION__)) +#else +#define debug_assert(expr) ((void)0) +#endif + + +/** Override standard assert macro */ +#ifdef assert +#undef assert +#endif +#define assert(expr) debug_assert(expr) + + +/** + * Output the current function name. + */ +#ifdef DEBUG +#define debug_checkpoint() \ + _debug_printf("%s\n", __FUNCTION__) +#else +#define debug_checkpoint() \ + ((void)0) +#endif + + +/** + * Output the full source code position. + */ +#ifdef DEBUG +#define debug_checkpoint_full() \ + _debug_printf("%s:%u:%s", __FILE__, __LINE__, __FUNCTION__) +#else +#define debug_checkpoint_full() \ + ((void)0) +#endif + + +/** + * Output a warning message. Muted on release version. + */ +#ifdef DEBUG +#define debug_warning(__msg) \ + _debug_printf("%s:%u:%s: warning: %s\n", __FILE__, __LINE__, __FUNCTION__, __msg) +#else +#define debug_warning(__msg) \ + ((void)0) +#endif + + +/** + * Output an error message. Not muted on release version. + */ +#ifdef DEBUG +#define debug_error(__msg) \ + _debug_printf("%s:%u:%s: error: %s\n", __FILE__, __LINE__, __FUNCTION__, __msg) +#else +#define debug_error(__msg) \ + _debug_printf("error: %s\n", __msg) +#endif + + +/** + * Used by debug_dump_enum and debug_dump_flags to describe symbols. + */ +struct debug_named_value +{ + const char *name; + unsigned long value; +}; + + +/** + * Some C pre-processor magic to simplify creating named values. + * + * Example: + * @code + * static const debug_named_value my_names[] = { + * DEBUG_NAMED_VALUE(MY_ENUM_VALUE_X), + * DEBUG_NAMED_VALUE(MY_ENUM_VALUE_Y), + * DEBUG_NAMED_VALUE(MY_ENUM_VALUE_Z), + * DEBUG_NAMED_VALUE_END + * }; + * + * ... + * debug_printf("%s = %s\n", + * name, + * debug_dump_enum(my_names, my_value)); + * ... + * @endcode + */ +#define DEBUG_NAMED_VALUE(__symbol) {#__symbol, (unsigned long)__symbol} +#define DEBUG_NAMED_VALUE_END {NULL, 0} + + +/** + * Convert a enum value to a string. + */ +const char * +debug_dump_enum(const struct debug_named_value *names, + unsigned long value); + +const char * +debug_dump_enum_noprefix(const struct debug_named_value *names, + const char *prefix, + unsigned long value); + + +/** + * Convert binary flags value to a string. + */ +const char * +debug_dump_flags(const struct debug_named_value *names, + unsigned long value); + + +/** + * Get option. + * + * It is an alias for getenv on Linux. + * + * On Windows it reads C:\gallium.cfg, which is a text file with CR+LF line + * endings with one option per line as + * + * NAME=value + * + * This file must be terminated with an extra empty line. + */ +const char * +debug_get_option(const char *name, const char *dfault); + +boolean +debug_get_bool_option(const char *name, boolean dfault); + +long +debug_get_num_option(const char *name, long dfault); + +unsigned long +debug_get_flags_option(const char *name, + const struct debug_named_value *flags, + unsigned long dfault); + + +void * +debug_malloc(const char *file, unsigned line, const char *function, + size_t size); + +void +debug_free(const char *file, unsigned line, const char *function, + void *ptr); + +void * +debug_calloc(const char *file, unsigned line, const char *function, + size_t count, size_t size ); + +void * +debug_realloc(const char *file, unsigned line, const char *function, + void *old_ptr, size_t old_size, size_t new_size ); + +unsigned long +debug_memory_begin(void); + +void +debug_memory_end(unsigned long beginning); + + +#if defined(PROFILE) && defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) + +void +debug_profile_start(void); + +void +debug_profile_stop(void); + +#endif + + +#ifdef DEBUG +struct pipe_surface; +void debug_dump_image(const char *prefix, + unsigned format, unsigned cpp, + unsigned width, unsigned height, + unsigned stride, + const void *data); +void debug_dump_surface(const char *prefix, + struct pipe_surface *surface); +void debug_dump_surface_bmp(const char *filename, + struct pipe_surface *surface); +#else +#define debug_dump_image(prefix, format, cpp, width, height, stride, data) ((void)0) +#define debug_dump_surface(prefix, surface) ((void)0) +#define debug_dump_surface_bmp(filename, surface) ((void)0) +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* U_DEBUG_H_ */ diff --git a/src/gallium/auxiliary/util/u_debug_memory.c b/src/gallium/auxiliary/util/u_debug_memory.c new file mode 100644 index 0000000000..f6c136f6e5 --- /dev/null +++ b/src/gallium/auxiliary/util/u_debug_memory.c @@ -0,0 +1,311 @@ +/************************************************************************** + * + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/** + * @file + * Memory debugging. + * + * @author José Fonseca + */ + +#include "pipe/p_config.h" + +#if defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) +#include +#include +#elif defined(PIPE_SUBSYSTEM_WINDOWS_MINIPORT) +#include +#else +#include +#include +#endif + +#include "util/u_debug.h" +#include "util/u_double_list.h" + + +#define DEBUG_MEMORY_MAGIC 0x6e34090aU + + +#if defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) && !defined(WINCE) +#define real_malloc(_size) EngAllocMem(0, _size, 'D3AG') +#define real_free(_ptr) EngFreeMem(_ptr) +#elif defined(PIPE_SUBSYSTEM_WINDOWS_MINIPORT) +#define real_malloc(_size) ExAllocatePool(0, _size) +#define real_free(_ptr) ExFreePool(_ptr) +#else +#define real_malloc(_size) malloc(_size) +#define real_free(_ptr) free(_ptr) +#endif + + +struct debug_memory_header +{ + struct list_head head; + + unsigned long no; + const char *file; + unsigned line; + const char *function; + size_t size; + unsigned magic; +}; + +struct debug_memory_footer +{ + unsigned magic; +}; + + +static struct list_head list = { &list, &list }; + +static unsigned long last_no = 0; + + +static INLINE struct debug_memory_header * +header_from_data(void *data) +{ + if(data) + return (struct debug_memory_header *)((char *)data - sizeof(struct debug_memory_header)); + else + return NULL; +} + +static INLINE void * +data_from_header(struct debug_memory_header *hdr) +{ + if(hdr) + return (void *)((char *)hdr + sizeof(struct debug_memory_header)); + else + return NULL; +} + +static INLINE struct debug_memory_footer * +footer_from_header(struct debug_memory_header *hdr) +{ + if(hdr) + return (struct debug_memory_footer *)((char *)hdr + sizeof(struct debug_memory_header) + hdr->size); + else + return NULL; +} + + +void * +debug_malloc(const char *file, unsigned line, const char *function, + size_t size) +{ + struct debug_memory_header *hdr; + struct debug_memory_footer *ftr; + + hdr = real_malloc(sizeof(*hdr) + size + sizeof(*ftr)); + if(!hdr) { + debug_printf("%s:%u:%s: out of memory when trying to allocate %lu bytes\n", + file, line, function, + (long unsigned)size); + return NULL; + } + + hdr->no = last_no++; + hdr->file = file; + hdr->line = line; + hdr->function = function; + hdr->size = size; + hdr->magic = DEBUG_MEMORY_MAGIC; + + ftr = footer_from_header(hdr); + ftr->magic = DEBUG_MEMORY_MAGIC; + + LIST_ADDTAIL(&hdr->head, &list); + + return data_from_header(hdr); +} + +void +debug_free(const char *file, unsigned line, const char *function, + void *ptr) +{ + struct debug_memory_header *hdr; + struct debug_memory_footer *ftr; + + if(!ptr) + return; + + hdr = header_from_data(ptr); + if(hdr->magic != DEBUG_MEMORY_MAGIC) { + debug_printf("%s:%u:%s: freeing bad or corrupted memory %p\n", + file, line, function, + ptr); + debug_assert(0); + return; + } + + ftr = footer_from_header(hdr); + if(ftr->magic != DEBUG_MEMORY_MAGIC) { + debug_printf("%s:%u:%s: buffer overflow %p\n", + hdr->file, hdr->line, hdr->function, + ptr); + debug_assert(0); + } + + LIST_DEL(&hdr->head); + hdr->magic = 0; + ftr->magic = 0; + + real_free(hdr); +} + +void * +debug_calloc(const char *file, unsigned line, const char *function, + size_t count, size_t size ) +{ + void *ptr = debug_malloc( file, line, function, count * size ); + if( ptr ) + memset( ptr, 0, count * size ); + return ptr; +} + +void * +debug_realloc(const char *file, unsigned line, const char *function, + void *old_ptr, size_t old_size, size_t new_size ) +{ + struct debug_memory_header *old_hdr, *new_hdr; + struct debug_memory_footer *old_ftr, *new_ftr; + void *new_ptr; + + if(!old_ptr) + return debug_malloc( file, line, function, new_size ); + + if(!new_size) { + debug_free( file, line, function, old_ptr ); + return NULL; + } + + old_hdr = header_from_data(old_ptr); + if(old_hdr->magic != DEBUG_MEMORY_MAGIC) { + debug_printf("%s:%u:%s: reallocating bad or corrupted memory %p\n", + file, line, function, + old_ptr); + debug_assert(0); + return NULL; + } + + old_ftr = footer_from_header(old_hdr); + if(old_ftr->magic != DEBUG_MEMORY_MAGIC) { + debug_printf("%s:%u:%s: buffer overflow %p\n", + old_hdr->file, old_hdr->line, old_hdr->function, + old_ptr); + debug_assert(0); + } + + /* alloc new */ + new_hdr = real_malloc(sizeof(*new_hdr) + new_size + sizeof(*new_ftr)); + if(!new_hdr) { + debug_printf("%s:%u:%s: out of memory when trying to allocate %lu bytes\n", + file, line, function, + (long unsigned)new_size); + return NULL; + } + new_hdr->no = old_hdr->no; + new_hdr->file = old_hdr->file; + new_hdr->line = old_hdr->line; + new_hdr->function = old_hdr->function; + new_hdr->size = new_size; + new_hdr->magic = DEBUG_MEMORY_MAGIC; + + new_ftr = footer_from_header(new_hdr); + new_ftr->magic = DEBUG_MEMORY_MAGIC; + + LIST_REPLACE(&old_hdr->head, &new_hdr->head); + + /* copy data */ + new_ptr = data_from_header(new_hdr); + memcpy( new_ptr, old_ptr, old_size < new_size ? old_size : new_size ); + + /* free old */ + old_hdr->magic = 0; + old_ftr->magic = 0; + real_free(old_hdr); + + return new_ptr; +} + +unsigned long +debug_memory_begin(void) +{ + return last_no; +} + +void +debug_memory_end(unsigned long start_no) +{ + size_t total_size = 0; + struct list_head *entry; + + if(start_no == last_no) + return; + + entry = list.prev; + for (; entry != &list; entry = entry->prev) { + struct debug_memory_header *hdr; + void *ptr; + struct debug_memory_footer *ftr; + + hdr = LIST_ENTRY(struct debug_memory_header, entry, head); + ptr = data_from_header(hdr); + ftr = footer_from_header(hdr); + + if(hdr->magic != DEBUG_MEMORY_MAGIC) { + debug_printf("%s:%u:%s: bad or corrupted memory %p\n", + hdr->file, hdr->line, hdr->function, + ptr); + debug_assert(0); + } + + if((start_no <= hdr->no && hdr->no < last_no) || + (last_no < start_no && (hdr->no < last_no || start_no <= hdr->no))) { + debug_printf("%s:%u:%s: %u bytes at %p not freed\n", + hdr->file, hdr->line, hdr->function, + hdr->size, ptr); + total_size += hdr->size; + } + + if(ftr->magic != DEBUG_MEMORY_MAGIC) { + debug_printf("%s:%u:%s: buffer overflow %p\n", + hdr->file, hdr->line, hdr->function, + ptr); + debug_assert(0); + } + } + + if(total_size) { + debug_printf("Total of %u KB of system memory apparently leaked\n", + (total_size + 1023)/1024); + } + else { + debug_printf("No memory leaks detected.\n"); + } +} diff --git a/src/gallium/auxiliary/util/u_debug_profile.c b/src/gallium/auxiliary/util/u_debug_profile.c new file mode 100644 index 0000000000..5f9772ef91 --- /dev/null +++ b/src/gallium/auxiliary/util/u_debug_profile.c @@ -0,0 +1,320 @@ +/************************************************************************** + * + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/** + * @file + * Poor-man profiling. + * + * @author José Fonseca + * + * @sa http://blogs.msdn.com/joshpoley/archive/2008/03/12/poor-man-s-profiler.aspx + * @sa http://www.johnpanzer.com/aci_cuj/index.html + */ + +#include "pipe/p_config.h" + +#if defined(PROFILE) && defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) + +#include +#include + +#include "pipe/p_debug.h" +#include "util/u_string.h" + + +#define PROFILE_TABLE_SIZE (1024*1024) +#define FILE_NAME_SIZE 256 + +struct debug_profile_entry +{ + uintptr_t caller; + uintptr_t callee; + uint64_t samples; +}; + +static unsigned long enabled = 0; + +static WCHAR wFileName[FILE_NAME_SIZE] = L"\\??\\c:\\00000000.prof"; +static ULONG_PTR iFile = 0; + +static struct debug_profile_entry *table = NULL; +static unsigned long free_table_entries = 0; +static unsigned long max_table_entries = 0; + +uint64_t start_stamp = 0; +uint64_t end_stamp = 0; + + +static void +debug_profile_entry(uintptr_t caller, uintptr_t callee, uint64_t samples) +{ + unsigned hash = ( caller + callee ) & PROFILE_TABLE_SIZE - 1; + + while(1) { + if(table[hash].caller == 0 && table[hash].callee == 0) { + table[hash].caller = caller; + table[hash].callee = callee; + table[hash].samples = samples; + --free_table_entries; + break; + } + else if(table[hash].caller == caller && table[hash].callee == callee) { + table[hash].samples += samples; + break; + } + else { + ++hash; + } + } +} + + +static uintptr_t caller_stack[1024]; +static unsigned last_caller = 0; + + +static int64_t delta(void) { + int64_t result = end_stamp - start_stamp; + if(result > UINT64_C(0xffffffff)) + result = 0; + return result; +} + + +static void __cdecl +debug_profile_enter(uintptr_t callee) +{ + uintptr_t caller = last_caller ? caller_stack[last_caller - 1] : 0; + + if (caller) + debug_profile_entry(caller, 0, delta()); + debug_profile_entry(caller, callee, 1); + caller_stack[last_caller++] = callee; +} + + +static void __cdecl +debug_profile_exit(uintptr_t callee) +{ + debug_profile_entry(callee, 0, delta()); + if(last_caller) + --last_caller; +} + + +/** + * Called at the start of every method or function. + * + * @sa http://msdn.microsoft.com/en-us/library/c63a9b7h.aspx + */ +void __declspec(naked) __cdecl +_penter(void) { + _asm { + push eax + mov eax, [enabled] + test eax, eax + jz skip + + push edx + + rdtsc + mov dword ptr [end_stamp], eax + mov dword ptr [end_stamp+4], edx + + xor eax, eax + mov [enabled], eax + + mov eax, [esp+8] + + push ebx + push ecx + push ebp + push edi + push esi + + push eax + call debug_profile_enter + add esp, 4 + + pop esi + pop edi + pop ebp + pop ecx + pop ebx + + mov eax, 1 + mov [enabled], eax + + rdtsc + mov dword ptr [start_stamp], eax + mov dword ptr [start_stamp+4], edx + + pop edx +skip: + pop eax + ret + } +} + + +/** + * Called at the end of Calls the end of every method or function. + * + * @sa http://msdn.microsoft.com/en-us/library/xc11y76y.aspx + */ +void __declspec(naked) __cdecl +_pexit(void) { + _asm { + push eax + mov eax, [enabled] + test eax, eax + jz skip + + push edx + + rdtsc + mov dword ptr [end_stamp], eax + mov dword ptr [end_stamp+4], edx + + xor eax, eax + mov [enabled], eax + + mov eax, [esp+8] + + push ebx + push ecx + push ebp + push edi + push esi + + push eax + call debug_profile_exit + add esp, 4 + + pop esi + pop edi + pop ebp + pop ecx + pop ebx + + mov eax, 1 + mov [enabled], eax + + rdtsc + mov dword ptr [start_stamp], eax + mov dword ptr [start_stamp+4], edx + + pop edx +skip: + pop eax + ret + } +} + + +/** + * Reference function for calibration. + */ +void __declspec(naked) +__debug_profile_reference(void) { + _asm { + call _penter + call _pexit + ret + } +} + + +void +debug_profile_start(void) +{ + WCHAR *p; + + // increment starting from the less significant digit + p = &wFileName[14]; + while(1) { + if(*p == '9') { + *p-- = '0'; + } + else { + *p += 1; + break; + } + } + + table = EngMapFile(wFileName, + PROFILE_TABLE_SIZE*sizeof(struct debug_profile_entry), + &iFile); + if(table) { + unsigned i; + + free_table_entries = max_table_entries = PROFILE_TABLE_SIZE; + memset(table, 0, PROFILE_TABLE_SIZE*sizeof(struct debug_profile_entry)); + + table[0].caller = (uintptr_t)&__debug_profile_reference; + table[0].callee = 0; + table[0].samples = 0; + --free_table_entries; + + _asm { + push edx + push eax + + rdtsc + mov dword ptr [start_stamp], eax + mov dword ptr [start_stamp+4], edx + + pop edx + pop eax + } + + last_caller = 0; + + enabled = 1; + + for(i = 0; i < 8; ++i) { + _asm { + call __debug_profile_reference + } + } + } +} + + +void +debug_profile_stop(void) +{ + enabled = 0; + + if(iFile) + EngUnmapFile(iFile); + iFile = 0; + table = NULL; + free_table_entries = max_table_entries = 0; +} + +#endif /* PROFILE */ diff --git a/src/gallium/auxiliary/util/u_gen_mipmap.c b/src/gallium/auxiliary/util/u_gen_mipmap.c index 2b4cdab6cf..7c20c7ce7b 100644 --- a/src/gallium/auxiliary/util/u_gen_mipmap.c +++ b/src/gallium/auxiliary/util/u_gen_mipmap.c @@ -35,7 +35,7 @@ #include "pipe/p_context.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_defines.h" #include "pipe/p_inlines.h" #include "pipe/p_shader_tokens.h" diff --git a/src/gallium/auxiliary/util/u_handle_table.c b/src/gallium/auxiliary/util/u_handle_table.c index 2d15932ce3..6da7353e25 100644 --- a/src/gallium/auxiliary/util/u_handle_table.c +++ b/src/gallium/auxiliary/util/u_handle_table.c @@ -34,7 +34,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_memory.h" #include "util/u_handle_table.h" diff --git a/src/gallium/auxiliary/util/u_hash_table.c b/src/gallium/auxiliary/util/u_hash_table.c index 0bc8de9632..2f83e318e4 100644 --- a/src/gallium/auxiliary/util/u_hash_table.c +++ b/src/gallium/auxiliary/util/u_hash_table.c @@ -39,7 +39,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "cso_cache/cso_hash.h" diff --git a/src/gallium/auxiliary/util/u_keymap.c b/src/gallium/auxiliary/util/u_keymap.c index 01b17ddb1b..3f70809efd 100644 --- a/src/gallium/auxiliary/util/u_keymap.c +++ b/src/gallium/auxiliary/util/u_keymap.c @@ -35,7 +35,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_error.h" #include "cso_cache/cso_hash.h" diff --git a/src/gallium/auxiliary/util/u_linear.c b/src/gallium/auxiliary/util/u_linear.c index e999cefe74..6be365e53b 100644 --- a/src/gallium/auxiliary/util/u_linear.c +++ b/src/gallium/auxiliary/util/u_linear.c @@ -1,5 +1,5 @@ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "u_linear.h" void diff --git a/src/gallium/auxiliary/util/u_math.h b/src/gallium/auxiliary/util/u_math.h index ab6f39ac31..1ecde7a912 100644 --- a/src/gallium/auxiliary/util/u_math.h +++ b/src/gallium/auxiliary/util/u_math.h @@ -40,7 +40,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #ifdef __cplusplus diff --git a/src/gallium/auxiliary/util/u_memory.h b/src/gallium/auxiliary/util/u_memory.h index 626b13af83..ceb3a1cb61 100644 --- a/src/gallium/auxiliary/util/u_memory.h +++ b/src/gallium/auxiliary/util/u_memory.h @@ -36,7 +36,7 @@ #include "util/u_pointer.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #ifdef __cplusplus @@ -56,7 +56,7 @@ extern "C" { /* memory debugging */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #define MALLOC( _size ) \ debug_malloc( __FILE__, __LINE__, __FUNCTION__, _size ) diff --git a/src/gallium/auxiliary/util/u_mm.c b/src/gallium/auxiliary/util/u_mm.c index 45ce257b5e..151a480d34 100644 --- a/src/gallium/auxiliary/util/u_mm.c +++ b/src/gallium/auxiliary/util/u_mm.c @@ -24,7 +24,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_memory.h" #include "util/u_mm.h" diff --git a/src/gallium/auxiliary/util/u_simple_shaders.c b/src/gallium/auxiliary/util/u_simple_shaders.c index 706155e99a..3cd2d52c64 100644 --- a/src/gallium/auxiliary/util/u_simple_shaders.c +++ b/src/gallium/auxiliary/util/u_simple_shaders.c @@ -34,7 +34,7 @@ #include "pipe/p_context.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_defines.h" #include "pipe/p_inlines.h" #include "pipe/p_screen.h" diff --git a/src/gallium/drivers/cell/spu/spu_util.c b/src/gallium/drivers/cell/spu/spu_util.c index b8a0d4a265..af25dd3718 100644 --- a/src/gallium/drivers/cell/spu/spu_util.c +++ b/src/gallium/drivers/cell/spu/spu_util.c @@ -1,7 +1,7 @@ #include "cell/common.h" #include "pipe/p_shader_tokens.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "tgsi/tgsi_parse.h" //#include "tgsi_build.h" #include "tgsi/tgsi_util.h" diff --git a/src/gallium/drivers/i915simple/i915_debug.c b/src/gallium/drivers/i915simple/i915_debug.c index a300b61c3b..e08582efab 100644 --- a/src/gallium/drivers/i915simple/i915_debug.c +++ b/src/gallium/drivers/i915simple/i915_debug.c @@ -31,7 +31,7 @@ #include "i915_debug.h" #include "i915_batch.h" #include "pipe/internal/p_winsys_screen.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" static void diff --git a/src/gallium/drivers/i915simple/i915_prim_vbuf.c b/src/gallium/drivers/i915simple/i915_prim_vbuf.c index f49f6d6ed1..2dc2e07329 100644 --- a/src/gallium/drivers/i915simple/i915_prim_vbuf.c +++ b/src/gallium/drivers/i915simple/i915_prim_vbuf.c @@ -40,7 +40,7 @@ #include "draw/draw_context.h" #include "draw/draw_vbuf.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_inlines.h" #include "pipe/internal/p_winsys_screen.h" #include "util/u_math.h" diff --git a/src/gallium/drivers/i965simple/brw_eu_debug.c b/src/gallium/drivers/i965simple/brw_eu_debug.c index 4a94ddefa6..4adfb0c02f 100644 --- a/src/gallium/drivers/i965simple/brw_eu_debug.c +++ b/src/gallium/drivers/i965simple/brw_eu_debug.c @@ -30,7 +30,7 @@ */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "brw_eu.h" diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index 4ae4ff4940..029b01e17d 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -1,7 +1,7 @@ #ifndef __NOUVEAU_STATEOBJ_H__ #define __NOUVEAU_STATEOBJ_H__ -#include "pipe/p_debug.h" +#include "util/u_debug.h" struct nouveau_stateobj_reloc { struct pipe_buffer *bo; diff --git a/src/gallium/drivers/nv04/nv04_prim_vbuf.c b/src/gallium/drivers/nv04/nv04_prim_vbuf.c index 18a8872ae3..221bee4777 100644 --- a/src/gallium/drivers/nv04/nv04_prim_vbuf.c +++ b/src/gallium/drivers/nv04/nv04_prim_vbuf.c @@ -1,5 +1,5 @@ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_inlines.h" #include "pipe/internal/p_winsys_screen.h" #include "pipe/p_compiler.h" diff --git a/src/gallium/drivers/nv10/nv10_prim_vbuf.c b/src/gallium/drivers/nv10/nv10_prim_vbuf.c index 7435d87315..5e5436be53 100644 --- a/src/gallium/drivers/nv10/nv10_prim_vbuf.c +++ b/src/gallium/drivers/nv10/nv10_prim_vbuf.c @@ -38,7 +38,7 @@ */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_inlines.h" #include "pipe/internal/p_winsys_screen.h" diff --git a/src/gallium/drivers/nv20/nv20_prim_vbuf.c b/src/gallium/drivers/nv20/nv20_prim_vbuf.c index 4dd7052814..187136ce7b 100644 --- a/src/gallium/drivers/nv20/nv20_prim_vbuf.c +++ b/src/gallium/drivers/nv20/nv20_prim_vbuf.c @@ -38,7 +38,7 @@ */ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_inlines.h" #include "pipe/internal/p_winsys_screen.h" diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 794fa2b9b8..196537a432 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -21,7 +21,7 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include "r300_chipset.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" /* r300_chipset: A file all to itself for deducing the various properties of * Radeons. */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index c8533d764d..da99a3be6b 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -23,7 +23,7 @@ #include "util/u_math.h" #include "util/u_pack_color.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/internal/p_winsys_screen.h" #include "r300_context.h" diff --git a/src/gallium/drivers/trace/tr_context.h b/src/gallium/drivers/trace/tr_context.h index 7831900ec2..6704175964 100644 --- a/src/gallium/drivers/trace/tr_context.h +++ b/src/gallium/drivers/trace/tr_context.h @@ -30,7 +30,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_context.h" diff --git a/src/gallium/drivers/trace/tr_dump.c b/src/gallium/drivers/trace/tr_dump.c index a0ead0ded3..d98cef221b 100644 --- a/src/gallium/drivers/trace/tr_dump.c +++ b/src/gallium/drivers/trace/tr_dump.c @@ -45,7 +45,7 @@ #endif #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_memory.h" #include "util/u_string.h" #include "util/u_stream.h" diff --git a/src/gallium/drivers/trace/tr_winsys.h b/src/gallium/drivers/trace/tr_winsys.h index 0fd2a40556..3670cb915e 100644 --- a/src/gallium/drivers/trace/tr_winsys.h +++ b/src/gallium/drivers/trace/tr_winsys.h @@ -30,7 +30,7 @@ #include "pipe/p_compiler.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/internal/p_winsys_screen.h" diff --git a/src/gallium/include/pipe/p_debug.h b/src/gallium/include/pipe/p_debug.h deleted file mode 100644 index e9c95982dd..0000000000 --- a/src/gallium/include/pipe/p_debug.h +++ /dev/null @@ -1,361 +0,0 @@ -/************************************************************************** - * - * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -/** - * @file - * Cross-platform debugging helpers. - * - * For now it just has assert and printf replacements, but it might be extended - * with stack trace reports and more advanced logging in the near future. - * - * @author Jose Fonseca - */ - -#ifndef P_DEBUG_H_ -#define P_DEBUG_H_ - - -#include - -#include "p_compiler.h" - - -#ifdef __cplusplus -extern "C" { -#endif - - -#if defined(DBG) || defined(DEBUG) -#ifndef DEBUG -#define DEBUG 1 -#endif -#else -#ifndef NDEBUG -#define NDEBUG 1 -#endif -#endif - - -/* MSVC bebore VC7 does not have the __FUNCTION__ macro */ -#if defined(_MSC_VER) && _MSC_VER < 1300 -#define __FUNCTION__ "???" -#endif - - -void _debug_vprintf(const char *format, va_list ap); - - -static INLINE void -_debug_printf(const char *format, ...) -{ - va_list ap; - va_start(ap, format); - _debug_vprintf(format, ap); - va_end(ap); -} - - -/** - * Print debug messages. - * - * The actual channel used to output debug message is platform specific. To - * avoid misformating or truncation, follow these rules of thumb: - * - output whole lines - * - avoid outputing large strings (512 bytes is the current maximum length - * that is guaranteed to be printed in all platforms) - */ -static INLINE void -debug_printf(const char *format, ...) -{ -#ifdef DEBUG - va_list ap; - va_start(ap, format); - _debug_vprintf(format, ap); - va_end(ap); -#else - (void) format; /* silence warning */ -#endif -} - - -#ifdef DEBUG -#define debug_vprintf(_format, _ap) _debug_vprintf(_format, _ap) -#else -#define debug_vprintf(_format, _ap) ((void)0) -#endif - - -#ifdef DEBUG -/** - * Dump a blob in hex to the same place that debug_printf sends its - * messages. - */ -void debug_print_blob( const char *name, const void *blob, unsigned size ); - -/* Print a message along with a prettified format string - */ -void debug_print_format(const char *msg, unsigned fmt ); -#else -#define debug_print_blob(_name, _blob, _size) ((void)0) -#define debug_print_format(_msg, _fmt) ((void)0) -#endif - - -void _debug_break(void); - - -/** - * Hard-coded breakpoint. - */ -#ifdef DEBUG -#if defined(PIPE_ARCH_X86) && defined(PIPE_CC_GCC) -#define debug_break() __asm("int3") -#elif defined(PIPE_ARCH_X86) && defined(PIPE_CC_MSVC) -#define debug_break() do { _asm {int 3} } while(0) -#else -#define debug_break() _debug_break() -#endif -#else /* !DEBUG */ -#define debug_break() ((void)0) -#endif /* !DEBUG */ - - -long -debug_get_num_option(const char *name, long dfault); - -void _debug_assert_fail(const char *expr, - const char *file, - unsigned line, - const char *function); - - -/** - * Assert macro - * - * Do not expect that the assert call terminates -- errors must be handled - * regardless of assert behavior. - */ -#ifdef DEBUG -#define debug_assert(expr) ((expr) ? (void)0 : _debug_assert_fail(#expr, __FILE__, __LINE__, __FUNCTION__)) -#else -#define debug_assert(expr) ((void)0) -#endif - - -/** Override standard assert macro */ -#ifdef assert -#undef assert -#endif -#define assert(expr) debug_assert(expr) - - -/** - * Output the current function name. - */ -#ifdef DEBUG -#define debug_checkpoint() \ - _debug_printf("%s\n", __FUNCTION__) -#else -#define debug_checkpoint() \ - ((void)0) -#endif - - -/** - * Output the full source code position. - */ -#ifdef DEBUG -#define debug_checkpoint_full() \ - _debug_printf("%s:%u:%s", __FILE__, __LINE__, __FUNCTION__) -#else -#define debug_checkpoint_full() \ - ((void)0) -#endif - - -/** - * Output a warning message. Muted on release version. - */ -#ifdef DEBUG -#define debug_warning(__msg) \ - _debug_printf("%s:%u:%s: warning: %s\n", __FILE__, __LINE__, __FUNCTION__, __msg) -#else -#define debug_warning(__msg) \ - ((void)0) -#endif - - -/** - * Output an error message. Not muted on release version. - */ -#ifdef DEBUG -#define debug_error(__msg) \ - _debug_printf("%s:%u:%s: error: %s\n", __FILE__, __LINE__, __FUNCTION__, __msg) -#else -#define debug_error(__msg) \ - _debug_printf("error: %s\n", __msg) -#endif - - -/** - * Used by debug_dump_enum and debug_dump_flags to describe symbols. - */ -struct debug_named_value -{ - const char *name; - unsigned long value; -}; - - -/** - * Some C pre-processor magic to simplify creating named values. - * - * Example: - * @code - * static const debug_named_value my_names[] = { - * DEBUG_NAMED_VALUE(MY_ENUM_VALUE_X), - * DEBUG_NAMED_VALUE(MY_ENUM_VALUE_Y), - * DEBUG_NAMED_VALUE(MY_ENUM_VALUE_Z), - * DEBUG_NAMED_VALUE_END - * }; - * - * ... - * debug_printf("%s = %s\n", - * name, - * debug_dump_enum(my_names, my_value)); - * ... - * @endcode - */ -#define DEBUG_NAMED_VALUE(__symbol) {#__symbol, (unsigned long)__symbol} -#define DEBUG_NAMED_VALUE_END {NULL, 0} - - -/** - * Convert a enum value to a string. - */ -const char * -debug_dump_enum(const struct debug_named_value *names, - unsigned long value); - -const char * -debug_dump_enum_noprefix(const struct debug_named_value *names, - const char *prefix, - unsigned long value); - - -/** - * Convert binary flags value to a string. - */ -const char * -debug_dump_flags(const struct debug_named_value *names, - unsigned long value); - - -/** - * Get option. - * - * It is an alias for getenv on Linux. - * - * On Windows it reads C:\gallium.cfg, which is a text file with CR+LF line - * endings with one option per line as - * - * NAME=value - * - * This file must be terminated with an extra empty line. - */ -const char * -debug_get_option(const char *name, const char *dfault); - -boolean -debug_get_bool_option(const char *name, boolean dfault); - -long -debug_get_num_option(const char *name, long dfault); - -unsigned long -debug_get_flags_option(const char *name, - const struct debug_named_value *flags, - unsigned long dfault); - - -void * -debug_malloc(const char *file, unsigned line, const char *function, - size_t size); - -void -debug_free(const char *file, unsigned line, const char *function, - void *ptr); - -void * -debug_calloc(const char *file, unsigned line, const char *function, - size_t count, size_t size ); - -void * -debug_realloc(const char *file, unsigned line, const char *function, - void *old_ptr, size_t old_size, size_t new_size ); - -unsigned long -debug_memory_begin(void); - -void -debug_memory_end(unsigned long beginning); - - -#if defined(PROFILE) && defined(PIPE_SUBSYSTEM_WINDOWS_DISPLAY) - -void -debug_profile_start(void); - -void -debug_profile_stop(void); - -#endif - - -#ifdef DEBUG -struct pipe_surface; -void debug_dump_image(const char *prefix, - unsigned format, unsigned cpp, - unsigned width, unsigned height, - unsigned stride, - const void *data); -void debug_dump_surface(const char *prefix, - struct pipe_surface *surface); -void debug_dump_surface_bmp(const char *filename, - struct pipe_surface *surface); -#else -#define debug_dump_image(prefix, format, cpp, width, height, stride, data) ((void)0) -#define debug_dump_surface(prefix, surface) ((void)0) -#define debug_dump_surface_bmp(filename, surface) ((void)0) -#endif - - -#ifdef __cplusplus -} -#endif - -#endif /* P_DEBUG_H_ */ diff --git a/src/gallium/include/pipe/p_format.h b/src/gallium/include/pipe/p_format.h index b42f98ceba..3f65a60436 100644 --- a/src/gallium/include/pipe/p_format.h +++ b/src/gallium/include/pipe/p_format.h @@ -30,8 +30,9 @@ #define PIPE_FORMAT_H #include "p_compiler.h" -#include "p_debug.h" +/* FIXME: remove these header dependencies */ +#include "util/u_debug.h" #include "util/u_string.h" #ifdef __cplusplus diff --git a/src/gallium/state_trackers/wgl/icd/stw_icd.c b/src/gallium/state_trackers/wgl/icd/stw_icd.c index 1aa4b8a6e2..5ac871da81 100644 --- a/src/gallium/state_trackers/wgl/icd/stw_icd.c +++ b/src/gallium/state_trackers/wgl/icd/stw_icd.c @@ -30,7 +30,7 @@ #include "GL/gl.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_thread.h" #include "shared/stw_public.h" diff --git a/src/gallium/state_trackers/wgl/shared/stw_device.c b/src/gallium/state_trackers/wgl/shared/stw_device.c index 903606b425..4b3cf51a53 100644 --- a/src/gallium/state_trackers/wgl/shared/stw_device.c +++ b/src/gallium/state_trackers/wgl/shared/stw_device.c @@ -27,7 +27,7 @@ #include -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "pipe/p_screen.h" #include "shared/stw_device.h" diff --git a/src/gallium/state_trackers/wgl/shared/stw_pixelformat.c b/src/gallium/state_trackers/wgl/shared/stw_pixelformat.c index 84b7b287b9..5cfdd41597 100644 --- a/src/gallium/state_trackers/wgl/shared/stw_pixelformat.c +++ b/src/gallium/state_trackers/wgl/shared/stw_pixelformat.c @@ -25,7 +25,7 @@ * **************************************************************************/ -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "stw_pixelformat.h" #include "stw_public.h" diff --git a/src/gallium/state_trackers/wgl/wgl/stw_wgl.c b/src/gallium/state_trackers/wgl/wgl/stw_wgl.c index f50b79b4e1..d7077ca5d4 100644 --- a/src/gallium/state_trackers/wgl/wgl/stw_wgl.c +++ b/src/gallium/state_trackers/wgl/wgl/stw_wgl.c @@ -27,7 +27,7 @@ #include -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "shared/stw_public.h" #include "stw_wgl.h" #include "stw.h" diff --git a/src/gallium/winsys/xlib/xlib_brw_aub.c b/src/gallium/winsys/xlib/xlib_brw_aub.c index 2956e1b960..ce4b5f83ff 100644 --- a/src/gallium/winsys/xlib/xlib_brw_aub.c +++ b/src/gallium/winsys/xlib/xlib_brw_aub.c @@ -34,7 +34,7 @@ #include "xlib_brw_aub.h" #include "pipe/p_context.h" #include "pipe/p_state.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" #include "util/u_memory.h" diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c index 7b5cf4c305..862d29fb1b 100644 --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c @@ -41,7 +41,7 @@ #include "shader/prog_instruction.h" #include "shader/prog_parameter.h" #include "shader/prog_print.h" -#include "pipe/p_debug.h" +#include "util/u_debug.h" /* * Map mesa register file to TGSI register file. -- cgit v1.2.3 From 922000d38a6e90c525328b381f04fea1244f616f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 18 Feb 2009 06:38:21 -0800 Subject: r300-gallium: Factor out common functionality in vbuf emit. --- src/gallium/drivers/r300/r300_swtcl_emit.c | 53 +++++++++++++++++++----------- 1 file changed, 34 insertions(+), 19 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index fb009247a5..327d4ac2e1 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -174,13 +174,9 @@ static boolean r300_swtcl_render_set_primitive(struct vbuf_render* render, return true; } -static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, - unsigned start, - unsigned count) +static void prepare_render(struct r300_swtcl_render* render) { - struct r300_swtcl_render* r300render = r300_swtcl_render(render); - struct r300_context* r300 = r300render->r300; - struct pipe_screen* screen = r300->context.screen; + struct r300_context* r300 = render->r300; CS_LOCALS(r300); @@ -188,7 +184,7 @@ static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, r300_update_derived_state(r300); r300_emit_dirty_state(r300); - /* Take care of vertex formats and routes */ + /* Take care of vertex formats and routes. */ BEGIN_CS(3); OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); OUT_CS(r300->vertex_info.hwfmt[0]); @@ -196,10 +192,39 @@ static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, END_CS; /* Draw stuff! */ + BEGIN_CS(6); + + /* Set the pointer to our vertex buffer. The emitted values are this: + * PACKET3 [3D_LOAD_VBPNTR] + * COUNT [1] + * FORMAT [size | stride << 8] + * VBPNTR [relocated BO] + * + * And of course that extra dword is space for the relocation. */ + OUT_CS(CP_PACKET3(R300_PACKET3_3D_LOAD_VBPNTR, 3)); + OUT_CS(1); + OUT_CS(r300->vertex_info.size | (r300->vertex_info.size << 8)); + OUT_CS(0); + OUT_CS_RELOC(render->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); +} + +static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, + unsigned start, + unsigned count) +{ + struct r300_swtcl_render* r300render = r300_swtcl_render(render); + struct r300_context* r300 = r300render->r300; + struct pipe_screen* screen = r300->context.screen; + + CS_LOCALS(r300); + + prepare_render(r300render); + BEGIN_CS(2); OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_VBUF_2, 0)); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); + END_CS; } static void r300_swtcl_render_draw(struct vbuf_render* render, @@ -214,9 +239,7 @@ static void r300_swtcl_render_draw(struct vbuf_render* render, CS_LOCALS(r300); - /* Make sure that all possible state is emitted. */ - r300_update_derived_state(r300); - r300_emit_dirty_state(r300); + prepare_render(r300render); /* Send our indices into an index buffer. */ index_buffer = pipe_buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, @@ -230,15 +253,7 @@ static void r300_swtcl_render_draw(struct vbuf_render* render, memcpy(index_map, indices, count * 4); pipe_buffer_unmap(screen, index_buffer); - /* Take care of vertex formats and routes */ - BEGIN_CS(3); - OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); - OUT_CS(r300->vertex_info.hwfmt[0]); - OUT_CS(r300->vertex_info.hwfmt[1]); - END_CS; - - /* Draw stuff! */ - BEGIN_CS(10); + BEGIN_CS(5); OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0)); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); -- cgit v1.2.3 From 310ea0354c75be693874bd63b5508eb7b3107f27 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Wed, 18 Feb 2009 20:32:40 +0100 Subject: r300-gallium: implement simple pipe_transfer Basically make the driver compile and behave like it did before the gallium-texture-transfer merge --- src/gallium/drivers/r300/r300_context.h | 3 ++ src/gallium/drivers/r300/r300_screen.c | 92 +++++++++++++++++++++++++++++---- src/gallium/drivers/r300/r300_screen.h | 15 ++++++ src/gallium/drivers/r300/r300_surface.c | 8 +-- src/gallium/drivers/r300/r300_texture.c | 8 +-- 5 files changed, 104 insertions(+), 22 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index a3727c8fb4..fc32f8f669 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -181,6 +181,9 @@ struct r300_texture { /* Offsets into the buffer. */ unsigned offset[PIPE_MAX_TEXTURE_LEVELS]; + /* Stride (pitch?) of this texture in bytes */ + unsigned stride; + /* Total size of this texture, in bytes. */ unsigned size; diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index d7354ad893..de3e80daf9 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -221,24 +221,92 @@ static boolean r300_is_format_supported(struct pipe_screen* pscreen, return FALSE; } -static void* r300_surface_map(struct pipe_screen* screen, - struct pipe_surface* surface, - unsigned flags) +static struct pipe_transfer* +r300_get_tex_transfer(struct pipe_screen *screen, + struct pipe_texture *texture, + unsigned face, unsigned level, unsigned zslice, + enum pipe_transfer_usage usage, unsigned x, unsigned y, + unsigned w, unsigned h) { - struct r300_texture* tex = (struct r300_texture*)surface->texture; - char* map = pipe_buffer_map(screen, tex->buffer, flags); + struct r300_texture *tex = (struct r300_texture *)texture; + struct r300_transfer *trans; + unsigned offset; /* in bytes */ + + /* XXX Add support for these things */ + if (texture->target == PIPE_TEXTURE_CUBE) { + debug_printf("PIPE_TEXTURE_CUBE is not yet supported.\n"); + /* offset = tex->image_offset[level][face]; */ + } + else if (texture->target == PIPE_TEXTURE_3D) { + debug_printf("PIPE_TEXTURE_3D is not yet supported.\n"); + /* offset = tex->image_offset[level][zslice]; */ + } + else { + offset = tex->offset[level]; + assert(face == 0); + assert(zslice == 0); + } + + trans = CALLOC_STRUCT(r300_transfer); + if (trans) { + trans->transfer.refcount = 1; + pipe_texture_reference(&trans->transfer.texture, texture); + trans->transfer.format = trans->transfer.format; + trans->transfer.width = w; + trans->transfer.height = h; + trans->transfer.block = texture->block; + trans->transfer.nblocksx = texture->nblocksx[level]; + trans->transfer.nblocksy = texture->nblocksy[level]; + trans->transfer.stride = tex->stride; + trans->transfer.usage = usage; + trans->offset = offset; + } + return &trans->transfer; +} + +static void +r300_tex_transfer_release(struct pipe_screen *screen, + struct pipe_transfer **transfer) +{ + struct pipe_transfer *trans = *transfer; + + if (--trans->refcount == 0) { + pipe_texture_reference(&trans->texture, NULL); + FREE(trans); + } + + *transfer = NULL; +} + +static void* r300_transfer_map(struct pipe_screen* screen, + struct pipe_transfer* transfer) +{ + struct r300_texture* tex = (struct r300_texture*)transfer->texture; + char* map; + unsigned flags = 0; + + if (transfer->usage != PIPE_TRANSFER_WRITE) { + flags |= PIPE_BUFFER_USAGE_CPU_READ; + } + if (transfer->usage != PIPE_TRANSFER_READ) { + flags |= PIPE_BUFFER_USAGE_CPU_WRITE; + } + + map = pipe_buffer_map(screen, tex->buffer, flags); if (!map) { return NULL; } - return map + surface->offset; + return map + r300_transfer(transfer)->offset + + transfer->y / transfer->block.height * transfer->stride + + transfer->x / transfer->block.width * transfer->block.size; } -static void r300_surface_unmap(struct pipe_screen* screen, - struct pipe_surface* surface) +static void r300_transfer_unmap(struct pipe_screen* screen, + struct pipe_transfer* transfer) { - struct r300_texture* tex = (struct r300_texture*)surface->texture; + struct r300_texture* tex = (struct r300_texture*)transfer->texture; pipe_buffer_unmap(screen, tex->buffer); } @@ -272,8 +340,10 @@ struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, r300screen->screen.get_param = r300_get_param; r300screen->screen.get_paramf = r300_get_paramf; r300screen->screen.is_format_supported = r300_is_format_supported; - r300screen->screen.surface_map = r300_surface_map; - r300screen->screen.surface_unmap = r300_surface_unmap; + r300screen->screen.get_tex_transfer = r300_get_tex_transfer; + r300screen->screen.tex_transfer_release = r300_tex_transfer_release; + r300screen->screen.transfer_map = r300_transfer_map; + r300screen->screen.transfer_unmap = r300_transfer_unmap; r300_init_screen_texture_functions(&r300screen->screen); u_simple_screen_init(&r300screen->screen); diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index 2e25f61dbf..6c845144cb 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -40,11 +40,26 @@ struct r300_screen { struct r300_capabilities* caps; }; +struct r300_transfer { + /* Parent class */ + struct pipe_transfer transfer; + + /* Offset from start of buffer. */ + unsigned offset; +}; + /* Convenience cast wrapper. */ static struct r300_screen* r300_screen(struct pipe_screen* screen) { return (struct r300_screen*)screen; } +/* Convenience cast wrapper. */ +static INLINE struct r300_transfer* +r300_transfer(struct pipe_transfer* transfer) +{ + return (struct r300_transfer*)transfer; +} + /* Creates a new r300 screen. */ struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, struct r300_winsys* r300_winsys); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index b2c4f4251d..e4589cc583 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,17 +42,17 @@ static void r300_surface_fill(struct pipe_context* pipe, b = (float)((color >> 0) & 0xff) / 255.0f; debug_printf("r300: Filling surface %p at (%d,%d)," " dimensions %dx%d (stride %d), color 0x%x\n", - dest, x, y, w, h, dest->stride, color); + dest, x, y, w, h, tex->stride, color); /* Fallback? */ - if (0) { + /*if (0) { debug_printf("r300: Falling back on surface clear..."); void* map = pipe->screen->surface_map(pipe->screen, dest, PIPE_BUFFER_USAGE_CPU_WRITE); pipe_fill_rect(map, &dest->block, &dest->stride, x, y, w, h, color); pipe->screen->surface_unmap(pipe->screen, dest); return; - } + }*/ BEGIN_CS(163 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); /* Flush PVS. */ @@ -293,7 +293,7 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); /* XXX (dest->stride >> 2) should be the buffer width in pixels however, * this little calculation is only good as long as the buffer is 32bpp */ - OUT_CS_REG(R300_RB3D_COLORPITCH0, (dest->stride >> 2) | + OUT_CS_REG(R300_RB3D_COLORPITCH0, (tex->stride >> 2) | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index bd35e089f9..edd4370663 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -124,12 +124,6 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, surface->format = texture->format; surface->width = texture->width[level]; surface->height = texture->height[level]; - surface->block = texture->block; - surface->nblocksx = texture->nblocksx[level]; - surface->nblocksy = texture->nblocksy[level]; - /* XXX save the actual stride instead plz kthnxbai */ - surface->stride = - (texture->nblocksx[level] * texture->block.size + 63) & ~63; surface->offset = offset; surface->usage = flags; surface->status = PIPE_SURFACE_STATUS_DEFINED; @@ -176,7 +170,7 @@ static struct pipe_texture* tex->tex.refcount = 1; tex->tex.screen = screen; - /* XXX tex->stride = *stride; */ + tex->stride = *stride; pipe_buffer_reference(screen, &tex->buffer, buffer); -- cgit v1.2.3 From d9602e5144bc76b9791fa3382ca38c880df96198 Mon Sep 17 00:00:00 2001 From: Jakob Bornecrantz Date: Fri, 20 Feb 2009 00:14:00 +0100 Subject: gallium: Improve makefiles for libraries The template makefile that most libraries in gallium included was based on dri and had a bunch unrelevant junk in it. Update it and improve the depending makefiles. --- src/gallium/Makefile.template | 74 ++++++++++++++-------------- src/gallium/auxiliary/cso_cache/Makefile | 3 -- src/gallium/auxiliary/draw/Makefile | 4 -- src/gallium/auxiliary/indices/Makefile | 4 -- src/gallium/auxiliary/pipebuffer/Makefile | 3 -- src/gallium/auxiliary/rtasm/Makefile | 3 -- src/gallium/auxiliary/sct/Makefile | 3 -- src/gallium/auxiliary/tgsi/Makefile | 3 -- src/gallium/auxiliary/translate/Makefile | 3 -- src/gallium/auxiliary/util/Makefile | 3 -- src/gallium/drivers/failover/Makefile | 3 -- src/gallium/drivers/i915simple/Makefile | 3 -- src/gallium/drivers/i965simple/Makefile | 2 - src/gallium/drivers/nv04/Makefile | 11 +---- src/gallium/drivers/nv10/Makefile | 11 +---- src/gallium/drivers/nv20/Makefile | 11 +---- src/gallium/drivers/nv30/Makefile | 11 +---- src/gallium/drivers/nv40/Makefile | 11 +---- src/gallium/drivers/nv50/Makefile | 11 +---- src/gallium/drivers/r300/Makefile | 2 - src/gallium/drivers/softpipe/Makefile | 3 -- src/gallium/drivers/trace/Makefile | 6 +-- src/gallium/state_trackers/glx/xlib/Makefile | 18 ++----- 23 files changed, 50 insertions(+), 156 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/Makefile.template b/src/gallium/Makefile.template index 655e949ca2..98487d43bd 100644 --- a/src/gallium/Makefile.template +++ b/src/gallium/Makefile.template @@ -1,64 +1,66 @@ -# -*-makefile-*- +# src/gallium/Makefile.template - -# We still have a dependency on the "dri" buffer manager. Most likely -# the interface can be reused in non-dri environments, and also as a -# frontend to simpler memory managers. +# Template makefile for gallium libraries. +# +# Usage: +# The minimum that the including makefile needs to define +# is TOP, LIBNAME and one of of the *_SOURCES. # -COMMON_SOURCES = +# Optional defines: +# LIBRARY_INCLUDES are appended to the list of includes directories. +# LIBRARY_DEFINES is not used for makedepend, but for compilation. -OBJECTS = $(C_SOURCES:.c=.o) \ - $(CPP_SOURCES:.cpp=.o) \ - $(ASM_SOURCES:.S=.o) +### Basic defines ### +OBJECTS = $(C_SOURCES:.c=.o) \ + $(CPP_SOURCES:.cpp=.o) \ + $(ASM_SOURCES:.S=.o) -### Include directories INCLUDES = \ -I. \ -I$(TOP)/src/gallium/include \ -I$(TOP)/src/gallium/auxiliary \ -I$(TOP)/src/gallium/drivers \ - -I$(TOP)/include \ - $(DRIVER_INCLUDES) - - -##### RULES ##### - -.c.o: - $(CC) -c $(INCLUDES) $(CFLAGS) $(DRIVER_DEFINES) $< -o $@ - -.cpp.o: - $(CXX) -c $(INCLUDES) $(CXXFLAGS) $(DRIVER_DEFINES) $< -o $@ - -.S.o: - $(CC) -c $(INCLUDES) $(CFLAGS) $(DRIVER_DEFINES) $< -o $@ + -I$(GALLIUM)/src/gallium/include \ + -I$(GALLIUM)/src/gallium/auxiliary \ + -I$(GALLIUM)/src/gallium/drivers \ + $(LIBRARY_INCLUDES) ##### TARGETS ##### -default: depend symlinks lib$(LIBNAME).a - +default: depend lib$(LIBNAME).a lib$(LIBNAME).a: $(OBJECTS) Makefile $(TOP)/src/gallium/Makefile.template - $(TOP)/bin/mklib -o $(LIBNAME) -static $(OBJECTS) $(DRIVER_LIBS) - + $(MKLIB) -o $(LIBNAME) -static $(OBJECTS) depend: $(C_SOURCES) $(CPP_SOURCES) $(ASM_SOURCES) $(SYMLINKS) rm -f depend touch depend - $(MKDEP) $(MKDEP_OPTIONS) $(DRIVER_DEFINES) $(INCLUDES) $(C_SOURCES) $(CPP_SOURCES) \ - $(ASM_SOURCES) 2> /dev/null - + $(MKDEP) $(MKDEP_OPTIONS) $(INCLUDES) $(C_SOURCES) $(CPP_SOURCES) $(ASM_SOURCES) 2> /dev/null # Emacs tags tags: etags `find . -name \*.[ch]` `find ../include` - # Remove .o and backup files -clean:: - -rm -f *.o */*.o *~ *.so *~ server/*.o $(SYMLINKS) - -rm -f depend depend.bak +clean: + rm -f $(OBJECTS) lib$(LIBNAME).a depend depend.bak + +# Dummy target +install: + @echo -n "" + +##### RULES ##### + +.c.o: + $(CC) -c $(INCLUDES) $(CFLAGS) $(LIBRARY_DEFINES) $< -o $@ + +.cpp.o: + $(CXX) -c $(INCLUDES) $(CXXFLAGS) $(LIBRARY_DEFINES) $< -o $@ + +.S.o: + $(CC) -c $(INCLUDES) $(CFLAGS) $(LIBRARY_DEFINES) $< -o $@ -include depend +sinclude depend diff --git a/src/gallium/auxiliary/cso_cache/Makefile b/src/gallium/auxiliary/cso_cache/Makefile index 6bd6602088..8726afcd94 100644 --- a/src/gallium/auxiliary/cso_cache/Makefile +++ b/src/gallium/auxiliary/cso_cache/Makefile @@ -9,6 +9,3 @@ C_SOURCES = \ cso_hash.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/auxiliary/draw/Makefile b/src/gallium/auxiliary/draw/Makefile index bdbf5a08ed..5041dcc072 100644 --- a/src/gallium/auxiliary/draw/Makefile +++ b/src/gallium/auxiliary/draw/Makefile @@ -43,8 +43,4 @@ C_SOURCES = \ draw_vs_ppc.c \ draw_vs_sse.c - include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/auxiliary/indices/Makefile b/src/gallium/auxiliary/indices/Makefile index 8fa61d265e..25ee899c40 100644 --- a/src/gallium/auxiliary/indices/Makefile +++ b/src/gallium/auxiliary/indices/Makefile @@ -10,7 +10,3 @@ include ../../Makefile.template u_indices_gen.c: u_indices_gen.py python $< > $@ - - -symlinks: - diff --git a/src/gallium/auxiliary/pipebuffer/Makefile b/src/gallium/auxiliary/pipebuffer/Makefile index 3b501c51df..1c00ba8d98 100644 --- a/src/gallium/auxiliary/pipebuffer/Makefile +++ b/src/gallium/auxiliary/pipebuffer/Makefile @@ -17,6 +17,3 @@ C_SOURCES = \ pb_validate.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/auxiliary/rtasm/Makefile b/src/gallium/auxiliary/rtasm/Makefile index 252dc5274a..ab8ea464c6 100644 --- a/src/gallium/auxiliary/rtasm/Makefile +++ b/src/gallium/auxiliary/rtasm/Makefile @@ -11,6 +11,3 @@ C_SOURCES = \ rtasm_ppc_spe.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/auxiliary/sct/Makefile b/src/gallium/auxiliary/sct/Makefile index 516d1756cf..a7d111b689 100644 --- a/src/gallium/auxiliary/sct/Makefile +++ b/src/gallium/auxiliary/sct/Makefile @@ -7,6 +7,3 @@ C_SOURCES = \ sct.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/auxiliary/tgsi/Makefile b/src/gallium/auxiliary/tgsi/Makefile index d7df9490cf..b4900e8dba 100644 --- a/src/gallium/auxiliary/tgsi/Makefile +++ b/src/gallium/auxiliary/tgsi/Makefile @@ -19,6 +19,3 @@ C_SOURCES = \ tgsi_util.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/auxiliary/translate/Makefile b/src/gallium/auxiliary/translate/Makefile index ad2a5b705e..3c82f8ae03 100644 --- a/src/gallium/auxiliary/translate/Makefile +++ b/src/gallium/auxiliary/translate/Makefile @@ -10,6 +10,3 @@ C_SOURCES = \ translate_cache.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/auxiliary/util/Makefile b/src/gallium/auxiliary/util/Makefile index 671e671df2..160df8dfa7 100644 --- a/src/gallium/auxiliary/util/Makefile +++ b/src/gallium/auxiliary/util/Makefile @@ -27,6 +27,3 @@ C_SOURCES = \ u_simple_screen.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/drivers/failover/Makefile b/src/gallium/drivers/failover/Makefile index f08b8df07a..dfb7f5dcf6 100644 --- a/src/gallium/drivers/failover/Makefile +++ b/src/gallium/drivers/failover/Makefile @@ -9,6 +9,3 @@ C_SOURCES = \ fo_context.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/drivers/i915simple/Makefile b/src/gallium/drivers/i915simple/Makefile index 41a61a0020..12821c5a76 100644 --- a/src/gallium/drivers/i915simple/Makefile +++ b/src/gallium/drivers/i915simple/Makefile @@ -26,6 +26,3 @@ C_SOURCES = \ i915_surface.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/drivers/i965simple/Makefile b/src/gallium/drivers/i965simple/Makefile index e97146e57c..19182afa75 100644 --- a/src/gallium/drivers/i965simple/Makefile +++ b/src/gallium/drivers/i965simple/Makefile @@ -50,5 +50,3 @@ C_SOURCES = \ brw_wm_surface_state.c include ../../Makefile.template - -symlinks: diff --git a/src/gallium/drivers/nv04/Makefile b/src/gallium/drivers/nv04/Makefile index 4ed62dae95..cf9deea851 100644 --- a/src/gallium/drivers/nv04/Makefile +++ b/src/gallium/drivers/nv04/Makefile @@ -3,7 +3,7 @@ include $(TOP)/configs/current LIBNAME = nv04 -DRIVER_SOURCES = \ +C_SOURCES = \ nv04_surface_2d.c \ nv04_clear.c \ nv04_context.c \ @@ -17,13 +17,4 @@ DRIVER_SOURCES = \ nv04_surface.c \ nv04_vbo.c -C_SOURCES = \ - $(COMMON_SOURCES) \ - $(DRIVER_SOURCES) - -ASM_SOURCES = - include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/drivers/nv10/Makefile b/src/gallium/drivers/nv10/Makefile index 4ba7ce586d..2b5fbd4f5a 100644 --- a/src/gallium/drivers/nv10/Makefile +++ b/src/gallium/drivers/nv10/Makefile @@ -3,7 +3,7 @@ include $(TOP)/configs/current LIBNAME = nv10 -DRIVER_SOURCES = \ +C_SOURCES = \ nv10_clear.c \ nv10_context.c \ nv10_fragprog.c \ @@ -16,13 +16,4 @@ DRIVER_SOURCES = \ nv10_surface.c \ nv10_vbo.c -C_SOURCES = \ - $(COMMON_SOURCES) \ - $(DRIVER_SOURCES) - -ASM_SOURCES = - include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/drivers/nv20/Makefile b/src/gallium/drivers/nv20/Makefile index d777fd3d8b..93e34f8e92 100644 --- a/src/gallium/drivers/nv20/Makefile +++ b/src/gallium/drivers/nv20/Makefile @@ -3,7 +3,7 @@ include $(TOP)/configs/current LIBNAME = nv20 -DRIVER_SOURCES = \ +C_SOURCES = \ nv20_clear.c \ nv20_context.c \ nv20_fragprog.c \ @@ -17,13 +17,4 @@ DRIVER_SOURCES = \ nv20_vbo.c # nv20_vertprog.c -C_SOURCES = \ - $(COMMON_SOURCES) \ - $(DRIVER_SOURCES) - -ASM_SOURCES = - include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile index 69f2790dfe..4c29e2eab3 100644 --- a/src/gallium/drivers/nv30/Makefile +++ b/src/gallium/drivers/nv30/Makefile @@ -3,7 +3,7 @@ include $(TOP)/configs/current LIBNAME = nv30 -DRIVER_SOURCES = \ +C_SOURCES = \ nv30_clear.c \ nv30_context.c \ nv30_draw.c \ @@ -25,13 +25,4 @@ DRIVER_SOURCES = \ nv30_vbo.c \ nv30_vertprog.c -C_SOURCES = \ - $(COMMON_SOURCES) \ - $(DRIVER_SOURCES) - -ASM_SOURCES = - include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile index 9c8eadf7e4..8c738aefa6 100644 --- a/src/gallium/drivers/nv40/Makefile +++ b/src/gallium/drivers/nv40/Makefile @@ -3,7 +3,7 @@ include $(TOP)/configs/current LIBNAME = nv40 -DRIVER_SOURCES = \ +C_SOURCES = \ nv40_clear.c \ nv40_context.c \ nv40_draw.c \ @@ -25,13 +25,4 @@ DRIVER_SOURCES = \ nv40_vbo.c \ nv40_vertprog.c -C_SOURCES = \ - $(COMMON_SOURCES) \ - $(DRIVER_SOURCES) - -ASM_SOURCES = - include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/drivers/nv50/Makefile b/src/gallium/drivers/nv50/Makefile index 48244dbbac..612aea28a3 100644 --- a/src/gallium/drivers/nv50/Makefile +++ b/src/gallium/drivers/nv50/Makefile @@ -3,7 +3,7 @@ include $(TOP)/configs/current LIBNAME = nv50 -DRIVER_SOURCES = \ +C_SOURCES = \ nv50_clear.c \ nv50_context.c \ nv50_draw.c \ @@ -18,13 +18,4 @@ DRIVER_SOURCES = \ nv50_transfer.c \ nv50_vbo.c -C_SOURCES = \ - $(COMMON_SOURCES) \ - $(DRIVER_SOURCES) - -ASM_SOURCES = - include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 85b3f15ac5..9b7524b523 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -18,5 +18,3 @@ C_SOURCES = \ r300_texture.c include ../../Makefile.template - -symlinks: diff --git a/src/gallium/drivers/softpipe/Makefile b/src/gallium/drivers/softpipe/Makefile index f186f6df1d..516e3992fd 100644 --- a/src/gallium/drivers/softpipe/Makefile +++ b/src/gallium/drivers/softpipe/Makefile @@ -42,6 +42,3 @@ C_SOURCES = \ sp_surface.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/drivers/trace/Makefile b/src/gallium/drivers/trace/Makefile index 3859b8acb0..e1bd970937 100644 --- a/src/gallium/drivers/trace/Makefile +++ b/src/gallium/drivers/trace/Makefile @@ -9,10 +9,6 @@ C_SOURCES = \ tr_screen.c \ tr_state.c \ tr_texture.c \ - tr_winsys.c - + tr_winsys.c include ../../Makefile.template - -symlinks: - diff --git a/src/gallium/state_trackers/glx/xlib/Makefile b/src/gallium/state_trackers/glx/xlib/Makefile index 1b63db1f0e..6d10b090aa 100644 --- a/src/gallium/state_trackers/glx/xlib/Makefile +++ b/src/gallium/state_trackers/glx/xlib/Makefile @@ -3,23 +3,15 @@ include $(TOP)/configs/current LIBNAME = xlib - -DRIVER_INCLUDES = \ +LIBRARY_INCLUDES = \ -I$(TOP)/include \ -I$(TOP)/src/mesa \ - -I$(TOP)/src/mesa/main \ - -I$(TOP)/src/gallium/include \ - -I$(TOP)/src/gallium/drivers \ - -I$(TOP)/src/gallium/auxiliary + -I$(TOP)/src/mesa/main C_SOURCES = \ - glxapi.c \ - fakeglx.c \ - fakeglx_fonts.c \ + glxapi.c \ + fakeglx.c \ + fakeglx_fonts.c \ xm_api.c - include ../../../Makefile.template - -symlinks: - -- cgit v1.2.3 From b11f1c35d556b0c2d6815e33745b02e740e69167 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Fri, 20 Feb 2009 03:53:20 +0100 Subject: r300-gallium: correct buffer stride calculation --- src/gallium/drivers/r300/r300_surface.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index e4589cc583..e6180a3561 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -37,12 +37,13 @@ static void r300_surface_fill(struct pipe_context* pipe, struct r300_texture* tex = (struct r300_texture*)dest->texture; int i; float r, g, b, a; + unsigned pixpitch = tex->stride / tex->tex.block.size; r = (float)((color >> 16) & 0xff) / 255.0f; g = (float)((color >> 8) & 0xff) / 255.0f; b = (float)((color >> 0) & 0xff) / 255.0f; debug_printf("r300: Filling surface %p at (%d,%d)," - " dimensions %dx%d (stride %d), color 0x%x\n", - dest, x, y, w, h, tex->stride, color); + " dimensions %dx%d (pixel pitch %d), color 0x%x\n", + dest, x, y, w, h, pixpitch, color); /* Fallback? */ /*if (0) { @@ -291,10 +292,8 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - /* XXX (dest->stride >> 2) should be the buffer width in pixels however, - * this little calculation is only good as long as the buffer is 32bpp */ - OUT_CS_REG(R300_RB3D_COLORPITCH0, (tex->stride >> 2) | - R300_COLOR_FORMAT_ARGB8888); + /* XXX Fix color format in case it's not ARGB8888 */ + OUT_CS_REG(R300_RB3D_COLORPITCH0, pixpitch | R300_COLOR_FORMAT_ARGB8888); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); -- cgit v1.2.3 From 4776ebc648c6793b1d001ae2f46a673a19ab5ff3 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Sat, 21 Feb 2009 17:27:12 +0100 Subject: r300-gallium: Add all supported 2d texture formats --- src/gallium/drivers/r300/r300_screen.c | 33 ++++++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index de3e80daf9..5ff9015a7b 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -174,8 +174,7 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) } } -/* XXX even moar formats */ -static boolean check_tex_2d_format(enum pipe_format format) +static boolean check_tex_2d_format(enum pipe_format format, boolean is_r500) { switch (format) { /* Colorbuffer */ @@ -188,13 +187,32 @@ static boolean check_tex_2d_format(enum pipe_format format) case PIPE_FORMAT_Z24S8_UNORM: return TRUE; - /* These formats are explicitly not supported, in order to keep - * people from wasting their time trying to implement them... */ - case PIPE_FORMAT_S8Z24_UNORM: + /* XXX Supported yet unimplemented formats: */ + case PIPE_FORMAT_A1R5G5B5_UNORM: + case PIPE_FORMAT_R5G6B5_UNORM: + /* XXX These don't even exist + case PIPE_FORMAT_A32R32G32B32: + case PIPE_FORMAT_A16R16G16B16: */ + /* XXX Insert YUV422 packed VYUY and YVYU here */ + /* XXX What the deuce is UV88? (r3xx accel page 14) */ + case PIPE_FORMAT_A4R4G4B4_UNORM: + debug_printf("r300: Warning: Got unimplemented format: %s in %s\n", + pf_name(format), __FUNCTION__); + return FALSE; + + /* XXX Supported yet unimplemented r5xx formats: */ + /* XXX Again, what is UV1010 this time? (r5xx accel page 148) */ + /* XXX Even more that don't exist + case PIPE_FORMAT_A10R10G10B10_UNORM: + case PIPE_FORMAT_A2R10G10B10_UNORM: + case PIPE_FORMAT_I10_UNORM: */ + debug_printf( + "r300: Warning: Got unimplemented r500 format: %s in %s\n", + pf_name(format), __FUNCTION__); return FALSE; default: - debug_printf("r300: Warning: Got unknown format: %s, in %s\n", + debug_printf("r300: Warning: Got unsupported format: %s in %s\n", pf_name(format), __FUNCTION__); break; } @@ -211,7 +229,8 @@ static boolean r300_is_format_supported(struct pipe_screen* pscreen, { switch (target) { case PIPE_TEXTURE_2D: - return check_tex_2d_format(format); + return check_tex_2d_format(format, + r300_screen(pscreen)->caps->is_r500); default: debug_printf("r300: Warning: Got unknown format target: %d\n", format); -- cgit v1.2.3 From ddc6ee316cd7ca07853efc615cd2681f3a1232d4 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Sat, 21 Feb 2009 17:40:48 +0100 Subject: r300-gallium: Add pipe_format translators and apply them --- src/gallium/drivers/r300/r300_state_inlines.h | 83 +++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_surface.c | 4 +- src/gallium/drivers/r300/r300_surface.h | 1 + 3 files changed, 86 insertions(+), 2 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_state_inlines.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h new file mode 100644 index 0000000000..005fb74ed6 --- /dev/null +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -0,0 +1,83 @@ +/* + * Copyright 2009 Joakim Sindholt + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_STATE_INLINES_H +#define R300_STATE_INLINES_H + +#include "pipe/p_format.h" + +#include "r300_reg.h" + +static INLINE uint32_t r300_translate_colorformat(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_A8R8G8B8_UNORM: + return R300_COLOR_FORMAT_ARGB8888; + case PIPE_FORMAT_I8_UNORM: + return R300_COLOR_FORMAT_I8; + case PIPE_FORMAT_A1R5G5B5_UNORM: + return R300_COLOR_FORMAT_ARGB1555; + case PIPE_FORMAT_R5G6B5_UNORM: + return R300_COLOR_FORMAT_RGB565; + /* XXX Not in pipe_format + case PIPE_FORMAT_A32R32G32B32: + return R300_COLOR_FORMAT_ARGB32323232; + case PIPE_FORMAT_A16R16G16B16: + return R300_COLOR_FORMAT_ARGB16161616; */ + case PIPE_FORMAT_A4R4G4B4_UNORM: + return R300_COLOR_FORMAT_ARGB4444; + /* XXX Not in pipe_format + case PIPE_FORMAT_A10R10G10B10_UNORM: + return R500_COLOR_FORMAT_ARGB10101010; + case PIPE_FORMAT_A2R10G10B10_UNORM: + return R500_COLOR_FORMAT_ARGB2101010; + case PIPE_FORMAT_I10_UNORM: + return R500_COLOR_FORMAT_I10; */ + default: + debug_printf("r300: Implementation error: " \ + "Got unsupported color format %s in %s\n", + pf_name(format), __FUNCTION__); + break; + } + + return 0; +} + +static INLINE uint32_t r300_translate_zsformat(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_Z16_UNORM: + return R300_DEPTHFORMAT_16BIT_INT_Z; + /* XXX R300_DEPTHFORMAT_16BIT_13E3 anyone? */ + case PIPE_FORMAT_Z24S8_UNORM: + return R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL; + default: + debug_printf("r300: Implementation error: " \ + "Got unsupported ZS format %s in %s\n", + pf_name(format), __FUNCTION__); + break; + } + + return 0; +} + +#endif /* R300_STATE_INLINES_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index e6180a3561..49e4a96f83 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -292,8 +292,8 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - /* XXX Fix color format in case it's not ARGB8888 */ - OUT_CS_REG(R300_RB3D_COLORPITCH0, pixpitch | R300_COLOR_FORMAT_ARGB8888); + OUT_CS_REG(R300_RB3D_COLORPITCH0, pixpitch | + r300_translate_colorformat(tex->tex.format)); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 17d6c62fe8..442eac2cf2 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -32,6 +32,7 @@ #include "r300_cs.h" #include "r300_emit.h" #include "r300_state_shader.h" +#include "r300_state_inlines.h" const struct r300_blend_state blend_clear_state = { .blend_control = 0x0, -- cgit v1.2.3 From d7370102960689f5092df05d5097ecae8d0096d4 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 23 Feb 2009 03:16:46 -0800 Subject: r300-gallium: Fix BEGIN_CS size. --- src/gallium/drivers/r300/r300_emit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 0c86a9c92d..d57ccffcb0 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -84,7 +84,7 @@ void r300_emit_fragment_shader(struct r300_context* r300, { CS_LOCALS(r300); int i; - BEGIN_CS(0); + BEGIN_CS(22); OUT_CS_REG(R300_US_CONFIG, MAX2(fs->indirections - 1, 0)); OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size); -- cgit v1.2.3 From 763714d9009147478ab8265390678f91af70f952 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 23 Feb 2009 03:18:02 -0800 Subject: r300-gallium: Finish VAP/VF setup. Messy, messy. --- src/gallium/drivers/r300/r300_context.h | 11 +++- src/gallium/drivers/r300/r300_state_derived.c | 86 ++++++++++++++++++++++----- src/gallium/drivers/r300/r300_swtcl_emit.c | 30 +++++++--- 3 files changed, 102 insertions(+), 25 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index fc32f8f669..5bcf23e2c5 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -191,6 +191,15 @@ struct r300_texture { struct pipe_buffer* buffer; }; +struct r300_vertex_format { + /* Parent class */ + struct vertex_info vinfo; + /* R300_VAP_PROG_STREAK_CNTL_[0-7] */ + uint32_t vap_prog_stream_cntl[8]; + /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */ + uint32_t vap_prog_stream_cntl_ext[8]; +}; + struct r300_context { /* Parent class */ struct pipe_context context; @@ -228,7 +237,7 @@ struct r300_context { struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS]; int vertex_buffer_count; /* Vertex information. */ - struct vertex_info vertex_info; + struct r300_vertex_format vertex_info; /* Bitmask of dirty state objects. */ uint32_t dirty_state; /* Flag indicating whether or not the HW is dirty. */ diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index df19f20fc8..2d611b951d 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -25,6 +25,24 @@ /* r300_state_derived: Various bits of state which are dependent upon * currently bound CSO data. */ +static uint32_t translate_vertex_data_type(int type) { + switch (type) { + case EMIT_1F: + case EMIT_1F_PSIZE: + return R300_DATA_TYPE_FLOAT_1; + break; + case EMIT_2F: + return R300_DATA_TYPE_FLOAT_2; + break; + case EMIT_3F: + return R300_DATA_TYPE_FLOAT_3; + break; + case EMIT_4F: + return R300_DATA_TYPE_FLOAT_4; + break; + } +} + /* Update the vertex_info struct in our r300_context. * * The vertex_info struct describes the post-TCL format of vertices. It is @@ -40,6 +58,8 @@ static void r300_update_vertex_layout(struct r300_context* r300) struct tgsi_shader_info* info = &r300->fs->info; memset(&vinfo, 0, sizeof(vinfo)); + assert(info->num_inputs <= 16); + /* This is rather lame. Since draw_find_vs_output doesn't return an error * when it can't find an output, we have to pre-iterate and count each * output ourselves. */ @@ -70,46 +90,82 @@ static void r300_update_vertex_layout(struct r300_context* r300) /* Do the actual vertex_info setup. * * vertex_info has four uints of hardware-specific data in it. - * vinfo.hwfmt[0] is VAP_OUT_VTX_FMT_0 - * vinfo.hwfmt[1] is VAP_OUT_VTX_FMT_1 */ - - if (pos) { - draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_POS, - draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); - vinfo.hwfmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; - } else { - debug_printf("r300: No vertex input for position in SW TCL;\n" - " this will probably end poorly.\n"); + * vinfo.hwfmt[0] is R300_VAP_VTX_STATE_CNTL + * vinfo.hwfmt[1] is R300_VAP_VSM_VTX_ASSM + * vinfo.hwfmt[2] is R300_VAP_OUTPUT_VTX_FMT_0 + * vinfo.hwfmt[3] is R300_VAP_OUTPUT_VTX_FMT_1 */ + + vinfo.hwfmt[0] = 0x5555; /* XXX this is classic Mesa bonghits */ + + if (!pos) { + debug_printf("r300: Forcing vertex position attribute emit..."); } + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_POS, + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); + vinfo.hwfmt[1] |= R300_INPUT_CNTL_POS; + vinfo.hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; + if (psize) { - draw_emit_vertex_attr(&vinfo, EMIT_1F, INTERP_LINEAR, + draw_emit_vertex_attr(&vinfo, EMIT_1F_PSIZE, INTERP_LINEAR, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_PSIZE, 0)); - vinfo.hwfmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; + vinfo.hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; } for (i = 0; i < cols; i++) { draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_COLOR, i)); - vinfo.hwfmt[0] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i); + vinfo.hwfmt[1] |= R300_INPUT_CNTL_COLOR; + vinfo.hwfmt[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i); } if (fog) { draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0)); - vinfo.hwfmt[0] |= + vinfo.hwfmt[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << cols); } for (i = 0; i < texs; i++) { draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i)); - vinfo.hwfmt[1] |= (4 << (3 * i)); + vinfo.hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); + vinfo.hwfmt[3] |= (4 << (3 * i)); } draw_compute_vertex_size(&vinfo); if (memcmp(&r300->vertex_info, &vinfo, sizeof(struct vertex_info))) { + uint32_t temp; + +#define BORING_SWIZZLE \ + ((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | \ + (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | \ + (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | \ + (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | \ + (0xf << R300_WRITE_ENA_SHIFT)) + + for (i = 0; i < vinfo.num_attribs; i++) { + temp = translate_vertex_data_type(vinfo.attrib[i].emit) | + R300_SIGNED; + if (i & 1) { + r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff0000; + r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= + (translate_vertex_data_type(vinfo.attrib[i].emit) | + R300_SIGNED) << 16; + } else { + r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff; + r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= + translate_vertex_data_type(vinfo.attrib[i].emit) | + R300_SIGNED; + } + + r300->vertex_info.vap_prog_stream_cntl_ext[i >> 1] |= + (BORING_SWIZZLE << (i & 1 ? 16 : 0)); + } + r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= (R300_LAST_VEC << + (i & 1 ? 16 : 0)); + memcpy(&r300->vertex_info, &vinfo, sizeof(struct vertex_info)); r300->dirty_state |= R300_NEW_VERTEX_FORMAT; } diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index 327d4ac2e1..3ce1837ed1 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -177,6 +177,7 @@ static boolean r300_swtcl_render_set_primitive(struct vbuf_render* render, static void prepare_render(struct r300_swtcl_render* render) { struct r300_context* r300 = render->r300; + int i; CS_LOCALS(r300); @@ -185,27 +186,38 @@ static void prepare_render(struct r300_swtcl_render* render) r300_emit_dirty_state(r300); /* Take care of vertex formats and routes. */ - BEGIN_CS(3); + BEGIN_CS(6); + OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2); + OUT_CS(r300->vertex_info.vinfo.hwfmt[0]); + OUT_CS(r300->vertex_info.vinfo.hwfmt[1]); OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); - OUT_CS(r300->vertex_info.hwfmt[0]); - OUT_CS(r300->vertex_info.hwfmt[1]); + OUT_CS(r300->vertex_info.vinfo.hwfmt[2]); + OUT_CS(r300->vertex_info.vinfo.hwfmt[3]); END_CS; - /* Draw stuff! */ - BEGIN_CS(6); + BEGIN_CS(18); + OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8); + for (i = 0; i < 8; i++) { + OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]); + } + OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8); + for (i = 0; i < 8; i++) { + OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]); + } + END_CS; /* Set the pointer to our vertex buffer. The emitted values are this: * PACKET3 [3D_LOAD_VBPNTR] * COUNT [1] * FORMAT [size | stride << 8] * VBPNTR [relocated BO] - * - * And of course that extra dword is space for the relocation. */ + */ + BEGIN_CS(5); OUT_CS(CP_PACKET3(R300_PACKET3_3D_LOAD_VBPNTR, 3)); OUT_CS(1); - OUT_CS(r300->vertex_info.size | (r300->vertex_info.size << 8)); - OUT_CS(0); + OUT_CS(r300->vertex_info.vinfo.size | (r300->vertex_info.vinfo.size << 8)); OUT_CS_RELOC(render->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); + END_CS; } static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, -- cgit v1.2.3 From f72e77791116eda427438f9d9e895de71123c334 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 23 Feb 2009 04:25:29 -0800 Subject: r300-gallium: Decode passthrough shader for r300. Looks pretty sane. --- src/gallium/drivers/r300/r300_reg.h | 15 ++++++++++++++- src/gallium/drivers/r300/r300_state_shader.h | 17 ++++++++++++----- 2 files changed, 26 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index be26b13b0b..8888b39a2f 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1796,6 +1796,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_ALU_DSTC_OUTPUT_X (1 << 26) # define R300_ALU_DSTC_OUTPUT_Y (1 << 27) # define R300_ALU_DSTC_OUTPUT_Z (1 << 28) +# define R300_ALU_DSTC_OUTPUT_XYZ (7 << 26) +# define R300_RGB_ADDR0(x) ((x) << 0) +# define R300_RGB_ADDR1(x) ((x) << 6) +# define R300_RGB_ADDR2(x) ((x) << 12) #define R300_US_ALU_ALPHA_ADDR_0 0x47C0 # define R300_ALU_SRC0A_SHIFT 0 @@ -1813,6 +1817,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_ALU_DSTA_REG (1 << 23) # define R300_ALU_DSTA_OUTPUT (1 << 24) # define R300_ALU_DSTA_DEPTH (1 << 27) +# define R300_ALPHA_ADDR0(x) ((x) << 0) +# define R300_ALPHA_ADDR1(x) ((x) << 6) +# define R300_ALPHA_ADDR2(x) ((x) << 12) #define R300_US_ALU_RGB_INST_0 0x48C0 # define R300_ALU_ARGC_SRC0C_XYZ 0 @@ -1847,6 +1854,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_ALU_ARGC_SRC0CA_WZY 29 # define R300_ALU_ARGC_SRC1CA_WZY 30 # define R300_ALU_ARGC_SRC2CA_WZY 31 +# define R300_RGB_SWIZA(x) ((x) << 0) +# define R300_RGB_SWIZB(x) ((x) << 7) +# define R300_RGB_SWIZC(x) ((x) << 14) # define R300_ALU_ARG0C_SHIFT 0 # define R300_ALU_ARG0C_MASK (31 << 0) @@ -1910,10 +1920,13 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_ALU_ARGA_SRCP_Y 13 # define R300_ALU_ARGA_SRCP_Z 14 # define R300_ALU_ARGA_SRCP_W 15 - # define R300_ALU_ARGA_ZERO 16 # define R300_ALU_ARGA_ONE 17 # define R300_ALU_ARGA_HALF 18 +# define R300_ALPHA_SWIZA(x) ((x) << 0) +# define R300_ALPHA_SWIZB(x) ((x) << 7) +# define R300_ALPHA_SWIZC(x) ((x) << 14) + # define R300_ALU_ARG0A_SHIFT 0 # define R300_ALU_ARG0A_MASK (31 << 0) # define R300_ALU_ARG0A_NOP (0 << 5) diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 1d5d9ee943..73025b2dcc 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -47,11 +47,18 @@ static const struct r300_fragment_shader r300_passthrough_fragment_shader = { .indirections = 1, .shader.stack_size = 2, - /* XXX decode these */ - .instructions[0].alu_rgb_inst = 0x50A80, - .instructions[0].alu_rgb_inst = 0x1C000000, - .instructions[0].alu_alpha_inst = 0x40889, - .instructions[0].alu_alpha_inst = 0x1000000, + .instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZB(R300_ALU_ARGC_ONE) | + R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | + R300_ALU_OUTC_MAD, + .instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | + R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, + .instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZB(R300_ALU_ARGA_ONE) | + R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | + R300_ALU_OUTA_MAD, + .instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | + R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, }; static const struct r500_fragment_shader r500_passthrough_fragment_shader = { -- cgit v1.2.3 From b003b2f6dd4ddba45910560ab6d495fb01b5301b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 23 Feb 2009 04:36:41 -0800 Subject: r300-gallium: Fix a handful of compile warnings. Some harmless, some very dangerous. --- src/gallium/drivers/r300/r300_context.h | 1 + src/gallium/drivers/r300/r300_state_derived.c | 8 +++++++- src/gallium/drivers/r300/r300_swtcl_emit.c | 10 +++++----- 3 files changed, 13 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 5bcf23e2c5..aaab1dd2bc 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -250,6 +250,7 @@ static struct r300_context* r300_context(struct pipe_context* context) { } /* Context initialization. */ +struct draw_stage* r300_draw_swtcl_stage(struct r300_context* r300); void r300_init_state_functions(struct r300_context* r300); void r300_init_surface_functions(struct r300_context* r300); diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 2d611b951d..a51904096f 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -40,7 +40,13 @@ static uint32_t translate_vertex_data_type(int type) { case EMIT_4F: return R300_DATA_TYPE_FLOAT_4; break; + default: + debug_printf("r300: Implementation error: " + "Bad vertex data type!\n"); + break; } + + return 0; } /* Update the vertex_info struct in our r300_context. @@ -98,7 +104,7 @@ static void r300_update_vertex_layout(struct r300_context* r300) vinfo.hwfmt[0] = 0x5555; /* XXX this is classic Mesa bonghits */ if (!pos) { - debug_printf("r300: Forcing vertex position attribute emit..."); + debug_printf("r300: Forcing vertex position attribute emit...\n"); } draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_POS, diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index 3ce1837ed1..1ae69e7d13 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -78,7 +78,7 @@ static boolean r300_swtcl_render_allocate_vertices(struct vbuf_render* render, size_t size = (size_t)vertex_size * (size_t)count; if (r300render->vbo) { - pipe_buffer_reference(screen, r300render->vbo, NULL); + pipe_buffer_reference(screen, &r300render->vbo, NULL); } r300render->vbo_size = MAX2(size, r300render->vbo_alloc_size); @@ -108,9 +108,9 @@ static void* r300_swtcl_render_map_vertices(struct vbuf_render* render) return (unsigned char*)r300render->vbo_map + r300render->vbo_offset; } -static void* r300_swtcl_render_unmap_vertices(struct vbuf_render* render, - ushort min, - ushort max) +static void r300_swtcl_render_unmap_vertices(struct vbuf_render* render, + ushort min, + ushort max) { struct r300_swtcl_render* r300render = r300_swtcl_render(render); struct pipe_screen* screen = r300render->r300->context.screen; @@ -126,7 +126,7 @@ static void r300_swtcl_render_release_vertices(struct vbuf_render* render) struct r300_swtcl_render* r300render = r300_swtcl_render(render); struct pipe_screen* screen = r300render->r300->context.screen; - pipe_buffer_reference(screen, r300render->vbo, NULL); + pipe_buffer_reference(screen, &r300render->vbo, NULL); } static boolean r300_swtcl_render_set_primitive(struct vbuf_render* render, -- cgit v1.2.3 From 65b79383fb0ad7e14d097f6fdd7227605df4c7cb Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 23 Feb 2009 04:48:42 -0800 Subject: r300-gallium: Cleanup some state emit, move vertex format state to r300_emit. No need to explicitly update derived state, as it will be done automatically. --- src/gallium/drivers/r300/r300_context.c | 1 - src/gallium/drivers/r300/r300_emit.c | 31 ++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_swtcl_emit.c | 22 --------------------- 3 files changed, 31 insertions(+), 23 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 37dc9e86d6..15a8751549 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -35,7 +35,6 @@ static boolean r300_draw_range_elements(struct pipe_context* pipe, int i; if (r300->dirty_state) { - r300_update_derived_state(r300); r300_emit_dirty_state(r300); } diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index d57ccffcb0..960f45f651 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -219,6 +219,32 @@ void r300_emit_scissor_state(struct r300_context* r300, END_CS; } +void r300_emit_vertex_format_state(struct r300_context* r300) +{ + CS_LOCALS(r300); + int i; + + BEGIN_CS(6); + OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2); + OUT_CS(r300->vertex_info.vinfo.hwfmt[0]); + OUT_CS(r300->vertex_info.vinfo.hwfmt[1]); + OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); + OUT_CS(r300->vertex_info.vinfo.hwfmt[2]); + OUT_CS(r300->vertex_info.vinfo.hwfmt[3]); + END_CS; + + BEGIN_CS(18); + OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8); + for (i = 0; i < 8; i++) { + OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]); + } + OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8); + for (i = 0; i < 8; i++) { + OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]); + } + END_CS; +} + /* Emit all dirty state. */ void r300_emit_dirty_state(struct r300_context* r300) { @@ -269,4 +295,9 @@ void r300_emit_dirty_state(struct r300_context* r300) r300_emit_scissor_state(r300, r300->scissor_state); r300->dirty_state &= ~R300_NEW_SCISSOR; } + + if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) { + r300_emit_vertex_format_state(r300); + r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT; + } } diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index 1ae69e7d13..141fa57590 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -182,30 +182,8 @@ static void prepare_render(struct r300_swtcl_render* render) CS_LOCALS(r300); /* Make sure that all possible state is emitted. */ - r300_update_derived_state(r300); r300_emit_dirty_state(r300); - /* Take care of vertex formats and routes. */ - BEGIN_CS(6); - OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2); - OUT_CS(r300->vertex_info.vinfo.hwfmt[0]); - OUT_CS(r300->vertex_info.vinfo.hwfmt[1]); - OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); - OUT_CS(r300->vertex_info.vinfo.hwfmt[2]); - OUT_CS(r300->vertex_info.vinfo.hwfmt[3]); - END_CS; - - BEGIN_CS(18); - OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8); - for (i = 0; i < 8; i++) { - OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]); - } - OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8); - for (i = 0; i < 8; i++) { - OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]); - } - END_CS; - /* Set the pointer to our vertex buffer. The emitted values are this: * PACKET3 [3D_LOAD_VBPNTR] * COUNT [1] -- cgit v1.2.3 From d265706cd3849679e543797b4ad4edf463cd4586 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 23 Feb 2009 05:04:17 -0800 Subject: r300-gallium: Fix pasto and debug messages. This could explain at least one kind of lockup. Yay? --- src/gallium/drivers/r300/r300_swtcl_emit.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index 141fa57590..5b028aaf7b 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -184,6 +184,9 @@ static void prepare_render(struct r300_swtcl_render* render) /* Make sure that all possible state is emitted. */ r300_emit_dirty_state(r300); + debug_printf("r300: Preparing vertex buffer %p for render, " + "vertex size %d, vertex count %d\n", render->vbo, + r300->vertex_info.vinfo.size, render->vbo_size); /* Set the pointer to our vertex buffer. The emitted values are this: * PACKET3 [3D_LOAD_VBPNTR] * COUNT [1] @@ -210,9 +213,11 @@ static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, prepare_render(r300render); + debug_printf("r300: Doing vbuf render, count %d\n", count); + BEGIN_CS(2); OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_VBUF_2, 0)); - OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | + OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); END_CS; } @@ -243,6 +248,8 @@ static void r300_swtcl_render_draw(struct vbuf_render* render, memcpy(index_map, indices, count * 4); pipe_buffer_unmap(screen, index_buffer); + debug_printf("r300: Doing indexbuf render, count %d\n", count); + BEGIN_CS(5); OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0)); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | -- cgit v1.2.3 From 65021162a494cfffd6b0d50d3e93fb1082e90332 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 26 Feb 2009 21:25:06 -0800 Subject: r300-gallium: A handful of tiny vfmt fixups. Using a tab of inputs should work, but I keep getting bad results. If only Rawhide's GDB wasn't broken... --- src/gallium/drivers/r300/r300_state_derived.c | 29 +++++++++++++++++---------- src/gallium/drivers/r300/r300_swtcl_emit.c | 8 ++++++-- 2 files changed, 24 insertions(+), 13 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index a51904096f..4284a955ab 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -57,34 +57,39 @@ static uint32_t translate_vertex_data_type(int type) { /* XXX this function should be able to handle vert shaders as well as draw */ static void r300_update_vertex_layout(struct r300_context* r300) { + struct r300_vertex_format vformat; struct vertex_info vinfo; boolean pos = false, psize = false, fog = false; int i, texs = 0, cols = 0; + int tab[16]; struct tgsi_shader_info* info = &r300->fs->info; + memset(&vinfo, 0, sizeof(vinfo)); + for (i = 0; i < 16; i++) { + tab[i] = -1; + } assert(info->num_inputs <= 16); - /* This is rather lame. Since draw_find_vs_output doesn't return an error - * when it can't find an output, we have to pre-iterate and count each - * output ourselves. */ for (i = 0; i < info->num_inputs; i++) { switch (info->input_semantic_name[i]) { case TGSI_SEMANTIC_POSITION: pos = true; + tab[i] = 0; break; case TGSI_SEMANTIC_COLOR: - cols++; + tab[i] = 2 + cols++; break; case TGSI_SEMANTIC_FOG: fog = true; break; case TGSI_SEMANTIC_PSIZE: psize = true; + tab[i] = 1; break; case TGSI_SEMANTIC_GENERIC: - texs++; + tab[i] = 6 + texs++; break; default: debug_printf("r300: Unknown vertex input %d\n", @@ -105,6 +110,7 @@ static void r300_update_vertex_layout(struct r300_context* r300) if (!pos) { debug_printf("r300: Forcing vertex position attribute emit...\n"); + tab[0] = 0; } draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_POS, @@ -152,18 +158,19 @@ static void r300_update_vertex_layout(struct r300_context* r300) (0xf << R300_WRITE_ENA_SHIFT)) for (i = 0; i < vinfo.num_attribs; i++) { + /* Make sure we have a proper destination for our attribute */ + //assert(tab[i] != -1); + temp = translate_vertex_data_type(vinfo.attrib[i].emit) | - R300_SIGNED; + (tab[i] << R300_DST_VEC_LOC_SHIFT) | R300_SIGNED; if (i & 1) { r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff0000; r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= - (translate_vertex_data_type(vinfo.attrib[i].emit) | - R300_SIGNED) << 16; + temp << 16; } else { r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff; r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= - translate_vertex_data_type(vinfo.attrib[i].emit) | - R300_SIGNED; + temp; } r300->vertex_info.vap_prog_stream_cntl_ext[i >> 1] |= @@ -180,7 +187,7 @@ static void r300_update_vertex_layout(struct r300_context* r300) /* Set up the RS block. This is the part of the chipset that actually does * the rasterization of vertices into fragments. This is also the part of the * chipset that locks up if any part of it is even slightly wrong. */ -void r300_update_rs_block(struct r300_context* r300) +static void r300_update_rs_block(struct r300_context* r300) { } diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index 5b028aaf7b..cdd44240ad 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -27,6 +27,7 @@ #include "r300_cs.h" #include "r300_context.h" #include "r300_reg.h" +#include "r300_state_derived.h" /* r300_swtcl_emit: Vertex and index buffer primitive emission. No HW TCL. */ @@ -191,12 +192,15 @@ static void prepare_render(struct r300_swtcl_render* render) * PACKET3 [3D_LOAD_VBPNTR] * COUNT [1] * FORMAT [size | stride << 8] + * OFFSET [0] * VBPNTR [relocated BO] */ BEGIN_CS(5); OUT_CS(CP_PACKET3(R300_PACKET3_3D_LOAD_VBPNTR, 3)); OUT_CS(1); - OUT_CS(r300->vertex_info.vinfo.size | (r300->vertex_info.vinfo.size << 8)); + OUT_CS(r300->vertex_info.vinfo.size | + (r300->vertex_info.vinfo.size << 8)); + OUT_CS(render->vbo_offset); OUT_CS_RELOC(render->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); END_CS; } @@ -218,7 +222,7 @@ static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, BEGIN_CS(2); OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_VBUF_2, 0)); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | - r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); + r300render->hwprim); END_CS; } -- cgit v1.2.3 From 4ef8c047ea4cdbf9bc31920d58205620b857fe3c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 27 Feb 2009 08:23:01 -0800 Subject: r300-gallium: Add RS600 chipsets. --- src/gallium/drivers/r300/r300_chipset.c | 7 +++++++ src/gallium/drivers/r300/r300_chipset.h | 1 + src/gallium/drivers/r300/r300_screen.c | 1 + 3 files changed, 9 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 196537a432..9577fd706f 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -204,6 +204,13 @@ void r300_parse_chipset(struct r300_capabilities* caps) caps->has_tcl = FALSE; break; + case 0x793F: + case 0x7941: + case 0x7942: + caps->family = CHIP_FAMILY_RS600; + caps->has_tcl = FALSE; + break; + case 0x796C: case 0x796D: case 0x796E: diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index a9cd372ec5..21eebeae60 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -64,6 +64,7 @@ enum { CHIP_FAMILY_RC410, CHIP_FAMILY_RS480, CHIP_FAMILY_RS482, + CHIP_FAMILY_RS600, CHIP_FAMILY_RS690, CHIP_FAMILY_RS740, CHIP_FAMILY_RV515, diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 5ff9015a7b..470e1e2acb 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -50,6 +50,7 @@ static const char* chip_families[] = { "RC410", "RS480", "RS482", + "RS600", "RS690", "RS740", "RV515", -- cgit v1.2.3 From c28298855bf5d5ef790d28bac2e77700625fa69a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 27 Feb 2009 10:15:42 -0800 Subject: r300-gallium: Add RS block setup. This is still icky, and only compile-tested. --- src/gallium/drivers/r300/r300_context.h | 22 ++++++++---- src/gallium/drivers/r300/r300_emit.c | 33 ++++++++++++++++++ src/gallium/drivers/r300/r300_reg.h | 2 ++ src/gallium/drivers/r300/r300_state_derived.c | 48 +++++++++++++++++++++++++-- 4 files changed, 97 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index aaab1dd2bc..5247901be5 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -75,6 +75,13 @@ struct r300_rs_state { uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */ }; +struct r300_rs_block { + uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */ + uint32_t count; /* R300_RS_COUNT */ + uint32_t inst_count; /* R300_RS_INST_COUNT */ + uint32_t inst[8]; /* R300_RS_INST_[0-7] */ +}; + struct r300_sampler_state { uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */ uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */ @@ -96,12 +103,13 @@ struct r300_texture_state { #define R300_NEW_FRAMEBUFFERS 0x0000010 #define R300_NEW_FRAGMENT_SHADER 0x0000020 #define R300_NEW_RASTERIZER 0x0000040 -#define R300_NEW_SAMPLER 0x0000080 -#define R300_NEW_SCISSOR 0x0008000 -#define R300_NEW_TEXTURE 0x0010000 -#define R300_NEW_VERTEX_FORMAT 0x1000000 -#define R300_NEW_VERTEX_SHADER 0x2000000 -#define R300_NEW_KITCHEN_SINK 0x3ffffff +#define R300_NEW_RS_BLOCK 0x0000080 +#define R300_NEW_SAMPLER 0x0000100 +#define R300_NEW_SCISSOR 0x0010000 +#define R300_NEW_TEXTURE 0x0020000 +#define R300_NEW_VERTEX_FORMAT 0x2000000 +#define R300_NEW_VERTEX_SHADER 0x4000000 +#define R300_NEW_KITCHEN_SINK 0x7ffffff /* The next several objects are not pure Radeon state; they inherit from * various Gallium classes. */ @@ -224,6 +232,8 @@ struct r300_context { struct pipe_framebuffer_state framebuffer_state; /* Rasterizer state. */ struct r300_rs_state* rs_state; + /* RS block state. */ + struct r300_rs_block* rs_block; /* Sampler states. */ struct r300_sampler_state* sampler_states[8]; int sampler_count; diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 960f45f651..86fa46df42 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -208,6 +208,39 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) END_CS; } +void r300_emit_rs_block_state(struct r300_context* r300, + struct r300_rs_block* rs) +{ + struct r300_screen* r300screen = + (struct r300_screen*)r300->context.screen; + CS_LOCALS(r300); + int i; + + BEGIN_CS(0); + if (r300screen->caps->is_r500) { + OUT_CS_REG_SEQ(R500_RS_IP_0, 8); + } else { + OUT_CS_REG_SEQ(R300_RS_IP_0, 8); + } + for (i = 0; i < 8; i++) { + OUT_CS(rs->ip[i]); + } + + OUT_CS_REG_SEQ(R300_RS_COUNT, 2); + OUT_CS(rs->count); + OUT_CS(rs->inst_count); + + if (r300screen->caps->is_r500) { + OUT_CS_REG_SEQ(R500_RS_INST_0, 8); + } else { + OUT_CS_REG_SEQ(R300_RS_INST_0, 8); + } + for (i = 0; i < 8; i++) { + OUT_CS(rs->inst[i]); + } + END_CS; +} + void r300_emit_scissor_state(struct r300_context* r300, struct r300_scissor_state* scissor) { diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 8888b39a2f..8f31bd5d6e 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1240,9 +1240,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R300_RS_INST_7 0x434C # define R300_RS_INST_TEX_ID(x) ((x) << 0) # define R300_RS_INST_TEX_CN_WRITE (1 << 3) +# define R300_RS_INST_TEX_ADDR(x) ((x) << 6) # define R300_RS_INST_TEX_ADDR_SHIFT 6 # define R300_RS_INST_COL_ID(x) ((x) << 11) # define R300_RS_INST_COL_CN_WRITE (1 << 14) +# define R300_RS_INST_COL_ADDR(x) ((x) << 17) # define R300_RS_INST_COL_ADDR_SHIFT 17 # define R300_RS_INST_TEX_ADJ (1 << 22) # define R300_RS_COL_BIAS_UNUSED_SHIFT 23 diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 4284a955ab..c4f56627c3 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -139,7 +139,7 @@ static void r300_update_vertex_layout(struct r300_context* r300) } for (i = 0; i < texs; i++) { - draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i)); vinfo.hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); vinfo.hwfmt[3] |= (4 << (3 * i)); @@ -159,7 +159,9 @@ static void r300_update_vertex_layout(struct r300_context* r300) for (i = 0; i < vinfo.num_attribs; i++) { /* Make sure we have a proper destination for our attribute */ - //assert(tab[i] != -1); + if (tab[i] != -1) { + assert(0); + } temp = translate_vertex_data_type(vinfo.attrib[i].emit) | (tab[i] << R300_DST_VEC_LOC_SHIFT) | R300_SIGNED; @@ -189,6 +191,48 @@ static void r300_update_vertex_layout(struct r300_context* r300) * chipset that locks up if any part of it is even slightly wrong. */ static void r300_update_rs_block(struct r300_context* r300) { + struct r300_rs_block* rs = r300->rs_block; + struct vertex_info* vinfo = &r300->vertex_info.vinfo; + int col_count = 0, fp_offset = 0, i, tex_count = 0; + + memset(rs, 0, sizeof(struct r300_rs_block)); + + for (i = 0; i < vinfo->num_attribs; i++) { + switch (vinfo->attrib[i].interp_mode) { + case INTERP_LINEAR: + rs->ip[col_count] |= + R300_RS_COL_PTR(vinfo->attrib[i].src_index) | + R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA); + col_count++; + break; + case INTERP_PERSPECTIVE: + rs->ip[tex_count] |= + R300_RS_TEX_PTR(vinfo->attrib[i].src_index) | + R300_RS_SEL_S(R300_RS_SEL_C0) | + R300_RS_SEL_T(R300_RS_SEL_C1) | + R300_RS_SEL_R(R300_RS_SEL_C2) | + R300_RS_SEL_Q(R300_RS_SEL_C3); + tex_count += 4; + break; + } + } + + for (i = 0; i < tex_count; i++) { + rs->inst[i] |= R300_RS_INST_TEX_ID(i) | R300_RS_INST_TEX_CN_WRITE | + R300_RS_INST_TEX_ADDR(fp_offset); + fp_offset++; + } + + for (i = 0; i < col_count; i++) { + rs->inst[i] |= R300_RS_INST_COL_ID(i) | R300_RS_INST_COL_CN_WRITE | + R300_RS_INST_COL_ADDR(fp_offset); + fp_offset++; + } + + rs->count = (tex_count * 4) | (col_count << R300_IC_COUNT_SHIFT) | + R300_HIRES_EN; + + rs->inst_count = MAX2(col_count, tex_count); } void r300_update_derived_state(struct r300_context* r300) -- cgit v1.2.3 From fd5411fe362a398ab0506c2becdd5953711476d5 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 27 Feb 2009 10:46:14 -0800 Subject: r300-gallium: Turn true and false into TRUE and FALSE. Match the rest of Gallium. --- src/gallium/drivers/r300/r300_context.c | 2 +- src/gallium/drivers/r300/r300_state.c | 2 +- src/gallium/drivers/r300/r300_state_derived.c | 8 ++++---- src/gallium/drivers/r300/r300_swtcl_emit.c | 8 ++++---- 4 files changed, 10 insertions(+), 10 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 15a8751549..81ac6ffc0d 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -73,7 +73,7 @@ static boolean r300_draw_range_elements(struct pipe_context* pipe, start + count - 1, NULL); } - return true; + return TRUE; } static boolean r300_draw_elements(struct pipe_context* pipe, diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index da99a3be6b..59a7565393 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -457,7 +457,7 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) } } - fs->translated = true; + fs->translated = TRUE; r300->fs = fs; r300->dirty_state |= R300_NEW_FRAGMENT_SHADER; diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index c4f56627c3..dcf0990934 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -59,7 +59,7 @@ static void r300_update_vertex_layout(struct r300_context* r300) { struct r300_vertex_format vformat; struct vertex_info vinfo; - boolean pos = false, psize = false, fog = false; + boolean pos = FALSE, psize = FALSE, fog = FALSE; int i, texs = 0, cols = 0; int tab[16]; @@ -75,17 +75,17 @@ static void r300_update_vertex_layout(struct r300_context* r300) for (i = 0; i < info->num_inputs; i++) { switch (info->input_semantic_name[i]) { case TGSI_SEMANTIC_POSITION: - pos = true; + pos = TRUE; tab[i] = 0; break; case TGSI_SEMANTIC_COLOR: tab[i] = 2 + cols++; break; case TGSI_SEMANTIC_FOG: - fog = true; + fog = TRUE; break; case TGSI_SEMANTIC_PSIZE: - psize = true; + psize = TRUE; tab[i] = 1; break; case TGSI_SEMANTIC_GENERIC: diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index cdd44240ad..f9baaade1e 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -92,9 +92,9 @@ static boolean r300_swtcl_render_allocate_vertices(struct vbuf_render* render, r300render->vertex_size = vertex_size; if (r300render->vbo) { - return true; + return TRUE; } else { - return false; + return FALSE; } } @@ -168,11 +168,11 @@ static boolean r300_swtcl_render_set_primitive(struct vbuf_render* render, r300render->hwprim = R300_VAP_VF_CNTL__PRIM_POLYGON; break; default: - return false; + return FALSE; break; } - return true; + return TRUE; } static void prepare_render(struct r300_swtcl_render* render) -- cgit v1.2.3 From 49de8ec2eac7da8520c73d1a0f132b26e2fd1b9f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 27 Feb 2009 12:23:16 -0800 Subject: r300-gallium: Properly split up RS into r300 and r500 variants. --- src/gallium/drivers/r300/r300_emit.c | 3 +- src/gallium/drivers/r300/r300_reg.h | 4 ++ src/gallium/drivers/r300/r300_state_derived.c | 90 +++++++++++++++++++-------- 3 files changed, 69 insertions(+), 28 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 86fa46df42..2f9ec2c3be 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -216,7 +216,7 @@ void r300_emit_rs_block_state(struct r300_context* r300, CS_LOCALS(r300); int i; - BEGIN_CS(0); + BEGIN_CS(21); if (r300screen->caps->is_r500) { OUT_CS_REG_SEQ(R500_RS_IP_0, 8); } else { @@ -238,6 +238,7 @@ void r300_emit_rs_block_state(struct r300_context* r300, for (i = 0; i < 8; i++) { OUT_CS(rs->inst[i]); } + END_CS; } diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 8f31bd5d6e..b3b8f49499 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -732,6 +732,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R500_RS_IP_TEX_PTR_Q_SHIFT 18 #define R500_RS_IP_COL_PTR_SHIFT 24 #define R500_RS_IP_COL_FMT_SHIFT 27 +# define R500_RS_SEL_S(x) ((x) << 0) +# define R500_RS_SEL_T(x) ((x) << 6) +# define R500_RS_SEL_R(x) ((x) << 12) +# define R500_RS_SEL_Q(x) ((x) << 18) # define R500_RS_COL_PTR(x) ((x) << 24) # define R500_RS_COL_FMT(x) ((x) << 27) /* gap */ diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index dcf0990934..d17050e0d7 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -197,36 +197,72 @@ static void r300_update_rs_block(struct r300_context* r300) memset(rs, 0, sizeof(struct r300_rs_block)); - for (i = 0; i < vinfo->num_attribs; i++) { - switch (vinfo->attrib[i].interp_mode) { - case INTERP_LINEAR: - rs->ip[col_count] |= - R300_RS_COL_PTR(vinfo->attrib[i].src_index) | - R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA); - col_count++; - break; - case INTERP_PERSPECTIVE: - rs->ip[tex_count] |= - R300_RS_TEX_PTR(vinfo->attrib[i].src_index) | - R300_RS_SEL_S(R300_RS_SEL_C0) | - R300_RS_SEL_T(R300_RS_SEL_C1) | - R300_RS_SEL_R(R300_RS_SEL_C2) | - R300_RS_SEL_Q(R300_RS_SEL_C3); - tex_count += 4; - break; + if (r300_screen(r300->context.screen)->caps->is_r500) { + for (i = 0; i < vinfo->num_attribs; i++) { + switch (vinfo->attrib[i].interp_mode) { + case INTERP_LINEAR: + rs->ip[col_count] |= + R500_RS_COL_PTR(vinfo->attrib[i].src_index) | + R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA); + col_count++; + break; + case INTERP_PERSPECTIVE: + rs->ip[tex_count] |= + R500_RS_TEX_PTR(vinfo->attrib[i].src_index) | + R500_RS_SEL_S(tex_count) | + R500_RS_SEL_T(tex_count + 1) | + R500_RS_SEL_R(tex_count + 2) | + R500_RS_SEL_Q(tex_count + 3); + tex_count++; + break; + } } - } - for (i = 0; i < tex_count; i++) { - rs->inst[i] |= R300_RS_INST_TEX_ID(i) | R300_RS_INST_TEX_CN_WRITE | - R300_RS_INST_TEX_ADDR(fp_offset); - fp_offset++; - } + for (i = 0; i < tex_count; i++) { + rs->inst[i] |= R500_RS_INST_TEX_ID(i) | R500_RS_INST_TEX_CN_WRITE | + R500_RS_INST_TEX_ADDR(fp_offset); + fp_offset++; + } + + for (i = 0; i < col_count; i++) { + rs->inst[i] |= R500_RS_INST_COL_ID(i) | R500_RS_INST_COL_CN_WRITE | + R500_RS_INST_COL_ADDR(fp_offset); + fp_offset++; + } + + rs->inst_count = MAX2(col_count, tex_count); + } else { + for (i = 0; i < vinfo->num_attribs; i++) { + switch (vinfo->attrib[i].interp_mode) { + case INTERP_LINEAR: + rs->ip[col_count] |= + R300_RS_COL_PTR(vinfo->attrib[i].src_index) | + R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA); + col_count++; + break; + case INTERP_PERSPECTIVE: + rs->ip[tex_count] |= + R300_RS_TEX_PTR(vinfo->attrib[i].src_index) | + R300_RS_SEL_S(R300_RS_SEL_C0) | + R300_RS_SEL_T(R300_RS_SEL_C1) | + R300_RS_SEL_R(R300_RS_SEL_C2) | + R300_RS_SEL_Q(R300_RS_SEL_C3); + tex_count += 4; + break; + } + } - for (i = 0; i < col_count; i++) { - rs->inst[i] |= R300_RS_INST_COL_ID(i) | R300_RS_INST_COL_CN_WRITE | - R300_RS_INST_COL_ADDR(fp_offset); - fp_offset++; + for (i = 0; i < tex_count; i++) { + rs->inst[i] |= R300_RS_INST_TEX_ID(i) | R300_RS_INST_TEX_CN_WRITE | + R300_RS_INST_TEX_ADDR(fp_offset); + fp_offset++; + } + + for (i = 0; i < col_count; i++) { + rs->inst[i] |= R300_RS_INST_COL_ID(i) | R300_RS_INST_COL_CN_WRITE | + R300_RS_INST_COL_ADDR(fp_offset); + fp_offset++; + } } rs->count = (tex_count * 4) | (col_count << R300_IC_COUNT_SHIFT) | -- cgit v1.2.3 From b210c3fb3f1367525ab690ddb7cf9f0dcc1e7c99 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 27 Feb 2009 23:40:18 -0800 Subject: r300-gallium: Fix RS. I should just stop using "git stash" altogether. --- src/gallium/drivers/r300/r300_reg.h | 4 ++++ src/gallium/drivers/r300/r300_state_derived.c | 9 ++++----- 2 files changed, 8 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index b3b8f49499..e0da9d361e 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1220,14 +1220,18 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R500_RS_INST_14 0x4358 #define R500_RS_INST_15 0x435c #define R500_RS_INST_TEX_ID_SHIFT 0 +# define R500_RS_INST_TEX_ID(x) ((x) << 0) #define R500_RS_INST_TEX_CN_WRITE (1 << 4) #define R500_RS_INST_TEX_ADDR_SHIFT 5 +# define R500_RS_INST_TEX_ADDR(x) ((x) << 0) #define R500_RS_INST_COL_ID_SHIFT 12 +# define R500_RS_INST_COL_ID(x) ((x) << 12) #define R500_RS_INST_COL_CN_NO_WRITE (0 << 16) #define R500_RS_INST_COL_CN_WRITE (1 << 16) #define R500_RS_INST_COL_CN_WRITE_FBUFFER (2 << 16) #define R500_RS_INST_COL_CN_WRITE_BACKFACE (3 << 16) #define R500_RS_INST_COL_ADDR_SHIFT 18 +# define R500_RS_INST_COL_ADDR(x) ((x) << 18) #define R500_RS_INST_TEX_ADJ (1 << 25) #define R500_RS_INST_W_CN (1 << 26) diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index d17050e0d7..5bf4f24b7a 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -208,11 +208,10 @@ static void r300_update_rs_block(struct r300_context* r300) break; case INTERP_PERSPECTIVE: rs->ip[tex_count] |= - R500_RS_TEX_PTR(vinfo->attrib[i].src_index) | - R500_RS_SEL_S(tex_count) | - R500_RS_SEL_T(tex_count + 1) | - R500_RS_SEL_R(tex_count + 2) | - R500_RS_SEL_Q(tex_count + 3); + R500_RS_SEL_S(vinfo->attrib[i].src_index) | + R500_RS_SEL_T(vinfo->attrib[i].src_index + 1) | + R500_RS_SEL_R(vinfo->attrib[i].src_index + 2) | + R500_RS_SEL_Q(vinfo->attrib[i].src_index + 3); tex_count++; break; } -- cgit v1.2.3 From 2b5770e652f0e6620b52971755bd7eb31c16ad7d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 28 Feb 2009 00:01:41 -0800 Subject: r300-gallium: Fix C99 error. --- src/gallium/drivers/r300/r300_texture.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index edd4370663..8251a597ea 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -31,8 +31,9 @@ static void r300_setup_miptree(struct r300_texture* tex) { struct pipe_texture* base = &tex->tex; int stride, size, offset; + int i; - for (int i = 0; i <= base->last_level; i++) { + for (i = 0; i <= base->last_level; i++) { if (i > 0) { base->width[i] = minify(base->width[i-1]); base->height[i] = minify(base->height[i-1]); -- cgit v1.2.3 From 3e131d7d74bfc2c34a772a627b8cf8743d074f27 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 28 Feb 2009 08:13:31 -0800 Subject: r300-gallium: A handful of fixups. --- src/gallium/drivers/r300/r300_context.c | 2 ++ src/gallium/drivers/r300/r300_state_derived.c | 29 ++++++++++++++++++++------- 2 files changed, 24 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 81ac6ffc0d..a981150143 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -97,6 +97,7 @@ static void r300_destroy_context(struct pipe_context* context) { draw_destroy(r300->draw); FREE(r300->blend_color_state); + FREE(r300->rs_block); FREE(r300->scissor_state); FREE(r300); } @@ -126,6 +127,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, draw_set_rasterize_stage(r300->draw, r300_draw_swtcl_stage(r300)); r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); + r300->rs_block = CALLOC_STRUCT(r300_rs_block); r300->scissor_state = CALLOC_STRUCT(r300_scissor_state); r300_init_flush_functions(r300); diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 5bf4f24b7a..548a840f25 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -83,6 +83,7 @@ static void r300_update_vertex_layout(struct r300_context* r300) break; case TGSI_SEMANTIC_FOG: fog = TRUE; + tab[i] = 6 + texs++; break; case TGSI_SEMANTIC_PSIZE: psize = TRUE; @@ -110,6 +111,11 @@ static void r300_update_vertex_layout(struct r300_context* r300) if (!pos) { debug_printf("r300: Forcing vertex position attribute emit...\n"); + /* Make room for the position attribute + * at the beginning of the tab. */ + for (i = 1; i < 16; i++) { + tab[i] = tab[i-1]; + } tab[0] = 0; } @@ -131,16 +137,17 @@ static void r300_update_vertex_layout(struct r300_context* r300) vinfo.hwfmt[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i); } - if (fog) { + for (i = 0; i < texs; i++) { draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, - draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0)); - vinfo.hwfmt[2] |= - (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << cols); + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i)); + vinfo.hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); + vinfo.hwfmt[3] |= (4 << (3 * i)); } - for (i = 0; i < texs; i++) { + if (fog) { + i++; draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, - draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i)); + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0)); vinfo.hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); vinfo.hwfmt[3] |= (4 << (3 * i)); } @@ -159,7 +166,15 @@ static void r300_update_vertex_layout(struct r300_context* r300) for (i = 0; i < vinfo.num_attribs; i++) { /* Make sure we have a proper destination for our attribute */ - if (tab[i] != -1) { + if (tab[i] == -1) { + debug_printf("attrib count: %d, fp input count: %d\n", + vinfo.num_attribs, info->num_inputs); + for (i = 0; i < vinfo.num_attribs; i++) { + debug_printf("attrib: offset %d, interp %d, size %d," + " tab %d\n", vinfo.attrib[i].src_index, + vinfo.attrib[i].interp_mode, vinfo.attrib[i].emit, + tab[i]); + } assert(0); } -- cgit v1.2.3 From 3673fc35d68edf55d0b1dc0fb4c3628f228eb9d6 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 28 Feb 2009 08:58:05 -0800 Subject: r300-gallium: Move all state translators to r300_state_inlines. Tryin' to do some cleanup. --- src/gallium/drivers/r300/r300_state.c | 282 +++-------------------- src/gallium/drivers/r300/r300_state_inlines.h | 310 ++++++++++++++++++++++---- 2 files changed, 304 insertions(+), 288 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 59a7565393..f5635591b6 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -28,6 +28,7 @@ #include "r300_context.h" #include "r300_reg.h" +#include "r300_state_inlines.h" #include "r300_state_shader.h" /* r300_state: Functions used to intialize state context by translating @@ -47,71 +48,6 @@ static uint32_t pack_float_32(float f) return u.u; } -static uint32_t translate_blend_function(int blend_func) { - switch (blend_func) { - case PIPE_BLEND_ADD: - return R300_COMB_FCN_ADD_CLAMP; - case PIPE_BLEND_SUBTRACT: - return R300_COMB_FCN_SUB_CLAMP; - case PIPE_BLEND_REVERSE_SUBTRACT: - return R300_COMB_FCN_RSUB_CLAMP; - case PIPE_BLEND_MIN: - return R300_COMB_FCN_MIN; - case PIPE_BLEND_MAX: - return R300_COMB_FCN_MAX; - default: - debug_printf("r300: Unknown blend function %d\n", blend_func); - break; - } - return 0; -} - -/* XXX we can also offer the D3D versions of some of these... */ -static uint32_t translate_blend_factor(int blend_fact) { - switch (blend_fact) { - case PIPE_BLENDFACTOR_ONE: - return R300_BLEND_GL_ONE; - case PIPE_BLENDFACTOR_SRC_COLOR: - return R300_BLEND_GL_SRC_COLOR; - case PIPE_BLENDFACTOR_SRC_ALPHA: - return R300_BLEND_GL_SRC_ALPHA; - case PIPE_BLENDFACTOR_DST_ALPHA: - return R300_BLEND_GL_DST_ALPHA; - case PIPE_BLENDFACTOR_DST_COLOR: - return R300_BLEND_GL_DST_COLOR; - case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE: - return R300_BLEND_GL_SRC_ALPHA_SATURATE; - case PIPE_BLENDFACTOR_CONST_COLOR: - return R300_BLEND_GL_CONST_COLOR; - case PIPE_BLENDFACTOR_CONST_ALPHA: - return R300_BLEND_GL_CONST_ALPHA; - /* XXX WTF are these? - case PIPE_BLENDFACTOR_SRC1_COLOR: - case PIPE_BLENDFACTOR_SRC1_ALPHA: */ - case PIPE_BLENDFACTOR_ZERO: - return R300_BLEND_GL_ZERO; - case PIPE_BLENDFACTOR_INV_SRC_COLOR: - return R300_BLEND_GL_ONE_MINUS_SRC_COLOR; - case PIPE_BLENDFACTOR_INV_SRC_ALPHA: - return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA; - case PIPE_BLENDFACTOR_INV_DST_ALPHA: - return R300_BLEND_GL_ONE_MINUS_DST_ALPHA; - case PIPE_BLENDFACTOR_INV_DST_COLOR: - return R300_BLEND_GL_ONE_MINUS_DST_COLOR; - case PIPE_BLENDFACTOR_INV_CONST_COLOR: - return R300_BLEND_GL_ONE_MINUS_CONST_COLOR; - case PIPE_BLENDFACTOR_INV_CONST_ALPHA: - return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA; - /* XXX see above - case PIPE_BLENDFACTOR_INV_SRC1_COLOR: - case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: */ - default: - debug_printf("r300: Unknown blend factor %d\n", blend_fact); - break; - } - return 0; -} - /* Create a new blend state based on the CSO blend state. * * This encompasses alpha blending, logic/raster ops, and blend dithering. */ @@ -126,16 +62,16 @@ static void* r300_create_blend_state(struct pipe_context* pipe, blend->blend_control = R300_ALPHA_BLEND_ENABLE | R300_SEPARATE_ALPHA_ENABLE | R300_READ_ENABLE | - translate_blend_function(state->rgb_func) | - (translate_blend_factor(state->rgb_src_factor) << + r300_translate_blend_function(state->rgb_func) | + (r300_translate_blend_factor(state->rgb_src_factor) << R300_SRC_BLEND_SHIFT) | - (translate_blend_factor(state->rgb_dst_factor) << + (r300_translate_blend_factor(state->rgb_dst_factor) << R300_DST_BLEND_SHIFT); blend->alpha_blend_control = - translate_blend_function(state->alpha_func) | - (translate_blend_factor(state->alpha_src_factor) << + r300_translate_blend_function(state->alpha_func) | + (r300_translate_blend_factor(state->alpha_src_factor) << R300_SRC_BLEND_SHIFT) | - (translate_blend_factor(state->alpha_dst_factor) << + (r300_translate_blend_factor(state->alpha_dst_factor) << R300_DST_BLEND_SHIFT); } @@ -233,82 +169,6 @@ static void r300->dirty_state |= R300_NEW_CONSTANTS; } -static uint32_t translate_depth_stencil_function(int zs_func) { - switch (zs_func) { - case PIPE_FUNC_NEVER: - return R300_ZS_NEVER; - case PIPE_FUNC_LESS: - return R300_ZS_LESS; - case PIPE_FUNC_EQUAL: - return R300_ZS_EQUAL; - case PIPE_FUNC_LEQUAL: - return R300_ZS_LEQUAL; - case PIPE_FUNC_GREATER: - return R300_ZS_GREATER; - case PIPE_FUNC_NOTEQUAL: - return R300_ZS_NOTEQUAL; - case PIPE_FUNC_GEQUAL: - return R300_ZS_GEQUAL; - case PIPE_FUNC_ALWAYS: - return R300_ZS_ALWAYS; - default: - debug_printf("r300: Unknown depth/stencil function %d\n", - zs_func); - break; - } - return 0; -} - -static uint32_t translate_stencil_op(int s_op) { - switch (s_op) { - case PIPE_STENCIL_OP_KEEP: - return R300_ZS_KEEP; - case PIPE_STENCIL_OP_ZERO: - return R300_ZS_ZERO; - case PIPE_STENCIL_OP_REPLACE: - return R300_ZS_REPLACE; - case PIPE_STENCIL_OP_INCR: - return R300_ZS_INCR; - case PIPE_STENCIL_OP_DECR: - return R300_ZS_DECR; - case PIPE_STENCIL_OP_INCR_WRAP: - return R300_ZS_INCR_WRAP; - case PIPE_STENCIL_OP_DECR_WRAP: - return R300_ZS_DECR_WRAP; - case PIPE_STENCIL_OP_INVERT: - return R300_ZS_INVERT; - default: - debug_printf("r300: Unknown stencil op %d", s_op); - break; - } - return 0; -} - -static uint32_t translate_alpha_function(int alpha_func) { - switch (alpha_func) { - case PIPE_FUNC_NEVER: - return R300_FG_ALPHA_FUNC_NEVER; - case PIPE_FUNC_LESS: - return R300_FG_ALPHA_FUNC_LESS; - case PIPE_FUNC_EQUAL: - return R300_FG_ALPHA_FUNC_EQUAL; - case PIPE_FUNC_LEQUAL: - return R300_FG_ALPHA_FUNC_LE; - case PIPE_FUNC_GREATER: - return R300_FG_ALPHA_FUNC_GREATER; - case PIPE_FUNC_NOTEQUAL: - return R300_FG_ALPHA_FUNC_NOTEQUAL; - case PIPE_FUNC_GEQUAL: - return R300_FG_ALPHA_FUNC_GE; - case PIPE_FUNC_ALWAYS: - return R300_FG_ALPHA_FUNC_ALWAYS; - default: - debug_printf("r300: Unknown alpha function %d", alpha_func); - break; - } - return 0; -} - /* Create a new depth, stencil, and alpha state based on the CSO dsa state. * * This contains the depth buffer, stencil buffer, alpha test, and such. @@ -329,7 +189,7 @@ static void* } dsa->z_stencil_control |= - (translate_depth_stencil_function(state->depth.func) << + (r300_translate_depth_stencil_function(state->depth.func) << R300_Z_FUNC_SHIFT); } @@ -337,14 +197,14 @@ static void* if (state->stencil[0].enabled) { dsa->z_buffer_control |= R300_STENCIL_ENABLE; dsa->z_stencil_control |= - (translate_depth_stencil_function(state->stencil[0].func) << - R300_S_FRONT_FUNC_SHIFT) | - (translate_stencil_op(state->stencil[0].fail_op) << - R300_S_FRONT_SFAIL_OP_SHIFT) | - (translate_stencil_op(state->stencil[0].zpass_op) << - R300_S_FRONT_ZPASS_OP_SHIFT) | - (translate_stencil_op(state->stencil[0].zfail_op) << - R300_S_FRONT_ZFAIL_OP_SHIFT); + (r300_translate_depth_stencil_function(state->stencil[0].func) << + R300_S_FRONT_FUNC_SHIFT) | + (r300_translate_stencil_op(state->stencil[0].fail_op) << + R300_S_FRONT_SFAIL_OP_SHIFT) | + (r300_translate_stencil_op(state->stencil[0].zpass_op) << + R300_S_FRONT_ZPASS_OP_SHIFT) | + (r300_translate_stencil_op(state->stencil[0].zfail_op) << + R300_S_FRONT_ZFAIL_OP_SHIFT); dsa->stencil_ref_mask = (state->stencil[0].ref_value) | (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | @@ -353,14 +213,14 @@ static void* if (state->stencil[1].enabled) { dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; dsa->z_stencil_control |= - (translate_depth_stencil_function(state->stencil[1].func) << - R300_S_BACK_FUNC_SHIFT) | - (translate_stencil_op(state->stencil[1].fail_op) << - R300_S_BACK_SFAIL_OP_SHIFT) | - (translate_stencil_op(state->stencil[1].zpass_op) << - R300_S_BACK_ZPASS_OP_SHIFT) | - (translate_stencil_op(state->stencil[1].zfail_op) << - R300_S_BACK_ZFAIL_OP_SHIFT); + (r300_translate_depth_stencil_function(state->stencil[1].func) << + R300_S_BACK_FUNC_SHIFT) | + (r300_translate_stencil_op(state->stencil[1].fail_op) << + R300_S_BACK_SFAIL_OP_SHIFT) | + (r300_translate_stencil_op(state->stencil[1].zpass_op) << + R300_S_BACK_ZPASS_OP_SHIFT) | + (r300_translate_stencil_op(state->stencil[1].zfail_op) << + R300_S_BACK_ZFAIL_OP_SHIFT); dsa->stencil_ref_bf = (state->stencil[1].ref_value) | (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | @@ -370,7 +230,8 @@ static void* /* Alpha test setup. */ if (state->alpha.enabled) { - dsa->alpha_function = translate_alpha_function(state->alpha.func) | + dsa->alpha_function = + r300_translate_alpha_function(state->alpha.func) | R300_FG_ALPHA_FUNC_ENABLE; dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f, 0, 1023); @@ -567,83 +428,6 @@ static void r300_delete_rs_state(struct pipe_context* pipe, void* state) FREE(state); } -static uint32_t translate_wrap(int wrap) { - switch (wrap) { - case PIPE_TEX_WRAP_REPEAT: - return R300_TX_REPEAT; - case PIPE_TEX_WRAP_CLAMP: - return R300_TX_CLAMP; - case PIPE_TEX_WRAP_CLAMP_TO_EDGE: - return R300_TX_CLAMP_TO_EDGE; - case PIPE_TEX_WRAP_CLAMP_TO_BORDER: - return R300_TX_CLAMP_TO_BORDER; - case PIPE_TEX_WRAP_MIRROR_REPEAT: - return R300_TX_REPEAT | R300_TX_MIRRORED; - case PIPE_TEX_WRAP_MIRROR_CLAMP: - return R300_TX_CLAMP | R300_TX_MIRRORED; - case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: - return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED; - case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: - return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED; - default: - debug_printf("r300: Unknown texture wrap %d", wrap); - return 0; - } -} - -static uint32_t translate_tex_filters(int min, int mag, int mip) { - uint32_t retval = 0; - switch (min) { - case PIPE_TEX_FILTER_NEAREST: - retval |= R300_TX_MIN_FILTER_NEAREST; - case PIPE_TEX_FILTER_LINEAR: - retval |= R300_TX_MIN_FILTER_LINEAR; - case PIPE_TEX_FILTER_ANISO: - retval |= R300_TX_MIN_FILTER_ANISO; - default: - debug_printf("r300: Unknown texture filter %d", min); - break; - } - switch (mag) { - case PIPE_TEX_FILTER_NEAREST: - retval |= R300_TX_MAG_FILTER_NEAREST; - case PIPE_TEX_FILTER_LINEAR: - retval |= R300_TX_MAG_FILTER_LINEAR; - case PIPE_TEX_FILTER_ANISO: - retval |= R300_TX_MAG_FILTER_ANISO; - default: - debug_printf("r300: Unknown texture filter %d", mag); - break; - } - switch (mip) { - case PIPE_TEX_MIPFILTER_NONE: - retval |= R300_TX_MIN_FILTER_MIP_NONE; - case PIPE_TEX_MIPFILTER_NEAREST: - retval |= R300_TX_MIN_FILTER_MIP_NEAREST; - case PIPE_TEX_MIPFILTER_LINEAR: - retval |= R300_TX_MIN_FILTER_MIP_LINEAR; - default: - debug_printf("r300: Unknown texture filter %d", mip); - break; - } - - return retval; -} - -static uint32_t anisotropy(float max_aniso) { - if (max_aniso >= 16.0f) { - return R300_TX_MAX_ANISO_16_TO_1; - } else if (max_aniso >= 8.0f) { - return R300_TX_MAX_ANISO_8_TO_1; - } else if (max_aniso >= 4.0f) { - return R300_TX_MAX_ANISO_4_TO_1; - } else if (max_aniso >= 2.0f) { - return R300_TX_MAX_ANISO_2_TO_1; - } else { - return R300_TX_MAX_ANISO_1_TO_1; - } -} - static void* r300_create_sampler_state(struct pipe_context* pipe, const struct pipe_sampler_state* state) @@ -653,19 +437,19 @@ static void* int lod_bias; sampler->filter0 |= - (translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | - (translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | - (translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); + (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | + (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | + (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); - sampler->filter0 |= translate_tex_filters(state->min_img_filter, - state->mag_img_filter, - state->min_mip_filter); + sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, + state->mag_img_filter, + state->min_mip_filter); lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; - sampler->filter1 |= anisotropy(state->max_anisotropy); + sampler->filter1 |= r300_anisotropy(state->max_anisotropy); util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM, &sampler->border_color); diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index 005fb74ed6..e686e1fec6 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -1,5 +1,6 @@ /* * Copyright 2009 Joakim Sindholt + * Corbin Simpson * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -27,56 +28,287 @@ #include "r300_reg.h" +/* Blend state. */ + +static INLINE uint32_t r300_translate_blend_function(int blend_func) +{ + switch (blend_func) { + case PIPE_BLEND_ADD: + return R300_COMB_FCN_ADD_CLAMP; + case PIPE_BLEND_SUBTRACT: + return R300_COMB_FCN_SUB_CLAMP; + case PIPE_BLEND_REVERSE_SUBTRACT: + return R300_COMB_FCN_RSUB_CLAMP; + case PIPE_BLEND_MIN: + return R300_COMB_FCN_MIN; + case PIPE_BLEND_MAX: + return R300_COMB_FCN_MAX; + default: + debug_printf("r300: Unknown blend function %d\n", blend_func); + break; + } + return 0; +} + +/* XXX we can also offer the D3D versions of some of these... */ +static INLINE uint32_t r300_translate_blend_factor(int blend_fact) +{ + switch (blend_fact) { + case PIPE_BLENDFACTOR_ONE: + return R300_BLEND_GL_ONE; + case PIPE_BLENDFACTOR_SRC_COLOR: + return R300_BLEND_GL_SRC_COLOR; + case PIPE_BLENDFACTOR_SRC_ALPHA: + return R300_BLEND_GL_SRC_ALPHA; + case PIPE_BLENDFACTOR_DST_ALPHA: + return R300_BLEND_GL_DST_ALPHA; + case PIPE_BLENDFACTOR_DST_COLOR: + return R300_BLEND_GL_DST_COLOR; + case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE: + return R300_BLEND_GL_SRC_ALPHA_SATURATE; + case PIPE_BLENDFACTOR_CONST_COLOR: + return R300_BLEND_GL_CONST_COLOR; + case PIPE_BLENDFACTOR_CONST_ALPHA: + return R300_BLEND_GL_CONST_ALPHA; + /* XXX WTF are these? + case PIPE_BLENDFACTOR_SRC1_COLOR: + case PIPE_BLENDFACTOR_SRC1_ALPHA: */ + case PIPE_BLENDFACTOR_ZERO: + return R300_BLEND_GL_ZERO; + case PIPE_BLENDFACTOR_INV_SRC_COLOR: + return R300_BLEND_GL_ONE_MINUS_SRC_COLOR; + case PIPE_BLENDFACTOR_INV_SRC_ALPHA: + return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA; + case PIPE_BLENDFACTOR_INV_DST_ALPHA: + return R300_BLEND_GL_ONE_MINUS_DST_ALPHA; + case PIPE_BLENDFACTOR_INV_DST_COLOR: + return R300_BLEND_GL_ONE_MINUS_DST_COLOR; + case PIPE_BLENDFACTOR_INV_CONST_COLOR: + return R300_BLEND_GL_ONE_MINUS_CONST_COLOR; + case PIPE_BLENDFACTOR_INV_CONST_ALPHA: + return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA; + /* XXX see above + case PIPE_BLENDFACTOR_INV_SRC1_COLOR: + case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: */ + default: + debug_printf("r300: Unknown blend factor %d\n", blend_fact); + break; + } + return 0; +} + +/* DSA state. */ + +static INLINE uint32_t r300_translate_depth_stencil_function(int zs_func) +{ + switch (zs_func) { + case PIPE_FUNC_NEVER: + return R300_ZS_NEVER; + case PIPE_FUNC_LESS: + return R300_ZS_LESS; + case PIPE_FUNC_EQUAL: + return R300_ZS_EQUAL; + case PIPE_FUNC_LEQUAL: + return R300_ZS_LEQUAL; + case PIPE_FUNC_GREATER: + return R300_ZS_GREATER; + case PIPE_FUNC_NOTEQUAL: + return R300_ZS_NOTEQUAL; + case PIPE_FUNC_GEQUAL: + return R300_ZS_GEQUAL; + case PIPE_FUNC_ALWAYS: + return R300_ZS_ALWAYS; + default: + debug_printf("r300: Unknown depth/stencil function %d\n", + zs_func); + break; + } + return 0; +} + +static INLINE uint32_t r300_translate_stencil_op(int s_op) +{ + switch (s_op) { + case PIPE_STENCIL_OP_KEEP: + return R300_ZS_KEEP; + case PIPE_STENCIL_OP_ZERO: + return R300_ZS_ZERO; + case PIPE_STENCIL_OP_REPLACE: + return R300_ZS_REPLACE; + case PIPE_STENCIL_OP_INCR: + return R300_ZS_INCR; + case PIPE_STENCIL_OP_DECR: + return R300_ZS_DECR; + case PIPE_STENCIL_OP_INCR_WRAP: + return R300_ZS_INCR_WRAP; + case PIPE_STENCIL_OP_DECR_WRAP: + return R300_ZS_DECR_WRAP; + case PIPE_STENCIL_OP_INVERT: + return R300_ZS_INVERT; + default: + debug_printf("r300: Unknown stencil op %d", s_op); + break; + } + return 0; +} + +static INLINE uint32_t r300_translate_alpha_function(int alpha_func) +{ + switch (alpha_func) { + case PIPE_FUNC_NEVER: + return R300_FG_ALPHA_FUNC_NEVER; + case PIPE_FUNC_LESS: + return R300_FG_ALPHA_FUNC_LESS; + case PIPE_FUNC_EQUAL: + return R300_FG_ALPHA_FUNC_EQUAL; + case PIPE_FUNC_LEQUAL: + return R300_FG_ALPHA_FUNC_LE; + case PIPE_FUNC_GREATER: + return R300_FG_ALPHA_FUNC_GREATER; + case PIPE_FUNC_NOTEQUAL: + return R300_FG_ALPHA_FUNC_NOTEQUAL; + case PIPE_FUNC_GEQUAL: + return R300_FG_ALPHA_FUNC_GE; + case PIPE_FUNC_ALWAYS: + return R300_FG_ALPHA_FUNC_ALWAYS; + default: + debug_printf("r300: Unknown alpha function %d", alpha_func); + break; + } + return 0; +} + +/* Texture sampler state. */ + +static INLINE uint32_t r300_translate_wrap(int wrap) +{ + switch (wrap) { + case PIPE_TEX_WRAP_REPEAT: + return R300_TX_REPEAT; + case PIPE_TEX_WRAP_CLAMP: + return R300_TX_CLAMP; + case PIPE_TEX_WRAP_CLAMP_TO_EDGE: + return R300_TX_CLAMP_TO_EDGE; + case PIPE_TEX_WRAP_CLAMP_TO_BORDER: + return R300_TX_CLAMP_TO_BORDER; + case PIPE_TEX_WRAP_MIRROR_REPEAT: + return R300_TX_REPEAT | R300_TX_MIRRORED; + case PIPE_TEX_WRAP_MIRROR_CLAMP: + return R300_TX_CLAMP | R300_TX_MIRRORED; + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: + return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED; + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: + return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED; + default: + debug_printf("r300: Unknown texture wrap %d", wrap); + return 0; + } +} + +static INLINE uint32_t r300_translate_tex_filters(int min, int mag, int mip) +{ + uint32_t retval = 0; + switch (min) { + case PIPE_TEX_FILTER_NEAREST: + retval |= R300_TX_MIN_FILTER_NEAREST; + case PIPE_TEX_FILTER_LINEAR: + retval |= R300_TX_MIN_FILTER_LINEAR; + case PIPE_TEX_FILTER_ANISO: + retval |= R300_TX_MIN_FILTER_ANISO; + default: + debug_printf("r300: Unknown texture filter %d", min); + break; + } + switch (mag) { + case PIPE_TEX_FILTER_NEAREST: + retval |= R300_TX_MAG_FILTER_NEAREST; + case PIPE_TEX_FILTER_LINEAR: + retval |= R300_TX_MAG_FILTER_LINEAR; + case PIPE_TEX_FILTER_ANISO: + retval |= R300_TX_MAG_FILTER_ANISO; + default: + debug_printf("r300: Unknown texture filter %d", mag); + break; + } + switch (mip) { + case PIPE_TEX_MIPFILTER_NONE: + retval |= R300_TX_MIN_FILTER_MIP_NONE; + case PIPE_TEX_MIPFILTER_NEAREST: + retval |= R300_TX_MIN_FILTER_MIP_NEAREST; + case PIPE_TEX_MIPFILTER_LINEAR: + retval |= R300_TX_MIN_FILTER_MIP_LINEAR; + default: + debug_printf("r300: Unknown texture filter %d", mip); + break; + } + + return retval; +} + +static INLINE uint32_t r300_anisotropy(float max_aniso) +{ + if (max_aniso >= 16.0f) { + return R300_TX_MAX_ANISO_16_TO_1; + } else if (max_aniso >= 8.0f) { + return R300_TX_MAX_ANISO_8_TO_1; + } else if (max_aniso >= 4.0f) { + return R300_TX_MAX_ANISO_4_TO_1; + } else if (max_aniso >= 2.0f) { + return R300_TX_MAX_ANISO_2_TO_1; + } else { + return R300_TX_MAX_ANISO_1_TO_1; + } +} + +/* Buffer formats. */ + static INLINE uint32_t r300_translate_colorformat(enum pipe_format format) { switch (format) { - case PIPE_FORMAT_A8R8G8B8_UNORM: - return R300_COLOR_FORMAT_ARGB8888; - case PIPE_FORMAT_I8_UNORM: - return R300_COLOR_FORMAT_I8; - case PIPE_FORMAT_A1R5G5B5_UNORM: - return R300_COLOR_FORMAT_ARGB1555; - case PIPE_FORMAT_R5G6B5_UNORM: - return R300_COLOR_FORMAT_RGB565; - /* XXX Not in pipe_format - case PIPE_FORMAT_A32R32G32B32: - return R300_COLOR_FORMAT_ARGB32323232; - case PIPE_FORMAT_A16R16G16B16: - return R300_COLOR_FORMAT_ARGB16161616; */ - case PIPE_FORMAT_A4R4G4B4_UNORM: - return R300_COLOR_FORMAT_ARGB4444; - /* XXX Not in pipe_format - case PIPE_FORMAT_A10R10G10B10_UNORM: - return R500_COLOR_FORMAT_ARGB10101010; - case PIPE_FORMAT_A2R10G10B10_UNORM: - return R500_COLOR_FORMAT_ARGB2101010; - case PIPE_FORMAT_I10_UNORM: - return R500_COLOR_FORMAT_I10; */ - default: - debug_printf("r300: Implementation error: " \ - "Got unsupported color format %s in %s\n", - pf_name(format), __FUNCTION__); - break; + case PIPE_FORMAT_A8R8G8B8_UNORM: + return R300_COLOR_FORMAT_ARGB8888; + case PIPE_FORMAT_I8_UNORM: + return R300_COLOR_FORMAT_I8; + case PIPE_FORMAT_A1R5G5B5_UNORM: + return R300_COLOR_FORMAT_ARGB1555; + case PIPE_FORMAT_R5G6B5_UNORM: + return R300_COLOR_FORMAT_RGB565; + /* XXX Not in pipe_format + case PIPE_FORMAT_A32R32G32B32: + return R300_COLOR_FORMAT_ARGB32323232; + case PIPE_FORMAT_A16R16G16B16: + return R300_COLOR_FORMAT_ARGB16161616; */ + case PIPE_FORMAT_A4R4G4B4_UNORM: + return R300_COLOR_FORMAT_ARGB4444; + /* XXX Not in pipe_format + case PIPE_FORMAT_A10R10G10B10_UNORM: + return R500_COLOR_FORMAT_ARGB10101010; + case PIPE_FORMAT_A2R10G10B10_UNORM: + return R500_COLOR_FORMAT_ARGB2101010; + case PIPE_FORMAT_I10_UNORM: + return R500_COLOR_FORMAT_I10; */ + default: + debug_printf("r300: Implementation error: " \ + "Got unsupported color format %s in %s\n", + pf_name(format), __FUNCTION__); + break; } - return 0; } static INLINE uint32_t r300_translate_zsformat(enum pipe_format format) { switch (format) { - case PIPE_FORMAT_Z16_UNORM: - return R300_DEPTHFORMAT_16BIT_INT_Z; - /* XXX R300_DEPTHFORMAT_16BIT_13E3 anyone? */ - case PIPE_FORMAT_Z24S8_UNORM: - return R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL; - default: - debug_printf("r300: Implementation error: " \ - "Got unsupported ZS format %s in %s\n", - pf_name(format), __FUNCTION__); - break; + case PIPE_FORMAT_Z16_UNORM: + return R300_DEPTHFORMAT_16BIT_INT_Z; + case PIPE_FORMAT_Z24S8_UNORM: + return R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL; + default: + debug_printf("r300: Implementation error: " \ + "Got unsupported ZS format %s in %s\n", + pf_name(format), __FUNCTION__); + break; } - return 0; } -- cgit v1.2.3 From d1559eac6d7f9ee8757a2adc6271eb951efc546f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 28 Feb 2009 09:12:16 -0800 Subject: r300-gallium: Be more Gallium-ish in some of the math. --- src/gallium/drivers/r300/r300_state.c | 32 +++++++------------------------- 1 file changed, 7 insertions(+), 25 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index f5635591b6..693f3c1c58 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -32,21 +32,7 @@ #include "r300_state_shader.h" /* r300_state: Functions used to intialize state context by translating - * Gallium state objects into semi-native r300 state objects. - * - * XXX break this file up into pieces if it gets too big! */ - -/* Pack a float into a dword. */ -static uint32_t pack_float_32(float f) -{ - union { - float f; - uint32_t u; - } u; - - u.f = f; - return u.u; -} + * Gallium state objects into semi-native r300 state objects. */ /* Create a new blend state based on the CSO blend state. * @@ -114,21 +100,17 @@ static void r300_set_blend_color(struct pipe_context* pipe, const struct pipe_blend_color* color) { struct r300_context* r300 = r300_context(pipe); - uint32_t r, g, b, a; ubyte ur, ug, ub, ua; - r = util_iround(color->color[0] * 1023.0f); - g = util_iround(color->color[1] * 1023.0f); - b = util_iround(color->color[2] * 1023.0f); - a = util_iround(color->color[3] * 1023.0f); - ur = float_to_ubyte(color->color[0]); ug = float_to_ubyte(color->color[1]); ub = float_to_ubyte(color->color[2]); ua = float_to_ubyte(color->color[3]); - r300->blend_color_state->blend_color = (a << 24) | (r << 16) | (g << 8) | b; + util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM, + &r300->blend_color_state->blend_color); + /* XXX this is wrong */ r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16); r300->blend_color_state->blend_color_green_blue = ub | (ug << 16); @@ -391,15 +373,15 @@ static void* r300_create_rs_state(struct pipe_context* pipe, if (rs->polygon_offset_enable) { rs->depth_offset_front = rs->depth_offset_back = - pack_float_32(state->offset_units); + fui(state->offset_units); rs->depth_scale_front = rs->depth_scale_back = - pack_float_32(state->offset_scale); + fui(state->offset_scale); } if (state->line_stipple_enable) { rs->line_stipple_config = R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | - (pack_float_32((float)state->line_stipple_factor) & + (fui((float)state->line_stipple_factor) & R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); /* XXX this might need to be scaled up */ rs->line_stipple_value = state->line_stipple_pattern; -- cgit v1.2.3 From 5f1fdaabd1686c37c45f3ad4cf125fce1df3a4a8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 28 Feb 2009 09:55:09 -0800 Subject: r300-gallium: Cleanup color formats. --- src/gallium/drivers/r300/r300_screen.c | 17 ++++++++--------- src/gallium/drivers/r300/r300_state_inlines.h | 17 +++++++++++------ 2 files changed, 19 insertions(+), 15 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 470e1e2acb..2fcd504812 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -179,8 +179,11 @@ static boolean check_tex_2d_format(enum pipe_format format, boolean is_r500) { switch (format) { /* Colorbuffer */ + case PIPE_FORMAT_A4R4G4B4_UNORM: + case PIPE_FORMAT_R5G6B5_UNORM: + case PIPE_FORMAT_A1R5G5B5_UNORM: case PIPE_FORMAT_A8R8G8B8_UNORM: - /* Texture */ + /* Colorbuffer or texture */ case PIPE_FORMAT_I8_UNORM: /* Z buffer */ case PIPE_FORMAT_Z16_UNORM: @@ -188,29 +191,25 @@ static boolean check_tex_2d_format(enum pipe_format format, boolean is_r500) case PIPE_FORMAT_Z24S8_UNORM: return TRUE; - /* XXX Supported yet unimplemented formats: */ - case PIPE_FORMAT_A1R5G5B5_UNORM: - case PIPE_FORMAT_R5G6B5_UNORM: /* XXX These don't even exist case PIPE_FORMAT_A32R32G32B32: case PIPE_FORMAT_A16R16G16B16: */ /* XXX Insert YUV422 packed VYUY and YVYU here */ - /* XXX What the deuce is UV88? (r3xx accel page 14) */ - case PIPE_FORMAT_A4R4G4B4_UNORM: + /* XXX What the deuce is UV88? (r3xx accel page 14) debug_printf("r300: Warning: Got unimplemented format: %s in %s\n", pf_name(format), __FUNCTION__); - return FALSE; + return FALSE; */ /* XXX Supported yet unimplemented r5xx formats: */ /* XXX Again, what is UV1010 this time? (r5xx accel page 148) */ /* XXX Even more that don't exist case PIPE_FORMAT_A10R10G10B10_UNORM: case PIPE_FORMAT_A2R10G10B10_UNORM: - case PIPE_FORMAT_I10_UNORM: */ + case PIPE_FORMAT_I10_UNORM: debug_printf( "r300: Warning: Got unimplemented r500 format: %s in %s\n", pf_name(format), __FUNCTION__); - return FALSE; + return FALSE; */ default: debug_printf("r300: Warning: Got unsupported format: %s in %s\n", diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index e686e1fec6..361443a692 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -265,21 +265,24 @@ static INLINE uint32_t r300_anisotropy(float max_aniso) static INLINE uint32_t r300_translate_colorformat(enum pipe_format format) { switch (format) { - case PIPE_FORMAT_A8R8G8B8_UNORM: - return R300_COLOR_FORMAT_ARGB8888; + /* 8-bit buffers */ case PIPE_FORMAT_I8_UNORM: return R300_COLOR_FORMAT_I8; - case PIPE_FORMAT_A1R5G5B5_UNORM: - return R300_COLOR_FORMAT_ARGB1555; + /* 16-bit buffers */ case PIPE_FORMAT_R5G6B5_UNORM: return R300_COLOR_FORMAT_RGB565; + case PIPE_FORMAT_A1R5G5B5_UNORM: + return R300_COLOR_FORMAT_ARGB1555; + case PIPE_FORMAT_A4R4G4B4_UNORM: + return R300_COLOR_FORMAT_ARGB4444; + /* 32-bit buffers */ + case PIPE_FORMAT_A8R8G8B8_UNORM: + return R300_COLOR_FORMAT_ARGB8888; /* XXX Not in pipe_format case PIPE_FORMAT_A32R32G32B32: return R300_COLOR_FORMAT_ARGB32323232; case PIPE_FORMAT_A16R16G16B16: return R300_COLOR_FORMAT_ARGB16161616; */ - case PIPE_FORMAT_A4R4G4B4_UNORM: - return R300_COLOR_FORMAT_ARGB4444; /* XXX Not in pipe_format case PIPE_FORMAT_A10R10G10B10_UNORM: return R500_COLOR_FORMAT_ARGB10101010; @@ -299,8 +302,10 @@ static INLINE uint32_t r300_translate_colorformat(enum pipe_format format) static INLINE uint32_t r300_translate_zsformat(enum pipe_format format) { switch (format) { + /* 16-bit depth, no stencil */ case PIPE_FORMAT_Z16_UNORM: return R300_DEPTHFORMAT_16BIT_INT_Z; + /* 24-bit depth, 8-bit stencil */ case PIPE_FORMAT_Z24S8_UNORM: return R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL; default: -- cgit v1.2.3 From 2b7d39da1f5445e1b0beb3b8b1ef9004e684c600 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 28 Feb 2009 11:20:26 -0800 Subject: r300-gallium: Move maths from r300_state to r300_state_inlines. --- src/gallium/drivers/r300/r300_state.c | 4 ---- src/gallium/drivers/r300/r300_state_inlines.h | 6 ++++++ 2 files changed, 6 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 693f3c1c58..6e64ad2dc3 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -318,10 +318,6 @@ static void r300_set_polygon_stipple(struct pipe_context* pipe, /* XXX */ } -static INLINE int pack_float_16_6x(float f) { - return ((int)(f * 6.0) & 0xffff); -} - /* Create a new rasterizer state based on the CSO rasterizer state. * * This is a very large chunk of state, and covers most of the graphics diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index 361443a692..e12540535d 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -28,6 +28,12 @@ #include "r300_reg.h" +/* Some maths. These should probably find their way to u_math, if needed. */ + +static INLINE int pack_float_16_6x(float f) { + return ((int)(f * 6.0) & 0xffff); +} + /* Blend state. */ static INLINE uint32_t r300_translate_blend_function(int blend_func) -- cgit v1.2.3 From 731aa326fff37cdee4867f61c3f7491d0378de7a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 28 Feb 2009 11:21:29 -0800 Subject: r300-gallium: Use rs_state emit for r300_surface, move a few things around. Also a possible fix for non-TCL chipsets and trivial/clear. --- src/gallium/drivers/r300/r300_surface.c | 35 +++++++++++++++------------------ src/gallium/drivers/r300/r300_surface.h | 12 +++++++++++ 2 files changed, 28 insertions(+), 19 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 49e4a96f83..4380bf4b24 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -55,7 +55,12 @@ static void r300_surface_fill(struct pipe_context* pipe, return; }*/ - BEGIN_CS(163 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); + r300_emit_blend_state(r300, &blend_clear_state); + r300_emit_blend_color_state(r300, &blend_color_clear_state); + r300_emit_dsa_state(r300, &dsa_clear_state); + r300_emit_rs_state(r300, &rs_clear_state); + + BEGIN_CS(143 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -69,7 +74,12 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF); OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); /* XXX endian */ - OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); + if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); + } else { + OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP | + R300_VAP_TCL_BYPASS); + } OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); /* XXX magic number not in r300_reg */ OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); @@ -102,9 +112,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 | (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT)); /* XXX this big chunk should be refactored into rs_state */ - OUT_CS_REG(R300_GA_LINE_CNTL, 0x00030006); - OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, 0x3BAAAAAB); - OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, 0x00000000); OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); OUT_CS_REG(R300_GA_ENHANCE, 0x00000002); @@ -117,12 +124,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_GA_FOG_SCALE, 0x3DBF1412); OUT_CS_REG(R300_GA_FOG_OFFSET, 0x00000000); OUT_CS_REG(R300_SU_TEX_WRAP, 0x00000000); - OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_SCALE, 0x00000000); - OUT_CS_REG(R300_SU_POLY_OFFSET_FRONT_OFFSET, 0x00000000); - OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_SCALE, 0x00000000); - OUT_CS_REG(R300_SU_POLY_OFFSET_BACK_OFFSET, 0x00000000); - OUT_CS_REG(R300_SU_POLY_OFFSET_ENABLE, 0x00000000); - OUT_CS_REG(R300_SU_CULL_MODE, 0x00000000); OUT_CS_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF); OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); @@ -190,11 +191,6 @@ static void r300_surface_fill(struct pipe_context* pipe, R300_PS_UCP_MODE_CLIP_AS_TRIFAN); } - /* The size of the point we're about to draw, in sixths of pixels */ - OUT_CS_REG(R300_GA_POINT_SIZE, - ((h * 6) & R300_POINTSIZE_Y_MASK) | - ((w * 6) << R300_POINTSIZE_X_SHIFT)); - /* XXX */ OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); @@ -277,9 +273,10 @@ static void r300_surface_fill(struct pipe_context* pipe, } END_CS; - r300_emit_blend_state(r300, &blend_clear_state); - r300_emit_blend_color_state(r300, &blend_color_clear_state); - r300_emit_dsa_state(r300, &dsa_clear_state); + /* The size of the point we're about to draw, in sixths of pixels */ + OUT_CS_REG(R300_GA_POINT_SIZE, + ((h * 6) & R300_POINTSIZE_Y_MASK) | + ((w * 6) << R300_POINTSIZE_X_SHIFT)); BEGIN_CS(24); /* Flush colorbuffer and blend caches. */ diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 442eac2cf2..807aad39e4 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -57,4 +57,16 @@ const struct r300_dsa_state dsa_clear_state = { .stencil_ref_bf = 0x0, }; +const struct r300_rs_state rs_clear_state = { + .line_control = 0x00030006, + .depth_scale_front = 0x0, + .depth_offset_front = 0x0, + .depth_scale_back = 0x0, + .depth_offset_back = 0x0, + .polygon_offset_enable = 0x0, + .cull_mode = 0x0, + .line_stipple_config = 0x3BAAAAAB, + .line_stipple_value = 0x0, +}; + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From ba5f1848291e9b34e99aa54cc2c257c85c17728c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 28 Feb 2009 13:27:28 -0800 Subject: r300-gallium: Fix hardlocks on trivial/clear. I'm so happy I could cry. --- src/gallium/drivers/r300/r300_state_inlines.h | 21 +++++++++++++++++++++ src/gallium/drivers/r300/r300_surface.c | 3 ++- 2 files changed, 23 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index e12540535d..630ac3b2fc 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -323,4 +323,25 @@ static INLINE uint32_t r300_translate_zsformat(enum pipe_format format) return 0; } +/* Non-CSO state. (For now.) */ + +static INLINE uint32_t r300_translate_gb_pipes(int pipe_count) +{ + switch (pipe_count) { + case 1: + return R300_GB_TILE_PIPE_COUNT_RV300; + break; + case 2: + return R300_GB_TILE_PIPE_COUNT_R300; + break; + case 3: + return R300_GB_TILE_PIPE_COUNT_R420_3P; + break; + case 4: + return R300_GB_TILE_PIPE_COUNT_R420; + break; + } + return 0; +} + #endif /* R300_STATE_INLINES_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 4380bf4b24..48f6dfcf86 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -97,7 +97,8 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); OUT_CS_REG(R300_GB_MSPOS1, 0x66666666); /* XXX why doesn't classic Mesa write the number of pipes, too? */ - OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_ENABLE | + OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_DISABLE | + r300_translate_gb_pipes(caps->num_frag_pipes) | R300_GB_TILE_SIZE_16); OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); -- cgit v1.2.3 From 0328e838c2803cb730bad04155cb92f070560df0 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 28 Feb 2009 14:01:28 -0800 Subject: r300-gallium: Fix register count. --- src/gallium/drivers/r300/r300_surface.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 48f6dfcf86..d7c624e1f3 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -237,7 +237,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); } - BEGIN_CS(8 + (caps->has_tcl ? 20 : 2)); + BEGIN_CS(7 + (caps->has_tcl ? 21 : 2)); OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); OUT_CS(R300_US_OUT_FMT_UNUSED); -- cgit v1.2.3 From 8b8e954f9e67357b87dac487c838a01fa991d0f1 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 28 Feb 2009 14:07:17 -0800 Subject: r300-gallium: Add RADEON_NO_TCL debugging option. Just like R300_NO_TCL, when set, forces HW TCL off. --- src/gallium/drivers/r300/r300_chipset.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 9577fd706f..e01a0546b2 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -30,7 +30,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) { /* Reasonable defaults */ - caps->has_tcl = TRUE; + caps->has_tcl = getenv("RADEON_NO_TCL") ? TRUE : FALSE; caps->is_r500 = FALSE; caps->num_vert_fpus = 4; -- cgit v1.2.3 From af8a41e5c7d92cf17c12ce9336a0c3f3e20bd275 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 1 Mar 2009 18:12:05 -0800 Subject: r300-gallium: Split off invariant state. It's kind of like a CSO todo list. :3 --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_state_invariant.c | 54 +++++++++++++++++++++++++ src/gallium/drivers/r300/r300_state_invariant.h | 33 +++++++++++++++ src/gallium/drivers/r300/r300_surface.c | 17 ++------ 4 files changed, 91 insertions(+), 14 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_state_invariant.c create mode 100644 src/gallium/drivers/r300/r300_state_invariant.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 9b7524b523..a0fd17bd59 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -12,6 +12,7 @@ C_SOURCES = \ r300_screen.c \ r300_state.c \ r300_state_derived.c \ + r300_state_invariant.c \ r300_state_shader.c \ r300_surface.c \ r300_swtcl_emit.c \ diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c new file mode 100644 index 0000000000..7fd7aefeb7 --- /dev/null +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -0,0 +1,54 @@ +/* + * Copyright 2009 Joakim Sindholt + * Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_state_invariant.h" + +/* Calculate and emit invariant state. This is data that the 3D engine + * will probably want at the beginning of every CS, but it's not currently + * handled by any CSO setup, and in addition it doesn't really change much. + * + * Note that eventually this should be empty, but it's useful for development + * and general unduplication of code. */ +void r300_emit_invariant_state(struct r300_context* r300) +{ + struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; + CS_LOCALS(r300); + + BEGIN_CS(14); + /* Amount of time to wait for vertex fetches in PVS */ + OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); + /* Various GB enables */ + OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | + R300_GB_LINE_STUFF_ENABLE | R300_GB_TRIANGLE_STUFF_ENABLE); + /* Subpixel multisampling for AA */ + OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); + OUT_CS_REG(R300_GB_MSPOS1, 0x66666666); + /* GB tile config and pipe setup */ + OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_DISABLE | + r300_translate_gb_pipes(caps->num_frag_pipes)); + /* Source of fog depth */ + OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); + /* AA enable */ + OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); + END_CS; +} diff --git a/src/gallium/drivers/r300/r300_state_invariant.h b/src/gallium/drivers/r300/r300_state_invariant.h new file mode 100644 index 0000000000..8204bf9588 --- /dev/null +++ b/src/gallium/drivers/r300/r300_state_invariant.h @@ -0,0 +1,33 @@ +/* + * Copyright 2008 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_STATE_INVARIANT_H +#define R300_STATE_INVARIANT_H + +#include "r300_context.h" +#include "r300_cs.h" +#include "r300_reg.h" +#include "r300_state_inlines.h" + +void r300_emit_invariant_state(struct r300_context* r300); + +#endif /* R300_STATE_INVARIANT_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index d7c624e1f3..3b6106a8a1 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -55,12 +55,14 @@ static void r300_surface_fill(struct pipe_context* pipe, return; }*/ + r300_emit_invariant_state(r300); + r300_emit_blend_state(r300, &blend_clear_state); r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); r300_emit_rs_state(r300, &rs_clear_state); - BEGIN_CS(143 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); + BEGIN_CS(129 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -89,19 +91,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(1.0); OUT_CS_32F(1.0); OUT_CS_32F(1.0); - /* XXX is this too long? */ - OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xFFFF); - OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | - R300_GB_LINE_STUFF_ENABLE | R300_GB_TRIANGLE_STUFF_ENABLE); - /* XXX more magic numbers */ - OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); - OUT_CS_REG(R300_GB_MSPOS1, 0x66666666); - /* XXX why doesn't classic Mesa write the number of pipes, too? */ - OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_DISABLE | - r300_translate_gb_pipes(caps->num_frag_pipes) | - R300_GB_TILE_SIZE_16); - OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); - OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); /* XXX point tex stuffing */ OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); OUT_CS_32F(0.0); -- cgit v1.2.3 From b70f344e223fc10df8df08a6d82a813505225712 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 1 Mar 2009 18:24:40 -0800 Subject: r300-gallium: Clean up casts and indents. --- src/gallium/drivers/r300/r300_emit.c | 23 ++++++++++++----------- src/gallium/drivers/r300/r300_surface.c | 3 ++- 2 files changed, 14 insertions(+), 12 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 2f9ec2c3be..91fac62cbe 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -40,9 +40,9 @@ void r300_emit_blend_state(struct r300_context* r300, void r300_emit_blend_color_state(struct r300_context* r300, struct r300_blend_color_state* bc) { - struct r300_screen* r300screen = - (struct r300_screen*)r300->context.screen; + struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); + if (r300screen->caps->is_r500) { BEGIN_CS(3); OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2); @@ -59,9 +59,9 @@ void r300_emit_blend_color_state(struct r300_context* r300, void r300_emit_dsa_state(struct r300_context* r300, struct r300_dsa_state* dsa) { - struct r300_screen* r300screen = - (struct r300_screen*)r300->context.screen; + struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); + BEGIN_CS(r300screen->caps->is_r500 ? 8 : 8); OUT_CS_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); /* XXX figure out the r300 counterpart for this */ @@ -84,6 +84,7 @@ void r300_emit_fragment_shader(struct r300_context* r300, { CS_LOCALS(r300); int i; + BEGIN_CS(22); OUT_CS_REG(R300_US_CONFIG, MAX2(fs->indirections - 1, 0)); @@ -114,7 +115,8 @@ void r500_emit_fragment_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { CS_LOCALS(r300); - int i = 0; + int i; + BEGIN_CS(9 + (fs->instruction_count * 6)); OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size); @@ -191,9 +193,9 @@ void r300_emit_fb_state(struct r300_context* r300, void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) { - struct r300_screen* r300screen = - (struct r300_screen*)r300->context.screen; + struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); + BEGIN_CS(13); OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status); OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6); @@ -211,8 +213,7 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) void r300_emit_rs_block_state(struct r300_context* r300, struct r300_rs_block* rs) { - struct r300_screen* r300screen = - (struct r300_screen*)r300->context.screen; + struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); int i; @@ -246,6 +247,7 @@ void r300_emit_scissor_state(struct r300_context* r300, struct r300_scissor_state* scissor) { CS_LOCALS(r300); + BEGIN_CS(3); OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); OUT_CS(scissor->scissor_top_left); @@ -282,8 +284,7 @@ void r300_emit_vertex_format_state(struct r300_context* r300) /* Emit all dirty state. */ void r300_emit_dirty_state(struct r300_context* r300) { - struct r300_screen* r300screen = - (struct r300_screen*)r300->context.screen; + struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); if (!(r300->dirty_state) && !(r300->dirty_hw)) { diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 3b6106a8a1..288d8dea15 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -33,9 +33,10 @@ static void r300_surface_fill(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); - struct r300_capabilities* caps = ((struct r300_screen*)pipe->screen)->caps; + struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; struct r300_texture* tex = (struct r300_texture*)dest->texture; int i; + float r, g, b, a; unsigned pixpitch = tex->stride / tex->tex.block.size; r = (float)((color >> 16) & 0xff) / 255.0f; -- cgit v1.2.3 From 9e67b0a1745e50fe34efedb0a3191b4a27e10724 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 3 Mar 2009 21:14:33 -0800 Subject: r300-gallium, radeon-gallium: Begin migration to DRI2 state tracker, part 1. s/migration/migrane/ , actually. Anyway, this has working glxinfo... --- src/gallium/drivers/r300/r300_context.c | 7 +- src/gallium/drivers/r300/r300_context.h | 1 - src/gallium/drivers/r300/r300_screen.c | 5 +- src/gallium/drivers/r300/r300_screen.h | 3 +- src/gallium/drivers/r300/r300_winsys.h | 11 +-- src/gallium/winsys/drm/radeon/Makefile | 3 +- src/gallium/winsys/drm/radeon/radeon_buffer.c | 90 ++++++++++++---------- src/gallium/winsys/drm/radeon/radeon_buffer.h | 11 ++- src/gallium/winsys/drm/radeon/radeon_drm.c | 80 +++++++++++++++++++ src/gallium/winsys/drm/radeon/radeon_drm.h | 30 ++++++++ src/gallium/winsys/drm/radeon/radeon_r300.c | 8 +- src/gallium/winsys/drm/radeon/radeon_r300.h | 2 +- .../winsys/drm/radeon/radeon_winsys_softpipe.c | 9 +-- .../winsys/drm/radeon/radeon_winsys_softpipe.h | 2 +- 14 files changed, 190 insertions(+), 72 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index a981150143..653d919ef1 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -103,7 +103,6 @@ static void r300_destroy_context(struct pipe_context* context) { } struct pipe_context* r300_create_context(struct pipe_screen* screen, - struct pipe_winsys* winsys, struct r300_winsys* r300_winsys) { struct r300_context* r300 = CALLOC_STRUCT(r300_context); @@ -111,9 +110,11 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, if (!r300) return NULL; + /* XXX this could be refactored now? */ r300->winsys = r300_winsys; - r300->context.winsys = winsys; - r300->context.screen = r300_create_screen(winsys, r300_winsys); + + r300->context.winsys = (struct pipe_winsys*)r300_winsys; + r300->context.screen = r300_screen(screen); r300->context.destroy = r300_destroy_context; diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 5247901be5..2be9e2eb33 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -268,7 +268,6 @@ void r300_init_surface_functions(struct r300_context* r300); * We'll just step out in that case... */ #ifndef R300_WINSYS_H struct pipe_context* r300_create_context(struct pipe_screen* screen, - struct pipe_winsys* winsys, struct r300_winsys* r300_winsys); #endif diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 2fcd504812..e97334463a 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -337,8 +337,7 @@ static void r300_destroy_screen(struct pipe_screen* pscreen) FREE(r300screen); } -struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, - struct r300_winsys* r300_winsys) +struct pipe_screen* r300_create_screen(struct r300_winsys* r300_winsys) { struct r300_screen* r300screen = CALLOC_STRUCT(r300_screen); struct r300_capabilities* caps = CALLOC_STRUCT(r300_capabilities); @@ -352,7 +351,7 @@ struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, r300_parse_chipset(caps); r300screen->caps = caps; - r300screen->screen.winsys = winsys; + r300screen->screen.winsys = (struct pipe_winsys*)r300_winsys; r300screen->screen.destroy = r300_destroy_screen; r300screen->screen.get_name = r300_get_name; r300screen->screen.get_vendor = r300_get_vendor; diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index 6c845144cb..3f52dbc3be 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -61,7 +61,6 @@ r300_transfer(struct pipe_transfer* transfer) } /* Creates a new r300 screen. */ -struct pipe_screen* r300_create_screen(struct pipe_winsys* winsys, - struct r300_winsys* r300_winsys); +struct pipe_screen* r300_create_screen(struct r300_winsys* r300_winsys); #endif /* R300_SCREEN_H */ diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index 5a3a212892..b7341c4f3a 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -33,10 +33,16 @@ extern "C" { #include "pipe/p_defines.h" #include "pipe/p_state.h" +#include "pipe/internal/p_winsys_screen.h" struct radeon_cs; struct r300_winsys { + /* Parent class */ + struct pipe_winsys base; + + /* Opaque Radeon-specific winsys object. */ + void* radeon_winsys; /* PCI ID */ uint32_t pci_id; @@ -47,10 +53,6 @@ struct r300_winsys { /* CS object. This is very much like Intel's batchbuffer. * Fill it full of dwords and relocs and then submit. * Repeat as needed. */ - /* Note: Unlike Mesa's version of this, we don't keep a copy of the CSM - * that was used to create this CS. Is this a good idea? */ - /* Note: The pipe driver doesn't know how to use this. This is purely - * for the winsys. */ struct radeon_cs* cs; /* Check to see if there's room for commands. */ @@ -84,7 +86,6 @@ struct r300_winsys { }; struct pipe_context* r300_create_context(struct pipe_screen* screen, - struct pipe_winsys* winsys, struct r300_winsys* r300_winsys); #ifdef __cplusplus diff --git a/src/gallium/winsys/drm/radeon/Makefile b/src/gallium/winsys/drm/radeon/Makefile index 784686ffb6..8721f2cb5d 100644 --- a/src/gallium/winsys/drm/radeon/Makefile +++ b/src/gallium/winsys/drm/radeon/Makefile @@ -7,15 +7,14 @@ LIBNAME = radeon_dri.so MINIGLX_SOURCES = PIPE_DRIVERS = \ + $(TOP)/src/gallium/state_trackers/dri2/libdri2drm.a \ $(TOP)/src/gallium/drivers/softpipe/libsoftpipe.a \ $(TOP)/src/gallium/drivers/r300/libr300.a DRIVER_SOURCES = \ radeon_buffer.c \ - radeon_context.c \ radeon_drm.c \ radeon_r300.c \ - radeon_screen.c \ radeon_winsys_softpipe.c C_SOURCES = \ diff --git a/src/gallium/winsys/drm/radeon/radeon_buffer.c b/src/gallium/winsys/drm/radeon/radeon_buffer.c index 918d2f98e2..79b8f777ca 100644 --- a/src/gallium/winsys/drm/radeon/radeon_buffer.c +++ b/src/gallium/winsys/drm/radeon/radeon_buffer.c @@ -1,5 +1,6 @@ /* * Copyright © 2008 Jérôme Glisse + * 2009 Corbin Simpson * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -26,10 +27,14 @@ /* * Authors: * Jérôme Glisse + * Corbin Simpson */ #include -#include "dri_util.h" + #include "state_tracker/st_public.h" + +#include "util/u_memory.h" + #include "pipe/p_defines.h" #include "pipe/p_inlines.h" #include "radeon_buffer.h" @@ -38,24 +43,26 @@ #include "radeon_bo.h" #include "radeon_drm.h" + static const char *radeon_get_name(struct pipe_winsys *ws) { - return "RADEON/DRI2"; + return "Radeon/GEM+KMS"; } static struct pipe_buffer *radeon_buffer_create(struct pipe_winsys *ws, - unsigned alignment, - unsigned usage, - unsigned size) + unsigned alignment, + unsigned usage, + unsigned size) { - struct radeon_pipe_winsys *radeon_ws = (struct radeon_pipe_winsys *)ws; + struct radeon_winsys *radeon_ws = (struct radeon_winsys *)ws; struct radeon_pipe_buffer *radeon_buffer; uint32_t domain; - radeon_buffer = calloc(1, sizeof(*radeon_buffer)); + radeon_buffer = CALLOC_STRUCT(radeon_pipe_buffer); if (radeon_buffer == NULL) { return NULL; } + radeon_buffer->base.refcount = 1; radeon_buffer->base.alignment = alignment; radeon_buffer->base.usage = usage; @@ -69,21 +76,21 @@ static struct pipe_buffer *radeon_buffer_create(struct pipe_winsys *ws, if (usage & PIPE_BUFFER_USAGE_VERTEX) { domain |= RADEON_GEM_DOMAIN_GTT; } - if (usage & PIPE_BUFFER_USAGE_INDEX) { domain |= RADEON_GEM_DOMAIN_GTT; } - radeon_buffer->bo = radeon_bo_open(radeon_ws->radeon_screen->bom, 0, - size, alignment, domain, 0); + + radeon_buffer->bo = radeon_bo_open(radeon_ws->bom, 0, size, alignment, + domain, 0); if (radeon_buffer->bo == NULL) { - free(radeon_buffer); + FREE(radeon_buffer); } return &radeon_buffer->base; } static struct pipe_buffer *radeon_buffer_user_create(struct pipe_winsys *ws, - void *ptr, - unsigned bytes) + void *ptr, + unsigned bytes) { struct radeon_pipe_buffer *radeon_buffer; @@ -106,21 +113,20 @@ static void radeon_buffer_del(struct pipe_winsys *ws, struct pipe_buffer *buffer } static void *radeon_buffer_map(struct pipe_winsys *ws, - struct pipe_buffer *buffer, - unsigned flags) + struct pipe_buffer *buffer, + unsigned flags) { struct radeon_pipe_buffer *radeon_buffer = (struct radeon_pipe_buffer*)buffer; int write = 0; if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) { - /* Remove this when radeon_bo_map supports DONTBLOCK - */ + /* XXX Remove this when radeon_bo_map supports DONTBLOCK */ return NULL; } - if (flags & PIPE_BUFFER_USAGE_CPU_WRITE) { write = 1; } + if (radeon_bo_map(radeon_buffer->bo, write)) return NULL; return radeon_buffer->bo->ptr; @@ -134,59 +140,58 @@ static void radeon_buffer_unmap(struct pipe_winsys *ws, struct pipe_buffer *buff } static void radeon_fence_reference(struct pipe_winsys *ws, - struct pipe_fence_handle **ptr, - struct pipe_fence_handle *pfence) + struct pipe_fence_handle **ptr, + struct pipe_fence_handle *pfence) { } static int radeon_fence_signalled(struct pipe_winsys *ws, - struct pipe_fence_handle *pfence, - unsigned flag) + struct pipe_fence_handle *pfence, + unsigned flag) { return 1; } static int radeon_fence_finish(struct pipe_winsys *ws, - struct pipe_fence_handle *pfence, - unsigned flag) + struct pipe_fence_handle *pfence, + unsigned flag) { return 0; } static void radeon_flush_frontbuffer(struct pipe_winsys *pipe_winsys, - struct pipe_surface *pipe_surface, - void *context_private) + struct pipe_surface *pipe_surface, + void *context_private) { /* TODO: call dri2CopyRegion */ } -struct pipe_winsys *radeon_pipe_winsys(struct radeon_screen *radeon_screen) +struct pipe_winsys *radeon_pipe_winsys() { - struct radeon_pipe_winsys *radeon_ws; + struct pipe_winsys *radeon_ws; - radeon_ws = calloc(1, sizeof(struct radeon_pipe_winsys)); + radeon_ws = CALLOC_STRUCT(pipe_winsys); if (radeon_ws == NULL) { return NULL; } - radeon_ws->radeon_screen = radeon_screen; - radeon_ws->winsys.flush_frontbuffer = radeon_flush_frontbuffer; + radeon_ws->flush_frontbuffer = radeon_flush_frontbuffer; - radeon_ws->winsys.buffer_create = radeon_buffer_create; - radeon_ws->winsys.buffer_destroy = radeon_buffer_del; - radeon_ws->winsys.user_buffer_create = radeon_buffer_user_create; - radeon_ws->winsys.buffer_map = radeon_buffer_map; - radeon_ws->winsys.buffer_unmap = radeon_buffer_unmap; + radeon_ws->buffer_create = radeon_buffer_create; + radeon_ws->buffer_destroy = radeon_buffer_del; + radeon_ws->user_buffer_create = radeon_buffer_user_create; + radeon_ws->buffer_map = radeon_buffer_map; + radeon_ws->buffer_unmap = radeon_buffer_unmap; - radeon_ws->winsys.fence_reference = radeon_fence_reference; - radeon_ws->winsys.fence_signalled = radeon_fence_signalled; - radeon_ws->winsys.fence_finish = radeon_fence_finish; + radeon_ws->fence_reference = radeon_fence_reference; + radeon_ws->fence_signalled = radeon_fence_signalled; + radeon_ws->fence_finish = radeon_fence_finish; - radeon_ws->winsys.get_name = radeon_get_name; + radeon_ws->get_name = radeon_get_name; - return &radeon_ws->winsys; + return radeon_ws; } - +#if 0 static struct pipe_buffer *radeon_buffer_from_handle(struct radeon_screen *radeon_screen, uint32_t handle) { @@ -243,3 +248,4 @@ struct pipe_surface *radeon_surface_from_handle(struct radeon_context *radeon_co PIPE_BUFFER_USAGE_GPU_WRITE); return ps; } +#endif \ No newline at end of file diff --git a/src/gallium/winsys/drm/radeon/radeon_buffer.h b/src/gallium/winsys/drm/radeon/radeon_buffer.h index c626c20229..e062308f44 100644 --- a/src/gallium/winsys/drm/radeon/radeon_buffer.h +++ b/src/gallium/winsys/drm/radeon/radeon_buffer.h @@ -40,12 +40,15 @@ struct radeon_pipe_buffer { struct radeon_bo *bo; }; -struct radeon_pipe_winsys { - struct pipe_winsys winsys; - struct radeon_screen *radeon_screen; +struct radeon_winsys { + /* Parent class. */ + struct pipe_winsys base; + + /* Radeon BO manager. This corresponds to void* radeon_winsys in r300_winsys. */ + struct radeon_bo_manager* bom; }; -struct pipe_winsys *radeon_pipe_winsys(struct radeon_screen *radeon_screen); +struct pipe_winsys *radeon_pipe_winsys(); struct pipe_surface *radeon_surface_from_handle(struct radeon_context *radeon_context, uint32_t handle, enum pipe_format format, diff --git a/src/gallium/winsys/drm/radeon/radeon_drm.c b/src/gallium/winsys/drm/radeon/radeon_drm.c index 839b0bf0bd..9cd178f944 100644 --- a/src/gallium/winsys/drm/radeon/radeon_drm.c +++ b/src/gallium/winsys/drm/radeon/radeon_drm.c @@ -27,4 +27,84 @@ * Authors: * Corbin Simpson */ + #include "radeon_drm.h" + +/* Create a pipe_screen. */ +struct pipe_screen* radeon_create_screen(int drmFB, int pciID) +{ + struct radeon_context* radeon = CALLOC_STRUCT(radeon_context); + struct pipe_winsys* winsys = radeon_pipe_winsys(radeon); + + if (getenv("RADEON_SOFTPIPE")) { + return softpipe_create_screen(winsys); + } else { + struct r300_winsys* r300 = radeon_create_r300_winsys(drmFB, winsys); + FREE(winsys); + return r300_create_screen(r300); + } +} + +/* Create a pipe_context. */ +struct pipe_context* radeon_create_context(struct pipe_screen* screen) +{ + if (getenv("RADEON_SOFTPIPE")) { + return radeon_create_softpipe(screen->winsys); + } else { + return r300_create_context(screen, screen->winsys); + } +} + +boolean radeon_buffer_from_texture(struct pipe_texture* texture, + struct pipe_buffer** buffer, + unsigned* stride) +{ +} + +/* Create a buffer from a handle. */ +/* XXX what's up with name? */ +struct pipe_buffer* radeon_buffer_from_handle(struct pipe_screen* screen, + const char* name, + unsigned handle) +{ + struct radeon_bo_manager* bom = ((struct radeon_winsys*)screen->winsys)->bom; + struct radeon_pipe_buffer* radeon_buffer; + struct radeon_bo* bo = NULL; + + bo = radeon_bo_open(bom, handle, 0, 0, 0, 0); + if (bo == NULL) { + return NULL; + } + + radeon_buffer = CALLOC_STRUCT(radeon_pipe_buffer); + if (radeon_buffer == NULL) { + radeon_bo_unref(bo); + return NULL; + } + + radeon_buffer->base.refcount = 1; + radeon_buffer->base.usage = PIPE_BUFFER_USAGE_PIXEL; + radeon_buffer->bo = bo; + return &radeon_buffer->base; +} + +boolean radeon_handle_from_buffer(struct pipe_screen* screen, + struct pipe_buffer* buffer, + unsigned* handle) +{ +} + +boolean radeon_global_handle_from_buffer(struct pipe_screen* screen, + struct pipe_buffer* buffer, + unsigned* handle) +{ +} + +struct drm_api drm_api_hooks = { + .create_screen = radeon_create_screen, + .create_context = radeon_create_context, + .buffer_from_texture = radeon_buffer_from_texture, + .buffer_from_handle = radeon_buffer_from_handle, + .handle_from_buffer = radeon_handle_from_buffer, + .global_handle_from_buffer = radeon_global_handle_from_buffer, +}; \ No newline at end of file diff --git a/src/gallium/winsys/drm/radeon/radeon_drm.h b/src/gallium/winsys/drm/radeon/radeon_drm.h index 8ccbc81895..e434106cb5 100644 --- a/src/gallium/winsys/drm/radeon/radeon_drm.h +++ b/src/gallium/winsys/drm/radeon/radeon_drm.h @@ -30,6 +30,36 @@ #ifndef RADEON_DRM_H #define RADEON_DRM_H +#include "pipe/p_screen.h" + +#include "util/u_memory.h" + #include "state_tracker/drm_api.h" +#include "radeon_buffer.h" +#include "radeon_context.h" +#include "radeon_r300.h" +#include "radeon_screen.h" +#include "radeon_winsys_softpipe.h" + +struct pipe_screen* radeon_create_screen(int drmFB, int pciID); + +struct pipe_context* radeon_create_context(struct pipe_screen* screen); + +boolean radeon_buffer_from_texture(struct pipe_texture* texture, + struct pipe_buffer** buffer, + unsigned* stride); + +struct pipe_buffer* radeon_buffer_from_handle(struct pipe_screen* screen, + const char* name, + unsigned handle); + +boolean radeon_handle_from_buffer(struct pipe_screen* screen, + struct pipe_buffer* buffer, + unsigned* handle); + +boolean radeon_global_handle_from_buffer(struct pipe_screen* screen, + struct pipe_buffer* buffer, + unsigned* handle); + #endif diff --git a/src/gallium/winsys/drm/radeon/radeon_r300.c b/src/gallium/winsys/drm/radeon/radeon_r300.c index 8fe2375e34..e9b96b1ee9 100644 --- a/src/gallium/winsys/drm/radeon/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/radeon_r300.c @@ -75,14 +75,16 @@ static void do_ioctls(struct r300_winsys* winsys, int fd) } -struct r300_winsys* radeon_create_r300_winsys(int fd) +struct r300_winsys* radeon_create_r300_winsys(int fd, struct pipe_winsys* old_winsys) { - struct r300_winsys* winsys = calloc(1, sizeof(struct r300_winsys)); + struct r300_winsys* winsys = CALLOC_STRUCT(r300_winsys); do_ioctls(winsys, fd); + struct radeon_bo_manager* bom = radeon_bo_manager_gem_ctor(fd); struct radeon_cs_manager* csm = radeon_cs_manager_gem_ctor(fd); + winsys->radeon_winsys = bom; winsys->cs = radeon_cs_create(csm, 1024 * 64 / 4); winsys->check_cs = radeon_r300_check_cs; @@ -92,5 +94,7 @@ struct r300_winsys* radeon_create_r300_winsys(int fd) winsys->end_cs = radeon_cs_end; winsys->flush_cs = radeon_r300_flush_cs; + winsys->base = *old_winsys; + return winsys; } diff --git a/src/gallium/winsys/drm/radeon/radeon_r300.h b/src/gallium/winsys/drm/radeon/radeon_r300.h index 8ed95a3a9b..432b7b1833 100644 --- a/src/gallium/winsys/drm/radeon/radeon_r300.h +++ b/src/gallium/winsys/drm/radeon/radeon_r300.h @@ -31,4 +31,4 @@ #include "radeon_buffer.h" -struct r300_winsys* radeon_create_r300_winsys(int fd); +struct r300_winsys* radeon_create_r300_winsys(int fd, struct pipe_winsys* old_winsys); diff --git a/src/gallium/winsys/drm/radeon/radeon_winsys_softpipe.c b/src/gallium/winsys/drm/radeon/radeon_winsys_softpipe.c index 8402e1fa5a..75e975f5e2 100644 --- a/src/gallium/winsys/drm/radeon/radeon_winsys_softpipe.c +++ b/src/gallium/winsys/drm/radeon/radeon_winsys_softpipe.c @@ -29,7 +29,6 @@ * Authors: Keith Whitwell */ #include -#include "imports.h" #include "pipe/p_defines.h" #include "pipe/p_format.h" #include "softpipe/sp_winsys.h" @@ -57,21 +56,19 @@ static boolean radeon_is_format_supported(struct softpipe_winsys *sws, uint form return FALSE; } -struct pipe_context *radeon_create_softpipe(struct radeon_context *radeon_context) +struct pipe_context *radeon_create_softpipe(struct pipe_winsys* winsys) { struct radeon_softpipe_winsys *radeon_sp_ws; struct pipe_screen *pipe_screen; - pipe_screen = softpipe_create_screen(radeon_context->pipe_winsys); + pipe_screen = softpipe_create_screen(winsys); radeon_sp_ws = CALLOC_STRUCT(radeon_softpipe_winsys); if (radeon_sp_ws == NULL) { return NULL; } - radeon_context->pipe_screen = pipe_screen; - radeon_sp_ws->radeon_context = radeon_context; radeon_sp_ws->sp_winsys.is_format_supported = radeon_is_format_supported; return softpipe_create(pipe_screen, - radeon_context->pipe_winsys, + winsys, &radeon_sp_ws->sp_winsys); } diff --git a/src/gallium/winsys/drm/radeon/radeon_winsys_softpipe.h b/src/gallium/winsys/drm/radeon/radeon_winsys_softpipe.h index 519eab769c..093693eddf 100644 --- a/src/gallium/winsys/drm/radeon/radeon_winsys_softpipe.h +++ b/src/gallium/winsys/drm/radeon/radeon_winsys_softpipe.h @@ -32,6 +32,6 @@ #include "radeon_context.h" -struct pipe_context *radeon_create_softpipe(struct radeon_context *radeon_context); +struct pipe_context *radeon_create_softpipe(struct pipe_winsys* winsys); #endif -- cgit v1.2.3 From 60041203d5847de8ab71842a6ce5d33d96cc4930 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 3 Mar 2009 22:11:56 -0800 Subject: r300-gallium, radeon-gallium: Continue migration to DRI2 state_tracker, part 2. Almost there. glxinfo still works, and AFAICT so does trivial/clear. --- src/gallium/drivers/r300/r300_texture.c | 18 ++++++++++++++++++ src/gallium/drivers/r300/r300_texture.h | 8 ++++++++ src/gallium/drivers/r300/r300_winsys.h | 4 ++++ src/gallium/winsys/drm/radeon/radeon_drm.c | 18 +++++++++++++++--- 4 files changed, 45 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 8251a597ea..b3425587e3 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -186,3 +186,21 @@ void r300_init_screen_texture_functions(struct pipe_screen* screen) screen->tex_surface_release = r300_tex_surface_release; screen->texture_blanket = r300_texture_blanket; } + +boolean r300_get_texture_buffer(struct pipe_texture* texture, + struct pipe_buffer** buffer, + unsigned* stride) +{ + struct r300_texture* tex = (struct r300_texture*)texture; + if (!tex) { + return FALSE; + } + + pipe_buffer_reference(texture->screen, buffer, tex->buffer); + + if (stride) { + *stride = tex->stride; + } + + return TRUE; +} diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h index 7964229a94..27f5ea1eb7 100644 --- a/src/gallium/drivers/r300/r300_texture.h +++ b/src/gallium/drivers/r300/r300_texture.h @@ -31,4 +31,12 @@ void r300_init_screen_texture_functions(struct pipe_screen* screen); +#ifndef R300_WINSYS_H + +boolean r300_get_texture_buffer(struct pipe_texture* texture, + struct pipe_buffer** buffer, + unsigned* stride); + +#endif /* R300_WINSYS_H */ + #endif /* R300_TEXTURE_H */ diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index b7341c4f3a..8c9578de51 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -92,4 +92,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, } #endif +boolean r300_get_texture_buffer(struct pipe_texture* texture, + struct pipe_buffer** buffer, + unsigned* stride); + #endif /* R300_WINSYS_H */ diff --git a/src/gallium/winsys/drm/radeon/radeon_drm.c b/src/gallium/winsys/drm/radeon/radeon_drm.c index 9cd178f944..21f2a62e0f 100644 --- a/src/gallium/winsys/drm/radeon/radeon_drm.c +++ b/src/gallium/winsys/drm/radeon/radeon_drm.c @@ -59,6 +59,7 @@ boolean radeon_buffer_from_texture(struct pipe_texture* texture, struct pipe_buffer** buffer, unsigned* stride) { + return FALSE; } /* Create a buffer from a handle. */ @@ -67,7 +68,8 @@ struct pipe_buffer* radeon_buffer_from_handle(struct pipe_screen* screen, const char* name, unsigned handle) { - struct radeon_bo_manager* bom = ((struct radeon_winsys*)screen->winsys)->bom; + struct radeon_bo_manager* bom = + ((struct radeon_winsys*)screen->winsys)->bom; struct radeon_pipe_buffer* radeon_buffer; struct radeon_bo* bo = NULL; @@ -92,19 +94,29 @@ boolean radeon_handle_from_buffer(struct pipe_screen* screen, struct pipe_buffer* buffer, unsigned* handle) { + struct radeon_pipe_buffer* radeon_buffer = + (struct radeon_pipe_buffer*)buffer; + *handle = radeon_buffer->bo->handle; + return TRUE; } boolean radeon_global_handle_from_buffer(struct pipe_screen* screen, struct pipe_buffer* buffer, unsigned* handle) { + /* XXX WTF is the difference here? global? */ + struct radeon_pipe_buffer* radeon_buffer = + (struct radeon_pipe_buffer*)buffer; + *handle = radeon_buffer->bo->handle; + return TRUE; } struct drm_api drm_api_hooks = { .create_screen = radeon_create_screen, .create_context = radeon_create_context, - .buffer_from_texture = radeon_buffer_from_texture, + /* XXX fix this */ + .buffer_from_texture = r300_get_texture_buffer, .buffer_from_handle = radeon_buffer_from_handle, .handle_from_buffer = radeon_handle_from_buffer, .global_handle_from_buffer = radeon_global_handle_from_buffer, -}; \ No newline at end of file +}; -- cgit v1.2.3 From 5e27cd46c04a9e7b5904cc014bffd0f4daae31fe Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Wed, 4 Mar 2009 11:58:48 +0100 Subject: gallium: Unify reference counting. The core reference counting code is centralized in p_refcnt.h. This has some consequences related to struct pipe_buffer: * The screen member of struct pipe_buffer must be initialized, or pipe_buffer_reference() will crash trying to destroy a buffer with reference count 0. u_simple_screen takes care of this, but I may have missed some of the drivers not using it. * Except for rare exceptions deep in winsys code, buffers must always be allocated via pipe_buffer_create() or via screen->*buffer_create() rather than via winsys->*buffer_create(). --- src/gallium/auxiliary/draw/draw_pipe_aaline.c | 4 +- src/gallium/auxiliary/draw/draw_pipe_pstipple.c | 4 +- src/gallium/auxiliary/pipebuffer/pb_buffer.h | 25 ++--- .../auxiliary/pipebuffer/pb_buffer_fenced.c | 16 +-- .../auxiliary/pipebuffer/pb_buffer_malloc.c | 2 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c | 11 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c | 8 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c | 6 +- .../auxiliary/pipebuffer/pb_bufmgr_ondemand.c | 2 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c | 8 +- src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c | 6 +- src/gallium/auxiliary/sct/sct.c | 2 +- src/gallium/auxiliary/util/u_blit.c | 17 +-- src/gallium/auxiliary/util/u_debug.c | 4 +- src/gallium/auxiliary/util/u_draw_quad.c | 2 +- src/gallium/auxiliary/util/u_gen_mipmap.c | 17 +-- src/gallium/auxiliary/util/u_rect.c | 6 +- src/gallium/auxiliary/util/u_simple_screen.c | 28 +++-- src/gallium/auxiliary/util/u_timed_winsys.c | 7 +- src/gallium/drivers/cell/ppu/cell_fence.c | 6 +- src/gallium/drivers/cell/ppu/cell_texture.c | 65 ++++------- src/gallium/drivers/failover/fo_context.c | 2 +- src/gallium/drivers/i915simple/i915_prim_vbuf.c | 2 +- src/gallium/drivers/i915simple/i915_screen.c | 16 +-- src/gallium/drivers/i915simple/i915_texture.c | 72 +++++------- src/gallium/drivers/i965simple/brw_tex_layout.c | 38 +++---- .../drivers/i965simple/brw_wm_surface_state.c | 2 +- src/gallium/drivers/nouveau/nouveau_stateobj.h | 12 +- src/gallium/drivers/nv04/nv04_miptree.c | 33 ++---- src/gallium/drivers/nv04/nv04_transfer.c | 11 +- src/gallium/drivers/nv10/nv10_miptree.c | 43 +++----- src/gallium/drivers/nv10/nv10_prim_vbuf.c | 6 +- src/gallium/drivers/nv10/nv10_transfer.c | 11 +- src/gallium/drivers/nv20/nv20_miptree.c | 46 +++----- src/gallium/drivers/nv20/nv20_prim_vbuf.c | 6 +- src/gallium/drivers/nv20/nv20_transfer.c | 11 +- src/gallium/drivers/nv30/nv30_fragprog.c | 3 +- src/gallium/drivers/nv30/nv30_miptree.c | 33 ++---- src/gallium/drivers/nv30/nv30_transfer.c | 11 +- src/gallium/drivers/nv40/nv40_fragprog.c | 3 +- src/gallium/drivers/nv40/nv40_miptree.c | 33 ++---- src/gallium/drivers/nv40/nv40_transfer.c | 11 +- src/gallium/drivers/nv50/nv50_miptree.c | 41 +++---- src/gallium/drivers/nv50/nv50_program.c | 6 +- src/gallium/drivers/nv50/nv50_query.c | 6 +- src/gallium/drivers/nv50/nv50_screen.c | 6 +- src/gallium/drivers/nv50/nv50_transfer.c | 13 +-- src/gallium/drivers/r300/r300_screen.c | 16 +-- src/gallium/drivers/r300/r300_swtcl_emit.c | 5 +- src/gallium/drivers/r300/r300_texture.c | 48 +++----- src/gallium/drivers/softpipe/sp_context.c | 3 +- src/gallium/drivers/softpipe/sp_state_fs.c | 4 +- src/gallium/drivers/softpipe/sp_texture.c | 76 +++++-------- src/gallium/drivers/softpipe/sp_tile_cache.c | 14 +-- src/gallium/drivers/trace/tr_screen.c | 122 ++++++--------------- src/gallium/drivers/trace/tr_state.c | 12 +- src/gallium/drivers/trace/tr_texture.c | 4 +- src/gallium/drivers/trace/tr_winsys.c | 8 +- .../include/pipe/internal/p_winsys_screen.h | 3 +- src/gallium/include/pipe/p_inlines.h | 113 ------------------- src/gallium/include/pipe/p_refcnt.h | 84 ++++++++++++++ src/gallium/include/pipe/p_screen.h | 16 +-- src/gallium/include/pipe/p_state.h | 47 ++++++-- src/gallium/state_trackers/dri2/dri_drawable.c | 2 +- src/gallium/state_trackers/egl/egl_surface.c | 6 +- src/gallium/state_trackers/g3dvl/vl_basic_csc.c | 6 +- .../state_trackers/g3dvl/vl_r16snorm_mc_buf.c | 8 +- src/gallium/state_trackers/python/st_device.c | 24 ++-- src/gallium/state_trackers/python/st_device.h | 6 +- .../state_trackers/python/st_softpipe_winsys.c | 4 +- src/gallium/state_trackers/xorg/xorg_crtc.c | 4 +- src/gallium/state_trackers/xorg/xorg_dri2.c | 2 +- src/gallium/state_trackers/xorg/xorg_exa.c | 12 +- .../winsys/drm/intel/gem/intel_be_batchbuffer.c | 4 +- src/gallium/winsys/drm/intel/gem/intel_be_device.c | 19 +--- src/gallium/winsys/drm/intel/gem/intel_be_fence.h | 18 ++- .../winsys/drm/nouveau/common/nouveau_context.c | 7 +- .../winsys/drm/nouveau/common/nouveau_context.h | 2 +- .../drm/nouveau/common/nouveau_winsys_pipe.c | 6 +- src/gallium/winsys/drm/radeon/radeon_buffer.c | 10 +- src/gallium/winsys/drm/radeon/radeon_drm.c | 3 +- src/gallium/winsys/egl_xlib/sw_winsys.c | 6 +- src/gallium/winsys/g3dvl/xsp_winsys.c | 4 +- src/gallium/winsys/gdi/gdi_softpipe_winsys.c | 7 +- src/gallium/winsys/xlib/xlib_brw_screen.c | 7 +- src/gallium/winsys/xlib/xlib_cell.c | 4 +- src/gallium/winsys/xlib/xlib_softpipe.c | 7 +- src/mesa/state_tracker/st_atom_constbuf.c | 2 +- src/mesa/state_tracker/st_atom_pixeltransfer.c | 2 +- src/mesa/state_tracker/st_cb_accum.c | 18 +-- src/mesa/state_tracker/st_cb_bitmap.c | 16 +-- src/mesa/state_tracker/st_cb_bufferobjects.c | 5 +- src/mesa/state_tracker/st_cb_clear.c | 8 +- src/mesa/state_tracker/st_cb_drawpixels.c | 12 +- src/mesa/state_tracker/st_cb_fbo.c | 3 +- src/mesa/state_tracker/st_cb_readpixels.c | 8 +- src/mesa/state_tracker/st_cb_texture.c | 16 +-- src/mesa/state_tracker/st_context.c | 2 +- src/mesa/state_tracker/st_draw.c | 10 +- src/mesa/state_tracker/st_draw_feedback.c | 4 +- src/mesa/state_tracker/st_gen_mipmap.c | 4 +- src/mesa/state_tracker/st_texture.c | 10 +- 102 files changed, 653 insertions(+), 943 deletions(-) create mode 100644 src/gallium/include/pipe/p_refcnt.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/auxiliary/draw/draw_pipe_aaline.c b/src/gallium/auxiliary/draw/draw_pipe_aaline.c index 80c9c918a9..e83a075794 100644 --- a/src/gallium/auxiliary/draw/draw_pipe_aaline.c +++ b/src/gallium/auxiliary/draw/draw_pipe_aaline.c @@ -446,7 +446,7 @@ aaline_create_texture(struct aaline_stage *aaline) /* unmap */ screen->transfer_unmap(screen, transfer); - screen->tex_transfer_release(screen, &transfer); + screen->tex_transfer_destroy(transfer); } return TRUE; } @@ -728,7 +728,7 @@ aaline_destroy(struct draw_stage *stage) aaline->pipe->delete_sampler_state(aaline->pipe, aaline->sampler_cso); if (aaline->texture) - pipe_texture_release(&aaline->texture); + pipe_texture_reference(&aaline->texture, NULL); draw_free_temp_verts( stage ); diff --git a/src/gallium/auxiliary/draw/draw_pipe_pstipple.c b/src/gallium/auxiliary/draw/draw_pipe_pstipple.c index e68c824c86..fa7bc67476 100644 --- a/src/gallium/auxiliary/draw/draw_pipe_pstipple.c +++ b/src/gallium/auxiliary/draw/draw_pipe_pstipple.c @@ -406,7 +406,7 @@ pstip_update_texture(struct pstip_stage *pstip) /* unmap */ screen->transfer_unmap(screen, transfer); - screen->tex_transfer_release(screen, &transfer); + screen->tex_transfer_destroy(transfer); } @@ -572,7 +572,7 @@ pstip_destroy(struct draw_stage *stage) pstip->pipe->delete_sampler_state(pstip->pipe, pstip->sampler_cso); - pipe_texture_release(&pstip->texture); + pipe_texture_reference(&pstip->texture, NULL); draw_free_temp_verts( stage ); FREE( stage ); diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer.h b/src/gallium/auxiliary/pipebuffer/pb_buffer.h index e6b0b30ff4..be1654c654 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_buffer.h +++ b/src/gallium/auxiliary/pipebuffer/pb_buffer.h @@ -159,7 +159,7 @@ pb_map(struct pb_buffer *buf, assert(buf); if(!buf) return NULL; - assert(buf->base.refcount > 0); + assert(buf->base.reference.count > 0); return buf->vtbl->map(buf, flags); } @@ -170,7 +170,7 @@ pb_unmap(struct pb_buffer *buf) assert(buf); if(!buf) return; - assert(buf->base.refcount > 0); + assert(buf->base.reference.count > 0); buf->vtbl->unmap(buf); } @@ -186,7 +186,7 @@ pb_get_base_buffer( struct pb_buffer *buf, offset = 0; return; } - assert(buf->base.refcount > 0); + assert(buf->base.reference.count > 0); assert(buf->vtbl->get_base_buffer); buf->vtbl->get_base_buffer(buf, base_buf, offset); assert(*base_buf); @@ -222,29 +222,18 @@ pb_destroy(struct pb_buffer *buf) assert(buf); if(!buf) return; - assert(buf->base.refcount == 0); + assert(buf->base.reference.count == 0); buf->vtbl->destroy(buf); } - -/* XXX: thread safety issues! - */ static INLINE void pb_reference(struct pb_buffer **dst, struct pb_buffer *src) { - if (src) { - assert(src->base.refcount); - src->base.refcount++; - } - - if (*dst) { - assert((*dst)->base.refcount); - if(--(*dst)->base.refcount == 0) - pb_destroy( *dst ); - } + struct pb_buffer *old = *dst; - *dst = src; + if (pipe_reference((struct pipe_reference**)dst, &src->base.reference)) + pb_destroy( old ); } diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c index 17ff61b675..e4adf8aad7 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c +++ b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c @@ -115,7 +115,7 @@ _fenced_buffer_add(struct fenced_buffer *fenced_buf) { struct fenced_buffer_list *fenced_list = fenced_buf->list; - assert(fenced_buf->base.base.refcount); + assert(fenced_buf->base.base.reference.count); assert(fenced_buf->flags & PIPE_BUFFER_USAGE_GPU_READ_WRITE); assert(fenced_buf->fence); @@ -137,7 +137,7 @@ _fenced_buffer_destroy(struct fenced_buffer *fenced_buf) { struct fenced_buffer_list *fenced_list = fenced_buf->list; - assert(!fenced_buf->base.base.refcount); + assert(!fenced_buf->base.base.reference.count); assert(!fenced_buf->fence); #ifdef DEBUG assert(fenced_buf->head.prev); @@ -177,7 +177,7 @@ _fenced_buffer_remove(struct fenced_buffer_list *fenced_list, ++fenced_list->numUnfenced; #endif - if(!fenced_buf->base.base.refcount) + if(!fenced_buf->base.base.reference.count) _fenced_buffer_destroy(fenced_buf); } @@ -253,7 +253,7 @@ fenced_buffer_destroy(struct pb_buffer *buf) struct fenced_buffer_list *fenced_list = fenced_buf->list; pipe_mutex_lock(fenced_list->mutex); - assert(fenced_buf->base.base.refcount == 0); + assert(fenced_buf->base.base.reference.count == 0); if (fenced_buf->fence) { struct pb_fence_ops *ops = fenced_list->ops; if(ops->fence_signalled(ops, fenced_buf->fence, 0) == 0) { @@ -461,7 +461,7 @@ fenced_buffer_create(struct fenced_buffer_list *fenced_list, return NULL; } - buf->base.base.refcount = 1; + pipe_reference_init(&buf->base.base.reference, 1); buf->base.base.alignment = buffer->base.alignment; buf->base.base.usage = buffer->base.usage; buf->base.base.size = buffer->base.size; @@ -527,7 +527,7 @@ fenced_buffer_list_dump(struct fenced_buffer_list *fenced_list) pipe_mutex_lock(fenced_list->mutex); debug_printf("%10s %7s %10s %s\n", - "buffer", "refcount", "fence", "signalled"); + "buffer", "reference.count", "fence", "signalled"); curr = fenced_list->unfenced.next; next = curr->next; @@ -536,7 +536,7 @@ fenced_buffer_list_dump(struct fenced_buffer_list *fenced_list) assert(!fenced_buf->fence); debug_printf("%10p %7u\n", fenced_buf, - fenced_buf->base.base.refcount); + fenced_buf->base.base.reference.count); curr = next; next = curr->next; } @@ -549,7 +549,7 @@ fenced_buffer_list_dump(struct fenced_buffer_list *fenced_list) signaled = ops->fence_signalled(ops, fenced_buf->fence, 0); debug_printf("%10p %7u %10p %s\n", fenced_buf, - fenced_buf->base.base.refcount, + fenced_buf->base.base.reference.count, fenced_buf->fence, signaled == 0 ? "y" : "n"); curr = next; diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer_malloc.c b/src/gallium/auxiliary/pipebuffer/pb_buffer_malloc.c index 282802b171..689fd74771 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_buffer_malloc.c +++ b/src/gallium/auxiliary/pipebuffer/pb_buffer_malloc.c @@ -132,7 +132,7 @@ pb_malloc_buffer_create(size_t size, if(!buf) return NULL; - buf->base.base.refcount = 1; + pipe_reference_init(&buf->base.base.reference, 1); buf->base.base.alignment = desc->alignment; buf->base.base.usage = desc->usage; buf->base.base.size = size; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c index 29117efe9b..06ed0002ca 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c @@ -112,7 +112,7 @@ _pb_cache_buffer_destroy(struct pb_cache_buffer *buf) LIST_DEL(&buf->head); assert(mgr->numDelayed); --mgr->numDelayed; - assert(!buf->base.base.refcount); + assert(!buf->base.base.reference.count); pb_reference(&buf->buffer, NULL); FREE(buf); } @@ -153,7 +153,7 @@ pb_cache_buffer_destroy(struct pb_buffer *_buf) struct pb_cache_manager *mgr = buf->mgr; pipe_mutex_lock(mgr->mutex); - assert(buf->base.base.refcount == 0); + assert(buf->base.base.reference.count == 0); _pb_cache_buffer_list_check_free(mgr); @@ -293,7 +293,8 @@ pb_cache_manager_create_buffer(struct pb_manager *_mgr, if(buf) { LIST_DEL(&buf->head); pipe_mutex_unlock(mgr->mutex); - ++buf->base.base.refcount; + /* Increase refcount */ + pb_reference((struct pb_buffer**)&buf, &buf->base); return &buf->base; } @@ -309,12 +310,12 @@ pb_cache_manager_create_buffer(struct pb_manager *_mgr, return NULL; } - assert(buf->buffer->base.refcount >= 1); + assert(buf->buffer->base.reference.count >= 1); assert(pb_check_alignment(desc->alignment, buf->buffer->base.alignment)); assert(pb_check_usage(desc->usage, buf->buffer->base.usage)); assert(buf->buffer->base.size >= size); - buf->base.base.refcount = 1; + pipe_reference_init(&buf->base.base.reference, 1); buf->base.base.alignment = buf->buffer->base.alignment; buf->base.base.usage = buf->buffer->base.usage; buf->base.base.size = buf->buffer->base.size; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c index 21079b8bfd..37ed64b84f 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c @@ -206,9 +206,9 @@ pb_debug_buffer_check(struct pb_debug_buffer *buf) static void pb_debug_buffer_destroy(struct pb_buffer *_buf) { - struct pb_debug_buffer *buf = pb_debug_buffer(_buf); + struct pb_debug_buffer *buf = pb_debug_buffer(_buf); - assert(!buf->base.base.refcount); + assert(!buf->base.base.reference.count); pb_debug_buffer_check(buf); @@ -315,12 +315,12 @@ pb_debug_manager_create_buffer(struct pb_manager *_mgr, return NULL; } - assert(buf->buffer->base.refcount >= 1); + assert(buf->buffer->base.reference.count >= 1); assert(pb_check_alignment(real_desc.alignment, buf->buffer->base.alignment)); assert(pb_check_usage(real_desc.usage, buf->buffer->base.usage)); assert(buf->buffer->base.size >= real_size); - buf->base.base.refcount = 1; + pipe_reference_init(&buf->base.base.reference, 1); buf->base.base.alignment = desc->alignment; buf->base.base.usage = desc->usage; buf->base.base.size = size; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c index 85ff3a09de..9b0f77bedb 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c @@ -97,11 +97,11 @@ mm_buffer_destroy(struct pb_buffer *buf) struct mm_buffer *mm_buf = mm_buffer(buf); struct mm_pb_manager *mm = mm_buf->mgr; - assert(buf->base.refcount == 0); + assert(mm_buf->base.base.reference.count == 0); pipe_mutex_lock(mm->mutex); u_mmFreeMem(mm_buf->block); - FREE(buf); + FREE(mm_buf); pipe_mutex_unlock(mm->mutex); } @@ -189,7 +189,7 @@ mm_bufmgr_create_buffer(struct pb_manager *mgr, return NULL; } - mm_buf->base.base.refcount = 1; + pipe_reference_init(&mm_buf->base.base.reference, 1); mm_buf->base.base.alignment = desc->alignment; mm_buf->base.base.usage = desc->usage; mm_buf->base.base.size = size; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_ondemand.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_ondemand.c index 3d9c7bba0b..4f7e6b1c4d 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_ondemand.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_ondemand.c @@ -242,7 +242,7 @@ pb_ondemand_manager_create_buffer(struct pb_manager *_mgr, if(!buf) return NULL; - buf->base.base.refcount = 1; + pipe_reference_init(&buf->base.base.reference, 1); buf->base.base.alignment = desc->alignment; buf->base.base.usage = desc->usage; buf->base.base.size = size; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c index 12447acfd9..ca6c14a627 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_pool.c @@ -108,7 +108,7 @@ pool_buffer_destroy(struct pb_buffer *buf) struct pool_buffer *pool_buf = pool_buffer(buf); struct pool_pb_manager *pool = pool_buf->mgr; - assert(pool_buf->base.base.refcount == 0); + assert(pool_buf->base.base.reference.count == 0); pipe_mutex_lock(pool->mutex); LIST_ADD(&pool_buf->head, &pool->free); @@ -216,8 +216,8 @@ pool_bufmgr_create_buffer(struct pb_manager *mgr, pipe_mutex_unlock(pool->mutex); pool_buf = LIST_ENTRY(struct pool_buffer, item, head); - assert(pool_buf->base.base.refcount == 0); - pool_buf->base.base.refcount = 1; + assert(pool_buf->base.base.reference.count == 0); + pipe_reference_init(&pool_buf->base.base.reference, 1); pool_buf->base.base.alignment = desc->alignment; pool_buf->base.base.usage = desc->usage; @@ -295,7 +295,7 @@ pool_bufmgr_create(struct pb_manager *provider, pool_buf = pool->bufs; for (i = 0; i < numBufs; ++i) { - pool_buf->base.base.refcount = 0; + pipe_reference_init(&pool_buf->base.base.reference, 0); pool_buf->base.base.alignment = 0; pool_buf->base.base.usage = 0; pool_buf->base.base.size = bufSize; diff --git a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c index a3259351b9..2cdb5a5e29 100644 --- a/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c +++ b/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c @@ -202,7 +202,7 @@ pb_slab_buffer_destroy(struct pb_buffer *_buf) pipe_mutex_lock(mgr->mutex); - assert(buf->base.base.refcount == 0); + assert(buf->base.base.reference.count == 0); buf->mapCount = 0; @@ -340,7 +340,7 @@ pb_slab_create(struct pb_slab_manager *mgr) buf = slab->buffers; for (i=0; i < numBuffers; ++i) { - buf->base.base.refcount = 0; + pipe_reference_init(&buf->base.base.reference, 0); buf->base.base.size = mgr->bufSize; buf->base.base.alignment = 0; buf->base.base.usage = 0; @@ -419,7 +419,7 @@ pb_slab_manager_create_buffer(struct pb_manager *_mgr, pipe_mutex_unlock(mgr->mutex); buf = LIST_ENTRY(struct pb_slab_buffer, list, head); - ++buf->base.base.refcount; + pipe_reference_init(&buf->base.base.reference, 1); buf->base.base.alignment = desc->alignment; buf->base.base.usage = desc->usage; diff --git a/src/gallium/auxiliary/sct/sct.c b/src/gallium/auxiliary/sct/sct.c index 49bb7ea92e..fcfa04ef7d 100644 --- a/src/gallium/auxiliary/sct/sct.c +++ b/src/gallium/auxiliary/sct/sct.c @@ -372,7 +372,7 @@ sct_flush_textures(struct surface_context_tracker *sct, for (tl = ci->textures_used; tl; tl = next) { next = tl->next; - pipe_texture_release(&tl->texture); + pipe_texture_reference(&tl->texture, NULL); FREE(tl); } ci->textures_used = NULL; diff --git a/src/gallium/auxiliary/util/u_blit.c b/src/gallium/auxiliary/util/u_blit.c index 4cc720269d..813e41f1b1 100644 --- a/src/gallium/auxiliary/util/u_blit.c +++ b/src/gallium/auxiliary/util/u_blit.c @@ -38,6 +38,7 @@ #include "pipe/p_defines.h" #include "pipe/p_inlines.h" #include "pipe/p_shader_tokens.h" +#include "pipe/p_state.h" #include "util/u_blit.h" #include "util/u_draw_quad.h" @@ -166,7 +167,7 @@ util_destroy_blit(struct blit_state *ctx) FREE((void*) ctx->vert_shader.tokens); FREE((void*) ctx->frag_shader.tokens); - pipe_buffer_reference(pipe->screen, &ctx->vbuf, NULL); + pipe_buffer_reference(&ctx->vbuf, NULL); FREE(ctx); } @@ -368,7 +369,7 @@ util_blit_pixels(struct blit_state *ctx, /* free the surface, update the texture if necessary. */ - screen->tex_surface_release(screen, &texSurf); + pipe_surface_reference(&texSurf, NULL); /* save state (restored below) */ cso_save_blend(ctx->cso); @@ -429,7 +430,7 @@ util_blit_pixels(struct blit_state *ctx, cso_restore_vertex_shader(ctx->cso); cso_restore_viewport(ctx->cso); - screen->texture_release(screen, &tex); + pipe_texture_reference(&tex, NULL); } @@ -438,7 +439,7 @@ util_blit_pixels(struct blit_state *ctx, */ void util_blit_flush( struct blit_state *ctx ) { - pipe_buffer_reference(ctx->pipe->screen, &ctx->vbuf, NULL); + pipe_buffer_reference(&ctx->vbuf, NULL); ctx->vbuf_slot = 0; } @@ -461,8 +462,6 @@ util_blit_pixels_tex(struct blit_state *ctx, int dstX1, int dstY1, float z, uint filter) { - struct pipe_context *pipe = ctx->pipe; - struct pipe_screen *screen = pipe->screen; struct pipe_framebuffer_state fb; float s0, t0, s1, t1; unsigned offset; @@ -478,8 +477,10 @@ util_blit_pixels_tex(struct blit_state *ctx, t0 = srcY0 / (float)tex->height[0]; t1 = srcY1 / (float)tex->height[0]; - assert(screen->is_format_supported(screen, dst->format, PIPE_TEXTURE_2D, - PIPE_TEXTURE_USAGE_RENDER_TARGET, 0)); + assert(ctx->pipe->screen->is_format_supported(ctx->pipe->screen, dst->format, + PIPE_TEXTURE_2D, + PIPE_TEXTURE_USAGE_RENDER_TARGET, + 0)); /* save state (restored below) */ cso_save_blend(ctx->cso); diff --git a/src/gallium/auxiliary/util/u_debug.c b/src/gallium/auxiliary/util/u_debug.c index e05c419b2f..f96e27e09f 100644 --- a/src/gallium/auxiliary/util/u_debug.c +++ b/src/gallium/auxiliary/util/u_debug.c @@ -680,7 +680,7 @@ void debug_dump_surface(const char *prefix, screen->transfer_unmap(screen, transfer); error: - screen->tex_transfer_release(screen, &transfer); + screen->tex_transfer_destroy(transfer); } @@ -785,7 +785,7 @@ debug_dump_surface_bmp(const char *filename, } } - screen->tex_transfer_release(screen, &transfer); + screen->tex_transfer_destroy(transfer); util_stream_close(stream); error2: diff --git a/src/gallium/auxiliary/util/u_draw_quad.c b/src/gallium/auxiliary/util/u_draw_quad.c index f0bcd75899..4110485fb1 100644 --- a/src/gallium/auxiliary/util/u_draw_quad.c +++ b/src/gallium/auxiliary/util/u_draw_quad.c @@ -129,6 +129,6 @@ util_draw_texquad(struct pipe_context *pipe, util_draw_vertex_buffer(pipe, vbuf, 0, PIPE_PRIM_TRIANGLE_FAN, 4, 2); } - pipe_buffer_reference(pipe->screen, &vbuf, NULL); + pipe_buffer_reference(&vbuf, NULL); } } diff --git a/src/gallium/auxiliary/util/u_gen_mipmap.c b/src/gallium/auxiliary/util/u_gen_mipmap.c index 1857a71dd8..2b675e71b2 100644 --- a/src/gallium/auxiliary/util/u_gen_mipmap.c +++ b/src/gallium/auxiliary/util/u_gen_mipmap.c @@ -39,6 +39,7 @@ #include "pipe/p_defines.h" #include "pipe/p_inlines.h" #include "pipe/p_shader_tokens.h" +#include "pipe/p_state.h" #include "util/u_memory.h" #include "util/u_draw_quad.h" @@ -1138,8 +1139,8 @@ make_1d_mipmap(struct gen_mipmap_state *ctx, screen->transfer_unmap(screen, srcTrans); screen->transfer_unmap(screen, dstTrans); - screen->tex_transfer_release(screen, &srcTrans); - screen->tex_transfer_release(screen, &dstTrans); + screen->tex_transfer_destroy(srcTrans); + screen->tex_transfer_destroy(dstTrans); } } @@ -1183,8 +1184,8 @@ make_2d_mipmap(struct gen_mipmap_state *ctx, screen->transfer_unmap(screen, srcTrans); screen->transfer_unmap(screen, dstTrans); - screen->tex_transfer_release(screen, &srcTrans); - screen->tex_transfer_release(screen, &dstTrans); + screen->tex_transfer_destroy(srcTrans); + screen->tex_transfer_destroy(dstTrans); } } @@ -1228,8 +1229,8 @@ make_3d_mipmap(struct gen_mipmap_state *ctx, screen->transfer_unmap(screen, srcTrans); screen->transfer_unmap(screen, dstTrans); - screen->tex_transfer_release(screen, &srcTrans); - screen->tex_transfer_release(screen, &dstTrans); + screen->tex_transfer_destroy(srcTrans); + screen->tex_transfer_destroy(dstTrans); } #else (void) reduce_3d; @@ -1414,7 +1415,7 @@ util_destroy_gen_mipmap(struct gen_mipmap_state *ctx) FREE((void*) ctx->vert_shader.tokens); FREE((void*) ctx->frag_shader.tokens); - pipe_buffer_reference(pipe->screen, &ctx->vbuf, NULL); + pipe_buffer_reference(&ctx->vbuf, NULL); FREE(ctx); } @@ -1426,7 +1427,7 @@ util_destroy_gen_mipmap(struct gen_mipmap_state *ctx) */ void util_gen_mipmap_flush( struct gen_mipmap_state *ctx ) { - pipe_buffer_reference(ctx->pipe->screen, &ctx->vbuf, NULL); + pipe_buffer_reference(&ctx->vbuf, NULL); ctx->vbuf_slot = 0; } diff --git a/src/gallium/auxiliary/util/u_rect.c b/src/gallium/auxiliary/util/u_rect.c index 6e24e594e4..74259d453b 100644 --- a/src/gallium/auxiliary/util/u_rect.c +++ b/src/gallium/auxiliary/util/u_rect.c @@ -218,8 +218,8 @@ util_surface_copy(struct pipe_context *pipe, pipe->screen->transfer_unmap(pipe->screen, src_trans); pipe->screen->transfer_unmap(pipe->screen, dst_trans); - screen->tex_transfer_release(screen, &src_trans); - screen->tex_transfer_release(screen, &dst_trans); + screen->tex_transfer_destroy(src_trans); + screen->tex_transfer_destroy(dst_trans); } @@ -297,5 +297,5 @@ util_surface_fill(struct pipe_context *pipe, } pipe->screen->transfer_unmap(pipe->screen, dst_trans); - screen->tex_transfer_release(screen, &dst_trans); + screen->tex_transfer_destroy(dst_trans); } diff --git a/src/gallium/auxiliary/util/u_simple_screen.c b/src/gallium/auxiliary/util/u_simple_screen.c index 089bbbc48a..8114b53cd0 100644 --- a/src/gallium/auxiliary/util/u_simple_screen.c +++ b/src/gallium/auxiliary/util/u_simple_screen.c @@ -28,6 +28,7 @@ #include "u_simple_screen.h" #include "pipe/p_screen.h" +#include "pipe/p_state.h" #include "pipe/internal/p_winsys_screen.h" @@ -37,8 +38,12 @@ pass_buffer_create(struct pipe_screen *screen, unsigned usage, unsigned size) { - return screen->winsys->buffer_create(screen->winsys, - alignment, usage, size); + struct pipe_buffer *buffer = + screen->winsys->buffer_create(screen->winsys, alignment, usage, size); + + buffer->screen = screen; + + return buffer; } static struct pipe_buffer * @@ -46,8 +51,13 @@ pass_user_buffer_create(struct pipe_screen *screen, void *ptr, unsigned bytes) { - return screen->winsys->user_buffer_create(screen->winsys, + struct pipe_buffer *buffer = + screen->winsys->user_buffer_create(screen->winsys, ptr, bytes); + + buffer->screen = screen; + + return buffer; } static struct pipe_buffer * @@ -57,9 +67,14 @@ pass_surface_buffer_create(struct pipe_screen *screen, unsigned usage, unsigned *stride) { - return screen->winsys->surface_buffer_create(screen->winsys, + struct pipe_buffer *buffer = + screen->winsys->surface_buffer_create(screen->winsys, width, height, format, usage, stride); + + buffer->screen = screen; + + return buffer; } static void * @@ -79,10 +94,9 @@ pass_buffer_unmap(struct pipe_screen *screen, } static void -pass_buffer_destroy(struct pipe_screen *screen, - struct pipe_buffer *buf) +pass_buffer_destroy(struct pipe_buffer *buf) { - screen->winsys->buffer_destroy(screen->winsys, buf); + buf->screen->winsys->buffer_destroy(buf); } diff --git a/src/gallium/auxiliary/util/u_timed_winsys.c b/src/gallium/auxiliary/util/u_timed_winsys.c index f237e12d73..77b2a3a1c8 100644 --- a/src/gallium/auxiliary/util/u_timed_winsys.c +++ b/src/gallium/auxiliary/util/u_timed_winsys.c @@ -29,6 +29,7 @@ * Authors: Keith Whitwell */ +#include "pipe/p_state.h" #include "pipe/internal/p_winsys_screen.h" #include "u_timed_winsys.h" #include "util/u_memory.h" @@ -178,13 +179,13 @@ timed_buffer_unmap(struct pipe_winsys *winsys, static void -timed_buffer_destroy(struct pipe_winsys *winsys, - struct pipe_buffer *buf) +timed_buffer_destroy(struct pipe_buffer *buf) { + struct pipe_winsys *winsys = buf->screen->winsys; struct pipe_winsys *backend = timed_winsys(winsys)->backend; uint64_t start = time_start(); - backend->buffer_destroy( backend, buf ); + backend->buffer_destroy( buf ); time_finish(winsys, start, 4, __FUNCTION__); } diff --git a/src/gallium/drivers/cell/ppu/cell_fence.c b/src/gallium/drivers/cell/ppu/cell_fence.c index 32dbf5706c..13125a9fa3 100644 --- a/src/gallium/drivers/cell/ppu/cell_fence.c +++ b/src/gallium/drivers/cell/ppu/cell_fence.c @@ -96,7 +96,7 @@ cell_add_buffer_to_list(struct cell_context *cell, struct cell_buffer_node *node = CALLOC_STRUCT(cell_buffer_node); /* create new list node which references the buffer, insert at head */ if (node) { - pipe_buffer_reference(ps, &node->buffer, buffer); + pipe_buffer_reference(&node->buffer, buffer); node->next = list->head; list->head = node; } @@ -127,10 +127,10 @@ cell_free_fenced_buffers(struct cell_context *cell, pipe_buffer_unmap(ps, node->buffer); #if 0 printf("Unref buffer %p\n", node->buffer); - if (node->buffer->refcount == 1) + if (node->buffer->reference.count == 1) printf(" Delete!\n"); #endif - pipe_buffer_reference(ps, &node->buffer, NULL); + pipe_buffer_reference(&node->buffer, NULL); FREE(node); node = next; } diff --git a/src/gallium/drivers/cell/ppu/cell_texture.c b/src/gallium/drivers/cell/ppu/cell_texture.c index 74724393f7..bc6afa94a8 100644 --- a/src/gallium/drivers/cell/ppu/cell_texture.c +++ b/src/gallium/drivers/cell/ppu/cell_texture.c @@ -101,18 +101,17 @@ static struct pipe_texture * cell_texture_create(struct pipe_screen *screen, const struct pipe_texture *templat) { - struct pipe_winsys *ws = screen->winsys; struct cell_texture *ct = CALLOC_STRUCT(cell_texture); if (!ct) return NULL; ct->base = *templat; - ct->base.refcount = 1; + pipe_reference_init(&ct->base.reference, 1); ct->base.screen = screen; cell_texture_layout(ct); - ct->buffer = ws->buffer_create(ws, 32, PIPE_BUFFER_USAGE_PIXEL, + ct->buffer = screen->buffer_create(screen, 32, PIPE_BUFFER_USAGE_PIXEL, ct->buffer_size); if (!ct->buffer) { @@ -125,28 +124,18 @@ cell_texture_create(struct pipe_screen *screen, static void -cell_texture_release(struct pipe_screen *screen, - struct pipe_texture **pt) +cell_texture_destroy(struct pipe_texture *pt) { - if (!*pt) - return; - - if (--(*pt)->refcount <= 0) { - /* Delete this texture now. - * But note that the underlying pipe_buffer may linger... - */ - struct cell_texture *ct = cell_texture(*pt); + struct cell_texture *ct = cell_texture(pt); - if (ct->mapped) { - pipe_buffer_unmap(screen, ct->buffer); - ct->mapped = NULL; - } + if (ct->mapped) { + pipe_buffer_unmap(screen, ct->buffer); + ct->mapped = NULL; + } - pipe_buffer_reference(screen, &ct->buffer, NULL); + pipe_buffer_reference(&ct->buffer, NULL); - FREE(ct); - } - *pt = NULL; + FREE(ct); } @@ -291,7 +280,7 @@ cell_get_tex_surface(struct pipe_screen *screen, ps = CALLOC_STRUCT(pipe_surface); if (ps) { - ps->refcount = 1; + pipe_reference_init(&ps->reference, 1); pipe_texture_reference(&ps->texture, pt); ps->format = pt->format; ps->width = pt->width[level]; @@ -319,16 +308,10 @@ cell_get_tex_surface(struct pipe_screen *screen, static void -cell_tex_surface_release(struct pipe_screen *screen, - struct pipe_surface **s) +cell_tex_surface_destroy(struct pipe_surface *s) { - struct pipe_surface *surf = *s; - - if (--surf->refcount == 0) { - pipe_texture_reference(&surf->texture, NULL); - FREE(surf); - } - *s = NULL; + pipe_texture_reference(&surf->texture, NULL); + FREE(surf); } @@ -353,7 +336,7 @@ cell_get_tex_transfer(struct pipe_screen *screen, ctrans = CALLOC_STRUCT(cell_transfer); if (ctrans) { struct pipe_transfer *pt = &ctrans->base; - pt->refcount = 1; + pipe_reference_init(&pt->reference, 1); pipe_texture_reference(&pt->texture, texture); pt->format = texture->format; pt->block = texture->block; @@ -388,20 +371,16 @@ cell_get_tex_transfer(struct pipe_screen *screen, static void -cell_tex_transfer_release(struct pipe_screen *screen, - struct pipe_transfer **t) +cell_tex_transfer_destroy(struct pipe_transfer *t) { - struct cell_transfer *transfer = cell_transfer(*t); + struct cell_transfer *transfer = cell_transfer(t); /* Effectively do the texture_update work here - if texture images * needed post-processing to put them into hardware layout, this is * where it would happen. For cell, nothing to do. */ assert (transfer->base.texture); - if (--transfer->base.refcount == 0) { - pipe_texture_reference(&transfer->base.texture, NULL); - FREE(transfer); - } - *t = NULL; + pipe_texture_reference(&transfer->base.texture, NULL); + FREE(transfer); } @@ -511,13 +490,13 @@ void cell_init_screen_texture_funcs(struct pipe_screen *screen) { screen->texture_create = cell_texture_create; - screen->texture_release = cell_texture_release; + screen->texture_destroy = cell_texture_destroy; screen->get_tex_surface = cell_get_tex_surface; - screen->tex_surface_release = cell_tex_surface_release; + screen->tex_surface_destroy = cell_tex_surface_destroy; screen->get_tex_transfer = cell_get_tex_transfer; - screen->tex_transfer_release = cell_tex_transfer_release; + screen->tex_transfer_destroy = cell_tex_transfer_destroy; screen->transfer_map = cell_transfer_map; screen->transfer_unmap = cell_transfer_unmap; diff --git a/src/gallium/drivers/failover/fo_context.c b/src/gallium/drivers/failover/fo_context.c index 0742b27b8f..fcad717cf8 100644 --- a/src/gallium/drivers/failover/fo_context.c +++ b/src/gallium/drivers/failover/fo_context.c @@ -145,7 +145,7 @@ struct pipe_context *failover_create( struct pipe_context *hw, #if 0 failover->pipe.texture_create = hw->texture_create; - failover->pipe.texture_release = hw->texture_release; + failover->pipe.texture_destroy = hw->texture_destroy; failover->pipe.get_tex_surface = hw->get_tex_surface; failover->pipe.texture_update = hw->texture_update; #endif diff --git a/src/gallium/drivers/i915simple/i915_prim_vbuf.c b/src/gallium/drivers/i915simple/i915_prim_vbuf.c index 58c41840e1..9bdd91f288 100644 --- a/src/gallium/drivers/i915simple/i915_prim_vbuf.c +++ b/src/gallium/drivers/i915simple/i915_prim_vbuf.c @@ -126,7 +126,7 @@ i915_vbuf_render_allocate_vertices( struct vbuf_render *render, } else { i915->vbo_flushed = 0; if (i915_render->vbo) - pipe_buffer_reference(screen, &i915_render->vbo, NULL); + pipe_buffer_reference(&i915_render->vbo, NULL); } if (!i915_render->vbo) { diff --git a/src/gallium/drivers/i915simple/i915_screen.c b/src/gallium/drivers/i915simple/i915_screen.c index 49471287a2..f4aa8e60d8 100644 --- a/src/gallium/drivers/i915simple/i915_screen.c +++ b/src/gallium/drivers/i915simple/i915_screen.c @@ -230,7 +230,6 @@ i915_get_tex_transfer(struct pipe_screen *screen, trans = CALLOC_STRUCT(i915_transfer); if (trans) { - trans->base.refcount = 1; pipe_texture_reference(&trans->base.texture, texture); trans->base.format = trans->base.format; trans->base.width = w; @@ -246,17 +245,10 @@ i915_get_tex_transfer(struct pipe_screen *screen, } static void -i915_tex_transfer_release(struct pipe_screen *screen, - struct pipe_transfer **transfer) +i915_tex_transfer_destroy(struct pipe_transfer *trans) { - struct pipe_transfer *trans = *transfer; - - if (--trans->refcount == 0) { - pipe_texture_reference(&trans->texture, NULL); - FREE(trans); - } - - *transfer = NULL; + pipe_texture_reference(&trans->texture, NULL); + FREE(trans); } static void * @@ -344,7 +336,7 @@ i915_create_screen(struct pipe_winsys *winsys, uint pci_id) i915screen->screen.get_paramf = i915_get_paramf; i915screen->screen.is_format_supported = i915_is_format_supported; i915screen->screen.get_tex_transfer = i915_get_tex_transfer; - i915screen->screen.tex_transfer_release = i915_tex_transfer_release; + i915screen->screen.tex_transfer_destroy = i915_tex_transfer_destroy; i915screen->screen.transfer_map = i915_transfer_map; i915screen->screen.transfer_unmap = i915_transfer_unmap; diff --git a/src/gallium/drivers/i915simple/i915_texture.c b/src/gallium/drivers/i915simple/i915_texture.c index 6aead3e75e..39aca9f817 100644 --- a/src/gallium/drivers/i915simple/i915_texture.c +++ b/src/gallium/drivers/i915simple/i915_texture.c @@ -582,7 +582,6 @@ i915_texture_create(struct pipe_screen *screen, const struct pipe_texture *templat) { struct i915_screen *i915screen = i915_screen(screen); - struct pipe_winsys *ws = screen->winsys; struct i915_texture *tex = CALLOC_STRUCT(i915_texture); size_t tex_size; @@ -590,7 +589,7 @@ i915_texture_create(struct pipe_screen *screen, return NULL; tex->base = *templat; - tex->base.refcount = 1; + pipe_reference_init(&tex->base.reference, 1); tex->base.screen = screen; tex->base.nblocksx[0] = pf_get_nblocksx(&tex->base.block, tex->base.width[0]); @@ -606,7 +605,7 @@ i915_texture_create(struct pipe_screen *screen, tex_size = tex->stride * tex->total_nblocksy; - tex->buffer = ws->buffer_create(ws, 64, + tex->buffer = screen->buffer_create(screen, 64, PIPE_BUFFER_USAGE_PIXEL, tex_size); @@ -629,33 +628,22 @@ fail: static void -i915_texture_release(struct pipe_screen *screen, - struct pipe_texture **pt) +i915_texture_destroy(struct pipe_texture *pt) { - if (!*pt) - return; + struct i915_texture *tex = (struct i915_texture *)pt; + uint i; /* - DBG("%s %p refcount will be %d\n", - __FUNCTION__, (void *) *pt, (*pt)->refcount - 1); + DBG("%s deleting %p\n", __FUNCTION__, (void *) tex); */ - if (--(*pt)->refcount <= 0) { - struct i915_texture *tex = (struct i915_texture *)*pt; - uint i; - - /* - DBG("%s deleting %p\n", __FUNCTION__, (void *) tex); - */ - pipe_buffer_reference(screen, &tex->buffer, NULL); + pipe_buffer_reference(&tex->buffer, NULL); - for (i = 0; i < PIPE_MAX_TEXTURE_LEVELS; i++) - if (tex->image_offset[i]) - FREE(tex->image_offset[i]); + for (i = 0; i < PIPE_MAX_TEXTURE_LEVELS; i++) + if (tex->image_offset[i]) + FREE(tex->image_offset[i]); - FREE(tex); - } - *pt = NULL; + FREE(tex); } static struct pipe_surface * @@ -682,7 +670,7 @@ i915_get_tex_surface(struct pipe_screen *screen, ps = CALLOC_STRUCT(pipe_surface); if (ps) { - ps->refcount = 1; + pipe_reference_init(&ps->reference, 1); pipe_texture_reference(&ps->texture, pt); ps->format = pt->format; ps->width = pt->width[level]; @@ -715,7 +703,7 @@ i915_texture_blanket(struct pipe_screen * screen, return NULL; tex->base = *base; - tex->base.refcount = 1; + pipe_reference_init(&tex->base.reference, 1); tex->base.screen = screen; tex->stride = stride[0]; @@ -723,7 +711,7 @@ i915_texture_blanket(struct pipe_screen * screen, i915_miptree_set_level_info(tex, 0, 1, base->width[0], base->height[0], 1); i915_miptree_set_image_offset(tex, 0, 0, 0, 0); - pipe_buffer_reference(screen, &tex->buffer, buffer); + pipe_buffer_reference(&tex->buffer, buffer); return &tex->base; } @@ -735,36 +723,28 @@ i915_init_texture_functions(struct i915_context *i915) } static void -i915_tex_surface_release(struct pipe_screen *screen, - struct pipe_surface **surface) +i915_tex_surface_destroy(struct pipe_surface *surf) { - struct pipe_surface *surf = *surface; - - if (--surf->refcount == 0) { - - /* This really should not be possible, but it's actually - * happening quite a bit... Will fix. - */ - if (surf->status == PIPE_SURFACE_STATUS_CLEAR) { - debug_printf("XXX destroying a surface with pending clears...\n"); - assert(0); - } - - pipe_texture_reference(&surf->texture, NULL); - FREE(surf); + /* This really should not be possible, but it's actually + * happening quite a bit... Will fix. + */ + if (surf->status == PIPE_SURFACE_STATUS_CLEAR) { + debug_printf("XXX destroying a surface with pending clears...\n"); + assert(0); } - *surface = NULL; + pipe_texture_reference(&surf->texture, NULL); + FREE(surf); } void i915_init_screen_texture_functions(struct pipe_screen *screen) { screen->texture_create = i915_texture_create; - screen->texture_release = i915_texture_release; + screen->texture_destroy = i915_texture_destroy; screen->get_tex_surface = i915_get_tex_surface; screen->texture_blanket = i915_texture_blanket; - screen->tex_surface_release = i915_tex_surface_release; + screen->tex_surface_destroy = i915_tex_surface_destroy; } boolean i915_get_texture_buffer( struct pipe_texture *texture, @@ -776,7 +756,7 @@ boolean i915_get_texture_buffer( struct pipe_texture *texture, if (!tex) return FALSE; - pipe_buffer_reference(texture->screen, buf, tex->buffer); + pipe_buffer_reference(buf, tex->buffer); if (stride) *stride = tex->stride; diff --git a/src/gallium/drivers/i965simple/brw_tex_layout.c b/src/gallium/drivers/i965simple/brw_tex_layout.c index 448229ed4e..c921c0d38b 100644 --- a/src/gallium/drivers/i965simple/brw_tex_layout.c +++ b/src/gallium/drivers/i965simple/brw_tex_layout.c @@ -284,18 +284,17 @@ static struct pipe_texture * brw_texture_create_screen(struct pipe_screen *screen, const struct pipe_texture *templat) { - struct pipe_winsys *ws = screen->winsys; struct brw_texture *tex = CALLOC_STRUCT(brw_texture); if (tex) { tex->base = *templat; - tex->base.refcount = 1; + pipe_reference_init(&tex->base.reference, 1); tex->base.nblocksx[0] = pf_get_nblocksx(&tex->base.block, tex->base.width[0]); tex->base.nblocksy[0] = pf_get_nblocksy(&tex->base.block, tex->base.height[0]); if (brw_miptree_layout(tex)) - tex->buffer = ws->buffer_create(ws, 64, + tex->buffer = screen->buffer_create(screen, 64, PIPE_BUFFER_USAGE_PIXEL, tex->stride * tex->total_nblocksy); @@ -311,33 +310,22 @@ brw_texture_create_screen(struct pipe_screen *screen, static void -brw_texture_release_screen(struct pipe_screen *screen, - struct pipe_texture **pt) +brw_texture_destroy_screen(struct pipe_texture *pt) { - if (!*pt) - return; + struct brw_texture *tex = (struct brw_texture *)pt; + uint i; /* - DBG("%s %p refcount will be %d\n", - __FUNCTION__, (void *) *pt, (*pt)->refcount - 1); + DBG("%s deleting %p\n", __FUNCTION__, (void *) tex); */ - if (--(*pt)->refcount <= 0) { - struct brw_texture *tex = (struct brw_texture *)*pt; - uint i; - - /* - DBG("%s deleting %p\n", __FUNCTION__, (void *) tex); - */ - pipe_buffer_reference(screen, &tex->buffer, NULL); + pipe_buffer_reference(&tex->buffer, NULL); - for (i = 0; i < PIPE_MAX_TEXTURE_LEVELS; i++) - if (tex->image_offset[i]) - free(tex->image_offset[i]); + for (i = 0; i < PIPE_MAX_TEXTURE_LEVELS; i++) + if (tex->image_offset[i]) + free(tex->image_offset[i]); - free(tex); - } - *pt = NULL; + free(tex); } @@ -365,7 +353,7 @@ brw_get_tex_surface_screen(struct pipe_screen *screen, ps = CALLOC_STRUCT(pipe_surface); if (ps) { - ps->refcount = 1; + pipe_reference_init(&ps->reference, 1); pipe_texture_reference(&ps->texture, pt); ps->format = pt->format; ps->width = pt->width[level]; @@ -392,7 +380,7 @@ void brw_init_screen_texture_funcs(struct pipe_screen *screen) { screen->texture_create = brw_texture_create_screen; - screen->texture_release = brw_texture_release_screen; + screen->texture_destroy = brw_texture_destroy_screen; screen->get_tex_surface = brw_get_tex_surface_screen; } diff --git a/src/gallium/drivers/i965simple/brw_wm_surface_state.c b/src/gallium/drivers/i965simple/brw_wm_surface_state.c index 1bab5bfdb3..b5b9e0e702 100644 --- a/src/gallium/drivers/i965simple/brw_wm_surface_state.c +++ b/src/gallium/drivers/i965simple/brw_wm_surface_state.c @@ -242,7 +242,7 @@ static void upload_wm_surfaces(struct brw_context *brw ) const struct brw_texture *texUnit = brw->attribs.Texture[i]; if (texUnit && - texUnit->base.refcount/*(texUnit->refcount > 0) == really used */) { + texUnit->base.reference.count/*(texUnit->reference.count > 0) == really used */) { brw_update_texture_surface(brw, i); diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index 029b01e17d..666e061ac3 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -16,7 +16,7 @@ struct nouveau_stateobj_reloc { }; struct nouveau_stateobj { - int refcount; + struct pipe_reference reference; unsigned *push; struct nouveau_stateobj_reloc *reloc; @@ -32,7 +32,7 @@ so_new(unsigned push, unsigned reloc) struct nouveau_stateobj *so; so = MALLOC(sizeof(struct nouveau_stateobj)); - so->refcount = 0; + pipe_reference_init(&so->reference, 0); so->push = MALLOC(sizeof(unsigned) * push); so->reloc = MALLOC(sizeof(struct nouveau_stateobj_reloc) * reloc); @@ -47,17 +47,11 @@ so_ref(struct nouveau_stateobj *ref, struct nouveau_stateobj **pso) { struct nouveau_stateobj *so = *pso; - if (ref) { - ref->refcount++; - } - - if (so && --so->refcount <= 0) { + if (pipe_reference((struct pipe_reference**)pso, &ref->reference)) { free(so->push); free(so->reloc); free(so); } - - *pso = ref; } static INLINE void diff --git a/src/gallium/drivers/nv04/nv04_miptree.c b/src/gallium/drivers/nv04/nv04_miptree.c index 9acd613e2e..85dc017fbc 100644 --- a/src/gallium/drivers/nv04/nv04_miptree.c +++ b/src/gallium/drivers/nv04/nv04_miptree.c @@ -41,21 +41,20 @@ nv04_miptree_layout(struct nv04_miptree *nv04mt) static struct pipe_texture * nv04_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) { - struct pipe_winsys *ws = pscreen->winsys; struct nv04_miptree *mt; mt = MALLOC(sizeof(struct nv04_miptree)); if (!mt) return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = pscreen; //mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; nv04_miptree_layout(mt); - mt->buffer = ws->buffer_create(ws, 256, PIPE_BUFFER_USAGE_PIXEL | + mt->buffer = pscreen->buffer_create(pscreen, 256, PIPE_BUFFER_USAGE_PIXEL | NOUVEAU_BUFFER_USAGE_TEXTURE, mt->total_size); if (!mt->buffer) { @@ -83,27 +82,22 @@ nv04_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = pscreen; mt->level[0].pitch = stride[0]; mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - pipe_buffer_reference(pscreen, &mt->buffer, pb); + pipe_buffer_reference(&mt->buffer, pb); return &mt->base; } static void -nv04_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **ppt) +nv04_miptree_destroy(struct pipe_texture *pt) { - struct pipe_texture *pt = *ppt; struct nv04_miptree *mt = (struct nv04_miptree *)pt; int l; - *ppt = NULL; - if (--pt->refcount) - return; - - pipe_buffer_reference(pscreen, &mt->buffer, NULL); + pipe_buffer_reference(&mt->buffer, NULL); for (l = 0; l <= pt->last_level; l++) { if (mt->level[l].image_offset) FREE(mt->level[l].image_offset); @@ -129,7 +123,7 @@ nv04_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ns->base.height = pt->height[level]; ns->base.usage = flags; ns->base.status = PIPE_SURFACE_STATUS_DEFINED; - ns->base.refcount = 1; + pipe_reference_init(&ns->base.reference, 1); ns->base.face = face; ns->base.level = level; ns->base.zslice = zslice; @@ -141,15 +135,8 @@ nv04_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } static void -nv04_miptree_surface_del(struct pipe_screen *pscreen, - struct pipe_surface **psurface) +nv04_miptree_surface_del(struct pipe_surface *ps) { - struct pipe_surface *ps = *psurface; - - *psurface = NULL; - if (--ps->refcount > 0) - return; - pipe_texture_reference(&ps->texture, NULL); FREE(ps); } @@ -159,8 +146,8 @@ nv04_screen_init_miptree_functions(struct pipe_screen *pscreen) { pscreen->texture_create = nv04_miptree_create; pscreen->texture_blanket = nv04_miptree_blanket; - pscreen->texture_release = nv04_miptree_release; + pscreen->texture_destroy = nv04_miptree_destroy; pscreen->get_tex_surface = nv04_miptree_surface_new; - pscreen->tex_surface_release = nv04_miptree_surface_del; + pscreen->tex_surface_destroy = nv04_miptree_surface_del; } diff --git a/src/gallium/drivers/nv04/nv04_transfer.c b/src/gallium/drivers/nv04/nv04_transfer.c index 573b043f5b..e925a44e29 100644 --- a/src/gallium/drivers/nv04/nv04_transfer.c +++ b/src/gallium/drivers/nv04/nv04_transfer.c @@ -64,7 +64,6 @@ nv04_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!tx) return NULL; - tx->base.refcount = 1; pipe_texture_reference(&tx->base.texture, pt); tx->base.format = pt->format; tx->base.x = x; @@ -138,12 +137,12 @@ nv04_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } static void -nv04_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) +nv04_transfer_del(struct pipe_transfer *ptx) { - struct pipe_transfer *ptx = *pptx; struct nv04_transfer *tx = (struct nv04_transfer *)ptx; if (!tx->direct && ptx->usage != PIPE_TRANSFER_READ) { + struct pipe_screen *pscreen = ptx->texture->screen; struct nv04_screen *nvscreen = nv04_screen(pscreen); struct pipe_surface *dst; @@ -160,10 +159,6 @@ nv04_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) pipe_surface_reference(&dst, NULL); } - *pptx = NULL; - if (--ptx->refcount) - return; - pipe_surface_reference(&tx->surface, NULL); pipe_texture_reference(&ptx->texture, NULL); FREE(ptx); @@ -195,7 +190,7 @@ void nv04_screen_init_transfer_functions(struct pipe_screen *pscreen) { pscreen->get_tex_transfer = nv04_transfer_new; - pscreen->tex_transfer_release = nv04_transfer_del; + pscreen->tex_transfer_destroy = nv04_transfer_del; pscreen->transfer_map = nv04_transfer_map; pscreen->transfer_unmap = nv04_transfer_unmap; } diff --git a/src/gallium/drivers/nv10/nv10_miptree.c b/src/gallium/drivers/nv10/nv10_miptree.c index 4747868a50..bb3a1c0f19 100644 --- a/src/gallium/drivers/nv10/nv10_miptree.c +++ b/src/gallium/drivers/nv10/nv10_miptree.c @@ -66,31 +66,30 @@ nv10_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = pscreen; mt->level[0].pitch = stride[0]; mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - pipe_buffer_reference(pscreen, &mt->buffer, pb); + pipe_buffer_reference(&mt->buffer, pb); return &mt->base; } static struct pipe_texture * nv10_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) { - struct pipe_winsys *ws = screen->winsys; struct nv10_miptree *mt; mt = MALLOC(sizeof(struct nv10_miptree)); if (!mt) return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = screen; nv10_miptree_layout(mt); - mt->buffer = ws->buffer_create(ws, 256, PIPE_BUFFER_USAGE_PIXEL, + mt->buffer = screen->buffer_create(screen, 256, PIPE_BUFFER_USAGE_PIXEL, mt->total_size); if (!mt->buffer) { FREE(mt); @@ -101,22 +100,17 @@ nv10_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) } static void -nv10_miptree_release(struct pipe_screen *screen, struct pipe_texture **pt) +nv10_miptree_destroy(struct pipe_texture *pt) { - struct pipe_texture *mt = *pt; - - *pt = NULL; - if (--mt->refcount <= 0) { - struct nv10_miptree *nv10mt = (struct nv10_miptree *)mt; - int l; - - pipe_buffer_reference(screen, &nv10mt->buffer, NULL); - for (l = 0; l <= mt->last_level; l++) { - if (nv10mt->level[l].image_offset) - FREE(nv10mt->level[l].image_offset); - } - FREE(nv10mt); - } + struct nv10_miptree *nv10mt = (struct nv10_miptree *)pt; + int l; + + pipe_buffer_reference(&nv10mt->buffer, NULL); + for (l = 0; l <= pt->last_level; l++) { + if (nv10mt->level[l].image_offset) + FREE(nv10mt->level[l].image_offset); + } + FREE(nv10mt); } static void @@ -143,7 +137,7 @@ nv10_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt, ns->base.height = pt->height[level]; ns->base.usage = flags; ns->base.status = PIPE_SURFACE_STATUS_DEFINED; - ns->base.refcount = 1; + pipe_reference_init(&ns->base.reference, 1); ns->base.face = face; ns->base.level = level; ns->base.zslice = zslice; @@ -159,8 +153,7 @@ nv10_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt, } static void -nv10_miptree_surface_release(struct pipe_screen *screen, - struct pipe_surface **surface) +nv10_miptree_surface_destroy(struct pipe_surface *surface) { } @@ -168,8 +161,8 @@ void nv10_screen_init_miptree_functions(struct pipe_screen *pscreen) { pscreen->texture_create = nv10_miptree_create; pscreen->texture_blanket = nv10_miptree_blanket; - pscreen->texture_release = nv10_miptree_release; + pscreen->texture_destroy = nv10_miptree_destroy; pscreen->get_tex_surface = nv10_miptree_surface_get; - pscreen->tex_surface_release = nv10_miptree_surface_release; + pscreen->tex_surface_destroy = nv10_miptree_surface_destroy; } diff --git a/src/gallium/drivers/nv10/nv10_prim_vbuf.c b/src/gallium/drivers/nv10/nv10_prim_vbuf.c index 491a881806..089c236302 100644 --- a/src/gallium/drivers/nv10/nv10_prim_vbuf.c +++ b/src/gallium/drivers/nv10/nv10_prim_vbuf.c @@ -106,11 +106,11 @@ nv10_vbuf_render_allocate_vertices( struct vbuf_render *render, { struct nv10_vbuf_render *nv10_render = nv10_vbuf_render(render); struct nv10_context *nv10 = nv10_render->nv10; - struct pipe_winsys *winsys = nv10->pipe.winsys; + struct pipe_screen *screen = nv10->pipe.screen; size_t size = (size_t)vertex_size * (size_t)nr_vertices; assert(!nv10_render->buffer); - nv10_render->buffer = winsys->buffer_create(winsys, 64, PIPE_BUFFER_USAGE_VERTEX, size); + nv10_render->buffer = screen->buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, size); nv10->dirty |= NV10_NEW_VTXARRAYS; @@ -206,7 +206,7 @@ nv10_vbuf_render_release_vertices( struct vbuf_render *render ) struct pipe_screen *pscreen = &nv10->screen->pipe; assert(nv10_render->buffer); - pipe_buffer_reference(pscreen, &nv10_render->buffer, NULL); + pipe_buffer_reference(&nv10_render->buffer, NULL); } diff --git a/src/gallium/drivers/nv10/nv10_transfer.c b/src/gallium/drivers/nv10/nv10_transfer.c index daec37ab28..5a99225409 100644 --- a/src/gallium/drivers/nv10/nv10_transfer.c +++ b/src/gallium/drivers/nv10/nv10_transfer.c @@ -64,7 +64,6 @@ nv10_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!tx) return NULL; - tx->base.refcount = 1; pipe_texture_reference(&tx->base.texture, pt); tx->base.format = pt->format; tx->base.x = x; @@ -138,12 +137,12 @@ nv10_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } static void -nv10_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) +nv10_transfer_del(struct pipe_transfer *ptx) { - struct pipe_transfer *ptx = *pptx; struct nv10_transfer *tx = (struct nv10_transfer *)ptx; if (!tx->direct && ptx->usage != PIPE_TRANSFER_READ) { + struct pipe_screen *pscreen = ptx->texture->screen; struct nv10_screen *nvscreen = nv10_screen(pscreen); struct pipe_surface *dst; @@ -160,10 +159,6 @@ nv10_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) pipe_surface_reference(&dst, NULL); } - *pptx = NULL; - if (--ptx->refcount) - return; - pipe_surface_reference(&tx->surface, NULL); pipe_texture_reference(&ptx->texture, NULL); FREE(ptx); @@ -195,7 +190,7 @@ void nv10_screen_init_transfer_functions(struct pipe_screen *pscreen) { pscreen->get_tex_transfer = nv10_transfer_new; - pscreen->tex_transfer_release = nv10_transfer_del; + pscreen->tex_transfer_destroy = nv10_transfer_del; pscreen->transfer_map = nv10_transfer_map; pscreen->transfer_unmap = nv10_transfer_unmap; } diff --git a/src/gallium/drivers/nv20/nv20_miptree.c b/src/gallium/drivers/nv20/nv20_miptree.c index 2946240897..b2f29aff8d 100644 --- a/src/gallium/drivers/nv20/nv20_miptree.c +++ b/src/gallium/drivers/nv20/nv20_miptree.c @@ -76,19 +76,18 @@ nv20_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = pscreen; mt->level[0].pitch = stride[0]; mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - pipe_buffer_reference(pscreen, &mt->buffer, pb); + pipe_buffer_reference(&mt->buffer, pb); return &mt->base; } static struct pipe_texture * nv20_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) { - struct pipe_winsys *ws = screen->winsys; struct nv20_miptree *mt; unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | NOUVEAU_BUFFER_USAGE_TEXTURE; @@ -97,7 +96,7 @@ nv20_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) if (!mt) return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = screen; /* Swizzled textures must be POT */ @@ -133,7 +132,7 @@ nv20_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) nv20_miptree_layout(mt); - mt->buffer = ws->buffer_create(ws, 256, buf_usage, mt->total_size); + mt->buffer = screen->buffer_create(screen, 256, buf_usage, mt->total_size); if (!mt->buffer) { FREE(mt); return NULL; @@ -143,22 +142,16 @@ nv20_miptree_create(struct pipe_screen *screen, const struct pipe_texture *pt) } static void -nv20_miptree_release(struct pipe_screen *screen, struct pipe_texture **pt) +nv20_miptree_destroy(struct pipe_texture *pt) { - struct pipe_texture *mt = *pt; - - *pt = NULL; - if (--mt->refcount <= 0) { - struct nv20_miptree *nv20mt = (struct nv20_miptree *)mt; - int l; + struct nv20_miptree *nv20mt = (struct nv20_miptree *)pt; + int l; - pipe_buffer_reference(screen, &nv20mt->buffer, NULL); - for (l = 0; l <= mt->last_level; l++) { - if (nv20mt->level[l].image_offset) - FREE(nv20mt->level[l].image_offset); - } - FREE(nv20mt); - } + pipe_buffer_reference(&nv20mt->buffer, NULL); + for (l = 0; l <= pt->last_level; l++) { + if (nv20mt->level[l].image_offset) + FREE(nv20mt->level[l].image_offset); + } } static struct pipe_surface * @@ -178,7 +171,7 @@ nv20_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt, ns->base.height = pt->height[level]; ns->base.usage = flags; ns->base.status = PIPE_SURFACE_STATUS_DEFINED; - ns->base.refcount = 1; + pipe_reference_init(&ns->base.reference, 1); ns->base.face = face; ns->base.level = level; ns->base.zslice = zslice; @@ -197,15 +190,8 @@ nv20_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt, } static void -nv20_miptree_surface_release(struct pipe_screen *pscreen, - struct pipe_surface **psurface) +nv20_miptree_surface_destroy(struct pipe_surface *ps) { - struct pipe_surface *ps = *psurface; - - *psurface = NULL; - if (--ps->refcount > 0) - return; - pipe_texture_reference(&ps->texture, NULL); FREE(ps); } @@ -214,8 +200,8 @@ void nv20_screen_init_miptree_functions(struct pipe_screen *pscreen) { pscreen->texture_create = nv20_miptree_create; pscreen->texture_blanket = nv20_miptree_blanket; - pscreen->texture_release = nv20_miptree_release; + pscreen->texture_destroy = nv20_miptree_destroy; pscreen->get_tex_surface = nv20_miptree_surface_get; - pscreen->tex_surface_release = nv20_miptree_surface_release; + pscreen->tex_surface_destroy = nv20_miptree_surface_destroy; } diff --git a/src/gallium/drivers/nv20/nv20_prim_vbuf.c b/src/gallium/drivers/nv20/nv20_prim_vbuf.c index 319e1f6557..8aa342cd2d 100644 --- a/src/gallium/drivers/nv20/nv20_prim_vbuf.c +++ b/src/gallium/drivers/nv20/nv20_prim_vbuf.c @@ -112,8 +112,8 @@ nv20__allocate_mbuffer(struct nv20_vbuf_render *nv20_render, size_t size) static void nv20__allocate_pbuffer(struct nv20_vbuf_render *nv20_render, size_t size) { - struct pipe_winsys *winsys = nv20_render->nv20->pipe.winsys; - nv20_render->pbuffer = winsys->buffer_create(winsys, 64, + struct pipe_screen *screen = nv20_render->nv20->pipe.screen; + nv20_render->pbuffer = screen->buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, size); } @@ -361,7 +361,7 @@ nv20_vbuf_render_release_vertices( struct vbuf_render *render ) struct pipe_screen *pscreen = &nv20->screen->pipe; if (nv20_render->pbuffer) { - pipe_buffer_reference(pscreen, &nv20_render->pbuffer, NULL); + pipe_buffer_reference(&nv20_render->pbuffer, NULL); } else if (nv20_render->mbuffer) { FREE(nv20_render->mbuffer); nv20_render->mbuffer = NULL; diff --git a/src/gallium/drivers/nv20/nv20_transfer.c b/src/gallium/drivers/nv20/nv20_transfer.c index 1631637067..e5255296aa 100644 --- a/src/gallium/drivers/nv20/nv20_transfer.c +++ b/src/gallium/drivers/nv20/nv20_transfer.c @@ -64,7 +64,6 @@ nv20_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!tx) return NULL; - tx->base.refcount = 1; pipe_texture_reference(&tx->base.texture, pt); tx->base.format = pt->format; tx->base.x = x; @@ -138,12 +137,12 @@ nv20_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } static void -nv20_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) +nv20_transfer_del(struct pipe_transfer *ptx) { - struct pipe_transfer *ptx = *pptx; struct nv20_transfer *tx = (struct nv20_transfer *)ptx; if (!tx->direct && ptx->usage != PIPE_TRANSFER_READ) { + struct pipe_screen *pscreen = ptx->texture->screen; struct nv20_screen *nvscreen = nv20_screen(pscreen); struct pipe_surface *dst; @@ -160,10 +159,6 @@ nv20_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) pipe_surface_reference(&dst, NULL); } - *pptx = NULL; - if (--ptx->refcount) - return; - pipe_surface_reference(&tx->surface, NULL); pipe_texture_reference(&ptx->texture, NULL); FREE(ptx); @@ -195,7 +190,7 @@ void nv20_screen_init_transfer_functions(struct pipe_screen *pscreen) { pscreen->get_tex_transfer = nv20_transfer_new; - pscreen->tex_transfer_release = nv20_transfer_del; + pscreen->tex_transfer_destroy = nv20_transfer_del; pscreen->transfer_map = nv20_transfer_map; pscreen->transfer_unmap = nv20_transfer_unmap; } diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c index 320ba3f4bf..0da392fed3 100644 --- a/src/gallium/drivers/nv30/nv30_fragprog.c +++ b/src/gallium/drivers/nv30/nv30_fragprog.c @@ -834,6 +834,7 @@ nv30_fragprog_validate(struct nv30_context *nv30) struct nv30_fragment_program *fp = nv30->fragprog; struct pipe_buffer *constbuf = nv30->constbuf[PIPE_SHADER_FRAGMENT]; + struct pipe_screen *screen = nv30->pipe.screen; struct pipe_winsys *ws = nv30->pipe.winsys; struct nouveau_stateobj *so; boolean new_consts = FALSE; @@ -849,7 +850,7 @@ nv30_fragprog_validate(struct nv30_context *nv30) return FALSE; } - fp->buffer = ws->buffer_create(ws, 0x100, 0, fp->insn_len * 4); + fp->buffer = screen->buffer_create(screen, 0x100, 0, fp->insn_len * 4); nv30_fragprog_upload(nv30, fp); so = so_new(8, 1); diff --git a/src/gallium/drivers/nv30/nv30_miptree.c b/src/gallium/drivers/nv30/nv30_miptree.c index ec0a8b8438..d6dc621c9e 100644 --- a/src/gallium/drivers/nv30/nv30_miptree.c +++ b/src/gallium/drivers/nv30/nv30_miptree.c @@ -67,7 +67,6 @@ nv30_miptree_layout(struct nv30_miptree *nv30mt) static struct pipe_texture * nv30_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) { - struct pipe_winsys *ws = pscreen->winsys; struct nv30_miptree *mt; unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | NOUVEAU_BUFFER_USAGE_TEXTURE; @@ -76,7 +75,7 @@ nv30_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) if (!mt) return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = pscreen; /* Swizzled textures must be POT */ @@ -112,7 +111,7 @@ nv30_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) nv30_miptree_layout(mt); - mt->buffer = ws->buffer_create(ws, 256, buf_usage, + mt->buffer = pscreen->buffer_create(pscreen, 256, buf_usage, mt->total_size); if (!mt->buffer) { FREE(mt); @@ -138,27 +137,22 @@ nv30_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = pscreen; mt->level[0].pitch = stride[0]; mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - pipe_buffer_reference(pscreen, &mt->buffer, pb); + pipe_buffer_reference(&mt->buffer, pb); return &mt->base; } static void -nv30_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **ppt) +nv30_miptree_destroy(struct pipe_texture *pt) { - struct pipe_texture *pt = *ppt; struct nv30_miptree *mt = (struct nv30_miptree *)pt; int l; - *ppt = NULL; - if (--pt->refcount) - return; - - pipe_buffer_reference(pscreen, &mt->buffer, NULL); + pipe_buffer_reference(&mt->buffer, NULL); for (l = 0; l <= pt->last_level; l++) { if (mt->level[l].image_offset) FREE(mt->level[l].image_offset); @@ -184,7 +178,7 @@ nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ns->base.height = pt->height[level]; ns->base.usage = flags; ns->base.status = PIPE_SURFACE_STATUS_DEFINED; - ns->base.refcount = 1; + pipe_reference_init(&ns->base.reference, 1); ns->base.face = face; ns->base.level = level; ns->base.zslice = zslice; @@ -203,15 +197,8 @@ nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } static void -nv30_miptree_surface_del(struct pipe_screen *pscreen, - struct pipe_surface **psurface) +nv30_miptree_surface_del(struct pipe_surface *ps) { - struct pipe_surface *ps = *psurface; - - *psurface = NULL; - if (--ps->refcount > 0) - return; - pipe_texture_reference(&ps->texture, NULL); FREE(ps); } @@ -221,7 +208,7 @@ nv30_screen_init_miptree_functions(struct pipe_screen *pscreen) { pscreen->texture_create = nv30_miptree_create; pscreen->texture_blanket = nv30_miptree_blanket; - pscreen->texture_release = nv30_miptree_release; + pscreen->texture_destroy = nv30_miptree_destroy; pscreen->get_tex_surface = nv30_miptree_surface_new; - pscreen->tex_surface_release = nv30_miptree_surface_del; + pscreen->tex_surface_destroy = nv30_miptree_surface_del; } diff --git a/src/gallium/drivers/nv30/nv30_transfer.c b/src/gallium/drivers/nv30/nv30_transfer.c index 6367374a61..8b915b35bd 100644 --- a/src/gallium/drivers/nv30/nv30_transfer.c +++ b/src/gallium/drivers/nv30/nv30_transfer.c @@ -64,7 +64,6 @@ nv30_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!tx) return NULL; - tx->base.refcount = 1; pipe_texture_reference(&tx->base.texture, pt); tx->base.format = pt->format; tx->base.x = x; @@ -138,12 +137,12 @@ nv30_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } static void -nv30_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) +nv30_transfer_del(struct pipe_transfer *ptx) { - struct pipe_transfer *ptx = *pptx; struct nv30_transfer *tx = (struct nv30_transfer *)ptx; if (!tx->direct && ptx->usage != PIPE_TRANSFER_READ) { + struct pipe_screen *pscreen = ptx->texture->screen; struct nv30_screen *nvscreen = nv30_screen(pscreen); struct pipe_surface *dst; @@ -160,10 +159,6 @@ nv30_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) pipe_surface_reference(&dst, NULL); } - *pptx = NULL; - if (--ptx->refcount) - return; - pipe_surface_reference(&tx->surface, NULL); pipe_texture_reference(&ptx->texture, NULL); FREE(ptx); @@ -195,7 +190,7 @@ void nv30_screen_init_transfer_functions(struct pipe_screen *pscreen) { pscreen->get_tex_transfer = nv30_transfer_new; - pscreen->tex_transfer_release = nv30_transfer_del; + pscreen->tex_transfer_destroy = nv30_transfer_del; pscreen->transfer_map = nv30_transfer_map; pscreen->transfer_unmap = nv30_transfer_unmap; } diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c index 91dcbebda0..1031e87e97 100644 --- a/src/gallium/drivers/nv40/nv40_fragprog.c +++ b/src/gallium/drivers/nv40/nv40_fragprog.c @@ -917,6 +917,7 @@ nv40_fragprog_validate(struct nv40_context *nv40) struct nv40_fragment_program *fp = nv40->fragprog; struct pipe_buffer *constbuf = nv40->constbuf[PIPE_SHADER_FRAGMENT]; + struct pipe_screen *screen = nv40->pipe.screen; struct pipe_winsys *ws = nv40->pipe.winsys; struct nouveau_stateobj *so; boolean new_consts = FALSE; @@ -932,7 +933,7 @@ nv40_fragprog_validate(struct nv40_context *nv40) return FALSE; } - fp->buffer = ws->buffer_create(ws, 0x100, 0, fp->insn_len * 4); + fp->buffer = screen->buffer_create(screen, 0x100, 0, fp->insn_len * 4); nv40_fragprog_upload(nv40, fp); so = so_new(4, 1); diff --git a/src/gallium/drivers/nv40/nv40_miptree.c b/src/gallium/drivers/nv40/nv40_miptree.c index 638d279aa5..abadca8c93 100644 --- a/src/gallium/drivers/nv40/nv40_miptree.c +++ b/src/gallium/drivers/nv40/nv40_miptree.c @@ -67,7 +67,6 @@ nv40_miptree_layout(struct nv40_miptree *mt) static struct pipe_texture * nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) { - struct pipe_winsys *ws = pscreen->winsys; struct nv40_miptree *mt; unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | NOUVEAU_BUFFER_USAGE_TEXTURE; @@ -76,7 +75,7 @@ nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) if (!mt) return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = pscreen; /* Swizzled textures must be POT */ @@ -112,7 +111,7 @@ nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) nv40_miptree_layout(mt); - mt->buffer = ws->buffer_create(ws, 256, buf_usage, mt->total_size); + mt->buffer = pscreen->buffer_create(pscreen, 256, buf_usage, mt->total_size); if (!mt->buffer) { FREE(mt); return NULL; @@ -137,27 +136,22 @@ nv40_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = pscreen; mt->level[0].pitch = stride[0]; mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - pipe_buffer_reference(pscreen, &mt->buffer, pb); + pipe_buffer_reference(&mt->buffer, pb); return &mt->base; } static void -nv40_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **ppt) +nv40_miptree_destroy(struct pipe_texture *pt) { - struct pipe_texture *pt = *ppt; struct nv40_miptree *mt = (struct nv40_miptree *)pt; int l; - *ppt = NULL; - if (--pt->refcount) - return; - - pipe_buffer_reference(pscreen, &mt->buffer, NULL); + pipe_buffer_reference(&mt->buffer, NULL); for (l = 0; l <= pt->last_level; l++) { if (mt->level[l].image_offset) FREE(mt->level[l].image_offset); @@ -183,7 +177,7 @@ nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ns->base.height = pt->height[level]; ns->base.usage = flags; ns->base.status = PIPE_SURFACE_STATUS_DEFINED; - ns->base.refcount = 1; + pipe_reference_init(&ns->base.reference, 1); ns->base.face = face; ns->base.level = level; ns->base.zslice = zslice; @@ -202,15 +196,8 @@ nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } static void -nv40_miptree_surface_del(struct pipe_screen *pscreen, - struct pipe_surface **psurface) +nv40_miptree_surface_del(struct pipe_surface *ps) { - struct pipe_surface *ps = *psurface; - - *psurface = NULL; - if (--ps->refcount > 0) - return; - pipe_texture_reference(&ps->texture, NULL); FREE(ps); } @@ -220,8 +207,8 @@ nv40_screen_init_miptree_functions(struct pipe_screen *pscreen) { pscreen->texture_create = nv40_miptree_create; pscreen->texture_blanket = nv40_miptree_blanket; - pscreen->texture_release = nv40_miptree_release; + pscreen->texture_destroy = nv40_miptree_destroy; pscreen->get_tex_surface = nv40_miptree_surface_new; - pscreen->tex_surface_release = nv40_miptree_surface_del; + pscreen->tex_surface_destroy = nv40_miptree_surface_del; } diff --git a/src/gallium/drivers/nv40/nv40_transfer.c b/src/gallium/drivers/nv40/nv40_transfer.c index f762f32f0c..728e8b5674 100644 --- a/src/gallium/drivers/nv40/nv40_transfer.c +++ b/src/gallium/drivers/nv40/nv40_transfer.c @@ -64,7 +64,6 @@ nv40_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!tx) return NULL; - tx->base.refcount = 1; pipe_texture_reference(&tx->base.texture, pt); tx->base.format = pt->format; tx->base.x = x; @@ -138,12 +137,12 @@ nv40_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } static void -nv40_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) +nv40_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer *ptx) { - struct pipe_transfer *ptx = *pptx; struct nv40_transfer *tx = (struct nv40_transfer *)ptx; if (!tx->direct && ptx->usage != PIPE_TRANSFER_READ) { + struct pipe_screen *pscreen = ptx->texture->screen; struct nv40_screen *nvscreen = nv40_screen(pscreen); struct pipe_surface *dst; @@ -160,10 +159,6 @@ nv40_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) pipe_surface_reference(&dst, NULL); } - *pptx = NULL; - if (--ptx->refcount) - return; - pipe_surface_reference(&tx->surface, NULL); pipe_texture_reference(&ptx->texture, NULL); FREE(ptx); @@ -195,7 +190,7 @@ void nv40_screen_init_transfer_functions(struct pipe_screen *pscreen) { pscreen->get_tex_transfer = nv40_transfer_new; - pscreen->tex_transfer_release = nv40_transfer_del; + pscreen->tex_transfer_destroy = nv40_transfer_del; pscreen->transfer_map = nv40_transfer_map; pscreen->transfer_unmap = nv40_transfer_unmap; } diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c index 24a68b7235..dc4688ccdc 100644 --- a/src/gallium/drivers/nv50/nv50_miptree.c +++ b/src/gallium/drivers/nv50/nv50_miptree.c @@ -29,7 +29,6 @@ static struct pipe_texture * nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp) { - struct pipe_winsys *ws = pscreen->winsys; struct nv50_miptree *mt = CALLOC_STRUCT(nv50_miptree); struct pipe_texture *pt = &mt->base; unsigned usage, width = tmp->width[0], height = tmp->height[0]; @@ -37,7 +36,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp) int i, l; mt->base = *tmp; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = pscreen; usage = PIPE_BUFFER_USAGE_PIXEL; @@ -94,7 +93,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp) } } - mt->buffer = ws->buffer_create(ws, 256, usage, mt->total_size); + mt->buffer = pscreen->buffer_create(pscreen, 256, usage, mt->total_size); if (!mt->buffer) { FREE(mt); return NULL; @@ -119,29 +118,23 @@ nv50_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, return NULL; mt->base = *pt; - mt->base.refcount = 1; + pipe_reference_init(&mt->base.reference, 1); mt->base.screen = pscreen; mt->image_nr = 1; mt->level[0].pitch = *stride; mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - pipe_buffer_reference(pscreen, &mt->buffer, pb); + pipe_buffer_reference(&mt->buffer, pb); return &mt->base; } static void -nv50_miptree_release(struct pipe_screen *pscreen, struct pipe_texture **ppt) +nv50_miptree_destroy(struct pipe_texture *pt) { - struct pipe_texture *pt = *ppt; - - *ppt = NULL; - - if (--pt->refcount <= 0) { - struct nv50_miptree *mt = nv50_miptree(pt); + struct nv50_miptree *mt = nv50_miptree(pt); - pipe_buffer_reference(pscreen, &mt->buffer, NULL); - FREE(mt); - } + pipe_buffer_reference(&mt->buffer, NULL); + FREE(mt); } static struct pipe_surface * @@ -171,7 +164,7 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ps->height = pt->height[level]; ps->usage = flags; ps->status = PIPE_SURFACE_STATUS_DEFINED; - ps->refcount = 1; + pipe_reference_init(&ps->reference, 1); ps->face = face; ps->level = level; ps->zslice = zslice; @@ -181,18 +174,12 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } static void -nv50_miptree_surface_del(struct pipe_screen *pscreen, - struct pipe_surface **psurface) +nv50_miptree_surface_del(struct pipe_surface *ps) { - struct pipe_surface *ps = *psurface; struct nv50_surface *s = nv50_surface(ps); - *psurface = NULL; - - if (--ps->refcount <= 0) { - pipe_texture_reference(&ps->texture, NULL); - FREE(s); - } + pipe_texture_reference(&ps->texture, NULL); + FREE(s); } void @@ -200,8 +187,8 @@ nv50_screen_init_miptree_functions(struct pipe_screen *pscreen) { pscreen->texture_create = nv50_miptree_create; pscreen->texture_blanket = nv50_miptree_blanket; - pscreen->texture_release = nv50_miptree_release; + pscreen->texture_destroy = nv50_miptree_destroy; pscreen->get_tex_surface = nv50_miptree_surface_new; - pscreen->tex_surface_release = nv50_miptree_surface_del; + pscreen->tex_surface_destroy = nv50_miptree_surface_del; } diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c index 14c5d47e79..308eb34784 100644 --- a/src/gallium/drivers/nv50/nv50_program.c +++ b/src/gallium/drivers/nv50/nv50_program.c @@ -1603,7 +1603,7 @@ nv50_program_validate_code(struct nv50_context *nv50, struct nv50_program *p) { struct nouveau_channel *chan = nv50->screen->nvws->channel; struct nouveau_grobj *tesla = nv50->screen->tesla; - struct pipe_winsys *ws = nv50->pipe.winsys; + struct pipe_screen *screen = nv50->pipe.screen; struct nv50_program_exec *e; struct nouveau_stateobj *so; const unsigned flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_WR; @@ -1611,7 +1611,7 @@ nv50_program_validate_code(struct nv50_context *nv50, struct nv50_program *p) boolean upload = FALSE; if (!p->buffer) { - p->buffer = ws->buffer_create(ws, 0x100, 0, p->exec_size * 4); + p->buffer = screen->buffer_create(screen, 0x100, 0, p->exec_size * 4); upload = TRUE; } @@ -1775,7 +1775,7 @@ nv50_program_destroy(struct nv50_context *nv50, struct nv50_program *p) p->exec_size = 0; if (p->buffer) - pipe_buffer_reference(pscreen, &p->buffer, NULL); + pipe_buffer_reference(&p->buffer, NULL); nv50->screen->nvws->res_free(&p->data); diff --git a/src/gallium/drivers/nv50/nv50_query.c b/src/gallium/drivers/nv50/nv50_query.c index 7c8831a46d..a2c56f99a8 100644 --- a/src/gallium/drivers/nv50/nv50_query.c +++ b/src/gallium/drivers/nv50/nv50_query.c @@ -41,13 +41,13 @@ nv50_query(struct pipe_query *pipe) static struct pipe_query * nv50_query_create(struct pipe_context *pipe, unsigned type) { - struct pipe_winsys *ws = pipe->winsys; + struct pipe_screen *screen = pipe->winsys; struct nv50_query *q = CALLOC_STRUCT(nv50_query); assert (q->type == PIPE_QUERY_OCCLUSION_COUNTER); q->type = type; - q->buffer = ws->buffer_create(ws, 256, 0, 16); + q->buffer = screen->buffer_create(screen, 256, 0, 16); if (!q->buffer) { FREE(q); return NULL; @@ -62,7 +62,7 @@ nv50_query_destroy(struct pipe_context *pipe, struct pipe_query *pq) struct nv50_query *q = nv50_query(pq); if (q) { - pipe_buffer_reference(pipe->screen, &q->buffer, NULL); + pipe_buffer_reference(&q->buffer, NULL); FREE(q); } } diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index ee24405d36..bbfe42e478 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -285,7 +285,7 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws) so_data (so, 8); /* Shared constant buffer */ - screen->constbuf = ws->buffer_create(ws, 0, 0, 128 * 4 * 4); + screen->constbuf = screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4); if (nvws->res_init(&screen->vp_data_heap, 0, 128)) { NOUVEAU_ERR("Error initialising constant buffer\n"); nv50_screen_destroy(&screen->pipe); @@ -304,7 +304,7 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws) * blocks. At some point we *may* want to go the NVIDIA way of doing * things? */ - screen->tic = ws->buffer_create(ws, 0, 0, 32 * 8 * 4); + screen->tic = screen->pipe.buffer_create(&screen->pipe, 0, 0, 32 * 8 * 4); so_method(so, screen->tesla, 0x1280, 3); so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); @@ -318,7 +318,7 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws) NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); so_data (so, 0x00000800); - screen->tsc = ws->buffer_create(ws, 0, 0, 32 * 8 * 4); + screen->tsc = screen->pipe.buffer_create(&screen->pipe, 0, 0, 32 * 8 * 4); so_method(so, screen->tesla, 0x1280, 3); so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); diff --git a/src/gallium/drivers/nv50/nv50_transfer.c b/src/gallium/drivers/nv50/nv50_transfer.c index a00c999510..747195b4f6 100644 --- a/src/gallium/drivers/nv50/nv50_transfer.c +++ b/src/gallium/drivers/nv50/nv50_transfer.c @@ -123,7 +123,6 @@ nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, if (!tx) return NULL; - tx->base.refcount = 1; pipe_texture_reference(&tx->base.texture, pt); tx->base.format = pt->format; tx->base.width = w; @@ -158,17 +157,13 @@ nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } static void -nv50_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) +nv50_transfer_del(struct pipe_transfer *ptx) { - struct pipe_transfer *ptx = *pptx; struct nv50_transfer *tx = (struct nv50_transfer *)ptx; struct nv50_miptree *mt = nv50_miptree(ptx->texture); - *pptx = NULL; - if (--ptx->refcount) - return; - if (ptx->usage != PIPE_TRANSFER_READ) { + struct pipe_screen *pscreen = ptx->texture->screen; nv50_transfer_rect_m2mf(pscreen, tx->buffer, tx->base.stride, 0, 0, tx->base.width, tx->base.height, mt->buffer, tx->level_pitch, @@ -179,7 +174,7 @@ nv50_transfer_del(struct pipe_screen *pscreen, struct pipe_transfer **pptx) NOUVEAU_BO_VRAM | NOUVEAU_BO_GART); } - pipe_buffer_reference(pscreen, &tx->buffer, NULL); + pipe_buffer_reference(&tx->buffer, NULL); pipe_texture_reference(&ptx->texture, NULL); FREE(ptx); } @@ -210,7 +205,7 @@ void nv50_transfer_init_screen_functions(struct pipe_screen *pscreen) { pscreen->get_tex_transfer = nv50_transfer_new; - pscreen->tex_transfer_release = nv50_transfer_del; + pscreen->tex_transfer_destroy = nv50_transfer_del; pscreen->transfer_map = nv50_transfer_map; pscreen->transfer_unmap = nv50_transfer_unmap; } diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index e97334463a..3c91967a72 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -268,7 +268,6 @@ r300_get_tex_transfer(struct pipe_screen *screen, trans = CALLOC_STRUCT(r300_transfer); if (trans) { - trans->transfer.refcount = 1; pipe_texture_reference(&trans->transfer.texture, texture); trans->transfer.format = trans->transfer.format; trans->transfer.width = w; @@ -284,17 +283,10 @@ r300_get_tex_transfer(struct pipe_screen *screen, } static void -r300_tex_transfer_release(struct pipe_screen *screen, - struct pipe_transfer **transfer) +r300_tex_transfer_destroy(struct pipe_transfer *trans) { - struct pipe_transfer *trans = *transfer; - - if (--trans->refcount == 0) { - pipe_texture_reference(&trans->texture, NULL); - FREE(trans); - } - - *transfer = NULL; + pipe_texture_reference(&trans->texture, NULL); + FREE(trans); } static void* r300_transfer_map(struct pipe_screen* screen, @@ -359,7 +351,7 @@ struct pipe_screen* r300_create_screen(struct r300_winsys* r300_winsys) r300screen->screen.get_paramf = r300_get_paramf; r300screen->screen.is_format_supported = r300_is_format_supported; r300screen->screen.get_tex_transfer = r300_get_tex_transfer; - r300screen->screen.tex_transfer_release = r300_tex_transfer_release; + r300screen->screen.tex_transfer_destroy = r300_tex_transfer_destroy; r300screen->screen.transfer_map = r300_transfer_map; r300screen->screen.transfer_unmap = r300_transfer_unmap; diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index f9baaade1e..01235674ac 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -79,7 +79,7 @@ static boolean r300_swtcl_render_allocate_vertices(struct vbuf_render* render, size_t size = (size_t)vertex_size * (size_t)count; if (r300render->vbo) { - pipe_buffer_reference(screen, &r300render->vbo, NULL); + pipe_buffer_reference(&r300render->vbo, NULL); } r300render->vbo_size = MAX2(size, r300render->vbo_alloc_size); @@ -125,9 +125,8 @@ static void r300_swtcl_render_unmap_vertices(struct vbuf_render* render, static void r300_swtcl_render_release_vertices(struct vbuf_render* render) { struct r300_swtcl_render* r300render = r300_swtcl_render(render); - struct pipe_screen* screen = r300render->r300->context.screen; - pipe_buffer_reference(screen, &r300render->vbo, NULL); + pipe_buffer_reference(&r300render->vbo, NULL); } static boolean r300_swtcl_render_set_primitive(struct vbuf_render* render, diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index b3425587e3..b7027553b5 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -68,7 +68,7 @@ static struct pipe_texture* } tex->tex = *template; - tex->tex.refcount = 1; + pipe_reference_init(&tex->tex.reference, 1); tex->tex.screen = screen; r300_setup_miptree(tex); @@ -85,24 +85,13 @@ static struct pipe_texture* return (struct pipe_texture*)tex; } -static void r300_texture_release(struct pipe_screen* screen, - struct pipe_texture** texture) +static void r300_texture_destroy(struct pipe_texture* texture) { - if (!*texture) { - return; - } - - (*texture)->refcount--; - - if ((*texture)->refcount <= 0) { - struct r300_texture* tex = (struct r300_texture*)*texture; + struct r300_texture* tex = (struct r300_texture*)texture; - pipe_buffer_reference(screen, &tex->buffer, NULL); + pipe_buffer_reference(&tex->buffer, NULL); - FREE(tex); - } - - *texture = NULL; + FREE(tex); } static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, @@ -120,7 +109,7 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, offset = tex->offset[level]; if (surface) { - surface->refcount = 1; + pipe_reference_init(&surface->reference, 1); pipe_texture_reference(&surface->texture, texture); surface->format = texture->format; surface->width = texture->width[level]; @@ -133,19 +122,10 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, return surface; } -static void r300_tex_surface_release(struct pipe_screen* screen, - struct pipe_surface** surface) +static void r300_tex_surface_destroy(struct pipe_surface* s) { - struct pipe_surface* s = *surface; - - s->refcount--; - - if (s->refcount <= 0) { - pipe_texture_reference(&s->texture, NULL); - FREE(s); - } - - *surface = NULL; + pipe_texture_reference(&s->texture, NULL); + FREE(s); } static struct pipe_texture* @@ -168,12 +148,12 @@ static struct pipe_texture* } tex->tex = *base; - tex->tex.refcount = 1; + pipe_reference_init(&tex->tex.reference, 1); tex->tex.screen = screen; tex->stride = *stride; - pipe_buffer_reference(screen, &tex->buffer, buffer); + pipe_buffer_reference(&tex->buffer, buffer); return (struct pipe_texture*)tex; } @@ -181,9 +161,9 @@ static struct pipe_texture* void r300_init_screen_texture_functions(struct pipe_screen* screen) { screen->texture_create = r300_texture_create; - screen->texture_release = r300_texture_release; + screen->texture_destroy = r300_texture_destroy; screen->get_tex_surface = r300_get_tex_surface; - screen->tex_surface_release = r300_tex_surface_release; + screen->tex_surface_destroy = r300_tex_surface_destroy; screen->texture_blanket = r300_texture_blanket; } @@ -196,7 +176,7 @@ boolean r300_get_texture_buffer(struct pipe_texture* texture, return FALSE; } - pipe_buffer_reference(texture->screen, buffer, tex->buffer); + pipe_buffer_reference(buffer, tex->buffer); if (stride) { *stride = tex->stride; diff --git a/src/gallium/drivers/softpipe/sp_context.c b/src/gallium/drivers/softpipe/sp_context.c index ff5d1b54a4..cc552c4915 100644 --- a/src/gallium/drivers/softpipe/sp_context.c +++ b/src/gallium/drivers/softpipe/sp_context.c @@ -87,7 +87,6 @@ softpipe_unmap_transfers(struct softpipe_context *sp) static void softpipe_destroy( struct pipe_context *pipe ) { struct softpipe_context *softpipe = softpipe_context( pipe ); - struct pipe_screen *screen = pipe->screen; uint i; if (softpipe->draw) @@ -116,7 +115,7 @@ static void softpipe_destroy( struct pipe_context *pipe ) for (i = 0; i < Elements(softpipe->constants); i++) { if (softpipe->constants[i].buffer) { - pipe_buffer_reference(screen, &softpipe->constants[i].buffer, NULL); + pipe_buffer_reference(&softpipe->constants[i].buffer, NULL); } } diff --git a/src/gallium/drivers/softpipe/sp_state_fs.c b/src/gallium/drivers/softpipe/sp_state_fs.c index 4d01a9dbe1..957c8b72e4 100644 --- a/src/gallium/drivers/softpipe/sp_state_fs.c +++ b/src/gallium/drivers/softpipe/sp_state_fs.c @@ -146,14 +146,12 @@ softpipe_set_constant_buffer(struct pipe_context *pipe, const struct pipe_constant_buffer *buf) { struct softpipe_context *softpipe = softpipe_context(pipe); - struct pipe_screen *screen = pipe->screen; assert(shader < PIPE_SHADER_TYPES); assert(index == 0); /* note: reference counting */ - pipe_buffer_reference(screen, - &softpipe->constants[shader].buffer, + pipe_buffer_reference(&softpipe->constants[shader].buffer, buf ? buf->buffer : NULL); softpipe->dirty |= SP_NEW_CONSTANTS; diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c index 142ce230fc..4919ec826e 100644 --- a/src/gallium/drivers/softpipe/sp_texture.c +++ b/src/gallium/drivers/softpipe/sp_texture.c @@ -59,7 +59,6 @@ static boolean softpipe_texture_layout(struct pipe_screen *screen, struct softpipe_texture * spt) { - struct pipe_winsys *ws = screen->winsys; struct pipe_texture *pt = &spt->base; unsigned level; unsigned width = pt->width[0]; @@ -87,9 +86,9 @@ softpipe_texture_layout(struct pipe_screen *screen, depth = minify(depth); } - spt->buffer = ws->buffer_create(ws, 32, - PIPE_BUFFER_USAGE_PIXEL, - buffer_size); + spt->buffer = screen->buffer_create(screen, 32, + PIPE_BUFFER_USAGE_PIXEL, + buffer_size); return spt->buffer != NULL; } @@ -98,19 +97,18 @@ static boolean softpipe_displaytarget_layout(struct pipe_screen *screen, struct softpipe_texture * spt) { - struct pipe_winsys *ws = screen->winsys; unsigned usage = (PIPE_BUFFER_USAGE_CPU_READ_WRITE | PIPE_BUFFER_USAGE_GPU_READ_WRITE); spt->base.nblocksx[0] = pf_get_nblocksx(&spt->base.block, spt->base.width[0]); spt->base.nblocksy[0] = pf_get_nblocksy(&spt->base.block, spt->base.height[0]); - spt->buffer = ws->surface_buffer_create( ws, - spt->base.width[0], - spt->base.height[0], - spt->base.format, - usage, - &spt->stride[0]); + spt->buffer = screen->surface_buffer_create( screen, + spt->base.width[0], + spt->base.height[0], + spt->base.format, + usage, + &spt->stride[0]); return spt->buffer != NULL; } @@ -128,7 +126,7 @@ softpipe_texture_create(struct pipe_screen *screen, return NULL; spt->base = *templat; - spt->base.refcount = 1; + pipe_reference_init(&spt->base.reference, 1); spt->base.screen = screen; if (spt->base.tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) { @@ -140,7 +138,7 @@ softpipe_texture_create(struct pipe_screen *screen, goto fail; } - assert(spt->base.refcount == 1); + assert(spt->base.reference.count == 1); return &spt->base; fail: @@ -170,32 +168,25 @@ softpipe_texture_blanket(struct pipe_screen * screen, return NULL; spt->base = *base; - spt->base.refcount = 1; + pipe_reference_init(&spt->base.reference, 1); spt->base.screen = screen; spt->base.nblocksx[0] = pf_get_nblocksx(&spt->base.block, spt->base.width[0]); spt->base.nblocksy[0] = pf_get_nblocksy(&spt->base.block, spt->base.height[0]); spt->stride[0] = stride[0]; - pipe_buffer_reference(screen, &spt->buffer, buffer); + pipe_buffer_reference(&spt->buffer, buffer); return &spt->base; } static void -softpipe_texture_release(struct pipe_screen *screen, - struct pipe_texture **pt) +softpipe_texture_destroy(struct pipe_texture *pt) { - if (!*pt) - return; - - if (--(*pt)->refcount <= 0) { - struct softpipe_texture *spt = softpipe_texture(*pt); + struct softpipe_texture *spt = softpipe_texture(pt); - pipe_buffer_reference(screen, &spt->buffer, NULL); - FREE(spt); - } - *pt = NULL; + pipe_buffer_reference(&spt->buffer, NULL); + FREE(spt); } @@ -212,7 +203,7 @@ softpipe_get_tex_surface(struct pipe_screen *screen, ps = CALLOC_STRUCT(pipe_surface); if (ps) { - ps->refcount = 1; + pipe_reference_init(&ps->reference, 1); pipe_texture_reference(&ps->texture, pt); ps->format = pt->format; ps->width = pt->width[level]; @@ -259,20 +250,15 @@ softpipe_get_tex_surface(struct pipe_screen *screen, static void -softpipe_tex_surface_release(struct pipe_screen *screen, - struct pipe_surface **s) +softpipe_tex_surface_destroy(struct pipe_surface *surf) { - struct pipe_surface *surf = *s; /* Effectively do the texture_update work here - if texture images * needed post-processing to put them into hardware layout, this is * where it would happen. For softpipe, nothing to do. */ assert(surf->texture); - if (--surf->refcount == 0) { - pipe_texture_reference(&surf->texture, NULL); - FREE(surf); - } - *s = NULL; + pipe_texture_reference(&surf->texture, NULL); + FREE(surf); } @@ -292,7 +278,6 @@ softpipe_get_tex_transfer(struct pipe_screen *screen, spt = CALLOC_STRUCT(softpipe_transfer); if (spt) { struct pipe_transfer *pt = &spt->base; - pt->refcount = 1; pipe_texture_reference(&pt->texture, texture); pt->format = texture->format; pt->block = texture->block; @@ -327,20 +312,15 @@ softpipe_get_tex_transfer(struct pipe_screen *screen, static void -softpipe_tex_transfer_release(struct pipe_screen *screen, - struct pipe_transfer **t) +softpipe_tex_transfer_destroy(struct pipe_transfer *transfer) { - struct softpipe_transfer *transfer = softpipe_transfer(*t); /* Effectively do the texture_update work here - if texture images * needed post-processing to put them into hardware layout, this is * where it would happen. For softpipe, nothing to do. */ - assert (transfer->base.texture); - if (--transfer->base.refcount == 0) { - pipe_texture_reference(&transfer->base.texture, NULL); - FREE(transfer); - } - *t = NULL; + assert (transfer->texture); + pipe_texture_reference(&transfer->texture, NULL); + FREE(transfer); } @@ -408,13 +388,13 @@ softpipe_init_screen_texture_funcs(struct pipe_screen *screen) { screen->texture_create = softpipe_texture_create; screen->texture_blanket = softpipe_texture_blanket; - screen->texture_release = softpipe_texture_release; + screen->texture_destroy = softpipe_texture_destroy; screen->get_tex_surface = softpipe_get_tex_surface; - screen->tex_surface_release = softpipe_tex_surface_release; + screen->tex_surface_destroy = softpipe_tex_surface_destroy; screen->get_tex_transfer = softpipe_get_tex_transfer; - screen->tex_transfer_release = softpipe_tex_transfer_release; + screen->tex_transfer_destroy = softpipe_tex_transfer_destroy; screen->transfer_map = softpipe_transfer_map; screen->transfer_unmap = softpipe_transfer_unmap; } diff --git a/src/gallium/drivers/softpipe/sp_tile_cache.c b/src/gallium/drivers/softpipe/sp_tile_cache.c index 593360aab0..51e34d0d62 100644 --- a/src/gallium/drivers/softpipe/sp_tile_cache.c +++ b/src/gallium/drivers/softpipe/sp_tile_cache.c @@ -140,11 +140,11 @@ sp_destroy_tile_cache(struct softpipe_tile_cache *tc) } if (tc->transfer) { screen = tc->transfer->texture->screen; - screen->tex_transfer_release(screen, &tc->transfer); + screen->tex_transfer_destroy(tc->transfer); } if (tc->tex_trans) { screen = tc->tex_trans->texture->screen; - screen->tex_transfer_release(screen, &tc->tex_trans); + screen->tex_transfer_destroy(tc->tex_trans); } FREE( tc ); @@ -167,11 +167,11 @@ sp_tile_cache_set_surface(struct softpipe_tile_cache *tc, return; if (tc->transfer_map) { - tc->screen->transfer_unmap(tc->screen, tc->transfer); + screen->transfer_unmap(screen, tc->transfer); tc->transfer_map = NULL; } - screen->tex_transfer_release(screen, &tc->transfer); + screen->tex_transfer_destroy(tc->transfer); } tc->surface = ps; @@ -249,11 +249,11 @@ sp_tile_cache_set_texture(struct pipe_context *pipe, struct pipe_screen *screen = tc->transfer->texture->screen; if (tc->tex_trans_map) { - tc->screen->transfer_unmap(tc->screen, tc->tex_trans); + screen->transfer_unmap(screen, tc->tex_trans); tc->tex_trans_map = NULL; } - screen->tex_transfer_release(screen, &tc->tex_trans); + screen->tex_transfer_destroy(tc->tex_trans); } /* mark as entries as invalid/empty */ @@ -559,7 +559,7 @@ sp_get_cached_tile_tex(struct softpipe_context *sp, if (tc->tex_trans_map) tc->screen->transfer_unmap(tc->screen, tc->tex_trans); - screen->tex_transfer_release(screen, &tc->tex_trans); + screen->tex_transfer_destroy(tc->tex_trans); } tc->tex_trans = screen->get_tex_transfer(screen, tc->texture, face, level, z, diff --git a/src/gallium/drivers/trace/tr_screen.c b/src/gallium/drivers/trace/tr_screen.c index 164c6bbc4d..1d868eff6b 100644 --- a/src/gallium/drivers/trace/tr_screen.c +++ b/src/gallium/drivers/trace/tr_screen.c @@ -207,37 +207,18 @@ trace_screen_texture_blanket(struct pipe_screen *_screen, static void -trace_screen_texture_release(struct pipe_screen *_screen, - struct pipe_texture **ptexture) +trace_screen_texture_destroy(struct pipe_texture *texture) { - struct trace_screen *tr_scr = trace_screen(_screen); - struct pipe_screen *screen = tr_scr->screen; - struct trace_texture *tr_tex; - struct pipe_texture *texture; - - assert(ptexture); - if(*ptexture) { - tr_tex = trace_texture(tr_scr, *ptexture); - texture = tr_tex->texture; - assert(texture->screen == screen); - } - else - texture = NULL; - - if (*ptexture) { - if (!--(*ptexture)->refcount) { - trace_dump_call_begin("pipe_screen", "texture_destroy"); - - trace_dump_arg(ptr, screen); - trace_dump_arg(ptr, texture); - - trace_texture_destroy(tr_scr, *ptexture); - - trace_dump_call_end(); - } + struct pipe_screen *screen = texture->screen; - *ptexture = NULL; - } + trace_dump_call_begin("pipe_screen", "texture_destroy"); + + trace_dump_arg(ptr, screen); + trace_dump_arg(ptr, texture); + + trace_texture_destroy(trace_screen(screen), texture); + + trace_dump_call_end(); } @@ -280,38 +261,19 @@ trace_screen_get_tex_surface(struct pipe_screen *_screen, static void -trace_screen_tex_surface_release(struct pipe_screen *_screen, - struct pipe_surface **psurface) +trace_screen_tex_surface_destroy(struct pipe_surface *surface) { - struct trace_screen *tr_scr = trace_screen(_screen); - struct pipe_screen *screen = tr_scr->screen; - struct trace_texture *tr_tex; - struct trace_surface *tr_surf; - struct pipe_surface *surface; - - assert(psurface); - if(*psurface) { - tr_tex = trace_texture(tr_scr, (*psurface)->texture); - tr_surf = trace_surface(tr_tex, *psurface); - surface = tr_surf->surface; - } - else - surface = NULL; + struct pipe_screen *screen = surface->texture->screen; - if (*psurface) { - if (!--(*psurface)->refcount) { - trace_dump_call_begin("pipe_screen", "tex_surface_destroy"); - - trace_dump_arg(ptr, screen); - trace_dump_arg(ptr, surface); + trace_dump_call_begin("pipe_screen", "tex_surface_destroy"); - trace_surface_destroy(tr_tex, *psurface); + trace_dump_arg(ptr, screen); + trace_dump_arg(ptr, surface); - trace_dump_call_end(); - } - - *psurface = NULL; - } + trace_surface_destroy(trace_texture(trace_screen(screen), surface->texture), + surface); + + trace_dump_call_end(); } @@ -356,38 +318,20 @@ trace_screen_get_tex_transfer(struct pipe_screen *_screen, static void -trace_screen_tex_transfer_release(struct pipe_screen *_screen, - struct pipe_transfer **ptransfer) +trace_screen_tex_transfer_destroy(struct pipe_transfer *transfer) { - struct trace_screen *tr_scr = trace_screen(_screen); - struct pipe_screen *screen = tr_scr->screen; - struct trace_texture *tr_tex; - struct trace_transfer *tr_trans; - struct pipe_transfer *transfer; - - assert(ptransfer); - if(*ptransfer) { - tr_tex = trace_texture(tr_scr, (*ptransfer)->texture); - tr_trans = trace_transfer(tr_tex, *ptransfer); - transfer = tr_trans->transfer; - } - else - transfer = NULL; - - if (*ptransfer) { - if (!--(*ptransfer)->refcount) { - trace_dump_call_begin("pipe_screen", "tex_transfer_destroy"); - - trace_dump_arg(ptr, screen); - trace_dump_arg(ptr, transfer); + struct pipe_texture *texture = transfer->texture; + struct pipe_screen *screen = texture->screen; - trace_transfer_destroy(tr_tex, *ptransfer); + trace_dump_call_begin("pipe_screen", "tex_transfer_destroy"); - trace_dump_call_end(); - } - - *ptransfer = NULL; - } + trace_dump_arg(ptr, screen); + trace_dump_arg(ptr, transfer); + + trace_transfer_destroy(trace_texture(trace_screen(screen), texture), + transfer); + + trace_dump_call_end(); } @@ -509,11 +453,11 @@ trace_screen_create(struct pipe_screen *screen) tr_scr->base.is_format_supported = trace_screen_is_format_supported; tr_scr->base.texture_create = trace_screen_texture_create; tr_scr->base.texture_blanket = trace_screen_texture_blanket; - tr_scr->base.texture_release = trace_screen_texture_release; + tr_scr->base.texture_destroy = trace_screen_texture_destroy; tr_scr->base.get_tex_surface = trace_screen_get_tex_surface; - tr_scr->base.tex_surface_release = trace_screen_tex_surface_release; + tr_scr->base.tex_surface_destroy = trace_screen_tex_surface_destroy; tr_scr->base.get_tex_transfer = trace_screen_get_tex_transfer; - tr_scr->base.tex_transfer_release = trace_screen_tex_transfer_release; + tr_scr->base.tex_transfer_destroy = trace_screen_tex_transfer_destroy; tr_scr->base.transfer_map = trace_screen_transfer_map; tr_scr->base.transfer_unmap = trace_screen_transfer_unmap; diff --git a/src/gallium/drivers/trace/tr_state.c b/src/gallium/drivers/trace/tr_state.c index 81a9e2376e..0f175cd31c 100644 --- a/src/gallium/drivers/trace/tr_state.c +++ b/src/gallium/drivers/trace/tr_state.c @@ -50,6 +50,14 @@ void trace_dump_block(const struct pipe_format_block *block) } +static void trace_dump_reference(const struct pipe_reference *reference) +{ + trace_dump_struct_begin("pipe_reference"); + trace_dump_member(uint, reference, count); + trace_dump_struct_end(); +} + + void trace_dump_template(const struct pipe_texture *templat) { if(!templat) { @@ -397,6 +405,8 @@ void trace_dump_surface(const struct pipe_surface *state) trace_dump_struct_begin("pipe_surface"); + trace_dump_reference(&state->reference); + trace_dump_member(format, state, format); trace_dump_member(uint, state, status); trace_dump_member(uint, state, clear_value); @@ -405,7 +415,6 @@ void trace_dump_surface(const struct pipe_surface *state) trace_dump_member(uint, state, layout); trace_dump_member(uint, state, offset); - trace_dump_member(uint, state, refcount); trace_dump_member(uint, state, usage); trace_dump_member(ptr, state, texture); @@ -437,7 +446,6 @@ void trace_dump_transfer(const struct pipe_transfer *state) trace_dump_member(uint, state, nblocksx); trace_dump_member(uint, state, nblocksy); trace_dump_member(uint, state, stride); - trace_dump_member(uint, state, refcount); trace_dump_member(uint, state, usage); trace_dump_member(ptr, state, texture); diff --git a/src/gallium/drivers/trace/tr_texture.c b/src/gallium/drivers/trace/tr_texture.c index 120ba0dd31..dc45d3dcc1 100644 --- a/src/gallium/drivers/trace/tr_texture.c +++ b/src/gallium/drivers/trace/tr_texture.c @@ -134,7 +134,7 @@ trace_transfer_create(struct trace_texture *tr_tex, return &tr_trans->base; error: - pipe_transfer_reference(&transfer, NULL); + transfer->texture->screen->tex_transfer_destroy(transfer); return NULL; } @@ -145,7 +145,7 @@ trace_transfer_destroy(struct trace_texture *tr_tex, { struct trace_transfer *tr_trans = trace_transfer(tr_tex, transfer); pipe_texture_reference(&tr_trans->base.texture, NULL); - pipe_transfer_reference(&tr_trans->transfer, NULL); + transfer->texture->screen->tex_transfer_destroy(tr_trans->transfer); FREE(tr_trans); } diff --git a/src/gallium/drivers/trace/tr_winsys.c b/src/gallium/drivers/trace/tr_winsys.c index c4148fe810..86420bbf22 100644 --- a/src/gallium/drivers/trace/tr_winsys.c +++ b/src/gallium/drivers/trace/tr_winsys.c @@ -295,18 +295,16 @@ trace_winsys_buffer_unmap(struct pipe_winsys *_winsys, static void -trace_winsys_buffer_destroy(struct pipe_winsys *_winsys, - struct pipe_buffer *buffer) +trace_winsys_buffer_destroy(struct pipe_buffer *buffer) { - struct trace_winsys *tr_ws = trace_winsys(_winsys); - struct pipe_winsys *winsys = tr_ws->winsys; + struct pipe_winsys *winsys = buffer->screen->winsys; trace_dump_call_begin("pipe_winsys", "buffer_destroy"); trace_dump_arg(ptr, winsys); trace_dump_arg(ptr, buffer); - winsys->buffer_destroy(winsys, buffer); + winsys->buffer_destroy(buffer); trace_dump_call_end(); } diff --git a/src/gallium/include/pipe/internal/p_winsys_screen.h b/src/gallium/include/pipe/internal/p_winsys_screen.h index 8d3bab0caa..f4a29e63c7 100644 --- a/src/gallium/include/pipe/internal/p_winsys_screen.h +++ b/src/gallium/include/pipe/internal/p_winsys_screen.h @@ -154,8 +154,7 @@ struct pipe_winsys void (*buffer_unmap)( struct pipe_winsys *ws, struct pipe_buffer *buf ); - void (*buffer_destroy)( struct pipe_winsys *ws, - struct pipe_buffer *buf ); + void (*buffer_destroy)( struct pipe_buffer *buf ); /** Set ptr = fence, with reference counting */ diff --git a/src/gallium/include/pipe/p_inlines.h b/src/gallium/include/pipe/p_inlines.h index 4eb928d882..a68b521429 100644 --- a/src/gallium/include/pipe/p_inlines.h +++ b/src/gallium/include/pipe/p_inlines.h @@ -38,97 +38,6 @@ extern "C" { #endif -/** - * Set 'ptr' to point to 'surf' and update reference counting. - * The old thing pointed to, if any, will be unreferenced first. - * 'surf' may be NULL. - */ -static INLINE void -pipe_surface_reference(struct pipe_surface **ptr, struct pipe_surface *surf) -{ - /* bump the refcount first */ - if (surf) { - assert(surf->refcount); - surf->refcount++; - } - - if (*ptr) { - struct pipe_screen *screen; - assert((*ptr)->refcount); - assert((*ptr)->texture); - screen = (*ptr)->texture->screen; - screen->tex_surface_release( screen, ptr ); - assert(!*ptr); - } - - *ptr = surf; -} - - -/** - * \sa pipe_surface_reference - */ -static INLINE void -pipe_transfer_reference(struct pipe_transfer **ptr, struct pipe_transfer *trans) -{ - /* bump the refcount first */ - if (trans) { - assert(trans->refcount); - trans->refcount++; - } - - if (*ptr) { - struct pipe_screen *screen; - assert((*ptr)->refcount); - assert((*ptr)->texture); - screen = (*ptr)->texture->screen; - screen->tex_transfer_release( screen, ptr ); - assert(!*ptr); - } - - *ptr = trans; -} - - -/** - * \sa pipe_surface_reference - */ -static INLINE void -pipe_texture_reference(struct pipe_texture **ptr, - struct pipe_texture *pt) -{ - assert(ptr); - - if (pt) { - assert(pt->refcount); - pt->refcount++; - } - - if (*ptr) { - struct pipe_screen *screen = (*ptr)->screen; - assert(screen); - assert((*ptr)->refcount); - screen->texture_release(screen, ptr); - - assert(!*ptr); - } - - *ptr = pt; -} - - -static INLINE void -pipe_texture_release(struct pipe_texture **ptr) -{ - struct pipe_screen *screen; - assert(ptr); - screen = (*ptr)->screen; - assert((*ptr)->refcount); - screen->texture_release(screen, ptr); - *ptr = NULL; -} - - /** * Convenience wrappers for screen buffer functions. */ @@ -199,28 +108,6 @@ pipe_buffer_read(struct pipe_screen *screen, } } -/* XXX: thread safety issues! - */ -static INLINE void -pipe_buffer_reference(struct pipe_screen *screen, - struct pipe_buffer **ptr, - struct pipe_buffer *buf) -{ - if (buf) { - assert(buf->refcount); - buf->refcount++; - } - - if (*ptr) { - assert((*ptr)->refcount); - if(--(*ptr)->refcount == 0) { - screen->buffer_destroy( screen, *ptr ); - } - } - - *ptr = buf; -} - #ifdef __cplusplus } diff --git a/src/gallium/include/pipe/p_refcnt.h b/src/gallium/include/pipe/p_refcnt.h new file mode 100644 index 0000000000..50b7aa90ef --- /dev/null +++ b/src/gallium/include/pipe/p_refcnt.h @@ -0,0 +1,84 @@ +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef P_REFCNT_H +#define P_REFCNT_H + + +#include "p_defines.h" + + +#ifdef __cplusplus +extern "C" { +#endif + + +struct pipe_reference +{ + unsigned count; +}; + + +static INLINE void +pipe_reference_init(struct pipe_reference *reference, unsigned count) +{ + reference->count = count; +} + + +/** + * Set 'ptr' to point to 'reference' and update reference counting. + * The old thing pointed to, if any, will be unreferenced first. + * 'reference' may be NULL. + * + * XXX: thread safety issues! + */ +static INLINE bool +pipe_reference(struct pipe_reference **ptr, struct pipe_reference *reference) +{ + bool destroy = FALSE; + + /* bump the reference.count first */ + if (reference) { + assert(reference->count); + reference->count++; + } + + if (*ptr) { + assert((*ptr)->count); + if (--(*ptr)->count == 0) { + destroy = TRUE; + } + } + + *ptr = reference; + + return destroy; +} + + +#endif /* P_REFCNT_H */ diff --git a/src/gallium/include/pipe/p_screen.h b/src/gallium/include/pipe/p_screen.h index 341d1caea0..3688d58118 100644 --- a/src/gallium/include/pipe/p_screen.h +++ b/src/gallium/include/pipe/p_screen.h @@ -113,8 +113,7 @@ struct pipe_screen { const unsigned *stride, struct pipe_buffer *buffer); - void (*texture_release)(struct pipe_screen *, - struct pipe_texture **pt); + void (*texture_destroy)(struct pipe_texture *pt); /** Get a surface which is a "view" into a texture */ struct pipe_surface *(*get_tex_surface)(struct pipe_screen *, @@ -123,10 +122,7 @@ struct pipe_screen { unsigned zslice, unsigned usage ); - /* Surfaces allocated by the above must be released here: - */ - void (*tex_surface_release)( struct pipe_screen *, - struct pipe_surface ** ); + void (*tex_surface_destroy)(struct pipe_surface *); /** Get a transfer object for transferring data to/from a texture */ @@ -138,10 +134,7 @@ struct pipe_screen { unsigned x, unsigned y, unsigned w, unsigned h); - /* Transfer objects allocated by the above must be released here: - */ - void (*tex_transfer_release)( struct pipe_screen *, - struct pipe_transfer ** ); + void (*tex_transfer_destroy)(struct pipe_transfer *); void *(*transfer_map)( struct pipe_screen *, struct pipe_transfer *transfer ); @@ -213,8 +206,7 @@ struct pipe_screen { void (*buffer_unmap)( struct pipe_screen *screen, struct pipe_buffer *buf ); - void (*buffer_destroy)( struct pipe_screen *screen, - struct pipe_buffer *buf ); + void (*buffer_destroy)( struct pipe_buffer *buf ); /** diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h index a2e839da5c..57a7672d6c 100644 --- a/src/gallium/include/pipe/p_state.h +++ b/src/gallium/include/pipe/p_state.h @@ -43,6 +43,8 @@ #include "p_compiler.h" #include "p_defines.h" #include "p_format.h" +#include "p_refcnt.h" +#include "p_screen.h" #ifdef __cplusplus @@ -64,23 +66,20 @@ extern "C" { /* fwd decls */ -struct pipe_screen; struct pipe_surface; - /** * The driver will certainly subclass this to include actual memory * management information. */ struct pipe_buffer { + struct pipe_reference reference; + struct pipe_screen *screen; unsigned alignment; unsigned usage; unsigned size; - - /** Reference count */ - unsigned refcount; }; @@ -275,6 +274,7 @@ struct pipe_sampler_state */ struct pipe_surface { + struct pipe_reference reference; enum pipe_format format; /**< PIPE_FORMAT_x */ unsigned status; /**< PIPE_SURFACE_STATUS_x */ unsigned clear_value; /**< XXX may be temporary */ @@ -282,7 +282,6 @@ struct pipe_surface unsigned height; /**< logical height in pixels */ unsigned layout; /**< PIPE_SURFACE_LAYOUT_x */ unsigned offset; /**< offset from start of buffer, in bytes */ - unsigned refcount; unsigned usage; /**< PIPE_BUFFER_USAGE_* */ struct pipe_texture *texture; /**< texture into which this is a view */ @@ -306,7 +305,6 @@ struct pipe_transfer unsigned nblocksx; /**< allocated width in blocks */ unsigned nblocksy; /**< allocated height in blocks */ unsigned stride; /**< stride in bytes between rows of blocks */ - unsigned refcount; unsigned usage; /**< PIPE_TRANSFER_* */ struct pipe_texture *texture; /**< texture to transfer to/from */ @@ -321,6 +319,8 @@ struct pipe_transfer */ struct pipe_texture { + struct pipe_reference reference; + enum pipe_texture_target target; /**< PIPE_TEXTURE_x */ enum pipe_format format; /**< PIPE_FORMAT_x */ @@ -339,10 +339,6 @@ struct pipe_texture unsigned tex_usage; /* PIPE_TEXTURE_USAGE_* */ - /* These are also refcounted: - */ - unsigned refcount; - struct pipe_screen *screen; /**< screen that this texture belongs to */ }; @@ -379,6 +375,35 @@ struct pipe_vertex_element }; +/* Reference counting helper functions */ +static INLINE void +pipe_buffer_reference(struct pipe_buffer **ptr, struct pipe_buffer *buf) +{ + struct pipe_buffer *old_buf = *ptr; + + if (pipe_reference((struct pipe_reference **)ptr, &buf->reference)) + old_buf->screen->buffer_destroy(old_buf); +} + +static INLINE void +pipe_surface_reference(struct pipe_surface **ptr, struct pipe_surface *surf) +{ + struct pipe_surface *old_surf = *ptr; + + if (pipe_reference((struct pipe_reference **)ptr, &surf->reference)) + old_surf->texture->screen->tex_surface_destroy(old_surf); +} + +static INLINE void +pipe_texture_reference(struct pipe_texture **ptr, struct pipe_texture *tex) +{ + struct pipe_texture *old_tex = *ptr; + + if (pipe_reference((struct pipe_reference **)ptr, &tex->reference)) + old_tex->screen->texture_destroy(old_tex); +} + + #ifdef __cplusplus } #endif diff --git a/src/gallium/state_trackers/dri2/dri_drawable.c b/src/gallium/state_trackers/dri2/dri_drawable.c index 2f6913ec5c..aa86411190 100644 --- a/src/gallium/state_trackers/dri2/dri_drawable.c +++ b/src/gallium/state_trackers/dri2/dri_drawable.c @@ -86,7 +86,7 @@ dri_surface_from_handle(struct pipe_screen *screen, buf); /* we don't need the buffer from this point on */ - pipe_buffer_reference(screen, &buf, NULL); + pipe_buffer_reference(&buf, NULL); if (!texture) return NULL; diff --git a/src/gallium/state_trackers/egl/egl_surface.c b/src/gallium/state_trackers/egl/egl_surface.c index 7ebc34871c..b8d5f4217f 100644 --- a/src/gallium/state_trackers/egl/egl_surface.c +++ b/src/gallium/state_trackers/egl/egl_surface.c @@ -143,7 +143,7 @@ err_handle: err_surf: pipe_texture_reference(&texture, NULL); err_tex: - pipe_buffer_reference(screen, &buf, NULL); + pipe_buffer_reference(&buf, NULL); err_buf: return; } @@ -173,7 +173,7 @@ drm_takedown_shown_screen(_EGLDriver *drv, struct drm_screen *screen) pipe_surface_reference(&screen->surface, NULL); pipe_texture_reference(&screen->tex, NULL); - pipe_buffer_reference(dev->screen, &screen->buffer, NULL); + pipe_buffer_reference(&screen->buffer, NULL); screen->shown = 0; } @@ -348,7 +348,7 @@ err_fb: err_bo: pipe_surface_reference(&scrn->surface, NULL); pipe_texture_reference(&scrn->tex, NULL); - pipe_buffer_reference(dev->screen, &scrn->buffer, NULL); + pipe_buffer_reference(&scrn->buffer, NULL); return EGL_FALSE; } diff --git a/src/gallium/state_trackers/g3dvl/vl_basic_csc.c b/src/gallium/state_trackers/g3dvl/vl_basic_csc.c index 187a13a560..38cfd5d7f1 100644 --- a/src/gallium/state_trackers/g3dvl/vl_basic_csc.c +++ b/src/gallium/state_trackers/g3dvl/vl_basic_csc.c @@ -237,10 +237,10 @@ static int vlDestroy pipe->delete_fs_state(pipe, basic_csc->fragment_shader); for (i = 0; i < 2; ++i) - pipe_buffer_reference(pipe->screen, &basic_csc->vertex_bufs[i].buffer, NULL); + pipe_buffer_reference(&basic_csc->vertex_bufs[i].buffer, NULL); - pipe_buffer_reference(pipe->screen, &basic_csc->vs_const_buf.buffer, NULL); - pipe_buffer_reference(pipe->screen, &basic_csc->fs_const_buf.buffer, NULL); + pipe_buffer_reference(&basic_csc->vs_const_buf.buffer, NULL); + pipe_buffer_reference(&basic_csc->fs_const_buf.buffer, NULL); FREE(basic_csc); diff --git a/src/gallium/state_trackers/g3dvl/vl_r16snorm_mc_buf.c b/src/gallium/state_trackers/g3dvl/vl_r16snorm_mc_buf.c index 7cd753f736..eb8270ecad 100644 --- a/src/gallium/state_trackers/g3dvl/vl_r16snorm_mc_buf.c +++ b/src/gallium/state_trackers/g3dvl/vl_r16snorm_mc_buf.c @@ -636,7 +636,7 @@ static int vlFlush for (i = 0; i < 3; ++i) { pipe->screen->transfer_unmap(pipe->screen, mc->tex_transfer[i]); - pipe->screen->tex_transfer_release(pipe->screen, &mc->tex_transfer[i]); + pipe->screen->tex_transfer_destroy(mc->tex_transfer[i]); } mc->render_target.cbufs[0] = pipe->screen->get_tex_surface @@ -856,7 +856,7 @@ static int vlDestroy pipe->delete_sampler_state(pipe, mc->samplers.all[i]); for (i = 0; i < 3; ++i) - pipe_buffer_reference(pipe->screen, &mc->vertex_bufs.all[i].buffer, NULL); + pipe_buffer_reference(&mc->vertex_bufs.all[i].buffer, NULL); /* Textures 3 & 4 are not created directly, no need to release them here */ for (i = 0; i < 3; ++i) @@ -873,8 +873,8 @@ static int vlDestroy pipe->delete_fs_state(pipe, mc->b_fs[i]); } - pipe_buffer_reference(pipe->screen, &mc->vs_const_buf.buffer, NULL); - pipe_buffer_reference(pipe->screen, &mc->fs_const_buf.buffer, NULL); + pipe_buffer_reference(&mc->vs_const_buf.buffer, NULL); + pipe_buffer_reference(&mc->fs_const_buf.buffer, NULL); FREE(mc->macroblocks); FREE(mc); diff --git a/src/gallium/state_trackers/python/st_device.c b/src/gallium/state_trackers/python/st_device.c index 20dd8d269d..a2cd25067d 100644 --- a/src/gallium/state_trackers/python/st_device.c +++ b/src/gallium/state_trackers/python/st_device.c @@ -51,11 +51,20 @@ st_device_really_destroy(struct st_device *st_dev) } +static void +st_device_reference(struct st_device **ptr, struct st_device *st_dev) +{ + struct st_device *old_dev = *ptr; + + if (pipe_reference((struct pipe_reference **)ptr, &st_dev->reference)) + st_device_really_destroy(old_dev); +} + + void st_device_destroy(struct st_device *st_dev) { - if(!--st_dev->refcount) - st_device_really_destroy(st_dev); + st_device_reference(&st_dev, NULL); } @@ -72,7 +81,7 @@ st_device_create_from_st_winsys(const struct st_winsys *st_ws) if(!st_dev) return NULL; - st_dev->refcount = 1; + pipe_reference_init(&st_dev->reference, 1); st_dev->st_ws = st_ws; st_dev->real_screen = st_ws->screen_create(); @@ -124,8 +133,7 @@ st_context_destroy(struct st_context *st_ctx) FREE(st_ctx); - if(!--st_dev->refcount) - st_device_really_destroy(st_dev); + st_device_reference(&st_dev, NULL); } } @@ -139,8 +147,7 @@ st_context_create(struct st_device *st_dev) if(!st_ctx) return NULL; - st_ctx->st_dev = st_dev; - ++st_dev->refcount; + st_device_reference(&st_ctx->st_dev, st_dev); st_ctx->real_pipe = st_dev->st_ws->context_create(st_dev->real_screen); if(!st_ctx->real_pipe) { @@ -292,8 +299,7 @@ void st_buffer_destroy(struct st_buffer *st_buf) { if(st_buf) { - struct pipe_screen *screen = st_buf->st_dev->screen; - pipe_buffer_reference(screen, &st_buf->buffer, NULL); + pipe_buffer_reference(&st_buf->buffer, NULL); FREE(st_buf); } } diff --git a/src/gallium/state_trackers/python/st_device.h b/src/gallium/state_trackers/python/st_device.h index 7cfe6de9f6..0641aff149 100644 --- a/src/gallium/state_trackers/python/st_device.h +++ b/src/gallium/state_trackers/python/st_device.h @@ -68,13 +68,13 @@ struct st_context { struct st_device { + /* FIXME: we also need to refcount for textures and surfaces... */ + struct pipe_reference reference; + const struct st_winsys *st_ws; struct pipe_screen *real_screen; struct pipe_screen *screen; - - /* FIXME: we also need to refcount for textures and surfaces... */ - unsigned refcount; }; diff --git a/src/gallium/state_trackers/python/st_softpipe_winsys.c b/src/gallium/state_trackers/python/st_softpipe_winsys.c index 4d798df99b..426f347d18 100644 --- a/src/gallium/state_trackers/python/st_softpipe_winsys.c +++ b/src/gallium/state_trackers/python/st_softpipe_winsys.c @@ -124,7 +124,7 @@ st_softpipe_buffer_create(struct pipe_winsys *winsys, { struct st_softpipe_buffer *buffer = CALLOC_STRUCT(st_softpipe_buffer); - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.alignment = alignment; buffer->base.usage = usage; buffer->base.size = size; @@ -149,7 +149,7 @@ st_softpipe_user_buffer_create(struct pipe_winsys *winsys, if(!buffer) return NULL; - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.size = bytes; buffer->userBuffer = TRUE; buffer->data = ptr; diff --git a/src/gallium/state_trackers/xorg/xorg_crtc.c b/src/gallium/state_trackers/xorg/xorg_crtc.c index 0bd69c214f..7304113a65 100644 --- a/src/gallium/state_trackers/xorg/xorg_crtc.c +++ b/src/gallium/state_trackers/xorg/xorg_crtc.c @@ -175,7 +175,7 @@ crtc_destroy(xf86CrtcPtr crtc) struct crtc_private *crtcp = crtc->driver_private; if (crtcp->cursor_buf) - pipe_buffer_reference(ms->screen, &crtcp->cursor_buf, NULL); + pipe_buffer_reference(&crtcp->cursor_buf, NULL); drmModeFreeCrtc(crtcp->drm_crtc); xfree(crtcp); @@ -266,7 +266,7 @@ cursor_destroy(xf86CrtcPtr crtc) struct crtc_private *crtcp = crtc->driver_private; if (crtcp->cursor_buf) { - pipe_buffer_reference(ms->screen, &crtcp->cursor_buf, NULL); + pipe_buffer_reference(&crtcp->cursor_buf, NULL); } } diff --git a/src/gallium/state_trackers/xorg/xorg_dri2.c b/src/gallium/state_trackers/xorg/xorg_dri2.c index d48b7dd27b..b9993b1ea1 100644 --- a/src/gallium/state_trackers/xorg/xorg_dri2.c +++ b/src/gallium/state_trackers/xorg/xorg_dri2.c @@ -147,7 +147,7 @@ driDestroyBuffers(DrawablePtr pDraw, DRI2BufferPtr buffers, int count) (*pScreen->DestroyPixmap)(private->pPixmap); pipe_texture_reference(&private->tex, NULL); - pipe_buffer_reference(ms->screen, &private->buf, NULL); + pipe_buffer_reference(&private->buf, NULL); } if (buffers) { diff --git a/src/gallium/state_trackers/xorg/xorg_exa.c b/src/gallium/state_trackers/xorg/xorg_exa.c index c62625c448..e53b46c3ad 100644 --- a/src/gallium/state_trackers/xorg/xorg_exa.c +++ b/src/gallium/state_trackers/xorg/xorg_exa.c @@ -147,7 +147,7 @@ ExaFinishAccess(PixmapPtr pPix, int index) return; exa->scrn->transfer_unmap(exa->scrn, priv->map_transfer); - pipe_transfer_reference(&priv->map_transfer, NULL); + exa->scrn->tex_transfer_destroy(priv->map_transfer); } @@ -163,7 +163,7 @@ ExaDone(PixmapPtr pPixmap) return; if (priv->src_surf) - exa->scrn->tex_surface_release(exa->scrn, &priv->src_surf); + exa->scrn->tex_surface_destroy(priv->src_surf); priv->src_surf = NULL; } @@ -219,7 +219,7 @@ ExaSolid(PixmapPtr pPixmap, int x0, int y0, int x1, int y1) exa->ctx->surface_fill(exa->ctx, surf, x0, y0, x1 - x0, y1 - y0, priv->color); - exa->scrn->tex_surface_release(exa->scrn, &surf); + exa->scrn->tex_surface_destroy(surf); } static Bool @@ -276,7 +276,7 @@ ExaCopy(PixmapPtr pDstPixmap, int srcX, int srcY, int dstX, int dstY, exa->ctx->surface_copy(exa->ctx, 0, surf, dstX, dstY, priv->src_surf, srcX, srcY, width, height); - exa->scrn->tex_surface_release(exa->scrn, &surf); + exa->scrn->tex_surface_destroy(surf); } static Bool @@ -336,7 +336,7 @@ ExaDestroyPixmap(ScreenPtr pScreen, void *dPriv) return; if (priv->tex) - ms->screen->texture_release(exa->scrn, &priv->tex); + ms->screen->texture_destroy(priv->tex); xfree(priv); } @@ -382,7 +382,7 @@ xorg_exa_get_pixmap_handle(PixmapPtr pPixmap) drm_api_hooks.buffer_from_texture(priv->tex, &buffer, &stride); drm_api_hooks.handle_from_buffer(ms->screen, buffer, &handle); - pipe_buffer_reference(ms->screen, &buffer, NULL); + pipe_buffer_reference(&buffer, NULL); return handle; } diff --git a/src/gallium/winsys/drm/intel/gem/intel_be_batchbuffer.c b/src/gallium/winsys/drm/intel/gem/intel_be_batchbuffer.c index 0137433785..d5e63c3bae 100644 --- a/src/gallium/winsys/drm/intel/gem/intel_be_batchbuffer.c +++ b/src/gallium/winsys/drm/intel/gem/intel_be_batchbuffer.c @@ -114,10 +114,10 @@ intel_be_batchbuffer_flush(struct intel_be_batchbuffer *batch, if (fence) { if (*fence) - intel_be_fence_unreference(*fence); + intel_be_fence_reference(fence, NULL); (*fence) = CALLOC_STRUCT(intel_be_fence); - (*fence)->refcount = 1; + pipe_reference_init(&(*fence)->reference, 1); (*fence)->bo = NULL; } } diff --git a/src/gallium/winsys/drm/intel/gem/intel_be_device.c b/src/gallium/winsys/drm/intel/gem/intel_be_device.c index 2e191a6d12..de13fb39c7 100644 --- a/src/gallium/winsys/drm/intel/gem/intel_be_device.c +++ b/src/gallium/winsys/drm/intel/gem/intel_be_device.c @@ -51,8 +51,7 @@ intel_be_buffer_unmap(struct pipe_winsys *winsys, } static void -intel_be_buffer_destroy(struct pipe_winsys *winsys, - struct pipe_buffer *buf) +intel_be_buffer_destroy(struct pipe_buffer *buf) { drm_intel_bo_unreference(intel_bo(buf)); free(buf); @@ -72,7 +71,7 @@ intel_be_buffer_create(struct pipe_winsys *winsys, if (!buffer) return NULL; - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.alignment = alignment; buffer->base.usage = usage; buffer->base.size = size; @@ -115,7 +114,7 @@ intel_be_user_buffer_create(struct pipe_winsys *winsys, void *ptr, unsigned byte if (!buffer) return NULL; - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.alignment = 0; buffer->base.usage = 0; buffer->base.size = bytes; @@ -155,7 +154,7 @@ intel_be_buffer_from_handle(struct pipe_screen *screen, if (!buffer->bo) goto err; - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.alignment = buffer->bo->align; buffer->base.usage = PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE | @@ -215,15 +214,7 @@ intel_be_fence_refunref(struct pipe_winsys *sws, struct intel_be_fence **p = (struct intel_be_fence **)ptr; struct intel_be_fence *f = (struct intel_be_fence *)fence; - assert(p); - - if (f) - intel_be_fence_reference(f); - - if (*p) - intel_be_fence_unreference(*p); - - *p = f; + intel_be_fence_reference(p, f); } static int diff --git a/src/gallium/winsys/drm/intel/gem/intel_be_fence.h b/src/gallium/winsys/drm/intel/gem/intel_be_fence.h index 0fe18f66f8..a8abb01a9e 100644 --- a/src/gallium/winsys/drm/intel/gem/intel_be_fence.h +++ b/src/gallium/winsys/drm/intel/gem/intel_be_fence.h @@ -15,23 +15,19 @@ */ struct intel_be_fence { - uint32_t refcount; + struct pipe_reference reference; drm_intel_bo *bo; }; static INLINE void -intel_be_fence_reference(struct intel_be_fence *f) +intel_be_fence_reference(struct intel_be_fence **ptr, struct intel_be_fence *f) { - f->refcount++; -} + struct intel_be_fence *old_fence = *ptr; -static INLINE void -intel_be_fence_unreference(struct intel_be_fence *f) -{ - if (!--f->refcount) { - if (f->bo) - drm_intel_bo_unreference(f->bo); - free(f); + if (pipe_reference((struct pipe_reference**)ptr, &f->reference)) { + if (old_fence->bo) + drm_intel_bo_unreference(old_fence->bo); + free(old_fence); } } diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_context.c b/src/gallium/winsys/drm/nouveau/common/nouveau_context.c index d6ae0827cd..25c98456ac 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_context.c +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_context.c @@ -109,8 +109,7 @@ nouveau_context_init(struct nouveau_screen *nv_screen, nv_screen->nvc = nvc; } - nvc->refcount++; - nv->nvc = nvc; + pipe_reference((struct pipe_reference**)&nv->nvc, &nvc->reference); /* Find a free slot for a pipe context, allocate a new one if needed */ nv->pctx_id = -1; @@ -159,7 +158,7 @@ nouveau_context_init(struct nouveau_screen *nv_screen, enum pipe_format format; fb_buf = calloc(1, sizeof(struct nouveau_pipe_buffer)); - fb_buf->base.refcount = 1; + pipe_reference_init(&fb_buf->base.reference, 1); fb_buf->base.usage = PIPE_BUFFER_USAGE_PIXEL; nouveau_bo_fake(dev, nv_screen->front_offset, NOUVEAU_BO_VRAM, @@ -195,7 +194,7 @@ nouveau_context_cleanup(struct nouveau_context *nv) if (nv->pctx_id >= 0) { nvc->pctx[nv->pctx_id] = NULL; - if (--nvc->refcount <= 0) { + if (pipe_reference((struct pipe_reference**)&nv->nvc, NULL)) { nouveau_channel_context_destroy(nvc); nv->nv_screen->nvc = NULL; } diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_context.h b/src/gallium/winsys/drm/nouveau/common/nouveau_context.h index 02d2745680..ba8fc3ad2d 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_context.h +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_context.h @@ -13,8 +13,8 @@ #include "nouveau_local.h" struct nouveau_channel_context { + struct pipe_reference reference; struct pipe_screen *pscreen; - int refcount; unsigned cur_pctx; unsigned nr_pctx; diff --git a/src/gallium/winsys/drm/nouveau/common/nouveau_winsys_pipe.c b/src/gallium/winsys/drm/nouveau/common/nouveau_winsys_pipe.c index 54c7dd46b1..24bbd4516f 100644 --- a/src/gallium/winsys/drm/nouveau/common/nouveau_winsys_pipe.c +++ b/src/gallium/winsys/drm/nouveau/common/nouveau_winsys_pipe.c @@ -67,7 +67,7 @@ nouveau_pipe_bo_create(struct pipe_winsys *pws, unsigned alignment, nvbuf = CALLOC_STRUCT(nouveau_pipe_buffer); if (!nvbuf) return NULL; - nvbuf->base.refcount = 1; + pipe_reference_init(&nvbuf->base.reference, 1); nvbuf->base.alignment = alignment; nvbuf->base.usage = usage; nvbuf->base.size = size; @@ -92,7 +92,7 @@ nouveau_pipe_bo_user_create(struct pipe_winsys *pws, void *ptr, unsigned bytes) nvbuf = CALLOC_STRUCT(nouveau_pipe_buffer); if (!nvbuf) return NULL; - nvbuf->base.refcount = 1; + pipe_reference_init(&nvbuf->base.reference, 1); nvbuf->base.size = bytes; if (nouveau_bo_user(dev, ptr, bytes, &nvbuf->bo)) { @@ -104,7 +104,7 @@ nouveau_pipe_bo_user_create(struct pipe_winsys *pws, void *ptr, unsigned bytes) } static void -nouveau_pipe_bo_del(struct pipe_winsys *ws, struct pipe_buffer *buf) +nouveau_pipe_bo_del(struct pipe_buffer *buf) { struct nouveau_pipe_buffer *nvbuf = nouveau_pipe_buffer(buf); diff --git a/src/gallium/winsys/drm/radeon/radeon_buffer.c b/src/gallium/winsys/drm/radeon/radeon_buffer.c index 79b8f777ca..b3582e3314 100644 --- a/src/gallium/winsys/drm/radeon/radeon_buffer.c +++ b/src/gallium/winsys/drm/radeon/radeon_buffer.c @@ -63,7 +63,7 @@ static struct pipe_buffer *radeon_buffer_create(struct pipe_winsys *ws, return NULL; } - radeon_buffer->base.refcount = 1; + pipe_reference_init(&radeon_buffer->base.reference, 1); radeon_buffer->base.alignment = alignment; radeon_buffer->base.usage = usage; radeon_buffer->base.size = size; @@ -104,7 +104,7 @@ static struct pipe_buffer *radeon_buffer_user_create(struct pipe_winsys *ws, return &radeon_buffer->base; } -static void radeon_buffer_del(struct pipe_winsys *ws, struct pipe_buffer *buffer) +static void radeon_buffer_del(struct pipe_buffer *buffer) { struct radeon_pipe_buffer *radeon_buffer = (struct radeon_pipe_buffer*)buffer; @@ -207,7 +207,7 @@ static struct pipe_buffer *radeon_buffer_from_handle(struct radeon_screen *radeo radeon_bo_unref(bo); return NULL; } - radeon_buffer->base.refcount = 1; + pipe_reference_init(&radeon_buffer->base.reference, 1); radeon_buffer->base.usage = PIPE_BUFFER_USAGE_PIXEL; radeon_buffer->bo = bo; return &radeon_buffer->base; @@ -242,10 +242,10 @@ struct pipe_surface *radeon_surface_from_handle(struct radeon_context *radeon_co pt = pipe_screen->texture_blanket(pipe_screen, &tmpl, &pitch, pb); if (pt == NULL) { - pipe_buffer_reference(pipe_screen, &pb, NULL); + pipe_buffer_reference(&pb, NULL); } ps = pipe_screen->get_tex_surface(pipe_screen, pt, 0, 0, 0, PIPE_BUFFER_USAGE_GPU_WRITE); return ps; } -#endif \ No newline at end of file +#endif diff --git a/src/gallium/winsys/drm/radeon/radeon_drm.c b/src/gallium/winsys/drm/radeon/radeon_drm.c index 21f2a62e0f..016634c8fd 100644 --- a/src/gallium/winsys/drm/radeon/radeon_drm.c +++ b/src/gallium/winsys/drm/radeon/radeon_drm.c @@ -84,7 +84,8 @@ struct pipe_buffer* radeon_buffer_from_handle(struct pipe_screen* screen, return NULL; } - radeon_buffer->base.refcount = 1; + pipe_reference_init(&radeon_buffer->base.reference, 1); + radeon_buffer->base.screen = screen; radeon_buffer->base.usage = PIPE_BUFFER_USAGE_PIXEL; radeon_buffer->bo = bo; return &radeon_buffer->base; diff --git a/src/gallium/winsys/egl_xlib/sw_winsys.c b/src/gallium/winsys/egl_xlib/sw_winsys.c index 739bfa1c1a..aa1bfa8e88 100644 --- a/src/gallium/winsys/egl_xlib/sw_winsys.c +++ b/src/gallium/winsys/egl_xlib/sw_winsys.c @@ -99,7 +99,7 @@ buffer_create(struct pipe_winsys *pws, if (!buffer) return NULL; - buffer->Base.refcount = 1; + pipe_reference_init(&buffer->Base.reference, 1); buffer->Base.alignment = alignment; buffer->Base.usage = usage; buffer->Base.size = size; @@ -121,7 +121,7 @@ user_buffer_create(struct pipe_winsys *pws, void *ptr, unsigned bytes) if (!buffer) return NULL; - buffer->Base.refcount = 1; + pipe_reference_init(&buffer->Base.reference, 1); buffer->Base.size = bytes; buffer->UserBuffer = TRUE; buffer->Data = ptr; @@ -148,7 +148,7 @@ buffer_unmap(struct pipe_winsys *pws, struct pipe_buffer *buf) static void -buffer_destroy(struct pipe_winsys *pws, struct pipe_buffer *buf) +buffer_destroy(struct pipe_buffer *buf) { struct sw_pipe_buffer *buffer = sw_pipe_buffer(buf); diff --git a/src/gallium/winsys/g3dvl/xsp_winsys.c b/src/gallium/winsys/g3dvl/xsp_winsys.c index c4623e82f9..5b9fdb5c1f 100644 --- a/src/gallium/winsys/g3dvl/xsp_winsys.c +++ b/src/gallium/winsys/g3dvl/xsp_winsys.c @@ -39,7 +39,7 @@ static struct pipe_buffer* xsp_buffer_create(struct pipe_winsys *pws, unsigned a assert(pws); buffer = calloc(1, sizeof(struct xsp_buffer)); - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.alignment = alignment; buffer->base.usage = usage; buffer->base.size = size; @@ -55,7 +55,7 @@ static struct pipe_buffer* xsp_user_buffer_create(struct pipe_winsys *pws, void assert(pws); buffer = calloc(1, sizeof(struct xsp_buffer)); - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.size = size; buffer->is_user_buffer = TRUE; buffer->data = data; diff --git a/src/gallium/winsys/gdi/gdi_softpipe_winsys.c b/src/gallium/winsys/gdi/gdi_softpipe_winsys.c index 2d961f7087..440666d835 100644 --- a/src/gallium/winsys/gdi/gdi_softpipe_winsys.c +++ b/src/gallium/winsys/gdi/gdi_softpipe_winsys.c @@ -87,8 +87,7 @@ gdi_softpipe_buffer_unmap(struct pipe_winsys *winsys, static void -gdi_softpipe_buffer_destroy(struct pipe_winsys *winsys, - struct pipe_buffer *buf) +gdi_softpipe_buffer_destroy(struct pipe_buffer *buf) { struct gdi_softpipe_buffer *oldBuf = gdi_softpipe_buffer(buf); @@ -118,7 +117,7 @@ gdi_softpipe_buffer_create(struct pipe_winsys *winsys, { struct gdi_softpipe_buffer *buffer = CALLOC_STRUCT(gdi_softpipe_buffer); - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.alignment = alignment; buffer->base.usage = usage; buffer->base.size = size; @@ -143,7 +142,7 @@ gdi_softpipe_user_buffer_create(struct pipe_winsys *winsys, if(!buffer) return NULL; - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.size = bytes; buffer->userBuffer = TRUE; buffer->data = ptr; diff --git a/src/gallium/winsys/xlib/xlib_brw_screen.c b/src/gallium/winsys/xlib/xlib_brw_screen.c index 8e1bfab2f5..8329d3bbf7 100644 --- a/src/gallium/winsys/xlib/xlib_brw_screen.c +++ b/src/gallium/winsys/xlib/xlib_brw_screen.c @@ -57,10 +57,10 @@ buffer_from_surface(struct pipe_surface *surface) } struct aub_buffer { + struct pipe_reference reference; char *data; unsigned offset; unsigned size; - unsigned refcount; unsigned map_count; boolean dump_on_unmap; }; @@ -144,8 +144,7 @@ static void aub_buffer_unmap(struct pipe_winsys *winsys, static void -aub_buffer_destroy(struct pipe_winsys *winsys, - struct pipe_buffer *buf) +aub_buffer_destroy(struct pipe_buffer *buf) { free(buf); } @@ -189,7 +188,7 @@ aub_buffer_create(struct pipe_winsys *winsys, struct aub_pipe_winsys *iws = aub_pipe_winsys(winsys); struct aub_buffer *sbo = CALLOC_STRUCT(aub_buffer); - sbo->refcount = 1; + pipe_reference_init(&sbo->reference, 1); /* Could reuse buffers that are not referenced in current * batchbuffer. Can't do that atm, so always reallocate: diff --git a/src/gallium/winsys/xlib/xlib_cell.c b/src/gallium/winsys/xlib/xlib_cell.c index 40bcdfe42a..a5dbdf30f6 100644 --- a/src/gallium/winsys/xlib/xlib_cell.c +++ b/src/gallium/winsys/xlib/xlib_cell.c @@ -243,7 +243,7 @@ xm_buffer_create(struct pipe_winsys *pws, { struct xm_buffer *buffer = CALLOC_STRUCT(xm_buffer); - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.alignment = alignment; buffer->base.usage = usage; buffer->base.size = size; @@ -267,7 +267,7 @@ static struct pipe_buffer * xm_user_buffer_create(struct pipe_winsys *pws, void *ptr, unsigned bytes) { struct xm_buffer *buffer = CALLOC_STRUCT(xm_buffer); - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.size = bytes; buffer->userBuffer = TRUE; buffer->data = ptr; diff --git a/src/gallium/winsys/xlib/xlib_softpipe.c b/src/gallium/winsys/xlib/xlib_softpipe.c index 71f12b2b47..762ebd9847 100644 --- a/src/gallium/winsys/xlib/xlib_softpipe.c +++ b/src/gallium/winsys/xlib/xlib_softpipe.c @@ -207,8 +207,7 @@ xm_buffer_unmap(struct pipe_winsys *pws, struct pipe_buffer *buf) } static void -xm_buffer_destroy(struct pipe_winsys *pws, - struct pipe_buffer *buf) +xm_buffer_destroy(struct pipe_buffer *buf) { struct xm_buffer *oldBuf = xm_buffer(buf); @@ -338,7 +337,7 @@ xm_buffer_create(struct pipe_winsys *pws, } #endif - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.alignment = alignment; buffer->base.usage = usage; buffer->base.size = size; @@ -359,7 +358,7 @@ static struct pipe_buffer * xm_user_buffer_create(struct pipe_winsys *pws, void *ptr, unsigned bytes) { struct xm_buffer *buffer = CALLOC_STRUCT(xm_buffer); - buffer->base.refcount = 1; + pipe_reference_init(&buffer->base.reference, 1); buffer->base.size = bytes; buffer->userBuffer = TRUE; buffer->data = ptr; diff --git a/src/mesa/state_tracker/st_atom_constbuf.c b/src/mesa/state_tracker/st_atom_constbuf.c index 2df6fef210..fd81ac36d2 100644 --- a/src/mesa/state_tracker/st_atom_constbuf.c +++ b/src/mesa/state_tracker/st_atom_constbuf.c @@ -73,7 +73,7 @@ void st_upload_constants( struct st_context *st, /* We always need to get a new buffer, to keep the drivers simple and * avoid gratuitous rendering synchronization. */ - pipe_buffer_reference(pipe->screen, &cbuf->buffer, NULL ); + pipe_buffer_reference(&cbuf->buffer, NULL ); cbuf->buffer = pipe_buffer_create(pipe->screen, 16, PIPE_BUFFER_USAGE_CONSTANT, paramBytes ); diff --git a/src/mesa/state_tracker/st_atom_pixeltransfer.c b/src/mesa/state_tracker/st_atom_pixeltransfer.c index 05b69c9d00..347f2b60c3 100644 --- a/src/mesa/state_tracker/st_atom_pixeltransfer.c +++ b/src/mesa/state_tracker/st_atom_pixeltransfer.c @@ -171,7 +171,7 @@ load_color_map_texture(GLcontext *ctx, struct pipe_texture *pt) } screen->transfer_unmap(screen, transfer); - screen->tex_transfer_release(screen, &transfer); + screen->tex_transfer_destroy(transfer); } diff --git a/src/mesa/state_tracker/st_cb_accum.c b/src/mesa/state_tracker/st_cb_accum.c index 15cc4cd95d..3f9a825a15 100644 --- a/src/mesa/state_tracker/st_cb_accum.c +++ b/src/mesa/state_tracker/st_cb_accum.c @@ -149,7 +149,7 @@ st_clear_accum_buffer(GLcontext *ctx, struct gl_renderbuffer *rb) } screen->transfer_unmap(screen, acc_pt); - screen->tex_transfer_release(screen, &acc_pt); + screen->tex_transfer_destroy(acc_pt); } @@ -187,7 +187,7 @@ accum_mad(GLcontext *ctx, GLfloat scale, GLfloat bias, } screen->transfer_unmap(screen, acc_pt); - screen->tex_transfer_release(screen, &acc_pt); + screen->tex_transfer_destroy(acc_pt); } @@ -220,7 +220,7 @@ accum_accum(struct pipe_context *pipe, GLfloat value, accBuf[i] = accBuf[i] + colorBuf[i] * value; } - screen->tex_transfer_release(screen, &acc_trans); + screen->tex_transfer_destroy(acc_trans); acc_trans = screen->get_tex_transfer(screen, acc_strb->texture, 0, 0, 0, PIPE_TRANSFER_WRITE, xpos, ypos, width, height); @@ -229,8 +229,8 @@ accum_accum(struct pipe_context *pipe, GLfloat value, _mesa_free(colorBuf); _mesa_free(accBuf); - screen->tex_transfer_release(screen, &acc_trans); - screen->tex_transfer_release(screen, &color_trans); + screen->tex_transfer_destroy(acc_trans); + screen->tex_transfer_destroy(color_trans); } @@ -264,8 +264,8 @@ accum_load(struct pipe_context *pipe, GLfloat value, acc_put_tile_rgba(pipe, acc_trans, 0, 0, width, height, buf); _mesa_free(buf); - screen->tex_transfer_release(screen, &acc_trans); - screen->tex_transfer_release(screen, &color_trans); + screen->tex_transfer_destroy(acc_trans); + screen->tex_transfer_destroy(color_trans); } @@ -316,8 +316,8 @@ accum_return(GLcontext *ctx, GLfloat value, _mesa_free(abuf); if (cbuf) _mesa_free(cbuf); - screen->tex_transfer_release(screen, &acc_trans); - screen->tex_transfer_release(screen, &color_trans); + screen->tex_transfer_destroy(acc_trans); + screen->tex_transfer_destroy(color_trans); } diff --git a/src/mesa/state_tracker/st_cb_bitmap.c b/src/mesa/state_tracker/st_cb_bitmap.c index f55a5e713f..f77ac14762 100644 --- a/src/mesa/state_tracker/st_cb_bitmap.c +++ b/src/mesa/state_tracker/st_cb_bitmap.c @@ -351,7 +351,7 @@ make_bitmap_texture(GLcontext *ctx, GLsizei width, GLsizei height, /* Release transfer */ screen->transfer_unmap(screen, transfer); - screen->tex_transfer_release(screen, &transfer); + screen->tex_transfer_destroy(transfer); return pt; } @@ -379,7 +379,7 @@ setup_bitmap_vertex_data(struct st_context *st, GLuint i; if (st->bitmap.vbuf_slot >= max_slots) { - pipe_buffer_reference(pipe->screen, &st->bitmap.vbuf, NULL); + pipe_buffer_reference(&st->bitmap.vbuf, NULL); st->bitmap.vbuf_slot = 0; } @@ -571,7 +571,7 @@ reset_cache(struct st_context *st) cache->ymax = -1000000; if (cache->trans) - screen->tex_transfer_release(screen, &cache->trans); + screen->tex_transfer_destroy(cache->trans); assert(!cache->texture); @@ -623,7 +623,7 @@ st_flush_bitmap_cache(struct st_context *st) screen->transfer_unmap(screen, cache->trans); cache->buffer = NULL; - screen->tex_transfer_release(screen, &cache->trans); + screen->tex_transfer_destroy(cache->trans); draw_bitmap_quad(st->ctx, cache->xpos, @@ -651,7 +651,7 @@ st_flush_bitmap( struct st_context *st ) /* Release vertex buffer to avoid synchronous rendering if we were * to map it in the next frame. */ - pipe_buffer_reference(st->pipe->screen, &st->bitmap.vbuf, NULL); + pipe_buffer_reference(&st->bitmap.vbuf, NULL); st->bitmap.vbuf_slot = 0; } @@ -819,7 +819,7 @@ st_destroy_bitmap(struct st_context *st) struct bitmap_cache *cache = st->bitmap.cache; screen->transfer_unmap(screen, cache->trans); - screen->tex_transfer_release(screen, &cache->trans); + screen->tex_transfer_destroy(cache->trans); if (st->bitmap.vs) { cso_delete_vertex_shader(st->cso_context, st->bitmap.vs); @@ -828,12 +828,12 @@ st_destroy_bitmap(struct st_context *st) util_free_shader(&st->bitmap.vert_shader); if (st->bitmap.vbuf) { - pipe_buffer_reference(pipe->screen, &st->bitmap.vbuf, NULL); + pipe_buffer_reference(&st->bitmap.vbuf, NULL); st->bitmap.vbuf = NULL; } if (st->bitmap.cache) { - pipe_texture_release(&st->bitmap.cache->texture); + pipe_texture_reference(&st->bitmap.cache->texture, NULL); _mesa_free(st->bitmap.cache); st->bitmap.cache = NULL; } diff --git a/src/mesa/state_tracker/st_cb_bufferobjects.c b/src/mesa/state_tracker/st_cb_bufferobjects.c index 28e387c399..52099232ad 100644 --- a/src/mesa/state_tracker/st_cb_bufferobjects.c +++ b/src/mesa/state_tracker/st_cb_bufferobjects.c @@ -74,11 +74,10 @@ st_bufferobj_alloc(GLcontext *ctx, GLuint name, GLenum target) static void st_bufferobj_free(GLcontext *ctx, struct gl_buffer_object *obj) { - struct pipe_context *pipe = st_context(ctx)->pipe; struct st_buffer_object *st_obj = st_buffer_object(obj); if (st_obj->buffer) - pipe_buffer_reference(pipe->screen, &st_obj->buffer, NULL); + pipe_buffer_reference(&st_obj->buffer, NULL); _mesa_free(st_obj); } @@ -165,7 +164,7 @@ st_bufferobj_data(GLcontext *ctx, buffer_usage = 0; } - pipe_buffer_reference( pipe->screen, &st_obj->buffer, NULL ); + pipe_buffer_reference( &st_obj->buffer, NULL ); st_obj->buffer = pipe_buffer_create( pipe->screen, 32, buffer_usage, size ); diff --git a/src/mesa/state_tracker/st_cb_clear.c b/src/mesa/state_tracker/st_cb_clear.c index c6fc7cec27..7d4948a64e 100644 --- a/src/mesa/state_tracker/st_cb_clear.c +++ b/src/mesa/state_tracker/st_cb_clear.c @@ -95,8 +95,6 @@ st_init_clear(struct st_context *st) void st_destroy_clear(struct st_context *st) { - struct pipe_context *pipe = st->pipe; - if (st->clear.vert_shader.tokens) { util_free_shader(&st->clear.vert_shader); st->clear.vert_shader.tokens = NULL; @@ -116,7 +114,7 @@ st_destroy_clear(struct st_context *st) st->clear.vs = NULL; } if (st->clear.vbuf) { - pipe_buffer_reference(pipe->screen, &st->clear.vbuf, NULL); + pipe_buffer_reference(&st->clear.vbuf, NULL); st->clear.vbuf = NULL; } } @@ -152,7 +150,7 @@ draw_quad(GLcontext *ctx, GLuint i; if (st->clear.vbuf_slot >= max_slots) { - pipe_buffer_reference(pipe->screen, &st->clear.vbuf, NULL); + pipe_buffer_reference(&st->clear.vbuf, NULL); st->clear.vbuf_slot = 0; } @@ -524,7 +522,7 @@ void st_flush_clear( struct st_context *st ) /* Release vertex buffer to avoid synchronous rendering if we were * to map it in the next frame. */ - pipe_buffer_reference(st->pipe->screen, &st->clear.vbuf, NULL); + pipe_buffer_reference(&st->clear.vbuf, NULL); st->clear.vbuf_slot = 0; } diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c b/src/mesa/state_tracker/st_cb_drawpixels.c index cc7a9e7890..0a09e7e6f1 100644 --- a/src/mesa/state_tracker/st_cb_drawpixels.c +++ b/src/mesa/state_tracker/st_cb_drawpixels.c @@ -392,7 +392,7 @@ make_texture(struct st_context *st, /* unmap */ screen->transfer_unmap(screen, transfer); - screen->tex_transfer_release(screen, &transfer); + screen->tex_transfer_destroy(transfer); assert(success); @@ -495,7 +495,7 @@ draw_quad(GLcontext *ctx, GLfloat x0, GLfloat y0, GLfloat z, PIPE_PRIM_QUADS, 4, /* verts */ 3); /* attribs/vert */ - pipe_buffer_reference(pipe->screen, &buf, NULL); + pipe_buffer_reference(&buf, NULL); } } @@ -808,7 +808,7 @@ draw_stencil_pixels(GLcontext *ctx, GLint x, GLint y, /* unmap the stencil buffer */ screen->transfer_unmap(screen, pt); - screen->tex_transfer_release(screen, &pt); + screen->tex_transfer_destroy(pt); } @@ -951,7 +951,7 @@ copy_stencil_pixels(GLcontext *ctx, GLint srcx, GLint srcy, /* unmap the stencil buffer */ screen->transfer_unmap(screen, ptDraw); - screen->tex_transfer_release(screen, &ptDraw); + screen->tex_transfer_destroy(ptDraw); } @@ -1070,8 +1070,8 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy, _mesa_free(buf); } - screen->tex_transfer_release(screen, &ptRead); - screen->tex_transfer_release(screen, &ptTex); + screen->tex_transfer_destroy(ptRead); + screen->tex_transfer_destroy(ptTex); } /* draw textured quad */ diff --git a/src/mesa/state_tracker/st_cb_fbo.c b/src/mesa/state_tracker/st_cb_fbo.c index 4e669f113b..121ca8c29a 100644 --- a/src/mesa/state_tracker/st_cb_fbo.c +++ b/src/mesa/state_tracker/st_cb_fbo.c @@ -413,7 +413,6 @@ static void st_finish_render_texture(GLcontext *ctx, struct gl_renderbuffer_attachment *att) { - struct pipe_screen *screen = ctx->st->pipe->screen; struct st_renderbuffer *strb = st_renderbuffer(att->Renderbuffer); if (!strb) @@ -422,7 +421,7 @@ st_finish_render_texture(GLcontext *ctx, st_flush( ctx->st, PIPE_FLUSH_RENDER_CACHE, NULL ); if (strb->surface) - screen->tex_surface_release( screen, &strb->surface ); + pipe_surface_reference( &strb->surface, NULL ); strb->rtt = NULL; diff --git a/src/mesa/state_tracker/st_cb_readpixels.c b/src/mesa/state_tracker/st_cb_readpixels.c index 5a4a7f0a61..2a4beccd90 100644 --- a/src/mesa/state_tracker/st_cb_readpixels.c +++ b/src/mesa/state_tracker/st_cb_readpixels.c @@ -134,7 +134,7 @@ st_read_stencil_pixels(GLcontext *ctx, GLint x, GLint y, /* unmap the stencil buffer */ screen->transfer_unmap(screen, pt); - screen->tex_transfer_release(screen, &pt); + screen->tex_transfer_destroy(pt); } @@ -224,7 +224,7 @@ st_fast_readpixels(GLcontext *ctx, struct st_renderbuffer *strb, map = screen->transfer_map(screen, trans); if (!map) { - screen->tex_transfer_release(screen, &trans); + screen->tex_transfer_destroy(trans); return GL_FALSE; } @@ -282,7 +282,7 @@ st_fast_readpixels(GLcontext *ctx, struct st_renderbuffer *strb, } screen->transfer_unmap(screen, trans); - screen->tex_transfer_release(screen, &trans); + screen->tex_transfer_destroy(trans); } return GL_TRUE; @@ -466,7 +466,7 @@ st_readpixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height, } } - screen->tex_transfer_release(screen, &trans); + screen->tex_transfer_destroy(trans); _mesa_unmap_readpix_pbo(ctx, &clippedPacking); } diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c index 3039eb2a87..a504454145 100644 --- a/src/mesa/state_tracker/st_cb_texture.c +++ b/src/mesa/state_tracker/st_cb_texture.c @@ -938,12 +938,12 @@ fallback_copy_texsubimage(GLcontext *ctx, srcY = strb->Base.Height - srcY - height; } - src_trans = pipe->screen->get_tex_transfer( pipe->screen, - strb->texture, - 0, 0, 0, - PIPE_TRANSFER_READ, - srcX, srcY, - width, height); + src_trans = screen->get_tex_transfer( screen, + strb->texture, + 0, 0, 0, + PIPE_TRANSFER_READ, + srcX, srcY, + width, height); texDest = st_texture_image_map(ctx->st, stImage, 0, PIPE_TRANSFER_WRITE, destX, destY, width, height); @@ -1020,7 +1020,7 @@ fallback_copy_texsubimage(GLcontext *ctx, } st_texture_image_unmap(ctx->st, stImage); - screen->tex_transfer_release(screen, &src_trans); + screen->tex_transfer_destroy(src_trans); } @@ -1413,7 +1413,7 @@ st_finalize_texture(GLcontext *ctx, stObj->pt->depth[0] != firstImage->base.Depth2 || stObj->pt->block.size/stObj->pt->block.width != cpp || /* Nominal bytes per pixel */ stObj->pt->compressed != firstImage->base.IsCompressed) { - pipe_texture_release(&stObj->pt); + pipe_texture_reference(&stObj->pt, NULL); ctx->st->dirty.st |= ST_NEW_FRAMEBUFFER; } } diff --git a/src/mesa/state_tracker/st_context.c b/src/mesa/state_tracker/st_context.c index 78a7956c90..f31be69023 100644 --- a/src/mesa/state_tracker/st_context.c +++ b/src/mesa/state_tracker/st_context.c @@ -209,7 +209,7 @@ static void st_destroy_context_priv( struct st_context *st ) for (i = 0; i < Elements(st->state.constants); i++) { if (st->state.constants[i].buffer) { - pipe_buffer_reference(st->pipe->screen, &st->state.constants[i].buffer, NULL); + pipe_buffer_reference(&st->state.constants[i].buffer, NULL); } } diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c index b52e488612..be1d9a8628 100644 --- a/src/mesa/state_tracker/st_draw.c +++ b/src/mesa/state_tracker/st_draw.c @@ -378,7 +378,7 @@ setup_interleaved_attribs(GLcontext *ctx, } else { vbuffer->buffer = NULL; - pipe_buffer_reference(pipe->screen, &vbuffer->buffer, stobj->buffer); + pipe_buffer_reference(&vbuffer->buffer, stobj->buffer); vbuffer->buffer_offset = (unsigned) low; } vbuffer->stride = stride; /* in bytes */ @@ -433,7 +433,7 @@ setup_non_interleaved_attribs(GLcontext *ctx, /*printf("stobj %u = %p\n", attr, (void*) stobj);*/ vbuffer[attr].buffer = NULL; - pipe_buffer_reference(pipe->screen, &vbuffer[attr].buffer, stobj->buffer); + pipe_buffer_reference(&vbuffer[attr].buffer, stobj->buffer); vbuffer[attr].buffer_offset = (unsigned) arrays[mesaAttr]->Ptr; velements[attr].src_offset = 0; } @@ -617,7 +617,7 @@ st_draw_vbo(GLcontext *ctx, if (bufobj && bufobj->Name) { /* elements/indexes are in a real VBO */ struct st_buffer_object *stobj = st_buffer_object(bufobj); - pipe_buffer_reference(pipe->screen, &indexBuf, stobj->buffer); + pipe_buffer_reference(&indexBuf, stobj->buffer); indexOffset = (unsigned) ib->ptr / indexSize; } else { @@ -657,7 +657,7 @@ st_draw_vbo(GLcontext *ctx, } } - pipe_buffer_reference(pipe->screen, &indexBuf, NULL); + pipe_buffer_reference(&indexBuf, NULL); } else { /* non-indexed */ @@ -673,7 +673,7 @@ st_draw_vbo(GLcontext *ctx, /* unreference buffers (frees wrapped user-space buffer objects) */ for (attr = 0; attr < num_vbuffers; attr++) { - pipe_buffer_reference(pipe->screen, &vbuffer[attr].buffer, NULL); + pipe_buffer_reference(&vbuffer[attr].buffer, NULL); assert(!vbuffer[attr].buffer); } diff --git a/src/mesa/state_tracker/st_draw_feedback.c b/src/mesa/state_tracker/st_draw_feedback.c index 5c9c4506c2..d63d8cae28 100644 --- a/src/mesa/state_tracker/st_draw_feedback.c +++ b/src/mesa/state_tracker/st_draw_feedback.c @@ -152,7 +152,7 @@ st_feedback_draw_vbo(GLcontext *ctx, assert(stobj->buffer); vbuffers[attr].buffer = NULL; - pipe_buffer_reference(pipe->screen, &vbuffers[attr].buffer, stobj->buffer); + pipe_buffer_reference(&vbuffers[attr].buffer, stobj->buffer); vbuffers[attr].buffer_offset = (unsigned) arrays[0]->Ptr;/* in bytes */ velements[attr].src_offset = arrays[mesaAttr]->Ptr - arrays[0]->Ptr; } @@ -248,7 +248,7 @@ st_feedback_draw_vbo(GLcontext *ctx, for (i = 0; i < PIPE_MAX_ATTRIBS; i++) { if (draw->pt.vertex_buffer[i].buffer) { pipe_buffer_unmap(pipe->screen, draw->pt.vertex_buffer[i].buffer); - pipe_buffer_reference(pipe->screen, &draw->pt.vertex_buffer[i].buffer, NULL); + pipe_buffer_reference(&draw->pt.vertex_buffer[i].buffer, NULL); draw_set_mapped_vertex_buffer(draw, i, NULL); } } diff --git a/src/mesa/state_tracker/st_gen_mipmap.c b/src/mesa/state_tracker/st_gen_mipmap.c index 08e4803068..9cc2176d5e 100644 --- a/src/mesa/state_tracker/st_gen_mipmap.c +++ b/src/mesa/state_tracker/st_gen_mipmap.c @@ -147,8 +147,8 @@ fallback_generate_mipmap(GLcontext *ctx, GLenum target, screen->transfer_unmap(screen, srcTrans); screen->transfer_unmap(screen, dstTrans); - screen->tex_transfer_release(screen, &srcTrans); - screen->tex_transfer_release(screen, &dstTrans); + screen->tex_transfer_destroy(srcTrans); + screen->tex_transfer_destroy(dstTrans); } } diff --git a/src/mesa/state_tracker/st_texture.c b/src/mesa/state_tracker/st_texture.c index fcf76ef82e..79a4bd84d0 100644 --- a/src/mesa/state_tracker/st_texture.c +++ b/src/mesa/state_tracker/st_texture.c @@ -108,7 +108,7 @@ st_texture_create(struct st_context *st, newtex = screen->texture_create(screen, &pt); - assert(!newtex || newtex->refcount == 1); + assert(!newtex || newtex->reference.count == 1); return newtex; } @@ -219,7 +219,7 @@ st_texture_image_unmap(struct st_context *st, screen->transfer_unmap(screen, stImage->transfer); - screen->tex_transfer_release(screen, &stImage->transfer); + screen->tex_transfer_destroy(stImage->transfer); } @@ -284,7 +284,7 @@ st_texture_image_data(struct pipe_context *pipe, 0, 0, /* source x, y */ dst->width[level], dst->height[level]); /* width, height */ - screen->tex_transfer_release(screen, &dst_transfer); + screen->tex_transfer_destroy(dst_transfer); srcUB += src_image_stride; } @@ -350,8 +350,8 @@ st_texture_image_copy(struct pipe_context *pipe, 0, 0, /* srcX, Y */ width, height); - screen->tex_surface_release(screen, &src_surface); - screen->tex_surface_release(screen, &dst_surface); + pipe_surface_reference(&src_surface, NULL); + pipe_surface_reference(&dst_surface, NULL); } } -- cgit v1.2.3 From 04ae9c3fdd62831485b7384da62566a0b82b84af Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 4 Mar 2009 13:47:44 -0800 Subject: r300-gallium: Add unaccelerated surface_copy. --- src/gallium/drivers/r300/r300_surface.c | 62 +++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 288d8dea15..c2fd744e42 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -308,7 +308,69 @@ static void r300_surface_fill(struct pipe_context* pipe, r300->dirty_hw++; } +static void r300_surface_copy(struct pipe_context* pipe, + boolean do_flip, + struct pipe_surface* dest, + unsigned destx, unsigned desty, + struct pipe_surface* src, + unsigned srcx, unsigned srcy, + unsigned w, unsigned h) +{ + struct r300_context* r300 = r300_context(pipe); + CS_LOCALS(r300); + struct r300_texture* srctex = (struct r300_texture*)src->texture; + struct r300_texture* desttex = (struct r300_texture*)dest->texture; + + unsigned pixpitch = srctex->stride / srctex->tex.block.size; + debug_printf("r300: Copying surface %p at (%d,%d) to %p at (%d, %d)," + " dimensions %dx%d (pixel pitch %d)\n", + src, srcx, srcy, dest, destx, desty, w, h, pixpitch); + + if (TRUE) { + debug_printf("r300: Falling back on surface_copy\n"); + return util_surface_copy(pipe, do_flip, dest, destx, desty, src, + srcx, srcy, w, h); + } +#if 0 + BEGIN_CS(); + OUT_CS_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT,(RADEON_DEFAULT_SC_RIGHT_MAX | + RADEON_DEFAULT_SC_BOTTOM_MAX)); + OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, (RADEON_GMC_DST_PITCH_OFFSET_CNTL | + RADEON_GMC_SRC_PITCH_OFFSET_CNTL | + RADEON_GMC_BRUSH_NONE | + (datatype << 8) | + RADEON_GMC_SRC_DATATYPE_COLOR | + RADEON_ROP[rop].rop | + RADEON_DP_SRC_SOURCE_MEMORY | + RADEON_GMC_CLR_CMP_CNTL_DIS)); + OUT_CS_REG(RADEON_DP_BRUSH_FRGD_CLR, 0xffffffff); + OUT_CS_REG(RADEON_DP_BRUSH_BKGD_CLR, 0x0); + OUT_CS_REG(RADEON_DP_SRC_FRGD_CLR, 0xffffffff); + OUT_CS_REG(RADEON_DP_SRC_BKGD_CLR, 0x0); + OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask); + OUT_ACCEL_REG(RADEON_DP_CNTL, ((info->accel_state->xdir >= 0 ? RADEON_DST_X_LEFT_TO_RIGHT : 0) | + (info->accel_state->ydir >= 0 ? RADEON_DST_Y_TOP_TO_BOTTOM : 0)); +); + + OUT_CS_REG_SEQ(RADEON_DST_PITCH_OFFSET, 1); + OUT_CS_RELOC(desttex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + + OUT_CS_REG_SEQ(RADEON_SRC_PITCH_OFFSET, 1); + OUT_CS_RELOC(srctex->buffer, 0, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0); + + OUT_CS_REG(RADEON_SRC_Y_X, (srcy << 16) | srcx); + OUT_CS_REG(RADEON_DST_Y_X, (desty << 16) | destx); + OUT_CS_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); + OUT_CS_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); + OUT_CS_REG(RADEON_WAIT_UNTIL, + RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE); + END_CS; +#endif +} + void r300_init_surface_functions(struct r300_context* r300) { r300->context.surface_fill = r300_surface_fill; + r300->context.surface_copy = r300_surface_copy; } -- cgit v1.2.3 From df8755edbedd6b0c85886db1b627f564c5a1beec Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 5 Mar 2009 08:41:04 -0800 Subject: r300-gallium: C++ compat fix. Oops. :3 --- src/gallium/drivers/r300/r300_winsys.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index 8c9578de51..baa95282c3 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -88,12 +88,12 @@ struct r300_winsys { struct pipe_context* r300_create_context(struct pipe_screen* screen, struct r300_winsys* r300_winsys); -#ifdef __cplusplus -} -#endif - boolean r300_get_texture_buffer(struct pipe_texture* texture, struct pipe_buffer** buffer, unsigned* stride); +#ifdef __cplusplus +} +#endif + #endif /* R300_WINSYS_H */ -- cgit v1.2.3 From a3b168df48302b5bbd2323685623adee240d03a4 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 5 Mar 2009 10:46:10 -0800 Subject: r300-gallium: Use only one CS section for vertex_format. --- src/gallium/drivers/r300/r300_emit.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 91fac62cbe..e910e9c827 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -260,16 +260,14 @@ void r300_emit_vertex_format_state(struct r300_context* r300) CS_LOCALS(r300); int i; - BEGIN_CS(6); + BEGIN_CS(24); OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2); OUT_CS(r300->vertex_info.vinfo.hwfmt[0]); OUT_CS(r300->vertex_info.vinfo.hwfmt[1]); OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); OUT_CS(r300->vertex_info.vinfo.hwfmt[2]); OUT_CS(r300->vertex_info.vinfo.hwfmt[3]); - END_CS; - BEGIN_CS(18); OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8); for (i = 0; i < 8; i++) { OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]); -- cgit v1.2.3 From 626ac953354156f2545d90960f6712a2248ba795 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 5 Mar 2009 10:46:52 -0800 Subject: r300-gallium: Fix up vertex count. --- src/gallium/drivers/r300/r300_swtcl_emit.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index 01235674ac..7f0fc02971 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -174,7 +174,7 @@ static boolean r300_swtcl_render_set_primitive(struct vbuf_render* render, return TRUE; } -static void prepare_render(struct r300_swtcl_render* render) +static void prepare_render(struct r300_swtcl_render* render, unsigned count) { struct r300_context* r300 = render->r300; int i; @@ -186,7 +186,7 @@ static void prepare_render(struct r300_swtcl_render* render) debug_printf("r300: Preparing vertex buffer %p for render, " "vertex size %d, vertex count %d\n", render->vbo, - r300->vertex_info.vinfo.size, render->vbo_size); + r300->vertex_info.vinfo.size, count); /* Set the pointer to our vertex buffer. The emitted values are this: * PACKET3 [3D_LOAD_VBPNTR] * COUNT [1] @@ -194,7 +194,7 @@ static void prepare_render(struct r300_swtcl_render* render) * OFFSET [0] * VBPNTR [relocated BO] */ - BEGIN_CS(5); + BEGIN_CS(7); OUT_CS(CP_PACKET3(R300_PACKET3_3D_LOAD_VBPNTR, 3)); OUT_CS(1); OUT_CS(r300->vertex_info.vinfo.size | @@ -214,7 +214,11 @@ static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, CS_LOCALS(r300); - prepare_render(r300render); + count /= 4; + + r300render->vbo_offset = start; + + prepare_render(r300render, count); debug_printf("r300: Doing vbuf render, count %d\n", count); @@ -237,7 +241,9 @@ static void r300_swtcl_render_draw(struct vbuf_render* render, CS_LOCALS(r300); - prepare_render(r300render); + count /= 4; + + prepare_render(r300render, count); /* Send our indices into an index buffer. */ index_buffer = pipe_buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, @@ -252,7 +258,7 @@ static void r300_swtcl_render_draw(struct vbuf_render* render, pipe_buffer_unmap(screen, index_buffer); debug_printf("r300: Doing indexbuf render, count %d\n", count); - +#if 0 BEGIN_CS(5); OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0)); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | @@ -262,6 +268,7 @@ static void r300_swtcl_render_draw(struct vbuf_render* render, OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2)); OUT_CS_RELOC(index_buffer, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); END_CS; +#endif } static void r300_swtcl_render_destroy(struct vbuf_render* render) -- cgit v1.2.3 From ac2acda036c208d963fefac27d7300e017c74527 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 5 Mar 2009 11:01:03 -0800 Subject: r300-gallium: Move scissor state. Keep it grouped with all the other parameterized state. --- src/gallium/drivers/r300/r300_surface.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index c2fd744e42..1913ffce1e 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -185,11 +185,6 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX */ OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); - /* Pixel scissors */ - OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); - OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT)); - OUT_CS((w << R300_SCISSORS_X_SHIFT) | (h << R300_SCISSORS_Y_SHIFT)); - /* RS block setup */ if (caps->is_r500) { /* XXX We seem to be in disagreement about how many of these we have @@ -264,6 +259,11 @@ static void r300_surface_fill(struct pipe_context* pipe, } END_CS; + /* Pixel scissors */ + OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); + OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT)); + OUT_CS((w << R300_SCISSORS_X_SHIFT) | (h << R300_SCISSORS_Y_SHIFT)); + /* The size of the point we're about to draw, in sixths of pixels */ OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | -- cgit v1.2.3 From 0b723b8b89cd65901431199f86911f003465946e Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 5 Mar 2009 11:59:22 -0800 Subject: r300-gallium: Move RS block setup to CSO. --- src/gallium/drivers/r300/r300_reg.h | 3 +++ src/gallium/drivers/r300/r300_surface.c | 33 +++------------------------------ src/gallium/drivers/r300/r300_surface.h | 20 ++++++++++++++++++++ 3 files changed, 26 insertions(+), 30 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index e0da9d361e..e10d2373bb 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1150,6 +1150,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_W_ADDR_MASK 0x0003f000 # define R300_HIRES_DIS (0 << 18) # define R300_HIRES_EN (1 << 18) +# define R300_IT_COUNT(x) ((x) << 0) +# define R300_IC_COUNT(x) ((x) << 7) +# define R300_W_COUNT(x) ((x) << 12) #define R300_RS_INST_COUNT 0x4304 # define R300_RS_INST_COUNT_SHIFT 0 diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 1913ffce1e..9968fe0de0 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -63,7 +63,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_dsa_state(r300, &dsa_clear_state); r300_emit_rs_state(r300, &rs_clear_state); - BEGIN_CS(129 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2)); + BEGIN_CS(128 + (caps->has_tcl ? 2 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -184,42 +184,15 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX */ OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); - - /* RS block setup */ - if (caps->is_r500) { - /* XXX We seem to be in disagreement about how many of these we have - * RS:RS_IP_[0-15] [R/W] 32 bits Access: 8/16/32 MMReg:0x4074-0x40b0 - * Now that's from the docs. I don't care what the mesa driver says */ - OUT_CS_REG_SEQ(R500_RS_IP_0, 16); - for (i = 0; i < 16; i++) { - OUT_CS((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | - (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | - (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | - (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); - } - OUT_CS_REG_SEQ(R300_RS_COUNT, 2); - OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - OUT_CS(0x00000000); - OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE); - } else { - OUT_CS_REG_SEQ(R300_RS_IP_0, 8); - for (i = 0; i < 8; i++) { - OUT_CS(R300_RS_SEL_T(R300_RS_SEL_K0) | - R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1)); - } - OUT_CS_REG_SEQ(R300_RS_COUNT, 2); - OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN); - /* XXX Shouldn't this be 0? */ - OUT_CS(1); - OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE); - } END_CS; /* Fragment shader setup */ if (caps->is_r500) { r500_emit_fragment_shader(r300, &r500_passthrough_fragment_shader); + r300_emit_rs_block_state(r300, &r500_rs_block_clear_state); } else { r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); + r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } BEGIN_CS(7 + (caps->has_tcl ? 21 : 2)); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 807aad39e4..616d56dd04 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -69,4 +69,24 @@ const struct r300_rs_state rs_clear_state = { .line_stipple_value = 0x0, }; +const struct r300_rs_block r300_rs_block_clear_state = { + .ip[0] = R500_RS_SEL_S(R300_RS_SEL_K0) | + R500_RS_SEL_T(R300_RS_SEL_K0) | + R500_RS_SEL_R(R300_RS_SEL_K0) | + R500_RS_SEL_Q(R300_RS_SEL_K1), + .inst[0] = R300_RS_INST_COL_CN_WRITE, + .count = R300_IT_COUNT(0) | R300_IC_COUNT(1) | R300_HIRES_EN, + .inst_count = 0, +}; + +const struct r300_rs_block r500_rs_block_clear_state = { + .ip[0] = R500_RS_SEL_S(R500_RS_IP_PTR_K0) | + R500_RS_SEL_T(R500_RS_IP_PTR_K0) | + R500_RS_SEL_R(R500_RS_IP_PTR_K0) | + R500_RS_SEL_Q(R500_RS_IP_PTR_K1), + .inst[0] = R500_RS_INST_COL_CN_WRITE, + .count = R300_IT_COUNT(0) | R300_IC_COUNT(1) | R300_HIRES_EN, + .inst_count = 0, +}; + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From d965c15777727fec34b11c253f2a0f50c4e8e89a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 6 Mar 2009 09:44:21 -0800 Subject: r300-gallium: Pick up a few more bits of rs_state. Including two registers that already should have been covered...huh... --- src/gallium/drivers/r300/r300_context.h | 1 + src/gallium/drivers/r300/r300_emit.c | 6 +++++- src/gallium/drivers/r300/r300_state.c | 6 ++++++ src/gallium/drivers/r300/r300_surface.c | 23 ++++++++++------------- src/gallium/drivers/r300/r300_surface.h | 1 + 5 files changed, 23 insertions(+), 14 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 2be9e2eb33..c2329b430c 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -64,6 +64,7 @@ struct r300_rs_state { uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */ + uint32_t point_minmax; /* R300_GA_POINT_MINMAX: 0x4230 */ uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */ uint32_t depth_scale_front; /* R300_SU_POLY_OFFSET_FRONT_SCALE: 0x42a4 */ uint32_t depth_offset_front;/* R300_SU_POLY_OFFSET_FRONT_OFFSET: 0x42a8 */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index e910e9c827..6c84b562d0 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -196,8 +196,12 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); - BEGIN_CS(13); + BEGIN_CS(18); OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status); + OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size); + OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2); + OUT_CS(rs->point_minmax); + OUT_CS(rs->line_control); OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 6); OUT_CS(rs->depth_scale_front); OUT_CS(rs->depth_offset_front); diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 6e64ad2dc3..a909ad0341 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -337,6 +337,12 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->point_size = pack_float_16_6x(state->point_size) | (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); + rs->point_minmax = + ((int)(state->point_size_min * 6.0) << + R300_GA_POINT_MINMAX_MIN_SHIFT) | + ((int)(state->point_size_max * 6.0) << + R300_GA_POINT_MINMAX_MAX_SHIFT); + rs->line_control = pack_float_16_6x(state->line_width) | R300_GA_LINE_CNTL_END_TYPE_COMP; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 9968fe0de0..eafcc12b7d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -63,7 +63,16 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_dsa_state(r300, &dsa_clear_state); r300_emit_rs_state(r300, &rs_clear_state); - BEGIN_CS(128 + (caps->has_tcl ? 2 : 0)); + /* Fragment shader setup */ + if (caps->is_r500) { + r500_emit_fragment_shader(r300, &r500_passthrough_fragment_shader); + r300_emit_rs_block_state(r300, &r500_rs_block_clear_state); + } else { + r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); + r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); + } + + BEGIN_CS(126 + (caps->has_tcl ? 2 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -99,9 +108,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(1.0); OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); - /* XXX should this be related to the actual point size? */ - OUT_CS_REG(R300_GA_POINT_MINMAX, 0x6 | - (0x1800 << R300_GA_POINT_MINMAX_MAX_SHIFT)); /* XXX this big chunk should be refactored into rs_state */ OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); @@ -186,15 +192,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); END_CS; - /* Fragment shader setup */ - if (caps->is_r500) { - r500_emit_fragment_shader(r300, &r500_passthrough_fragment_shader); - r300_emit_rs_block_state(r300, &r500_rs_block_clear_state); - } else { - r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); - r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); - } - BEGIN_CS(7 + (caps->has_tcl ? 21 : 2)); OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 616d56dd04..be3105f8ce 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -58,6 +58,7 @@ const struct r300_dsa_state dsa_clear_state = { }; const struct r300_rs_state rs_clear_state = { + .point_minmax = 0x36000006, .line_control = 0x00030006, .depth_scale_front = 0x0, .depth_offset_front = 0x0, -- cgit v1.2.3 From 17331a77f6480183ad0f43173f77d6c73cc377ff Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 6 Mar 2009 11:17:55 -0800 Subject: r300-gallium: Flat/smooth shading state. --- src/gallium/drivers/r300/r300_context.h | 1 + src/gallium/drivers/r300/r300_emit.c | 3 ++- src/gallium/drivers/r300/r300_reg.h | 35 ++++++++++++++++++++------------- src/gallium/drivers/r300/r300_state.c | 6 ++++++ src/gallium/drivers/r300/r300_surface.c | 3 +-- src/gallium/drivers/r300/r300_surface.h | 1 + 6 files changed, 32 insertions(+), 17 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index c2329b430c..95b3b14a1a 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -74,6 +74,7 @@ struct r300_rs_state { uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */ uint32_t line_stipple_config; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */ uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */ + uint32_t color_control; /* R300_GA_COLOR_CONTROL: 0x4278 */ }; struct r300_rs_block { diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 6c84b562d0..86325f675b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -196,7 +196,7 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); - BEGIN_CS(18); + BEGIN_CS(20); OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status); OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size); OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2); @@ -211,6 +211,7 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) OUT_CS(rs->cull_mode); OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config); OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value); + OUT_CS_REG(R300_GA_COLOR_CONTROL, rs->color_control); END_CS; } diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index e10d2373bb..b0394f80c8 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1023,20 +1023,27 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_THIRD (2 << 16) # define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST (3 << 16) -/** TODO: might be candidate for removal */ -# define R300_RE_SHADE_MODEL_SMOOTH ( \ - R300_GA_COLOR_CONTROL_RGB0_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA0_SHADING_GOURAUD | \ - R300_GA_COLOR_CONTROL_RGB1_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD | \ - R300_GA_COLOR_CONTROL_RGB2_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA2_SHADING_GOURAUD | \ - R300_GA_COLOR_CONTROL_RGB3_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \ - R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST ) -/** TODO: might be candidate for removal, the GOURAUD stuff also looks buggy to me */ -# define R300_RE_SHADE_MODEL_FLAT ( \ - R300_GA_COLOR_CONTROL_RGB0_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA0_SHADING_FLAT | \ - R300_GA_COLOR_CONTROL_RGB1_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD | \ - R300_GA_COLOR_CONTROL_RGB2_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA2_SHADING_FLAT | \ - R300_GA_COLOR_CONTROL_RGB3_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \ - R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST ) +# define R300_SHADE_MODEL_FLAT ( \ + R300_GA_COLOR_CONTROL_RGB0_SHADING_FLAT | \ + R300_GA_COLOR_CONTROL_ALPHA0_SHADING_FLAT | \ + R300_GA_COLOR_CONTROL_RGB1_SHADING_FLAT | \ + R300_GA_COLOR_CONTROL_ALPHA1_SHADING_FLAT | \ + R300_GA_COLOR_CONTROL_RGB2_SHADING_FLAT | \ + R300_GA_COLOR_CONTROL_ALPHA2_SHADING_FLAT | \ + R300_GA_COLOR_CONTROL_RGB3_SHADING_FLAT | \ + R300_GA_COLOR_CONTROL_ALPHA3_SHADING_FLAT | \ + R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST ) + +# define R300_SHADE_MODEL_SMOOTH ( \ + R300_GA_COLOR_CONTROL_RGB0_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_ALPHA0_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_RGB1_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_RGB2_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_ALPHA2_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_RGB3_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \ + R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST ) /* Specifies red & green components of fill color -- S312 format -- Backwards comp. */ #define R300_GA_SOLID_RG 0x427c diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index a909ad0341..04cbf71ce5 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -389,6 +389,12 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->line_stipple_value = state->line_stipple_pattern; } + if (state->flatshade) { + rs->color_control = R300_SHADE_MODEL_FLAT; + } else { + rs->color_control = R300_SHADE_MODEL_SMOOTH; + } + rs->rs = *state; return (void*)rs; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index eafcc12b7d..635309ee01 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -72,7 +72,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(126 + (caps->has_tcl ? 2 : 0)); + BEGIN_CS(124 + (caps->has_tcl ? 2 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -112,7 +112,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); OUT_CS_REG(R300_GA_ENHANCE, 0x00000002); - OUT_CS_REG(R300_GA_COLOR_CONTROL, 0x0003AAAA); OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000); OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000); OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index be3105f8ce..b75b3ab84c 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -68,6 +68,7 @@ const struct r300_rs_state rs_clear_state = { .cull_mode = 0x0, .line_stipple_config = 0x3BAAAAAB, .line_stipple_value = 0x0, + .color_control = R300_SHADE_MODEL_FLAT, }; const struct r300_rs_block r300_rs_block_clear_state = { -- cgit v1.2.3 From 9c3796417f2879f10b45f50827e2a977e9f96b70 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 6 Mar 2009 11:28:08 -0800 Subject: r300-gallium: GA enhancements. Basically an errata fixup register. --- src/gallium/drivers/r300/r300_state_invariant.c | 14 +++++++++++++- src/gallium/drivers/r300/r300_surface.c | 3 +-- 2 files changed, 14 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 7fd7aefeb7..4ead767a30 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -34,7 +34,7 @@ void r300_emit_invariant_state(struct r300_context* r300) struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; CS_LOCALS(r300); - BEGIN_CS(14); + BEGIN_CS(16); /* Amount of time to wait for vertex fetches in PVS */ OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); /* Various GB enables */ @@ -50,5 +50,17 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); /* AA enable */ OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); + /* GA errata fixes. */ + if (caps->is_r500) { + OUT_CS_REG(R300_GA_ENHANCE, + R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL | + R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE | + R500_GA_ENHANCE_REG_READWRITE_ENABLE | + R500_GA_ENHANCE_REG_NOSTALL_ENABLE); + } else { + OUT_CS_REG(R300_GA_ENHANCE, + R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL | + R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE); + } END_CS; } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 635309ee01..c1d324039e 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -72,7 +72,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(124 + (caps->has_tcl ? 2 : 0)); + BEGIN_CS(122 + (caps->has_tcl ? 2 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -111,7 +111,6 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX this big chunk should be refactored into rs_state */ OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); - OUT_CS_REG(R300_GA_ENHANCE, 0x00000002); OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000); OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000); OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000); -- cgit v1.2.3 From 7e45d68d4d0acedd53f365aa0adf93ede2d171bf Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 6 Mar 2009 13:18:12 -0800 Subject: r300-gallium: Separate out fog block. We'll never actually use fog block. (I hope.) --- src/gallium/drivers/r300/r300_state_invariant.c | 9 ++++++++- src/gallium/drivers/r300/r300_surface.c | 9 +-------- 2 files changed, 9 insertions(+), 9 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 4ead767a30..c7c20c2de5 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -34,7 +34,7 @@ void r300_emit_invariant_state(struct r300_context* r300) struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; CS_LOCALS(r300); - BEGIN_CS(16); + BEGIN_CS(26); /* Amount of time to wait for vertex fetches in PVS */ OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); /* Various GB enables */ @@ -62,5 +62,12 @@ void r300_emit_invariant_state(struct r300_context* r300) R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL | R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE); } + + /* Fog block. */ + OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); + OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); + OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); + OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x00000000); + OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); END_CS; } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index c1d324039e..cec64ecdd7 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -72,7 +72,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(122 + (caps->has_tcl ? 2 : 0)); + BEGIN_CS(112 + (caps->has_tcl ? 2 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -123,12 +123,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); - OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002); - OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); - OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); - OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x00000000); - OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); - OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); @@ -162,7 +156,6 @@ static void r300_surface_fill(struct pipe_context* pipe, ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); } - OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); -- cgit v1.2.3 From fc96ac3c047da0ad7a44a7c938e6dcba8cdd01bd Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 6 Mar 2009 13:31:13 -0800 Subject: r300-gallium: Make sure registers are inside BEGIN/END CS. --- src/gallium/drivers/r300/r300_surface.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index cec64ecdd7..92ddaceb8f 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -220,6 +220,8 @@ static void r300_surface_fill(struct pipe_context* pipe, } END_CS; + BEGIN_CS(29); + /* Pixel scissors */ OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT)); @@ -230,7 +232,6 @@ static void r300_surface_fill(struct pipe_context* pipe, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); - BEGIN_CS(24); /* Flush colorbuffer and blend caches. */ OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D | -- cgit v1.2.3 From e23e93b7b400d1a4c7049b6f22f39cc7148a97f7 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 6 Mar 2009 14:13:21 -0800 Subject: r300-gallium: Actually do framebuffer setup. Can't believe this wasn't wired up. --- src/gallium/drivers/r300/r300_emit.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 86325f675b..4e82c322df 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -152,7 +152,7 @@ uint32_t translate_out_fmt(enum pipe_format format) return 0; } -/* XXX add pitch, stride */ +/* XXX add pitch, stride, clean up */ void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb) { @@ -324,6 +324,11 @@ void r300_emit_dirty_state(struct r300_context* r300) r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER; } + if (r300->dirty_state & R300_NEW_FRAMEBUFFERS) { + r300_emit_fb_state(r300, &r300->framebuffer_state); + r300->dirty_state &= ~R300_NEW_FRAMEBUFFERS; + } + if (r300->dirty_state & R300_NEW_RASTERIZER) { r300_emit_rs_state(r300, r300->rs_state); r300->dirty_state &= ~R300_NEW_RASTERIZER; -- cgit v1.2.3 From 95476635c5a5543f12f5b75bc43e5fcca6335e3c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 6 Mar 2009 14:23:20 -0800 Subject: r300-gallium: Remove unknown regs. Leftovers from fglrx traces, probably. --- src/gallium/drivers/r300/r300_surface.c | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 92ddaceb8f..9f81e2e730 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -125,14 +125,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); - - /* XXX: Oh the wonderful unknown. - * Not writing these 8 regs seems to make no difference at all and seeing - * as how they're not documented, we should leave them out for now. - OUT_CS_REG_SEQ(0x4E54, 8); - for (i = 0; i < 8; i++) { - OUT_CS(0x00000000); - } */ OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); @@ -140,9 +132,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000); - /* XXX Moar unknown that should probably be left out. - OUT_CS_REG(0x4F30, 0x00000000); - OUT_CS_REG(0x4F34, 0x00000000); */ OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); if (caps->has_tcl) { -- cgit v1.2.3 From 6ebd6c898a3ec350d1f62ccd66d2b6138275d35c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 6 Mar 2009 19:07:13 -0800 Subject: r300-gallium: Fix masking on vertex formats. Gah, what a simple yet terrible mistake. --- src/gallium/drivers/r300/r300_state_derived.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 548a840f25..b7fb36f6f9 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -181,11 +181,11 @@ static void r300_update_vertex_layout(struct r300_context* r300) temp = translate_vertex_data_type(vinfo.attrib[i].emit) | (tab[i] << R300_DST_VEC_LOC_SHIFT) | R300_SIGNED; if (i & 1) { - r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff0000; + r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff; r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= temp << 16; } else { - r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff; + r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff0000; r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= temp; } -- cgit v1.2.3 From dcd7f1c0551812cf39ca6a3af9f1610ad84fb24e Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 7 Mar 2009 00:42:12 -0800 Subject: r300-gallium: A bit more vertex format fixup. --- src/gallium/drivers/r300/r300_reg.h | 8 ++++ src/gallium/drivers/r300/r300_state_derived.c | 63 ++++++--------------------- src/gallium/drivers/r300/r300_state_derived.h | 1 + src/gallium/drivers/r300/r300_state_inlines.h | 28 ++++++++++++ src/gallium/drivers/r300/r300_surface.c | 11 ++--- 5 files changed, 57 insertions(+), 54 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index b0394f80c8..321f587374 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -326,6 +326,14 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_WRITE_ENA_Z 4 # define R300_WRITE_ENA_W 8 # define R300_SWIZZLE1_SHIFT 16 + +# define R300_VAP_SWIZZLE_XYZW \ + ((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | \ + (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | \ + (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | \ + (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | \ + (0xf << R300_WRITE_ENA_SHIFT)) + #define R300_VAP_PROG_STREAM_CNTL_EXT_1 0x21e4 #define R300_VAP_PROG_STREAM_CNTL_EXT_2 0x21e8 #define R300_VAP_PROG_STREAM_CNTL_EXT_3 0x21ec diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index b7fb36f6f9..d15b4ff2e1 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -25,30 +25,6 @@ /* r300_state_derived: Various bits of state which are dependent upon * currently bound CSO data. */ -static uint32_t translate_vertex_data_type(int type) { - switch (type) { - case EMIT_1F: - case EMIT_1F_PSIZE: - return R300_DATA_TYPE_FLOAT_1; - break; - case EMIT_2F: - return R300_DATA_TYPE_FLOAT_2; - break; - case EMIT_3F: - return R300_DATA_TYPE_FLOAT_3; - break; - case EMIT_4F: - return R300_DATA_TYPE_FLOAT_4; - break; - default: - debug_printf("r300: Implementation error: " - "Bad vertex data type!\n"); - break; - } - - return 0; -} - /* Update the vertex_info struct in our r300_context. * * The vertex_info struct describes the post-TCL format of vertices. It is @@ -156,42 +132,31 @@ static void r300_update_vertex_layout(struct r300_context* r300) if (memcmp(&r300->vertex_info, &vinfo, sizeof(struct vertex_info))) { uint32_t temp; - -#define BORING_SWIZZLE \ - ((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | \ - (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | \ - (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | \ - (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | \ - (0xf << R300_WRITE_ENA_SHIFT)) + debug_printf("attrib count: %d, fp input count: %d\n", + vinfo.num_attribs, info->num_inputs); + for (i = 0; i < vinfo.num_attribs; i++) { + debug_printf("attrib: offset %d, interp %d, size %d," + " tab %d\n", vinfo.attrib[i].src_index, + vinfo.attrib[i].interp_mode, vinfo.attrib[i].emit, + tab[i]); + } for (i = 0; i < vinfo.num_attribs; i++) { /* Make sure we have a proper destination for our attribute */ - if (tab[i] == -1) { - debug_printf("attrib count: %d, fp input count: %d\n", - vinfo.num_attribs, info->num_inputs); - for (i = 0; i < vinfo.num_attribs; i++) { - debug_printf("attrib: offset %d, interp %d, size %d," - " tab %d\n", vinfo.attrib[i].src_index, - vinfo.attrib[i].interp_mode, vinfo.attrib[i].emit, - tab[i]); - } - assert(0); - } + assert(tab[i] == -1); temp = translate_vertex_data_type(vinfo.attrib[i].emit) | - (tab[i] << R300_DST_VEC_LOC_SHIFT) | R300_SIGNED; + (tab[i] << R300_DST_VEC_LOC_SHIFT); if (i & 1) { - r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff; - r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= - temp << 16; + r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0x0000ffff; + r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= temp << 16; } else { r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff0000; - r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= - temp; + r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= temp; } r300->vertex_info.vap_prog_stream_cntl_ext[i >> 1] |= - (BORING_SWIZZLE << (i & 1 ? 16 : 0)); + (R300_VAP_SWIZZLE_XYZW << (i & 1 ? 16 : 0)); } r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= (R300_LAST_VEC << (i & 1 ? 16 : 0)); diff --git a/src/gallium/drivers/r300/r300_state_derived.h b/src/gallium/drivers/r300/r300_state_derived.h index 72ba6b928d..63ae8eb8d0 100644 --- a/src/gallium/drivers/r300/r300_state_derived.h +++ b/src/gallium/drivers/r300/r300_state_derived.h @@ -27,6 +27,7 @@ #include "r300_context.h" #include "r300_reg.h" +#include "r300_state_inlines.h" void r300_update_derived_state(struct r300_context* r300); diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index 630ac3b2fc..8d8b74dfc1 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -344,4 +344,32 @@ static INLINE uint32_t r300_translate_gb_pipes(int pipe_count) return 0; } +static uint32_t translate_vertex_data_type(int type) { + switch (type) { + case EMIT_1F: + case EMIT_1F_PSIZE: + return R300_DATA_TYPE_FLOAT_1 | R300_SIGNED; + break; + case EMIT_2F: + return R300_DATA_TYPE_FLOAT_2 | R300_SIGNED; + break; + case EMIT_3F: + return R300_DATA_TYPE_FLOAT_3 | R300_SIGNED; + break; + case EMIT_4F: + return R300_DATA_TYPE_FLOAT_4 | R300_SIGNED; + break; + case EMIT_4UB: + return R300_DATA_TYPE_BYTE; + break; + default: + debug_printf("r300: Implementation error: " + "Bad vertex data type!\n"); + assert(0); + break; + } + + return 0; +} + #endif /* R300_STATE_INLINES_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 9f81e2e730..2040967253 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -72,7 +72,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(112 + (caps->has_tcl ? 2 : 0)); + BEGIN_CS(106 + (caps->has_tcl ? 2 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -80,8 +80,6 @@ static void r300_surface_fill(struct pipe_context* pipe, R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT); - /* Vertex size. */ - OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); /* Max and min vertex index clamp. */ OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF); OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); @@ -145,11 +143,14 @@ static void r300_surface_fill(struct pipe_context* pipe, ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); } - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688); + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, + (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE0_SHIFT) | + (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE1_SHIFT)); OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); - OUT_CS_REG(R300_VAP_VTX_SIZE, 0x00000008); + /* Vertex size. */ + OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); -- cgit v1.2.3 From 709ebabb26e20c171741338a3a9e9626ae87aa87 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 7 Mar 2009 00:51:11 -0800 Subject: r300-gallium: Emit vertex size. Not actually going to make a difference right now, but might as well. --- src/gallium/drivers/r300/r300_emit.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 4e82c322df..f55093f41d 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -265,7 +265,9 @@ void r300_emit_vertex_format_state(struct r300_context* r300) CS_LOCALS(r300); int i; - BEGIN_CS(24); + BEGIN_CS(26); + OUT_CS_REG(R300_VAP_VTX_SIZE, r300->vertex_info.vinfo.size); + OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2); OUT_CS(r300->vertex_info.vinfo.hwfmt[0]); OUT_CS(r300->vertex_info.vinfo.hwfmt[1]); -- cgit v1.2.3 From ec1476bf31f00f5091e2a568b277962d8b667248 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 7 Mar 2009 00:55:10 -0800 Subject: r300-gallium: Typo in assert. --- src/gallium/drivers/r300/r300_state_derived.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index d15b4ff2e1..e6bb4083ab 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -143,7 +143,7 @@ static void r300_update_vertex_layout(struct r300_context* r300) for (i = 0; i < vinfo.num_attribs; i++) { /* Make sure we have a proper destination for our attribute */ - assert(tab[i] == -1); + assert(tab[i] != -1); temp = translate_vertex_data_type(vinfo.attrib[i].emit) | (tab[i] << R300_DST_VEC_LOC_SHIFT); -- cgit v1.2.3 From 826297462571350b7da7ae88bb4405212991c533 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 7 Mar 2009 01:53:42 -0800 Subject: r300-gallium: Move a few registers. These shouldn't be written if not on TCL HW. --- src/gallium/drivers/r300/r300_state_invariant.c | 12 +++++++++--- src/gallium/drivers/r300/r300_surface.c | 20 ++++++++------------ 2 files changed, 17 insertions(+), 15 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index c7c20c2de5..5646d22835 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -34,9 +34,8 @@ void r300_emit_invariant_state(struct r300_context* r300) struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; CS_LOCALS(r300); - BEGIN_CS(26); - /* Amount of time to wait for vertex fetches in PVS */ - OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); + BEGIN_CS(24 + (caps->has_tcl ? 2: 0)); + /* Various GB enables */ OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | R300_GB_LINE_STUFF_ENABLE | R300_GB_TRIANGLE_STUFF_ENABLE); @@ -69,5 +68,12 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x00000000); OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); + + /* TCL-only stuff */ + if (caps->has_tcl) { + /* Amount of time to wait for vertex fetches in PVS */ + OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); + } + END_CS; } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 2040967253..e7ba06fa3c 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -72,7 +72,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(106 + (caps->has_tcl ? 2 : 0)); + BEGIN_CS(99 + (caps->has_tcl ? 9 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -86,6 +86,13 @@ static void r300_surface_fill(struct pipe_context* pipe, /* XXX endian */ if (caps->has_tcl) { OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); + OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE | + R300_PS_UCP_MODE_CLIP_AS_TRIFAN); + OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); } else { OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP | R300_VAP_TCL_BYPASS); @@ -93,12 +100,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); /* XXX magic number not in r300_reg */ OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); - OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0); - OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); - OUT_CS_32F(1.0); - OUT_CS_32F(1.0); - OUT_CS_32F(1.0); - OUT_CS_32F(1.0); /* XXX point tex stuffing */ OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); OUT_CS_32F(0.0); @@ -164,11 +165,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(1.0); OUT_CS_32F(0.0); - if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE | - R300_PS_UCP_MODE_CLIP_AS_TRIFAN); - } - /* XXX */ OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); END_CS; -- cgit v1.2.3 From 46de433d27c0fab87ed917af63559846c0d33bad Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 7 Mar 2009 11:31:36 -0800 Subject: r300-gallium: Clean up RS. Wow, there were buggies by the boatload in there. --- src/gallium/drivers/r300/r300_context.h | 4 ++ src/gallium/drivers/r300/r300_state_derived.c | 66 +++++++++++++++++++++------ 2 files changed, 56 insertions(+), 14 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 95b3b14a1a..f22569e6fe 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -208,6 +208,10 @@ struct r300_vertex_format { uint32_t vap_prog_stream_cntl[8]; /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */ uint32_t vap_prog_stream_cntl_ext[8]; + /* This is a map of VAP/SW TCL outputs into the GA/RS. + * tab[i] is the location of input i in GA/RS input memory. + * Named tab for historical reasons. */ + int tab[16]; }; struct r300_context { diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index e6bb4083ab..feb0faa13c 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -93,15 +93,18 @@ static void r300_update_vertex_layout(struct r300_context* r300) tab[i] = tab[i-1]; } tab[0] = 0; - } - draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_POS, - draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_POS, + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); + } else { + draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); + } vinfo.hwfmt[1] |= R300_INPUT_CNTL_POS; vinfo.hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; if (psize) { - draw_emit_vertex_attr(&vinfo, EMIT_1F_PSIZE, INTERP_LINEAR, + draw_emit_vertex_attr(&vinfo, EMIT_1F_PSIZE, INTERP_POS, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_PSIZE, 0)); vinfo.hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; } @@ -161,6 +164,7 @@ static void r300_update_vertex_layout(struct r300_context* r300) r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= (R300_LAST_VEC << (i & 1 ? 16 : 0)); + memcpy(r300->vertex_info.tab, tab, sizeof(tab)); memcpy(&r300->vertex_info, &vinfo, sizeof(struct vertex_info)); r300->dirty_state |= R300_NEW_VERTEX_FORMAT; } @@ -173,30 +177,44 @@ static void r300_update_rs_block(struct r300_context* r300) { struct r300_rs_block* rs = r300->rs_block; struct vertex_info* vinfo = &r300->vertex_info.vinfo; - int col_count = 0, fp_offset = 0, i, tex_count = 0; + int* tab = r300->vertex_info.tab; + int col_count = 0, fp_offset = 0, i, memory_pos, tex_count = 0; memset(rs, 0, sizeof(struct r300_rs_block)); if (r300_screen(r300->context.screen)->caps->is_r500) { for (i = 0; i < vinfo->num_attribs; i++) { + assert(tab[vinfo->attrib[i].src_index] != -1); + memory_pos = tab[vinfo->attrib[i].src_index] * 4; switch (vinfo->attrib[i].interp_mode) { case INTERP_LINEAR: rs->ip[col_count] |= - R500_RS_COL_PTR(vinfo->attrib[i].src_index) | + R500_RS_COL_PTR(memory_pos) | R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA); col_count++; break; case INTERP_PERSPECTIVE: rs->ip[tex_count] |= - R500_RS_SEL_S(vinfo->attrib[i].src_index) | - R500_RS_SEL_T(vinfo->attrib[i].src_index + 1) | - R500_RS_SEL_R(vinfo->attrib[i].src_index + 2) | - R500_RS_SEL_Q(vinfo->attrib[i].src_index + 3); + R500_RS_SEL_S(memory_pos) | + R500_RS_SEL_T(memory_pos + 1) | + R500_RS_SEL_R(memory_pos + 2) | + R500_RS_SEL_Q(memory_pos + 3); tex_count++; break; + default: + break; } } + /* Set up at least one texture pointer or RS will not be happy. */ + if (tex_count == 0) { + rs->ip[0] |= + R500_RS_SEL_S(R500_RS_IP_PTR_K0) | + R500_RS_SEL_T(R500_RS_IP_PTR_K0) | + R500_RS_SEL_R(R500_RS_IP_PTR_K0) | + R500_RS_SEL_Q(R500_RS_IP_PTR_K1); + } + for (i = 0; i < tex_count; i++) { rs->inst[i] |= R500_RS_INST_TEX_ID(i) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_offset); @@ -212,25 +230,40 @@ static void r300_update_rs_block(struct r300_context* r300) rs->inst_count = MAX2(col_count, tex_count); } else { for (i = 0; i < vinfo->num_attribs; i++) { + memory_pos = tab[vinfo->attrib[i].src_index] * 4; + assert(tab[vinfo->attrib[i].src_index] != -1); switch (vinfo->attrib[i].interp_mode) { case INTERP_LINEAR: rs->ip[col_count] |= - R300_RS_COL_PTR(vinfo->attrib[i].src_index) | + R300_RS_COL_PTR(memory_pos) | R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA); col_count++; break; case INTERP_PERSPECTIVE: rs->ip[tex_count] |= - R300_RS_TEX_PTR(vinfo->attrib[i].src_index) | + R300_RS_TEX_PTR(memory_pos) | R300_RS_SEL_S(R300_RS_SEL_C0) | R300_RS_SEL_T(R300_RS_SEL_C1) | R300_RS_SEL_R(R300_RS_SEL_C2) | R300_RS_SEL_Q(R300_RS_SEL_C3); - tex_count += 4; + tex_count++; + break; + default: break; } } + if (tex_count == 0) { + rs->ip[0] |= + R300_RS_SEL_S(R300_RS_SEL_K0) | + R300_RS_SEL_T(R300_RS_SEL_K0) | + R300_RS_SEL_R(R300_RS_SEL_K0) | + R300_RS_SEL_Q(R300_RS_SEL_K1); + } + + for (i = 0; i < 8; i++) + debug_printf("ip %d: 0x%x\n", i, rs->ip[i]); + for (i = 0; i < tex_count; i++) { rs->inst[i] |= R300_RS_INST_TEX_ID(i) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_offset); @@ -242,12 +275,17 @@ static void r300_update_rs_block(struct r300_context* r300) R300_RS_INST_COL_ADDR(fp_offset); fp_offset++; } + + for (i = 0; i < 8; i++) + debug_printf("inst %d: 0x%x\n", i, rs->inst[i]); } rs->count = (tex_count * 4) | (col_count << R300_IC_COUNT_SHIFT) | R300_HIRES_EN; - rs->inst_count = MAX2(col_count, tex_count); + rs->inst_count = MAX2(MAX2(col_count - 1, tex_count - 1), 0); + + debug_printf("count: 0x%x, inst_count: 0x%x\n", rs->count, rs->inst_count); } void r300_update_derived_state(struct r300_context* r300) -- cgit v1.2.3 From 2305642b2e8edcebdc727f1181f7dbfcc78e8028 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 7 Mar 2009 13:26:48 -0800 Subject: r300-gallium: Correct vertex format setup, cleanup regs and debugging. trivial/point no longer hardlocks. --- src/gallium/drivers/r300/r300_emit.c | 7 ++++++- src/gallium/drivers/r300/r300_state_derived.c | 12 ++---------- src/gallium/drivers/r300/r300_state_inlines.h | 8 ++++---- src/gallium/drivers/r300/r300_surface.c | 3 +-- 4 files changed, 13 insertions(+), 17 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index f55093f41d..da5f2058c5 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -160,7 +160,7 @@ void r300_emit_fb_state(struct r300_context* r300, struct r300_texture* tex; int i; - BEGIN_CS((5 * fb->nr_cbufs) + (fb->zsbuf ? 5 : 0) + 4); + BEGIN_CS((6 * fb->nr_cbufs) + (fb->zsbuf ? 5 : 0) + 4); for (i = 0; i < fb->nr_cbufs; i++) { tex = (struct r300_texture*)fb->cbufs[i]->texture; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); @@ -336,6 +336,11 @@ void r300_emit_dirty_state(struct r300_context* r300) r300->dirty_state &= ~R300_NEW_RASTERIZER; } + if (r300->dirty_state & R300_NEW_RS_BLOCK) { + r300_emit_rs_block_state(r300, r300->rs_block); + r300->dirty_state &= ~R300_NEW_RS_BLOCK; + } + if (r300->dirty_state & R300_NEW_SCISSOR) { r300_emit_scissor_state(r300, r300->scissor_state); r300->dirty_state &= ~R300_NEW_SCISSOR; diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index feb0faa13c..7693f2c433 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -161,6 +161,8 @@ static void r300_update_vertex_layout(struct r300_context* r300) r300->vertex_info.vap_prog_stream_cntl_ext[i >> 1] |= (R300_VAP_SWIZZLE_XYZW << (i & 1 ? 16 : 0)); } + /* Set the last vector. */ + i--; r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= (R300_LAST_VEC << (i & 1 ? 16 : 0)); @@ -226,8 +228,6 @@ static void r300_update_rs_block(struct r300_context* r300) R500_RS_INST_COL_ADDR(fp_offset); fp_offset++; } - - rs->inst_count = MAX2(col_count, tex_count); } else { for (i = 0; i < vinfo->num_attribs; i++) { memory_pos = tab[vinfo->attrib[i].src_index] * 4; @@ -261,9 +261,6 @@ static void r300_update_rs_block(struct r300_context* r300) R300_RS_SEL_Q(R300_RS_SEL_K1); } - for (i = 0; i < 8; i++) - debug_printf("ip %d: 0x%x\n", i, rs->ip[i]); - for (i = 0; i < tex_count; i++) { rs->inst[i] |= R300_RS_INST_TEX_ID(i) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_offset); @@ -275,17 +272,12 @@ static void r300_update_rs_block(struct r300_context* r300) R300_RS_INST_COL_ADDR(fp_offset); fp_offset++; } - - for (i = 0; i < 8; i++) - debug_printf("inst %d: 0x%x\n", i, rs->inst[i]); } rs->count = (tex_count * 4) | (col_count << R300_IC_COUNT_SHIFT) | R300_HIRES_EN; rs->inst_count = MAX2(MAX2(col_count - 1, tex_count - 1), 0); - - debug_printf("count: 0x%x, inst_count: 0x%x\n", rs->count, rs->inst_count); } void r300_update_derived_state(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index 8d8b74dfc1..cd3a4313f7 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -348,16 +348,16 @@ static uint32_t translate_vertex_data_type(int type) { switch (type) { case EMIT_1F: case EMIT_1F_PSIZE: - return R300_DATA_TYPE_FLOAT_1 | R300_SIGNED; + return R300_DATA_TYPE_FLOAT_1; break; case EMIT_2F: - return R300_DATA_TYPE_FLOAT_2 | R300_SIGNED; + return R300_DATA_TYPE_FLOAT_2; break; case EMIT_3F: - return R300_DATA_TYPE_FLOAT_3 | R300_SIGNED; + return R300_DATA_TYPE_FLOAT_3; break; case EMIT_4F: - return R300_DATA_TYPE_FLOAT_4 | R300_SIGNED; + return R300_DATA_TYPE_FLOAT_4; break; case EMIT_4UB: return R300_DATA_TYPE_BYTE; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index e7ba06fa3c..b607b98a02 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -72,7 +72,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(99 + (caps->has_tcl ? 9 : 0)); + BEGIN_CS(97 + (caps->has_tcl ? 9 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -97,7 +97,6 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP | R300_VAP_TCL_BYPASS); } - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0); /* XXX magic number not in r300_reg */ OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); /* XXX point tex stuffing */ -- cgit v1.2.3 From 40ca02a0450af6ba281f28901d65225409080313 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 8 Mar 2009 15:04:10 -0700 Subject: r300-gallium: Unbreak trivial/point. Oops, forgot to remove that. Edit: And trivial/line and trivial/tri. --- src/gallium/drivers/r300/r300_swtcl_emit.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index 7f0fc02971..3db09514c6 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -214,8 +214,6 @@ static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, CS_LOCALS(r300); - count /= 4; - r300render->vbo_offset = start; prepare_render(r300render, count); -- cgit v1.2.3 From c9da0283e7a9b95df7762b519f6fe5b89f17ae95 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 10 Mar 2009 00:10:24 -0700 Subject: r300-gallium: Moar fixes in the register file. Sorry, but it's confusing when format0 in r300_reg != format0 in the docs. --- src/gallium/drivers/r300/r300_reg.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 321f587374..4d7345a02d 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1439,18 +1439,21 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R500_MACRO_SWITCH (1<<22) # define R500_BORDER_FIX (1<<31) -#define R300_TX_SIZE_0 0x4480 +#define R300_TX_FORMAT0_0 0x4480 # define R300_TX_WIDTHMASK_SHIFT 0 # define R300_TX_WIDTHMASK_MASK (2047 << 0) # define R300_TX_HEIGHTMASK_SHIFT 11 # define R300_TX_HEIGHTMASK_MASK (2047 << 11) -# define R300_TX_DEPTHMASK_SHIFT 22 -# define R300_TX_DEPTHMASK_MASK (0xf << 22) +# define R300_TX_DEPTHMASK_SHIFT 22 +# define R300_TX_DEPTHMASK_MASK (0xf << 22) # define R300_TX_MAX_MIP_LEVEL_SHIFT 26 # define R300_TX_MAX_MIP_LEVEL_MASK (0xf << 26) -# define R300_TX_SIZE_PROJECTED (1<<30) -# define R300_TX_SIZE_TXPITCH_EN (1<<31) -#define R300_TX_FORMAT_0 0x44C0 +# define R300_TX_SIZE_PROJECTED (1 << 30) +# define R300_TX_PITCH_EN (1 << 31) +# define R300_TX_WIDTH(x) ((x) << 0) +# define R300_TX_HEIGHT(x) ((x) << 11) + +#define R300_TX_FORMAT1_0 0x44C0 /* The interpretation of the format word by Wladimir van der Laan */ /* The X, Y, Z and W refer to the layout of the components. They are given meanings as R, G, B and Alpha by the swizzle -- cgit v1.2.3 From 9d9e0815be41fa72ff5df6752b02551b648b33b6 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 10 Mar 2009 00:27:13 -0700 Subject: r300-gallium: First stab at texture support. --- src/gallium/drivers/r300/r300_context.h | 9 ++++++- src/gallium/drivers/r300/r300_emit.c | 47 ++++++++++++++++++++++++++++++++- src/gallium/drivers/r300/r300_texture.c | 34 ++++++++++++++++++++++-- src/gallium/drivers/r300/r300_texture.h | 1 + 4 files changed, 87 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index f22569e6fe..e032a30906 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -96,6 +96,9 @@ struct r300_scissor_state { }; struct r300_texture_state { + uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */ + uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */ + uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */ }; #define R300_NEW_BLEND 0x0000001 @@ -107,8 +110,10 @@ struct r300_texture_state { #define R300_NEW_RASTERIZER 0x0000040 #define R300_NEW_RS_BLOCK 0x0000080 #define R300_NEW_SAMPLER 0x0000100 +#define R300_ANY_NEW_SAMPLERS 0x000ff00 #define R300_NEW_SCISSOR 0x0010000 #define R300_NEW_TEXTURE 0x0020000 +#define R300_ANY_NEW_TEXTURES 0x1fe0000 #define R300_NEW_VERTEX_FORMAT 0x2000000 #define R300_NEW_VERTEX_SHADER 0x4000000 #define R300_NEW_KITCHEN_SINK 0x7ffffff @@ -199,6 +204,9 @@ struct r300_texture { /* Pipe buffer backing this texture. */ struct pipe_buffer* buffer; + + /* Registers carrying texture format data. */ + struct r300_texture_state state; }; struct r300_vertex_format { @@ -247,7 +255,6 @@ struct r300_context { struct r300_scissor_state* scissor_state; /* Texture states. */ struct r300_texture* textures[8]; - struct r300_texture_state* texture_states[8]; int texture_count; /* Vertex buffers. */ struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS]; diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index da5f2058c5..1c4a7d9aa0 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -248,6 +248,18 @@ void r300_emit_rs_block_state(struct r300_context* r300, END_CS; } +void r300_emit_sampler(struct r300_context* r300, + struct r300_sampler_state* sampler, unsigned offset) +{ + CS_LOCALS(r300); + + BEGIN_CS(6); + OUT_CS_REG(R300_TX_FILTER0_0 + (offset * 4), sampler->filter0); + OUT_CS_REG(R300_TX_FILTER1_0 + (offset * 4), sampler->filter1); + OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (offset * 4), sampler->border_color); + END_CS; +} + void r300_emit_scissor_state(struct r300_context* r300, struct r300_scissor_state* scissor) { @@ -260,6 +272,21 @@ void r300_emit_scissor_state(struct r300_context* r300, END_CS; } +void r300_emit_texture(struct r300_context* r300, + struct r300_texture* tex, unsigned offset) +{ + CS_LOCALS(r300); + + BEGIN_CS(8); + OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), tex->state.format0); + OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1); + OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2); + OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (offset * 4), 1); + OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_GTT | + RADEON_GEM_DOMAIN_VRAM, 0); + END_CS; +} + void r300_emit_vertex_format_state(struct r300_context* r300) { CS_LOCALS(r300); @@ -290,7 +317,7 @@ void r300_emit_vertex_format_state(struct r300_context* r300) void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = r300_screen(r300->context.screen); - CS_LOCALS(r300); + int i; if (!(r300->dirty_state) && !(r300->dirty_hw)) { return; @@ -341,11 +368,29 @@ void r300_emit_dirty_state(struct r300_context* r300) r300->dirty_state &= ~R300_NEW_RS_BLOCK; } + if (r300->dirty_state & R300_ANY_NEW_SAMPLERS) { + for (i = 0; i < r300->sampler_count; i++) { + if (r300->dirty_state & (R300_NEW_SAMPLER << i)) { + r300_emit_sampler(r300, r300->sampler_states[i], i); + r300->dirty_state &= ~(R300_NEW_SAMPLER << i); + } + } + } + if (r300->dirty_state & R300_NEW_SCISSOR) { r300_emit_scissor_state(r300, r300->scissor_state); r300->dirty_state &= ~R300_NEW_SCISSOR; } + if (r300->dirty_state & R300_ANY_NEW_TEXTURES) { + for (i = 0; i < r300->texture_count; i++) { + if (r300->dirty_state & (R300_NEW_TEXTURE << i)) { + r300_emit_texture(r300, r300->textures[i], i); + r300->dirty_state &= ~(R300_NEW_TEXTURE << i); + } + } + } + if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) { r300_emit_vertex_format_state(r300); r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT; diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index b7027553b5..ae388c7360 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -27,6 +27,30 @@ static int minify(int i) return MAX2(1, i >> 1); } +static void r300_setup_texture_state(struct r300_texture* tex, + unsigned width, + unsigned height, + unsigned pitch) +{ + struct r300_texture_state* state = &tex->state; + + state->format0 = R300_TX_WIDTH((width - 1) & 0x7ff) | + R300_TX_HEIGHT((height - 1) & 0x7ff) | R300_TX_PITCH_EN; + + /* XXX */ + state->format1 = R300_TX_FORMAT_A8R8G8B8; + + state->format2 = pitch - 1; + + /* XXX + if (width > 2048) { + state->pitch |= R300_TXWIDTH_11; + } + if (height > 2048) { + state->pitch |= R300_TXHEIGHT_11; + } */ +} + static void r300_setup_miptree(struct r300_texture* tex) { struct pipe_texture* base = &tex->tex; @@ -44,11 +68,10 @@ static void r300_setup_miptree(struct r300_texture* tex) base->nblocksy[i] = pf_get_nblocksy(&base->block, base->width[i]); /* Radeons enjoy things in multiples of 32. */ - /* XXX NPOT -> 64, not 32 */ + /* XXX this can be 32 when POT */ stride = (base->nblocksx[i] * base->block.size + 63) & ~63; size = stride * base->nblocksy[i] * base->depth[i]; - /* XXX 64 for NPOT */ tex->offset[i] = (tex->size + 63) & ~63; tex->size = tex->offset[i] + size; } @@ -73,6 +96,10 @@ static struct pipe_texture* r300_setup_miptree(tex); + /* XXX */ + r300_setup_texture_state(tex, tex->tex.width[0], tex->tex.height[0], + tex->tex.width[0]); + tex->buffer = screen->buffer_create(screen, 64, PIPE_BUFFER_USAGE_PIXEL, tex->size); @@ -153,6 +180,9 @@ static struct pipe_texture* tex->stride = *stride; + r300_setup_texture_state(tex, tex->tex.width[0], tex->tex.height[0], + tex->stride); + pipe_buffer_reference(&tex->buffer, buffer); return (struct pipe_texture*)tex; diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h index 27f5ea1eb7..98fb5c9a08 100644 --- a/src/gallium/drivers/r300/r300_texture.h +++ b/src/gallium/drivers/r300/r300_texture.h @@ -28,6 +28,7 @@ #include "util/u_math.h" #include "r300_context.h" +#include "r300_reg.h" void r300_init_screen_texture_functions(struct pipe_screen* screen); -- cgit v1.2.3 From b7219853af66085d859468e91606ae4ee5bae28e Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 10 Mar 2009 00:14:56 -0700 Subject: r300-gallium: Fix a handful of compiler warnings. Missing INLINE, missing declarations, extraneous definitions. The usual. --- src/gallium/drivers/r300/r300_emit.c | 13 ++++++++++++- src/gallium/drivers/r300/r300_emit.h | 4 ++++ src/gallium/drivers/r300/r300_state_inlines.h | 2 +- 3 files changed, 17 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 1c4a7d9aa0..ad65832ab3 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -193,7 +193,6 @@ void r300_emit_fb_state(struct r300_context* r300, void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) { - struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); BEGIN_CS(20); @@ -313,6 +312,16 @@ void r300_emit_vertex_format_state(struct r300_context* r300) END_CS; } +static void r300_flush_textures(struct r300_context* r300) +{ + CS_LOCALS(r300); + + BEGIN_CS(4); + OUT_CS_REG(R300_TX_INVALTAGS, 0); + OUT_CS_REG(R300_TX_ENABLE, (1 << r300->texture_count) - 1); + END_CS; +} + /* Emit all dirty state. */ void r300_emit_dirty_state(struct r300_context* r300) { @@ -374,6 +383,7 @@ void r300_emit_dirty_state(struct r300_context* r300) r300_emit_sampler(r300, r300->sampler_states[i], i); r300->dirty_state &= ~(R300_NEW_SAMPLER << i); } + r300_flush_textures(r300); } } @@ -388,6 +398,7 @@ void r300_emit_dirty_state(struct r300_context* r300) r300_emit_texture(r300, r300->textures[i], i); r300->dirty_state &= ~(R300_NEW_TEXTURE << i); } + r300_flush_textures(r300); } } diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index f21ca33171..4aba1ee08c 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -49,9 +49,13 @@ void r300_emit_fb_state(struct r300_context* r300, void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs); +void r300_emit_rs_block_state(struct r300_context* r300, + struct r300_rs_block* rs); + void r300_emit_scissor_state(struct r300_context* r300, struct r300_scissor_state* scissor); +void r300_emit_vertex_format_state(struct r300_context* r300); /* Emit all dirty state. */ void r300_emit_dirty_state(struct r300_context* r300); diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index cd3a4313f7..4b3183471a 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -344,7 +344,7 @@ static INLINE uint32_t r300_translate_gb_pipes(int pipe_count) return 0; } -static uint32_t translate_vertex_data_type(int type) { +static INLINE uint32_t translate_vertex_data_type(int type) { switch (type) { case EMIT_1F: case EMIT_1F_PSIZE: -- cgit v1.2.3 From 8dbe4f0c356edacf479ceed106f68fa79f1668ed Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 10 Mar 2009 00:55:26 -0700 Subject: r300-gallium: Unbreak fallback in surface_fill. --- src/gallium/drivers/r300/r300_surface.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index b607b98a02..938a521b87 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -47,14 +47,11 @@ static void r300_surface_fill(struct pipe_context* pipe, dest, x, y, w, h, pixpitch, color); /* Fallback? */ - /*if (0) { + if (tex->tex.format != PIPE_FORMAT_A8R8G8B8_UNORM) { debug_printf("r300: Falling back on surface clear..."); - void* map = pipe->screen->surface_map(pipe->screen, dest, - PIPE_BUFFER_USAGE_CPU_WRITE); - pipe_fill_rect(map, &dest->block, &dest->stride, x, y, w, h, color); - pipe->screen->surface_unmap(pipe->screen, dest); + util_surface_fill(pipe, dest, x, y, w, h, color); return; - }*/ + } r300_emit_invariant_state(r300); -- cgit v1.2.3 From d559796d6f13579ecf921a63d9f0c6c6342dc230 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 10 Mar 2009 01:54:24 -0700 Subject: r300-gallium: Initial, broken, query setup. Not going to bother unbreaking it here until it's unbroken elsewhere. --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_context.c | 2 + src/gallium/drivers/r300/r300_context.h | 1 + src/gallium/drivers/r300/r300_query.c | 74 +++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_query.h | 41 ++++++++++++++++++ src/gallium/drivers/r300/r300_screen.c | 3 +- 6 files changed, 120 insertions(+), 2 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_query.c create mode 100644 src/gallium/drivers/r300/r300_query.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index a0fd17bd59..4c400bff58 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -9,6 +9,7 @@ C_SOURCES = \ r300_context.c \ r300_emit.c \ r300_flush.c \ + r300_query.c \ r300_screen.c \ r300_state.c \ r300_state_derived.c \ diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 653d919ef1..1affcbfdf4 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -133,6 +133,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300_init_flush_functions(r300); + r300_init_query_functions(r300); + r300_init_surface_functions(r300); r300_init_state_functions(r300); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index e032a30906..96d923d6f1 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -30,6 +30,7 @@ #include "util/u_memory.h" #include "r300_clear.h" +#include "r300_query.h" #include "r300_screen.h" #include "r300_winsys.h" diff --git a/src/gallium/drivers/r300/r300_query.c b/src/gallium/drivers/r300/r300_query.c new file mode 100644 index 0000000000..e09af2cfce --- /dev/null +++ b/src/gallium/drivers/r300/r300_query.c @@ -0,0 +1,74 @@ +/* + * Copyright 2009 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_query.h" + +static struct pipe_query* r300_create_query(struct pipe_context* pipe, + unsigned query_type) +{ + struct r300_query* q = CALLOC_STRUCT(r300_query); + + q->type = query_type; + assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); + + return (struct pipe_query*)q; +} + +static void r300_destroy_query(struct pipe_context* pipe, + struct pipe_query* q) +{ + FREE(q); +} + +static void r300_begin_query(struct pipe_context* pipe, + struct pipe_query* q) +{ + struct r300_context* r300 = r300_context(pipe); + CS_LOCALS(r300); + + BEGIN_CS(2); + OUT_CS_REG(R300_ZB_ZPASS_DATA, 0); + END_CS; +} + +static void r300_end_query(struct pipe_context* pipe, + struct pipe_query* q) +{ + struct r300_context* r300 = r300_context(pipe); +} + +static boolean r300_get_query_result(struct pipe_context* pipe, + struct pipe_query* q, + boolean wait, + uint64_t* result) +{ + *result = 0; + return TRUE; +} + +void r300_init_query_functions(struct r300_context* r300) { + r300->context.create_query = r300_create_query; + r300->context.destroy_query = r300_destroy_query; + r300->context.begin_query = r300_begin_query; + r300->context.end_query = r300_end_query; + r300->context.get_query_result = r300_get_query_result; +} diff --git a/src/gallium/drivers/r300/r300_query.h b/src/gallium/drivers/r300/r300_query.h new file mode 100644 index 0000000000..0097870287 --- /dev/null +++ b/src/gallium/drivers/r300/r300_query.h @@ -0,0 +1,41 @@ +/* + * Copyright 2009 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_QUERY_H +#define R300_QUERY_H + +#include "r300_context.h" +#include "r300_cs.h" +#include "r300_reg.h" + +struct r300_query { + unsigned type; +}; + +static INLINE struct r300_query* r300_query(struct pipe_query* q) +{ + return (struct r300_query*)q; +} + +void r300_init_query_functions(struct r300_context* r300); + +#endif /* R300_QUERY_H */ diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 3c91967a72..d2c5998c26 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -103,8 +103,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) case PIPE_CAP_MAX_RENDER_TARGETS: return 4; case PIPE_CAP_OCCLUSION_QUERY: - /* IN THEORY */ - return 0; + return 1; case PIPE_CAP_TEXTURE_SHADOW_MAP: /* IN THEORY */ return 0; -- cgit v1.2.3 From 8b212503052b767561d85108c435f375e0228f44 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 10 Mar 2009 15:40:41 -0700 Subject: r300-gallium: Begin R500 fragment shader assembler. I love it so much. I also hate it a lot. --- src/gallium/drivers/r300/r300_state_shader.c | 132 ++++++++++++++++++++++++++- src/gallium/drivers/r300/r300_state_shader.h | 15 +++ 2 files changed, 144 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index d10ac55580..7165efdc19 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -40,14 +40,140 @@ static void r500_copy_passthrough_shader(struct r500_fragment_shader* fs) fs->instructions[0] = pt->instructions[0]; } +static void r300_fs_declare(struct r300_fs_asm* assembler, + struct tgsi_full_declaration* decl) +{ + switch (decl->Declaration.File) { + case TGSI_FILE_INPUT: + switch (decl->Semantic.SemanticName) { + case TGSI_SEMANTIC_COLOR: + assembler->color_count++; + break; + case TGSI_SEMANTIC_GENERIC: + assembler->tex_count++; + break; + default: + debug_printf("r300: fs: Bad semantic declaration %d\n", + decl->Semantic.SemanticName); + break; + } + break; + case TGSI_FILE_OUTPUT: + break; + default: + debug_printf("r300: fs: Bad file %d\n", decl->Declaration.File); + break; + } + + assembler->temp_offset = assembler->color_count + assembler->tex_count; +} + +static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst) +{ + int i = fs->instruction_count; + fs->instructions[i].inst0 = R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; + fs->instructions[i].inst1 = + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST; + fs->instructions[i].inst2 = + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST; + fs->instructions[i].inst3 = + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, + fs->instructions[i].inst4 = + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A; + fs->instructions[i].inst5 = + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0; + + fs->instruction_count++; +} + +static void r500_fs_instruction(struct r500_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_instruction* inst) +{ + /* Switch between opcodes. When possible, prefer using the official + * AMD/ATI names for opcodes, please, as it facilitates using the + * documentation. */ + switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_MOV: + r500_emit_mov(fs, assembler, &inst->FullSrcRegisters[0], + &inst->FullDstRegisters[0]); + break; + case TGSI_OPCODE_END: + break; + default: + debug_printf("r300: fs: Bad opcode %d\n", + inst->Instruction.Opcode); + break; + } +} + void r300_translate_fragment_shader(struct r300_context* r300, - struct r300_fragment_shader* fs) + struct r300_fragment_shader* fs) { + struct tgsi_parse_context parser; + + tgsi_parse_init(&parser, fs->shader.state.tokens); + + while (!tgsi_parse_end_of_tokens(&parser)) { + tgsi_parse_token(&parser); + } + r300_copy_passthrough_shader(fs); } void r500_translate_fragment_shader(struct r300_context* r300, - struct r500_fragment_shader* fs) + struct r500_fragment_shader* fs) { - r500_copy_passthrough_shader(fs); + struct r300_fs_asm* assembler = CALLOC_STRUCT(r300_fs_asm); + if (assembler == NULL) { + return; + } + struct tgsi_parse_context parser; + + tgsi_parse_init(&parser, fs->shader.state.tokens); + + while (!tgsi_parse_end_of_tokens(&parser)) { + tgsi_parse_token(&parser); + + /* This is seriously the lamest way to create fragment programs ever. + * I blame TGSI. */ + switch (parser.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_DECLARATION: + /* Allocated registers sitting at the beginning + * of the program. */ + r300_fs_declare(assembler, &parser.FullToken.FullDeclaration); + break; + case TGSI_TOKEN_TYPE_INSTRUCTION: + r500_fs_instruction(fs, assembler, + &parser.FullToken.FullInstruction); + } + + } + + debug_printf("%d texs and %d colors, first free reg is %d\n", + assembler->tex_count, assembler->color_count, + assembler->tex_count + assembler->color_count); + + /* XXX subtly wrong */ + fs->shader.stack_size = assembler->temp_offset; + + tgsi_dump(fs->shader.state.tokens); + + //r500_copy_passthrough_shader(fs); + + tgsi_parse_free(&parser); + FREE(assembler); } diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 73025b2dcc..333f0f5d05 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -23,10 +23,25 @@ #ifndef R300_STATE_SHADER_H #define R300_STATE_SHADER_H +#include "tgsi/tgsi_parse.h" + #include "r300_context.h" #include "r300_reg.h" #include "r300_screen.h" +/* Temporary struct used to hold assembly state while putting together + * fragment programs. */ +struct r300_fs_asm { + /* Number of colors. */ + unsigned color_count; + /* Number of texcoords. */ + unsigned tex_count; + /* Offset for temporary registers. Inputs and temporaries have no + * distinguishing markings, so inputs start at 0 and the first usable + * temporary register is after all inputs. */ + unsigned temp_offset; +}; + void r300_translate_fragment_shader(struct r300_context* r300, struct r300_fragment_shader* fs); -- cgit v1.2.3 From d13e4bd1cbb1ef1ef2ed69d24bc8da790a10bdd3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 10 Mar 2009 20:43:11 -0700 Subject: r300-gallium: Start swizzles. --- src/gallium/drivers/r300/r300_state_shader.c | 27 ++++++++++++++++++++------- src/gallium/drivers/r300/r300_state_shader.h | 23 +++++++++++++++++++++++ 2 files changed, 43 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 7165efdc19..65d5c5a596 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -68,6 +68,19 @@ static void r300_fs_declare(struct r300_fs_asm* assembler, assembler->temp_offset = assembler->color_count + assembler->tex_count; } +/* XXX cover extended cases */ +static INLINE uint32_t r500_rgb_swiz(struct tgsi_src_register* reg) +{ + uint32_t temp = reg->SwizzleX | (reg->SwizzleY << 3) | + (reg->SwizzleZ << 6); + return temp; +} + +static INLINE uint32_t r500_alpha_swiz(struct tgsi_src_register* reg) +{ + return reg->SwizzleZ; +} + static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, struct tgsi_full_src_register* src, @@ -84,13 +97,13 @@ static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, fs->instructions[i].inst2 = R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST; - fs->instructions[i].inst3 = - R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, - fs->instructions[i].inst4 = - R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A; + fs->instructions[i].inst3 = R500_ALU_RGB_SEL_A_SRC0 | + R500_SWIZ_RGB_A(r500_rgb_swiz(&src->SrcRegister)) | + R500_ALU_RGB_SEL_B_SRC0 | + R500_SWIZ_RGB_B(r500_rgb_swiz(&src->SrcRegister)); + fs->instructions[i].inst4 = R500_ALPHA_OP_CMP | + R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src->SrcRegister)) | + R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src->SrcRegister)); fs->instructions[i].inst5 = R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 333f0f5d05..410926a26a 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -29,6 +29,29 @@ #include "r300_reg.h" #include "r300_screen.h" +/* Swizzle tools */ +#define R500_SWIZZLE_ZERO 4 +#define R500_SWIZZLE_HALF 5 +#define R500_SWIZZLE_ONE 6 +#define R500_SWIZ_RGB_ZERO ((4 << 0) | (4 << 3) | (4 << 6)) +#define R500_SWIZ_RGB_ONE ((6 << 0) | (6 << 3) | (6 << 6)) +#define R500_SWIZ_RGB_RGB ((0 << 0) | (1 << 3) | (2 << 6)) +#define R500_SWIZ_MOD_NEG 1 +#define R500_SWIZ_MOD_ABS 2 +#define R500_SWIZ_MOD_NEG_ABS 3 +/* Swizzles for inst2 */ +#define R500_SWIZ_TEX_STRQ(x) (x << 8) +#define R500_SWIZ_TEX_RGBA(x) (x << 24) +/* Swizzles for inst3 */ +#define R500_SWIZ_RGB_A(x) (x << 2) +#define R500_SWIZ_RGB_B(x) (x << 15) +/* Swizzles for inst4 */ +#define R500_SWIZ_ALPHA_A(x) (x << 14) +#define R500_SWIZ_ALPHA_B(x) (x << 21) +/* Swizzle for inst5 */ +#define R500_SWIZ_RGBA_C(x) (x << 14) +#define R500_SWIZ_ALPHA_C(x) (x << 27) + /* Temporary struct used to hold assembly state while putting together * fragment programs. */ struct r300_fs_asm { -- cgit v1.2.3 From ddba20b064253f0556e078157ba6ff8f3250441b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 11 Mar 2009 03:24:19 -0700 Subject: r300-gallium: Fix CS count in fb state emit. --- src/gallium/drivers/r300/r300_emit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index ad65832ab3..4ffd92c9dc 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -160,7 +160,7 @@ void r300_emit_fb_state(struct r300_context* r300, struct r300_texture* tex; int i; - BEGIN_CS((6 * fb->nr_cbufs) + (fb->zsbuf ? 5 : 0) + 4); + BEGIN_CS((6 * fb->nr_cbufs) + (fb->zsbuf ? 6 : 0) + 4); for (i = 0; i < fb->nr_cbufs; i++) { tex = (struct r300_texture*)fb->cbufs[i]->texture; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); -- cgit v1.2.3 From 6b1596aed3fccc6f6edbbb931f8eca96a7163b9d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 11 Mar 2009 11:23:15 -0700 Subject: r300-gallium: r500-fs: Add SWZ. --- src/gallium/drivers/r300/r300_state_shader.c | 43 +++++++++++++++++++++------- 1 file changed, 32 insertions(+), 11 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 65d5c5a596..07705adaf4 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -68,17 +68,37 @@ static void r300_fs_declare(struct r300_fs_asm* assembler, assembler->temp_offset = assembler->color_count + assembler->tex_count; } -/* XXX cover extended cases */ -static INLINE uint32_t r500_rgb_swiz(struct tgsi_src_register* reg) +static INLINE unsigned r500_fix_swiz(unsigned s) { - uint32_t temp = reg->SwizzleX | (reg->SwizzleY << 3) | - (reg->SwizzleZ << 6); - return temp; + /* For historical reasons, the swizzle values x, y, z, w, and 0 are + * equivalent to the actual machine code, but 1 is not. Thus, we just + * adjust it a bit... */ + if (s == TGSI_EXTSWIZZLE_ONE) { + return R500_SWIZZLE_ONE; + } else { + return s; + } +} + +static INLINE uint32_t r500_rgb_swiz(struct tgsi_full_src_register* reg) +{ + if (reg->SrcRegister.Extended) { + return r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleX) | + (r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleY) << 3) | + (r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleZ) << 6); + } else { + return reg->SrcRegister.SwizzleX | (reg->SrcRegister.SwizzleY << 3) | + (reg->SrcRegister.SwizzleZ << 6); + } } -static INLINE uint32_t r500_alpha_swiz(struct tgsi_src_register* reg) +static INLINE uint32_t r500_alpha_swiz(struct tgsi_full_src_register* reg) { - return reg->SwizzleZ; + if (reg->SrcRegister.Extended) { + return r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleW); + } else { + return reg->SrcRegister.SwizzleW; + } } static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, @@ -98,12 +118,12 @@ static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST; fs->instructions[i].inst3 = R500_ALU_RGB_SEL_A_SRC0 | - R500_SWIZ_RGB_A(r500_rgb_swiz(&src->SrcRegister)) | + R500_SWIZ_RGB_A(r500_rgb_swiz(src)) | R500_ALU_RGB_SEL_B_SRC0 | - R500_SWIZ_RGB_B(r500_rgb_swiz(&src->SrcRegister)); + R500_SWIZ_RGB_B(r500_rgb_swiz(src)); fs->instructions[i].inst4 = R500_ALPHA_OP_CMP | - R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src->SrcRegister)) | - R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src->SrcRegister)); + R500_SWIZ_ALPHA_A(r500_alpha_swiz(src)) | + R500_SWIZ_ALPHA_B(r500_alpha_swiz(src)); fs->instructions[i].inst5 = R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | @@ -121,6 +141,7 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, * documentation. */ switch (inst->Instruction.Opcode) { case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SWZ: r500_emit_mov(fs, assembler, &inst->FullSrcRegisters[0], &inst->FullDstRegisters[0]); break; -- cgit v1.2.3 From ddf31d0e315faba6a9519cc12e4b480ede38deb2 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 11 Mar 2009 11:54:53 -0700 Subject: r300-gallium: Fix CS count for texture emit. --- src/gallium/drivers/r300/r300_emit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 4ffd92c9dc..68741e9f08 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -276,7 +276,7 @@ void r300_emit_texture(struct r300_context* r300, { CS_LOCALS(r300); - BEGIN_CS(8); + BEGIN_CS(10); OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), tex->state.format0); OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1); OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2); -- cgit v1.2.3 From c4c1774bbb08022846eefd14df683c7644f5e421 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 11 Mar 2009 14:26:25 -0700 Subject: r300-gallium: r500-fs: Add shader dumper and more tex work. --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_debug.c | 218 +++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_debug.h | 31 ++++ src/gallium/drivers/r300/r300_state_shader.c | 95 ++++++++++-- src/gallium/drivers/r300/r300_state_shader.h | 3 + 5 files changed, 335 insertions(+), 13 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_debug.c create mode 100644 src/gallium/drivers/r300/r300_debug.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 4c400bff58..0e4e115532 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -7,6 +7,7 @@ C_SOURCES = \ r300_chipset.c \ r300_clear.c \ r300_context.c \ + r300_debug.c \ r300_emit.c \ r300_flush.c \ r300_query.c \ diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c new file mode 100644 index 0000000000..4c6d2a2471 --- /dev/null +++ b/src/gallium/drivers/r300/r300_debug.c @@ -0,0 +1,218 @@ +/* + * Copyright 2009 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_debug.h" + +static char* r500_fs_swiz[] = { + " R", + " G", + " B", + " A", + " 0", + ".5", + " 1", + " U", +}; + +static char* r500_fs_op_rgb[] = { + "MAD", + "DP3", + "DP4", + "D2A", + "MIN", + "MAX", + "---", + "CND", + "CMP", + "FRC", + "SOP", + "MDH", + "MDV", +}; + +static char* r500_fs_op_alpha[] = { + "MAD", + " DP", + "MIN", + "MAX", + "---", + "CND", + "CMP", + "FRC", + "EX2", + "LN2", + "RCP", + "RSQ", + "SIN", + "COS", + "MDH", + "MDV", +}; + +static char* r500_fs_mask[] = { + "NONE", + "R ", + " G ", + "RG ", + " B ", + "R B ", + " GB ", + "RGB ", + " A", + "R A", + " G A", + "RG A", + " BA", + "R BA", + " GBA", + "RGBA", +}; + +static char* r500_fs_tex[] = { + " NOP", + " LD", + "TEXKILL", + " PROJ", + "LODBIAS", + " LOD", + " DXDY", +}; + +void r500_fs_dump(struct r500_fragment_shader* fs) +{ + int i; + uint32_t inst; + + for (i = 0; i < fs->instruction_count; i++) { + inst = fs->instructions[i].inst0; + debug_printf("%d: 0: CMN_INST 0x%08x:", i, inst); + switch (inst & 0x3) { + case R500_INST_TYPE_ALU: + debug_printf("ALU "); + break; + case R500_INST_TYPE_OUT: + debug_printf("OUT "); + break; + case R500_INST_TYPE_FC: + debug_printf("FC "); + break; + case R500_INST_TYPE_TEX: + debug_printf("TEX "); + break; + } + debug_printf("%s %s %s %s ", + inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "", + inst & R500_INST_LAST ? "LAST" : "", + inst & R500_INST_NOP ? "NOP" : "", + inst & R500_INST_ALU_WAIT ? "ALU_WAIT" : ""); + debug_printf("wmask: %s omask: %s\n", + r500_fs_mask[(inst >> 11) & 0xf], + r500_fs_mask[(inst >> 15) & 0xf]); + switch (inst & 0x3) { + case R500_INST_TYPE_ALU: + case R500_INST_TYPE_OUT: + inst = fs->instructions[i].inst1; + debug_printf(" 1: RGB_ADDR 0x%08x:", inst); + debug_printf("Addr0: %d%c, Addr1: %d%c, " + "Addr2: %d%c, srcp:%d\n", + inst & 0xff, (inst & (1 << 8)) ? 'c' : 't', + (inst >> 10) & 0xff, (inst & (1 << 18)) ? 'c' : 't', + (inst >> 20) & 0xff, (inst & (1 << 28)) ? 'c' : 't', + (inst >> 30)); + + inst = fs->instructions[i].inst2; + debug_printf(" 2: ALPHA_ADDR 0x%08x:", inst); + debug_printf("Addr0: %d%c, Addr1: %d%c, " + "Addr2: %d%c, srcp:%d\n", + inst & 0xff, (inst & (1 << 8)) ? 'c' : 't', + (inst >> 10) & 0xff, (inst & (1 << 18)) ? 'c' : 't', + (inst >> 20) & 0xff, (inst & (1 << 28)) ? 'c' : 't', + (inst >> 30)); + + inst = fs->instructions[i].inst3; + debug_printf(" 3: RGB_INST 0x%08x:", inst); + debug_printf("rgb_A_src:%d %s/%s/%s %d " + "rgb_B_src:%d %s/%s/%s %d\n", + inst & 0x3, r500_fs_swiz[(inst >> 2) & 0x7], + r500_fs_swiz[(inst >> 5) & 0x7], + r500_fs_swiz[(inst >> 8) & 0x7], + (inst >> 11) & 0x3, (inst >> 13) & 0x3, + r500_fs_swiz[(inst >> 15) & 0x7], + r500_fs_swiz[(inst >> 18) & 0x7], + r500_fs_swiz[(inst >> 21) & 0x7], + (inst >> 24) & 0x3); + + inst = fs->instructions[i].inst4; + debug_printf(" 4: ALPHA_INST 0x%08x:", inst); + debug_printf("%s dest:%d%s alp_A_src:%d %s %d " + "alp_B_src:%d %s %d w:%d\n", + r500_fs_op_alpha[inst & 0xf], (inst >> 4) & 0x7f, + inst & (1<<11) ? "(rel)":"", (inst >> 12) & 0x3, + r500_fs_swiz[(inst >> 14) & 0x7], (inst >> 17) & 0x3, + (inst >> 19) & 0x3, r500_fs_swiz[(inst >> 21) & 0x7], + (inst >> 24) & 0x3, (inst >> 31) & 0x1); + + inst = fs->instructions[i].inst5; + debug_printf(" 5: RGBA_INST 0x%08x:", inst); + debug_printf("%s dest:%d%s rgb_C_src:%d %s/%s/%s %d " + "alp_C_src:%d %s %d\n", + r500_fs_op_rgb[inst & 0xf], (inst >> 4) & 0x7f, + inst & (1 << 11) ? "(rel)":"", (inst >> 12) & 0x3, + r500_fs_swiz[(inst >> 14) & 0x7], + r500_fs_swiz[(inst >> 17) & 0x7], + r500_fs_swiz[(inst >> 20) & 0x7], + (inst >> 23) & 0x3, (inst >> 25) & 0x3, + r500_fs_swiz[(inst >> 27) & 0x7], (inst >> 30) & 0x3); + break; + case R500_INST_TYPE_FC: + /* XXX don't even bother yet */ + break; + case R500_INST_TYPE_TEX: + inst = fs->instructions[i].inst1; + debug_printf(" 1: TEX_INST 0x%08x: id: %d " + "op:%s, %s, %s %s\n", + inst, (inst >> 16) & 0xf, + r500_fs_tex[(inst >> 22) & 0x7], + (inst & (1 << 25)) ? "ACQ" : "", + (inst & (1 << 26)) ? "IGNUNC" : "", + (inst & (1 << 27)) ? "UNSCALED" : "SCALED"); + + inst = fs->instructions[i].inst2; + debug_printf(" 2: TEX_ADDR 0x%08x: " + "src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", + inst, inst & 0x7f, inst & (1 << 7) ? "(rel)" : "", + r500_fs_swiz[(inst >> 8) & 0x7], + r500_fs_swiz[(inst >> 10) & 0x7], + r500_fs_swiz[(inst >> 12) & 0x7], + r500_fs_swiz[(inst >> 14) & 0x7], + (inst >> 16) & 0x7f, inst & (1 << 23) ? "(rel)" : "", + r500_fs_swiz[(inst >> 24) & 0x7], + r500_fs_swiz[(inst >> 26) & 0x7], + r500_fs_swiz[(inst >> 28) & 0x7], + r500_fs_swiz[(inst >> 30) & 0x7]); + + inst = fs->instructions[i].inst3; + debug_printf(" 3: TEX_DXDY 0x%08x\n", inst); + break; + } + } +} diff --git a/src/gallium/drivers/r300/r300_debug.h b/src/gallium/drivers/r300/r300_debug.h new file mode 100644 index 0000000000..de5d701ed9 --- /dev/null +++ b/src/gallium/drivers/r300/r300_debug.h @@ -0,0 +1,31 @@ +/* + * Copyright 2009 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_DEBUG_H +#define R300_DEBUG_H + +#include "r300_reg.h" +#include "r300_state_shader.h" + +void r500_fs_dump(struct r500_fragment_shader* fs); + +#endif /* R300_DEBUG_H */ diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 07705adaf4..7629bfb1f4 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -60,6 +60,9 @@ static void r300_fs_declare(struct r300_fs_asm* assembler, break; case TGSI_FILE_OUTPUT: break; + case TGSI_FILE_TEMPORARY: + assembler->temp_count++; + break; default: debug_printf("r300: fs: Bad file %d\n", decl->Declaration.File); break; @@ -68,6 +71,41 @@ static void r300_fs_declare(struct r300_fs_asm* assembler, assembler->temp_offset = assembler->color_count + assembler->tex_count; } +static INLINE unsigned r300_fs_src(struct r300_fs_asm* assembler, + struct tgsi_src_register* src) +{ + switch (src->File) { + case TGSI_FILE_INPUT: + /* XXX may be wrong */ + return src->Index; + break; + case TGSI_FILE_TEMPORARY: + return src->Index + assembler->temp_offset; + break; + default: + debug_printf("r300: fs: Unimplemented src %d\n", src->File); + break; + } + return 0; +} + +static INLINE unsigned r300_fs_dst(struct r300_fs_asm* assembler, + struct tgsi_dst_register* dst) +{ + switch (dst->File) { + case TGSI_FILE_OUTPUT: + return 0; + break; + case TGSI_FILE_TEMPORARY: + return dst->Index + assembler->temp_offset; + break; + default: + debug_printf("r300: fs: Unimplemented dst %d\n", dst->File); + break; + } + return 0; +} + static INLINE unsigned r500_fix_swiz(unsigned s) { /* For historical reasons, the swizzle values x, y, z, w, and 0 are @@ -80,25 +118,31 @@ static INLINE unsigned r500_fix_swiz(unsigned s) } } -static INLINE uint32_t r500_rgb_swiz(struct tgsi_full_src_register* reg) +static uint32_t r500_rgba_swiz(struct tgsi_full_src_register* reg) { if (reg->SrcRegister.Extended) { return r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleX) | (r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleY) << 3) | - (r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleZ) << 6); + (r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleZ) << 6) | + (r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleW) << 9); } else { - return reg->SrcRegister.SwizzleX | (reg->SrcRegister.SwizzleY << 3) | - (reg->SrcRegister.SwizzleZ << 6); + return reg->SrcRegister.SwizzleX | + (reg->SrcRegister.SwizzleY << 3) | + (reg->SrcRegister.SwizzleZ << 6) | + (reg->SrcRegister.SwizzleW << 9); } } +static INLINE uint32_t r500_rgb_swiz(struct tgsi_full_src_register* reg) +{ + /* Only the first 9 bits... */ + return r500_rgba_swiz(reg) & 0x1ff; +} + static INLINE uint32_t r500_alpha_swiz(struct tgsi_full_src_register* reg) { - if (reg->SrcRegister.Extended) { - return r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleW); - } else { - return reg->SrcRegister.SwizzleW; - } + /* Only the last 3 bits... */ + return r500_rgba_swiz(reg) >> 9; } static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, @@ -107,16 +151,15 @@ static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, struct tgsi_full_dst_register* dst) { int i = fs->instruction_count; + fs->instructions[i].inst0 = R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST | R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; fs->instructions[i].inst1 = - R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST; + R500_RGB_ADDR0(r300_fs_src(assembler, &src->SrcRegister)); fs->instructions[i].inst2 = - R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST; + R500_ALPHA_ADDR0(r300_fs_src(assembler, &src->SrcRegister)); fs->instructions[i].inst3 = R500_ALU_RGB_SEL_A_SRC0 | R500_SWIZ_RGB_A(r500_rgb_swiz(src)) | R500_ALU_RGB_SEL_B_SRC0 | @@ -132,6 +175,27 @@ static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, fs->instruction_count++; } +static INLINE void r500_emit_tex(struct r500_fragment_shader* fs, + struct r300_fs_asm* assembler, + uint32_t op, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst) +{ + int i = fs->instruction_count; + + fs->instructions[i].inst0 = R500_INST_TYPE_TEX | + R500_INST_TEX_SEM_WAIT; + fs->instructions[i].inst1 = R500_TEX_ID(0) | + R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED | + R500_TEX_INST_PROJ; + fs->instructions[i].inst2 = + R500_TEX_SRC_ADDR(r300_fs_src(assembler, &src->SrcRegister)) | + R500_SWIZ_TEX_STRQ(r500_rgba_swiz(src)) | + R500_TEX_DST_ADDR(r300_fs_dst(assembler, &dst->DstRegister)) | + R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | + R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A; +} + static void r500_fs_instruction(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, struct tgsi_full_instruction* inst) @@ -145,6 +209,10 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, r500_emit_mov(fs, assembler, &inst->FullSrcRegisters[0], &inst->FullDstRegisters[0]); break; + case TGSI_OPCODE_TXP: + r500_emit_tex(fs, assembler, 0, &inst->FullSrcRegisters[0], + &inst->FullDstRegisters[0]); + break; case TGSI_OPCODE_END: break; default: @@ -205,6 +273,7 @@ void r500_translate_fragment_shader(struct r300_context* r300, fs->shader.stack_size = assembler->temp_offset; tgsi_dump(fs->shader.state.tokens); + r500_fs_dump(fs); //r500_copy_passthrough_shader(fs); diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 410926a26a..a74dce4764 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -26,6 +26,7 @@ #include "tgsi/tgsi_parse.h" #include "r300_context.h" +#include "r300_debug.h" #include "r300_reg.h" #include "r300_screen.h" @@ -63,6 +64,8 @@ struct r300_fs_asm { * distinguishing markings, so inputs start at 0 and the first usable * temporary register is after all inputs. */ unsigned temp_offset; + /* Number of requested temporary registers. */ + unsigned temp_count; }; void r300_translate_fragment_shader(struct r300_context* r300, -- cgit v1.2.3 From cec2170632a664da273c0e80ad1ead5cd43667a3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 11 Mar 2009 15:05:52 -0700 Subject: r300-gallium: r500-fs: More texture fixes. --- src/gallium/drivers/r300/r300_debug.c | 16 ++++++++-------- src/gallium/drivers/r300/r300_state_shader.c | 13 ++++++++++++- src/gallium/drivers/r300/r300_state_shader.h | 18 ++++++++++-------- 3 files changed, 30 insertions(+), 17 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index 4c6d2a2471..10b0cf7353 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -200,15 +200,15 @@ void r500_fs_dump(struct r500_fragment_shader* fs) debug_printf(" 2: TEX_ADDR 0x%08x: " "src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst, inst & 0x7f, inst & (1 << 7) ? "(rel)" : "", - r500_fs_swiz[(inst >> 8) & 0x7], - r500_fs_swiz[(inst >> 10) & 0x7], - r500_fs_swiz[(inst >> 12) & 0x7], - r500_fs_swiz[(inst >> 14) & 0x7], + r500_fs_swiz[(inst >> 8) & 0x3], + r500_fs_swiz[(inst >> 10) & 0x3], + r500_fs_swiz[(inst >> 12) & 0x3], + r500_fs_swiz[(inst >> 14) & 0x3], (inst >> 16) & 0x7f, inst & (1 << 23) ? "(rel)" : "", - r500_fs_swiz[(inst >> 24) & 0x7], - r500_fs_swiz[(inst >> 26) & 0x7], - r500_fs_swiz[(inst >> 28) & 0x7], - r500_fs_swiz[(inst >> 30) & 0x7]); + r500_fs_swiz[(inst >> 24) & 0x3], + r500_fs_swiz[(inst >> 26) & 0x3], + r500_fs_swiz[(inst >> 28) & 0x3], + r500_fs_swiz[(inst >> 30) & 0x3]); inst = fs->instructions[i].inst3; debug_printf(" 3: TEX_DXDY 0x%08x\n", inst); diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 7629bfb1f4..db84dbdc4e 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -133,6 +133,14 @@ static uint32_t r500_rgba_swiz(struct tgsi_full_src_register* reg) } } +static uint32_t r500_strq_swiz(struct tgsi_full_src_register* reg) +{ + return reg->SrcRegister.SwizzleX | + (reg->SrcRegister.SwizzleY << 2) | + (reg->SrcRegister.SwizzleZ << 4) | + (reg->SrcRegister.SwizzleW << 6); +} + static INLINE uint32_t r500_rgb_swiz(struct tgsi_full_src_register* reg) { /* Only the first 9 bits... */ @@ -184,16 +192,19 @@ static INLINE void r500_emit_tex(struct r500_fragment_shader* fs, int i = fs->instruction_count; fs->instructions[i].inst0 = R500_INST_TYPE_TEX | + R500_TEX_WMASK(dst->DstRegister.WriteMask) | R500_INST_TEX_SEM_WAIT; fs->instructions[i].inst1 = R500_TEX_ID(0) | R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED | R500_TEX_INST_PROJ; fs->instructions[i].inst2 = R500_TEX_SRC_ADDR(r300_fs_src(assembler, &src->SrcRegister)) | - R500_SWIZ_TEX_STRQ(r500_rgba_swiz(src)) | + R500_SWIZ_TEX_STRQ(r500_strq_swiz(src)) | R500_TEX_DST_ADDR(r300_fs_dst(assembler, &dst->DstRegister)) | R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A; + + fs->instruction_count++; } static void r500_fs_instruction(struct r500_fragment_shader* fs, diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index a74dce4764..5dd3584459 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -41,17 +41,19 @@ #define R500_SWIZ_MOD_ABS 2 #define R500_SWIZ_MOD_NEG_ABS 3 /* Swizzles for inst2 */ -#define R500_SWIZ_TEX_STRQ(x) (x << 8) -#define R500_SWIZ_TEX_RGBA(x) (x << 24) +#define R500_SWIZ_TEX_STRQ(x) ((x) << 8) +#define R500_SWIZ_TEX_RGBA(x) ((x) << 24) /* Swizzles for inst3 */ -#define R500_SWIZ_RGB_A(x) (x << 2) -#define R500_SWIZ_RGB_B(x) (x << 15) +#define R500_SWIZ_RGB_A(x) ((x) << 2) +#define R500_SWIZ_RGB_B(x) ((x) << 15) /* Swizzles for inst4 */ -#define R500_SWIZ_ALPHA_A(x) (x << 14) -#define R500_SWIZ_ALPHA_B(x) (x << 21) +#define R500_SWIZ_ALPHA_A(x) ((x) << 14) +#define R500_SWIZ_ALPHA_B(x) ((x) << 21) /* Swizzle for inst5 */ -#define R500_SWIZ_RGBA_C(x) (x << 14) -#define R500_SWIZ_ALPHA_C(x) (x << 27) +#define R500_SWIZ_RGBA_C(x) ((x) << 14) +#define R500_SWIZ_ALPHA_C(x) ((x) << 27) +/* Writemasks */ +#define R500_TEX_WMASK(x) ((x) << 11) /* Temporary struct used to hold assembly state while putting together * fragment programs. */ -- cgit v1.2.3 From f78bd5922db220b1b5e21c92e6a0cb78189a77f3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 11 Mar 2009 15:09:56 -0700 Subject: r300-gallium: Fix texture filters. --- src/gallium/drivers/r300/r300_state_inlines.h | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index 4b3183471a..fd92c71756 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -217,34 +217,43 @@ static INLINE uint32_t r300_translate_tex_filters(int min, int mag, int mip) switch (min) { case PIPE_TEX_FILTER_NEAREST: retval |= R300_TX_MIN_FILTER_NEAREST; + break; case PIPE_TEX_FILTER_LINEAR: retval |= R300_TX_MIN_FILTER_LINEAR; + break; case PIPE_TEX_FILTER_ANISO: retval |= R300_TX_MIN_FILTER_ANISO; + break; default: - debug_printf("r300: Unknown texture filter %d", min); + debug_printf("r300: Unknown texture filter %d\n", min); break; } switch (mag) { case PIPE_TEX_FILTER_NEAREST: retval |= R300_TX_MAG_FILTER_NEAREST; + break; case PIPE_TEX_FILTER_LINEAR: retval |= R300_TX_MAG_FILTER_LINEAR; + break; case PIPE_TEX_FILTER_ANISO: retval |= R300_TX_MAG_FILTER_ANISO; + break; default: - debug_printf("r300: Unknown texture filter %d", mag); + debug_printf("r300: Unknown texture filter %d\n", mag); break; } switch (mip) { case PIPE_TEX_MIPFILTER_NONE: retval |= R300_TX_MIN_FILTER_MIP_NONE; + break; case PIPE_TEX_MIPFILTER_NEAREST: retval |= R300_TX_MIN_FILTER_MIP_NEAREST; + break; case PIPE_TEX_MIPFILTER_LINEAR: retval |= R300_TX_MIN_FILTER_MIP_LINEAR; + break; default: - debug_printf("r300: Unknown texture filter %d", mip); + debug_printf("r300: Unknown texture filter %d\n", mip); break; } -- cgit v1.2.3 From d375a3bdda68a22972f18e9ee2ba5786c5e6757d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 11 Mar 2009 15:20:16 -0700 Subject: r300-gallium: Don't flush textures more than necessary. --- src/gallium/drivers/r300/r300_emit.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 68741e9f08..c2ad3ac6f5 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -327,6 +327,7 @@ void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = r300_screen(r300->context.screen); int i; + int dirty_tex = 0; if (!(r300->dirty_state) && !(r300->dirty_hw)) { return; @@ -382,8 +383,8 @@ void r300_emit_dirty_state(struct r300_context* r300) if (r300->dirty_state & (R300_NEW_SAMPLER << i)) { r300_emit_sampler(r300, r300->sampler_states[i], i); r300->dirty_state &= ~(R300_NEW_SAMPLER << i); + dirty_tex++; } - r300_flush_textures(r300); } } @@ -397,11 +398,15 @@ void r300_emit_dirty_state(struct r300_context* r300) if (r300->dirty_state & (R300_NEW_TEXTURE << i)) { r300_emit_texture(r300, r300->textures[i], i); r300->dirty_state &= ~(R300_NEW_TEXTURE << i); + dirty_tex++; } - r300_flush_textures(r300); } } + if (dirty_tex) { + r300_flush_textures(r300); + } + if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) { r300_emit_vertex_format_state(r300); r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT; -- cgit v1.2.3 From f500f3a72c6be61ff9b8e1166f734e408d00aded Mon Sep 17 00:00:00 2001 From: Jakob Bornecrantz Date: Fri, 13 Mar 2009 10:38:41 +0000 Subject: gallium: Remove do_flip argument from surface_copy I should have gotten most uses and implementation correctly fixed, but things might break. Feel free to blame me. --- src/gallium/auxiliary/util/u_blit.c | 4 ++-- src/gallium/drivers/cell/ppu/cell_surface.c | 14 +++++++++++++- src/gallium/drivers/i915simple/i915_surface.c | 3 +-- src/gallium/drivers/i965simple/brw_surface.c | 13 ++++++------- src/gallium/drivers/nv04/nv04_surface.c | 11 +---------- src/gallium/drivers/nv10/nv10_surface.c | 11 +---------- src/gallium/drivers/nv20/nv20_surface.c | 11 +---------- src/gallium/drivers/nv30/nv30_surface.c | 11 +---------- src/gallium/drivers/nv40/nv40_surface.c | 11 +---------- src/gallium/drivers/nv50/nv50_surface.c | 12 ++---------- src/gallium/drivers/r300/r300_surface.c | 3 +-- src/gallium/drivers/softpipe/sp_surface.c | 13 ++++++++++++- src/gallium/drivers/trace/tr_context.c | 4 +--- src/gallium/include/pipe/p_context.h | 1 - src/gallium/state_trackers/egl/egl_surface.c | 1 - src/gallium/state_trackers/glx/xlib/xm_api.c | 1 - src/gallium/state_trackers/python/p_context.i | 5 ++--- src/gallium/state_trackers/xorg/xorg_dri2.c | 2 +- src/gallium/state_trackers/xorg/xorg_exa.c | 2 +- src/gallium/winsys/drm/nouveau/dri/nouveau_swapbuffers.c | 2 +- src/gallium/winsys/g3dvl/nouveau/nouveau_swapbuffers.c | 2 +- src/mesa/state_tracker/st_atom_framebuffer.c | 1 - src/mesa/state_tracker/st_cb_drawpixels.c | 1 - src/mesa/state_tracker/st_cb_texture.c | 9 +++------ src/mesa/state_tracker/st_texture.c | 1 - 25 files changed, 52 insertions(+), 97 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/auxiliary/util/u_blit.c b/src/gallium/auxiliary/util/u_blit.c index 813e41f1b1..3b3777b873 100644 --- a/src/gallium/auxiliary/util/u_blit.c +++ b/src/gallium/auxiliary/util/u_blit.c @@ -328,7 +328,7 @@ util_blit_pixels(struct blit_state *ctx, if(dst->format == src->format && (dstX1 - dstX0) == srcW && (dstY1 - dstY0) == srcH) { /* FIXME: this will most surely fail for overlapping rectangles */ - pipe->surface_copy(pipe, FALSE, + pipe->surface_copy(pipe, dst, dstX0, dstY0, /* dest */ src, srcX0, srcY0, /* src */ srcW, srcH); /* size */ @@ -362,7 +362,7 @@ util_blit_pixels(struct blit_state *ctx, PIPE_BUFFER_USAGE_GPU_WRITE); /* load temp texture */ - pipe->surface_copy(pipe, FALSE, + pipe->surface_copy(pipe, texSurf, 0, 0, /* dest */ src, srcLeft, srcTop, /* src */ srcW, srcH); /* size */ diff --git a/src/gallium/drivers/cell/ppu/cell_surface.c b/src/gallium/drivers/cell/ppu/cell_surface.c index c9203fee08..ffb8595d82 100644 --- a/src/gallium/drivers/cell/ppu/cell_surface.c +++ b/src/gallium/drivers/cell/ppu/cell_surface.c @@ -30,9 +30,21 @@ #include "cell_surface.h" +static void +cell_surface_copy(struct pipe_context *pipe, + struct pipe_surface *dest, unsigned destx, unsigned desty, + struct pipe_surface *src, unsigned srcx, unsigned srcy, + unsigned width, unsigned height) +{ + util_surface_copy(pipe, FALSE, + dest, destx, desty, + src, srcx, srcy, + width, height); +} + void cell_init_surface_functions(struct cell_context *cell) { - cell->pipe.surface_copy = util_surface_copy; + cell->pipe.surface_copy = cell_surface_copy; cell->pipe.surface_fill = util_surface_fill; } diff --git a/src/gallium/drivers/i915simple/i915_surface.c b/src/gallium/drivers/i915simple/i915_surface.c index 7eec649906..09b2c499b8 100644 --- a/src/gallium/drivers/i915simple/i915_surface.c +++ b/src/gallium/drivers/i915simple/i915_surface.c @@ -41,7 +41,6 @@ */ static void i915_surface_copy(struct pipe_context *pipe, - boolean do_flip, struct pipe_surface *dst, unsigned dstx, unsigned dsty, struct pipe_surface *src, @@ -58,7 +57,7 @@ i915_surface_copy(struct pipe_context *pipe, assert( dst_tex->base.block.height == 1 ); i915_copy_blit( i915_context(pipe), - do_flip, + FALSE, dst_tex->base.block.size, (unsigned short) src_tex->stride, src_tex->buffer, src->offset, (unsigned short) dst_tex->stride, dst_tex->buffer, dst->offset, diff --git a/src/gallium/drivers/i965simple/brw_surface.c b/src/gallium/drivers/i965simple/brw_surface.c index 0a95dce194..511779dbfa 100644 --- a/src/gallium/drivers/i965simple/brw_surface.c +++ b/src/gallium/drivers/i965simple/brw_surface.c @@ -41,7 +41,6 @@ */ static void brw_surface_copy(struct pipe_context *pipe, - boolean do_flip, struct pipe_surface *dst, unsigned dstx, unsigned dsty, struct pipe_surface *src, @@ -64,11 +63,11 @@ brw_surface_copy(struct pipe_context *pipe, pipe_copy_rect(dst_map, &dst->block, dst->stride, - dstx, dsty, - width, height, - src_map, - do_flip ? -(int) src->stride : src->stride, - srcx, do_flip ? height - 1 - srcy : srcy); + dstx, dsty, + width, height, + src_map, + src->stride, + srcx, srcy); pipe->screen->surface_unmap(pipe->screen, src); pipe->screen->surface_unmap(pipe->screen, dst); @@ -79,7 +78,7 @@ brw_surface_copy(struct pipe_context *pipe, assert(dst->block.width == 1); assert(dst->block.height == 1); brw_copy_blit(brw_context(pipe), - do_flip, + FALSE, dst->block.size, (short) src->stride/src->block.size, src_tex->buffer, src->offset, FALSE, (short) dst->stride/dst->block.size, dst_tex->buffer, dst->offset, FALSE, diff --git a/src/gallium/drivers/nv04/nv04_surface.c b/src/gallium/drivers/nv04/nv04_surface.c index 14abf16679..0387ff4e78 100644 --- a/src/gallium/drivers/nv04/nv04_surface.c +++ b/src/gallium/drivers/nv04/nv04_surface.c @@ -33,7 +33,7 @@ #include "util/u_tile.h" static void -nv04_surface_copy(struct pipe_context *pipe, boolean do_flip, +nv04_surface_copy(struct pipe_context *pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) @@ -41,15 +41,6 @@ nv04_surface_copy(struct pipe_context *pipe, boolean do_flip, struct nv04_context *nv04 = nv04_context(pipe); struct nv04_surface_2d *eng2d = nv04->screen->eng2d; - if (do_flip) { - desty += height; - while (height--) { - eng2d->copy(eng2d, dest, destx, desty--, src, - srcx, srcy++, width, 1); - } - return; - } - eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); } diff --git a/src/gallium/drivers/nv10/nv10_surface.c b/src/gallium/drivers/nv10/nv10_surface.c index 2538151063..5b52246a9c 100644 --- a/src/gallium/drivers/nv10/nv10_surface.c +++ b/src/gallium/drivers/nv10/nv10_surface.c @@ -33,7 +33,7 @@ #include "util/u_tile.h" static void -nv10_surface_copy(struct pipe_context *pipe, boolean do_flip, +nv10_surface_copy(struct pipe_context *pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) @@ -41,15 +41,6 @@ nv10_surface_copy(struct pipe_context *pipe, boolean do_flip, struct nv10_context *nv10 = nv10_context(pipe); struct nv04_surface_2d *eng2d = nv10->screen->eng2d; - if (do_flip) { - desty += height; - while (height--) { - eng2d->copy(eng2d, dest, destx, desty--, src, - srcx, srcy++, width, 1); - } - return; - } - eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); } diff --git a/src/gallium/drivers/nv20/nv20_surface.c b/src/gallium/drivers/nv20/nv20_surface.c index 6cd607583c..4224bdd6af 100644 --- a/src/gallium/drivers/nv20/nv20_surface.c +++ b/src/gallium/drivers/nv20/nv20_surface.c @@ -33,7 +33,7 @@ #include "util/u_tile.h" static void -nv20_surface_copy(struct pipe_context *pipe, boolean do_flip, +nv20_surface_copy(struct pipe_context *pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) @@ -41,15 +41,6 @@ nv20_surface_copy(struct pipe_context *pipe, boolean do_flip, struct nv20_context *nv20 = nv20_context(pipe); struct nv04_surface_2d *eng2d = nv20->screen->eng2d; - if (do_flip) { - desty += height; - while (height--) { - eng2d->copy(eng2d, dest, destx, desty--, src, - srcx, srcy++, width, 1); - } - return; - } - eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); } diff --git a/src/gallium/drivers/nv30/nv30_surface.c b/src/gallium/drivers/nv30/nv30_surface.c index 0f8dc12045..5e237e13eb 100644 --- a/src/gallium/drivers/nv30/nv30_surface.c +++ b/src/gallium/drivers/nv30/nv30_surface.c @@ -33,7 +33,7 @@ #include "util/u_tile.h" static void -nv30_surface_copy(struct pipe_context *pipe, boolean do_flip, +nv30_surface_copy(struct pipe_context *pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) @@ -41,15 +41,6 @@ nv30_surface_copy(struct pipe_context *pipe, boolean do_flip, struct nv30_context *nv30 = nv30_context(pipe); struct nv04_surface_2d *eng2d = nv30->screen->eng2d; - if (do_flip) { - desty += height; - while (height--) { - eng2d->copy(eng2d, dest, destx, desty--, src, - srcx, srcy++, width, 1); - } - return; - } - eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); } diff --git a/src/gallium/drivers/nv40/nv40_surface.c b/src/gallium/drivers/nv40/nv40_surface.c index c4a5fb20d9..1a849da32d 100644 --- a/src/gallium/drivers/nv40/nv40_surface.c +++ b/src/gallium/drivers/nv40/nv40_surface.c @@ -33,7 +33,7 @@ #include "util/u_tile.h" static void -nv40_surface_copy(struct pipe_context *pipe, boolean do_flip, +nv40_surface_copy(struct pipe_context *pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) @@ -41,15 +41,6 @@ nv40_surface_copy(struct pipe_context *pipe, boolean do_flip, struct nv40_context *nv40 = nv40_context(pipe); struct nv04_surface_2d *eng2d = nv40->screen->eng2d; - if (do_flip) { - desty += height; - while (height--) { - eng2d->copy(eng2d, dest, destx, desty--, src, - srcx, srcy++, width, 1); - } - return; - } - eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); } diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c index b0936518b0..0cc5168144 100644 --- a/src/gallium/drivers/nv50/nv50_surface.c +++ b/src/gallium/drivers/nv50/nv50_surface.c @@ -144,7 +144,7 @@ nv50_surface_do_copy(struct nv50_screen *screen, struct pipe_surface *dst, } static void -nv50_surface_copy(struct pipe_context *pipe, boolean flip, +nv50_surface_copy(struct pipe_context *pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) @@ -154,16 +154,8 @@ nv50_surface_copy(struct pipe_context *pipe, boolean flip, assert(src->format == dest->format); - if (flip) { - desty += height; - while (height--) { - nv50_surface_do_copy(screen, dest, destx, desty--, src, - srcx, srcy++, width, 1); - } - } else { - nv50_surface_do_copy(screen, dest, destx, desty, src, srcx, + nv50_surface_do_copy(screen, dest, destx, desty, src, srcx, srcy, width, height); - } } static void diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 938a521b87..a49bec9910 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -253,7 +253,6 @@ static void r300_surface_fill(struct pipe_context* pipe, } static void r300_surface_copy(struct pipe_context* pipe, - boolean do_flip, struct pipe_surface* dest, unsigned destx, unsigned desty, struct pipe_surface* src, @@ -272,7 +271,7 @@ static void r300_surface_copy(struct pipe_context* pipe, if (TRUE) { debug_printf("r300: Falling back on surface_copy\n"); - return util_surface_copy(pipe, do_flip, dest, destx, desty, src, + return util_surface_copy(pipe, FALSE, dest, destx, desty, src, srcx, srcy, w, h); } #if 0 diff --git a/src/gallium/drivers/softpipe/sp_surface.c b/src/gallium/drivers/softpipe/sp_surface.c index 6ade732698..ef04843f17 100644 --- a/src/gallium/drivers/softpipe/sp_surface.c +++ b/src/gallium/drivers/softpipe/sp_surface.c @@ -29,10 +29,21 @@ #include "sp_context.h" +static void +sp_surface_copy(struct pipe_context *pipe, + struct pipe_surface *dest, unsigned destx, unsigned desty, + struct pipe_surface *src, unsigned srcx, unsigned srcy, + unsigned width, unsigned height) +{ + util_surface_copy(pipe, FALSE, + dest, destx, desty, + src, srcx, srcy, + width, height); +} void sp_init_surface_functions(struct softpipe_context *sp) { - sp->pipe.surface_copy = util_surface_copy; + sp->pipe.surface_copy = sp_surface_copy; sp->pipe.surface_fill = util_surface_fill; } diff --git a/src/gallium/drivers/trace/tr_context.c b/src/gallium/drivers/trace/tr_context.c index 9dcd13f114..c5bae0eed2 100644 --- a/src/gallium/drivers/trace/tr_context.c +++ b/src/gallium/drivers/trace/tr_context.c @@ -911,7 +911,6 @@ trace_context_set_vertex_elements(struct pipe_context *_pipe, static INLINE void trace_context_surface_copy(struct pipe_context *_pipe, - boolean do_flip, struct pipe_surface *dest, unsigned destx, unsigned desty, struct pipe_surface *src, @@ -927,7 +926,6 @@ trace_context_surface_copy(struct pipe_context *_pipe, trace_dump_call_begin("pipe_context", "surface_copy"); trace_dump_arg(ptr, pipe); - trace_dump_arg(bool, do_flip); trace_dump_arg(ptr, dest); trace_dump_arg(uint, destx); trace_dump_arg(uint, desty); @@ -937,7 +935,7 @@ trace_context_surface_copy(struct pipe_context *_pipe, trace_dump_arg(uint, width); trace_dump_arg(uint, height); - pipe->surface_copy(pipe, do_flip, + pipe->surface_copy(pipe, dest, destx, desty, src, srcx, srcy, width, height); diff --git a/src/gallium/include/pipe/p_context.h b/src/gallium/include/pipe/p_context.h index 9454cc87db..2452bf3522 100644 --- a/src/gallium/include/pipe/p_context.h +++ b/src/gallium/include/pipe/p_context.h @@ -193,7 +193,6 @@ struct pipe_context { */ /*@{*/ void (*surface_copy)(struct pipe_context *pipe, - boolean do_flip,/**< flip surface contents vertically */ struct pipe_surface *dest, unsigned destx, unsigned desty, struct pipe_surface *src, /* don't make this const - diff --git a/src/gallium/state_trackers/egl/egl_surface.c b/src/gallium/state_trackers/egl/egl_surface.c index b8d5f4217f..e6e80b985a 100644 --- a/src/gallium/state_trackers/egl/egl_surface.c +++ b/src/gallium/state_trackers/egl/egl_surface.c @@ -391,7 +391,6 @@ drm_swap_buffers(_EGLDriver *drv, EGLDisplay dpy, EGLSurface draw) if (surf->screen) { surf->user->pipe->flush(surf->user->pipe, PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_TEXTURE_CACHE, NULL); surf->user->pipe->surface_copy(surf->user->pipe, - 0, surf->screen->surface, 0, 0, back_surf, diff --git a/src/gallium/state_trackers/glx/xlib/xm_api.c b/src/gallium/state_trackers/glx/xlib/xm_api.c index c590d5b296..7f32b460aa 100644 --- a/src/gallium/state_trackers/glx/xlib/xm_api.c +++ b/src/gallium/state_trackers/glx/xlib/xm_api.c @@ -1143,7 +1143,6 @@ void XMesaCopySubBuffer( XMesaBuffer b, int x, int y, int width, int height ) return; pipe->surface_copy(pipe, - FALSE, surf_front, x, y, /* dest */ surf_back, x, y, /* src */ width, height); diff --git a/src/gallium/state_trackers/python/p_context.i b/src/gallium/state_trackers/python/p_context.i index 7b8b64b592..d1729a4687 100644 --- a/src/gallium/state_trackers/python/p_context.i +++ b/src/gallium/state_trackers/python/p_context.i @@ -266,13 +266,12 @@ error1: * Surface functions */ - void surface_copy(int do_flip, - struct pipe_surface *dest, + void surface_copy(struct pipe_surface *dest, unsigned destx, unsigned desty, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) { - $self->pipe->surface_copy($self->pipe, do_flip, dest, destx, desty, src, srcx, srcy, width, height); + $self->pipe->surface_copy($self->pipe, dest, destx, desty, src, srcx, srcy, width, height); } void surface_fill(struct pipe_surface *dst, diff --git a/src/gallium/state_trackers/xorg/xorg_dri2.c b/src/gallium/state_trackers/xorg/xorg_dri2.c index b9993b1ea1..d04204e1bf 100644 --- a/src/gallium/state_trackers/xorg/xorg_dri2.c +++ b/src/gallium/state_trackers/xorg/xorg_dri2.c @@ -173,7 +173,7 @@ driCopyRegion(DrawablePtr pDraw, RegionPtr pRegion, ms->screen->get_tex_surface(ms->screen, src_priv->tex, 0, 0, 0, PIPE_BUFFER_USAGE_GPU_READ); - ms->ctx->surface_copy(ms->ctx, 0, dst_surf, 0, 0, src_surf, + ms->ctx->surface_copy(ms->ctx, dst_surf, 0, 0, src_surf, 0, 0, pDraw->width, pDraw->height); pipe_surface_reference(&dst_surf, NULL); diff --git a/src/gallium/state_trackers/xorg/xorg_exa.c b/src/gallium/state_trackers/xorg/xorg_exa.c index c5f1293951..56c8fdccb2 100644 --- a/src/gallium/state_trackers/xorg/xorg_exa.c +++ b/src/gallium/state_trackers/xorg/xorg_exa.c @@ -283,7 +283,7 @@ ExaCopy(PixmapPtr pDstPixmap, int srcX, int srcY, int dstX, int dstY, PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE); - exa->ctx->surface_copy(exa->ctx, 0, surf, dstX, dstY, priv->src_surf, + exa->ctx->surface_copy(exa->ctx, surf, dstX, dstY, priv->src_surf, srcX, srcY, width, height); exa->scrn->tex_surface_destroy(surf); } diff --git a/src/gallium/winsys/drm/nouveau/dri/nouveau_swapbuffers.c b/src/gallium/winsys/drm/nouveau/dri/nouveau_swapbuffers.c index 58cb6f7265..3cac722b4a 100644 --- a/src/gallium/winsys/drm/nouveau/dri/nouveau_swapbuffers.c +++ b/src/gallium/winsys/drm/nouveau/dri/nouveau_swapbuffers.c @@ -39,7 +39,7 @@ nouveau_copy_buffer(__DRIdrawablePrivate *dPriv, struct pipe_surface *surf, w = pbox->x2 - pbox->x1; h = pbox->y2 - pbox->y1; - pipe->surface_copy(pipe, FALSE, nv->base.frontbuffer, + pipe->surface_copy(pipe, nv->base.frontbuffer, dx, dy, surf, sx, sy, w, h); } diff --git a/src/gallium/winsys/g3dvl/nouveau/nouveau_swapbuffers.c b/src/gallium/winsys/g3dvl/nouveau/nouveau_swapbuffers.c index 864be37871..77e46a2054 100644 --- a/src/gallium/winsys/g3dvl/nouveau/nouveau_swapbuffers.c +++ b/src/gallium/winsys/g3dvl/nouveau/nouveau_swapbuffers.c @@ -31,7 +31,7 @@ nouveau_copy_buffer(dri_drawable_t *dri_drawable, struct pipe_surface *surf, w = pbox->x2 - pbox->x1; h = pbox->y2 - pbox->y1; - pipe->surface_copy(pipe, FALSE, nv->base.frontbuffer, + pipe->surface_copy(pipe, nv->base.frontbuffer, dx, dy, surf, sx, sy, w, h); } diff --git a/src/mesa/state_tracker/st_atom_framebuffer.c b/src/mesa/state_tracker/st_atom_framebuffer.c index 625efdd66b..b32009c19b 100644 --- a/src/mesa/state_tracker/st_atom_framebuffer.c +++ b/src/mesa/state_tracker/st_atom_framebuffer.c @@ -154,7 +154,6 @@ update_framebuffer_state( struct st_context *st ) (void) st_get_framebuffer_surface(stfb, ST_SURFACE_BACK_LEFT, &surf_back); st->pipe->surface_copy(st->pipe, - FALSE, surf_front, 0, 0, /* dest */ surf_back, 0, 0, /* src */ fb->Width, fb->Height); diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c b/src/mesa/state_tracker/st_cb_drawpixels.c index f666eb4ae8..821ea67ce4 100644 --- a/src/mesa/state_tracker/st_cb_drawpixels.c +++ b/src/mesa/state_tracker/st_cb_drawpixels.c @@ -916,7 +916,6 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy, struct pipe_surface *psTex = screen->get_tex_surface(screen, pt, 0, 0, 0, PIPE_BUFFER_USAGE_GPU_WRITE ); pipe->surface_copy(pipe, - FALSE, psTex, /* dest */ 0, 0, /* destx/y */ psRead, diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c index c805e399de..71640d78f7 100644 --- a/src/mesa/state_tracker/st_cb_texture.c +++ b/src/mesa/state_tracker/st_cb_texture.c @@ -1089,21 +1089,19 @@ st_copy_texsubimage(GLcontext *ctx, if (matching_base_formats && ctx->_ImageTransferState == 0x0) { /* try potential hardware path */ struct pipe_surface *dest_surface = NULL; + boolean do_flip = (st_fb_orientation(ctx->ReadBuffer) == Y_0_TOP); - if (src_format == dest_format) { + if (src_format == dest_format && !do_flip) { /* use surface_copy() / blit */ - boolean do_flip = (st_fb_orientation(ctx->ReadBuffer) == Y_0_TOP); + dest_surface = screen->get_tex_surface(screen, stImage->pt, stImage->face, stImage->level, destZ, PIPE_BUFFER_USAGE_GPU_WRITE); - if (do_flip) - srcY = strb->surface->height - srcY - height; /* for surface_copy(), y=0=top, always */ pipe->surface_copy(pipe, - do_flip, /* dest */ dest_surface, destX, destY, @@ -1123,7 +1121,6 @@ st_copy_texsubimage(GLcontext *ctx, PIPE_TEXTURE_USAGE_RENDER_TARGET, 0)) { /* draw textured quad to do the copy */ - boolean do_flip = (st_fb_orientation(ctx->ReadBuffer) == Y_0_TOP); int srcY0, srcY1; dest_surface = screen->get_tex_surface(screen, stImage->pt, diff --git a/src/mesa/state_tracker/st_texture.c b/src/mesa/state_tracker/st_texture.c index 20c34cd80a..30b95bebab 100644 --- a/src/mesa/state_tracker/st_texture.c +++ b/src/mesa/state_tracker/st_texture.c @@ -342,7 +342,6 @@ st_texture_image_copy(struct pipe_context *pipe, PIPE_BUFFER_USAGE_GPU_READ); pipe->surface_copy(pipe, - FALSE, dst_surface, 0, 0, /* destX, Y */ src_surface, -- cgit v1.2.3 From 954a9fadad6a35ba360f4f28499fda74947d37fb Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Mar 2009 12:12:26 -0700 Subject: r300-gallium: Fix spacing. It was driving me crazy. --- src/gallium/drivers/r300/r300_debug.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index 10b0cf7353..f657588c72 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -188,7 +188,7 @@ void r500_fs_dump(struct r500_fragment_shader* fs) break; case R500_INST_TYPE_TEX: inst = fs->instructions[i].inst1; - debug_printf(" 1: TEX_INST 0x%08x: id: %d " + debug_printf(" 1: TEX_INST 0x%08x: id: %d " "op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf, r500_fs_tex[(inst >> 22) & 0x7], @@ -197,7 +197,7 @@ void r500_fs_dump(struct r500_fragment_shader* fs) (inst & (1 << 27)) ? "UNSCALED" : "SCALED"); inst = fs->instructions[i].inst2; - debug_printf(" 2: TEX_ADDR 0x%08x: " + debug_printf(" 2: TEX_ADDR 0x%08x: " "src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst, inst & 0x7f, inst & (1 << 7) ? "(rel)" : "", r500_fs_swiz[(inst >> 8) & 0x3], @@ -211,7 +211,7 @@ void r500_fs_dump(struct r500_fragment_shader* fs) r500_fs_swiz[(inst >> 30) & 0x3]); inst = fs->instructions[i].inst3; - debug_printf(" 3: TEX_DXDY 0x%08x\n", inst); + debug_printf(" 3: TEX_DXDY 0x%08x\n", inst); break; } } -- cgit v1.2.3 From c5742cab195a77b2a075950f9d7812faeacb6621 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Mar 2009 12:13:02 -0700 Subject: r300-gallium: Always rasterize at least one color. --- src/gallium/drivers/r300/r300_state_derived.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 7693f2c433..8ef9e36b5b 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -208,6 +208,10 @@ static void r300_update_rs_block(struct r300_context* r300) } } + if (col_count == 0) { + rs->ip[0] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001); + } + /* Set up at least one texture pointer or RS will not be happy. */ if (tex_count == 0) { rs->ip[0] |= @@ -253,6 +257,10 @@ static void r300_update_rs_block(struct r300_context* r300) } } + if (col_count == 0) { + rs->ip[0] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001); + } + if (tex_count == 0) { rs->ip[0] |= R300_RS_SEL_S(R300_RS_SEL_K0) | -- cgit v1.2.3 From 61c65a6c7e809e61bfaf5f84240bfc62d5adcf52 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Mar 2009 12:13:53 -0700 Subject: r300-gallium: r500-fs: Add writemasks and some flexibility for MOV/SWZ. --- src/gallium/drivers/r300/r300_state_shader.c | 28 +++++++++++++++++++++++----- src/gallium/drivers/r300/r300_state_shader.h | 2 ++ 2 files changed, 25 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index db84dbdc4e..06dd6842ed 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -160,10 +160,18 @@ static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, { int i = fs->instruction_count; - fs->instructions[i].inst0 = R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | R500_INST_LAST | - R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { + fs->instructions[i].inst0 = R500_INST_TYPE_OUT | + R500_ALU_OMASK(dst->DstRegister.WriteMask); + } else { + fs->instructions[i].inst0 = R500_INST_TYPE_ALU | + R500_ALU_WMASK(dst->DstRegister.WriteMask); + } + + fs->instructions[i].inst0 |= + R500_INST_TEX_SEM_WAIT | R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; + fs->instructions[i].inst1 = R500_RGB_ADDR0(r300_fs_src(assembler, &src->SrcRegister)); fs->instructions[i].inst2 = @@ -233,6 +241,17 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, } } +static void r500_fs_finalize(struct r500_fragment_shader* fs, + struct r300_fs_asm* assembler) +{ + /* XXX subtly wrong */ + fs->shader.stack_size = assembler->temp_offset; + + /* XXX should this just go with OPCODE_END? */ + fs->instructions[fs->instruction_count - 1].inst0 |= + R500_INST_LAST; +} + void r300_translate_fragment_shader(struct r300_context* r300, struct r300_fragment_shader* fs) { @@ -280,8 +299,7 @@ void r500_translate_fragment_shader(struct r300_context* r300, assembler->tex_count, assembler->color_count, assembler->tex_count + assembler->color_count); - /* XXX subtly wrong */ - fs->shader.stack_size = assembler->temp_offset; + r500_fs_finalize(fs, assembler); tgsi_dump(fs->shader.state.tokens); r500_fs_dump(fs); diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 5dd3584459..87a5c99648 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -54,6 +54,8 @@ #define R500_SWIZ_ALPHA_C(x) ((x) << 27) /* Writemasks */ #define R500_TEX_WMASK(x) ((x) << 11) +#define R500_ALU_WMASK(x) ((x) << 11) +#define R500_ALU_OMASK(x) ((x) << 15) /* Temporary struct used to hold assembly state while putting together * fragment programs. */ -- cgit v1.2.3 From 7c204c975381b0ef4a7693827ffc4ff904de991c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 12 Mar 2009 12:14:35 -0700 Subject: r300-gallium: Actually set stride when creating textures. Duh. --- src/gallium/drivers/r300/r300_texture.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index ae388c7360..6cdea3d285 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -74,6 +74,10 @@ static void r300_setup_miptree(struct r300_texture* tex) tex->offset[i] = (tex->size + 63) & ~63; tex->size = tex->offset[i] + size; + + if (i == 0) { + tex->stride = stride; + } } } -- cgit v1.2.3 From 44adea1a0975ebad59790b9cfd03439aa44559fc Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 15 Mar 2009 23:04:49 -0700 Subject: r300-gallium: r500-fs: Setup immediates. Textures still not working. RS block shenanigans expected. --- src/gallium/drivers/r300/r300_context.c | 1 - src/gallium/drivers/r300/r300_emit.c | 28 ++++++++++++++++++++++++---- src/gallium/drivers/r300/r300_state_shader.c | 26 +++++++++++++++++++++++++- src/gallium/drivers/r300/r300_state_shader.h | 6 ++++++ src/gallium/drivers/r300/r300_surface.c | 4 ++-- 5 files changed, 57 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 1affcbfdf4..df7f85b937 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -59,7 +59,6 @@ static boolean r300_draw_range_elements(struct pipe_context* pipe, r300->shader_constants[PIPE_SHADER_VERTEX].user_count * (sizeof(float) * 4)); - /* Abandon all hope, ye who enter here. */ draw_arrays(r300->draw, mode, start, count); for (i = 0; i < r300->vertex_buffer_count; i++) { diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index c2ad3ac6f5..3b580b7d51 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -115,17 +115,19 @@ void r500_emit_fragment_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { CS_LOCALS(r300); + struct r300_constant_buffer* constants = + &r300->shader_constants[PIPE_SHADER_FRAGMENT]; int i; - BEGIN_CS(9 + (fs->instruction_count * 6)); + BEGIN_CS(9 + (fs->instruction_count * 6) + (constants->count ? 3 : 0) + + (constants->count * 4)); OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size); OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | - R500_US_CODE_END_ADDR(fs->instruction_count)); + R500_US_CODE_END_ADDR(fs->instruction_count)); OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR); - OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, - fs->instruction_count * 6); + OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, fs->instruction_count * 6); for (i = 0; i < fs->instruction_count; i++) { OUT_CS(fs->instructions[i].inst0); OUT_CS(fs->instructions[i].inst1); @@ -134,6 +136,19 @@ void r500_emit_fragment_shader(struct r300_context* r300, OUT_CS(fs->instructions[i].inst4); OUT_CS(fs->instructions[i].inst5); } + + if (constants->count) { + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, + R500_GA_US_VECTOR_INDEX_TYPE_CONST); + OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, constants->count * 4); + for (i = 0; i < constants->count; i++) { + OUT_CS(constants->constants[i][0]); + OUT_CS(constants->constants[i][1]); + OUT_CS(constants->constants[i][2]); + OUT_CS(constants->constants[i][3]); + } + } + END_CS; } @@ -229,6 +244,7 @@ void r300_emit_rs_block_state(struct r300_context* r300, } for (i = 0; i < 8; i++) { OUT_CS(rs->ip[i]); + //debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); } OUT_CS_REG_SEQ(R300_RS_COUNT, 2); @@ -242,8 +258,12 @@ void r300_emit_rs_block_state(struct r300_context* r300, } for (i = 0; i < 8; i++) { OUT_CS(rs->inst[i]); + //debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); } + /* debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count, + rs->inst_count); */ + END_CS; } diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 06dd6842ed..519879114a 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -82,6 +82,13 @@ static INLINE unsigned r300_fs_src(struct r300_fs_asm* assembler, case TGSI_FILE_TEMPORARY: return src->Index + assembler->temp_offset; break; + case TGSI_FILE_IMMEDIATE: + return src->Index + assembler->imm_offset | (1 << 8); + break; + case TGSI_FILE_CONSTANT: + /* XXX magic */ + return src->Index | (1 << 8); + break; default: debug_printf("r300: fs: Unimplemented src %d\n", src->File); break; @@ -269,11 +276,13 @@ void r300_translate_fragment_shader(struct r300_context* r300, void r500_translate_fragment_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { + struct tgsi_parse_context parser; + int i, imm_const_offset; + struct r300_fs_asm* assembler = CALLOC_STRUCT(r300_fs_asm); if (assembler == NULL) { return; } - struct tgsi_parse_context parser; tgsi_parse_init(&parser, fs->shader.state.tokens); @@ -288,9 +297,24 @@ void r500_translate_fragment_shader(struct r300_context* r300, * of the program. */ r300_fs_declare(assembler, &parser.FullToken.FullDeclaration); break; + case TGSI_TOKEN_TYPE_IMMEDIATE: + assembler->imm_offset++; + imm_const_offset = assembler->imm_offset + + r300->shader_constants[PIPE_SHADER_FRAGMENT].user_count; + /* I am not amused by the length of these. */ + for (i = 0; i < 4; i++) { + r300->shader_constants[PIPE_SHADER_FRAGMENT].constants + [imm_const_offset][i] = + parser.FullToken.FullImmediate.u.ImmediateFloat32[i] + .Float; + } + r300->shader_constants[PIPE_SHADER_FRAGMENT].count = + imm_const_offset; + break; case TGSI_TOKEN_TYPE_INSTRUCTION: r500_fs_instruction(fs, assembler, &parser.FullToken.FullInstruction); + break; } } diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 87a5c99648..8011e1f538 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -60,6 +60,8 @@ /* Temporary struct used to hold assembly state while putting together * fragment programs. */ struct r300_fs_asm { + /* Pipe context. */ + struct r300_context* r300; /* Number of colors. */ unsigned color_count; /* Number of texcoords. */ @@ -70,6 +72,10 @@ struct r300_fs_asm { unsigned temp_offset; /* Number of requested temporary registers. */ unsigned temp_count; + /* Offset for immediate constants. Neither R300 nor R500 can do four + * inline constants per source, so instead we copy immediates into the + * constant buffer. */ + unsigned imm_offset; }; void r300_translate_fragment_shader(struct r300_context* r300, diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index a49bec9910..744d60364b 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -36,9 +36,9 @@ static void r300_surface_fill(struct pipe_context* pipe, struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; struct r300_texture* tex = (struct r300_texture*)dest->texture; int i; - - float r, g, b, a; + float r, g, b, a, depth; unsigned pixpitch = tex->stride / tex->tex.block.size; + r = (float)((color >> 16) & 0xff) / 255.0f; g = (float)((color >> 8) & 0xff) / 255.0f; b = (float)((color >> 0) & 0xff) / 255.0f; -- cgit v1.2.3 From f197a8b9166f7d40c7f1ddd800054d6274ec1c24 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 15 Mar 2009 23:42:42 -0700 Subject: r300-gallium: Fix vertex memory offsets. Wow, I must have been asleep when I made that mistake. --- src/gallium/drivers/r300/r300_state_derived.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 8ef9e36b5b..d761a0302f 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -57,14 +57,13 @@ static void r300_update_vertex_layout(struct r300_context* r300) case TGSI_SEMANTIC_COLOR: tab[i] = 2 + cols++; break; - case TGSI_SEMANTIC_FOG: - fog = TRUE; - tab[i] = 6 + texs++; - break; case TGSI_SEMANTIC_PSIZE: psize = TRUE; tab[i] = 1; break; + case TGSI_SEMANTIC_FOG: + fog = TRUE; + /* Fall through... */ case TGSI_SEMANTIC_GENERIC: tab[i] = 6 + texs++; break; @@ -89,7 +88,7 @@ static void r300_update_vertex_layout(struct r300_context* r300) debug_printf("r300: Forcing vertex position attribute emit...\n"); /* Make room for the position attribute * at the beginning of the tab. */ - for (i = 1; i < 16; i++) { + for (i = 15; i > 0; i--) { tab[i] = tab[i-1]; } tab[0] = 0; -- cgit v1.2.3 From 5bc456284933f47151a56a93480de39cd8751953 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 00:29:37 -0700 Subject: r300-gallium: Emit constants as floats, not uints. --- src/gallium/drivers/r300/r300_emit.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 3b580b7d51..ea726b9f9f 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -142,10 +142,10 @@ void r500_emit_fragment_shader(struct r300_context* r300, R500_GA_US_VECTOR_INDEX_TYPE_CONST); OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, constants->count * 4); for (i = 0; i < constants->count; i++) { - OUT_CS(constants->constants[i][0]); - OUT_CS(constants->constants[i][1]); - OUT_CS(constants->constants[i][2]); - OUT_CS(constants->constants[i][3]); + OUT_CS_32F(constants->constants[i][0]); + OUT_CS_32F(constants->constants[i][1]); + OUT_CS_32F(constants->constants[i][2]); + OUT_CS_32F(constants->constants[i][3]); } } -- cgit v1.2.3 From 877aaad06dbaab3beadd4fe6da2b934bf035002c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 00:30:56 -0700 Subject: r300-gallium: r500-fs: Actually handle consts and imms correctly. This makes mad.txt draw correctly. Yay! --- src/gallium/drivers/r300/r300_state_shader.c | 76 ++++++++++++++++++++++++---- src/gallium/drivers/r300/r300_state_shader.h | 2 + 2 files changed, 67 insertions(+), 11 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 519879114a..5a1e81fa5b 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -59,6 +59,7 @@ static void r300_fs_declare(struct r300_fs_asm* assembler, } break; case TGSI_FILE_OUTPUT: + case TGSI_FILE_CONSTANT: break; case TGSI_FILE_TEMPORARY: assembler->temp_count++; @@ -160,9 +161,9 @@ static INLINE uint32_t r500_alpha_swiz(struct tgsi_full_src_register* reg) return r500_rgba_swiz(reg) >> 9; } -static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, +/* Setup an ALU operation. */ +static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, struct tgsi_full_dst_register* dst) { int i = fs->instruction_count; @@ -178,6 +179,50 @@ static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, fs->instructions[i].inst0 |= R500_INST_TEX_SEM_WAIT | R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; +} + +static INLINE void r500_emit_mad(struct r500_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst) +{ + int i = fs->instruction_count; + + r500_emit_alu(fs, assembler, dst); + + fs->instructions[i].inst1 = + R500_RGB_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)) | + R500_RGB_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)) | + R500_RGB_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); + fs->instructions[i].inst2 = + R500_ALPHA_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)) | + R500_ALPHA_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)) | + R500_ALPHA_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); + fs->instructions[i].inst3 = R500_ALU_RGB_SEL_A_SRC0 | + R500_SWIZ_RGB_A(r500_rgb_swiz(&src[0])) | + R500_ALU_RGB_SEL_B_SRC1 | + R500_SWIZ_RGB_B(r500_rgb_swiz(&src[1])); + fs->instructions[i].inst4 = R500_ALPHA_OP_MAD | + R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src[0])) | + R500_ALPHA_SEL_A_SRC0 | + R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src[1])) | + R500_ALPHA_SEL_B_SRC1; + fs->instructions[i].inst5 = R500_ALU_RGBA_OP_MAD | + R500_ALU_RGBA_ALPHA_SEL_C_SRC2 | + R500_SWIZ_RGBA_C(r500_rgb_swiz(&src[2])); + R500_SWIZ_ALPHA_C(r500_alpha_swiz(&src[2])); + + fs->instruction_count++; +} + +static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst) +{ + int i = fs->instruction_count; + + r500_emit_alu(fs, assembler, dst); fs->instructions[i].inst1 = R500_RGB_ADDR0(r300_fs_src(assembler, &src->SrcRegister)); @@ -230,6 +275,10 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, * AMD/ATI names for opcodes, please, as it facilitates using the * documentation. */ switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_MAD: + r500_emit_mad(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0]); + break; case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: r500_emit_mov(fs, assembler, &inst->FullSrcRegisters[0], @@ -277,12 +326,16 @@ void r500_translate_fragment_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { struct tgsi_parse_context parser; - int i, imm_const_offset; + int i; + struct r300_constant_buffer* consts = + &r300->shader_constants[PIPE_SHADER_FRAGMENT]; struct r300_fs_asm* assembler = CALLOC_STRUCT(r300_fs_asm); if (assembler == NULL) { return; } + /* Setup starting offset for immediates. */ + assembler->imm_offset = consts->user_count; tgsi_parse_init(&parser, fs->shader.state.tokens); @@ -298,18 +351,15 @@ void r500_translate_fragment_shader(struct r300_context* r300, r300_fs_declare(assembler, &parser.FullToken.FullDeclaration); break; case TGSI_TOKEN_TYPE_IMMEDIATE: - assembler->imm_offset++; - imm_const_offset = assembler->imm_offset + - r300->shader_constants[PIPE_SHADER_FRAGMENT].user_count; + debug_printf("r300: Emitting immediate to constant buffer, " + "position %d\n", consts->user_count); /* I am not amused by the length of these. */ for (i = 0; i < 4; i++) { - r300->shader_constants[PIPE_SHADER_FRAGMENT].constants - [imm_const_offset][i] = + consts->constants[assembler->imm_offset][i] = parser.FullToken.FullImmediate.u.ImmediateFloat32[i] .Float; } - r300->shader_constants[PIPE_SHADER_FRAGMENT].count = - imm_const_offset; + assembler->imm_count++; break; case TGSI_TOKEN_TYPE_INSTRUCTION: r500_fs_instruction(fs, assembler, @@ -319,10 +369,14 @@ void r500_translate_fragment_shader(struct r300_context* r300, } - debug_printf("%d texs and %d colors, first free reg is %d\n", + debug_printf("r300: %d texs and %d colors, first free reg is %d\n", assembler->tex_count, assembler->color_count, assembler->tex_count + assembler->color_count); + consts->count = consts->user_count + assembler->imm_count; + debug_printf("r300: %d total constants, " + "%d from user and %d from immediates\n", consts->count, + consts->user_count, assembler->imm_count); r500_fs_finalize(fs, assembler); tgsi_dump(fs->shader.state.tokens); diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 8011e1f538..284ae6acf1 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -76,6 +76,8 @@ struct r300_fs_asm { * inline constants per source, so instead we copy immediates into the * constant buffer. */ unsigned imm_offset; + /* Number of immediate constants. */ + unsigned imm_count; }; void r300_translate_fragment_shader(struct r300_context* r300, -- cgit v1.2.3 From 65ec17f3203d82be5cea8f1f57a1b8db0fa8a8a3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 04:57:43 -0700 Subject: r300-gallium: r500-fs: Add dot products. We're cookin' now. --- src/gallium/drivers/r300/r300_state_shader.c | 106 ++++++++++++++++++++------- 1 file changed, 79 insertions(+), 27 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 5a1e81fa5b..fa70a67e10 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -161,6 +161,33 @@ static INLINE uint32_t r500_alpha_swiz(struct tgsi_full_src_register* reg) return r500_rgba_swiz(reg) >> 9; } +static INLINE uint32_t r500_rgba_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_DP3: + return R500_ALU_RGBA_OP_DP3; + case TGSI_OPCODE_DP4: + return R500_ALU_RGBA_OP_DP4; + case TGSI_OPCODE_MAD: + return R500_ALU_RGBA_OP_MAD; + default: + return 0; + } +} + +static INLINE uint32_t r500_alpha_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_DP3: + case TGSI_OPCODE_DP4: + return R500_ALPHA_OP_DP; + case TGSI_OPCODE_MAD: + return R500_ALPHA_OP_MAD; + default: + return 0; + } +} + /* Setup an ALU operation. */ static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, @@ -181,36 +208,56 @@ static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; } -static INLINE void r500_emit_mad(struct r500_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst) +static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst, + unsigned op, + unsigned count) { int i = fs->instruction_count; r500_emit_alu(fs, assembler, dst); - fs->instructions[i].inst1 = - R500_RGB_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)) | - R500_RGB_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)) | - R500_RGB_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); - fs->instructions[i].inst2 = - R500_ALPHA_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)) | - R500_ALPHA_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)) | - R500_ALPHA_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); - fs->instructions[i].inst3 = R500_ALU_RGB_SEL_A_SRC0 | - R500_SWIZ_RGB_A(r500_rgb_swiz(&src[0])) | - R500_ALU_RGB_SEL_B_SRC1 | - R500_SWIZ_RGB_B(r500_rgb_swiz(&src[1])); - fs->instructions[i].inst4 = R500_ALPHA_OP_MAD | - R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src[0])) | - R500_ALPHA_SEL_A_SRC0 | - R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src[1])) | - R500_ALPHA_SEL_B_SRC1; - fs->instructions[i].inst5 = R500_ALU_RGBA_OP_MAD | - R500_ALU_RGBA_ALPHA_SEL_C_SRC2 | - R500_SWIZ_RGBA_C(r500_rgb_swiz(&src[2])); - R500_SWIZ_ALPHA_C(r500_alpha_swiz(&src[2])); + switch (count) { + case 3: + fs->instructions[i].inst1 = + R500_RGB_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); + fs->instructions[i].inst2 = + R500_ALPHA_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); + fs->instructions[i].inst5 = + R500_ALU_RGBA_ALPHA_SEL_C_SRC2 | + R500_SWIZ_RGBA_C(r500_rgb_swiz(&src[2])); + R500_SWIZ_ALPHA_C(r500_alpha_swiz(&src[2])); + case 2: + fs->instructions[i].inst1 |= + R500_RGB_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)); + fs->instructions[i].inst2 |= + R500_ALPHA_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)); + fs->instructions[i].inst3 = + R500_ALU_RGB_SEL_B_SRC1 | + R500_SWIZ_RGB_B(r500_rgb_swiz(&src[1])); + fs->instructions[i].inst4 = + R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src[1])) | + R500_ALPHA_SEL_B_SRC1; + case 1: + case 0: + default: + fs->instructions[i].inst1 |= + R500_RGB_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)); + fs->instructions[i].inst2 |= + R500_ALPHA_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)); + fs->instructions[i].inst3 |= + R500_ALU_RGB_SEL_A_SRC0 | + R500_SWIZ_RGB_A(r500_rgb_swiz(&src[0])); + fs->instructions[i].inst4 |= + R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src[0])) | + R500_ALPHA_SEL_A_SRC0; + break; + } + + fs->instructions[i].inst4 |= r500_alpha_op(op); + fs->instructions[i].inst5 |= r500_rgba_op(op); fs->instruction_count++; } @@ -275,9 +322,14 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, * AMD/ATI names for opcodes, please, as it facilitates using the * documentation. */ switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_DP3: + case TGSI_OPCODE_DP4: + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); + break; case TGSI_OPCODE_MAD: - r500_emit_mad(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0]); + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: -- cgit v1.2.3 From a22e40c29c3bf2ae546a03b6749e895fb74c2b24 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 05:13:03 -0700 Subject: r300-gallium: r500-fs: Add DPH. --- src/gallium/drivers/r300/r300_state_shader.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index fa70a67e10..2926c9a7b1 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -167,6 +167,7 @@ static INLINE uint32_t r500_rgba_op(unsigned op) case TGSI_OPCODE_DP3: return R500_ALU_RGBA_OP_DP3; case TGSI_OPCODE_DP4: + case TGSI_OPCODE_DPH: return R500_ALU_RGBA_OP_DP4; case TGSI_OPCODE_MAD: return R500_ALU_RGBA_OP_MAD; @@ -180,6 +181,7 @@ static INLINE uint32_t r500_alpha_op(unsigned op) switch (op) { case TGSI_OPCODE_DP3: case TGSI_OPCODE_DP4: + case TGSI_OPCODE_DPH: return R500_ALPHA_OP_DP; case TGSI_OPCODE_MAD: return R500_ALPHA_OP_MAD; @@ -227,7 +229,7 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, R500_ALPHA_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); fs->instructions[i].inst5 = R500_ALU_RGBA_ALPHA_SEL_C_SRC2 | - R500_SWIZ_RGBA_C(r500_rgb_swiz(&src[2])); + R500_SWIZ_RGBA_C(r500_rgb_swiz(&src[2])) | R500_SWIZ_ALPHA_C(r500_alpha_swiz(&src[2])); case 2: fs->instructions[i].inst1 |= @@ -318,6 +320,7 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, struct tgsi_full_instruction* inst) { + int i; /* Switch between opcodes. When possible, prefer using the official * AMD/ATI names for opcodes, please, as it facilitates using the * documentation. */ @@ -327,6 +330,14 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); break; + case TGSI_OPCODE_DPH: + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); + /* Force alpha swizzle to one */ + i = fs->instruction_count - 1; + fs->instructions[i].inst4 &= ~R500_SWIZ_ALPHA_A(0x7); + fs->instructions[i].inst4 |= R500_SWIZ_ALPHA_A(R500_SWIZZLE_ONE); + break; case TGSI_OPCODE_MAD: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); -- cgit v1.2.3 From fe1c94d8d34cbda3b6005ecb9d7a2087df8c10a9 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 05:58:46 -0700 Subject: r300-gallium: r500-fs: Stub out the simple scalar ops. COS, SIN, and CSC are not simple. --- src/gallium/drivers/r300/r300_state_shader.c | 39 ++++++++++++++++++++++++---- 1 file changed, 34 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 2926c9a7b1..e4db008ff8 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -161,9 +161,20 @@ static INLINE uint32_t r500_alpha_swiz(struct tgsi_full_src_register* reg) return r500_rgba_swiz(reg) >> 9; } +static INLINE uint32_t r500_sop_swiz(struct tgsi_full_src_register* reg) +{ + /* Only the first 3 bits... */ + return r500_rgba_swiz(reg) & 0x7; +} + static INLINE uint32_t r500_rgba_op(unsigned op) { switch (op) { + case TGSI_OPCODE_EX2: + case TGSI_OPCODE_LG2: + case TGSI_OPCODE_RCP: + case TGSI_OPCODE_RSQ: + return R500_ALU_RGBA_OP_SOP; case TGSI_OPCODE_DP3: return R500_ALU_RGBA_OP_DP3; case TGSI_OPCODE_DP4: @@ -179,6 +190,14 @@ static INLINE uint32_t r500_rgba_op(unsigned op) static INLINE uint32_t r500_alpha_op(unsigned op) { switch (op) { + case TGSI_OPCODE_EX2: + return R500_ALPHA_OP_EX2; + case TGSI_OPCODE_LG2: + return R500_ALPHA_OP_LN2; + case TGSI_OPCODE_RCP: + return R500_ALPHA_OP_RCP; + case TGSI_OPCODE_RSQ: + return R500_ALPHA_OP_RSQ; case TGSI_OPCODE_DP3: case TGSI_OPCODE_DP4: case TGSI_OPCODE_DPH: @@ -215,7 +234,8 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, struct tgsi_full_src_register* src, struct tgsi_full_dst_register* dst, unsigned op, - unsigned count) + unsigned count, + boolean is_sop) { int i = fs->instruction_count; @@ -253,7 +273,8 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, R500_ALU_RGB_SEL_A_SRC0 | R500_SWIZ_RGB_A(r500_rgb_swiz(&src[0])); fs->instructions[i].inst4 |= - R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src[0])) | + R500_SWIZ_ALPHA_A(is_sop ? r500_sop_swiz(&src[0]) : + r500_alpha_swiz(&src[0])) | R500_ALPHA_SEL_A_SRC0; break; } @@ -325,14 +346,21 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, * AMD/ATI names for opcodes, please, as it facilitates using the * documentation. */ switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_EX2: + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1, + true); + break; case TGSI_OPCODE_DP3: case TGSI_OPCODE_DP4: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2, + false); break; case TGSI_OPCODE_DPH: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2, + false); /* Force alpha swizzle to one */ i = fs->instruction_count - 1; fs->instructions[i].inst4 &= ~R500_SWIZ_ALPHA_A(0x7); @@ -340,7 +368,8 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, break; case TGSI_OPCODE_MAD: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, + false); break; case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: -- cgit v1.2.3 From d16533cc873bd120264483d6a170fb296ba24835 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 06:14:23 -0700 Subject: r300-gallium: r500-fs: MUL. --- src/gallium/drivers/r300/r300_state_shader.c | 7 +++++++ src/gallium/drivers/r300/r300_state_shader.h | 23 +++++++++++++++++++++++ 2 files changed, 30 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index e4db008ff8..9f4024c4ba 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -366,6 +366,13 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, fs->instructions[i].inst4 &= ~R500_SWIZ_ALPHA_A(0x7); fs->instructions[i].inst4 |= R500_SWIZ_ALPHA_A(R500_SWIZZLE_ONE); break; + case TGSI_OPCODE_MUL: + /* Force our src2 to zero */ + inst->FullSrcRegisters[2] = r500_constant_zero; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, + false); + break; case TGSI_OPCODE_MAD: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 284ae6acf1..76e0f0cd2d 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -30,6 +30,7 @@ #include "r300_reg.h" #include "r300_screen.h" +/* XXX this all should find its way back to r300_reg */ /* Swizzle tools */ #define R500_SWIZZLE_ZERO 4 #define R500_SWIZZLE_HALF 5 @@ -57,6 +58,28 @@ #define R500_ALU_WMASK(x) ((x) << 11) #define R500_ALU_OMASK(x) ((x) << 15) +/* TGSI constants. TGSI is like XML: If it can't solve your problems, you're + * not using enough of it. */ +static const struct tgsi_full_src_register r500_constant_zero = { + .SrcRegister.Extended = TRUE, + .SrcRegister.File = TGSI_FILE_TEMPORARY, + .SrcRegister.Index = 0, + .SrcRegisterExtSwz.ExtSwizzleX = TGSI_EXTSWIZZLE_ZERO, + .SrcRegisterExtSwz.ExtSwizzleY = TGSI_EXTSWIZZLE_ZERO, + .SrcRegisterExtSwz.ExtSwizzleZ = TGSI_EXTSWIZZLE_ZERO, + .SrcRegisterExtSwz.ExtSwizzleW = TGSI_EXTSWIZZLE_ZERO, +}; + +static const struct tgsi_full_src_register r500_constant_one = { + .SrcRegister.Extended = TRUE, + .SrcRegister.File = TGSI_FILE_TEMPORARY, + .SrcRegister.Index = 0, + .SrcRegisterExtSwz.ExtSwizzleX = TGSI_EXTSWIZZLE_ONE, + .SrcRegisterExtSwz.ExtSwizzleY = TGSI_EXTSWIZZLE_ONE, + .SrcRegisterExtSwz.ExtSwizzleZ = TGSI_EXTSWIZZLE_ONE, + .SrcRegisterExtSwz.ExtSwizzleW = TGSI_EXTSWIZZLE_ONE, +}; + /* Temporary struct used to hold assembly state while putting together * fragment programs. */ struct r300_fs_asm { -- cgit v1.2.3 From b9ecd7273ba80a1ac570c8116a0d37d6efa83c5f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 06:19:30 -0700 Subject: r300-gallium: Cleanup a few things. --- src/gallium/drivers/r300/r300_state_shader.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 9f4024c4ba..d6afd83459 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -84,7 +84,7 @@ static INLINE unsigned r300_fs_src(struct r300_fs_asm* assembler, return src->Index + assembler->temp_offset; break; case TGSI_FILE_IMMEDIATE: - return src->Index + assembler->imm_offset | (1 << 8); + return (src->Index + assembler->imm_offset) | (1 << 8); break; case TGSI_FILE_CONSTANT: /* XXX magic */ @@ -227,6 +227,11 @@ static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, fs->instructions[i].inst0 |= R500_INST_TEX_SEM_WAIT | R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; + + fs->instructions[i].inst4 = + R500_ALPHA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); + fs->instructions[i].inst5 = + R500_ALU_RGBA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); } static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, @@ -247,7 +252,7 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, R500_RGB_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); fs->instructions[i].inst2 = R500_ALPHA_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); - fs->instructions[i].inst5 = + fs->instructions[i].inst5 |= R500_ALU_RGBA_ALPHA_SEL_C_SRC2 | R500_SWIZ_RGBA_C(r500_rgb_swiz(&src[2])) | R500_SWIZ_ALPHA_C(r500_alpha_swiz(&src[2])); @@ -259,7 +264,7 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, fs->instructions[i].inst3 = R500_ALU_RGB_SEL_B_SRC1 | R500_SWIZ_RGB_B(r500_rgb_swiz(&src[1])); - fs->instructions[i].inst4 = + fs->instructions[i].inst4 |= R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src[1])) | R500_ALPHA_SEL_B_SRC1; case 1: @@ -302,10 +307,10 @@ static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, R500_SWIZ_RGB_A(r500_rgb_swiz(src)) | R500_ALU_RGB_SEL_B_SRC0 | R500_SWIZ_RGB_B(r500_rgb_swiz(src)); - fs->instructions[i].inst4 = R500_ALPHA_OP_CMP | + fs->instructions[i].inst4 |= R500_ALPHA_OP_CMP | R500_SWIZ_ALPHA_A(r500_alpha_swiz(src)) | R500_SWIZ_ALPHA_B(r500_alpha_swiz(src)); - fs->instructions[i].inst5 = + fs->instructions[i].inst5 |= R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | R500_ALU_RGBA_A_SWIZ_0; @@ -481,8 +486,6 @@ void r500_translate_fragment_shader(struct r300_context* r300, tgsi_dump(fs->shader.state.tokens); r500_fs_dump(fs); - //r500_copy_passthrough_shader(fs); - tgsi_parse_free(&parser); FREE(assembler); } -- cgit v1.2.3 From 3cce08e31326fb28ebc435065eba784d516922fd Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 06:36:55 -0700 Subject: r300-gallium: r500-fs: Working ADD and MUL, add more sop stuff. --- src/gallium/drivers/r300/r300_state_shader.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index d6afd83459..e7e5a119d0 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -175,6 +175,8 @@ static INLINE uint32_t r500_rgba_op(unsigned op) case TGSI_OPCODE_RCP: case TGSI_OPCODE_RSQ: return R500_ALU_RGBA_OP_SOP; + case TGSI_OPCODE_FRC: + return R500_ALU_RGBA_OP_FRC; case TGSI_OPCODE_DP3: return R500_ALU_RGBA_OP_DP3; case TGSI_OPCODE_DP4: @@ -198,6 +200,8 @@ static INLINE uint32_t r500_alpha_op(unsigned op) return R500_ALPHA_OP_RCP; case TGSI_OPCODE_RSQ: return R500_ALPHA_OP_RSQ; + case TGSI_OPCODE_FRC: + return R500_ALPHA_OP_FRC; case TGSI_OPCODE_DP3: case TGSI_OPCODE_DP4: case TGSI_OPCODE_DPH: @@ -253,8 +257,9 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, fs->instructions[i].inst2 = R500_ALPHA_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); fs->instructions[i].inst5 |= - R500_ALU_RGBA_ALPHA_SEL_C_SRC2 | + R500_ALU_RGBA_SEL_C_SRC2 | R500_SWIZ_RGBA_C(r500_rgb_swiz(&src[2])) | + R500_ALU_RGBA_ALPHA_SEL_C_SRC2 | R500_SWIZ_ALPHA_C(r500_alpha_swiz(&src[2])); case 2: fs->instructions[i].inst1 |= @@ -352,10 +357,18 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, * documentation. */ switch (inst->Instruction.Opcode) { case TGSI_OPCODE_EX2: + case TGSI_OPCODE_LG2: + case TGSI_OPCODE_RCP: + case TGSI_OPCODE_RSQ: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1, true); break; + case TGSI_OPCODE_FRC: + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1, + false); + break; case TGSI_OPCODE_DP3: case TGSI_OPCODE_DP4: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, @@ -371,6 +384,15 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, fs->instructions[i].inst4 &= ~R500_SWIZ_ALPHA_A(0x7); fs->instructions[i].inst4 |= R500_SWIZ_ALPHA_A(R500_SWIZZLE_ONE); break; + case TGSI_OPCODE_ADD: + /* Force src0 to one, move all registers over */ + inst->FullSrcRegisters[2] = inst->FullSrcRegisters[1]; + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; + inst->FullSrcRegisters[0] = r500_constant_one; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, + false); + break; case TGSI_OPCODE_MUL: /* Force our src2 to zero */ inst->FullSrcRegisters[2] = r500_constant_zero; -- cgit v1.2.3 From 567aead92ae1b51578b0dea4709662b0d9c130e2 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 06:41:57 -0700 Subject: r300-gallium: r500-fs: Clamp only when saturation flags are set. --- src/gallium/drivers/r300/r300_state_shader.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index e7e5a119d0..0a4f7c8d7e 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -228,9 +228,7 @@ static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, R500_ALU_WMASK(dst->DstRegister.WriteMask); } - fs->instructions[i].inst0 |= - R500_INST_TEX_SEM_WAIT | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; + fs->instructions[i].inst0 |= R500_INST_TEX_SEM_WAIT; fs->instructions[i].inst4 = R500_ALPHA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); @@ -421,6 +419,12 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, inst->Instruction.Opcode); break; } + + /* Clamp, if saturation flags are set. */ + if (inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE) { + fs->instructions[fs->instruction_count - 1].inst0 |= + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; + } } static void r500_fs_finalize(struct r500_fragment_shader* fs, -- cgit v1.2.3 From 5ad17215405700accc2a2cde04a0023725633c57 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 06:48:05 -0700 Subject: r300-gallium: r500-fs: Add ABS. --- src/gallium/drivers/r300/r300_state_shader.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 0a4f7c8d7e..564acad83b 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -398,6 +398,19 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, false); break; + case TGSI_OPCODE_ABS: + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, + false); + /* Set absolute value modifiers. */ + i = fs->instruction_count - 1; + fs->instructions[i].inst3 |= + R500_ALU_RGB_MOD_A_ABS | + R500_ALU_RGB_MOD_B_ABS; + fs->instructions[i].inst4 |= + R500_ALPHA_MOD_A_ABS | + R500_ALPHA_MOD_B_ABS; + break; case TGSI_OPCODE_MAD: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, -- cgit v1.2.3 From add896aec8783aedbaf8d0127d8da046ce2657b5 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 09:48:07 -0700 Subject: r300-gallium: Fix relocation for textures. This keeps texture emit from invalidating CS. --- src/gallium/drivers/r300/r300_emit.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index ea726b9f9f..7b09a41f9c 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -301,8 +301,8 @@ void r300_emit_texture(struct r300_context* r300, OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1); OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2); OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (offset * 4), 1); - OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_GTT | - RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_RELOC(tex->buffer, 0, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0); END_CS; } -- cgit v1.2.3 From f1d93f60826cb95d4d19348d1ca505705c4455c6 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 10:23:45 -0700 Subject: r300-gallium: r500-fs: CMP/MOV/SWZ, negation, ADD/MAD/MUL/SUB. Also a fair amount of cleanup. --- src/gallium/drivers/r300/r300_state_shader.c | 75 ++++++++++++++++------------ src/gallium/drivers/r300/r300_state_shader.h | 6 +-- 2 files changed, 44 insertions(+), 37 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 564acad83b..575d771c07 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -76,6 +76,8 @@ static INLINE unsigned r300_fs_src(struct r300_fs_asm* assembler, struct tgsi_src_register* src) { switch (src->File) { + case TGSI_FILE_NULL: + return 0; case TGSI_FILE_INPUT: /* XXX may be wrong */ return src->Index; @@ -152,19 +154,22 @@ static uint32_t r500_strq_swiz(struct tgsi_full_src_register* reg) static INLINE uint32_t r500_rgb_swiz(struct tgsi_full_src_register* reg) { /* Only the first 9 bits... */ - return r500_rgba_swiz(reg) & 0x1ff; + return (r500_rgba_swiz(reg) & 0x1ff) | + (reg->SrcRegister.Negate ? (1 << 9) : 0); } static INLINE uint32_t r500_alpha_swiz(struct tgsi_full_src_register* reg) { /* Only the last 3 bits... */ - return r500_rgba_swiz(reg) >> 9; + return (r500_rgba_swiz(reg) >> 9) | + (reg->SrcRegister.Negate ? (1 << 9) : 0); } static INLINE uint32_t r500_sop_swiz(struct tgsi_full_src_register* reg) { /* Only the first 3 bits... */ - return r500_rgba_swiz(reg) & 0x7; + return (r500_rgba_swiz(reg) & 0x7) | + (reg->SrcRegister.Negate ? (1 << 9) : 0); } static INLINE uint32_t r500_rgba_op(unsigned op) @@ -182,7 +187,14 @@ static INLINE uint32_t r500_rgba_op(unsigned op) case TGSI_OPCODE_DP4: case TGSI_OPCODE_DPH: return R500_ALU_RGBA_OP_DP4; + case TGSI_OPCODE_CMP: + case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SWZ: + return R500_ALU_RGBA_OP_CMP; + case TGSI_OPCODE_ADD: case TGSI_OPCODE_MAD: + case TGSI_OPCODE_MUL: + case TGSI_OPCODE_SUB: return R500_ALU_RGBA_OP_MAD; default: return 0; @@ -206,7 +218,14 @@ static INLINE uint32_t r500_alpha_op(unsigned op) case TGSI_OPCODE_DP4: case TGSI_OPCODE_DPH: return R500_ALPHA_OP_DP; + case TGSI_OPCODE_CMP: + case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SWZ: + return R500_ALPHA_OP_CMP; + case TGSI_OPCODE_ADD: case TGSI_OPCODE_MAD: + case TGSI_OPCODE_MUL: + case TGSI_OPCODE_SUB: return R500_ALPHA_OP_MAD; default: return 0; @@ -293,34 +312,6 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, fs->instruction_count++; } -static INLINE void r500_emit_mov(struct r500_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst) -{ - int i = fs->instruction_count; - - r500_emit_alu(fs, assembler, dst); - - fs->instructions[i].inst1 = - R500_RGB_ADDR0(r300_fs_src(assembler, &src->SrcRegister)); - fs->instructions[i].inst2 = - R500_ALPHA_ADDR0(r300_fs_src(assembler, &src->SrcRegister)); - fs->instructions[i].inst3 = R500_ALU_RGB_SEL_A_SRC0 | - R500_SWIZ_RGB_A(r500_rgb_swiz(src)) | - R500_ALU_RGB_SEL_B_SRC0 | - R500_SWIZ_RGB_B(r500_rgb_swiz(src)); - fs->instructions[i].inst4 |= R500_ALPHA_OP_CMP | - R500_SWIZ_ALPHA_A(r500_alpha_swiz(src)) | - R500_SWIZ_ALPHA_B(r500_alpha_swiz(src)); - fs->instructions[i].inst5 |= - R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0; - - fs->instruction_count++; -} - static INLINE void r500_emit_tex(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, uint32_t op, @@ -382,6 +373,11 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, fs->instructions[i].inst4 &= ~R500_SWIZ_ALPHA_A(0x7); fs->instructions[i].inst4 |= R500_SWIZ_ALPHA_A(R500_SWIZZLE_ONE); break; + case TGSI_OPCODE_SUB: + /* Just like ADD, but flip the negation on src1 first */ + inst->FullSrcRegisters[1].SrcRegister.Negate = + !inst->FullSrcRegisters[1].SrcRegister.Negate; + /* Fall through */ case TGSI_OPCODE_ADD: /* Force src0 to one, move all registers over */ inst->FullSrcRegisters[2] = inst->FullSrcRegisters[1]; @@ -391,6 +387,15 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, false); break; + case TGSI_OPCODE_CMP: + /* Swap src0 and src2 */ + inst->FullSrcRegisters[3] = inst->FullSrcRegisters[2]; + inst->FullSrcRegisters[2] = inst->FullSrcRegisters[0]; + inst->FullSrcRegisters[0] = inst->FullSrcRegisters[3]; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, + false); + break; case TGSI_OPCODE_MUL: /* Force our src2 to zero */ inst->FullSrcRegisters[2] = r500_constant_zero; @@ -418,8 +423,12 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, break; case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: - r500_emit_mov(fs, assembler, &inst->FullSrcRegisters[0], - &inst->FullDstRegisters[0]); + /* src0 -> src1 and src2 forced to zero */ + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; + inst->FullSrcRegisters[2] = r500_constant_zero; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, + false); break; case TGSI_OPCODE_TXP: r500_emit_tex(fs, assembler, 0, &inst->FullSrcRegisters[0], diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 76e0f0cd2d..06c0bb7378 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -62,8 +62,7 @@ * not using enough of it. */ static const struct tgsi_full_src_register r500_constant_zero = { .SrcRegister.Extended = TRUE, - .SrcRegister.File = TGSI_FILE_TEMPORARY, - .SrcRegister.Index = 0, + .SrcRegister.File = TGSI_FILE_NULL, .SrcRegisterExtSwz.ExtSwizzleX = TGSI_EXTSWIZZLE_ZERO, .SrcRegisterExtSwz.ExtSwizzleY = TGSI_EXTSWIZZLE_ZERO, .SrcRegisterExtSwz.ExtSwizzleZ = TGSI_EXTSWIZZLE_ZERO, @@ -72,8 +71,7 @@ static const struct tgsi_full_src_register r500_constant_zero = { static const struct tgsi_full_src_register r500_constant_one = { .SrcRegister.Extended = TRUE, - .SrcRegister.File = TGSI_FILE_TEMPORARY, - .SrcRegister.Index = 0, + .SrcRegister.File = TGSI_FILE_NULL, .SrcRegisterExtSwz.ExtSwizzleX = TGSI_EXTSWIZZLE_ONE, .SrcRegisterExtSwz.ExtSwizzleY = TGSI_EXTSWIZZLE_ONE, .SrcRegisterExtSwz.ExtSwizzleZ = TGSI_EXTSWIZZLE_ONE, -- cgit v1.2.3 From 93ef9ec5eb3422673bfc307a27d291ff18f22f0d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 10:44:23 -0700 Subject: r300-gallium: Clean up some code, un-special-case scalar ops. --- src/gallium/drivers/r300/r300_state_shader.c | 73 ++++++++++++---------------- 1 file changed, 31 insertions(+), 42 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 575d771c07..f7ca5c9139 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -165,13 +165,6 @@ static INLINE uint32_t r500_alpha_swiz(struct tgsi_full_src_register* reg) (reg->SrcRegister.Negate ? (1 << 9) : 0); } -static INLINE uint32_t r500_sop_swiz(struct tgsi_full_src_register* reg) -{ - /* Only the first 3 bits... */ - return (r500_rgba_swiz(reg) & 0x7) | - (reg->SrcRegister.Negate ? (1 << 9) : 0); -} - static INLINE uint32_t r500_rgba_op(unsigned op) { switch (op) { @@ -260,8 +253,7 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, struct tgsi_full_src_register* src, struct tgsi_full_dst_register* dst, unsigned op, - unsigned count, - boolean is_sop) + unsigned count) { int i = fs->instruction_count; @@ -300,8 +292,7 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, R500_ALU_RGB_SEL_A_SRC0 | R500_SWIZ_RGB_A(r500_rgb_swiz(&src[0])); fs->instructions[i].inst4 |= - R500_SWIZ_ALPHA_A(is_sop ? r500_sop_swiz(&src[0]) : - r500_alpha_swiz(&src[0])) | + R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src[0])) | R500_ALPHA_SEL_A_SRC0; break; } @@ -349,29 +340,34 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, case TGSI_OPCODE_LG2: case TGSI_OPCODE_RCP: case TGSI_OPCODE_RSQ: - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1, - true); - break; + /* Copy red swizzle to alpha for src0 */ + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX; + inst->FullSrcRegisters[0].SrcRegister.SwizzleW = + inst->FullSrcRegisters[0].SrcRegister.SwizzleX; + /* Fall through */ case TGSI_OPCODE_FRC: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1, - false); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1); break; + case TGSI_OPCODE_DPH: + /* Set alpha swizzle to one for src0 */ + if (!inst->FullSrcRegisters[0].SrcRegister.Extended) { + inst->FullSrcRegisters[0].SrcRegister.Extended = TRUE; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX = + inst->FullSrcRegisters[0].SrcRegister.SwizzleX; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleY = + inst->FullSrcRegisters[0].SrcRegister.SwizzleY; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleZ = + inst->FullSrcRegisters[0].SrcRegister.SwizzleZ; + } + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = + TGSI_EXTSWIZZLE_ONE; + /* Fall through */ case TGSI_OPCODE_DP3: case TGSI_OPCODE_DP4: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2, - false); - break; - case TGSI_OPCODE_DPH: - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2, - false); - /* Force alpha swizzle to one */ - i = fs->instruction_count - 1; - fs->instructions[i].inst4 &= ~R500_SWIZ_ALPHA_A(0x7); - fs->instructions[i].inst4 |= R500_SWIZ_ALPHA_A(R500_SWIZZLE_ONE); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); break; case TGSI_OPCODE_SUB: /* Just like ADD, but flip the negation on src1 first */ @@ -384,8 +380,7 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; inst->FullSrcRegisters[0] = r500_constant_one; r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, - false); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; case TGSI_OPCODE_CMP: /* Swap src0 and src2 */ @@ -393,20 +388,17 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, inst->FullSrcRegisters[2] = inst->FullSrcRegisters[0]; inst->FullSrcRegisters[0] = inst->FullSrcRegisters[3]; r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, - false); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; case TGSI_OPCODE_MUL: /* Force our src2 to zero */ inst->FullSrcRegisters[2] = r500_constant_zero; r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, - false); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; case TGSI_OPCODE_ABS: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, - false); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); /* Set absolute value modifiers. */ i = fs->instruction_count - 1; fs->instructions[i].inst3 |= @@ -418,8 +410,7 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, break; case TGSI_OPCODE_MAD: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, - false); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: @@ -427,8 +418,7 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; inst->FullSrcRegisters[2] = r500_constant_zero; r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3, - false); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; case TGSI_OPCODE_TXP: r500_emit_tex(fs, assembler, 0, &inst->FullSrcRegisters[0], @@ -452,8 +442,7 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, static void r500_fs_finalize(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler) { - /* XXX subtly wrong */ - fs->shader.stack_size = assembler->temp_offset; + fs->shader.stack_size = assembler->temp_count + assembler->temp_offset; /* XXX should this just go with OPCODE_END? */ fs->instructions[fs->instruction_count - 1].inst0 |= -- cgit v1.2.3 From 307e68f73996160cdf4a05a84c112e11e0d7a3c2 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 16:47:05 -0700 Subject: r300-gallium: r500-fs: Texture insts, ABS, moar comments. --- src/gallium/drivers/r300/r300_state_shader.c | 94 +++++++++++++++++++--------- 1 file changed, 66 insertions(+), 28 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index f7ca5c9139..7803494130 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -103,6 +103,10 @@ static INLINE unsigned r300_fs_dst(struct r300_fs_asm* assembler, struct tgsi_dst_register* dst) { switch (dst->File) { + case TGSI_FILE_NULL: + /* This happens during KIL instructions. */ + return 0; + break; case TGSI_FILE_OUTPUT: return 0; break; @@ -155,14 +159,16 @@ static INLINE uint32_t r500_rgb_swiz(struct tgsi_full_src_register* reg) { /* Only the first 9 bits... */ return (r500_rgba_swiz(reg) & 0x1ff) | - (reg->SrcRegister.Negate ? (1 << 9) : 0); + (reg->SrcRegister.Negate ? (1 << 9) : 0) | + (reg->SrcRegisterExtMod.Absolute ? (1 << 10) : 0); } static INLINE uint32_t r500_alpha_swiz(struct tgsi_full_src_register* reg) { /* Only the last 3 bits... */ return (r500_rgba_swiz(reg) >> 9) | - (reg->SrcRegister.Negate ? (1 << 9) : 0); + (reg->SrcRegister.Negate ? (1 << 9) : 0) | + (reg->SrcRegisterExtMod.Absolute ? (1 << 10) : 0); } static INLINE uint32_t r500_rgba_op(unsigned op) @@ -180,6 +186,7 @@ static INLINE uint32_t r500_rgba_op(unsigned op) case TGSI_OPCODE_DP4: case TGSI_OPCODE_DPH: return R500_ALU_RGBA_OP_DP4; + case TGSI_OPCODE_ABS: case TGSI_OPCODE_CMP: case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: @@ -211,6 +218,7 @@ static INLINE uint32_t r500_alpha_op(unsigned op) case TGSI_OPCODE_DP4: case TGSI_OPCODE_DPH: return R500_ALPHA_OP_DP; + case TGSI_OPCODE_ABS: case TGSI_OPCODE_CMP: case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: @@ -225,6 +233,22 @@ static INLINE uint32_t r500_alpha_op(unsigned op) } } +static INLINE uint32_t r500_tex_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_KIL: + return R500_TEX_INST_TEXKILL; + case TGSI_OPCODE_TEX: + return R500_TEX_INST_LD; + case TGSI_OPCODE_TXB: + return R500_TEX_INST_LODBIAS; + case TGSI_OPCODE_TXP: + return R500_TEX_INST_PROJ; + default: + return 0; + } +} + /* Setup an ALU operation. */ static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, @@ -305,9 +329,9 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, static INLINE void r500_emit_tex(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, - uint32_t op, struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst) + struct tgsi_full_dst_register* dst, + uint32_t op) { int i = fs->instruction_count; @@ -315,8 +339,8 @@ static INLINE void r500_emit_tex(struct r500_fragment_shader* fs, R500_TEX_WMASK(dst->DstRegister.WriteMask) | R500_INST_TEX_SEM_WAIT; fs->instructions[i].inst1 = R500_TEX_ID(0) | - R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED | - R500_TEX_INST_PROJ; + R500_TEX_SEM_ACQUIRE | //R500_TEX_IGNORE_UNCOVERED | + r500_tex_op(op); fs->instructions[i].inst2 = R500_TEX_SRC_ADDR(r300_fs_src(assembler, &src->SrcRegister)) | R500_SWIZ_TEX_STRQ(r500_strq_swiz(src)) | @@ -324,6 +348,12 @@ static INLINE void r500_emit_tex(struct r500_fragment_shader* fs, R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A; + if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { + fs->instructions[i].inst2 |= + R500_TEX_DST_ADDR(assembler->temp_offset + + assembler->temp_count); + } + fs->instruction_count++; } @@ -336,6 +366,7 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, * AMD/ATI names for opcodes, please, as it facilitates using the * documentation. */ switch (inst->Instruction.Opcode) { + /* The simple scalar ops. */ case TGSI_OPCODE_EX2: case TGSI_OPCODE_LG2: case TGSI_OPCODE_RCP: @@ -350,6 +381,8 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1); break; + + /* The dot products. */ case TGSI_OPCODE_DPH: /* Set alpha swizzle to one for src0 */ if (!inst->FullSrcRegisters[0].SrcRegister.Extended) { @@ -369,6 +402,18 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); break; + + /* Simple three-source operations. */ + case TGSI_OPCODE_CMP: + /* Swap src0 and src2 */ + inst->FullSrcRegisters[3] = inst->FullSrcRegisters[2]; + inst->FullSrcRegisters[2] = inst->FullSrcRegisters[0]; + inst->FullSrcRegisters[0] = inst->FullSrcRegisters[3]; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); + break; + + /* The MAD variants. */ case TGSI_OPCODE_SUB: /* Just like ADD, but flip the negation on src1 first */ inst->FullSrcRegisters[1].SrcRegister.Negate = @@ -382,36 +427,22 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; - case TGSI_OPCODE_CMP: - /* Swap src0 and src2 */ - inst->FullSrcRegisters[3] = inst->FullSrcRegisters[2]; - inst->FullSrcRegisters[2] = inst->FullSrcRegisters[0]; - inst->FullSrcRegisters[0] = inst->FullSrcRegisters[3]; - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; case TGSI_OPCODE_MUL: /* Force our src2 to zero */ inst->FullSrcRegisters[2] = r500_constant_zero; r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; - case TGSI_OPCODE_ABS: - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - /* Set absolute value modifiers. */ - i = fs->instruction_count - 1; - fs->instructions[i].inst3 |= - R500_ALU_RGB_MOD_A_ABS | - R500_ALU_RGB_MOD_B_ABS; - fs->instructions[i].inst4 |= - R500_ALPHA_MOD_A_ABS | - R500_ALPHA_MOD_B_ABS; - break; case TGSI_OPCODE_MAD: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; + + /* The MOV variants. */ + case TGSI_OPCODE_ABS: + /* Set absolute value modifiers. */ + inst->FullSrcRegisters[0].SrcRegisterExtMod.Absolute = TRUE; + /* Fall through */ case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: /* src0 -> src1 and src2 forced to zero */ @@ -420,10 +451,17 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; + + /* The texture instruction set. */ + case TGSI_OPCODE_KIL: + case TGSI_OPCODE_TEX: + case TGSI_OPCODE_TXB: case TGSI_OPCODE_TXP: - r500_emit_tex(fs, assembler, 0, &inst->FullSrcRegisters[0], - &inst->FullDstRegisters[0]); + r500_emit_tex(fs, assembler, &inst->FullSrcRegisters[0], + &inst->FullDstRegisters[0], inst->Instruction.Opcode); break; + + /* This is the end. My only friend, the end. */ case TGSI_OPCODE_END: break; default: -- cgit v1.2.3 From 175f58baa9a758919163f9ada79306294e4139ce Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 16 Mar 2009 17:00:27 -0700 Subject: r300-gallium: r500-fs: Properly set up TEX/OUT. --- src/gallium/drivers/r300/r300_state_shader.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 7803494130..0b600b9f51 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -350,11 +350,21 @@ static INLINE void r500_emit_tex(struct r500_fragment_shader* fs, if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { fs->instructions[i].inst2 |= - R500_TEX_DST_ADDR(assembler->temp_offset + - assembler->temp_count); - } + R500_TEX_DST_ADDR(assembler->temp_count + + assembler->temp_offset); - fs->instruction_count++; + fs->instruction_count++; + + /* Setup and emit a MOV. */ + src[0].SrcRegister.Index = assembler->temp_count; + src[0].SrcRegister.File = TGSI_FILE_TEMPORARY; + + src[1] = src[0]; + src[2] = r500_constant_zero; + r500_emit_maths(fs, assembler, src, dst, TGSI_OPCODE_MOV, 3); + } else { + fs->instruction_count++; + } } static void r500_fs_instruction(struct r500_fragment_shader* fs, -- cgit v1.2.3 From fbd758c55e6dc443f877bd87d5e6c54c86f61a33 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Mar 2009 11:42:13 -0700 Subject: r300-gallium: More query stuff. Should work, but doesn't. At least it doesn't hardlock. --- src/gallium/drivers/r300/r300_query.c | 49 ++++++++++++++++++++++++++++++----- src/gallium/drivers/r300/r300_query.h | 3 +++ 2 files changed, 46 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_query.c b/src/gallium/drivers/r300/r300_query.c index e09af2cfce..5f5f4c4dbd 100644 --- a/src/gallium/drivers/r300/r300_query.c +++ b/src/gallium/drivers/r300/r300_query.c @@ -30,38 +30,75 @@ static struct pipe_query* r300_create_query(struct pipe_context* pipe, q->type = query_type; assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); + /* XXX this is to force winsys to give us a GTT buffer */ + q->buf = pipe->screen->buffer_create(pipe->screen, 64, + PIPE_BUFFER_USAGE_VERTEX, 64); + return (struct pipe_query*)q; } static void r300_destroy_query(struct pipe_context* pipe, - struct pipe_query* q) + struct pipe_query* query) { - FREE(q); + FREE(query); } static void r300_begin_query(struct pipe_context* pipe, - struct pipe_query* q) + struct pipe_query* query) { struct r300_context* r300 = r300_context(pipe); + struct r300_query* q = (struct r300_query*)query; CS_LOCALS(r300); + uint32_t* map = pipe_buffer_map(pipe->screen, q->buf, + PIPE_BUFFER_USAGE_CPU_WRITE); + *map = ~0; + pipe_buffer_unmap(pipe->screen, q->buf); + BEGIN_CS(2); OUT_CS_REG(R300_ZB_ZPASS_DATA, 0); END_CS; } static void r300_end_query(struct pipe_context* pipe, - struct pipe_query* q) + struct pipe_query* query) { struct r300_context* r300 = r300_context(pipe); + struct r300_query* q = (struct r300_query*)query; + CS_LOCALS(r300); + + BEGIN_CS(4); + OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); + OUT_CS_RELOC(q->buf, 0, 0, RADEON_GEM_DOMAIN_GTT, 0); + END_CS; } static boolean r300_get_query_result(struct pipe_context* pipe, - struct pipe_query* q, + struct pipe_query* query, boolean wait, uint64_t* result) { - *result = 0; + struct r300_query* q = (struct r300_query*)query; + uint32_t temp; + + if (wait) { + /* Well, we're expected to just sit here and spin, so let's go ahead + * and flush so we can be sure that the card's spinning... */ + /* XXX double-check these params */ + pipe->flush(pipe, 0, NULL); + } + + uint32_t* map = pipe_buffer_map(pipe->screen, q->buf, + PIPE_BUFFER_USAGE_CPU_READ); + temp = *map; + pipe_buffer_unmap(pipe->screen, q->buf); + + if (temp < 0) { + /* Our results haven't been written yet... */ + return FALSE; + } + + *result = temp; return TRUE; } diff --git a/src/gallium/drivers/r300/r300_query.h b/src/gallium/drivers/r300/r300_query.h index 0097870287..4f447ea45b 100644 --- a/src/gallium/drivers/r300/r300_query.h +++ b/src/gallium/drivers/r300/r300_query.h @@ -28,7 +28,10 @@ #include "r300_reg.h" struct r300_query { + /* The kind of query. Currently only OQ is supported. */ unsigned type; + /* Buffer object where we want our results to reside. */ + struct pipe_buffer* buf; }; static INLINE struct r300_query* r300_query(struct pipe_query* q) -- cgit v1.2.3 From 0f0d0b62ff3e0f1a8b6c6b6686e760cbc9a31517 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Mar 2009 11:48:55 -0700 Subject: r300-gallium: r500-fs: Fixup immediate->constant counting a bit. --- src/gallium/drivers/r300/r300_state_shader.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 0b600b9f51..20b83bd15b 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -541,10 +541,12 @@ void r500_translate_fragment_shader(struct r300_context* r300, break; case TGSI_TOKEN_TYPE_IMMEDIATE: debug_printf("r300: Emitting immediate to constant buffer, " - "position %d\n", consts->user_count); + "position %d\n", + assembler->imm_offset + assembler->imm_count); /* I am not amused by the length of these. */ for (i = 0; i < 4; i++) { - consts->constants[assembler->imm_offset][i] = + consts->constants[assembler->imm_offset + + assembler->imm_count][i] = parser.FullToken.FullImmediate.u.ImmediateFloat32[i] .Float; } -- cgit v1.2.3 From e87f26a9b6af3d5737325653d3cdb221278f70e2 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Mar 2009 11:49:29 -0700 Subject: r300-gallium: Debugging for the more sensitive card registers. These are nearly always the cause of hardlocks, so let's dump them. --- src/gallium/drivers/r300/r300_emit.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 7b09a41f9c..7bd3420f74 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -244,7 +244,7 @@ void r300_emit_rs_block_state(struct r300_context* r300, } for (i = 0; i < 8; i++) { OUT_CS(rs->ip[i]); - //debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); + debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); } OUT_CS_REG_SEQ(R300_RS_COUNT, 2); @@ -258,11 +258,11 @@ void r300_emit_rs_block_state(struct r300_context* r300, } for (i = 0; i < 8; i++) { OUT_CS(rs->inst[i]); - //debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); + debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); } - /* debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count, - rs->inst_count); */ + debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count, + rs->inst_count); END_CS; } @@ -320,14 +320,22 @@ void r300_emit_vertex_format_state(struct r300_context* r300) OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); OUT_CS(r300->vertex_info.vinfo.hwfmt[2]); OUT_CS(r300->vertex_info.vinfo.hwfmt[3]); + for (i = 0; i < 4; i++) { + debug_printf("hwfmt%d: 0x%08x\n", i, + r300->vertex_info.vinfo.hwfmt[i]); + } OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8); for (i = 0; i < 8; i++) { OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]); + debug_printf("prog_stream_cntl%d: 0x%08x\n", i, + r300->vertex_info.vap_prog_stream_cntl[i]); } OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8); for (i = 0; i < 8; i++) { OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]); + debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i, + r300->vertex_info.vap_prog_stream_cntl_ext[i]); } END_CS; } -- cgit v1.2.3 From 9d5e6f66f004d7eaed905802eb761b2129f909c4 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Mar 2009 13:07:44 -0700 Subject: r300-gallium: Quick little cleanup of surface_fill state. --- src/gallium/drivers/r300/r300_surface.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 744d60364b..db7cc02b18 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -69,7 +69,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(97 + (caps->has_tcl ? 9 : 0)); + BEGIN_CS(99 + (caps->has_tcl ? 28 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -152,20 +152,10 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); OUT_CS_REG(R300_TX_ENABLE, 0x0); - /* XXX viewport setup */ - OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); - OUT_CS_32F(1.0); - OUT_CS_32F((float)x); - OUT_CS_32F(1.0); - OUT_CS_32F((float)y); - OUT_CS_32F(1.0); - OUT_CS_32F(0.0); /* XXX */ OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); - END_CS; - BEGIN_CS(7 + (caps->has_tcl ? 21 : 2)); OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); OUT_CS(R300_US_OUT_FMT_UNUSED); @@ -202,7 +192,16 @@ static void r300_surface_fill(struct pipe_context* pipe, } END_CS; - BEGIN_CS(29); + BEGIN_CS(36); + + /* Viewport setup */ + OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); + OUT_CS_32F(1.0); + OUT_CS_32F((float)x); + OUT_CS_32F(1.0); + OUT_CS_32F((float)y); + OUT_CS_32F(1.0); + OUT_CS_32F(0.0); /* Pixel scissors */ OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); -- cgit v1.2.3 From f822ac0fff2521b5e43c79df2e4802b5688faa3c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Mar 2009 13:10:41 -0700 Subject: r300-gallium: Emit invariant state, no matter what. It's called "invariant" for a reason. :3 --- src/gallium/drivers/r300/r300_context.c | 1 + src/gallium/drivers/r300/r300_flush.c | 1 + src/gallium/drivers/r300/r300_surface.c | 2 -- 3 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index df7f85b937..5797de7dde 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -138,6 +138,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300_init_state_functions(r300); + r300_emit_invariant_state(r300); r300->dirty_state = R300_NEW_KITCHEN_SINK; r300->dirty_hw++; diff --git a/src/gallium/drivers/r300/r300_flush.c b/src/gallium/drivers/r300/r300_flush.c index 3766f0a0a7..20ca6905ad 100644 --- a/src/gallium/drivers/r300/r300_flush.c +++ b/src/gallium/drivers/r300/r300_flush.c @@ -31,6 +31,7 @@ static void r300_flush(struct pipe_context* pipe, if (r300->dirty_hw) { FLUSH_CS; + r300_emit_invariant_state(r300); r300->dirty_state = R300_NEW_KITCHEN_SINK; r300->dirty_hw = 0; } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index db7cc02b18..f825fadfc2 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -53,8 +53,6 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } - r300_emit_invariant_state(r300); - r300_emit_blend_state(r300, &blend_clear_state); r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); -- cgit v1.2.3 From 5deefb7ea5a3c545a6b275d50753d1f232c905d5 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 17 Mar 2009 13:11:55 -0700 Subject: r300-gallium: Move all unsorted state into invariant state. Gotta just slowly whittle this down. --- src/gallium/drivers/r300/r300_state_invariant.c | 124 ++++++++++++++++++++++++ src/gallium/drivers/r300/r300_surface.c | 123 ----------------------- 2 files changed, 124 insertions(+), 123 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 5646d22835..e584bfbfbf 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -76,4 +76,128 @@ void r300_emit_invariant_state(struct r300_context* r300) } END_CS; + + /* XXX unsorted stuff from surface_fill */ + BEGIN_CS(99 + (caps->has_tcl ? 28 : 0)); + /* Flush PVS. */ + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); + + OUT_CS_REG(R300_SE_VTE_CNTL, R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | + R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT); + /* Max and min vertex index clamp. */ + OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF); + OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); + /* XXX endian */ + if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); + OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE | + R300_PS_UCP_MODE_CLIP_AS_TRIFAN); + OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + OUT_CS_32F(1.0); + } else { + OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP | + R300_VAP_TCL_BYPASS); + } + /* XXX magic number not in r300_reg */ + OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); + /* XXX point tex stuffing */ + OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); + OUT_CS_32F(0.0); + OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1); + OUT_CS_32F(1.0); + OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | + (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); + /* XXX this big chunk should be refactored into rs_state */ + OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); + OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); + OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000); + OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000); + OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000); + OUT_CS_REG(R300_GA_ROUND_MODE, 0x00000001); + OUT_CS_REG(R300_GA_OFFSET, 0x00000000); + OUT_CS_REG(R300_GA_FOG_SCALE, 0x3DBF1412); + OUT_CS_REG(R300_GA_FOG_OFFSET, 0x00000000); + OUT_CS_REG(R300_SU_TEX_WRAP, 0x00000000); + OUT_CS_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF); + OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); + OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); + OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); + OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); + OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); + OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); + OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); + OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); + OUT_CS_REG(R300_ZB_FORMAT, 0x00000002); + OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); + OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); + OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000); + OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); + OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); + if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); + } else { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); + } + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, + (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE0_SHIFT) | + (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE1_SHIFT)); + OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); + OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); + OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); + /* Vertex size. */ + OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); + OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); + OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); + OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); + OUT_CS_REG(R300_TX_ENABLE, 0x0); + + /* XXX */ + OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); + + OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); + OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS(R300_US_OUT_FMT_UNUSED); + OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); + /* XXX these magic numbers should be explained when + * this becomes a cached state object */ + if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_CNTL, 0xA | + (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); + OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); + /* XXX translate these back into normal instructions */ + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); + OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 8); + OUT_CS(0x00F00203); + OUT_CS(0x00D10001); + OUT_CS(0x01248001); + OUT_CS(0x00000000); + OUT_CS(0x00F02203); + OUT_CS(0x00D10021); + OUT_CS(0x01248021); + OUT_CS(0x00000000); + } else { + OUT_CS_REG(R300_VAP_CNTL, 0xA | + (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); + } + END_CS; } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index f825fadfc2..2cc0677e52 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -67,129 +67,6 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(99 + (caps->has_tcl ? 28 : 0)); - /* Flush PVS. */ - OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); - - OUT_CS_REG(R300_SE_VTE_CNTL, R300_VPORT_X_SCALE_ENA | - R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | - R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | - R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT); - /* Max and min vertex index clamp. */ - OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF); - OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); - /* XXX endian */ - if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); - OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE | - R300_PS_UCP_MODE_CLIP_AS_TRIFAN); - OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); - OUT_CS_32F(1.0); - OUT_CS_32F(1.0); - OUT_CS_32F(1.0); - OUT_CS_32F(1.0); - } else { - OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP | - R300_VAP_TCL_BYPASS); - } - /* XXX magic number not in r300_reg */ - OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); - /* XXX point tex stuffing */ - OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); - OUT_CS_32F(0.0); - OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1); - OUT_CS_32F(1.0); - OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | - (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); - /* XXX this big chunk should be refactored into rs_state */ - OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); - OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); - OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000); - OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000); - OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000); - OUT_CS_REG(R300_GA_ROUND_MODE, 0x00000001); - OUT_CS_REG(R300_GA_OFFSET, 0x00000000); - OUT_CS_REG(R300_GA_FOG_SCALE, 0x3DBF1412); - OUT_CS_REG(R300_GA_FOG_OFFSET, 0x00000000); - OUT_CS_REG(R300_SU_TEX_WRAP, 0x00000000); - OUT_CS_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF); - OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000); - OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C); - OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); - OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); - OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); - OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); - OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); - OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); - OUT_CS_REG(R300_ZB_FORMAT, 0x00000002); - OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); - OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); - OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000); - OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); - OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); - if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, - (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | - ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) | - R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); - } else { - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, - (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | - ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | - R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); - } - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, - (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE0_SHIFT) | - (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE1_SHIFT)); - OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); - OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); - OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); - /* Vertex size. */ - OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); - OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); - OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); - OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); - OUT_CS_REG(R300_TX_ENABLE, 0x0); - - /* XXX */ - OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); - - OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); - OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); - /* XXX these magic numbers should be explained when - * this becomes a cached state object */ - if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_CNTL, 0xA | - (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | - (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); - OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); - OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); - OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); - /* XXX translate these back into normal instructions */ - OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); - OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); - OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 8); - OUT_CS(0x00F00203); - OUT_CS(0x00D10001); - OUT_CS(0x01248001); - OUT_CS(0x00000000); - OUT_CS(0x00F02203); - OUT_CS(0x00D10021); - OUT_CS(0x01248021); - OUT_CS(0x00000000); - } else { - OUT_CS_REG(R300_VAP_CNTL, 0xA | - (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | - (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); - } - END_CS; - BEGIN_CS(36); /* Viewport setup */ -- cgit v1.2.3 From 5b97ba4eb0b3d5285e93057a7d2b38a3fc6f5056 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 18 Mar 2009 13:37:08 -0700 Subject: r300-gallium: Fixup registers for viewport state. --- src/gallium/drivers/r300/r300_reg.h | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 4d7345a02d..6f3ad970ab 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -139,17 +139,25 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_VAP_OUTPUT_VTX_FMT_1__3_COMPONENTS 3 # define R300_VAP_OUTPUT_VTX_FMT_1__4_COMPONENTS 4 -#define R300_SE_VTE_CNTL 0x20b0 -# define R300_VPORT_X_SCALE_ENA (1 << 0) -# define R300_VPORT_X_OFFSET_ENA (1 << 1) -# define R300_VPORT_Y_SCALE_ENA (1 << 2) -# define R300_VPORT_Y_OFFSET_ENA (1 << 3) -# define R300_VPORT_Z_SCALE_ENA (1 << 4) -# define R300_VPORT_Z_OFFSET_ENA (1 << 5) -# define R300_VTX_XY_FMT (1 << 8) -# define R300_VTX_Z_FMT (1 << 9) -# define R300_VTX_W0_FMT (1 << 10) -# define R300_SERIAL_PROC_ENA (1 << 11) +#define R300_VAP_VPORT_XSCALE 0x2098 +#define R300_VAP_VPORT_XOFFSET 0x209c +#define R300_VAP_VPORT_YSCALE 0x20a0 +#define R300_VAP_VPORT_YOFFSET 0x20a4 +#define R300_VAP_VPORT_ZSCALE 0x20a8 +#define R300_VAP_VPORT_ZOFFSET 0x20ac + +#define R300_VAP_VTE_CNTL 0x20b0 +#define R300_SE_VTE_CNTL R300_VAP_VTE_CNTL +# define R300_VPORT_X_SCALE_ENA (1 << 0) +# define R300_VPORT_X_OFFSET_ENA (1 << 1) +# define R300_VPORT_Y_SCALE_ENA (1 << 2) +# define R300_VPORT_Y_OFFSET_ENA (1 << 3) +# define R300_VPORT_Z_SCALE_ENA (1 << 4) +# define R300_VPORT_Z_OFFSET_ENA (1 << 5) +# define R300_VTX_XY_FMT (1 << 8) +# define R300_VTX_Z_FMT (1 << 9) +# define R300_VTX_W0_FMT (1 << 10) +# define R300_SERIAL_PROC_ENA (1 << 11) #define R300_VAP_VTX_SIZE 0x20b4 -- cgit v1.2.3 From 3a648d0cf23c39a139e4638c2194e4ce97c1d983 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 18 Mar 2009 13:37:59 -0700 Subject: r300-gallium: Viewport state storage. --- src/gallium/drivers/r300/r300_context.c | 2 ++ src/gallium/drivers/r300/r300_context.h | 14 +++++++++++++- 2 files changed, 15 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 5797de7dde..b8584702aa 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -98,6 +98,7 @@ static void r300_destroy_context(struct pipe_context* context) { FREE(r300->blend_color_state); FREE(r300->rs_block); FREE(r300->scissor_state); + FREE(r300->viewport_state); FREE(r300); } @@ -129,6 +130,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); r300->rs_block = CALLOC_STRUCT(r300_rs_block); r300->scissor_state = CALLOC_STRUCT(r300_scissor_state); + r300->viewport_state = CALLOC_STRUCT(r300_viewport_state); r300_init_flush_functions(r300); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 96d923d6f1..5431cf2f72 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -102,6 +102,15 @@ struct r300_texture_state { uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */ }; +struct r300_viewport_state { + float xscale; /* R300_VAP_VPORT_XSCALE: 0x2098 */ + float xoffset; /* R300_VAP_VPORT_XOFFSET: 0x209c */ + float yscale; /* R300_VAP_VPORT_YSCALE: 0x20a0 */ + float yoffset; /* R300_VAP_VPORT_YOFFSET: 0x20a4 */ + float zscale; /* R300_VAP_VPORT_ZSCALE: 0x20a8 */ + float zoffset; /* R300_VAP_VPORT_ZOFFSET: 0x20ac */ +}; + #define R300_NEW_BLEND 0x0000001 #define R300_NEW_BLEND_COLOR 0x0000002 #define R300_NEW_CONSTANTS 0x0000004 @@ -117,7 +126,8 @@ struct r300_texture_state { #define R300_ANY_NEW_TEXTURES 0x1fe0000 #define R300_NEW_VERTEX_FORMAT 0x2000000 #define R300_NEW_VERTEX_SHADER 0x4000000 -#define R300_NEW_KITCHEN_SINK 0x7ffffff +#define R300_NEW_VIEWPORT 0x8000000 +#define R300_NEW_KITCHEN_SINK 0xfffffff /* The next several objects are not pure Radeon state; they inherit from * various Gallium classes. */ @@ -262,6 +272,8 @@ struct r300_context { int vertex_buffer_count; /* Vertex information. */ struct r300_vertex_format vertex_info; + /* Viewport state. */ + struct r300_viewport_state* viewport_state; /* Bitmask of dirty state objects. */ uint32_t dirty_state; /* Flag indicating whether or not the HW is dirty. */ -- cgit v1.2.3 From db83ee16474a7d9b23eacd7933366c5b320255a5 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 18 Mar 2009 15:17:38 -0700 Subject: r300-gallium: Emit viewport state. Note that this will break you, hard, if you're not using RADEON_NO_TCL. I really need to start vertex shaders soon. --- src/gallium/drivers/r300/r300_context.h | 13 +++++++------ src/gallium/drivers/r300/r300_emit.c | 23 +++++++++++++++++++++++ src/gallium/drivers/r300/r300_state.c | 22 ++++++++++++++++++++-- src/gallium/drivers/r300/r300_state_invariant.c | 2 +- 4 files changed, 51 insertions(+), 9 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 5431cf2f72..0e5e471d11 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -103,12 +103,13 @@ struct r300_texture_state { }; struct r300_viewport_state { - float xscale; /* R300_VAP_VPORT_XSCALE: 0x2098 */ - float xoffset; /* R300_VAP_VPORT_XOFFSET: 0x209c */ - float yscale; /* R300_VAP_VPORT_YSCALE: 0x20a0 */ - float yoffset; /* R300_VAP_VPORT_YOFFSET: 0x20a4 */ - float zscale; /* R300_VAP_VPORT_ZSCALE: 0x20a8 */ - float zoffset; /* R300_VAP_VPORT_ZOFFSET: 0x20ac */ + float xscale; /* R300_VAP_VPORT_XSCALE: 0x2098 */ + float xoffset; /* R300_VAP_VPORT_XOFFSET: 0x209c */ + float yscale; /* R300_VAP_VPORT_YSCALE: 0x20a0 */ + float yoffset; /* R300_VAP_VPORT_YOFFSET: 0x20a4 */ + float zscale; /* R300_VAP_VPORT_ZSCALE: 0x20a8 */ + float zoffset; /* R300_VAP_VPORT_ZOFFSET: 0x20ac */ + uint32_t vte_control; /* R300_VAP_VTE_CNTL: 0x20b0 */ }; #define R300_NEW_BLEND 0x0000001 diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 7bd3420f74..a2e771bd1b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -340,6 +340,24 @@ void r300_emit_vertex_format_state(struct r300_context* r300) END_CS; } +void r300_emit_viewport_state(struct r300_context* r300, + struct r300_viewport_state* viewport) +{ + return; + CS_LOCALS(r300); + + BEGIN_CS(7); + OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 7); + OUT_CS_32F(viewport->xscale); + OUT_CS_32F(viewport->xoffset); + OUT_CS_32F(viewport->yscale); + OUT_CS_32F(viewport->yoffset); + OUT_CS_32F(viewport->zscale); + OUT_CS_32F(viewport->zoffset); + OUT_CS(viewport->vte_control); + END_CS; +} + static void r300_flush_textures(struct r300_context* r300) { CS_LOCALS(r300); @@ -431,6 +449,11 @@ void r300_emit_dirty_state(struct r300_context* r300) } } + if (r300->dirty_state & R300_NEW_VIEWPORT) { + r300_emit_viewport_state(r300, r300->viewport_state); + r300->dirty_state &= ~R300_NEW_VIEWPORT; + } + if (dirty_tex) { r300_flush_textures(r300); } diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 04cbf71ce5..58bce22fc8 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -529,8 +529,26 @@ static void r300_set_viewport_state(struct pipe_context* pipe, const struct pipe_viewport_state* state) { struct r300_context* r300 = r300_context(pipe); - /* XXX handing this off to Draw for now */ - draw_set_viewport_state(r300->draw, state); + + r300->viewport_state->xscale = state->scale[0]; + r300->viewport_state->yscale = state->scale[1]; + r300->viewport_state->zscale = state->scale[2]; + + r300->viewport_state->xoffset = state->translate[0]; + r300->viewport_state->yoffset = state->translate[1]; + r300->viewport_state->zoffset = state->translate[2]; + + r300->viewport_state->vte_control = 0; + if (r300_screen(r300->context.screen)->caps->has_tcl) { + /* Do the transform in HW. */ + r300->viewport_state->vte_control |= + R300_VPORT_X_SCALE_ENA | R300_VPORT_X_OFFSET_ENA | + R300_VPORT_Y_SCALE_ENA | R300_VPORT_Y_OFFSET_ENA | + R300_VPORT_Z_SCALE_ENA | R300_VPORT_Z_OFFSET_ENA; + } else { + /* Have Draw do the actual transform. */ + draw_set_viewport_state(r300->draw, state); + } } static void r300_set_vertex_buffers(struct pipe_context* pipe, diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index e584bfbfbf..3d51a8e65d 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -78,7 +78,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(99 + (caps->has_tcl ? 28 : 0)); + BEGIN_CS(99 + (caps->has_tcl ? 26 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); -- cgit v1.2.3 From 8852ac2b354522b194e32f8651e3511e69586bd1 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 19 Mar 2009 12:29:03 -0700 Subject: r300-gallium: A bit more invariant state. --- src/gallium/drivers/r300/r300_reg.h | 17 ++++++++++--- src/gallium/drivers/r300/r300_state_invariant.c | 34 +++++++++++++------------ 2 files changed, 31 insertions(+), 20 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 6f3ad970ab..3fe45e1393 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -293,10 +293,19 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_INPUT_CNTL_TC7 0x00020000 /* GUESS */ /* Programmable Stream Control Signed Normalize Control */ -#define R300_VAP_PSC_SGN_NORM_CNTL 0x21dc -# define SGN_NORM_ZERO 0 -# define SGN_NORM_ZERO_CLAMP_MINUS_ONE 1 -# define SGN_NORM_NO_ZERO 2 +#define R300_VAP_PSC_SGN_NORM_CNTL 0x21dc +# define SGN_NORM_ZERO 0 +# define SGN_NORM_ZERO_CLAMP_MINUS_ONE 1 +# define SGN_NORM_NO_ZERO 2 +# define R300_SGN_NORM_NO_ZERO (SGN_NORM_NO_ZERO | \ + (SGN_NORM_NO_ZERO << 2) | (SGN_NORM_NO_ZERO << 4) | \ + (SGN_NORM_NO_ZERO << 6) | (SGN_NORM_NO_ZERO << 8) | \ + (SGN_NORM_NO_ZERO << 10) | (SGN_NORM_NO_ZERO << 12) | \ + (SGN_NORM_NO_ZERO << 14) | (SGN_NORM_NO_ZERO << 16) | \ + (SGN_NORM_NO_ZERO << 18) | (SGN_NORM_NO_ZERO << 20) | \ + (SGN_NORM_NO_ZERO << 22) | (SGN_NORM_NO_ZERO << 24) | \ + (SGN_NORM_NO_ZERO << 26) | (SGN_NORM_NO_ZERO << 28) | \ + (SGN_NORM_NO_ZERO << 30)) /* gap */ diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 3d51a8e65d..e1837b6380 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -34,11 +34,11 @@ void r300_emit_invariant_state(struct r300_context* r300) struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; CS_LOCALS(r300); - BEGIN_CS(24 + (caps->has_tcl ? 2: 0)); + BEGIN_CS(30 + (caps->has_tcl ? 2: 0)); + /*** Graphics Backend (GB) ***/ /* Various GB enables */ - OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | - R300_GB_LINE_STUFF_ENABLE | R300_GB_TRIANGLE_STUFF_ENABLE); + OUT_CS_REG(R300_GB_ENABLE, 0x0); /* Subpixel multisampling for AA */ OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); OUT_CS_REG(R300_GB_MSPOS1, 0x66666666); @@ -49,6 +49,8 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); /* AA enable */ OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); + + /*** Geometry Assembly (GA) ***/ /* GA errata fixes. */ if (caps->is_r500) { OUT_CS_REG(R300_GA_ENHANCE, @@ -62,13 +64,19 @@ void r300_emit_invariant_state(struct r300_context* r300) R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE); } - /* Fog block. */ - OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000); - OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000); - OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000); - OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x00000000); - OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000); + /*** Fog (FG) ***/ + OUT_CS_REG(R300_FG_FOG_BLEND, 0x0); + OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x0); + OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x0); + OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x0); + OUT_CS_REG(R300_FG_DEPTH_SRC, 0x0); + /*** VAP ***/ + /* Max and min vertex index clamp. */ + OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); + OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xffffff); + /* Sign/normalize control */ + OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, R300_SGN_NORM_NO_ZERO); /* TCL-only stuff */ if (caps->has_tcl) { /* Amount of time to wait for vertex fetches in PVS */ @@ -78,7 +86,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(99 + (caps->has_tcl ? 26 : 0)); + BEGIN_CS(91 + (caps->has_tcl ? 26 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -86,9 +94,6 @@ void r300_emit_invariant_state(struct r300_context* r300) R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT); - /* Max and min vertex index clamp. */ - OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF); - OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0); /* XXX endian */ if (caps->has_tcl) { OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); @@ -103,8 +108,6 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP | R300_VAP_TCL_BYPASS); } - /* XXX magic number not in r300_reg */ - OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); /* XXX point tex stuffing */ OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); OUT_CS_32F(0.0); @@ -157,7 +160,6 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); /* Vertex size. */ OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); - OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); OUT_CS_REG(R300_TX_ENABLE, 0x0); -- cgit v1.2.3 From f3f5e04103d804a23cfbe8bd264c8e0db64bd31f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 19 Mar 2009 20:32:08 -0700 Subject: r300-gallium: Clean up some emit, and some state handlers. --- src/gallium/drivers/r300/r300_emit.c | 17 +---------------- src/gallium/drivers/r300/r300_emit.h | 10 ++++++++++ src/gallium/drivers/r300/r300_state_inlines.h | 25 +++++++++++++++++++++---- 3 files changed, 32 insertions(+), 20 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index a2e771bd1b..9bfb89626c 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -152,21 +152,6 @@ void r500_emit_fragment_shader(struct r300_context* r300, END_CS; } -/* Translate pipe_format into US_OUT_FMT. Note that formats are stored from - * C3 to C0. */ -uint32_t translate_out_fmt(enum pipe_format format) -{ - switch (format) { - case PIPE_FORMAT_A8R8G8B8_UNORM: - return R300_US_OUT_FMT_C4_8 | - R300_C0_SEL_B | R300_C1_SEL_G | - R300_C2_SEL_R | R300_C3_SEL_A; - default: - return R300_US_OUT_FMT_UNUSED; - } - return 0; -} - /* XXX add pitch, stride, clean up */ void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb) @@ -182,7 +167,7 @@ void r300_emit_fb_state(struct r300_context* r300, OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), - translate_out_fmt(fb->cbufs[i]->format)); + r300_translate_out_fmt(fb->cbufs[i]->format)); } if (fb->zsbuf) { diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 4aba1ee08c..0bc1f90e6a 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -28,6 +28,7 @@ #include "r300_context.h" #include "r300_cs.h" #include "r300_screen.h" +#include "r300_state_inlines.h" void r300_emit_blend_state(struct r300_context* r300, struct r300_blend_state* blend); @@ -52,11 +53,20 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs); void r300_emit_rs_block_state(struct r300_context* r300, struct r300_rs_block* rs); +void r300_emit_sampler(struct r300_context* r300, + struct r300_sampler_state* sampler, unsigned offset); + void r300_emit_scissor_state(struct r300_context* r300, struct r300_scissor_state* scissor); +void r300_emit_texture(struct r300_context* r300, + struct r300_texture* tex, unsigned offset); + void r300_emit_vertex_format_state(struct r300_context* r300); +void r300_emit_viewport_state(struct r300_context* r300, + struct r300_viewport_state* viewport); + /* Emit all dirty state. */ void r300_emit_dirty_state(struct r300_context* r300); diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index fd92c71756..b80ff1c1ab 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -297,8 +297,7 @@ static INLINE uint32_t r300_translate_colorformat(enum pipe_format format) case PIPE_FORMAT_A32R32G32B32: return R300_COLOR_FORMAT_ARGB32323232; case PIPE_FORMAT_A16R16G16B16: - return R300_COLOR_FORMAT_ARGB16161616; */ - /* XXX Not in pipe_format + return R300_COLOR_FORMAT_ARGB16161616; case PIPE_FORMAT_A10R10G10B10_UNORM: return R500_COLOR_FORMAT_ARGB10101010; case PIPE_FORMAT_A2R10G10B10_UNORM: @@ -306,7 +305,7 @@ static INLINE uint32_t r300_translate_colorformat(enum pipe_format format) case PIPE_FORMAT_I10_UNORM: return R500_COLOR_FORMAT_I10; */ default: - debug_printf("r300: Implementation error: " \ + debug_printf("r300: Implementation error: " "Got unsupported color format %s in %s\n", pf_name(format), __FUNCTION__); break; @@ -324,7 +323,7 @@ static INLINE uint32_t r300_translate_zsformat(enum pipe_format format) case PIPE_FORMAT_Z24S8_UNORM: return R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL; default: - debug_printf("r300: Implementation error: " \ + debug_printf("r300: Implementation error: " "Got unsupported ZS format %s in %s\n", pf_name(format), __FUNCTION__); break; @@ -332,6 +331,24 @@ static INLINE uint32_t r300_translate_zsformat(enum pipe_format format) return 0; } +/* Translate pipe_format into US_OUT_FMT. + * Note that formats are stored from C3 to C0. */ +static INLINE uint32_t r300_translate_out_fmt(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_A8R8G8B8_UNORM: + return R300_US_OUT_FMT_C4_8 | + R300_C0_SEL_B | R300_C1_SEL_G | + R300_C2_SEL_R | R300_C3_SEL_A; + default: + debug_printf("r300: Implementation error: " + "Got unsupported output format %s in %s\n", + pf_name(format), __FUNCTION__); + return R300_US_OUT_FMT_UNUSED; + } + return 0; +} + /* Non-CSO state. (For now.) */ static INLINE uint32_t r300_translate_gb_pipes(int pipe_count) -- cgit v1.2.3 From adb40a94b0d8a023cfa900017dc17e26179c1cfd Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 19 Mar 2009 20:36:59 -0700 Subject: r300-gallium: Clean up r300_swtcl_emit. Some compile warnings, some statements without effect. --- src/gallium/drivers/r300/r300_swtcl_emit.c | 27 ++++----------------------- 1 file changed, 4 insertions(+), 23 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index 3db09514c6..c82ee9c087 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -66,7 +66,7 @@ r300_swtcl_render_get_vertex_info(struct vbuf_render* render) r300_update_derived_state(r300); - return &r300->vertex_info; + return &r300->vertex_info.vinfo; } static boolean r300_swtcl_render_allocate_vertices(struct vbuf_render* render, @@ -177,7 +177,6 @@ static boolean r300_swtcl_render_set_primitive(struct vbuf_render* render, static void prepare_render(struct r300_swtcl_render* render, unsigned count) { struct r300_context* r300 = render->r300; - int i; CS_LOCALS(r300); @@ -210,7 +209,6 @@ static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, { struct r300_swtcl_render* r300render = r300_swtcl_render(render); struct r300_context* r300 = r300render->r300; - struct pipe_screen* screen = r300->context.screen; CS_LOCALS(r300); @@ -239,24 +237,22 @@ static void r300_swtcl_render_draw(struct vbuf_render* render, CS_LOCALS(r300); - count /= 4; - prepare_render(r300render, count); /* Send our indices into an index buffer. */ index_buffer = pipe_buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, - count * 4); + count); if (!index_buffer) { return; } index_map = pipe_buffer_map(screen, index_buffer, PIPE_BUFFER_USAGE_CPU_WRITE); - memcpy(index_map, indices, count * 4); + memcpy(index_map, indices, count); pipe_buffer_unmap(screen, index_buffer); debug_printf("r300: Doing indexbuf render, count %d\n", count); -#if 0 + BEGIN_CS(5); OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0)); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | @@ -266,7 +262,6 @@ static void r300_swtcl_render_draw(struct vbuf_render* render, OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2)); OUT_CS_RELOC(index_buffer, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); END_CS; -#endif } static void r300_swtcl_render_destroy(struct vbuf_render* render) @@ -277,7 +272,6 @@ static void r300_swtcl_render_destroy(struct vbuf_render* render) static struct vbuf_render* r300_swtcl_render_create(struct r300_context* r300) { struct r300_swtcl_render* r300render = CALLOC_STRUCT(r300_swtcl_render); - struct pipe_screen* screen = r300->context.screen; r300render->r300 = r300; @@ -295,19 +289,6 @@ static struct vbuf_render* r300_swtcl_render_create(struct r300_context* r300) r300render->base.release_vertices = r300_swtcl_render_release_vertices; r300render->base.destroy = r300_swtcl_render_destroy; - /* XXX bonghits ahead - r300render->vbo_alloc_size = 128 * 4096; - r300render->vbo_size = r300render->vbo_alloc_size; - r300render->vbo_offset = 0; - r300render->vbo = pipe_buffer_create(screen, - 64, - PIPE_BUFFER_USAGE_VERTEX, - r300render->vbo_size); - r300render->vbo_map = pipe_buffer_map(screen, - r300render->vbo, - PIPE_BUFFER_USAGE_CPU_WRITE); - pipe_buffer_unmap(screen, r300render->vbo); */ - return &r300render->base; } -- cgit v1.2.3 From 04fe31cd5efc5703b9cd975391a992866432f59d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 20 Mar 2009 00:15:03 -0700 Subject: r300-gallium: Properly offset scissors. As per r300_reg, classic Mesa, and xf86-video-ati. --- src/gallium/drivers/r300/r300_state.c | 22 ++++++++++++++++------ src/gallium/drivers/r300/r300_surface.c | 12 ++++++++++-- 2 files changed, 26 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 58bce22fc8..2a026e7fca 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -515,12 +515,22 @@ static void r300_set_scissor_state(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); draw_flush(r300->draw); - r300->scissor_state->scissor_top_left = - (state->minx << R300_SCISSORS_X_SHIFT) | - (state->miny << R300_SCISSORS_Y_SHIFT); - r300->scissor_state->scissor_bottom_right = - (state->maxx << R300_SCISSORS_X_SHIFT) | - (state->maxy << R300_SCISSORS_Y_SHIFT); + if (r300_screen(r300->context.screen)->caps->is_r500) { + r300->scissor_state->scissor_top_left = + (state->minx << R300_SCISSORS_X_SHIFT) | + (state->miny << R300_SCISSORS_Y_SHIFT); + r300->scissor_state->scissor_bottom_right = + (state->maxx << R300_SCISSORS_X_SHIFT) | + (state->maxy << R300_SCISSORS_Y_SHIFT); + } else { + /* Offset of 1440 in non-R500 chipsets. */ + r300->scissor_state->scissor_top_left = + ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) | + ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT); + r300->scissor_state->scissor_bottom_right = + ((state->maxx + 1440) << R300_SCISSORS_X_SHIFT) | + ((state->maxy + 1440) << R300_SCISSORS_Y_SHIFT); + } r300->dirty_state |= R300_NEW_SCISSOR; } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 2cc0677e52..3672f60b1b 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -80,8 +80,16 @@ static void r300_surface_fill(struct pipe_context* pipe, /* Pixel scissors */ OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); - OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT)); - OUT_CS((w << R300_SCISSORS_X_SHIFT) | (h << R300_SCISSORS_Y_SHIFT)); + if (caps->is_r500) { + OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT)); + OUT_CS((w << R300_SCISSORS_X_SHIFT) | (h << R300_SCISSORS_Y_SHIFT)); + } else { + /* Non-R500 chipsets have an offset of 1440 in their scissors. */ + OUT_CS(((x + 1440) << R300_SCISSORS_X_SHIFT) | + ((y + 1440) << R300_SCISSORS_Y_SHIFT)); + OUT_CS(((w + 1440) << R300_SCISSORS_X_SHIFT) | + ((h + 1440) << R300_SCISSORS_Y_SHIFT)); + } /* The size of the point we're about to draw, in sixths of pixels */ OUT_CS_REG(R300_GA_POINT_SIZE, -- cgit v1.2.3 From f1429580848b471c487e55a9a81b904452f50df5 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 20 Mar 2009 00:35:38 -0700 Subject: r300-gallium: Clean up surface_fill, prep for surface_copy code. --- src/gallium/drivers/r300/r300_surface.c | 121 ++++++++++++++------------------ 1 file changed, 54 insertions(+), 67 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 3672f60b1b..86fe3fc4f9 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -23,6 +23,55 @@ #include "r300_surface.h" +static void r300_surface_setup(struct pipe_context* pipe, + struct pipe_surface* dest, + unsigned x, unsigned y, + unsigned w, unsigned h) +{ + struct r300_context* r300 = r300_context(pipe); + CS_LOCALS(r300); + struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; + struct r300_texture* tex = (struct r300_texture*)dest->texture; + unsigned pixpitch = tex->stride / tex->tex.block.size; + + r300_emit_blend_state(r300, &blend_clear_state); + r300_emit_blend_color_state(r300, &blend_color_clear_state); + r300_emit_dsa_state(r300, &dsa_clear_state); + r300_emit_rs_state(r300, &rs_clear_state); + + BEGIN_CS(15); + + /* Pixel scissors. */ + OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); + if (caps->is_r500) { + OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT)); + OUT_CS((w << R300_SCISSORS_X_SHIFT) | (h << R300_SCISSORS_Y_SHIFT)); + } else { + /* Non-R500 chipsets have an offset of 1440 in their scissors. */ + OUT_CS(((x + 1440) << R300_SCISSORS_X_SHIFT) | + ((y + 1440) << R300_SCISSORS_Y_SHIFT)); + OUT_CS(((w + 1440) << R300_SCISSORS_X_SHIFT) | + ((h + 1440) << R300_SCISSORS_Y_SHIFT)); + } + + /* Flush colorbuffer and blend caches. */ + OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, + R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D | + R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_SIGNAL); + OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, + R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | + R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); + + /* Setup colorbuffer. */ + OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); + OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_REG(R300_RB3D_COLORPITCH0, pixpitch | + r300_translate_colorformat(tex->tex.format)); + OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0xf); + + END_CS; +} + /* Provides pipe_context's "surface_fill". Commonly used for clearing * buffers. */ static void r300_surface_fill(struct pipe_context* pipe, @@ -53,10 +102,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } - r300_emit_blend_state(r300, &blend_clear_state); - r300_emit_blend_color_state(r300, &blend_color_clear_state); - r300_emit_dsa_state(r300, &dsa_clear_state); - r300_emit_rs_state(r300, &rs_clear_state); + r300_surface_setup(r300, dest, x, y, w, h); /* Fragment shader setup */ if (caps->is_r500) { @@ -67,7 +113,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(36); + BEGIN_CS(21); /* Viewport setup */ OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); @@ -78,37 +124,11 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(1.0); OUT_CS_32F(0.0); - /* Pixel scissors */ - OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); - if (caps->is_r500) { - OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT)); - OUT_CS((w << R300_SCISSORS_X_SHIFT) | (h << R300_SCISSORS_Y_SHIFT)); - } else { - /* Non-R500 chipsets have an offset of 1440 in their scissors. */ - OUT_CS(((x + 1440) << R300_SCISSORS_X_SHIFT) | - ((y + 1440) << R300_SCISSORS_Y_SHIFT)); - OUT_CS(((w + 1440) << R300_SCISSORS_X_SHIFT) | - ((h + 1440) << R300_SCISSORS_Y_SHIFT)); - } - /* The size of the point we're about to draw, in sixths of pixels */ OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); - /* Flush colorbuffer and blend caches. */ - OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, - R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D | - R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_SIGNAL); - OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, - R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | - R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); - - OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_CS_REG(R300_RB3D_COLORPITCH0, pixpitch | - r300_translate_colorformat(tex->tex.format)); - OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); /* XXX Packet3 */ OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | @@ -151,47 +171,14 @@ static void r300_surface_copy(struct pipe_context* pipe, " dimensions %dx%d (pixel pitch %d)\n", src, srcx, srcy, dest, destx, desty, w, h, pixpitch); + /* if ((srctex == desttex) && + ((destx < srcx + w) || (srcx < destx + w)) && + ((desty < srcy + h) || (srcy < destx + h))) { */ if (TRUE) { debug_printf("r300: Falling back on surface_copy\n"); return util_surface_copy(pipe, FALSE, dest, destx, desty, src, srcx, srcy, w, h); } -#if 0 - BEGIN_CS(); - OUT_CS_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT,(RADEON_DEFAULT_SC_RIGHT_MAX | - RADEON_DEFAULT_SC_BOTTOM_MAX)); - OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, (RADEON_GMC_DST_PITCH_OFFSET_CNTL | - RADEON_GMC_SRC_PITCH_OFFSET_CNTL | - RADEON_GMC_BRUSH_NONE | - (datatype << 8) | - RADEON_GMC_SRC_DATATYPE_COLOR | - RADEON_ROP[rop].rop | - RADEON_DP_SRC_SOURCE_MEMORY | - RADEON_GMC_CLR_CMP_CNTL_DIS)); - OUT_CS_REG(RADEON_DP_BRUSH_FRGD_CLR, 0xffffffff); - OUT_CS_REG(RADEON_DP_BRUSH_BKGD_CLR, 0x0); - OUT_CS_REG(RADEON_DP_SRC_FRGD_CLR, 0xffffffff); - OUT_CS_REG(RADEON_DP_SRC_BKGD_CLR, 0x0); - OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, planemask); - OUT_ACCEL_REG(RADEON_DP_CNTL, ((info->accel_state->xdir >= 0 ? RADEON_DST_X_LEFT_TO_RIGHT : 0) | - (info->accel_state->ydir >= 0 ? RADEON_DST_Y_TOP_TO_BOTTOM : 0)); -); - - OUT_CS_REG_SEQ(RADEON_DST_PITCH_OFFSET, 1); - OUT_CS_RELOC(desttex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - - OUT_CS_REG_SEQ(RADEON_SRC_PITCH_OFFSET, 1); - OUT_CS_RELOC(srctex->buffer, 0, - RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0); - - OUT_CS_REG(RADEON_SRC_Y_X, (srcy << 16) | srcx); - OUT_CS_REG(RADEON_DST_Y_X, (desty << 16) | destx); - OUT_CS_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); - OUT_CS_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); - OUT_CS_REG(RADEON_WAIT_UNTIL, - RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE); - END_CS; -#endif } void r300_init_surface_functions(struct r300_context* r300) -- cgit v1.2.3 From 8066edb2a254d15ed92c2d350a7799adf3cca0d7 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 20 Mar 2009 00:43:29 -0700 Subject: r300-gallium: Simplify/neaten up packet3. Deck chairs on the Hindenburg. :3 --- src/gallium/drivers/r300/r300_cs.h | 3 --- src/gallium/drivers/r300/r300_cs_inlines.h | 9 +++++++++ src/gallium/drivers/r300/r300_surface.c | 4 ++-- src/gallium/drivers/r300/r300_swtcl_emit.c | 8 ++++---- 4 files changed, 15 insertions(+), 9 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index d8038ff1e1..443dfc0233 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -47,9 +47,6 @@ #define CP_PACKET0(register, count) \ (RADEON_CP_PACKET0 | ((count) << 16) | ((register) >> 2)) -#define CP_PACKET3(op, count) \ - (RADEON_CP_PACKET3 | (op) | ((count) << 16)) - #define CS_LOCALS(context) \ struct r300_winsys* cs_winsys = context->winsys; \ struct radeon_cs* cs = cs_winsys->cs; \ diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h index 03bb608eb9..64bd58193a 100644 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ b/src/gallium/drivers/r300/r300_cs_inlines.h @@ -36,15 +36,24 @@ OUT_CS(CP_PACKET0(register, ((count) - 1)) | RADEON_ONE_REG_WR); \ } while (0) +/* XXX might no longer be needed */ #define R300_PACIFY do { \ OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 14) | (1 << 15) | (1 << 16) | (1 << 17) | \ (1 << 18)); \ } while (0) +/* XXX do we still use this? */ #define R300_SCREENDOOR do { \ OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); \ R300_PACIFY; \ OUT_CS_REG(R300_SC_SCREENDOOR, 0xffffff); \ } while (0) +#define CP_PACKET3(op, count) \ + (RADEON_CP_PACKET3 | (op) | ((count) << 16)) + +#define R300_CS_PKT3(op, count) do { \ + OUT_CS(CP_PACKET3(op, count)); \ +} while (0) + #endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 86fe3fc4f9..db18975a10 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -129,8 +129,8 @@ static void r300_surface_fill(struct pipe_context* pipe, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); - /* XXX Packet3 */ - OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8)); + /* Packet3 with our point vertex */ + OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 8); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | (1 << R300_PRIM_NUM_VERTICES_SHIFT)); OUT_CS_32F(w / 2.0); diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c index c82ee9c087..83c25f496b 100644 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ b/src/gallium/drivers/r300/r300_swtcl_emit.c @@ -194,7 +194,7 @@ static void prepare_render(struct r300_swtcl_render* render, unsigned count) * VBPNTR [relocated BO] */ BEGIN_CS(7); - OUT_CS(CP_PACKET3(R300_PACKET3_3D_LOAD_VBPNTR, 3)); + OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3); OUT_CS(1); OUT_CS(r300->vertex_info.vinfo.size | (r300->vertex_info.vinfo.size << 8)); @@ -219,7 +219,7 @@ static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, debug_printf("r300: Doing vbuf render, count %d\n", count); BEGIN_CS(2); - OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_VBUF_2, 0)); + OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | r300render->hwprim); END_CS; @@ -254,11 +254,11 @@ static void r300_swtcl_render_draw(struct vbuf_render* render, debug_printf("r300: Doing indexbuf render, count %d\n", count); BEGIN_CS(5); - OUT_CS(CP_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0)); + OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); - OUT_CS(CP_PACKET3(R300_PACKET3_INDX_BUFFER, 2)); + OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2)); OUT_CS_RELOC(index_buffer, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); END_CS; -- cgit v1.2.3 From edfaa686091a4f6238b8f315a475d90ff2c2f5f5 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 20 Mar 2009 00:48:53 -0700 Subject: r300-gallium: Put r300_cs_inlines to bed. Guess it was a mistake in the first place. Oops. --- src/gallium/drivers/r300/r300_cs.h | 17 ++++++++- src/gallium/drivers/r300/r300_cs_inlines.h | 59 ------------------------------ 2 files changed, 16 insertions(+), 60 deletions(-) delete mode 100644 src/gallium/drivers/r300/r300_cs_inlines.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 443dfc0233..2b9a441147 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -115,6 +115,21 @@ cs_winsys->flush_cs(cs); \ } while (0) -#include "r300_cs_inlines.h" +#define RADEON_ONE_REG_WR (1 << 15) + +#define OUT_CS_ONE_REG(register, count) do { \ + if (VERY_VERBOSE_REGISTERS) \ + debug_printf("r300: writing data sequence of %d to 0x%04X\n", \ + count, register); \ + assert(register); \ + OUT_CS(CP_PACKET0(register, ((count) - 1)) | RADEON_ONE_REG_WR); \ +} while (0) + +#define CP_PACKET3(op, count) \ + (RADEON_CP_PACKET3 | (op) | ((count) << 16)) + +#define R300_CS_PKT3(op, count) do { \ + OUT_CS(CP_PACKET3(op, count)); \ +} while (0) #endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h deleted file mode 100644 index 64bd58193a..0000000000 --- a/src/gallium/drivers/r300/r300_cs_inlines.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright 2008 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -/* r300_cs_inlines: This is just a handful of useful inlines for sending - * (very) common instructions to the CS buffer. Should only be included from - * r300_cs.h, probably. */ - -#ifdef R300_CS_H - -#define RADEON_ONE_REG_WR (1 << 15) - -#define OUT_CS_ONE_REG(register, count) do { \ - if (VERY_VERBOSE_REGISTERS) \ - debug_printf("r300: writing data sequence of %d to 0x%04X\n", \ - count, register); \ - assert(register); \ - OUT_CS(CP_PACKET0(register, ((count) - 1)) | RADEON_ONE_REG_WR); \ -} while (0) - -/* XXX might no longer be needed */ -#define R300_PACIFY do { \ - OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 14) | (1 << 15) | (1 << 16) | (1 << 17) | \ - (1 << 18)); \ -} while (0) - -/* XXX do we still use this? */ -#define R300_SCREENDOOR do { \ - OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); \ - R300_PACIFY; \ - OUT_CS_REG(R300_SC_SCREENDOOR, 0xffffff); \ -} while (0) - -#define CP_PACKET3(op, count) \ - (RADEON_CP_PACKET3 | (op) | ((count) << 16)) - -#define R300_CS_PKT3(op, count) do { \ - OUT_CS(CP_PACKET3(op, count)); \ -} while (0) - -#endif /* R300_CS_H */ -- cgit v1.2.3 From f411a66c0679c1aa7a9ee3d1eb633a8cbf3ef5f2 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 20 Mar 2009 14:47:49 -0700 Subject: r300-gallium: Misspelled macro name. *pulls paper bag down over head* --- src/gallium/drivers/r300/r300_cs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 2b9a441147..9913678d27 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -128,7 +128,7 @@ #define CP_PACKET3(op, count) \ (RADEON_CP_PACKET3 | (op) | ((count) << 16)) -#define R300_CS_PKT3(op, count) do { \ +#define OUT_CS_PKT3(op, count) do { \ OUT_CS(CP_PACKET3(op, count)); \ } while (0) -- cgit v1.2.3 From e36f01a7a195a747c7d40bc0bab0bfbd00f0a5a7 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 25 Mar 2009 05:48:07 -0700 Subject: r300-gallium: r500-fs: Remove unused variable. --- src/gallium/drivers/r300/r300_state_shader.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 20b83bd15b..b5dc1a61b0 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -371,7 +371,6 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, struct tgsi_full_instruction* inst) { - int i; /* Switch between opcodes. When possible, prefer using the official * AMD/ATI names for opcodes, please, as it facilitates using the * documentation. */ -- cgit v1.2.3 From 1db736f74a911f74228d6843f4d981eeafb8669d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 25 Mar 2009 06:24:39 -0700 Subject: r300-gallium: Unify shader interfaces, enable r300 shader, start unbreaking. progs/trivial/clear no longer is horrifically wrong, just kind of wrong. --- src/gallium/drivers/r300/r300_emit.c | 2 +- src/gallium/drivers/r300/r300_state.c | 6 +- src/gallium/drivers/r300/r300_state_shader.c | 102 +++++++++++++++++++++------ src/gallium/drivers/r300/r300_state_shader.h | 5 +- 4 files changed, 84 insertions(+), 31 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 9bfb89626c..bf190a7dcd 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -87,7 +87,7 @@ void r300_emit_fragment_shader(struct r300_context* r300, BEGIN_CS(22); - OUT_CS_REG(R300_US_CONFIG, MAX2(fs->indirections - 1, 0)); + OUT_CS_REG(R300_US_CONFIG, fs->indirections); OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size); /* XXX figure out exactly how big the sizes are on this reg */ OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 2a026e7fca..8c38f7c706 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -293,11 +293,7 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) r300->fs = NULL; return; } else if (!fs->translated) { - if (r300_screen(r300->context.screen)->caps->is_r500) { - r500_translate_fragment_shader(r300, (struct r500_fragment_shader*)fs); - } else { - r300_translate_fragment_shader(r300, (struct r300_fragment_shader*)fs); - } + r300_translate_fragment_shader(r300, fs); } fs->translated = TRUE; diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index b5dc1a61b0..7d81cb87a2 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -171,6 +171,26 @@ static INLINE uint32_t r500_alpha_swiz(struct tgsi_full_src_register* reg) (reg->SrcRegisterExtMod.Absolute ? (1 << 10) : 0); } +static INLINE uint32_t r300_rgb_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_MOV: + return R300_ALU_OUTC_CMP; + default: + return 0; + } +} + +static INLINE uint32_t r300_alpha_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_MOV: + return R300_ALU_OUTA_CMP; + default: + return 0; + } +} + static INLINE uint32_t r500_rgba_op(unsigned op) { switch (op) { @@ -249,6 +269,33 @@ static INLINE uint32_t r500_tex_op(unsigned op) } } +static INLINE void r300_emit_maths(struct r300_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst, + unsigned op, + unsigned count) +{ + int i = fs->alu_instruction_count; + + fs->instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZB(R300_ALU_ARGC_ONE) | + R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | + R300_ALU_OUTC_MAD; + fs->instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | + R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ; + fs->instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZB(R300_ALU_ARGA_ONE) | + R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | + R300_ALU_OUTA_MAD; + fs->instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | + R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT; + + fs->alu_instruction_count++; + fs->indirections = 0; + fs->shader.stack_size = 2; +} + /* Setup an ALU operation. */ static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, @@ -367,6 +414,27 @@ static INLINE void r500_emit_tex(struct r500_fragment_shader* fs, } } +static void r300_fs_instruction(struct r300_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_instruction* inst) +{ + switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_MOV: + /* src0 -> src1 and src2 forced to zero */ + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; + inst->FullSrcRegisters[2] = r500_constant_zero; + r300_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); + break; + case TGSI_OPCODE_END: + break; + default: + debug_printf("r300: fs: Bad opcode %d\n", + inst->Instruction.Opcode); + break; + } +} + static void r500_fs_instruction(struct r500_fragment_shader* fs, struct r300_fs_asm* assembler, struct tgsi_full_instruction* inst) @@ -497,24 +565,11 @@ static void r500_fs_finalize(struct r500_fragment_shader* fs, } void r300_translate_fragment_shader(struct r300_context* r300, - struct r300_fragment_shader* fs) -{ - struct tgsi_parse_context parser; - - tgsi_parse_init(&parser, fs->shader.state.tokens); - - while (!tgsi_parse_end_of_tokens(&parser)) { - tgsi_parse_token(&parser); - } - - r300_copy_passthrough_shader(fs); -} - -void r500_translate_fragment_shader(struct r300_context* r300, - struct r500_fragment_shader* fs) + struct r3xx_fragment_shader* fs) { struct tgsi_parse_context parser; int i; + boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500; struct r300_constant_buffer* consts = &r300->shader_constants[PIPE_SHADER_FRAGMENT]; @@ -525,7 +580,7 @@ void r500_translate_fragment_shader(struct r300_context* r300, /* Setup starting offset for immediates. */ assembler->imm_offset = consts->user_count; - tgsi_parse_init(&parser, fs->shader.state.tokens); + tgsi_parse_init(&parser, fs->state.tokens); while (!tgsi_parse_end_of_tokens(&parser)) { tgsi_parse_token(&parser); @@ -552,8 +607,13 @@ void r500_translate_fragment_shader(struct r300_context* r300, assembler->imm_count++; break; case TGSI_TOKEN_TYPE_INSTRUCTION: - r500_fs_instruction(fs, assembler, - &parser.FullToken.FullInstruction); + if (is_r500) { + r500_fs_instruction((struct r500_fragment_shader*)fs, + assembler, &parser.FullToken.FullInstruction); + } else { + r300_fs_instruction((struct r300_fragment_shader*)fs, + assembler, &parser.FullToken.FullInstruction); + } break; } @@ -567,10 +627,10 @@ void r500_translate_fragment_shader(struct r300_context* r300, debug_printf("r300: %d total constants, " "%d from user and %d from immediates\n", consts->count, consts->user_count, assembler->imm_count); - r500_fs_finalize(fs, assembler); + //r500_fs_finalize(fs, assembler); - tgsi_dump(fs->shader.state.tokens); - r500_fs_dump(fs); + tgsi_dump(fs->state.tokens); + //r500_fs_dump(fs); tgsi_parse_free(&parser); FREE(assembler); diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 06c0bb7378..fdba207e18 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -102,10 +102,7 @@ struct r300_fs_asm { }; void r300_translate_fragment_shader(struct r300_context* r300, - struct r300_fragment_shader* fs); - -void r500_translate_fragment_shader(struct r300_context* r300, - struct r500_fragment_shader* fs); + struct r3xx_fragment_shader* fs); static const struct r300_fragment_shader r300_passthrough_fragment_shader = { /* XXX This is the emission code. TODO: decode -- cgit v1.2.3 From def5660c9eed84f92838f9f7679deef94ab27c58 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 25 Mar 2009 07:15:07 -0700 Subject: r300-gallium: r300-fs: Moar. --- src/gallium/drivers/r300/r300_context.h | 5 +--- src/gallium/drivers/r300/r300_debug.c | 8 +++++++ src/gallium/drivers/r300/r300_emit.c | 4 ++-- src/gallium/drivers/r300/r300_state_shader.c | 36 +++++++++++++++++----------- src/gallium/drivers/r300/r300_state_shader.h | 4 ++-- 5 files changed, 35 insertions(+), 22 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 0e5e471d11..ed6480bea7 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -169,10 +169,7 @@ struct r300_fragment_shader { int indirections; /* Indirection node offsets */ - int offset0; - int offset1; - int offset2; - int offset3; + int alu_offset[4]; /* Machine instructions */ struct { diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index f657588c72..8d44756c33 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -22,6 +22,14 @@ #include "r300_debug.h" +static void r300_dump_fs(struct r300_fragment_shader* fs) +{ + int i; + + for (i = 0; i < fs->alu_instruction_count; i++) { + } +} + static char* r500_fs_swiz[] = { " R", " G", diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index bf190a7dcd..16455e48ce 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -90,12 +90,12 @@ void r300_emit_fragment_shader(struct r300_context* r300, OUT_CS_REG(R300_US_CONFIG, fs->indirections); OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size); /* XXX figure out exactly how big the sizes are on this reg */ - OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); + OUT_CS_REG(R300_US_CODE_OFFSET, 0x40); /* XXX figure these ones out a bit better kthnx */ OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_3, R300_RGBA_OUT); + OUT_CS_REG(R300_US_CODE_ADDR_3, 0x40 | R300_RGBA_OUT); for (i = 0; i < fs->alu_instruction_count; i++) { OUT_CS_REG(R300_US_ALU_RGB_INST_0 + (4 * i), diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 7d81cb87a2..ed9d26f0b9 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -278,22 +278,20 @@ static INLINE void r300_emit_maths(struct r300_fragment_shader* fs, { int i = fs->alu_instruction_count; - fs->instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZB(R300_ALU_ARGC_ONE) | + fs->instructions[i].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | - R300_ALU_OUTC_MAD; - fs->instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | + r300_rgb_op(op); + fs->instructions[i].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ; - fs->instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZB(R300_ALU_ARGA_ONE) | + fs->instructions[i].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | - R300_ALU_OUTA_MAD; - fs->instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | + r300_alpha_op(op); + fs->instructions[i].alu_alpha_addr = R300_ALPHA_ADDR0(0) | R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT; fs->alu_instruction_count++; - fs->indirections = 0; - fs->shader.stack_size = 2; } /* Setup an ALU operation. */ @@ -554,11 +552,15 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, } } -static void r500_fs_finalize(struct r500_fragment_shader* fs, +static void r300_fs_finalize(struct r3xx_fragment_shader* fs, struct r300_fs_asm* assembler) { - fs->shader.stack_size = assembler->temp_count + assembler->temp_offset; + fs->stack_size = assembler->temp_count + assembler->temp_offset; +} +static void r500_fs_finalize(struct r500_fragment_shader* fs, + struct r300_fs_asm* assembler) +{ /* XXX should this just go with OPCODE_END? */ fs->instructions[fs->instruction_count - 1].inst0 |= R500_INST_LAST; @@ -627,10 +629,16 @@ void r300_translate_fragment_shader(struct r300_context* r300, debug_printf("r300: %d total constants, " "%d from user and %d from immediates\n", consts->count, consts->user_count, assembler->imm_count); - //r500_fs_finalize(fs, assembler); + r300_fs_finalize(fs, assembler); + if (is_r500) { + r500_fs_finalize((struct r500_fragment_shader*)fs, assembler); + } tgsi_dump(fs->state.tokens); - //r500_fs_dump(fs); + /* XXX finish r300 dumper too */ + if (is_r500) { + r500_fs_dump((struct r500_fragment_shader*)fs); + } tgsi_parse_free(&parser); FREE(assembler); diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index fdba207e18..e83d007ba2 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -115,8 +115,8 @@ static const struct r300_fragment_shader r300_passthrough_fragment_shader = { */ .alu_instruction_count = 1, .tex_instruction_count = 0, - .indirections = 1, - .shader.stack_size = 2, + .indirections = 0, + .shader.stack_size = 1, .instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | R300_RGB_SWIZB(R300_ALU_ARGC_ONE) | -- cgit v1.2.3 From d332f8b4efae39f09454593374ff939a08af7619 Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Thu, 26 Mar 2009 10:53:47 +0100 Subject: gallium: Remove some little-used fields from struct pipe_surface. --- src/gallium/drivers/cell/ppu/cell_clear.c | 13 ------------- src/gallium/drivers/i915simple/i915_clear.c | 1 - src/gallium/drivers/i915simple/i915_texture.c | 9 --------- src/gallium/drivers/i965simple/brw_tex_layout.c | 1 - src/gallium/drivers/nv04/nv04_miptree.c | 1 - src/gallium/drivers/nv10/nv10_miptree.c | 1 - src/gallium/drivers/nv20/nv20_clear.c | 1 - src/gallium/drivers/nv20/nv20_miptree.c | 1 - src/gallium/drivers/nv30/nv30_clear.c | 1 - src/gallium/drivers/nv30/nv30_miptree.c | 1 - src/gallium/drivers/nv30/nv30_state_emit.c | 8 -------- src/gallium/drivers/nv40/nv40_clear.c | 1 - src/gallium/drivers/nv40/nv40_miptree.c | 1 - src/gallium/drivers/nv40/nv40_state_emit.c | 8 -------- src/gallium/drivers/nv50/nv50_clear.c | 2 -- src/gallium/drivers/nv50/nv50_miptree.c | 1 - src/gallium/drivers/nv50/nv50_state_validate.c | 7 ------- src/gallium/drivers/r300/r300_clear.c | 3 +-- src/gallium/drivers/r300/r300_texture.c | 1 - src/gallium/drivers/softpipe/sp_clear.c | 2 -- src/gallium/drivers/softpipe/sp_setup.c | 10 ---------- src/gallium/drivers/trace/tr_state.c | 2 -- src/gallium/include/pipe/p_defines.h | 8 -------- src/gallium/include/pipe/p_state.h | 2 -- src/gallium/state_trackers/egl/egl_surface.c | 2 -- src/mesa/state_tracker/st_cb_clear.c | 17 ---------------- src/mesa/state_tracker/st_framebuffer.c | 26 ------------------------- src/mesa/state_tracker/st_public.h | 1 - 28 files changed, 1 insertion(+), 131 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/cell/ppu/cell_clear.c b/src/gallium/drivers/cell/ppu/cell_clear.c index edc06747ac..34be5f3dc7 100644 --- a/src/gallium/drivers/cell/ppu/cell_clear.c +++ b/src/gallium/drivers/cell/ppu/cell_clear.c @@ -101,17 +101,4 @@ cell_clear_surface(struct pipe_context *pipe, struct pipe_surface *ps, clr->surface = surfIndex; clr->value = clearValue; } - - /* Technically, the surface's contents are now known and cleared, - * so we could set the status to PIPE_SURFACE_STATUS_CLEAR. But - * it turns out it's quite painful to recognize when any particular - * surface goes from PIPE_SURFACE_STATUS_CLEAR to - * PIPE_SURFACE_STATUS_DEFINED (i.e. with known contents), because - * the drawing commands could be operating on numerous draw buffers, - * which we'd have to iterate through to set all their stati... - * For now, we cheat a bit and set the surface's status to DEFINED - * right here. Later we should revisit this and set the status to - * CLEAR here, and find a better place to set the status to DEFINED. - */ - ps->status = PIPE_SURFACE_STATUS_DEFINED; } diff --git a/src/gallium/drivers/i915simple/i915_clear.c b/src/gallium/drivers/i915simple/i915_clear.c index 8a2d3ca43f..cde69daacc 100644 --- a/src/gallium/drivers/i915simple/i915_clear.c +++ b/src/gallium/drivers/i915simple/i915_clear.c @@ -44,5 +44,4 @@ i915_clear(struct pipe_context *pipe, struct pipe_surface *ps, unsigned clearValue) { pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, clearValue); - ps->status = PIPE_SURFACE_STATUS_DEFINED; } diff --git a/src/gallium/drivers/i915simple/i915_texture.c b/src/gallium/drivers/i915simple/i915_texture.c index 39aca9f817..ca8e87af8d 100644 --- a/src/gallium/drivers/i915simple/i915_texture.c +++ b/src/gallium/drivers/i915simple/i915_texture.c @@ -677,7 +677,6 @@ i915_get_tex_surface(struct pipe_screen *screen, ps->height = pt->height[level]; ps->offset = offset; ps->usage = flags; - ps->status = PIPE_SURFACE_STATUS_DEFINED; } return ps; } @@ -725,14 +724,6 @@ i915_init_texture_functions(struct i915_context *i915) static void i915_tex_surface_destroy(struct pipe_surface *surf) { - /* This really should not be possible, but it's actually - * happening quite a bit... Will fix. - */ - if (surf->status == PIPE_SURFACE_STATUS_CLEAR) { - debug_printf("XXX destroying a surface with pending clears...\n"); - assert(0); - } - pipe_texture_reference(&surf->texture, NULL); FREE(surf); } diff --git a/src/gallium/drivers/i965simple/brw_tex_layout.c b/src/gallium/drivers/i965simple/brw_tex_layout.c index c921c0d38b..f44bd17451 100644 --- a/src/gallium/drivers/i965simple/brw_tex_layout.c +++ b/src/gallium/drivers/i965simple/brw_tex_layout.c @@ -363,7 +363,6 @@ brw_get_tex_surface_screen(struct pipe_screen *screen, ps->nblocksy = pt->nblocksy[level]; ps->stride = tex->stride; ps->offset = offset; - ps->status = PIPE_SURFACE_STATUS_DEFINED; } return ps; } diff --git a/src/gallium/drivers/nv04/nv04_miptree.c b/src/gallium/drivers/nv04/nv04_miptree.c index 85dc017fbc..4da833c25e 100644 --- a/src/gallium/drivers/nv04/nv04_miptree.c +++ b/src/gallium/drivers/nv04/nv04_miptree.c @@ -122,7 +122,6 @@ nv04_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ns->base.width = pt->width[level]; ns->base.height = pt->height[level]; ns->base.usage = flags; - ns->base.status = PIPE_SURFACE_STATUS_DEFINED; pipe_reference_init(&ns->base.reference, 1); ns->base.face = face; ns->base.level = level; diff --git a/src/gallium/drivers/nv10/nv10_miptree.c b/src/gallium/drivers/nv10/nv10_miptree.c index bb3a1c0f19..34e3c2ebd7 100644 --- a/src/gallium/drivers/nv10/nv10_miptree.c +++ b/src/gallium/drivers/nv10/nv10_miptree.c @@ -136,7 +136,6 @@ nv10_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt, ns->base.width = pt->width[level]; ns->base.height = pt->height[level]; ns->base.usage = flags; - ns->base.status = PIPE_SURFACE_STATUS_DEFINED; pipe_reference_init(&ns->base.reference, 1); ns->base.face = face; ns->base.level = level; diff --git a/src/gallium/drivers/nv20/nv20_clear.c b/src/gallium/drivers/nv20/nv20_clear.c index 29f4afd87c..81b6f3e78a 100644 --- a/src/gallium/drivers/nv20/nv20_clear.c +++ b/src/gallium/drivers/nv20/nv20_clear.c @@ -9,5 +9,4 @@ nv20_clear(struct pipe_context *pipe, struct pipe_surface *ps, unsigned clearValue) { pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, clearValue); - ps->status = PIPE_SURFACE_STATUS_CLEAR; } diff --git a/src/gallium/drivers/nv20/nv20_miptree.c b/src/gallium/drivers/nv20/nv20_miptree.c index b2f29aff8d..185fbf53e0 100644 --- a/src/gallium/drivers/nv20/nv20_miptree.c +++ b/src/gallium/drivers/nv20/nv20_miptree.c @@ -170,7 +170,6 @@ nv20_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt, ns->base.width = pt->width[level]; ns->base.height = pt->height[level]; ns->base.usage = flags; - ns->base.status = PIPE_SURFACE_STATUS_DEFINED; pipe_reference_init(&ns->base.reference, 1); ns->base.face = face; ns->base.level = level; diff --git a/src/gallium/drivers/nv30/nv30_clear.c b/src/gallium/drivers/nv30/nv30_clear.c index 8c3ca204d5..71f413588e 100644 --- a/src/gallium/drivers/nv30/nv30_clear.c +++ b/src/gallium/drivers/nv30/nv30_clear.c @@ -9,5 +9,4 @@ nv30_clear(struct pipe_context *pipe, struct pipe_surface *ps, unsigned clearValue) { pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, clearValue); - ps->status = PIPE_SURFACE_STATUS_CLEAR; } diff --git a/src/gallium/drivers/nv30/nv30_miptree.c b/src/gallium/drivers/nv30/nv30_miptree.c index d6dc621c9e..7f8054de73 100644 --- a/src/gallium/drivers/nv30/nv30_miptree.c +++ b/src/gallium/drivers/nv30/nv30_miptree.c @@ -177,7 +177,6 @@ nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ns->base.width = pt->width[level]; ns->base.height = pt->height[level]; ns->base.usage = flags; - ns->base.status = PIPE_SURFACE_STATUS_DEFINED; pipe_reference_init(&ns->base.reference, 1); ns->base.face = face; ns->base.level = level; diff --git a/src/gallium/drivers/nv30/nv30_state_emit.c b/src/gallium/drivers/nv30/nv30_state_emit.c index f77b08ff69..c18be20a32 100644 --- a/src/gallium/drivers/nv30/nv30_state_emit.c +++ b/src/gallium/drivers/nv30/nv30_state_emit.c @@ -21,14 +21,6 @@ static void nv30_state_do_validate(struct nv30_context *nv30, struct nv30_state_entry **states) { - const struct pipe_framebuffer_state *fb = &nv30->framebuffer; - unsigned i; - - for (i = 0; i < fb->nr_cbufs; i++) - fb->cbufs[i]->status = PIPE_SURFACE_STATUS_DEFINED; - if (fb->zsbuf) - fb->zsbuf->status = PIPE_SURFACE_STATUS_DEFINED; - while (*states) { struct nv30_state_entry *e = *states; diff --git a/src/gallium/drivers/nv40/nv40_clear.c b/src/gallium/drivers/nv40/nv40_clear.c index 59efd620e3..2c4e8f01fd 100644 --- a/src/gallium/drivers/nv40/nv40_clear.c +++ b/src/gallium/drivers/nv40/nv40_clear.c @@ -9,5 +9,4 @@ nv40_clear(struct pipe_context *pipe, struct pipe_surface *ps, unsigned clearValue) { pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, clearValue); - ps->status = PIPE_SURFACE_STATUS_CLEAR; } diff --git a/src/gallium/drivers/nv40/nv40_miptree.c b/src/gallium/drivers/nv40/nv40_miptree.c index abadca8c93..5a201ccf45 100644 --- a/src/gallium/drivers/nv40/nv40_miptree.c +++ b/src/gallium/drivers/nv40/nv40_miptree.c @@ -176,7 +176,6 @@ nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ns->base.width = pt->width[level]; ns->base.height = pt->height[level]; ns->base.usage = flags; - ns->base.status = PIPE_SURFACE_STATUS_DEFINED; pipe_reference_init(&ns->base.reference, 1); ns->base.face = face; ns->base.level = level; diff --git a/src/gallium/drivers/nv40/nv40_state_emit.c b/src/gallium/drivers/nv40/nv40_state_emit.c index ce859def10..10aae29832 100644 --- a/src/gallium/drivers/nv40/nv40_state_emit.c +++ b/src/gallium/drivers/nv40/nv40_state_emit.c @@ -38,14 +38,6 @@ static void nv40_state_do_validate(struct nv40_context *nv40, struct nv40_state_entry **states) { - const struct pipe_framebuffer_state *fb = &nv40->framebuffer; - unsigned i; - - for (i = 0; i < fb->nr_cbufs; i++) - fb->cbufs[i]->status = PIPE_SURFACE_STATUS_DEFINED; - if (fb->zsbuf) - fb->zsbuf->status = PIPE_SURFACE_STATUS_DEFINED; - while (*states) { struct nv40_state_entry *e = *states; diff --git a/src/gallium/drivers/nv50/nv50_clear.c b/src/gallium/drivers/nv50/nv50_clear.c index f9bc3b53ca..db44a9da0e 100644 --- a/src/gallium/drivers/nv50/nv50_clear.c +++ b/src/gallium/drivers/nv50/nv50_clear.c @@ -86,7 +86,5 @@ nv50_clear(struct pipe_context *pipe, struct pipe_surface *ps, pipe->set_framebuffer_state(pipe, &s_fb); pipe->set_scissor_state(pipe, &s_sc); nv50->dirty |= dirty; - - ps->status = PIPE_SURFACE_STATUS_CLEAR; } diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c index dc4688ccdc..f79a7ca86c 100644 --- a/src/gallium/drivers/nv50/nv50_miptree.c +++ b/src/gallium/drivers/nv50/nv50_miptree.c @@ -163,7 +163,6 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ps->width = pt->width[level]; ps->height = pt->height[level]; ps->usage = flags; - ps->status = PIPE_SURFACE_STATUS_DEFINED; pipe_reference_init(&ps->reference, 1); ps->face = face; ps->level = level; diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c index 85098a78a2..fc6157dbd0 100644 --- a/src/gallium/drivers/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nv50/nv50_state_validate.c @@ -178,17 +178,10 @@ nv50_state_emit(struct nv50_context *nv50) boolean nv50_state_validate(struct nv50_context *nv50) { - const struct pipe_framebuffer_state *fb = &nv50->framebuffer; struct nouveau_grobj *tesla = nv50->screen->tesla; struct nouveau_stateobj *so; unsigned i; - for (i = 0; i < fb->nr_cbufs; i++) - fb->cbufs[i]->status = PIPE_SURFACE_STATUS_DEFINED; - - if (fb->zsbuf) - fb->zsbuf->status = PIPE_SURFACE_STATUS_DEFINED; - if (nv50->dirty & NV50_NEW_FRAMEBUFFER) nv50_state_validate_fb(nv50); diff --git a/src/gallium/drivers/r300/r300_clear.c b/src/gallium/drivers/r300/r300_clear.c index fd28437aaa..8506ed2942 100644 --- a/src/gallium/drivers/r300/r300_clear.c +++ b/src/gallium/drivers/r300/r300_clear.c @@ -29,5 +29,4 @@ void r300_clear(struct pipe_context* pipe, unsigned color) { pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, color); - ps->status = PIPE_SURFACE_STATUS_DEFINED; -} \ No newline at end of file +} diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 6cdea3d285..fe91f4e184 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -147,7 +147,6 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, surface->height = texture->height[level]; surface->offset = offset; surface->usage = flags; - surface->status = PIPE_SURFACE_STATUS_DEFINED; } return surface; diff --git a/src/gallium/drivers/softpipe/sp_clear.c b/src/gallium/drivers/softpipe/sp_clear.c index ad108ec446..a60c6c4c16 100644 --- a/src/gallium/drivers/softpipe/sp_clear.c +++ b/src/gallium/drivers/softpipe/sp_clear.c @@ -79,7 +79,6 @@ softpipe_clear(struct pipe_context *pipe, struct pipe_surface *ps, if (ps == sp_tile_cache_get_surface(softpipe->zsbuf_cache)) { sp_tile_cache_clear(softpipe->zsbuf_cache, clearValue); - softpipe->framebuffer.zsbuf->status = PIPE_SURFACE_STATUS_CLEAR; #if TILE_CLEAR_OPTIMIZATION return; #endif @@ -96,7 +95,6 @@ softpipe_clear(struct pipe_context *pipe, struct pipe_surface *ps, cv = clearValue; } sp_tile_cache_clear(softpipe->cbuf_cache[i], cv); - softpipe->framebuffer.cbufs[i]->status = PIPE_SURFACE_STATUS_CLEAR; } } diff --git a/src/gallium/drivers/softpipe/sp_setup.c b/src/gallium/drivers/softpipe/sp_setup.c index 96cb09b905..711343abe6 100644 --- a/src/gallium/drivers/softpipe/sp_setup.c +++ b/src/gallium/drivers/softpipe/sp_setup.c @@ -1489,16 +1489,6 @@ void setup_prepare( struct setup_context *setup ) softpipe_update_derived(sp); } - /* Mark surfaces as defined now */ - for (i = 0; i < sp->framebuffer.nr_cbufs; i++){ - if (sp->framebuffer.cbufs[i]) { - sp->framebuffer.cbufs[i]->status = PIPE_SURFACE_STATUS_DEFINED; - } - } - if (sp->framebuffer.zsbuf) { - sp->framebuffer.zsbuf->status = PIPE_SURFACE_STATUS_DEFINED; - } - /* Note: nr_attrs is only used for debugging (vertex printing) */ setup->quad.nr_attrs = draw_num_vs_outputs(sp->draw); diff --git a/src/gallium/drivers/trace/tr_state.c b/src/gallium/drivers/trace/tr_state.c index f9fbe9aee7..a9570c1aeb 100644 --- a/src/gallium/drivers/trace/tr_state.c +++ b/src/gallium/drivers/trace/tr_state.c @@ -406,8 +406,6 @@ void trace_dump_surface(const struct pipe_surface *state) trace_dump_reference(&state->reference); trace_dump_member(format, state, format); - trace_dump_member(uint, state, status); - trace_dump_member(uint, state, clear_value); trace_dump_member(uint, state, width); trace_dump_member(uint, state, height); diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index 52d443970b..8e4f253359 100644 --- a/src/gallium/include/pipe/p_defines.h +++ b/src/gallium/include/pipe/p_defines.h @@ -185,14 +185,6 @@ enum pipe_texture_target { #define PIPE_SURFACE_LAYOUT_LINEAR 0 -/** - * Surface status - */ -#define PIPE_SURFACE_STATUS_UNDEFINED 0 -#define PIPE_SURFACE_STATUS_DEFINED 1 -#define PIPE_SURFACE_STATUS_CLEAR 2 - - /** * Transfer object usage flags */ diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h index 9c7baa3d92..705ae68ec6 100644 --- a/src/gallium/include/pipe/p_state.h +++ b/src/gallium/include/pipe/p_state.h @@ -281,8 +281,6 @@ struct pipe_surface { struct pipe_reference reference; enum pipe_format format; /**< PIPE_FORMAT_x */ - unsigned status; /**< PIPE_SURFACE_STATUS_x */ - unsigned clear_value; /**< XXX may be temporary */ unsigned width; /**< logical width in pixels */ unsigned height; /**< logical height in pixels */ unsigned layout; /**< PIPE_SURFACE_LAYOUT_x */ diff --git a/src/gallium/state_trackers/egl/egl_surface.c b/src/gallium/state_trackers/egl/egl_surface.c index ca545b12e6..489aa8d9af 100644 --- a/src/gallium/state_trackers/egl/egl_surface.c +++ b/src/gallium/state_trackers/egl/egl_surface.c @@ -406,8 +406,6 @@ drm_swap_buffers(_EGLDriver *drv, EGLDisplay dpy, EGLSurface draw) surf->user->pipe->flush(surf->user->pipe, PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_TEXTURE_CACHE, NULL); /* TODO stuff here */ } - - st_notify_swapbuffers_complete(surf->stfb); } return EGL_TRUE; diff --git a/src/mesa/state_tracker/st_cb_clear.c b/src/mesa/state_tracker/st_cb_clear.c index dd9ba2881f..020684b4e1 100644 --- a/src/mesa/state_tracker/st_cb_clear.c +++ b/src/mesa/state_tracker/st_cb_clear.c @@ -291,11 +291,6 @@ clear_with_quad(GLcontext *ctx, static INLINE GLboolean check_clear_color_with_quad(GLcontext *ctx, struct gl_renderbuffer *rb) { - const struct st_renderbuffer *strb = st_renderbuffer(rb); - - if (strb->surface->status == PIPE_SURFACE_STATUS_UNDEFINED) - return FALSE; - if (ctx->Scissor.Enabled) return TRUE; @@ -312,14 +307,10 @@ check_clear_color_with_quad(GLcontext *ctx, struct gl_renderbuffer *rb) static INLINE GLboolean check_clear_depth_stencil_with_quad(GLcontext *ctx, struct gl_renderbuffer *rb) { - const struct st_renderbuffer *strb = st_renderbuffer(rb); const GLuint stencilMax = (1 << rb->StencilBits) - 1; GLboolean maskStencil = (ctx->Stencil.WriteMask[0] & stencilMax) != stencilMax; - if (strb->surface->status == PIPE_SURFACE_STATUS_UNDEFINED) - return FALSE; - if (ctx->Scissor.Enabled) return TRUE; @@ -339,14 +330,10 @@ check_clear_depth_with_quad(GLcontext *ctx, struct gl_renderbuffer *rb) const struct st_renderbuffer *strb = st_renderbuffer(rb); const GLboolean isDS = is_depth_stencil_format(strb->surface->format); - if (strb->surface->status == PIPE_SURFACE_STATUS_UNDEFINED) - return FALSE; - if (ctx->Scissor.Enabled) return TRUE; if (isDS && - strb->surface->status == PIPE_SURFACE_STATUS_DEFINED && ctx->DrawBuffer->Visual.stencilBits > 0) return TRUE; @@ -366,9 +353,6 @@ check_clear_stencil_with_quad(GLcontext *ctx, struct gl_renderbuffer *rb) const GLboolean maskStencil = (ctx->Stencil.WriteMask[0] & stencilMax) != stencilMax; - if (strb->surface->status == PIPE_SURFACE_STATUS_UNDEFINED) - return FALSE; - if (maskStencil) return TRUE; @@ -381,7 +365,6 @@ check_clear_stencil_with_quad(GLcontext *ctx, struct gl_renderbuffer *rb) * current state. */ if (isDS && - strb->surface->status == PIPE_SURFACE_STATUS_DEFINED && ctx->DrawBuffer->Visual.depthBits > 0) return TRUE; diff --git a/src/mesa/state_tracker/st_framebuffer.c b/src/mesa/state_tracker/st_framebuffer.c index 06fec20eee..daaad65cca 100644 --- a/src/mesa/state_tracker/st_framebuffer.c +++ b/src/mesa/state_tracker/st_framebuffer.c @@ -293,32 +293,6 @@ st_notify_swapbuffers(struct st_framebuffer *stfb) } -/** - * Quick hack - allows the winsys to inform the driver that surface - * states are now undefined after a glXSwapBuffers or similar. - */ -void -st_notify_swapbuffers_complete(struct st_framebuffer *stfb) -{ - GET_CURRENT_CONTEXT(ctx); - - if (ctx && ctx->DrawBuffer == &stfb->Base) { - struct st_renderbuffer *strb; - - /* Mark back color buffers as undefined */ - strb = st_renderbuffer(stfb->Base.Attachment[BUFFER_BACK_LEFT]. - Renderbuffer); - if (strb && strb->surface) - strb->surface->status = PIPE_SURFACE_STATUS_UNDEFINED; - - strb = st_renderbuffer(stfb->Base.Attachment[BUFFER_BACK_RIGHT]. - Renderbuffer); - if (strb && strb->surface) - strb->surface->status = PIPE_SURFACE_STATUS_UNDEFINED; - } -} - - void *st_framebuffer_private( struct st_framebuffer *stfb ) { return stfb->Private; diff --git a/src/mesa/state_tracker/st_public.h b/src/mesa/state_tracker/st_public.h index 414218bb58..030314372f 100644 --- a/src/mesa/state_tracker/st_public.h +++ b/src/mesa/state_tracker/st_public.h @@ -100,7 +100,6 @@ void st_flush( struct st_context *st, uint pipeFlushFlags, void st_finish( struct st_context *st ); void st_notify_swapbuffers(struct st_framebuffer *stfb); -void st_notify_swapbuffers_complete(struct st_framebuffer *stfb); int st_set_teximage(struct pipe_texture *pt, int target); -- cgit v1.2.3 From aa91f05f9de28511f352ac1d0ce754c19539e38f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 25 Mar 2009 07:25:06 -0700 Subject: r300-gallium: Use CMP for MOV on r300. Doesn't quite fix problems, though. :c --- src/gallium/drivers/r300/r300_state_shader.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index e83d007ba2..7cbb41ffdb 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -119,15 +119,15 @@ static const struct r300_fragment_shader r300_passthrough_fragment_shader = { .shader.stack_size = 1, .instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZB(R300_ALU_ARGC_ONE) | + R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | - R300_ALU_OUTC_MAD, + R300_ALU_OUTC_CMP, .instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, .instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZB(R300_ALU_ARGA_ONE) | + R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | - R300_ALU_OUTA_MAD, + R300_ALU_OUTA_CMP, .instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, }; -- cgit v1.2.3 From 2431a027c197c7172d6769eb616d4301cc6a0bca Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 25 Mar 2009 21:26:02 -0700 Subject: r300-gallium: Add some surface_copy. --- src/gallium/drivers/r300/r300_emit.c | 2 +- src/gallium/drivers/r300/r300_emit.h | 2 + src/gallium/drivers/r300/r300_reg.h | 3 + src/gallium/drivers/r300/r300_state_invariant.c | 17 ---- src/gallium/drivers/r300/r300_state_shader.h | 54 +++++++++++++ src/gallium/drivers/r300/r300_surface.c | 101 ++++++++++++++++++++++-- src/gallium/drivers/r300/r300_surface.h | 29 +++++++ 7 files changed, 184 insertions(+), 24 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 16455e48ce..a2e9cca39b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -343,7 +343,7 @@ void r300_emit_viewport_state(struct r300_context* r300, END_CS; } -static void r300_flush_textures(struct r300_context* r300) +void r300_flush_textures(struct r300_context* r300) { CS_LOCALS(r300); diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 0bc1f90e6a..9d92b090ac 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -67,6 +67,8 @@ void r300_emit_vertex_format_state(struct r300_context* r300); void r300_emit_viewport_state(struct r300_context* r300, struct r300_viewport_state* viewport); +void r300_flush_textures(struct r300_context* r300); + /* Emit all dirty state. */ void r300_emit_dirty_state(struct r300_context* r300); diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 3fe45e1393..c9a195a6ce 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1191,6 +1191,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_RS_INST_COUNT_MASK 0x0000000f # define R300_RS_TX_OFFSET_SHIFT 5 # define R300_RS_TX_OFFSET_MASK 0x000000e0 +# define R300_RS_TX_OFFSET(x) ((x) << 5) /* gap */ @@ -1434,6 +1435,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_TX_MAX_ANISO_8_TO_1 (3 << 21) # define R300_TX_MAX_ANISO_16_TO_1 (4 << 21) # define R300_TX_MAX_ANISO_MASK (7 << 21) +# define R300_TX_WRAP_S(x) ((x) << 0) +# define R300_TX_WRAP_T(x) ((x) << 3) #define R300_TX_FILTER1_0 0x4440 # define R300_CHROMA_KEY_MODE_DISABLE 0 diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index e1837b6380..3705ff98db 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -141,28 +141,11 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); - if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, - (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | - ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) | - R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); - } else { - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, - (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | - ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | - R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); - } - OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, - (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE0_SHIFT) | - (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE1_SHIFT)); OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); /* Vertex size. */ OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); - OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003); - OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000); - OUT_CS_REG(R300_TX_ENABLE, 0x0); /* XXX */ OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 7cbb41ffdb..3c5f036d2a 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -158,4 +158,58 @@ static const struct r500_fragment_shader r500_passthrough_fragment_shader = { R500_ALU_RGBA_A_SWIZ_0, }; +static const struct r300_fragment_shader r300_texture_fragment_shader = { + /* XXX This is the emission code. TODO: decode + OUT_CS_REG(R300_US_CONFIG, 0); + OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); + OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); +*/ + .alu_instruction_count = 1, + .tex_instruction_count = 0, + .indirections = 0, + .shader.stack_size = 1, + + .instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | + R300_ALU_OUTC_CMP, + .instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | + R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, + .instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | + R300_ALU_OUTA_CMP, + .instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | + R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, +}; + +static const struct r500_fragment_shader r500_texture_fragment_shader = { + .shader.stack_size = 0, + .instruction_count = 1, + .instructions[0].inst0 = R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, + .instructions[0].inst1 = + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, + .instructions[0].inst2 = + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, + .instructions[0].inst3 = + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, + .instructions[0].inst4 = + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, + .instructions[0].inst5 = + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0, +}; + #endif /* R300_STATE_SHADER_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index db18975a10..96b63986ea 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -113,7 +113,32 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(21); + BEGIN_CS(31); + + /* VAP stream control, mapping from input memory to PVS/RS memory */ + if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); + } else { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)); + } + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, + (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE0_SHIFT) | + (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE1_SHIFT)); + + /* VAP format controls */ + OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, + R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | + R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT); + OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x0); + + /* Disable textures */ + OUT_CS_REG(R300_TX_ENABLE, 0x0); /* Viewport setup */ OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); @@ -132,7 +157,7 @@ static void r300_surface_fill(struct pipe_context* pipe, /* Packet3 with our point vertex */ OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 8); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | - (1 << R300_PRIM_NUM_VERTICES_SHIFT)); + (1 << R300_PRIM_NUM_VERTICES_SHIFT)); OUT_CS_32F(w / 2.0); OUT_CS_32F(h / 2.0); /* XXX this should be the depth value to clear to */ @@ -163,6 +188,7 @@ static void r300_surface_copy(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); + struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; struct r300_texture* srctex = (struct r300_texture*)src->texture; struct r300_texture* desttex = (struct r300_texture*)dest->texture; @@ -171,14 +197,77 @@ static void r300_surface_copy(struct pipe_context* pipe, " dimensions %dx%d (pixel pitch %d)\n", src, srcx, srcy, dest, destx, desty, w, h, pixpitch); - /* if ((srctex == desttex) && + if ((srctex == desttex) && ((destx < srcx + w) || (srcx < destx + w)) && - ((desty < srcy + h) || (srcy < destx + h))) { */ - if (TRUE) { + ((desty < srcy + h) || (srcy < desty + h))) { debug_printf("r300: Falling back on surface_copy\n"); - return util_surface_copy(pipe, FALSE, dest, destx, desty, src, + util_surface_copy(pipe, FALSE, dest, destx, desty, src, srcx, srcy, w, h); } + + r300_emit_sampler(r300, &r300_sampler_copy_state, 0); + r300_emit_texture(r300, srctex, 0); + r300_flush_textures(r300); + + /* Fragment shader setup */ + if (caps->is_r500) { + r500_emit_fragment_shader(r300, &r500_texture_fragment_shader); + r300_emit_rs_block_state(r300, &r500_rs_block_copy_state); + } else { + r300_emit_fragment_shader(r300, &r300_texture_fragment_shader); + r300_emit_rs_block_state(r300, &r300_rs_block_copy_state); + } + + /* VAP stream control, mapping from input memory to PVS/RS memory */ + if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_2) << R300_DATA_TYPE_1_SHIFT)); + } else { + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, + (R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_0_SHIFT) | + ((R300_LAST_VEC | (6 << R300_DST_VEC_LOC_SHIFT) | + R300_DATA_TYPE_FLOAT_2) << R300_DATA_TYPE_1_SHIFT)); + } + OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, + (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE0_SHIFT) | + (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE1_SHIFT)); + + /* VAP format controls */ + OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, + R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT); + /* Two components of texture 0 */ + OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x2); + + /* Packet3 with our texcoords */ + OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 8); + OUT_CS(R300_PRIM_TYPE_QUADS | R300_PRIM_WALK_RING | + (4 << R300_PRIM_NUM_VERTICES_SHIFT)); + /* (x , y ) */ + OUT_CS_32F((float)destx); + OUT_CS_32F((float)desty); + OUT_CS_32F((float)srcx); + OUT_CS_32F((float)srcy); + /* (x , y + h) */ + OUT_CS_32F((float)destx); + OUT_CS_32F((float)(desty + h)); + OUT_CS_32F((float)srcx); + OUT_CS_32F((float)(srcy + h)); + /* (x + w, y + h) */ + OUT_CS_32F((float)(destx + w)); + OUT_CS_32F((float)(desty + h)); + OUT_CS_32F((float)(srcx + w)); + OUT_CS_32F((float)(srcy + h)); + /* (x + w, y ) */ + OUT_CS_32F((float)(destx + w)); + OUT_CS_32F((float)desty); + OUT_CS_32F((float)(srcx + w)); + OUT_CS_32F((float)srcy); + + OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); + + r300->dirty_hw++; } void r300_init_surface_functions(struct r300_context* r300) diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index b75b3ab84c..465b8476ed 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -91,4 +91,33 @@ const struct r300_rs_block r500_rs_block_clear_state = { .inst_count = 0, }; +/* The following state is used for surface_copy only. */ + +const struct r300_rs_block r300_rs_block_copy_state = { + .ip[0] = R500_RS_SEL_S(R300_RS_SEL_K0) | + R500_RS_SEL_T(R300_RS_SEL_K0) | + R500_RS_SEL_R(R300_RS_SEL_K0) | + R500_RS_SEL_Q(R300_RS_SEL_K1), + .inst[0] = R300_RS_INST_COL_CN_WRITE, + .count = R300_IT_COUNT(2) | R300_IC_COUNT(0) | R300_HIRES_EN, + .inst_count = R300_RS_TX_OFFSET(6), +}; + +const struct r300_rs_block r500_rs_block_copy_state = { + .ip[0] = R500_RS_SEL_S(R500_RS_IP_PTR_K0) | + R500_RS_SEL_T(R500_RS_IP_PTR_K0) | + R500_RS_SEL_R(R500_RS_IP_PTR_K0) | + R500_RS_SEL_Q(R500_RS_IP_PTR_K1), + .inst[0] = R500_RS_INST_COL_CN_WRITE, + .count = R300_IT_COUNT(2) | R300_IC_COUNT(0) | R300_HIRES_EN, + .inst_count = R300_RS_TX_OFFSET(6), +}; + +const struct r300_sampler_state r300_sampler_copy_state = { + .filter0 = R300_TX_WRAP_S(R300_TX_CLAMP) | + R300_TX_WRAP_T(R300_TX_CLAMP) | + R300_TX_MAG_FILTER_NEAREST | + R300_TX_MIN_FILTER_NEAREST, +}; + #endif /* R300_SURFACE_H */ -- cgit v1.2.3 From 458bfe7e8dd429b9dcb980013ac7979689db1367 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 30 Mar 2009 13:55:00 -0700 Subject: r300-gallium: Handful of small leftovers. --- src/gallium/drivers/r300/r300_state_invariant.c | 2 +- src/gallium/drivers/r300/r300_surface.c | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 3705ff98db..421f01e62e 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -86,7 +86,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(91 + (caps->has_tcl ? 26 : 0)); + BEGIN_CS(81 + (caps->has_tcl ? 26 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 96b63986ea..b2e0cef0b9 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -88,6 +88,7 @@ static void r300_surface_fill(struct pipe_context* pipe, float r, g, b, a, depth; unsigned pixpitch = tex->stride / tex->tex.block.size; + a = (float)((color >> 24) & 0xff) / 255.0f; r = (float)((color >> 16) & 0xff) / 255.0f; g = (float)((color >> 8) & 0xff) / 255.0f; b = (float)((color >> 0) & 0xff) / 255.0f; @@ -158,11 +159,12 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 8); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | (1 << R300_PRIM_NUM_VERTICES_SHIFT)); + /* Position */ OUT_CS_32F(w / 2.0); OUT_CS_32F(h / 2.0); - /* XXX this should be the depth value to clear to */ OUT_CS_32F(1.0); OUT_CS_32F(1.0); + /* Color */ OUT_CS_32F(r); OUT_CS_32F(g); OUT_CS_32F(b); -- cgit v1.2.3 From 7620b3943b5f9d6ab7156e245aade3bf2a5358a2 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 30 Mar 2009 15:47:00 -0700 Subject: r300-gallium: Fix strange build error. Why didn't this come up before? --- src/gallium/drivers/r300/r300_state_invariant.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.h b/src/gallium/drivers/r300/r300_state_invariant.h index 8204bf9588..5bea6779fe 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.h +++ b/src/gallium/drivers/r300/r300_state_invariant.h @@ -23,6 +23,7 @@ #ifndef R300_STATE_INVARIANT_H #define R300_STATE_INVARIANT_H +#include "r300_chipset.h" #include "r300_context.h" #include "r300_cs.h" #include "r300_reg.h" -- cgit v1.2.3 From a56020fe17b3d26ea0ea933dd4e8286e5029996f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 30 Mar 2009 15:50:09 -0700 Subject: r300-gallium: Fix hardlock when no colors or textures are present. --- src/gallium/drivers/r300/r300_state_derived.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index d761a0302f..0e7a2b6726 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -211,7 +211,6 @@ static void r300_update_rs_block(struct r300_context* r300) rs->ip[0] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001); } - /* Set up at least one texture pointer or RS will not be happy. */ if (tex_count == 0) { rs->ip[0] |= R500_RS_SEL_S(R500_RS_IP_PTR_K0) | @@ -220,15 +219,20 @@ static void r300_update_rs_block(struct r300_context* r300) R500_RS_SEL_Q(R500_RS_IP_PTR_K1); } + /* Rasterize at least one color, or bad things happen. */ + if ((col_count == 0) && (tex_count == 0)) { + col_count++; + } + for (i = 0; i < tex_count; i++) { - rs->inst[i] |= R500_RS_INST_TEX_ID(i) | R500_RS_INST_TEX_CN_WRITE | - R500_RS_INST_TEX_ADDR(fp_offset); + rs->inst[i] |= R500_RS_INST_TEX_ID(i) | + R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_offset); fp_offset++; } for (i = 0; i < col_count; i++) { - rs->inst[i] |= R500_RS_INST_COL_ID(i) | R500_RS_INST_COL_CN_WRITE | - R500_RS_INST_COL_ADDR(fp_offset); + rs->inst[i] |= R500_RS_INST_COL_ID(i) | + R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_offset); fp_offset++; } } else { @@ -268,15 +272,20 @@ static void r300_update_rs_block(struct r300_context* r300) R300_RS_SEL_Q(R300_RS_SEL_K1); } + /* Rasterize at least one color, or bad things happen. */ + if ((col_count == 0) && (tex_count == 0)) { + col_count++; + } + for (i = 0; i < tex_count; i++) { - rs->inst[i] |= R300_RS_INST_TEX_ID(i) | R300_RS_INST_TEX_CN_WRITE | - R300_RS_INST_TEX_ADDR(fp_offset); + rs->inst[i] |= R300_RS_INST_TEX_ID(i) | + R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_offset); fp_offset++; } for (i = 0; i < col_count; i++) { - rs->inst[i] |= R300_RS_INST_COL_ID(i) | R300_RS_INST_COL_CN_WRITE | - R300_RS_INST_COL_ADDR(fp_offset); + rs->inst[i] |= R300_RS_INST_COL_ID(i) | + R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_offset); fp_offset++; } } -- cgit v1.2.3 From 4bfe784dcadf5bcb65dbd8b9c3d4db757d1824b8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 30 Mar 2009 16:15:04 -0700 Subject: r300-gallium: Emit the "right" sequence of colors. ARGB, not RGBA. --- src/gallium/drivers/r300/r300_surface.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index b2e0cef0b9..6ecc708e00 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -165,10 +165,10 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(1.0); OUT_CS_32F(1.0); /* Color */ + OUT_CS_32F(a); OUT_CS_32F(r); OUT_CS_32F(g); OUT_CS_32F(b); - OUT_CS_32F(1.0); /* XXX figure out why this is 0xA and not 0x2 */ OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); -- cgit v1.2.3 From 70d39c70536079eb51298086c559e4b40e6ffc03 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 30 Mar 2009 16:51:01 -0700 Subject: r300-gallium: Allow surface_fill to clear depth/stencil buffers too. --- src/gallium/drivers/r300/r300_state_inlines.h | 2 ++ src/gallium/drivers/r300/r300_surface.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index b80ff1c1ab..91b93fc367 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -292,6 +292,7 @@ static INLINE uint32_t r300_translate_colorformat(enum pipe_format format) return R300_COLOR_FORMAT_ARGB4444; /* 32-bit buffers */ case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_Z24S8_UNORM: return R300_COLOR_FORMAT_ARGB8888; /* XXX Not in pipe_format case PIPE_FORMAT_A32R32G32B32: @@ -337,6 +338,7 @@ static INLINE uint32_t r300_translate_out_fmt(enum pipe_format format) { switch (format) { case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_Z24S8_UNORM: return R300_US_OUT_FMT_C4_8 | R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 6ecc708e00..7e6036868a 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -97,7 +97,7 @@ static void r300_surface_fill(struct pipe_context* pipe, dest, x, y, w, h, pixpitch, color); /* Fallback? */ - if (tex->tex.format != PIPE_FORMAT_A8R8G8B8_UNORM) { + if (FALSE) { debug_printf("r300: Falling back on surface clear..."); util_surface_fill(pipe, dest, x, y, w, h, color); return; -- cgit v1.2.3 From 70de577b14e9b0efab7a749203d50dc19540472d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 30 Mar 2009 16:58:20 -0700 Subject: r300-gallium: Properly redo shaders when constant buffer changes size. --- src/gallium/drivers/r300/r300_state.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 8c38f7c706..c9a20c9e8a 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -132,6 +132,7 @@ static void const struct pipe_constant_buffer* buffer) { struct r300_context* r300 = r300_context(pipe); + int i = r300->shader_constants[shader].user_count; /* This entire chunk of code seems ever-so-slightly baked. * It's as if I've got pipe_buffer* matryoshkas... */ @@ -149,6 +150,12 @@ static void } r300->dirty_state |= R300_NEW_CONSTANTS; + + /* If the number of constants have changed, invalidate the shader. */ + if (r300->shader_constants[shader].user_count != i) { + r300->fs->translated = FALSE; + r300_translate_fragment_shader(r300, r300->fs); + } } /* Create a new depth, stencil, and alpha state based on the CSO dsa state. -- cgit v1.2.3 From aafbbf77441dedf6015a4ab61cc7a82ef592415f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 30 Mar 2009 17:20:12 -0700 Subject: r300-gallium: r500-fs: If recompiling a shader, overwrite old insts. --- src/gallium/drivers/r300/r300_state_shader.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index ed9d26f0b9..5dc7266f9b 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -582,6 +582,11 @@ void r300_translate_fragment_shader(struct r300_context* r300, /* Setup starting offset for immediates. */ assembler->imm_offset = consts->user_count; + /* Make sure we start at the beginning of the shader. */ + if (is_r500) { + ((struct r500_fragment_shader*)fs)->instruction_count = 0; + } + tgsi_parse_init(&parser, fs->state.tokens); while (!tgsi_parse_end_of_tokens(&parser)) { -- cgit v1.2.3 From 3eeeaf04e31b8aed831f29d8a192f3f9a0a8ef03 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 30 Mar 2009 17:31:58 -0700 Subject: r300-gallium: RGBA, not ARGB, after all. Clearly, something else is wrong. --- src/gallium/drivers/r300/r300_surface.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 7e6036868a..9c4f3065a7 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -165,10 +165,10 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(1.0); OUT_CS_32F(1.0); /* Color */ - OUT_CS_32F(a); OUT_CS_32F(r); OUT_CS_32F(g); OUT_CS_32F(b); + OUT_CS_32F(a); /* XXX figure out why this is 0xA and not 0x2 */ OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); -- cgit v1.2.3 From 63529c731a090c5e41c1224ca79b544243a1e570 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 30 Mar 2009 23:54:53 -0700 Subject: r300-gallium: Stubs for vertex shaders. --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_context.h | 22 +++ src/gallium/drivers/r300/r300_state_shader.c | 5 +- src/gallium/drivers/r300/r300_state_tcl.c | 196 +++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_state_tcl.h | 72 ++++++++++ 5 files changed, 293 insertions(+), 3 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_state_tcl.c create mode 100644 src/gallium/drivers/r300/r300_state_tcl.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 0e4e115532..9330c286d2 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -16,6 +16,7 @@ C_SOURCES = \ r300_state_derived.c \ r300_state_invariant.c \ r300_state_shader.c \ + r300_state_tcl.c \ r300_surface.c \ r300_swtcl_emit.c \ r300_texture.c diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index ed6480bea7..0ca445c091 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -231,6 +231,26 @@ struct r300_vertex_format { int tab[16]; }; +struct r300_vertex_shader { + /* Parent class */ + struct pipe_shader_state state; + struct tgsi_shader_info info; + + /* Has this shader been translated yet? */ + boolean translated; + + /* Number of used instructions */ + int instruction_count; + + /* Machine instructions */ + struct { + uint32_t inst0; + uint32_t inst1; + uint32_t inst2; + uint32_t inst3; + } instructions[128]; /*< XXX magic number */ +}; + struct r300_context { /* Parent class */ struct pipe_context context; @@ -270,6 +290,8 @@ struct r300_context { int vertex_buffer_count; /* Vertex information. */ struct r300_vertex_format vertex_info; + /* Vertex shader. */ + struct r300_vertex_shader* vs; /* Viewport state. */ struct r300_viewport_state* viewport_state; /* Bitmask of dirty state objects. */ diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 5dc7266f9b..1b02239ee7 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -623,15 +623,14 @@ void r300_translate_fragment_shader(struct r300_context* r300, } break; } - } - debug_printf("r300: %d texs and %d colors, first free reg is %d\n", + debug_printf("r300: fs: %d texs and %d colors, first free reg is %d\n", assembler->tex_count, assembler->color_count, assembler->tex_count + assembler->color_count); consts->count = consts->user_count + assembler->imm_count; - debug_printf("r300: %d total constants, " + debug_printf("r300: fs: %d total constants, " "%d from user and %d from immediates\n", consts->count, consts->user_count, assembler->imm_count); r300_fs_finalize(fs, assembler); diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c new file mode 100644 index 0000000000..ddf43604b9 --- /dev/null +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -0,0 +1,196 @@ +/* + * Copyright 2009 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_state_tcl.h" + +static void r300_vs_declare(struct r300_vs_asm* assembler, + struct tgsi_full_declaration* decl) +{ + switch (decl->Declaration.File) { + case TGSI_FILE_INPUT: + switch (decl->Semantic.SemanticName) { + case TGSI_SEMANTIC_COLOR: + assembler->color_count++; + break; + case TGSI_SEMANTIC_GENERIC: + assembler->tex_count++; + break; + default: + debug_printf("r300: vs: Bad semantic declaration %d\n", + decl->Semantic.SemanticName); + break; + } + break; + case TGSI_FILE_OUTPUT: + case TGSI_FILE_CONSTANT: + break; + case TGSI_FILE_TEMPORARY: + assembler->temp_count++; + break; + default: + debug_printf("r300: vs: Bad file %d\n", decl->Declaration.File); + break; + } + + assembler->temp_offset = assembler->color_count + assembler->tex_count; +} + +static INLINE unsigned r300_vs_src(struct r300_vs_asm* assembler, + struct tgsi_src_register* src) +{ + switch (src->File) { + case TGSI_FILE_NULL: + return 0; + case TGSI_FILE_INPUT: + /* XXX may be wrong */ + return src->Index; + break; + case TGSI_FILE_TEMPORARY: + return src->Index + assembler->temp_offset; + break; + case TGSI_FILE_IMMEDIATE: + return (src->Index + assembler->imm_offset) | (1 << 8); + break; + case TGSI_FILE_CONSTANT: + /* XXX magic */ + return src->Index | (1 << 8); + break; + default: + debug_printf("r300: vs: Unimplemented src %d\n", src->File); + break; + } + return 0; +} + +static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, + struct tgsi_dst_register* dst) +{ + switch (dst->File) { + case TGSI_FILE_NULL: + /* This happens during KIL instructions. */ + return 0; + break; + case TGSI_FILE_OUTPUT: + return 0; + break; + case TGSI_FILE_TEMPORARY: + return dst->Index + assembler->temp_offset; + break; + default: + debug_printf("r300: vs: Unimplemented dst %d\n", dst->File); + break; + } + return 0; +} + +static void r300_vs_emit_inst(struct r300_vertex_shader* vs, + struct r300_vs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst) +{ + int i = vs->instruction_count; + vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(dst->DstRegister.Index); +} + +static void r300_vs_instruction(struct r300_vertex_shader* vs, + struct r300_vs_asm* assembler, + struct tgsi_full_instruction* inst) +{ + switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_MOV: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0]); + break; + case TGSI_OPCODE_END: + break; + default: + debug_printf("r300: vs: Bad opcode %d\n", + inst->Instruction.Opcode); + break; + } +} + +void r300_translate_vertex_shader(struct r300_context* r300, + struct r300_vertex_shader* vs) +{ + struct tgsi_parse_context parser; + int i; + struct r300_constant_buffer* consts = + &r300->shader_constants[PIPE_SHADER_VERTEX]; + + struct r300_vs_asm* assembler = CALLOC_STRUCT(r300_vs_asm); + if (assembler == NULL) { + return; + } + /* Setup starting offset for immediates. */ + assembler->imm_offset = consts->user_count; + + tgsi_parse_init(&parser, vs->state.tokens); + + while (!tgsi_parse_end_of_tokens(&parser)) { + tgsi_parse_token(&parser); + + /* This is seriously the lamest way to create fragment programs ever. + * I blame TGSI. */ + switch (parser.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_DECLARATION: + /* Allocated registers sitting at the beginning + * of the program. */ + r300_vs_declare(assembler, &parser.FullToken.FullDeclaration); + break; + case TGSI_TOKEN_TYPE_IMMEDIATE: + debug_printf("r300: Emitting immediate to constant buffer, " + "position %d\n", + assembler->imm_offset + assembler->imm_count); + /* I am not amused by the length of these. */ + for (i = 0; i < 4; i++) { + consts->constants[assembler->imm_offset + + assembler->imm_count][i] = + parser.FullToken.FullImmediate.u.ImmediateFloat32[i] + .Float; + } + assembler->imm_count++; + break; + case TGSI_TOKEN_TYPE_INSTRUCTION: + r300_vs_instruction(vs, assembler, + &parser.FullToken.FullInstruction); + break; + } + } + + debug_printf("r300: vs: %d texs and %d colors, first free reg is %d\n", + assembler->tex_count, assembler->color_count, + assembler->tex_count + assembler->color_count); + + consts->count = consts->user_count + assembler->imm_count; + debug_printf("r300: vs: %d total constants, " + "%d from user and %d from immediates\n", consts->count, + consts->user_count, assembler->imm_count); + + tgsi_dump(vs->state.tokens); + /* XXX finish r300 vertex shader dumper */ + + tgsi_parse_free(&parser); + FREE(assembler); +} diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h new file mode 100644 index 0000000000..54900cc191 --- /dev/null +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -0,0 +1,72 @@ +/* + * Copyright 2009 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_STATE_TCL_H +#define R300_STATE_TCL_H + +#include "tgsi/tgsi_parse.h" + +#include "r300_context.h" +#include "r300_debug.h" +#include "r300_reg.h" +#include "r300_screen.h" + +/* XXX get these to r300_reg */ +#define R300_PVS_DST_OPCODE(x) ((x) << 0) +# define R300_VE_ADD 3 +#define R300_PVS_DST_REG_TYPE(x) ((x) << 8) +# define R300_PVS_DST_REG_TEMPORARY 0 +# define R300_PVS_DST_REG_A0 1 +# define R300_PVS_DST_REG_OUT 2 +# define R300_PVS_DST_REG_OUT_REPL_X 3 +# define R300_PVS_DST_REG_ALT_TEMPORARY 4 +# define R300_PVS_DST_REG_INPUT 5 +#define R300_PVS_DST_OFFSET(x) ((x) << 13) +#define R300_PVS_DST_WE_SHIFT 20 + +/* Temporary struct used to hold assembly state while putting together + * fragment programs. */ +struct r300_vs_asm { + /* Pipe context. */ + struct r300_context* r300; + /* Number of colors. */ + unsigned color_count; + /* Number of texcoords. */ + unsigned tex_count; + /* Offset for temporary registers. Inputs and temporaries have no + * distinguishing markings, so inputs start at 0 and the first usable + * temporary register is after all inputs. */ + unsigned temp_offset; + /* Number of requested temporary registers. */ + unsigned temp_count; + /* Offset for immediate constants. Neither R300 nor R500 can do four + * inline constants per source, so instead we copy immediates into the + * constant buffer. */ + unsigned imm_offset; + /* Number of immediate constants. */ + unsigned imm_count; +}; + +void r300_translate_vertex_shader(struct r300_context* r300, + struct r300_vertex_shader* vs); + +#endif /* R300_STATE_TCL_H */ -- cgit v1.2.3 From ddd0c94f0440cebc5e63afc1ae0300e0f51bc0a3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 31 Mar 2009 18:58:03 -0700 Subject: r300-gallium: Add vertex shader emit. --- src/gallium/drivers/r300/r300_emit.c | 20 ++++++++++++++++++ src/gallium/drivers/r300/r300_emit.h | 3 +++ src/gallium/drivers/r300/r300_state_invariant.c | 28 ------------------------- src/gallium/drivers/r300/r300_state_tcl.h | 12 +++++++++++ src/gallium/drivers/r300/r300_surface.c | 21 +++++++++++++++++++ src/gallium/drivers/r300/r300_surface.h | 1 + 6 files changed, 57 insertions(+), 28 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index a2e9cca39b..4032eac133 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -325,9 +325,29 @@ void r300_emit_vertex_format_state(struct r300_context* r300) END_CS; } +void r300_emit_vertex_shader(struct r300_context* r300, + struct r300_vertex_shader* vs) +{ + CS_LOCALS(r300); + int i; + + BEGIN_CS(1 + (vs->instruction_count * 4)); + + OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, vs->instruction_count * 4); + for (i = 0; i < vs->instruction_count; i++) { + OUT_CS(vs->instructions[i].inst0); + OUT_CS(vs->instructions[i].inst1); + OUT_CS(vs->instructions[i].inst2); + OUT_CS(vs->instructions[i].inst3); + } + END_CS; + +} + void r300_emit_viewport_state(struct r300_context* r300, struct r300_viewport_state* viewport) { + /* XXX has_tcl */ return; CS_LOCALS(r300); diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 9d92b090ac..31dbc7ab85 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -64,6 +64,9 @@ void r300_emit_texture(struct r300_context* r300, void r300_emit_vertex_format_state(struct r300_context* r300); +void r300_emit_vertex_shader(struct r300_context* r300, + struct r300_vertex_shader* vs); + void r300_emit_viewport_state(struct r300_context* r300, struct r300_viewport_state* viewport); diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 421f01e62e..f4bd5b6c4b 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -156,33 +156,5 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS(R300_US_OUT_FMT_UNUSED); OUT_CS(R300_US_OUT_FMT_UNUSED); OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); - /* XXX these magic numbers should be explained when - * this becomes a cached state object */ - if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_CNTL, 0xA | - (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | - (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); - OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); - OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); - OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); - /* XXX translate these back into normal instructions */ - OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); - OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); - OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 8); - OUT_CS(0x00F00203); - OUT_CS(0x00D10001); - OUT_CS(0x01248001); - OUT_CS(0x00000000); - OUT_CS(0x00F02203); - OUT_CS(0x00D10021); - OUT_CS(0x01248021); - OUT_CS(0x00000000); - } else { - OUT_CS_REG(R300_VAP_CNTL, 0xA | - (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | - (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); - } END_CS; } diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index 54900cc191..1b44b9bb04 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -66,6 +66,18 @@ struct r300_vs_asm { unsigned imm_count; }; +static struct r300_vertex_shader r300_passthrough_vertex_shader = { + .instruction_count = 2, + .instructions[0].inst0 = 0xF00203, + .instructions[0].inst1 = 0xD10001, + .instructions[0].inst2 = 0x1248001, + .instructions[0].inst3 = 0x0, + .instructions[1].inst0 = 0xF00203, + .instructions[1].inst1 = 0xD10021, + .instructions[1].inst2 = 0x1248021, + .instructions[1].inst3 = 0x0, +}; + void r300_translate_vertex_shader(struct r300_context* r300, struct r300_vertex_shader* vs); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 9c4f3065a7..e524b5bf3e 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -39,6 +39,27 @@ static void r300_surface_setup(struct pipe_context* pipe, r300_emit_dsa_state(r300, &dsa_clear_state); r300_emit_rs_state(r300, &rs_clear_state); + /* XXX these magic numbers should be explained when + * this becomes a cached state object */ + if (caps->has_tcl) { + OUT_CS_REG(R300_VAP_CNTL, 0xA | + (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); + OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); + /* XXX translate these back into normal instructions */ + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); + r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader); + } else { + OUT_CS_REG(R300_VAP_CNTL, 0xA | + (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | + (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | + (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); + } + BEGIN_CS(15); /* Pixel scissors. */ diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 465b8476ed..aa34054326 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -32,6 +32,7 @@ #include "r300_cs.h" #include "r300_emit.h" #include "r300_state_shader.h" +#include "r300_state_tcl.h" #include "r300_state_inlines.h" const struct r300_blend_state blend_clear_state = { -- cgit v1.2.3 From 7540c847f1f046967d31445d5c936bcfdc7ed863 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 31 Mar 2009 20:04:56 -0700 Subject: r300-gallium: Moar vert shader emit. --- src/gallium/drivers/r300/r300_emit.c | 23 ++++++++++++++++++++++- src/gallium/drivers/r300/r300_reg.h | 6 ++++++ src/gallium/drivers/r300/r300_state_invariant.c | 2 +- src/gallium/drivers/r300/r300_state_tcl.h | 1 + src/gallium/drivers/r300/r300_surface.c | 18 ++++-------------- 5 files changed, 34 insertions(+), 16 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 4032eac133..989fba74df 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -329,10 +329,26 @@ void r300_emit_vertex_shader(struct r300_context* r300, struct r300_vertex_shader* vs) { CS_LOCALS(r300); + struct r300_screen* r300screen = r300_screen(r300->context.screen); int i; - BEGIN_CS(1 + (vs->instruction_count * 4)); + if (!r300screen->caps->has_tcl) { + debug_printf("r300: Implementation error: emit_vertex_shader called," + " but has_tcl is FALSE!\n"); + return; + } + + BEGIN_CS(13 + (vs->instruction_count * 4)); + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) | + R300_PVS_LAST_INST(vs->instruction_count - 1)); + OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, vs->instruction_count - 1); + + /* XXX */ + OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x0); + + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0); OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, vs->instruction_count * 4); for (i = 0; i < vs->instruction_count; i++) { OUT_CS(vs->instructions[i].inst0); @@ -340,6 +356,11 @@ void r300_emit_vertex_shader(struct r300_context* r300, OUT_CS(vs->instructions[i].inst2); OUT_CS(vs->instructions[i].inst3); } + + OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) | + R300_PVS_NUM_CNTLRS(5) | + R300_PVS_NUM_FPUS(r300screen->caps->num_vert_fpus) | + R300_PVS_VF_MAX_VTX_NUM(12)); END_CS; } diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index c9a195a6ce..660816e1da 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -73,6 +73,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_PVS_NUM_CNTLRS_SHIFT 4 # define R300_PVS_NUM_FPUS_SHIFT 8 # define R300_VF_MAX_VTX_NUM_SHIFT 18 +# define R300_PVS_NUM_SLOTS(x) ((x) << 0) +# define R300_PVS_NUM_CNTLRS(x) ((x) << 4) +# define R300_PVS_NUM_FPUS(x) ((x) << 8) +# define R300_PVS_VF_MAX_VTX_NUM(x) ((x) << 18) # define R300_GL_CLIP_SPACE_DEF (0 << 22) # define R300_DX_CLIP_SPACE_DEF (1 << 22) # define R500_TCL_STATE_OPTIMIZATION (1 << 23) @@ -506,6 +510,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_PVS_FIRST_INST_SHIFT 0 # define R300_PVS_XYZW_VALID_INST_SHIFT 10 # define R300_PVS_LAST_INST_SHIFT 20 +# define R300_PVS_FIRST_INST(x) ((x) << 0) +# define R300_PVS_LAST_INST(x) ((x) << 20) /* Addresses are relative the the vertex program parameters area. */ #define R300_VAP_PVS_CONST_CNTL 0x22D4 # define R300_PVS_CONST_BASE_OFFSET_SHIFT 0 diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index f4bd5b6c4b..8bd9b41bd7 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -86,7 +86,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(81 + (caps->has_tcl ? 26 : 0)); + BEGIN_CS(79 + (caps->has_tcl ? 7 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index 1b44b9bb04..bc22cd984d 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -67,6 +67,7 @@ struct r300_vs_asm { }; static struct r300_vertex_shader r300_passthrough_vertex_shader = { + /* XXX translate these back into normal instructions */ .instruction_count = 2, .instructions[0].inst0 = 0xF00203, .instructions[0].inst1 = 0xD10001, diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index e524b5bf3e..8cafe7d104 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -42,22 +42,12 @@ static void r300_surface_setup(struct pipe_context* pipe, /* XXX these magic numbers should be explained when * this becomes a cached state object */ if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_CNTL, 0xA | - (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | - (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); - OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); - OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); - OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); - /* XXX translate these back into normal instructions */ - OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); - OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader); } else { - OUT_CS_REG(R300_VAP_CNTL, 0xA | - (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | - (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | - (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); + OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) | + R300_PVS_NUM_CNTLRS(5) | + R300_PVS_NUM_FPUS(caps->num_vert_fpus) | + R300_PVS_VF_MAX_VTX_NUM(12)); } BEGIN_CS(15); -- cgit v1.2.3 From 27d886ae33d287d91c92cc353f7b98f916b4d080 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 31 Mar 2009 20:24:50 -0700 Subject: r300-gallium: Backwards test. Wow, how long's that been there? Embarrassing. --- src/gallium/drivers/r300/r300_chipset.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index e01a0546b2..9d95ad918c 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -30,7 +30,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) { /* Reasonable defaults */ - caps->has_tcl = getenv("RADEON_NO_TCL") ? TRUE : FALSE; + caps->has_tcl = getenv("RADEON_NO_TCL") ? FALSE : TRUE; caps->is_r500 = FALSE; caps->num_vert_fpus = 4; -- cgit v1.2.3 From c4fb791909e687d5af5b95d88ebd6332c82c3095 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 1 Apr 2009 15:14:19 -0700 Subject: r300-gallium: Add vertex shader for surface_copy. --- src/gallium/drivers/r300/r300_state_tcl.h | 13 ++++++++++++ src/gallium/drivers/r300/r300_surface.c | 35 +++++++++++++++++++++---------- 2 files changed, 37 insertions(+), 11 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index bc22cd984d..06767c9b02 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -79,6 +79,19 @@ static struct r300_vertex_shader r300_passthrough_vertex_shader = { .instructions[1].inst3 = 0x0, }; +static struct r300_vertex_shader r300_texture_vertex_shader = { + /* XXX translate these back into normal instructions */ + .instruction_count = 2, + .instructions[0].inst0 = 0xF00203, + .instructions[0].inst1 = 0xD10001, + .instructions[0].inst2 = 0x1248001, + .instructions[0].inst3 = 0x0, + .instructions[1].inst0 = 0xF00203, + .instructions[1].inst1 = 0xD10061, + .instructions[1].inst2 = 0x1248061, + .instructions[1].inst3 = 0x0, +}; + void r300_translate_vertex_shader(struct r300_context* r300, struct r300_vertex_shader* vs); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 8cafe7d104..ab0ecac35a 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -39,17 +39,6 @@ static void r300_surface_setup(struct pipe_context* pipe, r300_emit_dsa_state(r300, &dsa_clear_state); r300_emit_rs_state(r300, &rs_clear_state); - /* XXX these magic numbers should be explained when - * this becomes a cached state object */ - if (caps->has_tcl) { - r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader); - } else { - OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) | - R300_PVS_NUM_CNTLRS(5) | - R300_PVS_NUM_FPUS(caps->num_vert_fpus) | - R300_PVS_VF_MAX_VTX_NUM(12)); - } - BEGIN_CS(15); /* Pixel scissors. */ @@ -116,6 +105,18 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_surface_setup(r300, dest, x, y, w, h); + /* Vertex shader setup */ + if (caps->has_tcl) { + r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader); + } else { + BEGIN_CS(2); + OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) | + R300_PVS_NUM_CNTLRS(5) | + R300_PVS_NUM_FPUS(caps->num_vert_fpus) | + R300_PVS_VF_MAX_VTX_NUM(12)); + END_CS; + } + /* Fragment shader setup */ if (caps->is_r500) { r500_emit_fragment_shader(r300, &r500_passthrough_fragment_shader); @@ -222,6 +223,18 @@ static void r300_surface_copy(struct pipe_context* pipe, r300_emit_texture(r300, srctex, 0); r300_flush_textures(r300); + /* Vertex shader setup */ + if (caps->has_tcl) { + r300_emit_vertex_shader(r300, &r300_texture_vertex_shader); + } else { + BEGIN_CS(2); + OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) | + R300_PVS_NUM_CNTLRS(5) | + R300_PVS_NUM_FPUS(caps->num_vert_fpus) | + R300_PVS_VF_MAX_VTX_NUM(12)); + END_CS; + } + /* Fragment shader setup */ if (caps->is_r500) { r500_emit_fragment_shader(r300, &r500_texture_fragment_shader); -- cgit v1.2.3 From 28fa809c9eb9168ab6b80fd66c7cf6ce2b9ccf98 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 1 Apr 2009 15:24:28 -0700 Subject: r300-gallium: Fix compiler warnings. "const" is the right keyword, but I can't do that without adding a bunch of really annoying and ugly const casts everywhere, and frankly, that's really stupid, so instead, just don't make them const. --- src/gallium/drivers/r300/r300_state_shader.h | 8 ++++---- src/gallium/drivers/r300/r300_surface.h | 18 +++++++++--------- 2 files changed, 13 insertions(+), 13 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 3c5f036d2a..76f2989fd1 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -104,7 +104,7 @@ struct r300_fs_asm { void r300_translate_fragment_shader(struct r300_context* r300, struct r3xx_fragment_shader* fs); -static const struct r300_fragment_shader r300_passthrough_fragment_shader = { +static struct r300_fragment_shader r300_passthrough_fragment_shader = { /* XXX This is the emission code. TODO: decode OUT_CS_REG(R300_US_CONFIG, 0); OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); @@ -132,7 +132,7 @@ static const struct r300_fragment_shader r300_passthrough_fragment_shader = { R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, }; -static const struct r500_fragment_shader r500_passthrough_fragment_shader = { +static struct r500_fragment_shader r500_passthrough_fragment_shader = { .shader.stack_size = 0, .instruction_count = 1, .instructions[0].inst0 = R500_INST_TYPE_OUT | @@ -158,7 +158,7 @@ static const struct r500_fragment_shader r500_passthrough_fragment_shader = { R500_ALU_RGBA_A_SWIZ_0, }; -static const struct r300_fragment_shader r300_texture_fragment_shader = { +static struct r300_fragment_shader r300_texture_fragment_shader = { /* XXX This is the emission code. TODO: decode OUT_CS_REG(R300_US_CONFIG, 0); OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); @@ -186,7 +186,7 @@ static const struct r300_fragment_shader r300_texture_fragment_shader = { R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, }; -static const struct r500_fragment_shader r500_texture_fragment_shader = { +static struct r500_fragment_shader r500_texture_fragment_shader = { .shader.stack_size = 0, .instruction_count = 1, .instructions[0].inst0 = R500_INST_TYPE_OUT | diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index aa34054326..36090882f1 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -35,20 +35,20 @@ #include "r300_state_tcl.h" #include "r300_state_inlines.h" -const struct r300_blend_state blend_clear_state = { +static struct r300_blend_state blend_clear_state = { .blend_control = 0x0, .alpha_blend_control = 0x0, .rop = 0x0, .dither = 0x0, }; -const struct r300_blend_color_state blend_color_clear_state = { +static struct r300_blend_color_state blend_color_clear_state = { .blend_color = 0x0, .blend_color_red_alpha = 0x0, .blend_color_green_blue = 0x0, }; -const struct r300_dsa_state dsa_clear_state = { +static struct r300_dsa_state dsa_clear_state = { .alpha_function = 0x0, .alpha_reference = 0x0, .z_buffer_control = 0x0, @@ -58,7 +58,7 @@ const struct r300_dsa_state dsa_clear_state = { .stencil_ref_bf = 0x0, }; -const struct r300_rs_state rs_clear_state = { +static struct r300_rs_state rs_clear_state = { .point_minmax = 0x36000006, .line_control = 0x00030006, .depth_scale_front = 0x0, @@ -72,7 +72,7 @@ const struct r300_rs_state rs_clear_state = { .color_control = R300_SHADE_MODEL_FLAT, }; -const struct r300_rs_block r300_rs_block_clear_state = { +static struct r300_rs_block r300_rs_block_clear_state = { .ip[0] = R500_RS_SEL_S(R300_RS_SEL_K0) | R500_RS_SEL_T(R300_RS_SEL_K0) | R500_RS_SEL_R(R300_RS_SEL_K0) | @@ -82,7 +82,7 @@ const struct r300_rs_block r300_rs_block_clear_state = { .inst_count = 0, }; -const struct r300_rs_block r500_rs_block_clear_state = { +static struct r300_rs_block r500_rs_block_clear_state = { .ip[0] = R500_RS_SEL_S(R500_RS_IP_PTR_K0) | R500_RS_SEL_T(R500_RS_IP_PTR_K0) | R500_RS_SEL_R(R500_RS_IP_PTR_K0) | @@ -94,7 +94,7 @@ const struct r300_rs_block r500_rs_block_clear_state = { /* The following state is used for surface_copy only. */ -const struct r300_rs_block r300_rs_block_copy_state = { +static struct r300_rs_block r300_rs_block_copy_state = { .ip[0] = R500_RS_SEL_S(R300_RS_SEL_K0) | R500_RS_SEL_T(R300_RS_SEL_K0) | R500_RS_SEL_R(R300_RS_SEL_K0) | @@ -104,7 +104,7 @@ const struct r300_rs_block r300_rs_block_copy_state = { .inst_count = R300_RS_TX_OFFSET(6), }; -const struct r300_rs_block r500_rs_block_copy_state = { +static struct r300_rs_block r500_rs_block_copy_state = { .ip[0] = R500_RS_SEL_S(R500_RS_IP_PTR_K0) | R500_RS_SEL_T(R500_RS_IP_PTR_K0) | R500_RS_SEL_R(R500_RS_IP_PTR_K0) | @@ -114,7 +114,7 @@ const struct r300_rs_block r500_rs_block_copy_state = { .inst_count = R300_RS_TX_OFFSET(6), }; -const struct r300_sampler_state r300_sampler_copy_state = { +static struct r300_sampler_state r300_sampler_copy_state = { .filter0 = R300_TX_WRAP_S(R300_TX_CLAMP) | R300_TX_WRAP_T(R300_TX_CLAMP) | R300_TX_MAG_FILTER_NEAREST | -- cgit v1.2.3 From 935e6b19245542d177ab26ced416dd665a79048d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 1 Apr 2009 15:52:32 -0700 Subject: r300-gallium: Translate vertex shader magic numbers. --- src/gallium/drivers/r300/r300_state_tcl.h | 64 ++++++++++++++++++++++++------- 1 file changed, 51 insertions(+), 13 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index 06767c9b02..b947f0d1cf 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -41,7 +41,33 @@ # define R300_PVS_DST_REG_ALT_TEMPORARY 4 # define R300_PVS_DST_REG_INPUT 5 #define R300_PVS_DST_OFFSET(x) ((x) << 13) -#define R300_PVS_DST_WE_SHIFT 20 +#define R300_PVS_DST_WE(x) ((x) << 20) +#define R300_PVS_DST_WE_XYZW (0xf << 20) + +#define R300_PVS_SRC_REG_TYPE(x) ((x) << 0) +# define R300_PVS_SRC_REG_TEMPORARY 0 +# define R300_PVS_SRC_REG_INPUT 1 +# define R300_PVS_SRC_REG_CONSTANT 2 +# define R300_PVS_SRC_REG_ALT_TEMPORARY 3 +#define R300_PVS_SRC_OFFSET(x) ((x) << 5) +#define R300_PVS_SRC_SWIZZLE(x) ((x) << 13) +# define R300_PVS_SRC_SELECT_X 0 +# define R300_PVS_SRC_SELECT_Y 1 +# define R300_PVS_SRC_SELECT_Z 2 +# define R300_PVS_SRC_SELECT_W 3 +# define R300_PVS_SRC_SELECT_FORCE_0 4 +# define R300_PVS_SRC_SELECT_FORCE_1 5 +# define R300_PVS_SRC_SWIZZLE_XYZW \ + ((R300_PVS_SRC_SELECT_X | (R300_PVS_SRC_SELECT_Y << 3) | \ + (R300_PVS_SRC_SELECT_Z << 6) | (R300_PVS_SRC_SELECT_W << 9)) << 13) +# define R300_PVS_SRC_SWIZZLE_ZERO \ + ((R300_PVS_SRC_SELECT_FORCE_0 | (R300_PVS_SRC_SELECT_FORCE_0 << 3) | \ + (R300_PVS_SRC_SELECT_FORCE_0 << 6) | \ + (R300_PVS_SRC_SELECT_FORCE_0 << 9)) << 13) +# define R300_PVS_SRC_SWIZZLE_ONE \ + ((R300_PVS_SRC_SELECT_FORCE_1 | (R300_PVS_SRC_SELECT_FORCE_1 << 3) | \ + (R300_PVS_SRC_SELECT_FORCE_1 << 6) | \ + (R300_PVS_SRC_SELECT_FORCE_1 << 9)) << 13) /* Temporary struct used to hold assembly state while putting together * fragment programs. */ @@ -69,26 +95,38 @@ struct r300_vs_asm { static struct r300_vertex_shader r300_passthrough_vertex_shader = { /* XXX translate these back into normal instructions */ .instruction_count = 2, - .instructions[0].inst0 = 0xF00203, - .instructions[0].inst1 = 0xD10001, - .instructions[0].inst2 = 0x1248001, + .instructions[0].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(0) | R300_PVS_DST_WE_XYZW, + .instructions[0].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | + R300_PVS_SRC_OFFSET(0) | R300_PVS_SRC_SWIZZLE_XYZW, + .instructions[0].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, .instructions[0].inst3 = 0x0, - .instructions[1].inst0 = 0xF00203, - .instructions[1].inst1 = 0xD10021, - .instructions[1].inst2 = 0x1248021, + .instructions[1].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(2) | R300_PVS_DST_WE_XYZW, + .instructions[1].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | + R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, + .instructions[1].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, .instructions[1].inst3 = 0x0, }; static struct r300_vertex_shader r300_texture_vertex_shader = { /* XXX translate these back into normal instructions */ .instruction_count = 2, - .instructions[0].inst0 = 0xF00203, - .instructions[0].inst1 = 0xD10001, - .instructions[0].inst2 = 0x1248001, + .instructions[0].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(0) | R300_PVS_DST_WE_XYZW, + .instructions[0].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | + R300_PVS_SRC_OFFSET(0) | R300_PVS_SRC_SWIZZLE_XYZW, + .instructions[0].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, .instructions[0].inst3 = 0x0, - .instructions[1].inst0 = 0xF00203, - .instructions[1].inst1 = 0xD10061, - .instructions[1].inst2 = 0x1248061, + .instructions[1].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(6) | R300_PVS_DST_WE_XYZW, + .instructions[1].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | + R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, + .instructions[1].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, .instructions[1].inst3 = 0x0, }; -- cgit v1.2.3 From a7dc04fa73f9879d94ab4abf8fcd6f38ee2e9531 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 4 Apr 2009 00:29:56 -0700 Subject: r300-gallium: r500 surface_copy fragment shader. --- src/gallium/drivers/r300/r300_state_shader.h | 31 +++++++++++++++++++++------- 1 file changed, 23 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 76f2989fd1..185fdd90f0 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -187,26 +187,41 @@ static struct r300_fragment_shader r300_texture_fragment_shader = { }; static struct r500_fragment_shader r500_texture_fragment_shader = { - .shader.stack_size = 0, - .instruction_count = 1, - .instructions[0].inst0 = R500_INST_TYPE_OUT | + .shader.stack_size = 1, + .instruction_count = 2, + .instructions[0].inst0 = R500_INST_TYPE_TEX | + R500_INST_TEX_SEM_WAIT | + R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, + .instructions[0].inst1 = R500_TEX_ID(0) | R500_TEX_INST_LD | + R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED, + .instructions[0].inst2 = R500_TEX_SRC_ADDR(0) | + R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G | + R500_TEX_SRC_R_SWIZ_B | R500_TEX_SRC_Q_SWIZ_A | + R500_TEX_DST_ADDR(0) | + R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | + R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A, + .instructions[0].inst3 = 0x0, + .instructions[0].inst4 = 0x0, + .instructions[0].inst5 = 0x0, + .instructions[1].inst0 = R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST | R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, - .instructions[0].inst1 = + .instructions[1].inst1 = R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, - .instructions[0].inst2 = + .instructions[1].inst2 = R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, - .instructions[0].inst3 = + .instructions[1].inst3 = R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, - .instructions[0].inst4 = + .instructions[1].inst4 = R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, - .instructions[0].inst5 = + .instructions[1].inst5 = R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | R500_ALU_RGBA_A_SWIZ_0, -- cgit v1.2.3 From be1dbba0a4d0d75468461aff8c281a512a537ecc Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 4 Apr 2009 00:31:49 -0700 Subject: r300-gallium: Clean up compile warnings and strict compile errors. --- src/gallium/drivers/r300/r300_emit.c | 20 +++++++++----------- src/gallium/drivers/r300/r300_query.c | 8 ++++---- src/gallium/drivers/r300/r300_state.c | 1 + src/gallium/drivers/r300/r300_surface.c | 12 ++++++------ src/gallium/drivers/r300/r300_surface.h | 6 +++--- 5 files changed, 23 insertions(+), 24 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 989fba74df..0ee3233446 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -82,8 +82,8 @@ void r300_emit_dsa_state(struct r300_context* r300, void r300_emit_fragment_shader(struct r300_context* r300, struct r300_fragment_shader* fs) { - CS_LOCALS(r300); int i; + CS_LOCALS(r300); BEGIN_CS(22); @@ -114,10 +114,10 @@ void r300_emit_fragment_shader(struct r300_context* r300, void r500_emit_fragment_shader(struct r300_context* r300, struct r500_fragment_shader* fs) { - CS_LOCALS(r300); + int i; struct r300_constant_buffer* constants = &r300->shader_constants[PIPE_SHADER_FRAGMENT]; - int i; + CS_LOCALS(r300); BEGIN_CS(9 + (fs->instruction_count * 6) + (constants->count ? 3 : 0) + (constants->count * 4)); @@ -156,9 +156,9 @@ void r500_emit_fragment_shader(struct r300_context* r300, void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb) { - CS_LOCALS(r300); - struct r300_texture* tex; int i; + struct r300_texture* tex; + CS_LOCALS(r300); BEGIN_CS((6 * fb->nr_cbufs) + (fb->zsbuf ? 6 : 0) + 4); for (i = 0; i < fb->nr_cbufs; i++) { @@ -217,9 +217,9 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) void r300_emit_rs_block_state(struct r300_context* r300, struct r300_rs_block* rs) { + int i; struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); - int i; BEGIN_CS(21); if (r300screen->caps->is_r500) { @@ -293,8 +293,8 @@ void r300_emit_texture(struct r300_context* r300, void r300_emit_vertex_format_state(struct r300_context* r300) { - CS_LOCALS(r300); int i; + CS_LOCALS(r300); BEGIN_CS(26); OUT_CS_REG(R300_VAP_VTX_SIZE, r300->vertex_info.vinfo.size); @@ -328,9 +328,9 @@ void r300_emit_vertex_format_state(struct r300_context* r300) void r300_emit_vertex_shader(struct r300_context* r300, struct r300_vertex_shader* vs) { - CS_LOCALS(r300); - struct r300_screen* r300screen = r300_screen(r300->context.screen); int i; + struct r300_screen* r300screen = r300_screen(r300->context.screen); + CS_LOCALS(r300); if (!r300screen->caps->has_tcl) { debug_printf("r300: Implementation error: emit_vertex_shader called," @@ -368,8 +368,6 @@ void r300_emit_vertex_shader(struct r300_context* r300, void r300_emit_viewport_state(struct r300_context* r300, struct r300_viewport_state* viewport) { - /* XXX has_tcl */ - return; CS_LOCALS(r300); BEGIN_CS(7); diff --git a/src/gallium/drivers/r300/r300_query.c b/src/gallium/drivers/r300/r300_query.c index 5f5f4c4dbd..8fc61c2dec 100644 --- a/src/gallium/drivers/r300/r300_query.c +++ b/src/gallium/drivers/r300/r300_query.c @@ -46,12 +46,12 @@ static void r300_destroy_query(struct pipe_context* pipe, static void r300_begin_query(struct pipe_context* pipe, struct pipe_query* query) { + uint32_t* map; struct r300_context* r300 = r300_context(pipe); struct r300_query* q = (struct r300_query*)query; CS_LOCALS(r300); - uint32_t* map = pipe_buffer_map(pipe->screen, q->buf, - PIPE_BUFFER_USAGE_CPU_WRITE); + map = pipe_buffer_map(pipe->screen, q->buf, PIPE_BUFFER_USAGE_CPU_WRITE); *map = ~0; pipe_buffer_unmap(pipe->screen, q->buf); @@ -79,6 +79,7 @@ static boolean r300_get_query_result(struct pipe_context* pipe, uint64_t* result) { struct r300_query* q = (struct r300_query*)query; + uint32_t* map; uint32_t temp; if (wait) { @@ -88,8 +89,7 @@ static boolean r300_get_query_result(struct pipe_context* pipe, pipe->flush(pipe, 0, NULL); } - uint32_t* map = pipe_buffer_map(pipe->screen, q->buf, - PIPE_BUFFER_USAGE_CPU_READ); + map = pipe_buffer_map(pipe->screen, q->buf, PIPE_BUFFER_USAGE_CPU_READ); temp = *map; pipe_buffer_unmap(pipe->screen, q->buf); diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index c9a20c9e8a..b1d85260cc 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -593,6 +593,7 @@ static void* r300_create_vs_state(struct pipe_context* pipe, const struct pipe_shader_state* state) { struct r300_context* context = r300_context(pipe); + tgsi_dump(state->tokens); /* XXX handing this off to Draw for now */ return draw_create_vertex_shader(context->draw, state); } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index ab0ecac35a..dc4b29eb40 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -29,10 +29,10 @@ static void r300_surface_setup(struct pipe_context* pipe, unsigned w, unsigned h) { struct r300_context* r300 = r300_context(pipe); - CS_LOCALS(r300); struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; struct r300_texture* tex = (struct r300_texture*)dest->texture; unsigned pixpitch = tex->stride / tex->tex.block.size; + CS_LOCALS(r300); r300_emit_blend_state(r300, &blend_clear_state); r300_emit_blend_color_state(r300, &blend_color_clear_state); @@ -80,13 +80,13 @@ static void r300_surface_fill(struct pipe_context* pipe, unsigned w, unsigned h, unsigned color) { + int i; + float r, g, b, a, depth; struct r300_context* r300 = r300_context(pipe); - CS_LOCALS(r300); struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; struct r300_texture* tex = (struct r300_texture*)dest->texture; - int i; - float r, g, b, a, depth; unsigned pixpitch = tex->stride / tex->tex.block.size; + CS_LOCALS(r300); a = (float)((color >> 24) & 0xff) / 255.0f; r = (float)((color >> 16) & 0xff) / 255.0f; @@ -201,12 +201,12 @@ static void r300_surface_copy(struct pipe_context* pipe, unsigned w, unsigned h) { struct r300_context* r300 = r300_context(pipe); - CS_LOCALS(r300); struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; struct r300_texture* srctex = (struct r300_texture*)src->texture; struct r300_texture* desttex = (struct r300_texture*)dest->texture; - unsigned pixpitch = srctex->stride / srctex->tex.block.size; + CS_LOCALS(r300); + debug_printf("r300: Copying surface %p at (%d,%d) to %p at (%d, %d)," " dimensions %dx%d (pixel pitch %d)\n", src, srcx, srcy, dest, destx, desty, w, h, pixpitch); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 36090882f1..894def07aa 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -105,11 +105,11 @@ static struct r300_rs_block r300_rs_block_copy_state = { }; static struct r300_rs_block r500_rs_block_copy_state = { - .ip[0] = R500_RS_SEL_S(R500_RS_IP_PTR_K0) | - R500_RS_SEL_T(R500_RS_IP_PTR_K0) | + .ip[0] = R500_RS_SEL_S(0) | + R500_RS_SEL_T(1) | R500_RS_SEL_R(R500_RS_IP_PTR_K0) | R500_RS_SEL_Q(R500_RS_IP_PTR_K1), - .inst[0] = R500_RS_INST_COL_CN_WRITE, + .inst[0] = R500_RS_INST_TEX_CN_WRITE, .count = R300_IT_COUNT(2) | R300_IC_COUNT(0) | R300_HIRES_EN, .inst_count = R300_RS_TX_OFFSET(6), }; -- cgit v1.2.3 From b7ffe1e8763efdf042e2d5eb33ce4f3d5d365121 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 4 Apr 2009 00:34:10 -0700 Subject: Add scons build support for radeon/r300. --- SConstruct | 2 +- src/gallium/drivers/r300/SConscript | 28 ++++++++++++++++++--------- src/gallium/winsys/drm/SConscript | 5 +++++ src/gallium/winsys/drm/radeon/SConscript | 28 +++------------------------ src/gallium/winsys/drm/radeon/core/SConscript | 17 ++++++++++++++++ src/gallium/winsys/drm/radeon/dri2/SConscript | 14 ++++++++++++++ 6 files changed, 59 insertions(+), 35 deletions(-) create mode 100644 src/gallium/winsys/drm/radeon/core/SConscript create mode 100644 src/gallium/winsys/drm/radeon/dri2/SConscript (limited to 'src/gallium/drivers/r300') diff --git a/SConstruct b/SConstruct index 7e7f51516e..1e5fd71adc 100644 --- a/SConstruct +++ b/SConstruct @@ -48,7 +48,7 @@ opts.Add(ListOption('statetrackers', 'state trackers to build', default_statetra opts.Add(ListOption('drivers', 'pipe drivers to build', default_drivers, ['softpipe', 'failover', 'i915simple', 'i965simple', 'cell', 'trace', 'r300'])) opts.Add(ListOption('winsys', 'winsys drivers to build', default_winsys, - ['xlib', 'intel', 'gdi', 'amd'])) + ['xlib', 'intel', 'gdi', 'radeon'])) opts.Add(EnumOption('MSVS_VERSION', 'MS Visual C++ version', None, allowed_values=('7.1', '8.0', '9.0'))) diff --git a/src/gallium/drivers/r300/SConscript b/src/gallium/drivers/r300/SConscript index 18684c3e7f..c914bc7c40 100644 --- a/src/gallium/drivers/r300/SConscript +++ b/src/gallium/drivers/r300/SConscript @@ -3,15 +3,25 @@ Import('*') env = env.Clone() r300 = env.ConvenienceLibrary( - target = 'r300', - source = [ - 'r300_blit.c', - 'r300_clear.c', - 'r300_context.c', - 'r300_screen.c', - 'r300_state.c', - 'r300_surface.c', - ]) + target = 'r300', + source = [ + 'r300_chipset.c', + 'r300_clear.c', + 'r300_context.c', + 'r300_debug.c', + 'r300_emit.c', + 'r300_flush.c', + 'r300_query.c', + 'r300_screen.c', + 'r300_state.c', + 'r300_state_derived.c', + 'r300_state_invariant.c', + 'r300_state_shader.c', + 'r300_state_tcl.c', + 'r300_surface.c', + 'r300_swtcl_emit.c', + 'r300_texture.c', + ]) Export('r300') diff --git a/src/gallium/winsys/drm/SConscript b/src/gallium/winsys/drm/SConscript index aef5210a32..a9e9f2682a 100644 --- a/src/gallium/winsys/drm/SConscript +++ b/src/gallium/winsys/drm/SConscript @@ -52,3 +52,8 @@ if env['dri']: SConscript([ 'intel/SConscript', ]) + + if 'radeon' in env['winsys']: + SConscript([ + 'radeon/SConscript', + ]) diff --git a/src/gallium/winsys/drm/radeon/SConscript b/src/gallium/winsys/drm/radeon/SConscript index 2435211a32..8f99055b2f 100644 --- a/src/gallium/winsys/drm/radeon/SConscript +++ b/src/gallium/winsys/drm/radeon/SConscript @@ -1,29 +1,7 @@ Import('*') -if 'mesa' in env['statetrackers']: - - env = drienv.Clone() - - DRIVER_SOURCES = [ - 'radeon_buffer.c', - 'radeon_context.c', - 'radeon_screen.c', - 'radeon_winsys_softpipe.c', - ] +SConscript(['core/SConscript',]) - sources = \ - COMMON_GALLIUM_SOURCES + \ - DRIVER_SOURCES - - drivers = [ - softpipe, - r300 - ] - - # TODO: write a wrapper function http://www.scons.org/wiki/WrapperFunctions - env.SharedLibrary( - target ='radeon_dri.so', - source = sources, - LIBS = drivers + mesa + auxiliaries + env['LIBS'], - ) +if 'mesa' in env['statetrackers']: + SConscript(['dri2/SConscript']) diff --git a/src/gallium/winsys/drm/radeon/core/SConscript b/src/gallium/winsys/drm/radeon/core/SConscript new file mode 100644 index 0000000000..578174e32b --- /dev/null +++ b/src/gallium/winsys/drm/radeon/core/SConscript @@ -0,0 +1,17 @@ +Import('*') + +env = drienv.Clone() + +radeon_sources = [ + 'radeon_buffer.c', + 'radeon_drm.c', + 'radeon_r300.c', + 'radeon_winsys_softpipe.c', +] + +env.Append(CPPPATH = '#/src/gallium/drivers/r300') + +env.ConvenienceLibrary( + target ='radeonwinsys', + source = radeon_sources, +) diff --git a/src/gallium/winsys/drm/radeon/dri2/SConscript b/src/gallium/winsys/drm/radeon/dri2/SConscript new file mode 100644 index 0000000000..f2cdee97d9 --- /dev/null +++ b/src/gallium/winsys/drm/radeon/dri2/SConscript @@ -0,0 +1,14 @@ +Import('*') + +env = drienv.Clone() + +drivers = [ + softpipe, + r300 +] + +env.SharedLibrary( + target ='radeon_dri.so', + source = COMMON_GALLIUM_SOURCES, + LIBS = drivers + mesa + auxiliaries + env['LIBS'], +) -- cgit v1.2.3 From 5c50218d009a4c8276aa561bd1483742cf6aa20e Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 4 Apr 2009 02:05:45 -0700 Subject: r300-gallium: Move swtcl_emit to render to reflect its true purpose. --- src/gallium/drivers/r300/Makefile | 2 +- src/gallium/drivers/r300/SConscript | 2 +- src/gallium/drivers/r300/r300_context.c | 2 +- src/gallium/drivers/r300/r300_context.h | 2 +- src/gallium/drivers/r300/r300_render.c | 316 +++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_swtcl_emit.c | 316 ----------------------------- 6 files changed, 320 insertions(+), 320 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_render.c delete mode 100644 src/gallium/drivers/r300/r300_swtcl_emit.c (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 9330c286d2..e44f9b9dfc 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -11,6 +11,7 @@ C_SOURCES = \ r300_emit.c \ r300_flush.c \ r300_query.c \ + r300_render.c \ r300_screen.c \ r300_state.c \ r300_state_derived.c \ @@ -18,7 +19,6 @@ C_SOURCES = \ r300_state_shader.c \ r300_state_tcl.c \ r300_surface.c \ - r300_swtcl_emit.c \ r300_texture.c include ../../Makefile.template diff --git a/src/gallium/drivers/r300/SConscript b/src/gallium/drivers/r300/SConscript index c914bc7c40..182ed2d459 100644 --- a/src/gallium/drivers/r300/SConscript +++ b/src/gallium/drivers/r300/SConscript @@ -12,6 +12,7 @@ r300 = env.ConvenienceLibrary( 'r300_emit.c', 'r300_flush.c', 'r300_query.c', + 'r300_render.c', 'r300_screen.c', 'r300_state.c', 'r300_state_derived.c', @@ -19,7 +20,6 @@ r300 = env.ConvenienceLibrary( 'r300_state_shader.c', 'r300_state_tcl.c', 'r300_surface.c', - 'r300_swtcl_emit.c', 'r300_texture.c', ]) diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index b8584702aa..31efe91417 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -125,7 +125,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.draw_range_elements = r300_draw_range_elements; r300->draw = draw_create(); - draw_set_rasterize_stage(r300->draw, r300_draw_swtcl_stage(r300)); + draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300)); r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); r300->rs_block = CALLOC_STRUCT(r300_rs_block); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 0ca445c091..9d2a07a7d9 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -306,7 +306,7 @@ static struct r300_context* r300_context(struct pipe_context* context) { } /* Context initialization. */ -struct draw_stage* r300_draw_swtcl_stage(struct r300_context* r300); +struct draw_stage* r300_draw_stage(struct r300_context* r300); void r300_init_state_functions(struct r300_context* r300); void r300_init_surface_functions(struct r300_context* r300); diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c new file mode 100644 index 0000000000..57bbc7a994 --- /dev/null +++ b/src/gallium/drivers/r300/r300_render.c @@ -0,0 +1,316 @@ +/* + * Copyright 2009 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "draw/draw_pipe.h" +#include "draw/draw_vbuf.h" +#include "util/u_memory.h" + +#include "r300_cs.h" +#include "r300_context.h" +#include "r300_reg.h" +#include "r300_state_derived.h" + +/* r300_render: Vertex and index buffer primitive emission. */ + +struct r300_render { + /* Parent class */ + struct vbuf_render base; + + /* Pipe context */ + struct r300_context* r300; + + /* Vertex information */ + size_t vertex_size; + unsigned prim; + unsigned hwprim; + + /* VBO */ + struct pipe_buffer* vbo; + size_t vbo_size; + size_t vbo_offset; + void* vbo_map; + size_t vbo_alloc_size; + size_t vbo_max_used; +}; + +static INLINE struct r300_render* +r300_render(struct vbuf_render* render) +{ + return (struct r300_render*)render; +} + +static const struct vertex_info* +r300_render_get_vertex_info(struct vbuf_render* render) +{ + struct r300_render* r300render = r300_render(render); + struct r300_context* r300 = r300render->r300; + + r300_update_derived_state(r300); + + return &r300->vertex_info.vinfo; +} + +static boolean r300_render_allocate_vertices(struct vbuf_render* render, + ushort vertex_size, + ushort count) +{ + struct r300_render* r300render = r300_render(render); + struct r300_context* r300 = r300render->r300; + struct pipe_screen* screen = r300->context.screen; + size_t size = (size_t)vertex_size * (size_t)count; + + if (r300render->vbo) { + pipe_buffer_reference(&r300render->vbo, NULL); + } + + r300render->vbo_size = MAX2(size, r300render->vbo_alloc_size); + r300render->vbo_offset = 0; + r300render->vbo = pipe_buffer_create(screen, + 64, + PIPE_BUFFER_USAGE_VERTEX, + r300render->vbo_size); + + r300render->vertex_size = vertex_size; + + if (r300render->vbo) { + return TRUE; + } else { + return FALSE; + } +} + +static void* r300_render_map_vertices(struct vbuf_render* render) +{ + struct r300_render* r300render = r300_render(render); + struct pipe_screen* screen = r300render->r300->context.screen; + + r300render->vbo_map = pipe_buffer_map(screen, r300render->vbo, + PIPE_BUFFER_USAGE_CPU_WRITE); + + return (unsigned char*)r300render->vbo_map + r300render->vbo_offset; +} + +static void r300_render_unmap_vertices(struct vbuf_render* render, + ushort min, + ushort max) +{ + struct r300_render* r300render = r300_render(render); + struct pipe_screen* screen = r300render->r300->context.screen; + + r300render->vbo_max_used = MAX2(r300render->vbo_max_used, + r300render->vertex_size * (max + 1)); + + pipe_buffer_unmap(screen, r300render->vbo); +} + +static void r300_render_release_vertices(struct vbuf_render* render) +{ + struct r300_render* r300render = r300_render(render); + + pipe_buffer_reference(&r300render->vbo, NULL); +} + +static boolean r300_render_set_primitive(struct vbuf_render* render, + unsigned prim) +{ + struct r300_render* r300render = r300_render(render); + r300render->prim = prim; + + switch (prim) { + case PIPE_PRIM_POINTS: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_POINTS; + break; + case PIPE_PRIM_LINES: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_LINES; + break; + case PIPE_PRIM_LINE_LOOP: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_LINE_LOOP; + break; + case PIPE_PRIM_LINE_STRIP: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_LINE_STRIP; + break; + case PIPE_PRIM_TRIANGLES: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_TRIANGLES; + break; + case PIPE_PRIM_TRIANGLE_STRIP: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; + break; + case PIPE_PRIM_TRIANGLE_FAN: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; + break; + case PIPE_PRIM_QUADS: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_QUADS; + break; + case PIPE_PRIM_QUAD_STRIP: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; + break; + case PIPE_PRIM_POLYGON: + r300render->hwprim = R300_VAP_VF_CNTL__PRIM_POLYGON; + break; + default: + return FALSE; + break; + } + + return TRUE; +} + +static void prepare_render(struct r300_render* render, unsigned count) +{ + struct r300_context* r300 = render->r300; + + CS_LOCALS(r300); + + /* Make sure that all possible state is emitted. */ + r300_emit_dirty_state(r300); + + debug_printf("r300: Preparing vertex buffer %p for render, " + "vertex size %d, vertex count %d\n", render->vbo, + r300->vertex_info.vinfo.size, count); + /* Set the pointer to our vertex buffer. The emitted values are this: + * PACKET3 [3D_LOAD_VBPNTR] + * COUNT [1] + * FORMAT [size | stride << 8] + * OFFSET [0] + * VBPNTR [relocated BO] + */ + BEGIN_CS(7); + OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3); + OUT_CS(1); + OUT_CS(r300->vertex_info.vinfo.size | + (r300->vertex_info.vinfo.size << 8)); + OUT_CS(render->vbo_offset); + OUT_CS_RELOC(render->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); + END_CS; +} + +static void r300_render_draw_arrays(struct vbuf_render* render, + unsigned start, + unsigned count) +{ + struct r300_render* r300render = r300_render(render); + struct r300_context* r300 = r300render->r300; + + CS_LOCALS(r300); + + r300render->vbo_offset = start; + + prepare_render(r300render, count); + + debug_printf("r300: Doing vbuf render, count %d\n", count); + + BEGIN_CS(2); + OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); + OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | + r300render->hwprim); + END_CS; +} + +static void r300_render_draw(struct vbuf_render* render, + const ushort* indices, + uint count) +{ + struct r300_render* r300render = r300_render(render); + struct r300_context* r300 = r300render->r300; + struct pipe_screen* screen = r300->context.screen; + struct pipe_buffer* index_buffer; + void* index_map; + + CS_LOCALS(r300); + + prepare_render(r300render, count); + + /* Send our indices into an index buffer. */ + index_buffer = pipe_buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, + count); + if (!index_buffer) { + return; + } + + index_map = pipe_buffer_map(screen, index_buffer, + PIPE_BUFFER_USAGE_CPU_WRITE); + memcpy(index_map, indices, count); + pipe_buffer_unmap(screen, index_buffer); + + debug_printf("r300: Doing indexbuf render, count %d\n", count); + + BEGIN_CS(5); + OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); + OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | + r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); + + OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); + OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2)); + OUT_CS_RELOC(index_buffer, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); + END_CS; +} + +static void r300_render_destroy(struct vbuf_render* render) +{ + FREE(render); +} + +static struct vbuf_render* r300_render_create(struct r300_context* r300) +{ + struct r300_render* r300render = CALLOC_STRUCT(r300_render); + + r300render->r300 = r300; + + /* XXX find real numbers plz */ + r300render->base.max_vertex_buffer_bytes = 128 * 1024; + r300render->base.max_indices = 16 * 1024; + + r300render->base.get_vertex_info = r300_render_get_vertex_info; + r300render->base.allocate_vertices = r300_render_allocate_vertices; + r300render->base.map_vertices = r300_render_map_vertices; + r300render->base.unmap_vertices = r300_render_unmap_vertices; + r300render->base.set_primitive = r300_render_set_primitive; + r300render->base.draw = r300_render_draw; + r300render->base.draw_arrays = r300_render_draw_arrays; + r300render->base.release_vertices = r300_render_release_vertices; + r300render->base.destroy = r300_render_destroy; + + return &r300render->base; +} + +struct draw_stage* r300_draw_stage(struct r300_context* r300) +{ + struct vbuf_render* render; + struct draw_stage* stage; + + render = r300_render_create(r300); + + if (!render) { + return NULL; + } + + stage = draw_vbuf_stage(r300->draw, render); + + if (!stage) { + render->destroy(render); + return NULL; + } + + draw_set_render(r300->draw, render); + + return stage; +} diff --git a/src/gallium/drivers/r300/r300_swtcl_emit.c b/src/gallium/drivers/r300/r300_swtcl_emit.c deleted file mode 100644 index 83c25f496b..0000000000 --- a/src/gallium/drivers/r300/r300_swtcl_emit.c +++ /dev/null @@ -1,316 +0,0 @@ -/* - * Copyright 2008 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#include "draw/draw_pipe.h" -#include "draw/draw_vbuf.h" -#include "util/u_memory.h" - -#include "r300_cs.h" -#include "r300_context.h" -#include "r300_reg.h" -#include "r300_state_derived.h" - -/* r300_swtcl_emit: Vertex and index buffer primitive emission. No HW TCL. */ - -struct r300_swtcl_render { - /* Parent class */ - struct vbuf_render base; - - /* Pipe context */ - struct r300_context* r300; - - /* Vertex information */ - size_t vertex_size; - unsigned prim; - unsigned hwprim; - - /* VBO */ - struct pipe_buffer* vbo; - size_t vbo_size; - size_t vbo_offset; - void* vbo_map; - size_t vbo_alloc_size; - size_t vbo_max_used; -}; - -static INLINE struct r300_swtcl_render* -r300_swtcl_render(struct vbuf_render* render) -{ - return (struct r300_swtcl_render*)render; -} - -static const struct vertex_info* -r300_swtcl_render_get_vertex_info(struct vbuf_render* render) -{ - struct r300_swtcl_render* r300render = r300_swtcl_render(render); - struct r300_context* r300 = r300render->r300; - - r300_update_derived_state(r300); - - return &r300->vertex_info.vinfo; -} - -static boolean r300_swtcl_render_allocate_vertices(struct vbuf_render* render, - ushort vertex_size, - ushort count) -{ - struct r300_swtcl_render* r300render = r300_swtcl_render(render); - struct r300_context* r300 = r300render->r300; - struct pipe_screen* screen = r300->context.screen; - size_t size = (size_t)vertex_size * (size_t)count; - - if (r300render->vbo) { - pipe_buffer_reference(&r300render->vbo, NULL); - } - - r300render->vbo_size = MAX2(size, r300render->vbo_alloc_size); - r300render->vbo_offset = 0; - r300render->vbo = pipe_buffer_create(screen, - 64, - PIPE_BUFFER_USAGE_VERTEX, - r300render->vbo_size); - - r300render->vertex_size = vertex_size; - - if (r300render->vbo) { - return TRUE; - } else { - return FALSE; - } -} - -static void* r300_swtcl_render_map_vertices(struct vbuf_render* render) -{ - struct r300_swtcl_render* r300render = r300_swtcl_render(render); - struct pipe_screen* screen = r300render->r300->context.screen; - - r300render->vbo_map = pipe_buffer_map(screen, r300render->vbo, - PIPE_BUFFER_USAGE_CPU_WRITE); - - return (unsigned char*)r300render->vbo_map + r300render->vbo_offset; -} - -static void r300_swtcl_render_unmap_vertices(struct vbuf_render* render, - ushort min, - ushort max) -{ - struct r300_swtcl_render* r300render = r300_swtcl_render(render); - struct pipe_screen* screen = r300render->r300->context.screen; - - r300render->vbo_max_used = MAX2(r300render->vbo_max_used, - r300render->vertex_size * (max + 1)); - - pipe_buffer_unmap(screen, r300render->vbo); -} - -static void r300_swtcl_render_release_vertices(struct vbuf_render* render) -{ - struct r300_swtcl_render* r300render = r300_swtcl_render(render); - - pipe_buffer_reference(&r300render->vbo, NULL); -} - -static boolean r300_swtcl_render_set_primitive(struct vbuf_render* render, - unsigned prim) -{ - struct r300_swtcl_render* r300render = r300_swtcl_render(render); - r300render->prim = prim; - - switch (prim) { - case PIPE_PRIM_POINTS: - r300render->hwprim = R300_VAP_VF_CNTL__PRIM_POINTS; - break; - case PIPE_PRIM_LINES: - r300render->hwprim = R300_VAP_VF_CNTL__PRIM_LINES; - break; - case PIPE_PRIM_LINE_LOOP: - r300render->hwprim = R300_VAP_VF_CNTL__PRIM_LINE_LOOP; - break; - case PIPE_PRIM_LINE_STRIP: - r300render->hwprim = R300_VAP_VF_CNTL__PRIM_LINE_STRIP; - break; - case PIPE_PRIM_TRIANGLES: - r300render->hwprim = R300_VAP_VF_CNTL__PRIM_TRIANGLES; - break; - case PIPE_PRIM_TRIANGLE_STRIP: - r300render->hwprim = R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; - break; - case PIPE_PRIM_TRIANGLE_FAN: - r300render->hwprim = R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; - break; - case PIPE_PRIM_QUADS: - r300render->hwprim = R300_VAP_VF_CNTL__PRIM_QUADS; - break; - case PIPE_PRIM_QUAD_STRIP: - r300render->hwprim = R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; - break; - case PIPE_PRIM_POLYGON: - r300render->hwprim = R300_VAP_VF_CNTL__PRIM_POLYGON; - break; - default: - return FALSE; - break; - } - - return TRUE; -} - -static void prepare_render(struct r300_swtcl_render* render, unsigned count) -{ - struct r300_context* r300 = render->r300; - - CS_LOCALS(r300); - - /* Make sure that all possible state is emitted. */ - r300_emit_dirty_state(r300); - - debug_printf("r300: Preparing vertex buffer %p for render, " - "vertex size %d, vertex count %d\n", render->vbo, - r300->vertex_info.vinfo.size, count); - /* Set the pointer to our vertex buffer. The emitted values are this: - * PACKET3 [3D_LOAD_VBPNTR] - * COUNT [1] - * FORMAT [size | stride << 8] - * OFFSET [0] - * VBPNTR [relocated BO] - */ - BEGIN_CS(7); - OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3); - OUT_CS(1); - OUT_CS(r300->vertex_info.vinfo.size | - (r300->vertex_info.vinfo.size << 8)); - OUT_CS(render->vbo_offset); - OUT_CS_RELOC(render->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); - END_CS; -} - -static void r300_swtcl_render_draw_arrays(struct vbuf_render* render, - unsigned start, - unsigned count) -{ - struct r300_swtcl_render* r300render = r300_swtcl_render(render); - struct r300_context* r300 = r300render->r300; - - CS_LOCALS(r300); - - r300render->vbo_offset = start; - - prepare_render(r300render, count); - - debug_printf("r300: Doing vbuf render, count %d\n", count); - - BEGIN_CS(2); - OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); - OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | - r300render->hwprim); - END_CS; -} - -static void r300_swtcl_render_draw(struct vbuf_render* render, - const ushort* indices, - uint count) -{ - struct r300_swtcl_render* r300render = r300_swtcl_render(render); - struct r300_context* r300 = r300render->r300; - struct pipe_screen* screen = r300->context.screen; - struct pipe_buffer* index_buffer; - void* index_map; - - CS_LOCALS(r300); - - prepare_render(r300render, count); - - /* Send our indices into an index buffer. */ - index_buffer = pipe_buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, - count); - if (!index_buffer) { - return; - } - - index_map = pipe_buffer_map(screen, index_buffer, - PIPE_BUFFER_USAGE_CPU_WRITE); - memcpy(index_map, indices, count); - pipe_buffer_unmap(screen, index_buffer); - - debug_printf("r300: Doing indexbuf render, count %d\n", count); - - BEGIN_CS(5); - OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); - OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | - r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); - - OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); - OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2)); - OUT_CS_RELOC(index_buffer, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); - END_CS; -} - -static void r300_swtcl_render_destroy(struct vbuf_render* render) -{ - FREE(render); -} - -static struct vbuf_render* r300_swtcl_render_create(struct r300_context* r300) -{ - struct r300_swtcl_render* r300render = CALLOC_STRUCT(r300_swtcl_render); - - r300render->r300 = r300; - - /* XXX find real numbers plz */ - r300render->base.max_vertex_buffer_bytes = 128 * 1024; - r300render->base.max_indices = 16 * 1024; - - r300render->base.get_vertex_info = r300_swtcl_render_get_vertex_info; - r300render->base.allocate_vertices = r300_swtcl_render_allocate_vertices; - r300render->base.map_vertices = r300_swtcl_render_map_vertices; - r300render->base.unmap_vertices = r300_swtcl_render_unmap_vertices; - r300render->base.set_primitive = r300_swtcl_render_set_primitive; - r300render->base.draw = r300_swtcl_render_draw; - r300render->base.draw_arrays = r300_swtcl_render_draw_arrays; - r300render->base.release_vertices = r300_swtcl_render_release_vertices; - r300render->base.destroy = r300_swtcl_render_destroy; - - return &r300render->base; -} - -struct draw_stage* r300_draw_swtcl_stage(struct r300_context* r300) -{ - struct vbuf_render* render; - struct draw_stage* stage; - - render = r300_swtcl_render_create(r300); - - if (!render) { - return NULL; - } - - stage = draw_vbuf_stage(r300->draw, render); - - if (!stage) { - render->destroy(render); - return NULL; - } - - draw_set_render(r300->draw, render); - - return stage; -} -- cgit v1.2.3 From 23639ddbaea67185c87c9e2332f10ba95723b2cb Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 4 Apr 2009 02:19:48 -0700 Subject: r300-gallium: Fix bad register write. --- src/gallium/drivers/r300/r300_emit.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 0ee3233446..f28404152f 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -370,15 +370,16 @@ void r300_emit_viewport_state(struct r300_context* r300, { CS_LOCALS(r300); - BEGIN_CS(7); - OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 7); + BEGIN_CS(9); + OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); OUT_CS_32F(viewport->xscale); OUT_CS_32F(viewport->xoffset); OUT_CS_32F(viewport->yscale); OUT_CS_32F(viewport->yoffset); OUT_CS_32F(viewport->zscale); OUT_CS_32F(viewport->zoffset); - OUT_CS(viewport->vte_control); + + OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control); END_CS; } -- cgit v1.2.3 From 48688e5e8f9501cad3d2862f8e057166992fddc0 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 4 Apr 2009 02:38:13 -0700 Subject: r300-gallium: Calculate vert shader inputs for HW TCL. This is definitely not perfect. --- src/gallium/drivers/r300/r300_state_derived.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 0e7a2b6726..2f34698e35 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -30,9 +30,9 @@ * The vertex_info struct describes the post-TCL format of vertices. It is * required for Draw when doing SW TCL, and also for describing the * dreaded RS block on R300 chipsets. */ -/* XXX this function should be able to handle vert shaders as well as draw */ static void r300_update_vertex_layout(struct r300_context* r300) { + struct r300_screen* r300screen = r300_screen(r300->context.screen); struct r300_vertex_format vformat; struct vertex_info vinfo; boolean pos = FALSE, psize = FALSE, fog = FALSE; @@ -74,6 +74,13 @@ static void r300_update_vertex_layout(struct r300_context* r300) } } + if (r300screen->caps->has_tcl) { + for (i = 0; i < info->num_inputs; i++) { + /* XXX should probably do real lookup with vert shader */ + tab[i] = i; + } + } + /* Do the actual vertex_info setup. * * vertex_info has four uints of hardware-specific data in it. -- cgit v1.2.3 From a4a853e593c257d3b25f8229706d11b92e1ec8c8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 4 Apr 2009 22:30:14 -0700 Subject: r300-gallium: Update clear() code. We have a huge optimization opportunity, but for now we'll just use the util. --- src/gallium/drivers/r300/r300_clear.c | 13 ++++++++----- src/gallium/drivers/r300/r300_clear.h | 15 ++++++++++++--- 2 files changed, 20 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_clear.c b/src/gallium/drivers/r300/r300_clear.c index 8506ed2942..8b9cb819ae 100644 --- a/src/gallium/drivers/r300/r300_clear.c +++ b/src/gallium/drivers/r300/r300_clear.c @@ -22,11 +22,14 @@ #include "r300_clear.h" -/* This gets its own file because Intel's is in its own file. - * I assume there's a good reason. */ +/* Clears currently bound buffers. */ void r300_clear(struct pipe_context* pipe, - struct pipe_surface* ps, - unsigned color) + unsigned buffers, + const float* rgba, + double depth, + unsigned stencil) { - pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, color); + /* XXX we can and should do one clear if both color and zs are set */ + util_clear(pipe, &r300_context(pipe)->framebuffer_state, + buffers, rgba, depth, stencil); } diff --git a/src/gallium/drivers/r300/r300_clear.h b/src/gallium/drivers/r300/r300_clear.h index e24a0690c9..cd5900565e 100644 --- a/src/gallium/drivers/r300/r300_clear.h +++ b/src/gallium/drivers/r300/r300_clear.h @@ -20,8 +20,17 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#include "pipe/p_context.h" +#ifndef R300_CLEAR_H +#define R300_CLEAR_H + +#include "util/u_clear.h" + +#include "r300_context.h" void r300_clear(struct pipe_context* pipe, - struct pipe_surface* ps, - unsigned color); + unsigned buffers, + const float* rgba, + double depth, + unsigned stencil); + +#endif /* R300_CLEAR_H */ -- cgit v1.2.3 From 7cd535b47805cc086783cc4aa857292b5986672e Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 4 Apr 2009 22:57:45 -0700 Subject: r300-gallium: vs: Expand instruction emission. --- src/gallium/drivers/r300/r300_state_tcl.c | 57 +++++++++++++++++++++++++++++-- 1 file changed, 55 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index ddf43604b9..457da5b7ef 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -54,6 +54,34 @@ static void r300_vs_declare(struct r300_vs_asm* assembler, assembler->temp_offset = assembler->color_count + assembler->tex_count; } +static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, + struct tgsi_src_register* src) +{ + switch (src->File) { + case TGSI_FILE_TEMPORARY: + return R300_PVS_SRC_REG_TEMPORARY; + break; + default: + debug_printf("r300: vs: Unimplemented src type %d\n", src->File); + break; + } + return 0; +} + +static INLINE unsigned r300_vs_dst_type(struct r300_vs_asm* assembler, + struct tgsi_dst_register* dst) +{ + switch (dst->File) { + case TGSI_FILE_OUTPUT: + return R300_PVS_DST_REG_OUT; + break; + default: + debug_printf("r300: vs: Unimplemented dst type %d\n", dst->File); + break; + } + return 0; +} + static INLINE unsigned r300_vs_src(struct r300_vs_asm* assembler, struct tgsi_src_register* src) { @@ -105,12 +133,37 @@ static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, static void r300_vs_emit_inst(struct r300_vertex_shader* vs, struct r300_vs_asm* assembler, struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst) + struct tgsi_full_dst_register* dst, + unsigned op, + unsigned count) { int i = vs->instruction_count; vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | - R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_REG_TYPE(r300_vs_dst_type(assembler, dst->DstRegister)) | R300_PVS_DST_OFFSET(dst->DstRegister.Index); + switch (count) { + case 3: + vs->instructions[i].inst3 = + R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, + &src[2].SrcRegister)) | + R300_PVS_SRC_OFFSET(src[2].SrcRegister.Index) | + R300_PVS_SRC_SWIZZLE(R300_PVS_SRC_SWIZZLE_XYZW); + /* Fall through */ + case 2: + vs->instructions[i].inst2 = + R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, + &src[1].SrcRegister)) | + R300_PVS_SRC_OFFSET(src[1].SrcRegister.Index) | + R300_PVS_SRC_SWIZZLE(R300_PVS_SRC_SWIZZLE_XYZW); + /* Fall through */ + case 1: + vs->instructions[i].inst1 = + R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, + &src[0].SrcRegister)) | + R300_PVS_SRC_OFFSET(src[0].SrcRegister.Index) | + R300_PVS_SRC_SWIZZLE(R300_PVS_SRC_SWIZZLE_XYZW); + break; + } } static void r300_vs_instruction(struct r300_vertex_shader* vs, -- cgit v1.2.3 From 316b244ff1b18b3916ebd31078ba4c920e9585c1 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 4 Apr 2009 23:44:37 -0700 Subject: r300-gallium: vs: Moar vert shaders. --- src/gallium/drivers/r300/r300_state_tcl.c | 34 ++++++++++++++++++++++++++----- src/gallium/drivers/r300/r300_state_tcl.h | 9 ++++++++ 2 files changed, 38 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index 457da5b7ef..f01db2df3a 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -58,6 +58,9 @@ static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, struct tgsi_src_register* src) { switch (src->File) { + case TGSI_FILE_INPUT: + return R300_PVS_SRC_REG_INPUT; + break; case TGSI_FILE_TEMPORARY: return R300_PVS_SRC_REG_TEMPORARY; break; @@ -72,6 +75,9 @@ static INLINE unsigned r300_vs_dst_type(struct r300_vs_asm* assembler, struct tgsi_dst_register* dst) { switch (dst->File) { + case TGSI_FILE_TEMPORARY: + return R300_PVS_DST_REG_TEMPORARY; + break; case TGSI_FILE_OUTPUT: return R300_PVS_DST_REG_OUT; break; @@ -130,6 +136,21 @@ static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, return 0; } +static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) +{ + if (reg->SrcRegister.Extended) { + return reg->SrcRegisterExtSwz.ExtSwizzleX | + (reg->SrcRegisterExtSwz.ExtSwizzleY << 3) | + (reg->SrcRegisterExtSwz.ExtSwizzleZ << 6) | + (reg->SrcRegisterExtSwz.ExtSwizzleW << 9); + } else { + return reg->SrcRegister.SwizzleX | + (reg->SrcRegister.SwizzleY << 3) | + (reg->SrcRegister.SwizzleZ << 6) | + (reg->SrcRegister.SwizzleW << 9); + } +} + static void r300_vs_emit_inst(struct r300_vertex_shader* vs, struct r300_vs_asm* assembler, struct tgsi_full_src_register* src, @@ -139,7 +160,7 @@ static void r300_vs_emit_inst(struct r300_vertex_shader* vs, { int i = vs->instruction_count; vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | - R300_PVS_DST_REG_TYPE(r300_vs_dst_type(assembler, dst->DstRegister)) | + R300_PVS_DST_REG_TYPE(r300_vs_dst_type(assembler, &dst->DstRegister)) | R300_PVS_DST_OFFSET(dst->DstRegister.Index); switch (count) { case 3: @@ -147,21 +168,21 @@ static void r300_vs_emit_inst(struct r300_vertex_shader* vs, R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, &src[2].SrcRegister)) | R300_PVS_SRC_OFFSET(src[2].SrcRegister.Index) | - R300_PVS_SRC_SWIZZLE(R300_PVS_SRC_SWIZZLE_XYZW); + R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[2])); /* Fall through */ case 2: vs->instructions[i].inst2 = R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, &src[1].SrcRegister)) | R300_PVS_SRC_OFFSET(src[1].SrcRegister.Index) | - R300_PVS_SRC_SWIZZLE(R300_PVS_SRC_SWIZZLE_XYZW); + R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[1])); /* Fall through */ case 1: vs->instructions[i].inst1 = R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, &src[0].SrcRegister)) | R300_PVS_SRC_OFFSET(src[0].SrcRegister.Index) | - R300_PVS_SRC_SWIZZLE(R300_PVS_SRC_SWIZZLE_XYZW); + R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[0])); break; } } @@ -172,8 +193,11 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, { switch (inst->Instruction.Opcode) { case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SWZ: + inst->FullSrcRegisters[1] = r300_constant_zero; r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0]); + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 2); break; case TGSI_OPCODE_END: break; diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index b947f0d1cf..ae8ff6c314 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -69,6 +69,15 @@ (R300_PVS_SRC_SELECT_FORCE_1 << 6) | \ (R300_PVS_SRC_SELECT_FORCE_1 << 9)) << 13) +static const struct tgsi_full_src_register r300_constant_zero = { + .SrcRegister.Extended = TRUE, + .SrcRegister.File = TGSI_FILE_NULL, + .SrcRegisterExtSwz.ExtSwizzleX = TGSI_EXTSWIZZLE_ZERO, + .SrcRegisterExtSwz.ExtSwizzleY = TGSI_EXTSWIZZLE_ZERO, + .SrcRegisterExtSwz.ExtSwizzleZ = TGSI_EXTSWIZZLE_ZERO, + .SrcRegisterExtSwz.ExtSwizzleW = TGSI_EXTSWIZZLE_ZERO, +}; + /* Temporary struct used to hold assembly state while putting together * fragment programs. */ struct r300_vs_asm { -- cgit v1.2.3 From 484795ff14faa794b7a150f29554a73e0113f67d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 5 Apr 2009 00:15:19 -0700 Subject: r300-gallium: Update state handlers/setters for vertex shaders. --- src/gallium/drivers/r300/r300_state.c | 65 ++++++++++++++++++++++++++--------- 1 file changed, 49 insertions(+), 16 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index b1d85260cc..4dee4ab8ce 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -333,9 +333,12 @@ static void* r300_create_rs_state(struct pipe_context* pipe, { struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); - /* XXX this is part of HW TCL */ /* XXX endian control */ - rs->vap_control_status = R300_VAP_TCL_BYPASS; + if (r300_screen(pipe->screen)->caps->has_tcl) { + rs->vap_control_status = 0; + } else { + rs->vap_control_status = R300_VAP_TCL_BYPASS; + } rs->point_size = pack_float_16_6x(state->point_size) | (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); @@ -584,31 +587,61 @@ static void r300_set_vertex_elements(struct pipe_context* pipe, const struct pipe_vertex_element* elements) { struct r300_context* r300 = r300_context(pipe); - /* XXX Draw */ + draw_flush(r300->draw); draw_set_vertex_elements(r300->draw, count, elements); } static void* r300_create_vs_state(struct pipe_context* pipe, - const struct pipe_shader_state* state) + const struct pipe_shader_state* shader) { - struct r300_context* context = r300_context(pipe); - tgsi_dump(state->tokens); - /* XXX handing this off to Draw for now */ - return draw_create_vertex_shader(context->draw, state); + struct r300_context* r300 = r300_context(pipe); + + if (r300_screen(pipe->screen)->caps->has_tcl) { + struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); + /* Copy state directly into shader. */ + vs->state = *shader; + + tgsi_scan_shader(shader->tokens, &vs->info); + + return (void*)vs; + } else { + return draw_create_vertex_shader(r300->draw, shader); + } } -static void r300_bind_vs_state(struct pipe_context* pipe, void* state) { - struct r300_context* context = r300_context(pipe); - /* XXX handing this off to Draw for now */ - draw_bind_vertex_shader(context->draw, (struct draw_vertex_shader*)state); +static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) +{ + struct r300_context* r300 = r300_context(pipe); + + if (r300_screen(pipe->screen)->caps->has_tcl) { + struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; + + if (vs == NULL) { + r300->vs = NULL; + return; + } else if (!vs->translated) { + r300_translate_vertex_shader(r300, vs); + } + + r300->vs = vs; + r300->dirty_state |= R300_NEW_VERTEX_SHADER; + } else { + draw_bind_vertex_shader(r300->draw, + (struct draw_vertex_shader*)shader); + } } -static void r300_delete_vs_state(struct pipe_context* pipe, void* state) +static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) { - struct r300_context* context = r300_context(pipe); - /* XXX handing this off to Draw for now */ - draw_delete_vertex_shader(context->draw, (struct draw_vertex_shader*)state); + struct r300_context* r300 = r300_context(pipe); + + if (r300_screen(pipe->screen)->caps->has_tcl) { + FREE(shader); + } else { + draw_delete_vertex_shader(r300->draw, + (struct draw_vertex_shader*)shader); + } } void r300_init_state_functions(struct r300_context* r300) -- cgit v1.2.3 From ce7963f338ab95b06619074bc6aaf99c96ff5f11 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 5 Apr 2009 01:00:25 -0700 Subject: r300-gallium: Properly interface with Draw for vert shaders. --- src/gallium/drivers/r300/r300_context.h | 3 +++ src/gallium/drivers/r300/r300_debug.c | 12 ++++++++++++ src/gallium/drivers/r300/r300_debug.h | 3 +++ src/gallium/drivers/r300/r300_state.c | 12 ++++++++++++ src/gallium/drivers/r300/r300_state_tcl.c | 1 + 5 files changed, 31 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 9d2a07a7d9..fec2bad546 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -236,6 +236,9 @@ struct r300_vertex_shader { struct pipe_shader_state state; struct tgsi_shader_info info; + /* Fallback shader, because Draw has issues */ + struct draw_vertex_shader* draw; + /* Has this shader been translated yet? */ boolean translated; diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index 8d44756c33..dd63136c9d 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -224,3 +224,15 @@ void r500_fs_dump(struct r500_fragment_shader* fs) } } } + +void r300_vs_dump(struct r300_vertex_shader* vs) +{ + int i; + + for (i = 0; i < vs->instruction_count; i++) { + debug_printf("inst0: 0x%x\n", vs->instructions[i].inst0); + debug_printf("inst1: 0x%x\n", vs->instructions[i].inst1); + debug_printf("inst2: 0x%x\n", vs->instructions[i].inst2); + debug_printf("inst3: 0x%x\n", vs->instructions[i].inst3); + } +} diff --git a/src/gallium/drivers/r300/r300_debug.h b/src/gallium/drivers/r300/r300_debug.h index de5d701ed9..a1f873656d 100644 --- a/src/gallium/drivers/r300/r300_debug.h +++ b/src/gallium/drivers/r300/r300_debug.h @@ -25,7 +25,10 @@ #include "r300_reg.h" #include "r300_state_shader.h" +#include "r300_state_tcl.h" void r500_fs_dump(struct r500_fragment_shader* fs); +void r300_vs_dump(struct r300_vertex_shader* vs); + #endif /* R300_DEBUG_H */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 4dee4ab8ce..5b3bb328dd 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -403,6 +403,11 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->rs = *state; + /* If using HW TCL, tell Draw to not do its magic. */ + if (r300_screen(pipe->screen)->caps->has_tcl) { + rs->rs.bypass_vs_clip_and_viewport = TRUE; + } + return (void*)rs; } @@ -604,6 +609,9 @@ static void* r300_create_vs_state(struct pipe_context* pipe, tgsi_scan_shader(shader->tokens, &vs->info); + /* Appease Draw. */ + vs->draw = draw_create_vertex_shader(r300->draw, shader); + return (void*)vs; } else { return draw_create_vertex_shader(r300->draw, shader); @@ -624,6 +632,7 @@ static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) r300_translate_vertex_shader(r300, vs); } + draw_bind_vertex_shader(r300->draw, vs->draw); r300->vs = vs; r300->dirty_state |= R300_NEW_VERTEX_SHADER; } else { @@ -637,6 +646,9 @@ static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) struct r300_context* r300 = r300_context(pipe); if (r300_screen(pipe->screen)->caps->has_tcl) { + struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; + + draw_delete_vertex_shader(r300->draw, vs->draw); FREE(shader); } else { draw_delete_vertex_shader(r300->draw, diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index f01db2df3a..d0dc4ef111 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -267,6 +267,7 @@ void r300_translate_vertex_shader(struct r300_context* r300, tgsi_dump(vs->state.tokens); /* XXX finish r300 vertex shader dumper */ + r300_vs_dump(vs); tgsi_parse_free(&parser); FREE(assembler); -- cgit v1.2.3 From 50ee103cf02b66d68a2728840c9c2f990773576b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 5 Apr 2009 01:32:00 -0700 Subject: r300-gallium: Re-translate shaders if constants change. --- src/gallium/drivers/r300/r300_state.c | 9 +++++++-- src/gallium/drivers/r300/r300_state_derived.c | 3 ++- 2 files changed, 9 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 5b3bb328dd..095df04630 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -153,8 +153,13 @@ static void /* If the number of constants have changed, invalidate the shader. */ if (r300->shader_constants[shader].user_count != i) { - r300->fs->translated = FALSE; - r300_translate_fragment_shader(r300, r300->fs); + if (shader == PIPE_SHADER_FRAGMENT && r300->fs) { + r300->fs->translated = FALSE; + r300_translate_fragment_shader(r300, r300->fs); + } else if (shader == PIPE_SHADER_VERTEX && r300->vs) { + r300->vs->translated = FALSE; + r300_translate_vertex_shader(r300, r300->vs); + } } } diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 2f34698e35..f1feafbcf9 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -305,7 +305,8 @@ static void r300_update_rs_block(struct r300_context* r300) void r300_update_derived_state(struct r300_context* r300) { - if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) { + if (r300->dirty_state & + (R300_NEW_FRAGMENT_SHADER | R300_NEW_VERTEX_SHADER)) { r300_update_vertex_layout(r300); } -- cgit v1.2.3 From 84d76607ec0e43edd7dd28d1d5b6a538fd087434 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 5 Apr 2009 01:32:55 -0700 Subject: r300-gallium: vs: Use a tab to properly set up OVM. --- src/gallium/drivers/r300/r300_state_tcl.c | 55 +++++++++---------------------- src/gallium/drivers/r300/r300_state_tcl.h | 6 ++-- 2 files changed, 17 insertions(+), 44 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index d0dc4ef111..a00abfd02f 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -27,12 +27,18 @@ static void r300_vs_declare(struct r300_vs_asm* assembler, { switch (decl->Declaration.File) { case TGSI_FILE_INPUT: + break; + case TGSI_FILE_OUTPUT: switch (decl->Semantic.SemanticName) { + case TGSI_SEMANTIC_POSITION: + assembler->tab[decl->DeclarationRange.First] = 0; + break; case TGSI_SEMANTIC_COLOR: - assembler->color_count++; + assembler->tab[decl->DeclarationRange.First] = 2; break; case TGSI_SEMANTIC_GENERIC: - assembler->tex_count++; + /* XXX multiple? */ + assembler->tab[decl->DeclarationRange.First] = 6; break; default: debug_printf("r300: vs: Bad semantic declaration %d\n", @@ -40,7 +46,6 @@ static void r300_vs_declare(struct r300_vs_asm* assembler, break; } break; - case TGSI_FILE_OUTPUT: case TGSI_FILE_CONSTANT: break; case TGSI_FILE_TEMPORARY: @@ -50,8 +55,6 @@ static void r300_vs_declare(struct r300_vs_asm* assembler, debug_printf("r300: vs: Bad file %d\n", decl->Declaration.File); break; } - - assembler->temp_offset = assembler->color_count + assembler->tex_count; } static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, @@ -88,46 +91,15 @@ static INLINE unsigned r300_vs_dst_type(struct r300_vs_asm* assembler, return 0; } -static INLINE unsigned r300_vs_src(struct r300_vs_asm* assembler, - struct tgsi_src_register* src) -{ - switch (src->File) { - case TGSI_FILE_NULL: - return 0; - case TGSI_FILE_INPUT: - /* XXX may be wrong */ - return src->Index; - break; - case TGSI_FILE_TEMPORARY: - return src->Index + assembler->temp_offset; - break; - case TGSI_FILE_IMMEDIATE: - return (src->Index + assembler->imm_offset) | (1 << 8); - break; - case TGSI_FILE_CONSTANT: - /* XXX magic */ - return src->Index | (1 << 8); - break; - default: - debug_printf("r300: vs: Unimplemented src %d\n", src->File); - break; - } - return 0; -} - static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, struct tgsi_dst_register* dst) { switch (dst->File) { - case TGSI_FILE_NULL: - /* This happens during KIL instructions. */ - return 0; + case TGSI_FILE_TEMPORARY: + return dst->Index; break; case TGSI_FILE_OUTPUT: - return 0; - break; - case TGSI_FILE_TEMPORARY: - return dst->Index + assembler->temp_offset; + return assembler->tab[dst->Index]; break; default: debug_printf("r300: vs: Unimplemented dst %d\n", dst->File); @@ -161,7 +133,7 @@ static void r300_vs_emit_inst(struct r300_vertex_shader* vs, int i = vs->instruction_count; vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | R300_PVS_DST_REG_TYPE(r300_vs_dst_type(assembler, &dst->DstRegister)) | - R300_PVS_DST_OFFSET(dst->DstRegister.Index); + R300_PVS_DST_OFFSET(r300_vs_dst(assembler, &dst->DstRegister)); switch (count) { case 3: vs->instructions[i].inst3 = @@ -265,6 +237,9 @@ void r300_translate_vertex_shader(struct r300_context* r300, "%d from user and %d from immediates\n", consts->count, consts->user_count, assembler->imm_count); + debug_printf("r300: vs: tab: %d %d %d %d\n", assembler->tab[0], + assembler->tab[1], assembler->tab[2], assembler->tab[3]); + tgsi_dump(vs->state.tokens); /* XXX finish r300 vertex shader dumper */ r300_vs_dump(vs); diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index ae8ff6c314..75fe44aec5 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -87,10 +87,6 @@ struct r300_vs_asm { unsigned color_count; /* Number of texcoords. */ unsigned tex_count; - /* Offset for temporary registers. Inputs and temporaries have no - * distinguishing markings, so inputs start at 0 and the first usable - * temporary register is after all inputs. */ - unsigned temp_offset; /* Number of requested temporary registers. */ unsigned temp_count; /* Offset for immediate constants. Neither R300 nor R500 can do four @@ -99,6 +95,8 @@ struct r300_vs_asm { unsigned imm_offset; /* Number of immediate constants. */ unsigned imm_count; + /* Offsets into vertex output memory. */ + unsigned tab[16]; }; static struct r300_vertex_shader r300_passthrough_vertex_shader = { -- cgit v1.2.3 From 36ae0766b90a1545ea3d9381974602d8e6fe8642 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 5 Apr 2009 02:05:08 -0700 Subject: r300-gallium: vp: Moar. --- src/gallium/drivers/r300/r300_state_tcl.c | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index a00abfd02f..0f9abb598f 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -61,6 +61,10 @@ static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, struct tgsi_src_register* src) { switch (src->File) { + case TGSI_FILE_NULL: + /* Probably a zero or one swizzle */ + return R300_PVS_SRC_REG_INPUT; + break; case TGSI_FILE_INPUT: return R300_PVS_SRC_REG_INPUT; break; @@ -108,6 +112,19 @@ static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, return 0; } +static uint32_t r300_vs_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_ADD: + case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SWZ: + return R300_VE_ADD; + default: + break; + } + return 0; +} + static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) { if (reg->SrcRegister.Extended) { @@ -131,9 +148,10 @@ static void r300_vs_emit_inst(struct r300_vertex_shader* vs, unsigned count) { int i = vs->instruction_count; - vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | + vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(r300_vs_op(op)) | R300_PVS_DST_REG_TYPE(r300_vs_dst_type(assembler, &dst->DstRegister)) | - R300_PVS_DST_OFFSET(r300_vs_dst(assembler, &dst->DstRegister)); + R300_PVS_DST_OFFSET(r300_vs_dst(assembler, &dst->DstRegister)) | + R300_PVS_DST_WE_XYZW; switch (count) { case 3: vs->instructions[i].inst3 = @@ -157,6 +175,7 @@ static void r300_vs_emit_inst(struct r300_vertex_shader* vs, R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[0])); break; } + vs->instruction_count++; } static void r300_vs_instruction(struct r300_vertex_shader* vs, @@ -164,6 +183,11 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, struct tgsi_full_instruction* inst) { switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_ADD: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 2); + break; case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: inst->FullSrcRegisters[1] = r300_constant_zero; -- cgit v1.2.3 From ffbf3f4952fa9e7c2971a73d9540ed977fdc6c9a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 6 Apr 2009 23:17:33 -0700 Subject: r300-gallium: Properly setup HW/SW TCL controls. This keeps non-TCL chipsets from locking up, and also fully unbreaks RADEON_NO_TCL rendering. --- src/gallium/drivers/r300/r300_state.c | 21 ++++++++++----------- src/gallium/drivers/r300/r300_surface.c | 3 ++- 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 095df04630..2a77fd1739 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -338,11 +338,17 @@ static void* r300_create_rs_state(struct pipe_context* pipe, { struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); - /* XXX endian control */ - if (r300_screen(pipe->screen)->caps->has_tcl) { - rs->vap_control_status = 0; - } else { + /* Copy rasterizer state for Draw. */ + rs->rs = *state; + + /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL. + * Else, enable HW TCL and force Draw's TCL off. */ + if (state->bypass_vs_clip_and_viewport || + !r300_screen(pipe->screen)->caps->has_tcl) { rs->vap_control_status = R300_VAP_TCL_BYPASS; + } else { + rs->rs.bypass_vs_clip_and_viewport = TRUE; + rs->vap_control_status = 0; } rs->point_size = pack_float_16_6x(state->point_size) | @@ -406,13 +412,6 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->color_control = R300_SHADE_MODEL_SMOOTH; } - rs->rs = *state; - - /* If using HW TCL, tell Draw to not do its magic. */ - if (r300_screen(pipe->screen)->caps->has_tcl) { - rs->rs.bypass_vs_clip_and_viewport = TRUE; - } - return (void*)rs; } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index dc4b29eb40..6bc39954b7 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -109,7 +109,8 @@ static void r300_surface_fill(struct pipe_context* pipe, if (caps->has_tcl) { r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader); } else { - BEGIN_CS(2); + BEGIN_CS(4); + OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS); OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) | R300_PVS_NUM_CNTLRS(5) | R300_PVS_NUM_FPUS(caps->num_vert_fpus) | -- cgit v1.2.3 From 6a1be41af93ef0ad835c75b993603c54917f934d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 6 Apr 2009 23:25:27 -0700 Subject: r300-gallium: Fix surface_copy too. --- src/gallium/drivers/r300/r300_surface.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 6bc39954b7..79bed03253 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -228,7 +228,8 @@ static void r300_surface_copy(struct pipe_context* pipe, if (caps->has_tcl) { r300_emit_vertex_shader(r300, &r300_texture_vertex_shader); } else { - BEGIN_CS(2); + BEGIN_CS(4); + OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS); OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) | R300_PVS_NUM_CNTLRS(5) | R300_PVS_NUM_FPUS(caps->num_vert_fpus) | -- cgit v1.2.3 From 00bb3deed24bd721686d6db45506fffb2a442dc9 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 6 Apr 2009 23:26:38 -0700 Subject: r300-gallium: vs: Add MUL. --- src/gallium/drivers/r300/r300_state_tcl.c | 3 +++ src/gallium/drivers/r300/r300_state_tcl.h | 1 + 2 files changed, 4 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index 0f9abb598f..24e522ce8b 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -115,6 +115,8 @@ static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, static uint32_t r300_vs_op(unsigned op) { switch (op) { + case TGSI_OPCODE_MUL: + return R300_VE_MULTIPLY; case TGSI_OPCODE_ADD: case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: @@ -184,6 +186,7 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, { switch (inst->Instruction.Opcode) { case TGSI_OPCODE_ADD: + case TGSI_OPCODE_MUL: r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index 75fe44aec5..cbad1c31fd 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -32,6 +32,7 @@ /* XXX get these to r300_reg */ #define R300_PVS_DST_OPCODE(x) ((x) << 0) +# define R300_VE_MULTIPLY 2 # define R300_VE_ADD 3 #define R300_PVS_DST_REG_TYPE(x) ((x) << 8) # define R300_PVS_DST_REG_TEMPORARY 0 -- cgit v1.2.3 From 799f43f2e01be8b3143c44fbd45485220174febd Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 6 Apr 2009 23:36:34 -0700 Subject: r300-gallium: vs: Add MAD. --- src/gallium/drivers/r300/r300_state_tcl.c | 7 +++++++ src/gallium/drivers/r300/r300_state_tcl.h | 2 ++ 2 files changed, 9 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index 24e522ce8b..44365f563c 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -121,6 +121,8 @@ static uint32_t r300_vs_op(unsigned op) case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: return R300_VE_ADD; + case TGSI_OPCODE_MAD: + return R300_PVS_DST_MACRO_INST | R300_PVS_MACRO_OP_2CLK_MADD; default: break; } @@ -198,6 +200,11 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); break; + case TGSI_OPCODE_MAD: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 3); + break; case TGSI_OPCODE_END: break; default: diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index cbad1c31fd..3d10e248e1 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -34,6 +34,8 @@ #define R300_PVS_DST_OPCODE(x) ((x) << 0) # define R300_VE_MULTIPLY 2 # define R300_VE_ADD 3 +#define R300_PVS_DST_MACRO_INST (1 << 7) +# define R300_PVS_MACRO_OP_2CLK_MADD 0 #define R300_PVS_DST_REG_TYPE(x) ((x) << 8) # define R300_PVS_DST_REG_TEMPORARY 0 # define R300_PVS_DST_REG_A0 1 -- cgit v1.2.3 From b3639d43f2085c893bb6136c8febe5bc7944869e Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 7 Apr 2009 02:04:07 -0700 Subject: r300-gallium: Add vertex shader constant emit. --- src/gallium/drivers/r300/r300_emit.c | 19 +++++++++++++++++-- src/gallium/drivers/r300/r300_state_tcl.c | 2 ++ 2 files changed, 19 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index f28404152f..a3d83376b6 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -330,6 +330,8 @@ void r300_emit_vertex_shader(struct r300_context* r300, { int i; struct r300_screen* r300screen = r300_screen(r300->context.screen); + struct r300_constant_buffer* constants = + &r300->shader_constants[PIPE_SHADER_VERTEX]; CS_LOCALS(r300); if (!r300screen->caps->has_tcl) { @@ -338,8 +340,7 @@ void r300_emit_vertex_shader(struct r300_context* r300, return; } - BEGIN_CS(13 + (vs->instruction_count * 4)); - OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); + BEGIN_CS(13 + (vs->instruction_count * 4) + (constants->count * 4)); OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) | R300_PVS_LAST_INST(vs->instruction_count - 1)); @@ -357,10 +358,24 @@ void r300_emit_vertex_shader(struct r300_context* r300, OUT_CS(vs->instructions[i].inst3); } + if (constants->count) { + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, + (r300screen->caps->is_r500 ? + R500_PVS_CONST_START : R300_PVS_CONST_START)); + OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, constants->count * 4); + for (i = 0; i < constants->count; i++) { + OUT_CS_32F(constants->constants[i][0]); + OUT_CS_32F(constants->constants[i][1]); + OUT_CS_32F(constants->constants[i][2]); + OUT_CS_32F(constants->constants[i][3]); + } + } + OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) | R300_PVS_NUM_CNTLRS(5) | R300_PVS_NUM_FPUS(r300screen->caps->num_vert_fpus) | R300_PVS_VF_MAX_VTX_NUM(12)); + OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); END_CS; } diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index 44365f563c..47d6c6dfcd 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -71,6 +71,8 @@ static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, case TGSI_FILE_TEMPORARY: return R300_PVS_SRC_REG_TEMPORARY; break; + case TGSI_FILE_CONSTANT: + return R300_PVS_SRC_REG_CONSTANT; default: debug_printf("r300: vs: Unimplemented src type %d\n", src->File); break; -- cgit v1.2.3 From 8648c2685870174cf620ef15de70ef030a8d5a20 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 8 Apr 2009 14:54:17 -0700 Subject: r300-gallium: Properly emit indexbufs. This fixes hardlocks with anything using elts. --- src/gallium/drivers/r300/r300_cs.h | 10 ++++++++++ src/gallium/drivers/r300/r300_render.c | 9 ++++----- 2 files changed, 14 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 9913678d27..5d9799dd72 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -132,4 +132,14 @@ OUT_CS(CP_PACKET3(op, count)); \ } while (0) +#define OUT_CS_INDEX_RELOC(bo, offset, count, rd, wd, flags) do { \ + debug_printf("r300: writing relocation for index buffer %p," \ + "offset %d\n", bo, offset); \ + assert(bo); \ + OUT_CS(offset); \ + OUT_CS(count); \ + cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ + cs_count -= 2; \ +} while (0) + #endif /* R300_CS_H */ diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index 57bbc7a994..b7ee8fb8a9 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -241,7 +241,7 @@ static void r300_render_draw(struct vbuf_render* render, /* Send our indices into an index buffer. */ index_buffer = pipe_buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, - count); + count * 2); if (!index_buffer) { return; } @@ -253,14 +253,13 @@ static void r300_render_draw(struct vbuf_render* render, debug_printf("r300: Doing indexbuf render, count %d\n", count); - BEGIN_CS(5); + BEGIN_CS(6); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | - r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); - + r300render->hwprim); OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2)); - OUT_CS_RELOC(index_buffer, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); + OUT_CS_INDEX_RELOC(index_buffer, 0, count, RADEON_GEM_DOMAIN_GTT, 0, 0); END_CS; } -- cgit v1.2.3 From e825609d8161bb466ebe1be9a0cc3f492e796a43 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 10 Apr 2009 16:14:12 -0700 Subject: r300-gallium: Clean up vertex format setup. --- src/gallium/drivers/r300/r300_context.h | 11 +- src/gallium/drivers/r300/r300_state_derived.c | 173 +++++++++++++++----------- 2 files changed, 108 insertions(+), 76 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index fec2bad546..4c695c1195 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -60,7 +60,7 @@ struct r300_dsa_state { }; struct r300_rs_state { - /* XXX icky as fucking hell */ + /* Draw-specific rasterizer state */ struct pipe_rasterizer_state rs; uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ @@ -225,10 +225,11 @@ struct r300_vertex_format { uint32_t vap_prog_stream_cntl[8]; /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */ uint32_t vap_prog_stream_cntl_ext[8]; - /* This is a map of VAP/SW TCL outputs into the GA/RS. - * tab[i] is the location of input i in GA/RS input memory. - * Named tab for historical reasons. */ - int tab[16]; + /* Map of vertex attributes into PVS memory for HW TCL, + * or GA memory for SW TCL. */ + int vs_tab[16]; + /* Map of rasterizer attributes from GB through RS to US. */ + int fs_tab[16]; }; struct r300_vertex_shader { diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index f1feafbcf9..a777771930 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -25,37 +25,35 @@ /* r300_state_derived: Various bits of state which are dependent upon * currently bound CSO data. */ -/* Update the vertex_info struct in our r300_context. - * - * The vertex_info struct describes the post-TCL format of vertices. It is - * required for Draw when doing SW TCL, and also for describing the - * dreaded RS block on R300 chipsets. */ -static void r300_update_vertex_layout(struct r300_context* r300) +/* Set up the vs_tab and routes. */ +static void r300_vs_tab_routes(struct r300_context* r300, + struct r300_vertex_format* vformat) { struct r300_screen* r300screen = r300_screen(r300->context.screen); - struct r300_vertex_format vformat; - struct vertex_info vinfo; + struct vertex_info* vinfo = &vformat->vinfo; + int* tab = vformat->vs_tab; boolean pos = FALSE, psize = FALSE, fog = FALSE; int i, texs = 0, cols = 0; - int tab[16]; - - struct tgsi_shader_info* info = &r300->fs->info; + struct tgsi_shader_info* info; - memset(&vinfo, 0, sizeof(vinfo)); - for (i = 0; i < 16; i++) { - tab[i] = -1; + if (r300screen->caps->has_tcl) { + /* Use vertex shader to determine required routes. */ + info = &r300->vs->info; + } else { + /* Use fragment shader to determine required routes. */ + info = &r300->fs->info; } assert(info->num_inputs <= 16); - for (i = 0; i < info->num_inputs; i++) { - switch (info->input_semantic_name[i]) { + switch (info->output_semantic_name[i]) { case TGSI_SEMANTIC_POSITION: pos = TRUE; tab[i] = 0; break; case TGSI_SEMANTIC_COLOR: - tab[i] = 2 + cols++; + tab[i] = 2 + cols; + cols++; break; case TGSI_SEMANTIC_PSIZE: psize = TRUE; @@ -63,9 +61,10 @@ static void r300_update_vertex_layout(struct r300_context* r300) break; case TGSI_SEMANTIC_FOG: fog = TRUE; - /* Fall through... */ + /* Fall through */ case TGSI_SEMANTIC_GENERIC: - tab[i] = 6 + texs++; + tab[i] = 6 + texs; + texs++; break; default: debug_printf("r300: Unknown vertex input %d\n", @@ -75,8 +74,8 @@ static void r300_update_vertex_layout(struct r300_context* r300) } if (r300screen->caps->has_tcl) { + /* Just copy vert attribs over as-is. */ for (i = 0; i < info->num_inputs; i++) { - /* XXX should probably do real lookup with vert shader */ tab[i] = i; } } @@ -89,7 +88,7 @@ static void r300_update_vertex_layout(struct r300_context* r300) * vinfo.hwfmt[2] is R300_VAP_OUTPUT_VTX_FMT_0 * vinfo.hwfmt[3] is R300_VAP_OUTPUT_VTX_FMT_1 */ - vinfo.hwfmt[0] = 0x5555; /* XXX this is classic Mesa bonghits */ + vinfo->hwfmt[0] = 0x5555; /* XXX this is classic Mesa bonghits */ if (!pos) { debug_printf("r300: Forcing vertex position attribute emit...\n"); @@ -100,80 +99,112 @@ static void r300_update_vertex_layout(struct r300_context* r300) } tab[0] = 0; - draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_POS, + draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_POS, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); } else { - draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, + draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); } - vinfo.hwfmt[1] |= R300_INPUT_CNTL_POS; - vinfo.hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; + vinfo->hwfmt[1] |= R300_INPUT_CNTL_POS; + vinfo->hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; if (psize) { - draw_emit_vertex_attr(&vinfo, EMIT_1F_PSIZE, INTERP_POS, + draw_emit_vertex_attr(vinfo, EMIT_1F_PSIZE, INTERP_POS, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_PSIZE, 0)); - vinfo.hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; + vinfo->hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; } for (i = 0; i < cols; i++) { - draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_LINEAR, + draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_LINEAR, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_COLOR, i)); - vinfo.hwfmt[1] |= R300_INPUT_CNTL_COLOR; - vinfo.hwfmt[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i); + vinfo->hwfmt[1] |= R300_INPUT_CNTL_COLOR; + vinfo->hwfmt[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i); } for (i = 0; i < texs; i++) { - draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, + draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i)); - vinfo.hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); - vinfo.hwfmt[3] |= (4 << (3 * i)); + vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); + vinfo->hwfmt[3] |= (4 << (3 * i)); } if (fog) { i++; - draw_emit_vertex_attr(&vinfo, EMIT_4F, INTERP_PERSPECTIVE, + draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0)); - vinfo.hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); - vinfo.hwfmt[3] |= (4 << (3 * i)); + vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); + vinfo->hwfmt[3] |= (4 << (3 * i)); } - draw_compute_vertex_size(&vinfo); - - if (memcmp(&r300->vertex_info, &vinfo, sizeof(struct vertex_info))) { - uint32_t temp; - debug_printf("attrib count: %d, fp input count: %d\n", - vinfo.num_attribs, info->num_inputs); - for (i = 0; i < vinfo.num_attribs; i++) { - debug_printf("attrib: offset %d, interp %d, size %d," - " tab %d\n", vinfo.attrib[i].src_index, - vinfo.attrib[i].interp_mode, vinfo.attrib[i].emit, - tab[i]); - } + draw_compute_vertex_size(vinfo); +} - for (i = 0; i < vinfo.num_attribs; i++) { - /* Make sure we have a proper destination for our attribute */ - assert(tab[i] != -1); - - temp = translate_vertex_data_type(vinfo.attrib[i].emit) | - (tab[i] << R300_DST_VEC_LOC_SHIFT); - if (i & 1) { - r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0x0000ffff; - r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= temp << 16; - } else { - r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff0000; - r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= temp; - } +/* Update the PSC tables. */ +static void r300_vertex_psc(struct r300_context* r300, + struct r300_vertex_format* vformat) +{ + struct vertex_info* vinfo = &vformat->vinfo; + int* tab = vformat->vs_tab; + uint32_t temp; + int i; + + debug_printf("r300: attrib count: %d\n", vinfo->num_attribs); + for (i = 0; i < vinfo->num_attribs; i++) { + debug_printf("r300: attrib: offset %d, interp %d, size %d," + " tab %d\n", vinfo->attrib[i].src_index, + vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit, + tab[i]); + } - r300->vertex_info.vap_prog_stream_cntl_ext[i >> 1] |= - (R300_VAP_SWIZZLE_XYZW << (i & 1 ? 16 : 0)); + for (i = 0; i < vinfo->num_attribs; i++) { + /* Make sure we have a proper destination for our attribute */ + assert(tab[i] != -1); + + /* Add the attribute to the PSC table. */ + temp = translate_vertex_data_type(vinfo->attrib[i].emit) | + (tab[i] << R300_DST_VEC_LOC_SHIFT); + if (i & 1) { + vformat->vap_prog_stream_cntl[i >> 1] &= 0x0000ffff; + vformat->vap_prog_stream_cntl[i >> 1] |= temp << 16; + + vformat->vap_prog_stream_cntl_ext[i >> 1] |= + (R300_VAP_SWIZZLE_XYZW << 16); + } else { + vformat->vap_prog_stream_cntl[i >> 1] &= 0xffff0000; + vformat->vap_prog_stream_cntl[i >> 1] |= temp << 0; + + vformat->vap_prog_stream_cntl_ext[i >> 1] |= + (R300_VAP_SWIZZLE_XYZW << 0); } - /* Set the last vector. */ - i--; - r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= (R300_LAST_VEC << - (i & 1 ? 16 : 0)); + } + + /* Set the last vector in the PSC. */ + i--; + vformat->vap_prog_stream_cntl[i >> 1] |= + (R300_LAST_VEC << (i & 1 ? 16 : 0)); +} + +/* Update the vertex format. */ +static void r300_update_vertex_format(struct r300_context* r300) +{ + struct r300_screen* r300screen = r300_screen(r300->context.screen); + struct r300_vertex_format vformat; + int i; + + memset(&vformat, 0, sizeof(struct r300_vertex_format)); + for (i = 0; i < 16; i++) { + vformat.vs_tab[i] = -1; + vformat.fs_tab[i] = -1; + } + + r300_vs_tab_routes(r300, &vformat); + + r300_vertex_psc(r300, &vformat); - memcpy(r300->vertex_info.tab, tab, sizeof(tab)); - memcpy(&r300->vertex_info, &vinfo, sizeof(struct vertex_info)); + if (memcmp(&r300->vertex_info, &vformat, + sizeof(struct r300_vertex_format))) { + memcpy(&r300->vertex_info, &vformat, + sizeof(struct r300_vertex_format)); r300->dirty_state |= R300_NEW_VERTEX_FORMAT; } } @@ -185,7 +216,7 @@ static void r300_update_rs_block(struct r300_context* r300) { struct r300_rs_block* rs = r300->rs_block; struct vertex_info* vinfo = &r300->vertex_info.vinfo; - int* tab = r300->vertex_info.tab; + int* tab = r300->vertex_info.vs_tab; int col_count = 0, fp_offset = 0, i, memory_pos, tex_count = 0; memset(rs, 0, sizeof(struct r300_rs_block)); @@ -307,7 +338,7 @@ void r300_update_derived_state(struct r300_context* r300) { if (r300->dirty_state & (R300_NEW_FRAGMENT_SHADER | R300_NEW_VERTEX_SHADER)) { - r300_update_vertex_layout(r300); + r300_update_vertex_format(r300); } if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) { -- cgit v1.2.3 From 1b5b083d5ccaeeca29375072d978d32a258f606f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 10 Apr 2009 18:15:46 -0700 Subject: r300-gallium: Finish up cleanup of vertex format state. This makes texcoords route properly, and also fixes a few asserts. --- src/gallium/drivers/r300/r300_state_derived.c | 101 ++++++++++++++++++++------ 1 file changed, 80 insertions(+), 21 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index a777771930..d628373a0c 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -46,7 +46,7 @@ static void r300_vs_tab_routes(struct r300_context* r300, assert(info->num_inputs <= 16); for (i = 0; i < info->num_inputs; i++) { - switch (info->output_semantic_name[i]) { + switch (info->input_semantic_name[i]) { case TGSI_SEMANTIC_POSITION: pos = TRUE; tab[i] = 0; @@ -98,13 +98,9 @@ static void r300_vs_tab_routes(struct r300_context* r300, tab[i] = tab[i-1]; } tab[0] = 0; - - draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_POS, - draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); - } else { - draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, - draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); } + draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_POSITION, 0)); vinfo->hwfmt[1] |= R300_INPUT_CNTL_POS; vinfo->hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; @@ -209,30 +205,92 @@ static void r300_update_vertex_format(struct r300_context* r300) } } +/* Set up the mappings from GB to US, for RS block. */ +static void r300_update_fs_tab(struct r300_context* r300) +{ + struct r300_vertex_format* vformat = &r300->vertex_info; + struct tgsi_shader_info* info = &r300->fs->info; + int i, cols = 0, texs = 0, cols_emitted = 0; + int* tab = vformat->fs_tab; + + for (i = 0; i < 16; i++) { + tab[i] = -1; + } + + assert(info->num_inputs <= 16); + for (i = 0; i < info->num_inputs; i++) { + switch (info->input_semantic_name[i]) { + case TGSI_SEMANTIC_COLOR: + tab[i] = INTERP_LINEAR; + cols++; + break; + case TGSI_SEMANTIC_POSITION: + case TGSI_SEMANTIC_PSIZE: + debug_printf("r300: Implementation error: Can't use " + "pos attribs in fragshader yet!\n"); + /* Pass through for now */ + case TGSI_SEMANTIC_FOG: + case TGSI_SEMANTIC_GENERIC: + tab[i] = INTERP_PERSPECTIVE; + break; + default: + debug_printf("r300: Unknown vertex input %d\n", + info->input_semantic_name[i]); + break; + } + } + + /* Now that we know where everything is... */ + debug_printf("r300: fp input count: %d\n", info->num_inputs); + for (i = 0; i < info->num_inputs; i++) { + switch (tab[i]) { + case INTERP_LINEAR: + debug_printf("r300: attrib: " + "stack offset %d, color, tab %d\n", + i, cols_emitted); + tab[i] = cols_emitted; + cols_emitted++; + break; + case INTERP_PERSPECTIVE: + debug_printf("r300: attrib: " + "stack offset %d, texcoord, tab %d\n", + i, cols + texs); + tab[i] = cols + texs; + texs++; + break; + case -1: + debug_printf("r300: Implementation error: Bad fp interp!\n"); + default: + break; + } + } + +} + /* Set up the RS block. This is the part of the chipset that actually does * the rasterization of vertices into fragments. This is also the part of the * chipset that locks up if any part of it is even slightly wrong. */ static void r300_update_rs_block(struct r300_context* r300) { struct r300_rs_block* rs = r300->rs_block; - struct vertex_info* vinfo = &r300->vertex_info.vinfo; - int* tab = r300->vertex_info.vs_tab; + struct tgsi_shader_info* info = &r300->fs->info; + int* tab = r300->vertex_info.fs_tab; int col_count = 0, fp_offset = 0, i, memory_pos, tex_count = 0; memset(rs, 0, sizeof(struct r300_rs_block)); if (r300_screen(r300->context.screen)->caps->is_r500) { - for (i = 0; i < vinfo->num_attribs; i++) { - assert(tab[vinfo->attrib[i].src_index] != -1); - memory_pos = tab[vinfo->attrib[i].src_index] * 4; - switch (vinfo->attrib[i].interp_mode) { - case INTERP_LINEAR: + for (i = 0; i < info->num_inputs; i++) { + assert(tab[i] != -1); + memory_pos = tab[i] * 4; + switch (info->input_semantic_name[i]) { + case TGSI_SEMANTIC_COLOR: rs->ip[col_count] |= R500_RS_COL_PTR(memory_pos) | R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA); col_count++; break; - case INTERP_PERSPECTIVE: + case TGSI_SEMANTIC_GENERIC: rs->ip[tex_count] |= R500_RS_SEL_S(memory_pos) | R500_RS_SEL_T(memory_pos + 1) | @@ -274,17 +332,17 @@ static void r300_update_rs_block(struct r300_context* r300) fp_offset++; } } else { - for (i = 0; i < vinfo->num_attribs; i++) { - memory_pos = tab[vinfo->attrib[i].src_index] * 4; - assert(tab[vinfo->attrib[i].src_index] != -1); - switch (vinfo->attrib[i].interp_mode) { - case INTERP_LINEAR: + for (i = 0; i < info->num_inputs; i++) { + assert(tab[i] != -1); + memory_pos = tab[i] * 4; + switch (info->input_semantic_name[i]) { + case TGSI_SEMANTIC_COLOR: rs->ip[col_count] |= R300_RS_COL_PTR(memory_pos) | R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA); col_count++; break; - case INTERP_PERSPECTIVE: + case TGSI_SEMANTIC_GENERIC: rs->ip[tex_count] |= R300_RS_TEX_PTR(memory_pos) | R300_RS_SEL_S(R300_RS_SEL_C0) | @@ -342,6 +400,7 @@ void r300_update_derived_state(struct r300_context* r300) } if (r300->dirty_state & R300_NEW_VERTEX_FORMAT) { + r300_update_fs_tab(r300); r300_update_rs_block(r300); } } -- cgit v1.2.3 From 9340c994b78d15253326b83cfcb15c7349c0403a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 10 Apr 2009 18:34:55 -0700 Subject: r300-gallium: Split up vertex format tallying for HW and SW TCL. This makes things draw (again) with HW TCL. Yay? --- src/gallium/drivers/r300/r300_state_derived.c | 77 +++++++++++++++++---------- 1 file changed, 50 insertions(+), 27 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index d628373a0c..ce7ab6f16a 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -45,39 +45,62 @@ static void r300_vs_tab_routes(struct r300_context* r300, } assert(info->num_inputs <= 16); - for (i = 0; i < info->num_inputs; i++) { - switch (info->input_semantic_name[i]) { - case TGSI_SEMANTIC_POSITION: - pos = TRUE; - tab[i] = 0; - break; - case TGSI_SEMANTIC_COLOR: - tab[i] = 2 + cols; - cols++; - break; - case TGSI_SEMANTIC_PSIZE: - psize = TRUE; - tab[i] = 1; - break; - case TGSI_SEMANTIC_FOG: - fog = TRUE; - /* Fall through */ - case TGSI_SEMANTIC_GENERIC: - tab[i] = 6 + texs; - texs++; - break; - default: - debug_printf("r300: Unknown vertex input %d\n", - info->input_semantic_name[i]); - break; - } - } if (r300screen->caps->has_tcl) { /* Just copy vert attribs over as-is. */ for (i = 0; i < info->num_inputs; i++) { tab[i] = i; } + for (i = 0; i < info->num_outputs; i++) { + switch (info->output_semantic_name[i]) { + case TGSI_SEMANTIC_POSITION: + pos = TRUE; + break; + case TGSI_SEMANTIC_COLOR: + cols++; + break; + case TGSI_SEMANTIC_PSIZE: + psize = TRUE; + break; + case TGSI_SEMANTIC_FOG: + fog = TRUE; + case TGSI_SEMANTIC_GENERIC: + texs++; + break; + default: + debug_printf("r300: Unknown vertex output %d\n", + info->output_semantic_name[i]); + break; + } + } + } else { + for (i = 0; i < info->num_inputs; i++) { + switch (info->input_semantic_name[i]) { + case TGSI_SEMANTIC_POSITION: + pos = TRUE; + tab[i] = 0; + break; + case TGSI_SEMANTIC_COLOR: + tab[i] = 2 + cols; + cols++; + break; + case TGSI_SEMANTIC_PSIZE: + psize = TRUE; + tab[i] = 1; + break; + case TGSI_SEMANTIC_FOG: + fog = TRUE; + /* Fall through */ + case TGSI_SEMANTIC_GENERIC: + tab[i] = 6 + texs; + texs++; + break; + default: + debug_printf("r300: Unknown vertex input %d\n", + info->input_semantic_name[i]); + break; + } + } } /* Do the actual vertex_info setup. -- cgit v1.2.3 From ada7ced1890c7d657f14a9af2caa72bad3af879f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 15 Apr 2009 13:23:25 -0700 Subject: r300-gallium: vs: Dot products. --- src/gallium/drivers/r300/r300_state_tcl.c | 33 +++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_state_tcl.h | 1 + 2 files changed, 34 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index 47d6c6dfcd..fc865a2b63 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -117,6 +117,9 @@ static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, static uint32_t r300_vs_op(unsigned op) { switch (op) { + case TGSI_OPCODE_DP3: + case TGSI_OPCODE_DP4: + return R300_VE_DOT_PRODUCT; case TGSI_OPCODE_MUL: return R300_VE_MULTIPLY; case TGSI_OPCODE_ADD: @@ -195,6 +198,36 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); break; + case TGSI_OPCODE_DP3: + /* Set alpha swizzle to zero for src0 and src1 */ + if (!inst->FullSrcRegisters[0].SrcRegister.Extended) { + inst->FullSrcRegisters[0].SrcRegister.Extended = TRUE; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX = + inst->FullSrcRegisters[0].SrcRegister.SwizzleX; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleY = + inst->FullSrcRegisters[0].SrcRegister.SwizzleY; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleZ = + inst->FullSrcRegisters[0].SrcRegister.SwizzleZ; + } + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = + TGSI_EXTSWIZZLE_ZERO; + if (!inst->FullSrcRegisters[1].SrcRegister.Extended) { + inst->FullSrcRegisters[1].SrcRegister.Extended = TRUE; + inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleX = + inst->FullSrcRegisters[1].SrcRegister.SwizzleX; + inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleY = + inst->FullSrcRegisters[1].SrcRegister.SwizzleY; + inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleZ = + inst->FullSrcRegisters[1].SrcRegister.SwizzleZ; + } + inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleW = + TGSI_EXTSWIZZLE_ZERO; + /* Fall through */ + case TGSI_OPCODE_DP4: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 2); + break; case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: inst->FullSrcRegisters[1] = r300_constant_zero; diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index 3d10e248e1..de944028ba 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -32,6 +32,7 @@ /* XXX get these to r300_reg */ #define R300_PVS_DST_OPCODE(x) ((x) << 0) +# define R300_VE_DOT_PRODUCT 1 # define R300_VE_MULTIPLY 2 # define R300_VE_ADD 3 #define R300_PVS_DST_MACRO_INST (1 << 7) -- cgit v1.2.3 From a5f68b40cb4299b54d5cb400bbbf4338673d82ec Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 15 Apr 2009 13:25:20 -0700 Subject: r300-gallium: Point size is at OVM position 15, not 1. Or so sayeth osiris, and he would know. :3 --- src/gallium/drivers/r300/r300_state_derived.c | 2 +- src/gallium/drivers/r300/r300_state_tcl.c | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index ce7ab6f16a..c4c9784a00 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -86,7 +86,7 @@ static void r300_vs_tab_routes(struct r300_context* r300, break; case TGSI_SEMANTIC_PSIZE: psize = TRUE; - tab[i] = 1; + tab[i] = 15; break; case TGSI_SEMANTIC_FOG: fog = TRUE; diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index fc865a2b63..bb96e2ad67 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -40,6 +40,9 @@ static void r300_vs_declare(struct r300_vs_asm* assembler, /* XXX multiple? */ assembler->tab[decl->DeclarationRange.First] = 6; break; + case TGSI_SEMANTIC_PSIZE: + assembler->tab[decl->DeclarationRange.First] = 15; + break; default: debug_printf("r300: vs: Bad semantic declaration %d\n", decl->Semantic.SemanticName); -- cgit v1.2.3 From a4e0a46a8d6a4f308216c085849305ad82c52f15 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 15 Apr 2009 14:12:11 -0700 Subject: r300-gallium: Don't use indexbufs for now. They aren't working, so best to turn it off. --- src/gallium/drivers/r300/r300_render.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index b7ee8fb8a9..cbd84d7c56 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -234,6 +234,8 @@ static void r300_render_draw(struct vbuf_render* render, struct pipe_screen* screen = r300->context.screen; struct pipe_buffer* index_buffer; void* index_map; + int i; + uint32_t index; CS_LOCALS(r300); @@ -252,14 +254,24 @@ static void r300_render_draw(struct vbuf_render* render, pipe_buffer_unmap(screen, index_buffer); debug_printf("r300: Doing indexbuf render, count %d\n", count); - - BEGIN_CS(6); +/* + BEGIN_CS(8); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | r300render->hwprim); OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2)); OUT_CS_INDEX_RELOC(index_buffer, 0, count, RADEON_GEM_DOMAIN_GTT, 0, 0); + END_CS; */ + + BEGIN_CS(2 + count); + OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, count); + OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | + r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); + for (i = 0; i < count; i++) { + index = indices[i]; + OUT_CS(index); + } END_CS; } -- cgit v1.2.3 From 1a84072db9fb8faf39bd155c3bf249dcc99130d8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 15 Apr 2009 15:09:43 -0700 Subject: r300-gallium: Use viewport state. --- src/gallium/drivers/r300/r300_state.c | 42 ++++++++++++++++++++++++----------- 1 file changed, 29 insertions(+), 13 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 2a77fd1739..c9507ae193 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -555,25 +555,41 @@ static void r300_set_viewport_state(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); - r300->viewport_state->xscale = state->scale[0]; - r300->viewport_state->yscale = state->scale[1]; - r300->viewport_state->zscale = state->scale[2]; - - r300->viewport_state->xoffset = state->translate[0]; - r300->viewport_state->yoffset = state->translate[1]; - r300->viewport_state->zoffset = state->translate[2]; - - r300->viewport_state->vte_control = 0; if (r300_screen(r300->context.screen)->caps->has_tcl) { /* Do the transform in HW. */ - r300->viewport_state->vte_control |= - R300_VPORT_X_SCALE_ENA | R300_VPORT_X_OFFSET_ENA | - R300_VPORT_Y_SCALE_ENA | R300_VPORT_Y_OFFSET_ENA | - R300_VPORT_Z_SCALE_ENA | R300_VPORT_Z_OFFSET_ENA; + r300->viewport_state->vte_control = R300_VTX_W0_FMT; + + if (state->scale[0] != 1.0f) { + r300->viewport_state->xscale = state->scale[0]; + r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA; + } + if (state->scale[1] != 1.0f) { + r300->viewport_state->yscale = state->scale[1]; + r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA; + } + if (state->scale[2] != 1.0f) { + r300->viewport_state->zscale = state->scale[2]; + r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA; + } + if (state->translate[0] != 0.0f) { + r300->viewport_state->xoffset = state->translate[0]; + r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA; + } + if (state->translate[1] != 0.0f) { + r300->viewport_state->yoffset = state->translate[1]; + r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA; + } + if (state->translate[2] != 0.0f) { + r300->viewport_state->zoffset = state->translate[2]; + r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA; + } } else { + r300->viewport_state->vte_control = 0; /* Have Draw do the actual transform. */ draw_set_viewport_state(r300->draw, state); } + + r300->dirty_state |= R300_NEW_VIEWPORT; } static void r300_set_vertex_buffers(struct pipe_context* pipe, -- cgit v1.2.3 From b83cf05d0d986f324fe9c93525c84eb62fed4f20 Mon Sep 17 00:00:00 2001 From: Thomas Hellstrom Date: Wed, 15 Apr 2009 17:22:40 +0200 Subject: r300-gallium: Fixup for commit 9b75627fab5bf2ea90f27ddd31b60c54895f6de6. Signed-off-by: Thomas Hellstrom --- src/gallium/drivers/r300/r300_context.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 31efe91417..6bdf544a05 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -102,6 +102,29 @@ static void r300_destroy_context(struct pipe_context* context) { FREE(r300); } +static unsigned int +r300_is_texture_referenced( struct pipe_context *pipe, + struct pipe_texture *texture, + unsigned face, unsigned level) +{ + /** + * FIXME: Optimize. + */ + + return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; +} + +static unsigned int +r300_is_buffer_referenced( struct pipe_context *pipe, + struct pipe_buffer *buf) +{ + /** + * FIXME: Optimize. + */ + + return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; +} + struct pipe_context* r300_create_context(struct pipe_screen* screen, struct r300_winsys* r300_winsys) { @@ -124,6 +147,9 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.draw_elements = r300_draw_elements; r300->context.draw_range_elements = r300_draw_range_elements; + r300->context.is_texture_referenced = r300_is_texture_referenced; + r300->context.is_buffer_referenced = r300_is_buffer_referenced; + r300->draw = draw_create(); draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300)); -- cgit v1.2.3 From b8fff1f9f17a2488aa45e875104353814bf59da2 Mon Sep 17 00:00:00 2001 From: Mathias Gottschlag Date: Tue, 21 Apr 2009 09:52:30 -0600 Subject: r300-gallium: Fix CS size mismatch This fixes some warnings which appear because the driver assumes a wrong cs size (13 vs 16 register writes in some cases). --- src/gallium/drivers/r300/r300_emit.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index a3d83376b6..417d5f6307 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -340,7 +340,11 @@ void r300_emit_vertex_shader(struct r300_context* r300, return; } - BEGIN_CS(13 + (vs->instruction_count * 4) + (constants->count * 4)); + if (constants->count) { + BEGIN_CS(16 + (vs->instruction_count * 4) + (constants->count * 4)); + } else { + BEGIN_CS(13 + (vs->instruction_count * 4) + (constants->count * 4)); + } OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) | R300_PVS_LAST_INST(vs->instruction_count - 1)); -- cgit v1.2.3 From d9f2d0752b087b0d39748b005bc4f795a3d05404 Mon Sep 17 00:00:00 2001 From: Mathias Gottschlag Date: Sat, 25 Apr 2009 01:27:23 +0200 Subject: r300-gallium: Set framebuffer pitch on every framebuffer change. Signed-off-by: Corbin Simpson --- src/gallium/drivers/r300/r300_emit.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 417d5f6307..cce5c591f1 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -160,7 +160,7 @@ void r300_emit_fb_state(struct r300_context* r300, struct r300_texture* tex; CS_LOCALS(r300); - BEGIN_CS((6 * fb->nr_cbufs) + (fb->zsbuf ? 6 : 0) + 4); + BEGIN_CS((7 * fb->nr_cbufs) + (fb->zsbuf ? 7 : 0) + 4); for (i = 0; i < fb->nr_cbufs; i++) { tex = (struct r300_texture*)fb->cbufs[i]->texture; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); @@ -168,6 +168,9 @@ void r300_emit_fb_state(struct r300_context* r300, OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), r300_translate_out_fmt(fb->cbufs[i]->format)); + unsigned pixpitch = tex->stride / tex->tex.block.size; + OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), pixpitch | + r300_translate_colorformat(tex->tex.format)); } if (fb->zsbuf) { @@ -180,6 +183,8 @@ void r300_emit_fb_state(struct r300_context* r300, } else { OUT_CS_REG(R300_ZB_FORMAT, 0x0); } + unsigned pixpitch = tex->stride / tex->tex.block.size; + OUT_CS_REG(R300_ZB_DEPTHPITCH, pixpitch); } OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, -- cgit v1.2.3 From f45a7a1d1f8a576daf02e94ecabfd42f556dd9b4 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 24 Apr 2009 16:53:38 -0700 Subject: r300-gallium: Clean up FB state emit. --- src/gallium/drivers/r300/r300_emit.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index cce5c591f1..74d63ffe41 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -152,38 +152,38 @@ void r500_emit_fragment_shader(struct r300_context* r300, END_CS; } -/* XXX add pitch, stride, clean up */ void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb) { - int i; struct r300_texture* tex; + unsigned pixpitch; + int i; CS_LOCALS(r300); - BEGIN_CS((7 * fb->nr_cbufs) + (fb->zsbuf ? 7 : 0) + 4); + BEGIN_CS((8 * fb->nr_cbufs) + (fb->zsbuf ? 8 : 0) + 4); for (i = 0; i < fb->nr_cbufs; i++) { tex = (struct r300_texture*)fb->cbufs[i]->texture; + pixpitch = tex->stride / tex->tex.block.size; + OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), - r300_translate_out_fmt(fb->cbufs[i]->format)); - unsigned pixpitch = tex->stride / tex->tex.block.size; OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), pixpitch | r300_translate_colorformat(tex->tex.format)); + + OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), + r300_translate_out_fmt(fb->cbufs[i]->format)); } if (fb->zsbuf) { tex = (struct r300_texture*)fb->zsbuf->texture; + pixpitch = (tex->stride / tex->tex.block.size); + OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1); OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - if (fb->zsbuf->format == PIPE_FORMAT_Z24S8_UNORM) { - OUT_CS_REG(R300_ZB_FORMAT, - R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL); - } else { - OUT_CS_REG(R300_ZB_FORMAT, 0x0); - } - unsigned pixpitch = tex->stride / tex->tex.block.size; + + OUT_CS_REG(R300_ZB_FORMAT, r300_translate_zsformat(tex->tex.format)); + OUT_CS_REG(R300_ZB_DEPTHPITCH, pixpitch); } -- cgit v1.2.3 From 233c6fb694ebd946ae76cb48701adf4d2086b1c1 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 25 Apr 2009 16:53:38 -0700 Subject: r300-gallium: Fix vertex shader OVM counting. Attribs must be packed: position, point size, colors, texcoords. Thanks to osiris for pointing it out. --- src/gallium/drivers/r300/r300_state_tcl.c | 38 ++++++++++++++++++++++++++++--- src/gallium/drivers/r300/r300_state_tcl.h | 12 +++++++--- 2 files changed, 44 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index bb96e2ad67..d84912de48 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -34,14 +34,20 @@ static void r300_vs_declare(struct r300_vs_asm* assembler, assembler->tab[decl->DeclarationRange.First] = 0; break; case TGSI_SEMANTIC_COLOR: - assembler->tab[decl->DeclarationRange.First] = 2; + assembler->tab[decl->DeclarationRange.First] = + (assembler->point_size ? 1 : 0) + + assembler->out_colors; break; + case TGSI_SEMANTIC_FOG: case TGSI_SEMANTIC_GENERIC: /* XXX multiple? */ - assembler->tab[decl->DeclarationRange.First] = 6; + assembler->tab[decl->DeclarationRange.First] = + (assembler->point_size ? 1 : 0) + + assembler->out_colors + + assembler->out_texcoords; break; case TGSI_SEMANTIC_PSIZE: - assembler->tab[decl->DeclarationRange.First] = 15; + assembler->tab[decl->DeclarationRange.First] = 1; break; default: debug_printf("r300: vs: Bad semantic declaration %d\n", @@ -252,6 +258,28 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, } } +static void r300_vs_init(struct r300_vertex_shader* vs, + struct r300_vs_asm* assembler) +{ + struct tgsi_shader_info* info = &vs->info; + int i; + + for (i = 0; i < info->num_outputs; i++) { + switch (info->output_semantic_name[i]) { + case TGSI_SEMANTIC_PSIZE: + assembler->point_size = TRUE; + break; + case TGSI_SEMANTIC_COLOR: + assembler->out_colors++; + break; + case TGSI_SEMANTIC_FOG: + case TGSI_SEMANTIC_GENERIC: + assembler->out_texcoords++; + break; + } + } +} + void r300_translate_vertex_shader(struct r300_context* r300, struct r300_vertex_shader* vs) { @@ -264,6 +292,10 @@ void r300_translate_vertex_shader(struct r300_context* r300, if (assembler == NULL) { return; } + + /* Init assembler. */ + r300_vs_init(vs, assembler); + /* Setup starting offset for immediates. */ assembler->imm_offset = consts->user_count; diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index de944028ba..e2e1357d43 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -99,7 +99,13 @@ struct r300_vs_asm { unsigned imm_offset; /* Number of immediate constants. */ unsigned imm_count; - /* Offsets into vertex output memory. */ + /* Number of colors to write. */ + unsigned out_colors; + /* Number of texcoords to write. */ + unsigned out_texcoords; + /* Whether to emit point size. */ + boolean point_size; + /* Tab of declared outputs to OVM outputs. */ unsigned tab[16]; }; @@ -115,7 +121,7 @@ static struct r300_vertex_shader r300_passthrough_vertex_shader = { .instructions[0].inst3 = 0x0, .instructions[1].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | - R300_PVS_DST_OFFSET(2) | R300_PVS_DST_WE_XYZW, + R300_PVS_DST_OFFSET(1) | R300_PVS_DST_WE_XYZW, .instructions[1].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, .instructions[1].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, @@ -134,7 +140,7 @@ static struct r300_vertex_shader r300_texture_vertex_shader = { .instructions[0].inst3 = 0x0, .instructions[1].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | - R300_PVS_DST_OFFSET(6) | R300_PVS_DST_WE_XYZW, + R300_PVS_DST_OFFSET(1) | R300_PVS_DST_WE_XYZW, .instructions[1].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, .instructions[1].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, -- cgit v1.2.3 From 86d2144412915b0052a468806c4fba81d72a682d Mon Sep 17 00:00:00 2001 From: Mathias Gottschlag Date: Sun, 26 Apr 2009 12:04:35 +0200 Subject: r300-gallium: Add a draw_flush() to r300_flush(). This fixes some missing primitives which had been drawn right before the next glClear(). --- src/gallium/drivers/r300/r300_flush.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_flush.c b/src/gallium/drivers/r300/r300_flush.c index 20ca6905ad..89a5f2b20c 100644 --- a/src/gallium/drivers/r300/r300_flush.c +++ b/src/gallium/drivers/r300/r300_flush.c @@ -29,6 +29,8 @@ static void r300_flush(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); + draw_flush(r300->draw); + if (r300->dirty_hw) { FLUSH_CS; r300_emit_invariant_state(r300); -- cgit v1.2.3 From 904b563fd027c05a9755bc07719c55099ab5a9fd Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 26 Apr 2009 10:06:02 -0700 Subject: r300-gallium: Correctly flush Draw. Should help with a few non-TCL bugs. --- src/gallium/drivers/r300/r300_state.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index c9507ae193..184a23c9e6 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -421,6 +421,7 @@ static void r300_bind_rs_state(struct pipe_context* pipe, void* state) struct r300_context* r300 = r300_context(pipe); struct r300_rs_state* rs = (struct r300_rs_state*)state; + draw_flush(r300->draw); draw_set_rasterizer_state(r300->draw, &rs->rs); r300->rs_state = rs; @@ -528,7 +529,6 @@ static void r300_set_scissor_state(struct pipe_context* pipe, const struct pipe_scissor_state* state) { struct r300_context* r300 = r300_context(pipe); - draw_flush(r300->draw); if (r300_screen(r300->context.screen)->caps->is_r500) { r300->scissor_state->scissor_top_left = @@ -555,6 +555,8 @@ static void r300_set_viewport_state(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); + draw_flush(r300->draw); + if (r300_screen(r300->context.screen)->caps->has_tcl) { /* Do the transform in HW. */ r300->viewport_state->vte_control = R300_VTX_W0_FMT; @@ -642,6 +644,8 @@ static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) { struct r300_context* r300 = r300_context(pipe); + draw_flush(r300->draw); + if (r300_screen(pipe->screen)->caps->has_tcl) { struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; -- cgit v1.2.3 From a609f78cf688c97eda8cde3d876397e042fdb60d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 1 May 2009 04:47:50 -0700 Subject: r300-gallium: Don't bother with conditional double define. We'll just forever leave it in r300_winsys.h since it's needed for whichever winsys is hosting the pipe. --- src/gallium/drivers/r300/r300_context.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 4c695c1195..6f62998b35 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -314,11 +314,4 @@ struct draw_stage* r300_draw_stage(struct r300_context* r300); void r300_init_state_functions(struct r300_context* r300); void r300_init_surface_functions(struct r300_context* r300); -/* Fun with includes: r300_winsys also declares this prototype. - * We'll just step out in that case... */ -#ifndef R300_WINSYS_H -struct pipe_context* r300_create_context(struct pipe_screen* screen, - struct r300_winsys* r300_winsys); -#endif - #endif /* R300_CONTEXT_H */ -- cgit v1.2.3 From d7f4ac9f34a72efe53a1a140557f1822afbadf16 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 1 May 2009 05:03:56 -0700 Subject: r300-gallium, radeon-winsys: Reorganize r300_winsys header, break ABI. Make things more consistent, prepare for more function hooks. --- src/gallium/drivers/r300/r300_cs.h | 18 ++++---- src/gallium/drivers/r300/r300_winsys.h | 46 ++++++++++---------- src/gallium/winsys/drm/radeon/core/radeon_r300.c | 53 +++++++++++++++++------- 3 files changed, 70 insertions(+), 47 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 5d9799dd72..82a3942248 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -49,27 +49,27 @@ #define CS_LOCALS(context) \ struct r300_winsys* cs_winsys = context->winsys; \ - struct radeon_cs* cs = cs_winsys->cs; \ int cs_count = 0; #define CHECK_CS(size) \ - cs_winsys->check_cs(cs, (size)) + cs_winsys->check_cs(cs_winsys, (size)) #define BEGIN_CS(size) do { \ CHECK_CS(size); \ debug_printf("r300: BEGIN_CS, count %d, in %s (%s:%d)\n", \ size, __FUNCTION__, __FILE__, __LINE__); \ - cs_winsys->begin_cs(cs, (size), __FILE__, __FUNCTION__, __LINE__); \ + cs_winsys->begin_cs(cs_winsys, (size), \ + __FILE__, __FUNCTION__, __LINE__); \ cs_count = size; \ } while (0) #define OUT_CS(value) do { \ - cs_winsys->write_cs_dword(cs, (value)); \ + cs_winsys->write_cs_dword(cs_winsys, (value)); \ cs_count--; \ } while (0) #define OUT_CS_32F(value) do { \ - cs_winsys->write_cs_dword(cs, fui(value)); \ + cs_winsys->write_cs_dword(cs_winsys, fui(value)); \ cs_count--; \ } while (0) @@ -97,7 +97,7 @@ bo, offset); \ assert(bo); \ OUT_CS(offset); \ - cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ + cs_winsys->write_cs_reloc(cs_winsys, bo, rd, wd, flags); \ cs_count -= 2; \ } while (0) @@ -106,13 +106,13 @@ __LINE__); \ if (cs_count != 0) \ debug_printf("r300: Warning: cs_count off by %d\n", cs_count); \ - cs_winsys->end_cs(cs, __FILE__, __FUNCTION__, __LINE__); \ + cs_winsys->end_cs(cs_winsys, __FILE__, __FUNCTION__, __LINE__); \ } while (0) #define FLUSH_CS do { \ debug_printf("r300: FLUSH_CS in %s (%s:%d)\n\n", __FUNCTION__, __FILE__, \ __LINE__); \ - cs_winsys->flush_cs(cs); \ + cs_winsys->flush_cs(cs_winsys); \ } while (0) #define RADEON_ONE_REG_WR (1 << 15) @@ -138,7 +138,7 @@ assert(bo); \ OUT_CS(offset); \ OUT_CS(count); \ - cs_winsys->write_cs_reloc(cs, bo, rd, wd, flags); \ + cs_winsys->write_cs_reloc(cs_winsys, bo, rd, wd, flags); \ cs_count -= 2; \ } while (0) diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index baa95282c3..393ba07012 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -35,8 +35,6 @@ extern "C" { #include "pipe/p_state.h" #include "pipe/internal/p_winsys_screen.h" -struct radeon_cs; - struct r300_winsys { /* Parent class */ struct pipe_winsys base; @@ -44,45 +42,45 @@ struct r300_winsys { /* Opaque Radeon-specific winsys object. */ void* radeon_winsys; + /* CS object. This is very much like Intel's batchbuffer. + * Fill it full of dwords and relocs and then submit. + * Repeat as needed. */ + struct radeon_cs* cs; + /* PCI ID */ uint32_t pci_id; /* GB pipe count */ uint32_t gb_pipes; - /* CS object. This is very much like Intel's batchbuffer. - * Fill it full of dwords and relocs and then submit. - * Repeat as needed. */ - struct radeon_cs* cs; - /* Check to see if there's room for commands. */ - boolean (*check_cs)(struct radeon_cs* cs, int size); + boolean (*check_cs)(struct r300_winsys* winsys, int size); /* Start a command emit. */ - void (*begin_cs)(struct radeon_cs* cs, - int size, - const char* file, - const char* function, - int line); + void (*begin_cs)(struct r300_winsys* winsys, + int size, + const char* file, + const char* function, + int line); /* Write a dword to the command buffer. */ - void (*write_cs_dword)(struct radeon_cs* cs, uint32_t dword); + void (*write_cs_dword)(struct r300_winsys* winsys, uint32_t dword); /* Write a relocated dword to the command buffer. */ - void (*write_cs_reloc)(struct radeon_cs* cs, - struct pipe_buffer* bo, - uint32_t rd, - uint32_t wd, - uint32_t flags); + void (*write_cs_reloc)(struct r300_winsys* winsys, + struct pipe_buffer* bo, + uint32_t rd, + uint32_t wd, + uint32_t flags); /* Finish a command emit. */ - void (*end_cs)(struct radeon_cs* cs, - const char* file, - const char* function, - int line); + void (*end_cs)(struct r300_winsys* winsys, + const char* file, + const char* function, + int line); /* Flush the CS. */ - void (*flush_cs)(struct radeon_cs* cs); + void (*flush_cs)(struct r300_winsys* winsys); }; struct pipe_context* r300_create_context(struct pipe_screen* screen, diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index adbf23ab51..929e4842cc 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -22,31 +22,56 @@ #include "radeon_r300.h" -static boolean radeon_r300_check_cs(struct radeon_cs* cs, int size) +static boolean radeon_r300_check_cs(struct r300_winsys* winsys, int size) { /* XXX check size here, lazy ass! */ + /* XXX also validate buffers */ return TRUE; } -static void radeon_r300_write_cs_reloc(struct radeon_cs* cs, - struct pipe_buffer* pbuffer, - uint32_t rd, - uint32_t wd, - uint32_t flags) +static void radeon_r300_begin_cs(struct r300_winsys* winsys, + int size, + const char* file, + const char* function, + int line) { - radeon_cs_write_reloc(cs, ((struct radeon_pipe_buffer*)pbuffer)->bo, rd, wd, flags); + radeon_cs_begin(winsys->cs, size, file, function, line); } -static void radeon_r300_flush_cs(struct radeon_cs* cs) +static void radeon_r300_write_cs_dword(struct r300_winsys* winsys, + uint32_t dword) +{ + radeon_cs_write_dword(winsys->cs, dword); +} + +static void radeon_r300_write_cs_reloc(struct r300_winsys* winsys, + struct pipe_buffer* pbuffer, + uint32_t rd, + uint32_t wd, + uint32_t flags) +{ + radeon_cs_write_reloc(winsys->cs, + ((struct radeon_pipe_buffer*)pbuffer)->bo, rd, wd, flags); +} + +static void radeon_r300_end_cs(struct r300_winsys* winsys, + const char* file, + const char* function, + int line) +{ + radeon_cs_end(winsys->cs, file, function, line); +} + +static void radeon_r300_flush_cs(struct r300_winsys* winsys) { int retval = 0; - retval = radeon_cs_emit(cs); + retval = radeon_cs_emit(winsys->cs); if (retval) { debug_printf("radeon: Bad CS, dumping...\n"); - radeon_cs_print(cs, stderr); + radeon_cs_print(winsys->cs, stderr); } - radeon_cs_erase(cs); + radeon_cs_erase(winsys->cs); } /* Helper function to do the ioctls needed for setup and init. */ @@ -96,10 +121,10 @@ radeon_create_r300_winsys(int fd, struct radeon_winsys* old_winsys) winsys->cs = radeon_cs_create(csm, 1024 * 64 / 4); winsys->check_cs = radeon_r300_check_cs; - winsys->begin_cs = radeon_cs_begin; - winsys->write_cs_dword = radeon_cs_write_dword; + winsys->begin_cs = radeon_r300_begin_cs; + winsys->write_cs_dword = radeon_r300_write_cs_dword; winsys->write_cs_reloc = radeon_r300_write_cs_reloc; - winsys->end_cs = radeon_cs_end; + winsys->end_cs = radeon_r300_end_cs; winsys->flush_cs = radeon_r300_flush_cs; memcpy(winsys, old_winsys, sizeof(struct radeon_winsys)); -- cgit v1.2.3 From c11ad489e7432f3ed2fcaf5b15b8fe3538ae6d30 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 1 May 2009 05:54:53 -0700 Subject: r300-gallium, radeon-winsys: Space accounting. It is no longer optional in current libdrm, so it was time to actually start counting our BOs. --- src/gallium/drivers/r300/r300_emit.c | 10 +++- src/gallium/drivers/r300/r300_surface.c | 7 +++ src/gallium/drivers/r300/r300_winsys.h | 16 +++++ src/gallium/winsys/drm/radeon/core/radeon_buffer.c | 12 +++- src/gallium/winsys/drm/radeon/core/radeon_buffer.h | 18 +++++- src/gallium/winsys/drm/radeon/core/radeon_drm.c | 4 +- src/gallium/winsys/drm/radeon/core/radeon_r300.c | 68 ++++++++++++++++++++++ 7 files changed, 126 insertions(+), 9 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 74d63ffe41..01bac5f759 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -424,13 +424,21 @@ void r300_emit_dirty_state(struct r300_context* r300) int i; int dirty_tex = 0; - if (!(r300->dirty_state) && !(r300->dirty_hw)) { + if (!(r300->dirty_hw)) { return; } r300_update_derived_state(r300); /* XXX check size */ + struct r300_texture* fb_tex = + (struct r300_texture*)r300->framebuffer_state.cbufs[0]; + r300->winsys->add_buffer(r300->winsys, fb_tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM); + if (r300->winsys->validate(r300->winsys)) { + /* XXX */ + r300->context.flush(&r300->context, 0, NULL); + } if (r300->dirty_state & R300_NEW_BLEND) { r300_emit_blend_state(r300, r300->blend_state); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 79bed03253..4dd5b8af99 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -34,6 +34,13 @@ static void r300_surface_setup(struct pipe_context* pipe, unsigned pixpitch = tex->stride / tex->tex.block.size; CS_LOCALS(r300); + /* Make sure our target BO is okay. */ + r300->winsys->add_buffer(r300->winsys, tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM); + if (r300->winsys->validate(r300->winsys)) { + r300->context.flush(&r300->context, 0, NULL); + } + r300_emit_blend_state(r300, &blend_clear_state); r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index 393ba07012..761aedebfc 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -53,6 +53,22 @@ struct r300_winsys { /* GB pipe count */ uint32_t gb_pipes; + /* GART size. */ + uint32_t gart_size; + + /* VRAM size. */ + uint32_t vram_size; + + /* Add a pipe_buffer to the list of buffer objects to validate. */ + void (*add_buffer)(struct r300_winsys* winsys, + struct pipe_buffer* pbuffer, + uint32_t rd, + uint32_t wd); + + /* Revalidate all currently setup pipe_buffers. + * Returns TRUE if a flush is required. */ + boolean (*validate)(struct r300_winsys* winsys); + /* Check to see if there's room for commands. */ boolean (*check_cs)(struct r300_winsys* winsys, int size); diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c index 611ee68da6..6313eb219e 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c @@ -68,8 +68,8 @@ static struct pipe_buffer *radeon_buffer_create(struct pipe_winsys *ws, domain |= RADEON_GEM_DOMAIN_GTT; } - radeon_buffer->bo = radeon_bo_open(radeon_ws->bom, 0, size, alignment, - domain, 0); + radeon_buffer->bo = radeon_bo_open(radeon_ws->priv->bom, 0, size, + alignment, domain, 0); if (radeon_buffer->bo == NULL) { FREE(radeon_buffer); } @@ -169,8 +169,14 @@ struct radeon_winsys* radeon_pipe_winsys(int fd) return NULL; } + radeon_ws->priv = CALLOC_STRUCT(radeon_winsys_priv); + if (radeon_ws->priv == NULL) { + FREE(radeon_ws); + return NULL; + } + bom = radeon_bo_manager_gem_ctor(fd); - radeon_ws->bom = bom; + radeon_ws->priv->bom = bom; radeon_ws->base.flush_frontbuffer = radeon_flush_frontbuffer; diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h index 163422f296..73fa362aca 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h @@ -41,6 +41,7 @@ #include "util/u_memory.h" #include "radeon_bo.h" +#include "radeon_cs.h" #include "radeon_drm.h" @@ -49,13 +50,24 @@ struct radeon_pipe_buffer { struct radeon_bo *bo; }; +#define RADEON_MAX_BOS 24 + +struct radeon_winsys_priv { + /* Radeon BO manager. */ + struct radeon_bo_manager* bom; + + /* Radeon BO space checker. */ + struct radeon_cs_space_check sc[RADEON_MAX_BOS]; + /* Current BO count. */ + unsigned bo_count; +}; + struct radeon_winsys { /* Parent class. */ struct pipe_winsys base; - /* Radeon BO manager. - * This corresponds to void* radeon_winsys in r300_winsys. */ - struct radeon_bo_manager* bom; + /* This corresponds to void* radeon_winsys in r300_winsys. */ + struct radeon_winsys_priv* priv; }; struct radeon_winsys* radeon_pipe_winsys(int fb); diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.c b/src/gallium/winsys/drm/radeon/core/radeon_drm.c index 1f89d1b1d1..428d3f65a1 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_drm.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.c @@ -32,7 +32,7 @@ /* Create a pipe_screen. */ struct pipe_screen* radeon_create_screen(int drmFB, - struct drm_create_screen_arg *arg ) + struct drm_create_screen_arg *arg) { struct radeon_winsys* winsys = radeon_pipe_winsys(drmFB); @@ -69,7 +69,7 @@ struct pipe_buffer* radeon_buffer_from_handle(struct pipe_screen* screen, unsigned handle) { struct radeon_bo_manager* bom = - ((struct radeon_winsys*)screen->winsys)->bom; + ((struct radeon_winsys*)screen->winsys)->priv->bom; struct radeon_pipe_buffer* radeon_buffer; struct radeon_bo* bo = NULL; diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index 929e4842cc..b172107432 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -22,6 +22,54 @@ #include "radeon_r300.h" +static void radeon_r300_add_buffer(struct r300_winsys* winsys, + struct pipe_buffer* pbuffer, + uint32_t rd, + uint32_t wd) +{ + int i; + struct radeon_winsys_priv* priv = + (struct radeon_winsys_priv*)winsys->radeon_winsys; + struct radeon_cs_space_check* sc = priv->sc; + struct radeon_bo* bo = ((struct radeon_pipe_buffer*)pbuffer)->bo; + + /* Check to see if this BO is already in line for validation; + * find a slot for it otherwise. */ + for (i = 0; i < RADEON_MAX_BOS; i++) { + if (sc[i].bo == bo) { + return; + } else if (sc[i].bo == NULL) { + sc[i].bo = bo; + sc[i].read_domains = rd; + sc[i].write_domain = wd; + priv->bo_count = i + 1; + return; + } + } + + assert(FALSE && "Oh God too many BOs!"); +} + +static boolean radeon_r300_validate(struct r300_winsys* winsys) +{ + int retval; + struct radeon_winsys_priv* priv = + (struct radeon_winsys_priv*)winsys->radeon_winsys; + struct radeon_cs_space_check* sc = priv->sc; + + retval = radeon_cs_space_check(winsys->cs, sc, priv->bo_count); + + if (retval == RADEON_CS_SPACE_OP_TO_BIG) { + /* XXX we need to failover here */ + } else if (retval == RADEON_CS_SPACE_FLUSH) { + /* We must flush before more rendering can commence. */ + return TRUE; + } + + /* Things are fine, we can proceed as normal. */ + return FALSE; +} + static boolean radeon_r300_check_cs(struct r300_winsys* winsys, int size) { /* XXX check size here, lazy ass! */ @@ -77,6 +125,7 @@ static void radeon_r300_flush_cs(struct r300_winsys* winsys) /* Helper function to do the ioctls needed for setup and init. */ static void do_ioctls(struct r300_winsys* winsys, int fd) { + struct drm_radeon_gem_info info; drm_radeon_getparam_t gp; int target; int retval; @@ -102,6 +151,18 @@ static void do_ioctls(struct r300_winsys* winsys, int fd) exit(1); } winsys->pci_id = target; + + /* Finally, retrieve MM info */ + retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO, + &info, sizeof(info)); + if (retval) { + fprintf(stderr, "%s: Failed to get MM info, error number %d\n", + __FUNCTION__, retval); + exit(1); + } + winsys->gart_size = info.gart_size; + /* XXX */ + winsys->vram_size = info.vram_visible; } struct r300_winsys* @@ -119,6 +180,13 @@ radeon_create_r300_winsys(int fd, struct radeon_winsys* old_winsys) csm = radeon_cs_manager_gem_ctor(fd); winsys->cs = radeon_cs_create(csm, 1024 * 64 / 4); + radeon_cs_set_limit(winsys->cs, + RADEON_GEM_DOMAIN_GTT, winsys->gart_size); + radeon_cs_set_limit(winsys->cs, + RADEON_GEM_DOMAIN_VRAM, winsys->vram_size); + + winsys->add_buffer = radeon_r300_add_buffer; + winsys->validate = radeon_r300_validate; winsys->check_cs = radeon_r300_check_cs; winsys->begin_cs = radeon_r300_begin_cs; -- cgit v1.2.3 From 5b15cc312f16c6147e1f8f3d25c6ed34076aa3a1 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 1 May 2009 06:01:52 -0700 Subject: r300-gallium, radeon-winsys: Hide radeon_cs from r300 pipe. --- src/gallium/drivers/r300/r300_winsys.h | 5 --- src/gallium/winsys/drm/radeon/core/radeon_buffer.c | 3 +- src/gallium/winsys/drm/radeon/core/radeon_buffer.h | 6 ++++ src/gallium/winsys/drm/radeon/core/radeon_r300.c | 42 +++++++++++++++------- 4 files changed, 36 insertions(+), 20 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index 761aedebfc..a833bb0399 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -42,11 +42,6 @@ struct r300_winsys { /* Opaque Radeon-specific winsys object. */ void* radeon_winsys; - /* CS object. This is very much like Intel's batchbuffer. - * Fill it full of dwords and relocs and then submit. - * Repeat as needed. */ - struct radeon_cs* cs; - /* PCI ID */ uint32_t pci_id; diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c index 6313eb219e..a15487352b 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c @@ -175,8 +175,7 @@ struct radeon_winsys* radeon_pipe_winsys(int fd) return NULL; } - bom = radeon_bo_manager_gem_ctor(fd); - radeon_ws->priv->bom = bom; + radeon_ws->priv->bom = radeon_bo_manager_gem_ctor(fd); radeon_ws->base.flush_frontbuffer = radeon_flush_frontbuffer; diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h index 73fa362aca..ca8bbb3c11 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h @@ -60,6 +60,12 @@ struct radeon_winsys_priv { struct radeon_cs_space_check sc[RADEON_MAX_BOS]; /* Current BO count. */ unsigned bo_count; + + /* Radeon CS manager. */ + struct radeon_cs_manager* csm; + + /* Current CS. */ + struct radeon_cs* cs; }; struct radeon_winsys { diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index b172107432..ac6cca36bf 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -57,7 +57,7 @@ static boolean radeon_r300_validate(struct r300_winsys* winsys) (struct radeon_winsys_priv*)winsys->radeon_winsys; struct radeon_cs_space_check* sc = priv->sc; - retval = radeon_cs_space_check(winsys->cs, sc, priv->bo_count); + retval = radeon_cs_space_check(priv->cs, sc, priv->bo_count); if (retval == RADEON_CS_SPACE_OP_TO_BIG) { /* XXX we need to failover here */ @@ -83,13 +83,19 @@ static void radeon_r300_begin_cs(struct r300_winsys* winsys, const char* function, int line) { - radeon_cs_begin(winsys->cs, size, file, function, line); + struct radeon_winsys_priv* priv = + (struct radeon_winsys_priv*)winsys->radeon_winsys; + + radeon_cs_begin(priv->cs, size, file, function, line); } static void radeon_r300_write_cs_dword(struct r300_winsys* winsys, uint32_t dword) { - radeon_cs_write_dword(winsys->cs, dword); + struct radeon_winsys_priv* priv = + (struct radeon_winsys_priv*)winsys->radeon_winsys; + + radeon_cs_write_dword(priv->cs, dword); } static void radeon_r300_write_cs_reloc(struct r300_winsys* winsys, @@ -98,7 +104,10 @@ static void radeon_r300_write_cs_reloc(struct r300_winsys* winsys, uint32_t wd, uint32_t flags) { - radeon_cs_write_reloc(winsys->cs, + struct radeon_winsys_priv* priv = + (struct radeon_winsys_priv*)winsys->radeon_winsys; + + radeon_cs_write_reloc(priv->cs, ((struct radeon_pipe_buffer*)pbuffer)->bo, rd, wd, flags); } @@ -107,19 +116,24 @@ static void radeon_r300_end_cs(struct r300_winsys* winsys, const char* function, int line) { - radeon_cs_end(winsys->cs, file, function, line); + struct radeon_winsys_priv* priv = + (struct radeon_winsys_priv*)winsys->radeon_winsys; + + radeon_cs_end(priv->cs, file, function, line); } static void radeon_r300_flush_cs(struct r300_winsys* winsys) { + struct radeon_winsys_priv* priv = + (struct radeon_winsys_priv*)winsys->radeon_winsys; int retval = 0; - retval = radeon_cs_emit(winsys->cs); + retval = radeon_cs_emit(priv->cs); if (retval) { debug_printf("radeon: Bad CS, dumping...\n"); - radeon_cs_print(winsys->cs, stderr); + radeon_cs_print(priv->cs, stderr); } - radeon_cs_erase(winsys->cs); + radeon_cs_erase(priv->cs); } /* Helper function to do the ioctls needed for setup and init. */ @@ -169,20 +183,22 @@ struct r300_winsys* radeon_create_r300_winsys(int fd, struct radeon_winsys* old_winsys) { struct r300_winsys* winsys = CALLOC_STRUCT(r300_winsys); - struct radeon_cs_manager* csm; + struct radeon_winsys_priv* priv; if (winsys == NULL) { return NULL; } + priv = old_winsys->priv; + do_ioctls(winsys, fd); - csm = radeon_cs_manager_gem_ctor(fd); + priv->csm = radeon_cs_manager_gem_ctor(fd); - winsys->cs = radeon_cs_create(csm, 1024 * 64 / 4); - radeon_cs_set_limit(winsys->cs, + priv->cs = radeon_cs_create(priv->csm, 1024 * 64 / 4); + radeon_cs_set_limit(priv->cs, RADEON_GEM_DOMAIN_GTT, winsys->gart_size); - radeon_cs_set_limit(winsys->cs, + radeon_cs_set_limit(priv->cs, RADEON_GEM_DOMAIN_VRAM, winsys->vram_size); winsys->add_buffer = radeon_r300_add_buffer; -- cgit v1.2.3 From 4816764777485b46f360eb6f86dea243d1809221 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 8 May 2009 15:28:09 -0700 Subject: r300-gallium: Finish space accounting. Still broken... --- src/gallium/drivers/r300/r300_context.h | 7 +++- src/gallium/drivers/r300/r300_emit.c | 60 ++++++++++++++++++++++++++++++--- src/gallium/drivers/r300/r300_emit.h | 2 ++ src/gallium/drivers/r300/r300_render.c | 23 ++----------- 4 files changed, 66 insertions(+), 26 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 6f62998b35..96f1f11246 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -264,6 +264,11 @@ struct r300_context { /* Draw module. Used mostly for SW TCL. */ struct draw_context* draw; + /* Vertex buffer for rendering. */ + struct pipe_buffer* vbo; + /* Offset into the VBO. */ + size_t vbo_offset; + /* Various CSO state objects. */ /* Blend state. */ struct r300_blend_state* blend_state; @@ -289,7 +294,7 @@ struct r300_context { /* Texture states. */ struct r300_texture* textures[8]; int texture_count; - /* Vertex buffers. */ + /* Vertex buffers for Gallium. */ struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS]; int vertex_buffer_count; /* Vertex information. */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 01bac5f759..ab17af799b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -296,6 +296,30 @@ void r300_emit_texture(struct r300_context* r300, END_CS; } +void r300_emit_vertex_buffer(struct r300_context* r300) +{ + CS_LOCALS(r300); + + debug_printf("r300: Preparing vertex buffer %p for render, " + "vertex size %d\n", r300->vbo, + r300->vertex_info.vinfo.size); + /* Set the pointer to our vertex buffer. The emitted values are this: + * PACKET3 [3D_LOAD_VBPNTR] + * COUNT [1] + * FORMAT [size | stride << 8] + * OFFSET [offset into BO] + * VBPNTR [relocated BO] + */ + BEGIN_CS(7); + OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3); + OUT_CS(1); + OUT_CS(r300->vertex_info.vinfo.size | + (r300->vertex_info.vinfo.size << 8)); + OUT_CS(r300->vbo_offset); + OUT_CS_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); + END_CS; +} + void r300_emit_vertex_format_state(struct r300_context* r300) { int i; @@ -421,20 +445,41 @@ void r300_flush_textures(struct r300_context* r300) void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = r300_screen(r300->context.screen); + struct r300_texture* tex; int i; int dirty_tex = 0; - if (!(r300->dirty_hw)) { + if (!(r300->dirty_state)) { return; } r300_update_derived_state(r300); /* XXX check size */ - struct r300_texture* fb_tex = - (struct r300_texture*)r300->framebuffer_state.cbufs[0]; - r300->winsys->add_buffer(r300->winsys, fb_tex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM); + /* Color buffers... */ + for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) { + tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]; + //assert(tex && tex->buffer && "cbuf is marked, but NULL!"); + if (!tex->buffer) return; + r300->winsys->add_buffer(r300->winsys, tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM); + } + /* ...depth buffer... */ + if (r300->framebuffer_state.zsbuf) { + tex = (struct r300_texture*)r300->framebuffer_state.zsbuf; + //assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); + if (!tex->buffer) return; + r300->winsys->add_buffer(r300->winsys, tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM); + } + /* ...and vertex buffer. */ + if (r300->vbo) { + r300->winsys->add_buffer(r300->winsys, r300->vbo, + RADEON_GEM_DOMAIN_GTT, 0); + } else { + debug_printf("No VBO while emitting dirty state!\n"); + } + if (r300->winsys->validate(r300->winsys)) { /* XXX */ r300->context.flush(&r300->context, 0, NULL); @@ -519,4 +564,9 @@ void r300_emit_dirty_state(struct r300_context* r300) r300_emit_vertex_format_state(r300); r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT; } + + /* Finally, emit the VBO. */ + r300_emit_vertex_buffer(r300); + + r300->dirty_hw++; } diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 31dbc7ab85..36e14f69f7 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -62,6 +62,8 @@ void r300_emit_scissor_state(struct r300_context* r300, void r300_emit_texture(struct r300_context* r300, struct r300_texture* tex, unsigned offset); +void r300_emit_vertex_buffer(struct r300_context* r300); + void r300_emit_vertex_format_state(struct r300_context* r300); void r300_emit_vertex_shader(struct r300_context* r300, diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index cbd84d7c56..29b66cee7e 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -180,27 +180,10 @@ static void prepare_render(struct r300_render* render, unsigned count) CS_LOCALS(r300); - /* Make sure that all possible state is emitted. */ - r300_emit_dirty_state(r300); + r300->vbo = render->vbo; + r300->vbo_offset = render->vbo_offset; - debug_printf("r300: Preparing vertex buffer %p for render, " - "vertex size %d, vertex count %d\n", render->vbo, - r300->vertex_info.vinfo.size, count); - /* Set the pointer to our vertex buffer. The emitted values are this: - * PACKET3 [3D_LOAD_VBPNTR] - * COUNT [1] - * FORMAT [size | stride << 8] - * OFFSET [0] - * VBPNTR [relocated BO] - */ - BEGIN_CS(7); - OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3); - OUT_CS(1); - OUT_CS(r300->vertex_info.vinfo.size | - (r300->vertex_info.vinfo.size << 8)); - OUT_CS(render->vbo_offset); - OUT_CS_RELOC(render->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); - END_CS; + r300_emit_dirty_state(r300); } static void r300_render_draw_arrays(struct vbuf_render* render, -- cgit v1.2.3 From cd59933d9f70c6acea63013f1b773b545026bf81 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 8 May 2009 16:50:42 -0700 Subject: r300-gallium, radeon: A couple cleanups. Trying to track down goddamn bugs. :C --- src/gallium/drivers/r300/r300_context.c | 4 ---- src/gallium/drivers/r300/r300_state.c | 3 +++ src/gallium/drivers/r300/r300_texture.c | 1 + src/gallium/winsys/drm/radeon/core/radeon_r300.c | 8 +++++++- 4 files changed, 11 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 6bdf544a05..a4e89c37d1 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -34,10 +34,6 @@ static boolean r300_draw_range_elements(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); int i; - if (r300->dirty_state) { - r300_emit_dirty_state(r300); - } - for (i = 0; i < r300->vertex_buffer_count; i++) { void* buf = pipe_buffer_map(pipe->screen, r300->vertex_buffers[i].buffer, diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 184a23c9e6..0143e228c4 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -562,14 +562,17 @@ static void r300_set_viewport_state(struct pipe_context* pipe, r300->viewport_state->vte_control = R300_VTX_W0_FMT; if (state->scale[0] != 1.0f) { + assert(state->scale[0] != 0.0f); r300->viewport_state->xscale = state->scale[0]; r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA; } if (state->scale[1] != 1.0f) { + assert(state->scale[1] != 0.0f); r300->viewport_state->yscale = state->scale[1]; r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA; } if (state->scale[2] != 1.0f) { + assert(state->scale[2] != 0.0f); r300->viewport_state->zscale = state->scale[2]; r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA; } diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index fe91f4e184..6c9d3b7412 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -187,6 +187,7 @@ static struct pipe_texture* tex->stride); pipe_buffer_reference(&tex->buffer, buffer); + debug_printf("%p is the buffer\n", tex->buffer); return (struct pipe_texture*)tex; } diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index da233203d7..5dcce20cd5 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -62,6 +62,7 @@ static boolean radeon_r300_validate(struct r300_winsys* winsys) if (retval == RADEON_CS_SPACE_OP_TO_BIG) { /* We might as well HCF, since this is not going to fit in the card, * period. */ + /* XXX just drop it on the floor instead */ exit(1); } else if (retval == RADEON_CS_SPACE_FLUSH) { /* We must flush before more rendering can commence. */ @@ -128,14 +129,19 @@ static void radeon_r300_flush_cs(struct r300_winsys* winsys) { struct radeon_winsys_priv* priv = (struct radeon_winsys_priv*)winsys->radeon_winsys; - int retval = 0; + struct radeon_cs_space_check* sc = priv->sc; + int retval = 1; + /* Emit the CS. */ retval = radeon_cs_emit(priv->cs); if (retval) { debug_printf("radeon: Bad CS, dumping...\n"); radeon_cs_print(priv->cs, stderr); } radeon_cs_erase(priv->cs); + + /* Clean out BOs. */ + memset(sc, 0, sizeof(struct radeon_cs_space_check) * RADEON_MAX_BOS); } /* Helper function to do the ioctls needed for setup and init. */ -- cgit v1.2.3 From 1b26c2bbaefe3608b96d9351c0f2eac80274891c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 8 May 2009 19:40:38 -0700 Subject: r300-gallium, radeon: BO handling fixes, some useful asserts. --- src/gallium/drivers/r300/r300_emit.c | 4 ++-- src/gallium/winsys/drm/radeon/core/radeon_r300.c | 8 +++++++- 2 files changed, 9 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index ab17af799b..38b1682415 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -459,7 +459,7 @@ void r300_emit_dirty_state(struct r300_context* r300) /* Color buffers... */ for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) { tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]; - //assert(tex && tex->buffer && "cbuf is marked, but NULL!"); + assert(tex && tex->buffer && "cbuf is marked, but NULL!"); if (!tex->buffer) return; r300->winsys->add_buffer(r300->winsys, tex->buffer, 0, RADEON_GEM_DOMAIN_VRAM); @@ -467,7 +467,7 @@ void r300_emit_dirty_state(struct r300_context* r300) /* ...depth buffer... */ if (r300->framebuffer_state.zsbuf) { tex = (struct r300_texture*)r300->framebuffer_state.zsbuf; - //assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); + assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); if (!tex->buffer) return; r300->winsys->add_buffer(r300->winsys, tex->buffer, 0, RADEON_GEM_DOMAIN_VRAM); diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index 556f1d9b87..cbe1652302 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -37,6 +37,8 @@ static void radeon_r300_add_buffer(struct r300_winsys* winsys, * find a slot for it otherwise. */ for (i = 0; i < RADEON_MAX_BOS; i++) { if (sc[i].bo == bo) { + sc[i].read_domains |= rd; + sc[i].write_domain |= wd; return; } else if (sc[i].bo == NULL) { sc[i].bo = bo; @@ -52,11 +54,15 @@ static void radeon_r300_add_buffer(struct r300_winsys* winsys, static boolean radeon_r300_validate(struct r300_winsys* winsys) { - int retval; + int retval, i; struct radeon_winsys_priv* priv = (struct radeon_winsys_priv*)winsys->radeon_winsys; struct radeon_cs_space_check* sc = priv->sc; + debug_printf("Validation count: %d\n", priv->bo_count); + for (i = 0; i < priv->bo_count; i++) { + debug_printf("BO %d: %p rd: %d wd: %d\n", i, sc[i].bo, sc[i].read_domains, sc[i].write_domain); + } retval = radeon_cs_space_check(priv->cs, sc, priv->bo_count); if (retval == RADEON_CS_SPACE_OP_TO_BIG) { -- cgit v1.2.3 From ce758a21b9984cce14db4234fbe353d06a3a2d32 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 8 May 2009 22:05:18 -0700 Subject: r300-gallium: Fix bad cast. Space accounting completely works now. Boy, is my face red. :C --- src/gallium/drivers/r300/r300_emit.c | 4 ++-- src/gallium/drivers/r300/r300_texture.c | 3 --- 2 files changed, 2 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 38b1682415..c73d5a0b44 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -458,7 +458,7 @@ void r300_emit_dirty_state(struct r300_context* r300) /* XXX check size */ /* Color buffers... */ for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) { - tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]; + tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]->texture; assert(tex && tex->buffer && "cbuf is marked, but NULL!"); if (!tex->buffer) return; r300->winsys->add_buffer(r300->winsys, tex->buffer, @@ -466,7 +466,7 @@ void r300_emit_dirty_state(struct r300_context* r300) } /* ...depth buffer... */ if (r300->framebuffer_state.zsbuf) { - tex = (struct r300_texture*)r300->framebuffer_state.zsbuf; + tex = (struct r300_texture*)r300->framebuffer_state.zsbuf->texture; assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); if (!tex->buffer) return; r300->winsys->add_buffer(r300->winsys, tex->buffer, diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 6c9d3b7412..5ea9f56247 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -86,8 +86,6 @@ static struct pipe_texture* r300_texture_create(struct pipe_screen* screen, const struct pipe_texture* template) { - /* XXX struct r300_screen* r300screen = r300_screen(screen); */ - struct r300_texture* tex = CALLOC_STRUCT(r300_texture); if (!tex) { @@ -187,7 +185,6 @@ static struct pipe_texture* tex->stride); pipe_buffer_reference(&tex->buffer, buffer); - debug_printf("%p is the buffer\n", tex->buffer); return (struct pipe_texture*)tex; } -- cgit v1.2.3 From c6d2b4a495affbaf0fbc53cf54159a7b2b4f6085 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 8 May 2009 22:45:56 -0700 Subject: r300-gallium: vs: Add writemasks. --- src/gallium/drivers/r300/r300_state_tcl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index d84912de48..c52ce258c2 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -169,7 +169,7 @@ static void r300_vs_emit_inst(struct r300_vertex_shader* vs, vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(r300_vs_op(op)) | R300_PVS_DST_REG_TYPE(r300_vs_dst_type(assembler, &dst->DstRegister)) | R300_PVS_DST_OFFSET(r300_vs_dst(assembler, &dst->DstRegister)) | - R300_PVS_DST_WE_XYZW; + R300_PVS_DST_WE(dst->DstRegister.WriteMask); switch (count) { case 3: vs->instructions[i].inst3 = -- cgit v1.2.3 From e669ce01d4ee1e785671c811140e4e95e9a7548e Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 8 May 2009 22:46:12 -0700 Subject: r300-gallium: vs: Add scalar setup, RSQ. Icky icky icky icky. Icky icky, icky icky. Icky. --- src/gallium/drivers/r300/r300_state_tcl.c | 39 ++++++++++++++++++++++++++----- src/gallium/drivers/r300/r300_state_tcl.h | 2 ++ 2 files changed, 35 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index c52ce258c2..a3b9277cf7 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -135,6 +135,8 @@ static uint32_t r300_vs_op(unsigned op) case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: return R300_VE_ADD; + case TGSI_OPCODE_RSQ: + return R300_PVS_DST_MATH_INST | R300_ME_RECIP_DX; case TGSI_OPCODE_MAD: return R300_PVS_DST_MACRO_INST | R300_PVS_MACRO_OP_2CLK_MADD; default: @@ -158,12 +160,30 @@ static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) } } +/* XXX icky icky icky icky */ +static uint32_t r300_vs_scalar_swiz(struct tgsi_full_src_register* reg) +{ + if (reg->SrcRegister.Extended) { + return reg->SrcRegisterExtSwz.ExtSwizzleX | + (reg->SrcRegisterExtSwz.ExtSwizzleX << 3) | + (reg->SrcRegisterExtSwz.ExtSwizzleX << 6) | + (reg->SrcRegisterExtSwz.ExtSwizzleX << 9); + } else { + return reg->SrcRegister.SwizzleX | + (reg->SrcRegister.SwizzleX << 3) | + (reg->SrcRegister.SwizzleX << 6) | + (reg->SrcRegister.SwizzleX << 9); + } +} + +/* XXX scalar stupidity */ static void r300_vs_emit_inst(struct r300_vertex_shader* vs, struct r300_vs_asm* assembler, struct tgsi_full_src_register* src, struct tgsi_full_dst_register* dst, unsigned op, - unsigned count) + unsigned count, + boolean is_scalar) { int i = vs->instruction_count; vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(r300_vs_op(op)) | @@ -190,7 +210,9 @@ static void r300_vs_emit_inst(struct r300_vertex_shader* vs, R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, &src[0].SrcRegister)) | R300_PVS_SRC_OFFSET(src[0].SrcRegister.Index) | - R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[0])); + /* XXX the icky, it burns */ + R300_PVS_SRC_SWIZZLE(is_scalar ? r300_vs_scalar_swiz(&src[0]) + : r300_vs_swiz(&src[0])); break; } vs->instruction_count++; @@ -201,11 +223,16 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, struct tgsi_full_instruction* inst) { switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_RSQ: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 1, TRUE); + break; case TGSI_OPCODE_ADD: case TGSI_OPCODE_MUL: r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2); + 2, FALSE); break; case TGSI_OPCODE_DP3: /* Set alpha swizzle to zero for src0 and src1 */ @@ -235,19 +262,19 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, case TGSI_OPCODE_DP4: r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2); + 2, FALSE); break; case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: inst->FullSrcRegisters[1] = r300_constant_zero; r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2); + 2, FALSE); break; case TGSI_OPCODE_MAD: r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 3); + 3, FALSE); break; case TGSI_OPCODE_END: break; diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index e2e1357d43..94d8baa503 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -35,6 +35,8 @@ # define R300_VE_DOT_PRODUCT 1 # define R300_VE_MULTIPLY 2 # define R300_VE_ADD 3 +#define R300_PVS_DST_MATH_INST (1 << 6) +# define R300_ME_RECIP_DX 6 #define R300_PVS_DST_MACRO_INST (1 << 7) # define R300_PVS_MACRO_OP_2CLK_MADD 0 #define R300_PVS_DST_REG_TYPE(x) ((x) << 8) -- cgit v1.2.3 From 9b1077714889a5c331c0e208f36233767d39d875 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 8 May 2009 22:52:32 -0700 Subject: r300-gallium: vs: Add MAX. --- src/gallium/drivers/r300/r300_state_tcl.c | 7 +++++++ src/gallium/drivers/r300/r300_state_tcl.h | 1 + 2 files changed, 8 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index a3b9277cf7..b8a1dd45d5 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -135,6 +135,8 @@ static uint32_t r300_vs_op(unsigned op) case TGSI_OPCODE_MOV: case TGSI_OPCODE_SWZ: return R300_VE_ADD; + case TGSI_OPCODE_MAX: + return R300_VE_MAXIMUM; case TGSI_OPCODE_RSQ: return R300_PVS_DST_MATH_INST | R300_ME_RECIP_DX; case TGSI_OPCODE_MAD: @@ -271,6 +273,11 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2, FALSE); break; + case TGSI_OPCODE_MAX: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 2, FALSE); + break; case TGSI_OPCODE_MAD: r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index 94d8baa503..204e1d31c3 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -35,6 +35,7 @@ # define R300_VE_DOT_PRODUCT 1 # define R300_VE_MULTIPLY 2 # define R300_VE_ADD 3 +# define R300_VE_MAXIMUM 7 #define R300_PVS_DST_MATH_INST (1 << 6) # define R300_ME_RECIP_DX 6 #define R300_PVS_DST_MACRO_INST (1 << 7) -- cgit v1.2.3 From 7e347a0f49bd737f1a219fe8001c8ddb4f8c3d85 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 8 May 2009 22:54:52 -0700 Subject: r300-gallium: vs: Add SLT, clean up MAX. This should be all the opcodes for basic TCL. --- src/gallium/drivers/r300/r300_state_tcl.c | 9 ++++----- src/gallium/drivers/r300/r300_state_tcl.h | 1 + 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index b8a1dd45d5..410a756773 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -137,6 +137,8 @@ static uint32_t r300_vs_op(unsigned op) return R300_VE_ADD; case TGSI_OPCODE_MAX: return R300_VE_MAXIMUM; + case TGSI_OPCODE_SLT: + return R300_VE_SET_LESS_THAN; case TGSI_OPCODE_RSQ: return R300_PVS_DST_MATH_INST | R300_ME_RECIP_DX; case TGSI_OPCODE_MAD: @@ -232,6 +234,8 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, break; case TGSI_OPCODE_ADD: case TGSI_OPCODE_MUL: + case TGSI_OPCODE_MAX: + case TGSI_OPCODE_SLT: r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2, FALSE); @@ -273,11 +277,6 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2, FALSE); break; - case TGSI_OPCODE_MAX: - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2, FALSE); - break; case TGSI_OPCODE_MAD: r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index 204e1d31c3..d5d425e9d6 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -36,6 +36,7 @@ # define R300_VE_MULTIPLY 2 # define R300_VE_ADD 3 # define R300_VE_MAXIMUM 7 +# define R300_VE_SET_LESS_THAN 10 #define R300_PVS_DST_MATH_INST (1 << 6) # define R300_ME_RECIP_DX 6 #define R300_PVS_DST_MACRO_INST (1 << 7) -- cgit v1.2.3 From c4c5bf31a743bc53a9dbdef7807928dacae7958a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 9 May 2009 00:28:49 -0700 Subject: r300-gallium: Start VS dumper. --- src/gallium/drivers/r300/r300_debug.c | 90 ++++----------------- src/gallium/drivers/r300/r300_debug.h | 146 ++++++++++++++++++++++++++++++++++ 2 files changed, 160 insertions(+), 76 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index dd63136c9d..1ff72172eb 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -30,81 +30,6 @@ static void r300_dump_fs(struct r300_fragment_shader* fs) } } -static char* r500_fs_swiz[] = { - " R", - " G", - " B", - " A", - " 0", - ".5", - " 1", - " U", -}; - -static char* r500_fs_op_rgb[] = { - "MAD", - "DP3", - "DP4", - "D2A", - "MIN", - "MAX", - "---", - "CND", - "CMP", - "FRC", - "SOP", - "MDH", - "MDV", -}; - -static char* r500_fs_op_alpha[] = { - "MAD", - " DP", - "MIN", - "MAX", - "---", - "CND", - "CMP", - "FRC", - "EX2", - "LN2", - "RCP", - "RSQ", - "SIN", - "COS", - "MDH", - "MDV", -}; - -static char* r500_fs_mask[] = { - "NONE", - "R ", - " G ", - "RG ", - " B ", - "R B ", - " GB ", - "RGB ", - " A", - "R A", - " G A", - "RG A", - " BA", - "R BA", - " GBA", - "RGBA", -}; - -static char* r500_fs_tex[] = { - " NOP", - " LD", - "TEXKILL", - " PROJ", - "LODBIAS", - " LOD", - " DXDY", -}; - void r500_fs_dump(struct r500_fragment_shader* fs) { int i; @@ -225,12 +150,25 @@ void r500_fs_dump(struct r500_fragment_shader* fs) } } +static void r300_vs_op_dump(uint32_t op) +{ + if (op & 0x81) { + debug_printf("PVS_MACRO_OP_2CLK_M2X_ADD\n"); + } else if (op & 0x80) { + debug_printf(" PVS_MACRO_OP_2CLK_MADD\n"); + } else if (op & 0x40) { + debug_printf("%s\n", r300_vs_me_ops[op & 0x1f]); + } else { + debug_printf("%s\n", r300_vs_ve_ops[op & 0x1f]); + } +} + void r300_vs_dump(struct r300_vertex_shader* vs) { int i; for (i = 0; i < vs->instruction_count; i++) { - debug_printf("inst0: 0x%x\n", vs->instructions[i].inst0); + r300_vs_op_dump(vs->instructions[i].inst0); debug_printf("inst1: 0x%x\n", vs->instructions[i].inst1); debug_printf("inst2: 0x%x\n", vs->instructions[i].inst2); debug_printf("inst3: 0x%x\n", vs->instructions[i].inst3); diff --git a/src/gallium/drivers/r300/r300_debug.h b/src/gallium/drivers/r300/r300_debug.h index a1f873656d..6306594099 100644 --- a/src/gallium/drivers/r300/r300_debug.h +++ b/src/gallium/drivers/r300/r300_debug.h @@ -27,6 +27,152 @@ #include "r300_state_shader.h" #include "r300_state_tcl.h" +static char* r500_fs_swiz[] = { + " R", + " G", + " B", + " A", + " 0", + ".5", + " 1", + " U", +}; + +static char* r500_fs_op_rgb[] = { + "MAD", + "DP3", + "DP4", + "D2A", + "MIN", + "MAX", + "---", + "CND", + "CMP", + "FRC", + "SOP", + "MDH", + "MDV", +}; + +static char* r500_fs_op_alpha[] = { + "MAD", + " DP", + "MIN", + "MAX", + "---", + "CND", + "CMP", + "FRC", + "EX2", + "LN2", + "RCP", + "RSQ", + "SIN", + "COS", + "MDH", + "MDV", +}; + +static char* r500_fs_mask[] = { + "NONE", + "R ", + " G ", + "RG ", + " B ", + "R B ", + " GB ", + "RGB ", + " A", + "R A", + " G A", + "RG A", + " BA", + "R BA", + " GBA", + "RGBA", +}; + +static char* r500_fs_tex[] = { + " NOP", + " LD", + "TEXKILL", + " PROJ", + "LODBIAS", + " LOD", + " DXDY", +}; + +static char* r300_vs_ve_ops[] = { + /* R300 vector ops */ + " VE_NO_OP", + " VE_DOT_PRODUCT", + " VE_MULTIPLY", + " VE_ADD", + " VE_MULTIPLY_ADD", + " VE_DISTANCE_FACTOR", + " VE_FRACTION", + " VE_MAXIMUM", + " VE_MINIMUM", + "VE_SET_GREATER_THAN_EQUAL", + " VE_SET_LESS_THAN", + " VE_MULTIPLYX2_ADD", + " VE_MULTIPLY_CLAMP", + " VE_FLT2FIX_DX", + " VE_FLT2FIX_DX_RND", + /* R500 vector ops */ + " VE_PRED_SET_EQ_PUSH", + " VE_PRED_SET_GT_PUSH", + " VE_PRED_SET_GTE_PUSH", + " VE_PRED_SET_NEQ_PUSH", + " VE_COND_WRITE_EQ", + " VE_COND_WRITE_GT", + " VE_COND_WRITE_GTE", + " VE_COND_WRITE_NEQ", + " VE_SET_GREATER_THAN", + " VE_SET_EQUAL", + " VE_SET_NOT_EQUAL", + " (reserved)", + " (reserved)", + " (reserved)", +}; + +static char* r300_vs_me_ops[] = { + /* R300 math ops */ + " ME_NO_OP", + " ME_EXP_BASE2_DX", + " ME_LOG_BASE2_DX", + " ME_EXP_BASEE_FF", + " ME_LIGHT_COEFF_DX", + " ME_POWER_FUNC_FF", + " ME_RECIP_DX", + " ME_RECIP_FF", + " ME_RECIP_SQRT_DX", + " ME_RECIP_SQRT_FF", + " ME_MULTIPLY", + " ME_EXP_BASE2_FULL_DX", + " ME_LOG_BASE2_FULL_DX", + " ME_POWER_FUNC_FF_CLAMP_B", + "ME_POWER_FUNC_FF_CLAMP_B1", + "ME_POWER_FUNC_FF_CLAMP_01", + " ME_SIN", + " ME_COS", + /* R500 math ops */ + " ME_LOG_BASE2_IEEE", + " ME_RECIP_IEEE", + " ME_RECIP_SQRT_IEEE", + " ME_PRED_SET_EQ", + " ME_PRED_SET_GT", + " ME_PRED_SET_GTE", + " ME_PRED_SET_NEQ", + " ME_PRED_SET_CLR", + " ME_PRED_SET_INV", + " ME_PRED_SET_POP", + " ME_PRED_SET_RESTORE", + " (reserved)", + " (reserved)", + " (reserved)", +}; + void r500_fs_dump(struct r500_fragment_shader* fs); void r300_vs_dump(struct r300_vertex_shader* vs); -- cgit v1.2.3 From a738d2b4c2979d7d54064f2ad08da401b28a473b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 9 May 2009 00:38:07 -0700 Subject: r300-gallium: vs: Make imms work, cleanup some of the switches. --- src/gallium/drivers/r300/r300_state_tcl.c | 38 +++++++++++++++++++++---------- 1 file changed, 26 insertions(+), 12 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index 410a756773..ed9164db49 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -71,16 +71,13 @@ static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, { switch (src->File) { case TGSI_FILE_NULL: - /* Probably a zero or one swizzle */ - return R300_PVS_SRC_REG_INPUT; - break; case TGSI_FILE_INPUT: + /* Probably a zero or one swizzle */ return R300_PVS_SRC_REG_INPUT; - break; case TGSI_FILE_TEMPORARY: return R300_PVS_SRC_REG_TEMPORARY; - break; case TGSI_FILE_CONSTANT: + case TGSI_FILE_IMMEDIATE: return R300_PVS_SRC_REG_CONSTANT; default: debug_printf("r300: vs: Unimplemented src type %d\n", src->File); @@ -89,16 +86,32 @@ static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, return 0; } +static INLINE unsigned r300_vs_src(struct r300_vs_asm* assembler, + struct tgsi_src_register* src) +{ + switch (src->File) { + case TGSI_FILE_NULL: + case TGSI_FILE_INPUT: + case TGSI_FILE_TEMPORARY: + case TGSI_FILE_CONSTANT: + return src->Index; + case TGSI_FILE_IMMEDIATE: + return src->Index + assembler->imm_offset; + default: + debug_printf("r300: vs: Unimplemented src type %d\n", src->File); + break; + } + return 0; +} + static INLINE unsigned r300_vs_dst_type(struct r300_vs_asm* assembler, struct tgsi_dst_register* dst) { switch (dst->File) { case TGSI_FILE_TEMPORARY: return R300_PVS_DST_REG_TEMPORARY; - break; case TGSI_FILE_OUTPUT: return R300_PVS_DST_REG_OUT; - break; default: debug_printf("r300: vs: Unimplemented dst type %d\n", dst->File); break; @@ -112,10 +125,8 @@ static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, switch (dst->File) { case TGSI_FILE_TEMPORARY: return dst->Index; - break; case TGSI_FILE_OUTPUT: return assembler->tab[dst->Index]; - break; default: debug_printf("r300: vs: Unimplemented dst %d\n", dst->File); break; @@ -199,21 +210,24 @@ static void r300_vs_emit_inst(struct r300_vertex_shader* vs, vs->instructions[i].inst3 = R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, &src[2].SrcRegister)) | - R300_PVS_SRC_OFFSET(src[2].SrcRegister.Index) | + R300_PVS_SRC_OFFSET(r300_vs_src(assembler, + &src[2].SrcRegister)) | R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[2])); /* Fall through */ case 2: vs->instructions[i].inst2 = R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, &src[1].SrcRegister)) | - R300_PVS_SRC_OFFSET(src[1].SrcRegister.Index) | + R300_PVS_SRC_OFFSET(r300_vs_src(assembler, + &src[1].SrcRegister)) | R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[1])); /* Fall through */ case 1: vs->instructions[i].inst1 = R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, &src[0].SrcRegister)) | - R300_PVS_SRC_OFFSET(src[0].SrcRegister.Index) | + R300_PVS_SRC_OFFSET(r300_vs_src(assembler, + &src[0].SrcRegister)) | /* XXX the icky, it burns */ R300_PVS_SRC_SWIZZLE(is_scalar ? r300_vs_scalar_swiz(&src[0]) : r300_vs_swiz(&src[0])); -- cgit v1.2.3 From e9f8b7f1b9fee80fd705864d047cc017059143f8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 11 May 2009 09:57:57 -0700 Subject: r300-gallium: Cleanup PSC for HW TCL. Still dies in assert, but at least it's not my assert anymore. :3 --- src/gallium/drivers/r300/r300_state_derived.c | 35 ++++++++++++++++++--------- 1 file changed, 24 insertions(+), 11 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index c4c9784a00..caa5f3b543 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -162,26 +162,40 @@ static void r300_vs_tab_routes(struct r300_context* r300, static void r300_vertex_psc(struct r300_context* r300, struct r300_vertex_format* vformat) { + struct r300_screen* r300screen = r300_screen(r300->context.screen); struct vertex_info* vinfo = &vformat->vinfo; int* tab = vformat->vs_tab; uint32_t temp; - int i; + int i, attrib_count; - debug_printf("r300: attrib count: %d\n", vinfo->num_attribs); - for (i = 0; i < vinfo->num_attribs; i++) { - debug_printf("r300: attrib: offset %d, interp %d, size %d," - " tab %d\n", vinfo->attrib[i].src_index, - vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit, - tab[i]); + /* Vertex shaders have no semantics on their inputs, + * so PSC should just route stuff based on their info, + * and not on attrib information. */ + if (r300screen->caps->has_tcl) { + attrib_count = r300->vs->info.num_inputs; + debug_printf("r300: routing %d attribs in psc for vs\n", + attrib_count); + } else { + attrib_count = vinfo->num_attribs; + debug_printf("r300: attrib count: %d\n", attrib_count); + for (i = 0; i < attrib_count; i++) { + debug_printf("r300: attrib: offset %d, interp %d, size %d," + " tab %d\n", vinfo->attrib[i].src_index, + vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit, + tab[i]); + } } - for (i = 0; i < vinfo->num_attribs; i++) { + for (i = 0; i < attrib_count; i++) { /* Make sure we have a proper destination for our attribute */ assert(tab[i] != -1); /* Add the attribute to the PSC table. */ - temp = translate_vertex_data_type(vinfo->attrib[i].emit) | - (tab[i] << R300_DST_VEC_LOC_SHIFT); + temp = r300screen->caps->has_tcl ? + R300_DATA_TYPE_FLOAT_4 : + translate_vertex_data_type(vinfo->attrib[i].emit); + temp |= tab[i] << R300_DST_VEC_LOC_SHIFT; + if (i & 1) { vformat->vap_prog_stream_cntl[i >> 1] &= 0x0000ffff; vformat->vap_prog_stream_cntl[i >> 1] |= temp << 16; @@ -206,7 +220,6 @@ static void r300_vertex_psc(struct r300_context* r300, /* Update the vertex format. */ static void r300_update_vertex_format(struct r300_context* r300) { - struct r300_screen* r300screen = r300_screen(r300->context.screen); struct r300_vertex_format vformat; int i; -- cgit v1.2.3 From b315ec43eed981b867bc3af16d0e6dc4d050e9ae Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 11 May 2009 10:07:40 -0700 Subject: r300-gallium: Cleanup some compile warnings. --- src/gallium/drivers/r300/r300_surface.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 4dd5b8af99..33bc4ad0ca 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -23,19 +23,17 @@ #include "r300_surface.h" -static void r300_surface_setup(struct pipe_context* pipe, - struct pipe_surface* dest, +static void r300_surface_setup(struct r300_context* r300, + struct r300_texture* dest, unsigned x, unsigned y, unsigned w, unsigned h) { - struct r300_context* r300 = r300_context(pipe); - struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; - struct r300_texture* tex = (struct r300_texture*)dest->texture; - unsigned pixpitch = tex->stride / tex->tex.block.size; + struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; + unsigned pixpitch = dest->stride / dest->tex.block.size; CS_LOCALS(r300); /* Make sure our target BO is okay. */ - r300->winsys->add_buffer(r300->winsys, tex->buffer, + r300->winsys->add_buffer(r300->winsys, dest->buffer, 0, RADEON_GEM_DOMAIN_VRAM); if (r300->winsys->validate(r300->winsys)) { r300->context.flush(&r300->context, 0, NULL); @@ -71,9 +69,9 @@ static void r300_surface_setup(struct pipe_context* pipe, /* Setup colorbuffer. */ OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); - OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG(R300_RB3D_COLORPITCH0, pixpitch | - r300_translate_colorformat(tex->tex.format)); + r300_translate_colorformat(dest->tex.format)); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0xf); END_CS; @@ -110,7 +108,7 @@ static void r300_surface_fill(struct pipe_context* pipe, return; } - r300_surface_setup(r300, dest, x, y, w, h); + r300_surface_setup(r300, tex, x, y, w, h); /* Vertex shader setup */ if (caps->has_tcl) { -- cgit v1.2.3 From 64f60bc04666dbe2b53c951a2fbab06e2628ee1b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 11 May 2009 10:09:59 -0700 Subject: r300-gallium: Setup surface in r300_surface_copy. I haven't tested, but this may unbreak surface copies. --- src/gallium/drivers/r300/r300_surface.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 33bc4ad0ca..d6f3fe1466 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -225,6 +225,8 @@ static void r300_surface_copy(struct pipe_context* pipe, srcx, srcy, w, h); } + r300_surface_setup(r300, desttex, x, y, w, h); + r300_emit_sampler(r300, &r300_sampler_copy_state, 0); r300_emit_texture(r300, srctex, 0); r300_flush_textures(r300); -- cgit v1.2.3 From 783e43064b64feb87e0457f96c2275160389f84c Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Mon, 11 May 2009 21:44:49 +0200 Subject: r300-gallium: unbreak build --- src/gallium/drivers/r300/r300_surface.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index d6f3fe1466..3198c97378 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -225,7 +225,7 @@ static void r300_surface_copy(struct pipe_context* pipe, srcx, srcy, w, h); } - r300_surface_setup(r300, desttex, x, y, w, h); + r300_surface_setup(r300, desttex, destx, desty, w, h); r300_emit_sampler(r300, &r300_sampler_copy_state, 0); r300_emit_texture(r300, srctex, 0); -- cgit v1.2.3 From 62c0c7d81a3f271b7dc7177467f9c884e89f9eee Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Tue, 12 May 2009 21:41:48 +0200 Subject: r300-gallium: duplicate tokens in create_fs_state This was all phoenix64's idea. Credit goes to him --- src/gallium/drivers/r300/r300_state.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 0143e228c4..80e11d6ecf 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -289,6 +289,7 @@ static void* r300_create_fs_state(struct pipe_context* pipe, /* Copy state directly into shader. */ fs->state = *shader; + fs->state.tokens = tgsi_dup_tokens(shader->tokens); tgsi_scan_shader(shader->tokens, &fs->info); @@ -317,6 +318,8 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) /* Delete fragment shader state. */ static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) { + struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader + FREE(fs->state.tokens); FREE(shader); } -- cgit v1.2.3 From 167a6b08048573079c7d5e5f36da3de69d487b6f Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Tue, 12 May 2009 22:01:59 +0200 Subject: r300-gallium: add missing semicolon Yeah, that was stupid --- src/gallium/drivers/r300/r300_state.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 80e11d6ecf..2118f7706f 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -318,7 +318,7 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) /* Delete fragment shader state. */ static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) { - struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader + struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader; FREE(fs->state.tokens); FREE(shader); } -- cgit v1.2.3 From 15601e970250e12f5d566ba782aae06d9714fbdc Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 13 May 2009 17:01:03 -0700 Subject: r300-gallium: Space accounting for textures. --- src/gallium/drivers/r300/r300_emit.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index c73d5a0b44..cd5c38a0c7 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -460,7 +460,6 @@ void r300_emit_dirty_state(struct r300_context* r300) for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) { tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]->texture; assert(tex && tex->buffer && "cbuf is marked, but NULL!"); - if (!tex->buffer) return; r300->winsys->add_buffer(r300->winsys, tex->buffer, 0, RADEON_GEM_DOMAIN_VRAM); } @@ -468,10 +467,16 @@ void r300_emit_dirty_state(struct r300_context* r300) if (r300->framebuffer_state.zsbuf) { tex = (struct r300_texture*)r300->framebuffer_state.zsbuf->texture; assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); - if (!tex->buffer) return; r300->winsys->add_buffer(r300->winsys, tex->buffer, 0, RADEON_GEM_DOMAIN_VRAM); } + /* ...textures... */ + for (i = 0; i < r300->texture_count; i++) { + tex = r300->textures[i]; + assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); + r300->winsys->add_buffer(r300->winsys, tex->buffer, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + } /* ...and vertex buffer. */ if (r300->vbo) { r300->winsys->add_buffer(r300->winsys, r300->vbo, -- cgit v1.2.3 From d3912e301fd707738b0952cd11e19f34b87765b8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 13 May 2009 17:24:47 -0700 Subject: r300-gallium: Clean up outdated comments. --- src/gallium/drivers/r300/r300_chipset.c | 3 --- src/gallium/drivers/r300/r300_context.c | 1 - 2 files changed, 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 9d95ad918c..db09f27bfa 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -349,7 +349,4 @@ void r300_parse_chipset(struct r300_capabilities* caps) caps->pci_id); break; } - - /* XXX SW TCL is broken so no forcing it off right now - caps->has_tcl = FALSE; */ } diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index a4e89c37d1..a1cdea30de 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -129,7 +129,6 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, if (!r300) return NULL; - /* XXX this could be refactored now? */ r300->winsys = r300_winsys; r300->context.winsys = (struct pipe_winsys*)r300_winsys; -- cgit v1.2.3 From 96922d1b71dc1ba7375b4fea6439127e62c36073 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 14 May 2009 08:17:08 -0700 Subject: r300-gallium: Correct VTE setup for surface_fill, make surface_copy emit right. --- src/gallium/drivers/r300/r300_surface.c | 75 +++++++++++++++++++-------------- 1 file changed, 43 insertions(+), 32 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 3198c97378..00eb4ebe7c 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -44,7 +44,22 @@ static void r300_surface_setup(struct r300_context* r300, r300_emit_dsa_state(r300, &dsa_clear_state); r300_emit_rs_state(r300, &rs_clear_state); - BEGIN_CS(15); + BEGIN_CS(24); + + /* Viewport setup */ + OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); + OUT_CS_32F((float)w); + OUT_CS_32F((float)x); + OUT_CS_32F((float)h); + OUT_CS_32F((float)y); + OUT_CS_32F(1.0); + OUT_CS_32F(0.0); + + OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VPORT_X_SCALE_ENA | + R300_VPORT_X_OFFSET_ENA | + R300_VPORT_Y_SCALE_ENA | + R300_VPORT_Y_OFFSET_ENA | + R300_VTX_XY_FMT | R300_VTX_Z_FMT); /* Pixel scissors. */ OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); @@ -132,7 +147,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(31); + BEGIN_CS(24); /* VAP stream control, mapping from input memory to PVS/RS memory */ if (caps->has_tcl) { @@ -159,18 +174,9 @@ static void r300_surface_fill(struct pipe_context* pipe, /* Disable textures */ OUT_CS_REG(R300_TX_ENABLE, 0x0); - /* Viewport setup */ - OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); - OUT_CS_32F(1.0); - OUT_CS_32F((float)x); - OUT_CS_32F(1.0); - OUT_CS_32F((float)y); - OUT_CS_32F(1.0); - OUT_CS_32F(0.0); - /* The size of the point we're about to draw, in sixths of pixels */ OUT_CS_REG(R300_GA_POINT_SIZE, - ((h * 6) & R300_POINTSIZE_Y_MASK) | + ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); /* Packet3 with our point vertex */ @@ -178,8 +184,8 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | (1 << R300_PRIM_NUM_VERTICES_SHIFT)); /* Position */ - OUT_CS_32F(w / 2.0); - OUT_CS_32F(h / 2.0); + OUT_CS_32F(0.5); + OUT_CS_32F(0.5); OUT_CS_32F(1.0); OUT_CS_32F(1.0); /* Color */ @@ -225,6 +231,11 @@ static void r300_surface_copy(struct pipe_context* pipe, srcx, srcy, w, h); } + /* Add our source texture to the BO list before emitting anything. + * r300_surface_setup will flush if needed for us. */ + r300->winsys->add_buffer(r300->winsys, srctex->buffer, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + r300_surface_setup(r300, desttex, destx, desty, w, h); r300_emit_sampler(r300, &r300_sampler_copy_state, 0); @@ -233,7 +244,7 @@ static void r300_surface_copy(struct pipe_context* pipe, /* Vertex shader setup */ if (caps->has_tcl) { - r300_emit_vertex_shader(r300, &r300_texture_vertex_shader); + r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader); } else { BEGIN_CS(4); OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS); @@ -276,29 +287,29 @@ static void r300_surface_copy(struct pipe_context* pipe, OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x2); /* Packet3 with our texcoords */ - OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 8); + OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 16); OUT_CS(R300_PRIM_TYPE_QUADS | R300_PRIM_WALK_RING | (4 << R300_PRIM_NUM_VERTICES_SHIFT)); /* (x , y ) */ - OUT_CS_32F((float)destx); - OUT_CS_32F((float)desty); - OUT_CS_32F((float)srcx); - OUT_CS_32F((float)srcy); + OUT_CS_32F((float)(destx / dest->width)); + OUT_CS_32F((float)(desty / dest->height)); + OUT_CS_32F((float)(srcx / dest->width)); + OUT_CS_32F((float)(srcy / dest->height)); /* (x , y + h) */ - OUT_CS_32F((float)destx); - OUT_CS_32F((float)(desty + h)); - OUT_CS_32F((float)srcx); - OUT_CS_32F((float)(srcy + h)); + OUT_CS_32F((float)(destx / dest->width)); + OUT_CS_32F((float)((desty + h) / dest->height)); + OUT_CS_32F((float)(srcx / dest->width)); + OUT_CS_32F((float)((srcy + h) / dest->height)); /* (x + w, y + h) */ - OUT_CS_32F((float)(destx + w)); - OUT_CS_32F((float)(desty + h)); - OUT_CS_32F((float)(srcx + w)); - OUT_CS_32F((float)(srcy + h)); + OUT_CS_32F((float)((destx + w) / dest->width)); + OUT_CS_32F((float)((desty + h) / dest->height)); + OUT_CS_32F((float)((srcx + w) / dest->width)); + OUT_CS_32F((float)((srcy + h) / dest->height)); /* (x + w, y ) */ - OUT_CS_32F((float)(destx + w)); - OUT_CS_32F((float)desty); - OUT_CS_32F((float)(srcx + w)); - OUT_CS_32F((float)srcy); + OUT_CS_32F((float)((destx + w) / dest->width)); + OUT_CS_32F((float)(desty / dest->height)); + OUT_CS_32F((float)((srcx + w) / dest->width)); + OUT_CS_32F((float)(srcy / dest->height)); OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); -- cgit v1.2.3 From 13131adbf1beb3e4222ce16c32ac7910a4a5331b Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 16 May 2009 08:47:36 -0700 Subject: r300-gallium: Various cleanups leftover from before. BEGIN/END_CS pair, a few asserts, and a slightly more correct VTE setup. --- src/gallium/drivers/r300/r300_emit.c | 6 ++++-- src/gallium/drivers/r300/r300_state.c | 2 +- src/gallium/drivers/r300/r300_surface.c | 3 +++ 3 files changed, 8 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index cd5c38a0c7..3beb1b8c3f 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -163,6 +163,7 @@ void r300_emit_fb_state(struct r300_context* r300, BEGIN_CS((8 * fb->nr_cbufs) + (fb->zsbuf ? 8 : 0) + 4); for (i = 0; i < fb->nr_cbufs; i++) { tex = (struct r300_texture*)fb->cbufs[i]->texture; + assert(tex && tex->buffer && "cbuf is marked, but NULL!"); pixpitch = tex->stride / tex->tex.block.size; OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); @@ -177,7 +178,8 @@ void r300_emit_fb_state(struct r300_context* r300, if (fb->zsbuf) { tex = (struct r300_texture*)fb->zsbuf->texture; - pixpitch = (tex->stride / tex->tex.block.size); + assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); + pixpitch = tex->stride / tex->tex.block.size; OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1); OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); @@ -473,7 +475,7 @@ void r300_emit_dirty_state(struct r300_context* r300) /* ...textures... */ for (i = 0; i < r300->texture_count; i++) { tex = r300->textures[i]; - assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); + assert(tex && tex->buffer && "texture is marked, but NULL!"); r300->winsys->add_buffer(r300->winsys, tex->buffer, RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); } diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 2118f7706f..49b93a420b 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -562,7 +562,7 @@ static void r300_set_viewport_state(struct pipe_context* pipe, if (r300_screen(r300->context.screen)->caps->has_tcl) { /* Do the transform in HW. */ - r300->viewport_state->vte_control = R300_VTX_W0_FMT; + r300->viewport_state->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT; if (state->scale[0] != 1.0f) { assert(state->scale[0] != 0.0f); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 00eb4ebe7c..17b42504d4 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -264,6 +264,7 @@ static void r300_surface_copy(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_copy_state); } + BEGIN_CS(28); /* VAP stream control, mapping from input memory to PVS/RS memory */ if (caps->has_tcl) { OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, @@ -313,6 +314,8 @@ static void r300_surface_copy(struct pipe_context* pipe, OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); + END_CS; + r300->dirty_hw++; } -- cgit v1.2.3 From 13f8e7bc9c5b4a7de0fe4f53af2eb6237b3e71fd Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 16 May 2009 10:46:55 -0700 Subject: r300-gallium: Update screen caps. Anisotropic filtering should work, and OQ is broken. --- src/gallium/drivers/r300/r300_screen.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index d2c5998c26..78ed2ad922 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -87,7 +87,6 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) } else { return 0; } - return 0; case PIPE_CAP_GLSL: /* IN THEORY */ return 0; @@ -95,15 +94,15 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) /* IN THEORY */ return 0; case PIPE_CAP_ANISOTROPIC_FILTER: - /* IN THEORY */ - return 0; + return 1; case PIPE_CAP_POINT_SPRITE: /* IN THEORY */ return 0; case PIPE_CAP_MAX_RENDER_TARGETS: return 4; case PIPE_CAP_OCCLUSION_QUERY: - return 1; + /* IN THEORY */ + return 0; case PIPE_CAP_TEXTURE_SHADOW_MAP: /* IN THEORY */ return 0; -- cgit v1.2.3 From 17b395638b92139feef9beaea4039f76710bb23a Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 16 May 2009 10:56:17 -0700 Subject: r300-gallium: Update floating-point params too. Even though we *can* render 10,000-pixel-wide lines, let's not advertise it. --- src/gallium/drivers/r300/r300_screen.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 78ed2ad922..ab095028fb 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -151,17 +151,20 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) static float r300_get_paramf(struct pipe_screen* pscreen, int param) { + struct r300_screen* r300screen = r300_screen(pscreen); + switch (param) { case PIPE_CAP_MAX_LINE_WIDTH: case PIPE_CAP_MAX_LINE_WIDTH_AA: - /* XXX this is the biggest thing that will fit in that register. - * Perhaps the actual rendering limits are less? */ - return 10922.0f; case PIPE_CAP_MAX_POINT_WIDTH: case PIPE_CAP_MAX_POINT_WIDTH_AA: - /* XXX this is the biggest thing that will fit in that register. - * Perhaps the actual rendering limits are less? */ - return 10922.0f; + /* The maximum dimensions of the colorbuffer are our practical + * rendering limits. 2048 pixels should be enough for anybody. */ + if (r300screen->caps->is_r500) { + return 4096.0f; + } else { + return 2048.0f; + } case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: return 16.0f; case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: -- cgit v1.2.3 From 08ec7e0d329a72433b427e8167b2c3442d1f53b4 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 16 May 2009 11:17:05 -0700 Subject: r300-gallium: Die on bad texture formats. Odds are good that we'll die later anyway, so we might as well do it before we start dancing on random memory. --- src/gallium/drivers/r300/r300_screen.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index ab095028fb..6fe724cc92 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -232,9 +232,16 @@ static boolean r300_is_format_supported(struct pipe_screen* pscreen, case PIPE_TEXTURE_2D: return check_tex_2d_format(format, r300_screen(pscreen)->caps->is_r500); + case PIPE_TEXTURE_1D: + case PIPE_TEXTURE_3D: + case PIPE_TEXTURE_CUBE: + debug_printf("r300: Implementation error: Unsupported format " + "target: %d\n", target); + break; default: - debug_printf("r300: Warning: Got unknown format target: %d\n", - format); + debug_printf("r300: Fatal: This is not a format target: %d\n", + target); + assert(0); break; } -- cgit v1.2.3 From 764bf9501adea0f3dbe8d7c718b22dfb067fbbfa Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 09:39:06 -0700 Subject: r300-gallium: vs: Dupe tokens, better debug, count spurious insts. --- src/gallium/drivers/r300/r300_debug.c | 10 ++++++---- src/gallium/drivers/r300/r300_state.c | 2 ++ src/gallium/drivers/r300/r300_state_tcl.c | 17 +++++++++++++++-- 3 files changed, 23 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index 1ff72172eb..ffc93eb591 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -152,10 +152,12 @@ void r500_fs_dump(struct r500_fragment_shader* fs) static void r300_vs_op_dump(uint32_t op) { - if (op & 0x81) { - debug_printf("PVS_MACRO_OP_2CLK_M2X_ADD\n"); - } else if (op & 0x80) { - debug_printf(" PVS_MACRO_OP_2CLK_MADD\n"); + if (op & 0x80) { + if (op & 0x1) { + debug_printf("PVS_MACRO_OP_2CLK_M2X_ADD\n"); + } else { + debug_printf(" PVS_MACRO_OP_2CLK_MADD\n"); + } } else if (op & 0x40) { debug_printf("%s\n", r300_vs_me_ops[op & 0x1f]); } else { diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 49b93a420b..0ae118dbb9 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -634,6 +634,7 @@ static void* r300_create_vs_state(struct pipe_context* pipe, struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); /* Copy state directly into shader. */ vs->state = *shader; + vs->state.tokens = tgsi_dup_tokens(shader->tokens); tgsi_scan_shader(shader->tokens, &vs->info); @@ -679,6 +680,7 @@ static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; draw_delete_vertex_shader(r300->draw, vs->draw); + FREE(vs->state.tokens); FREE(shader); } else { draw_delete_vertex_shader(r300->draw, diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index ed9164db49..8b7a2ec5e9 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -334,6 +334,8 @@ void r300_translate_vertex_shader(struct r300_context* r300, int i; struct r300_constant_buffer* consts = &r300->shader_constants[PIPE_SHADER_VERTEX]; + boolean end = FALSE; + int spurious = 0; struct r300_vs_asm* assembler = CALLOC_STRUCT(r300_vs_asm); if (assembler == NULL) { @@ -373,8 +375,16 @@ void r300_translate_vertex_shader(struct r300_context* r300, assembler->imm_count++; break; case TGSI_TOKEN_TYPE_INSTRUCTION: - r300_vs_instruction(vs, assembler, - &parser.FullToken.FullInstruction); + if (parser.FullToken.FullInstruction.Instruction.Opcode == + TGSI_OPCODE_END) { + end = TRUE; + } + if (end) { + spurious++; + } else { + r300_vs_instruction(vs, assembler, + &parser.FullToken.FullInstruction); + } break; } } @@ -391,6 +401,9 @@ void r300_translate_vertex_shader(struct r300_context* r300, debug_printf("r300: vs: tab: %d %d %d %d\n", assembler->tab[0], assembler->tab[1], assembler->tab[2], assembler->tab[3]); + debug_printf("r300: vs: %d spurious instructions following END\n", + spurious - 1); + tgsi_dump(vs->state.tokens); /* XXX finish r300 vertex shader dumper */ r300_vs_dump(vs); -- cgit v1.2.3 From 7e97219ff8adce22d30abeda53144f7193589c30 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 09:44:14 -0700 Subject: r300-gallium: Comment out useless debugging code. Those parts are nearly solid compared to the shaders. --- src/gallium/drivers/r300/r300_emit.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 3beb1b8c3f..b7d1cf8a92 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -236,7 +236,7 @@ void r300_emit_rs_block_state(struct r300_context* r300, } for (i = 0; i < 8; i++) { OUT_CS(rs->ip[i]); - debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); + /* debug_printf("ip %d: 0x%08x\n", i, rs->ip[i]); */ } OUT_CS_REG_SEQ(R300_RS_COUNT, 2); @@ -250,11 +250,11 @@ void r300_emit_rs_block_state(struct r300_context* r300, } for (i = 0; i < 8; i++) { OUT_CS(rs->inst[i]); - debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); + /* debug_printf("inst %d: 0x%08x\n", i, rs->inst[i]); */ } - debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count, - rs->inst_count); + /* debug_printf("count: 0x%08x inst_count: 0x%08x\n", rs->count, + * rs->inst_count); */ END_CS; } @@ -336,22 +336,22 @@ void r300_emit_vertex_format_state(struct r300_context* r300) OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2); OUT_CS(r300->vertex_info.vinfo.hwfmt[2]); OUT_CS(r300->vertex_info.vinfo.hwfmt[3]); - for (i = 0; i < 4; i++) { - debug_printf("hwfmt%d: 0x%08x\n", i, - r300->vertex_info.vinfo.hwfmt[i]); - } + /* for (i = 0; i < 4; i++) { + * debug_printf("hwfmt%d: 0x%08x\n", i, + * r300->vertex_info.vinfo.hwfmt[i]); + * } */ OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, 8); for (i = 0; i < 8; i++) { OUT_CS(r300->vertex_info.vap_prog_stream_cntl[i]); - debug_printf("prog_stream_cntl%d: 0x%08x\n", i, - r300->vertex_info.vap_prog_stream_cntl[i]); + /* debug_printf("prog_stream_cntl%d: 0x%08x\n", i, + * r300->vertex_info.vap_prog_stream_cntl[i]); */ } OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, 8); for (i = 0; i < 8; i++) { OUT_CS(r300->vertex_info.vap_prog_stream_cntl_ext[i]); - debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i, - r300->vertex_info.vap_prog_stream_cntl_ext[i]); + /* debug_printf("prog_stream_cntl_ext%d: 0x%08x\n", i, + * r300->vertex_info.vap_prog_stream_cntl_ext[i]); */ } END_CS; } -- cgit v1.2.3 From 8dae8f28e52ed20b087ecf0d09efe2d94bdd09cf Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 10:30:59 -0700 Subject: r300-gallium: r500-fs: Enable depth writes, kinda. Should work, but doesn't. Hm. --- src/gallium/drivers/r300/r300_state_shader.c | 29 ++++++++++++++++++++++++---- src/gallium/drivers/r300/r300_state_shader.h | 6 ++++++ 2 files changed, 31 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 1b02239ee7..7257638dbe 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -59,6 +59,12 @@ static void r300_fs_declare(struct r300_fs_asm* assembler, } break; case TGSI_FILE_OUTPUT: + /* Depth write. Mark the position of the output so we can + * identify it later. */ + if (decl->Semantic.SemanticName == TGSI_SEMANTIC_POSITION) { + assembler->depth_output = decl->DeclarationRange.First; + } + break; case TGSI_FILE_CONSTANT: break; case TGSI_FILE_TEMPORARY: @@ -120,6 +126,14 @@ static INLINE unsigned r300_fs_dst(struct r300_fs_asm* assembler, return 0; } +static INLINE boolean r300_fs_is_depr(struct r300_fs_asm* assembler, + struct tgsi_dst_register* dst) +{ + return (assembler->writes_depth && + (dst->File == TGSI_FILE_OUTPUT) && + (dst->Index == assembler->depth_output)); +} + static INLINE unsigned r500_fix_swiz(unsigned s) { /* For historical reasons, the swizzle values x, y, z, w, and 0 are @@ -302,16 +316,21 @@ static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, int i = fs->instruction_count; if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { - fs->instructions[i].inst0 = R500_INST_TYPE_OUT | - R500_ALU_OMASK(dst->DstRegister.WriteMask); + fs->instructions[i].inst0 = R500_INST_TYPE_OUT; + if (r300_fs_is_depr(assembler, dst)) { + fs->instructions[i].inst4 = R500_W_OMASK; + } else { + fs->instructions[i].inst0 |= + R500_ALU_OMASK(dst->DstRegister.WriteMask); + } } else { fs->instructions[i].inst0 = R500_INST_TYPE_ALU | - R500_ALU_WMASK(dst->DstRegister.WriteMask); + R500_ALU_WMASK(dst->DstRegister.WriteMask); } fs->instructions[i].inst0 |= R500_INST_TEX_SEM_WAIT; - fs->instructions[i].inst4 = + fs->instructions[i].inst4 |= R500_ALPHA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); fs->instructions[i].inst5 = R500_ALU_RGBA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); @@ -581,6 +600,8 @@ void r300_translate_fragment_shader(struct r300_context* r300, } /* Setup starting offset for immediates. */ assembler->imm_offset = consts->user_count; + /* Enable depth writes, if needed. */ + assembler->writes_depth = fs->info.writes_z; /* Make sure we start at the beginning of the shader. */ if (is_r500) { diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 185fdd90f0..f4fb31d86c 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -57,6 +57,7 @@ #define R500_TEX_WMASK(x) ((x) << 11) #define R500_ALU_WMASK(x) ((x) << 11) #define R500_ALU_OMASK(x) ((x) << 15) +#define R500_W_OMASK (1 << 31) /* TGSI constants. TGSI is like XML: If it can't solve your problems, you're * not using enough of it. */ @@ -99,6 +100,11 @@ struct r300_fs_asm { unsigned imm_offset; /* Number of immediate constants. */ unsigned imm_count; + /* Are depth writes enabled? */ + boolean writes_depth; + /* Depth write offset. This is the TGSI output that corresponds to + * depth writes. */ + unsigned depth_output; }; void r300_translate_fragment_shader(struct r300_context* r300, -- cgit v1.2.3 From 45435abcb967931c79aba1714ae797a1c5dc075e Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 10:33:56 -0700 Subject: r300-gallium: vs: Fix vert shader init. Makes the last three commits suck much less. :3 --- src/gallium/drivers/r300/r300_state_tcl.c | 19 ++++--------------- 1 file changed, 4 insertions(+), 15 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index 8b7a2ec5e9..fdbcbf3db8 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -325,6 +325,8 @@ static void r300_vs_init(struct r300_vertex_shader* vs, break; } } + + vs->instruction_count = 0; } void r300_translate_vertex_shader(struct r300_context* r300, @@ -334,8 +336,6 @@ void r300_translate_vertex_shader(struct r300_context* r300, int i; struct r300_constant_buffer* consts = &r300->shader_constants[PIPE_SHADER_VERTEX]; - boolean end = FALSE; - int spurious = 0; struct r300_vs_asm* assembler = CALLOC_STRUCT(r300_vs_asm); if (assembler == NULL) { @@ -375,16 +375,8 @@ void r300_translate_vertex_shader(struct r300_context* r300, assembler->imm_count++; break; case TGSI_TOKEN_TYPE_INSTRUCTION: - if (parser.FullToken.FullInstruction.Instruction.Opcode == - TGSI_OPCODE_END) { - end = TRUE; - } - if (end) { - spurious++; - } else { - r300_vs_instruction(vs, assembler, - &parser.FullToken.FullInstruction); - } + r300_vs_instruction(vs, assembler, + &parser.FullToken.FullInstruction); break; } } @@ -401,9 +393,6 @@ void r300_translate_vertex_shader(struct r300_context* r300, debug_printf("r300: vs: tab: %d %d %d %d\n", assembler->tab[0], assembler->tab[1], assembler->tab[2], assembler->tab[3]); - debug_printf("r300: vs: %d spurious instructions following END\n", - spurious - 1); - tgsi_dump(vs->state.tokens); /* XXX finish r300 vertex shader dumper */ r300_vs_dump(vs); -- cgit v1.2.3 From fbcfcd9f5ce7523bde69103fcf1ebae30531a10c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 11:58:53 -0700 Subject: r300-gallium: Correct default MSPOS. Per agd5f. --- src/gallium/drivers/r300/r300_state_invariant.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 8bd9b41bd7..3e1580c595 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -40,8 +40,8 @@ void r300_emit_invariant_state(struct r300_context* r300) /* Various GB enables */ OUT_CS_REG(R300_GB_ENABLE, 0x0); /* Subpixel multisampling for AA */ - OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); - OUT_CS_REG(R300_GB_MSPOS1, 0x66666666); + OUT_CS_REG(R300_GB_MSPOS0, 0x6666666); + OUT_CS_REG(R300_GB_MSPOS1, 0x6666666); /* GB tile config and pipe setup */ OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_DISABLE | r300_translate_gb_pipes(caps->num_frag_pipes)); -- cgit v1.2.3 From e5f5390f4bcb0fb04dff11cd1333b426cba6d0d1 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 12:51:18 -0700 Subject: r300-gallium: Update XXX. Lops work fine as long as HW TCL is off. (I think I know why.) --- src/gallium/drivers/r300/r300_state.c | 7 +++---- src/gallium/drivers/r300/r300_state_shader.h | 16 ---------------- 2 files changed, 3 insertions(+), 20 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 0ae118dbb9..e818a77699 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -62,8 +62,6 @@ static void* r300_create_blend_state(struct pipe_context* pipe, } /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ - /* XXX are logicops still allowed if blending's disabled? - * Does Gallium take care of it for us? */ if (state->logicop_enable) { blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; @@ -121,7 +119,7 @@ static void r300_set_clip_state(struct pipe_context* pipe, const struct pipe_clip_state* state) { struct r300_context* r300 = r300_context(pipe); - /* XXX Draw */ + /* XXX add HW TCL clipping setup */ draw_flush(r300->draw); draw_set_clip_state(r300->draw, state); } @@ -257,6 +255,7 @@ static void r300_set_edgeflags(struct pipe_context* pipe, const unsigned* bitfield) { /* XXX you know it's bad when i915 has this blank too */ + /* XXX and even worse, I have no idea WTF the bitfield is */ } static void @@ -326,7 +325,7 @@ static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) static void r300_set_polygon_stipple(struct pipe_context* pipe, const struct pipe_poly_stipple* state) { - /* XXX */ + /* XXX no idea how to set this up, but not terribly important */ } /* Create a new rasterizer state based on the CSO rasterizer state. diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index f4fb31d86c..06260e61fe 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -111,14 +111,6 @@ void r300_translate_fragment_shader(struct r300_context* r300, struct r3xx_fragment_shader* fs); static struct r300_fragment_shader r300_passthrough_fragment_shader = { - /* XXX This is the emission code. TODO: decode - OUT_CS_REG(R300_US_CONFIG, 0); - OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); -*/ .alu_instruction_count = 1, .tex_instruction_count = 0, .indirections = 0, @@ -165,14 +157,6 @@ static struct r500_fragment_shader r500_passthrough_fragment_shader = { }; static struct r300_fragment_shader r300_texture_fragment_shader = { - /* XXX This is the emission code. TODO: decode - OUT_CS_REG(R300_US_CONFIG, 0); - OUT_CS_REG(R300_US_CODE_OFFSET, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000); -*/ .alu_instruction_count = 1, .tex_instruction_count = 0, .indirections = 0, -- cgit v1.2.3 From 60665ae6277f15a1b5e48b65ba7d94cea2535c2c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 13:23:39 -0700 Subject: r300-gallium: Clean up more invariant state. GA_ENHANCE is now the kernel's problem. --- src/gallium/drivers/r300/r300_state_invariant.c | 27 +++++++------------------ src/gallium/drivers/r300/r300_surface.c | 10 +++++---- 2 files changed, 13 insertions(+), 24 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 3e1580c595..0acbcbff7f 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -34,7 +34,7 @@ void r300_emit_invariant_state(struct r300_context* r300) struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; CS_LOCALS(r300); - BEGIN_CS(30 + (caps->has_tcl ? 2: 0)); + BEGIN_CS(28 + (caps->has_tcl ? 2: 0)); /*** Graphics Backend (GB) ***/ /* Various GB enables */ @@ -50,20 +50,6 @@ void r300_emit_invariant_state(struct r300_context* r300) /* AA enable */ OUT_CS_REG(R300_GB_AA_CONFIG, 0x0); - /*** Geometry Assembly (GA) ***/ - /* GA errata fixes. */ - if (caps->is_r500) { - OUT_CS_REG(R300_GA_ENHANCE, - R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL | - R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE | - R500_GA_ENHANCE_REG_READWRITE_ENABLE | - R500_GA_ENHANCE_REG_NOSTALL_ENABLE); - } else { - OUT_CS_REG(R300_GA_ENHANCE, - R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL | - R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE); - } - /*** Fog (FG) ***/ OUT_CS_REG(R300_FG_FOG_BLEND, 0x0); OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x0); @@ -86,7 +72,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(79 + (caps->has_tcl ? 7 : 0)); + BEGIN_CS(77 + (caps->has_tcl ? 7 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -113,11 +99,14 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_32F(0.0); OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1); OUT_CS_32F(1.0); + /* XXX line tex stuffing */ + OUT_CS_REG_SEQ(R300_GA_LINE_S0, 1); + OUT_CS_32F(0.0); + OUT_CS_REG_SEQ(R300_GA_LINE_S1, 1); + OUT_CS_32F(1.0); OUT_CS_REG(R300_GA_TRIANGLE_STIPPLE, 0x5 | (0x5 << R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT)); /* XXX this big chunk should be refactored into rs_state */ - OUT_CS_REG(R300_GA_LINE_S0, 0x00000000); - OUT_CS_REG(R300_GA_LINE_S1, 0x3F800000); OUT_CS_REG(R300_GA_SOLID_RG, 0x00000000); OUT_CS_REG(R300_GA_SOLID_BA, 0x00000000); OUT_CS_REG(R300_GA_POLY_MODE, 0x00000000); @@ -144,8 +133,6 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1); OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405); OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F); - /* Vertex size. */ - OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); /* XXX */ OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 17b42504d4..ceaafe11d5 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -179,6 +179,9 @@ static void r300_surface_fill(struct pipe_context* pipe, ((h * 6) & R300_POINTSIZE_Y_MASK) | ((w * 6) << R300_POINTSIZE_X_SHIFT)); + /* Vertex size. */ + OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); + /* Packet3 with our point vertex */ OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 8); OUT_CS(R300_PRIM_TYPE_POINT | R300_PRIM_WALK_RING | @@ -194,11 +197,7 @@ static void r300_surface_fill(struct pipe_context* pipe, OUT_CS_32F(b); OUT_CS_32F(a); - /* XXX figure out why this is 0xA and not 0x2 */ OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); - /* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, - R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE | - R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */ END_CS; @@ -287,6 +286,9 @@ static void r300_surface_copy(struct pipe_context* pipe, /* Two components of texture 0 */ OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x2); + /* Vertex size. */ + OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); + /* Packet3 with our texcoords */ OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 16); OUT_CS(R300_PRIM_TYPE_QUADS | R300_PRIM_WALK_RING | -- cgit v1.2.3 From d6e085bd76ad8e6cfb67c317dc1b32b04434a8b5 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 16:42:54 -0700 Subject: r300-gallium: Don't set GB_TILE_CONFIG (in userspace.) This accompanies kernel patches that make GB_TILE_CONFIG's various members completely controlled in DRM. GB_TILE_CONFIG has the following controls: - The number of GB (pixel) pipes enabled - The size and style of tiling - Subpixel precision (either 1/12 or 1/16) Per airlied and glisse, userspace and kernel will now agree (always) on a subpixel precision of 1/12, and tiling will always be kernel-controlled. --- src/gallium/drivers/r300/r300_state_invariant.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 0acbcbff7f..d74928ceca 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -34,7 +34,7 @@ void r300_emit_invariant_state(struct r300_context* r300) struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; CS_LOCALS(r300); - BEGIN_CS(28 + (caps->has_tcl ? 2: 0)); + BEGIN_CS(26 + (caps->has_tcl ? 2: 0)); /*** Graphics Backend (GB) ***/ /* Various GB enables */ @@ -42,9 +42,6 @@ void r300_emit_invariant_state(struct r300_context* r300) /* Subpixel multisampling for AA */ OUT_CS_REG(R300_GB_MSPOS0, 0x6666666); OUT_CS_REG(R300_GB_MSPOS1, 0x6666666); - /* GB tile config and pipe setup */ - OUT_CS_REG(R300_GB_TILE_CONFIG, R300_GB_TILE_DISABLE | - r300_translate_gb_pipes(caps->num_frag_pipes)); /* Source of fog depth */ OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); /* AA enable */ -- cgit v1.2.3 From 6a40d1e9d96f8e8c57bc3bbd6f567cacd4471f59 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 17:03:15 -0700 Subject: r300-gallium, radeon-gallium: Nuke gb_pipes from orbit. See the previous commit for an explanation. This is just all the support code for GB_TILE_CONFIG. --- src/gallium/drivers/r300/r300_chipset.c | 1 - src/gallium/drivers/r300/r300_chipset.h | 2 -- src/gallium/drivers/r300/r300_screen.c | 1 - src/gallium/drivers/r300/r300_state_inlines.h | 19 ------------------- src/gallium/drivers/r300/r300_winsys.h | 3 --- src/gallium/winsys/drm/radeon/core/radeon_r300.c | 22 ++-------------------- src/gallium/winsys/drm/radeon/core/radeon_r300.h | 3 --- 7 files changed, 2 insertions(+), 49 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index db09f27bfa..758f706c51 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -34,7 +34,6 @@ void r300_parse_chipset(struct r300_capabilities* caps) caps->is_r500 = FALSE; caps->num_vert_fpus = 4; - /* Note: These are not ordered by PCI ID. I leave that task to GCC, * which will perform the ordering while collating jump tables. Instead, * I've tried to group them according to capabilities and age. */ diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index 21eebeae60..5b2e1f0568 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -34,8 +34,6 @@ struct r300_capabilities { int family; /* The number of vertex floating-point units */ int num_vert_fpus; - /* The number of fragment pipes */ - int num_frag_pipes; /* Whether or not TCL is physically present */ boolean has_tcl; /* Whether or not this is an RV515 or newer; R500s have many differences diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 6fe724cc92..04d6db81b0 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -346,7 +346,6 @@ struct pipe_screen* r300_create_screen(struct r300_winsys* r300_winsys) return NULL; caps->pci_id = r300_winsys->pci_id; - caps->num_frag_pipes = r300_winsys->gb_pipes; r300_parse_chipset(caps); diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index 91b93fc367..22c8e199ae 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -353,25 +353,6 @@ static INLINE uint32_t r300_translate_out_fmt(enum pipe_format format) /* Non-CSO state. (For now.) */ -static INLINE uint32_t r300_translate_gb_pipes(int pipe_count) -{ - switch (pipe_count) { - case 1: - return R300_GB_TILE_PIPE_COUNT_RV300; - break; - case 2: - return R300_GB_TILE_PIPE_COUNT_R300; - break; - case 3: - return R300_GB_TILE_PIPE_COUNT_R420_3P; - break; - case 4: - return R300_GB_TILE_PIPE_COUNT_R420; - break; - } - return 0; -} - static INLINE uint32_t translate_vertex_data_type(int type) { switch (type) { case EMIT_1F: diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index a833bb0399..a5ced8041c 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -45,9 +45,6 @@ struct r300_winsys { /* PCI ID */ uint32_t pci_id; - /* GB pipe count */ - uint32_t gb_pipes; - /* GART size. */ uint32_t gart_size; diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index 56b0d00842..d257e01693 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -161,25 +161,7 @@ static void do_ioctls(struct r300_winsys* winsys, int fd) info.value = ⌖ gp.value = ⌖ - /* First, get the number of pixel pipes */ - info.request = RADEON_INFO_NUM_GB_PIPES; - retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info)); - if (retval) { - fprintf(stderr, "%s: New ioctl for GB pipe count failed " - "(error number %d), trying classic ioctl...\n", - __FUNCTION__, retval); - gp.param = RADEON_PARAM_NUM_GB_PIPES; - retval = drmCommandWriteRead(fd, DRM_RADEON_GETPARAM, &gp, - sizeof(gp)); - if (retval) { - fprintf(stderr, "%s: Failed to get GB pipe count, " - "error number %d\n", __FUNCTION__, retval); - exit(1); - } - } - winsys->gb_pipes = target; - - /* Then, get PCI ID */ + /* First, get PCI ID */ info.request = RADEON_INFO_DEVICE_ID; retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info)); if (retval) { @@ -197,7 +179,7 @@ static void do_ioctls(struct r300_winsys* winsys, int fd) } winsys->pci_id = target; - /* Finally, retrieve MM info */ + /* Then, retrieve MM info */ retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO, &gem_info, sizeof(gem_info)); if (retval) { diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.h b/src/gallium/winsys/drm/radeon/core/radeon_r300.h index 19c7ed2626..a2e0e58248 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.h @@ -32,9 +32,6 @@ #include "radeon_buffer.h" /* protect us from bonghits */ -#ifndef RADEON_INFO_NUM_GB_PIPES -#define RADEON_INFO_NUM_GB_PIPES 0 -#endif #ifndef RADEON_INFO_DEVICE_ID #define RADEON_INFO_DEVICE_ID 0 #endif -- cgit v1.2.3 From 572d7d1358b60c93ec4f1f28151bb0e708a9df17 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 20:49:39 -0700 Subject: r300-gallium: Size mismatch. --- src/gallium/drivers/r300/r300_surface.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index ceaafe11d5..acb6192492 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -147,7 +147,7 @@ static void r300_surface_fill(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); } - BEGIN_CS(24); + BEGIN_CS(26); /* VAP stream control, mapping from input memory to PVS/RS memory */ if (caps->has_tcl) { -- cgit v1.2.3 From 06a7b798f2261a7faaede71946e4489979840713 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 21:10:07 -0700 Subject: r300-gallium: Add half-right COS and SIN. HW trig does a premultiply by 2pi, where Mesa does another premultiply by pi. This is a problem. --- src/gallium/drivers/r300/r300_state_shader.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 7257638dbe..0871aed2b4 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -208,10 +208,12 @@ static INLINE uint32_t r300_alpha_op(unsigned op) static INLINE uint32_t r500_rgba_op(unsigned op) { switch (op) { + case TGSI_OPCODE_COS: case TGSI_OPCODE_EX2: case TGSI_OPCODE_LG2: case TGSI_OPCODE_RCP: case TGSI_OPCODE_RSQ: + case TGSI_OPCODE_SIN: return R500_ALU_RGBA_OP_SOP; case TGSI_OPCODE_FRC: return R500_ALU_RGBA_OP_FRC; @@ -238,6 +240,8 @@ static INLINE uint32_t r500_rgba_op(unsigned op) static INLINE uint32_t r500_alpha_op(unsigned op) { switch (op) { + case TGSI_OPCODE_COS: + return R500_ALPHA_OP_COS; case TGSI_OPCODE_EX2: return R500_ALPHA_OP_EX2; case TGSI_OPCODE_LG2: @@ -248,6 +252,8 @@ static INLINE uint32_t r500_alpha_op(unsigned op) return R500_ALPHA_OP_RSQ; case TGSI_OPCODE_FRC: return R500_ALPHA_OP_FRC; + case TGSI_OPCODE_SIN: + return R500_ALPHA_OP_SIN; case TGSI_OPCODE_DP3: case TGSI_OPCODE_DP4: case TGSI_OPCODE_DPH: @@ -460,6 +466,9 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, * AMD/ATI names for opcodes, please, as it facilitates using the * documentation. */ switch (inst->Instruction.Opcode) { + /* XXX trig needs extra prep */ + case TGSI_OPCODE_COS: + case TGSI_OPCODE_SIN: /* The simple scalar ops. */ case TGSI_OPCODE_EX2: case TGSI_OPCODE_LG2: -- cgit v1.2.3 From 9569221563fd0e9fba564126d61bf3786cf74715 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 21:40:16 -0700 Subject: r300-gallium: r500-fs: DDX and DDY support. Oh, look, GLSL instructions. I wonder what I'll do next. --- src/gallium/drivers/r300/r300_state_shader.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 0871aed2b4..ed99c76c15 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -215,6 +215,10 @@ static INLINE uint32_t r500_rgba_op(unsigned op) case TGSI_OPCODE_RSQ: case TGSI_OPCODE_SIN: return R500_ALU_RGBA_OP_SOP; + case TGSI_OPCODE_DDX: + return R500_ALU_RGBA_OP_MDH; + case TGSI_OPCODE_DDY: + return R500_ALU_RGBA_OP_MDV; case TGSI_OPCODE_FRC: return R500_ALU_RGBA_OP_FRC; case TGSI_OPCODE_DP3: @@ -254,6 +258,10 @@ static INLINE uint32_t r500_alpha_op(unsigned op) return R500_ALPHA_OP_FRC; case TGSI_OPCODE_SIN: return R500_ALPHA_OP_SIN; + case TGSI_OPCODE_DDX: + return R500_ALPHA_OP_MDH; + case TGSI_OPCODE_DDY: + return R500_ALPHA_OP_MDV; case TGSI_OPCODE_DP3: case TGSI_OPCODE_DP4: case TGSI_OPCODE_DPH: @@ -480,6 +488,8 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, inst->FullSrcRegisters[0].SrcRegister.SwizzleW = inst->FullSrcRegisters[0].SrcRegister.SwizzleX; /* Fall through */ + case TGSI_OPCODE_DDX: + case TGSI_OPCODE_DDY: case TGSI_OPCODE_FRC: r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1); -- cgit v1.2.3 From 27206add2738f9813d1e9f42fe3b1bdfbd9b8aa4 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 17 May 2009 21:41:25 -0700 Subject: r300-gallium: Enable GLSL for r500. Before you get all excited, this is *not* to be construed as actual support for GLSL shaders. The GL version is still 1.3, and stuff still sucks. Just flicking it on so that it can be tested and developed a bit easier. --- src/gallium/drivers/r300/r300_screen.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 04d6db81b0..a6f1efe356 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -88,8 +88,11 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) return 0; } case PIPE_CAP_GLSL: - /* IN THEORY */ - return 0; + if (r300screen->caps->is_r500) { + return 1; + } else { + return 0; + } case PIPE_CAP_S3TC: /* IN THEORY */ return 0; -- cgit v1.2.3 From 301d238c1adf3d451b412333a77c81af14feed6f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 18 May 2009 09:40:13 -0700 Subject: r300-gallium: Always do VTE, never software viewport. This makes glxgears draw properly with SW TCL. --- src/gallium/drivers/r300/r300_context.c | 7 +++++++ src/gallium/drivers/r300/r300_context.h | 10 ++++++++++ src/gallium/drivers/r300/r300_emit.c | 6 +++++- src/gallium/drivers/r300/r300_state.c | 8 +++++--- 4 files changed, 27 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index a1cdea30de..21c0fe2b80 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -145,8 +145,15 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.is_texture_referenced = r300_is_texture_referenced; r300->context.is_buffer_referenced = r300_is_buffer_referenced; + /* Create a Draw. This is used for vert collation and SW TCL. */ r300->draw = draw_create(); + /* Enable our renderer. */ draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300)); + /* Tell Draw that we can always do non-UCP clipping. */ + draw_set_driver_clipping(r300->draw, TRUE); + /* Force Draw to never do viewport transform, since (again) we can do + * transform in hardware, always. */ + draw_set_viewport_state(r300->draw, &r300_viewport_identity); r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); r300->rs_block = CALLOC_STRUCT(r300_rs_block); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 96f1f11246..58f1fa0e2e 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -63,6 +63,11 @@ struct r300_rs_state { /* Draw-specific rasterizer state */ struct pipe_rasterizer_state rs; + /* Whether or not to enable the VTE. This is referenced at the very + * last moment during emission of VTE state, to decide whether or not + * the VTE should be used for transformation. */ + boolean enable_vte; + uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */ uint32_t point_minmax; /* R300_GA_POINT_MINMAX: 0x4230 */ @@ -255,6 +260,11 @@ struct r300_vertex_shader { } instructions[128]; /*< XXX magic number */ }; +static struct pipe_viewport_state r300_viewport_identity = { + .scale = {1.0, 1.0, 1.0, 1.0}, + .translate = {0.0, 0.0, 0.0, 0.0}, +}; + struct r300_context { /* Parent class */ struct pipe_context context; diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index b7d1cf8a92..0cb0507fc8 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -429,7 +429,11 @@ void r300_emit_viewport_state(struct r300_context* r300, OUT_CS_32F(viewport->zscale); OUT_CS_32F(viewport->zoffset); - OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control); + if (r300->rs_state->enable_vte) { + OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control); + } else { + OUT_CS_REG(R300_VAP_VTE_CNTL, 0); + } END_CS; } diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index e818a77699..d7825e0e5f 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -343,6 +343,8 @@ static void* r300_create_rs_state(struct pipe_context* pipe, /* Copy rasterizer state for Draw. */ rs->rs = *state; + rs->enable_vte = !state->bypass_vs_clip_and_viewport; + /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL. * Else, enable HW TCL and force Draw's TCL off. */ if (state->bypass_vs_clip_and_viewport || @@ -557,11 +559,11 @@ static void r300_set_viewport_state(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); - draw_flush(r300->draw); + //draw_flush(r300->draw); - if (r300_screen(r300->context.screen)->caps->has_tcl) { + if (TRUE || r300_screen(r300->context.screen)->caps->has_tcl) { /* Do the transform in HW. */ - r300->viewport_state->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT; + r300->viewport_state->vte_control = R300_VTX_W0_FMT; if (state->scale[0] != 1.0f) { assert(state->scale[0] != 0.0f); -- cgit v1.2.3 From 5236ea39006fd0b475ff1658a1418abc71ec998c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 18 May 2009 09:41:21 -0700 Subject: r300-gallium: Cleanup viewport state setup. --- src/gallium/drivers/r300/r300_state.c | 64 +++++++++++++++-------------------- 1 file changed, 28 insertions(+), 36 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index d7825e0e5f..4e65fbbabe 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -559,43 +559,35 @@ static void r300_set_viewport_state(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); - //draw_flush(r300->draw); + /* Do the transform in HW. */ + r300->viewport_state->vte_control = R300_VTX_W0_FMT; - if (TRUE || r300_screen(r300->context.screen)->caps->has_tcl) { - /* Do the transform in HW. */ - r300->viewport_state->vte_control = R300_VTX_W0_FMT; - - if (state->scale[0] != 1.0f) { - assert(state->scale[0] != 0.0f); - r300->viewport_state->xscale = state->scale[0]; - r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA; - } - if (state->scale[1] != 1.0f) { - assert(state->scale[1] != 0.0f); - r300->viewport_state->yscale = state->scale[1]; - r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA; - } - if (state->scale[2] != 1.0f) { - assert(state->scale[2] != 0.0f); - r300->viewport_state->zscale = state->scale[2]; - r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA; - } - if (state->translate[0] != 0.0f) { - r300->viewport_state->xoffset = state->translate[0]; - r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA; - } - if (state->translate[1] != 0.0f) { - r300->viewport_state->yoffset = state->translate[1]; - r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA; - } - if (state->translate[2] != 0.0f) { - r300->viewport_state->zoffset = state->translate[2]; - r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA; - } - } else { - r300->viewport_state->vte_control = 0; - /* Have Draw do the actual transform. */ - draw_set_viewport_state(r300->draw, state); + if (state->scale[0] != 1.0f) { + assert(state->scale[0] != 0.0f); + r300->viewport_state->xscale = state->scale[0]; + r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA; + } + if (state->scale[1] != 1.0f) { + assert(state->scale[1] != 0.0f); + r300->viewport_state->yscale = state->scale[1]; + r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA; + } + if (state->scale[2] != 1.0f) { + assert(state->scale[2] != 0.0f); + r300->viewport_state->zscale = state->scale[2]; + r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA; + } + if (state->translate[0] != 0.0f) { + r300->viewport_state->xoffset = state->translate[0]; + r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA; + } + if (state->translate[1] != 0.0f) { + r300->viewport_state->yoffset = state->translate[1]; + r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA; + } + if (state->translate[2] != 0.0f) { + r300->viewport_state->zoffset = state->translate[2]; + r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA; } r300->dirty_state |= R300_NEW_VIEWPORT; -- cgit v1.2.3 From d0639d067e9b95875b1d395eaa66388884996296 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 18 May 2009 09:50:30 -0700 Subject: r300-gallium: Fix (another) wrong value in MSPOS. Again, thanks to agd5f. --- src/gallium/drivers/r300/r300_state_invariant.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index d74928ceca..9dde662802 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -40,7 +40,7 @@ void r300_emit_invariant_state(struct r300_context* r300) /* Various GB enables */ OUT_CS_REG(R300_GB_ENABLE, 0x0); /* Subpixel multisampling for AA */ - OUT_CS_REG(R300_GB_MSPOS0, 0x6666666); + OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); OUT_CS_REG(R300_GB_MSPOS1, 0x6666666); /* Source of fog depth */ OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); -- cgit v1.2.3 From 4550423211063010a2fa482037d8233bb80e3773 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 07:18:08 -0700 Subject: radeon-gallium: Don't permit reading and writing a BO in one CS. This fixes some silent problems in current libdrm_radeon. surface_copy still locks up hard. --- src/gallium/drivers/r300/r300_cs.h | 5 +++-- src/gallium/winsys/drm/radeon/core/radeon_r300.c | 18 +++++++++++++++++- 2 files changed, 20 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 82a3942248..2abf04d27e 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -93,8 +93,9 @@ } while (0) #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ - debug_printf("r300: writing relocation for buffer %p, offset %d\n", \ - bo, offset); \ + debug_printf("r300: writing relocation for buffer %p, offset %d, " \ + "domains (%d, %d, %d)\n", \ + bo, offset, rd, wd, flags); \ assert(bo); \ OUT_CS(offset); \ cs_winsys->write_cs_reloc(cs_winsys, bo, rd, wd, flags); \ diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index 65366e242c..995bf6aa22 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -69,6 +69,16 @@ static boolean radeon_r300_validate(struct r300_winsys* winsys) return TRUE; } + /* XXX should probably be its own function */ + for (i = 0; i < priv->bo_count; i++) { + if (sc[i].read_domains && sc[i].write_domain) { + /* Cute, cute. We need to flush first. */ + debug_printf("radeon: BO %p can't be read and written; " + "requesting flush.\n", sc[i].bo); + return TRUE; + } + } + /* Things are fine, we can proceed as normal. */ return FALSE; } @@ -109,9 +119,15 @@ static void radeon_r300_write_cs_reloc(struct r300_winsys* winsys, { struct radeon_winsys_priv* priv = (struct radeon_winsys_priv*)winsys->radeon_winsys; + int retval = 0; - radeon_cs_write_reloc(priv->cs, + retval = radeon_cs_write_reloc(priv->cs, ((struct radeon_pipe_buffer*)pbuffer)->bo, rd, wd, flags); + + if (retval) { + debug_printf("radeon: Relocation of %p (%d, %d, %d) failed!\n", + pbuffer, rd, wd, flags); + } } static void radeon_r300_end_cs(struct r300_winsys* winsys, -- cgit v1.2.3 From 65946ef0813e00944763ae959698e281871ee642 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 11:46:26 -0700 Subject: r300-gallium: Make surface_copy work, and refactor buffer validation. --- src/gallium/drivers/r300/r300_emit.c | 13 ++++++--- src/gallium/drivers/r300/r300_surface.c | 50 +++++++++++++++++++++++++-------- 2 files changed, 47 insertions(+), 16 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 0cb0507fc8..5e4b179505 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -452,8 +452,8 @@ void r300_emit_dirty_state(struct r300_context* r300) { struct r300_screen* r300screen = r300_screen(r300->context.screen); struct r300_texture* tex; - int i; - int dirty_tex = 0; + int i, dirty_tex = 0; + boolean invalid = FALSE; if (!(r300->dirty_state)) { return; @@ -462,6 +462,7 @@ void r300_emit_dirty_state(struct r300_context* r300) r300_update_derived_state(r300); /* XXX check size */ +validate: /* Color buffers... */ for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) { tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]->texture; @@ -490,10 +491,14 @@ void r300_emit_dirty_state(struct r300_context* r300) } else { debug_printf("No VBO while emitting dirty state!\n"); } - if (r300->winsys->validate(r300->winsys)) { - /* XXX */ r300->context.flush(&r300->context, 0, NULL); + if (invalid) { + /* Well, hell. */ + exit(1); + } + invalid = TRUE; + goto validate; } if (r300->dirty_state & R300_NEW_BLEND) { diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index acb6192492..7711e8f569 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -32,13 +32,6 @@ static void r300_surface_setup(struct r300_context* r300, unsigned pixpitch = dest->stride / dest->tex.block.size; CS_LOCALS(r300); - /* Make sure our target BO is okay. */ - r300->winsys->add_buffer(r300->winsys, dest->buffer, - 0, RADEON_GEM_DOMAIN_VRAM); - if (r300->winsys->validate(r300->winsys)) { - r300->context.flush(&r300->context, 0, NULL); - } - r300_emit_blend_state(r300, &blend_clear_state); r300_emit_blend_color_state(r300, &blend_color_clear_state); r300_emit_dsa_state(r300, &dsa_clear_state); @@ -106,6 +99,7 @@ static void r300_surface_fill(struct pipe_context* pipe, struct r300_capabilities* caps = r300_screen(pipe->screen)->caps; struct r300_texture* tex = (struct r300_texture*)dest->texture; unsigned pixpitch = tex->stride / tex->tex.block.size; + boolean invalid = FALSE; CS_LOCALS(r300); a = (float)((color >> 24) & 0xff) / 255.0f; @@ -118,11 +112,25 @@ static void r300_surface_fill(struct pipe_context* pipe, /* Fallback? */ if (FALSE) { +fallback: debug_printf("r300: Falling back on surface clear..."); util_surface_fill(pipe, dest, x, y, w, h, color); return; } + /* Make sure our target BO is okay. */ +validate: + r300->winsys->add_buffer(r300->winsys, tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM); + if (r300->winsys->validate(r300->winsys)) { + r300->context.flush(&r300->context, 0, NULL); + if (invalid) { + goto fallback; + } + invalid = TRUE; + goto validate; + } + r300_surface_setup(r300, tex, x, y, w, h); /* Vertex shader setup */ @@ -216,6 +224,7 @@ static void r300_surface_copy(struct pipe_context* pipe, struct r300_texture* srctex = (struct r300_texture*)src->texture; struct r300_texture* desttex = (struct r300_texture*)dest->texture; unsigned pixpitch = srctex->stride / srctex->tex.block.size; + boolean invalid = FALSE; CS_LOCALS(r300); debug_printf("r300: Copying surface %p at (%d,%d) to %p at (%d, %d)," @@ -225,21 +234,38 @@ static void r300_surface_copy(struct pipe_context* pipe, if ((srctex == desttex) && ((destx < srcx + w) || (srcx < destx + w)) && ((desty < srcy + h) || (srcy < desty + h))) { +fallback: debug_printf("r300: Falling back on surface_copy\n"); util_surface_copy(pipe, FALSE, dest, destx, desty, src, srcx, srcy, w, h); } - /* Add our source texture to the BO list before emitting anything. - * r300_surface_setup will flush if needed for us. */ + /* Add our target BOs to the list. */ +validate: r300->winsys->add_buffer(r300->winsys, srctex->buffer, RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + r300->winsys->add_buffer(r300->winsys, desttex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM); + if (r300->winsys->validate(r300->winsys)) { + r300->context.flush(&r300->context, 0, NULL); + if (invalid) { + goto fallback; + } + invalid = TRUE; + goto validate; + } r300_surface_setup(r300, desttex, destx, desty, w, h); + /* Setup the texture. */ r300_emit_sampler(r300, &r300_sampler_copy_state, 0); r300_emit_texture(r300, srctex, 0); - r300_flush_textures(r300); + + /* Flush and enable. */ + BEGIN_CS(4); + OUT_CS_REG(R300_TX_INVALTAGS, 0); + OUT_CS_REG(R300_TX_ENABLE, 0x1); + END_CS; /* Vertex shader setup */ if (caps->has_tcl) { @@ -263,7 +289,7 @@ static void r300_surface_copy(struct pipe_context* pipe, r300_emit_rs_block_state(r300, &r300_rs_block_copy_state); } - BEGIN_CS(28); + BEGIN_CS(30); /* VAP stream control, mapping from input memory to PVS/RS memory */ if (caps->has_tcl) { OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, @@ -287,7 +313,7 @@ static void r300_surface_copy(struct pipe_context* pipe, OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x2); /* Vertex size. */ - OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8); + OUT_CS_REG(R300_VAP_VTX_SIZE, 0x4); /* Packet3 with our texcoords */ OUT_CS_PKT3(R200_3D_DRAW_IMMD_2, 16); -- cgit v1.2.3 From b22b6f074381f3a0cfb9b6c3f45eaa533c1a0426 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 12:08:00 -0700 Subject: r300-gallium: Add missing R481 PCI ID. Per 74cb2aba on xf86-video-ati. --- src/gallium/drivers/r300/r300_chipset.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 758f706c51..00fae8d26f 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -149,6 +149,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) caps->num_vert_fpus = 6; break; + case 0x4B48: case 0x4B49: case 0x4B4A: case 0x4B4B: -- cgit v1.2.3 From 9e8de1b91136d056ee29e1a448196b5648ac2b3f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 12:22:24 -0700 Subject: r300-gallium: Make surface_copy actually load the texture in shader. --- src/gallium/drivers/r300/r300_reg.h | 1 + src/gallium/drivers/r300/r300_state_shader.h | 2 +- src/gallium/drivers/r300/r300_surface.h | 4 ++-- 3 files changed, 4 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 660816e1da..920584a59e 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -3040,6 +3040,7 @@ enum { # define R500_INST_RGB_WMASK_R (1 << 11) # define R500_INST_RGB_WMASK_G (1 << 12) # define R500_INST_RGB_WMASK_B (1 << 13) +# define R500_INST_RGB_WMASK_RGB (7 << 11) # define R500_INST_ALPHA_WMASK (1 << 14) # define R500_INST_RGB_OMASK_R (1 << 15) # define R500_INST_RGB_OMASK_G (1 << 16) diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h index 06260e61fe..b6087404ce 100644 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ b/src/gallium/drivers/r300/r300_state_shader.h @@ -181,7 +181,7 @@ static struct r500_fragment_shader r500_texture_fragment_shader = { .instruction_count = 2, .instructions[0].inst0 = R500_INST_TYPE_TEX | R500_INST_TEX_SEM_WAIT | - R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_WMASK_RGB | R500_INST_ALPHA_WMASK | R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, .instructions[0].inst1 = R500_TEX_ID(0) | R500_TEX_INST_LD | R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED, diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 894def07aa..9a4c39f58b 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -101,7 +101,7 @@ static struct r300_rs_block r300_rs_block_copy_state = { R500_RS_SEL_Q(R300_RS_SEL_K1), .inst[0] = R300_RS_INST_COL_CN_WRITE, .count = R300_IT_COUNT(2) | R300_IC_COUNT(0) | R300_HIRES_EN, - .inst_count = R300_RS_TX_OFFSET(6), + .inst_count = R300_RS_TX_OFFSET(0), }; static struct r300_rs_block r500_rs_block_copy_state = { @@ -111,7 +111,7 @@ static struct r300_rs_block r500_rs_block_copy_state = { R500_RS_SEL_Q(R500_RS_IP_PTR_K1), .inst[0] = R500_RS_INST_TEX_CN_WRITE, .count = R300_IT_COUNT(2) | R300_IC_COUNT(0) | R300_HIRES_EN, - .inst_count = R300_RS_TX_OFFSET(6), + .inst_count = R300_RS_TX_OFFSET(0), }; static struct r300_sampler_state r300_sampler_copy_state = { -- cgit v1.2.3 From 364a4a829341b3691b4d1e559d5cc3c178147b97 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 14:17:27 -0700 Subject: r300-gallium: fs: Remove cruft from way back when. --- src/gallium/drivers/r300/r300_state_shader.c | 18 ------------------ 1 file changed, 18 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index ed99c76c15..a56b507eef 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -22,24 +22,6 @@ #include "r300_state_shader.h" -static void r300_copy_passthrough_shader(struct r300_fragment_shader* fs) -{ - struct r300_fragment_shader* pt = &r300_passthrough_fragment_shader; - fs->shader.stack_size = pt->shader.stack_size; - fs->alu_instruction_count = pt->alu_instruction_count; - fs->tex_instruction_count = pt->tex_instruction_count; - fs->indirections = pt->indirections; - fs->instructions[0] = pt->instructions[0]; -} - -static void r500_copy_passthrough_shader(struct r500_fragment_shader* fs) -{ - struct r500_fragment_shader* pt = &r500_passthrough_fragment_shader; - fs->shader.stack_size = pt->shader.stack_size; - fs->instruction_count = pt->instruction_count; - fs->instructions[0] = pt->instructions[0]; -} - static void r300_fs_declare(struct r300_fs_asm* assembler, struct tgsi_full_declaration* decl) { -- cgit v1.2.3 From 4151c0ea91212ac5ec73fa6d1936df9254978672 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 14:38:22 -0700 Subject: r300-gallium: Raise constantbuf limits. Still not correct, but really I don't care. --- src/gallium/drivers/r300/r300_context.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 58f1fa0e2e..d1cf75032c 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -141,11 +141,11 @@ struct r300_viewport_state { struct r300_constant_buffer { /* Buffer of constants */ /* XXX first number should be raised */ - float constants[8][4]; + float constants[32][4]; /* Number of user-defined constants */ - int user_count; + unsigned user_count; /* Total number of constants */ - int count; + unsigned count; }; struct r3xx_fragment_shader { -- cgit v1.2.3 From d04c85d01bf37d480df8b9a21d9a79194d2e67f3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 14:55:03 -0700 Subject: r300-gallium: Another constantbuf shader recompile test. Less briefly... Shaders need to be recompiled if their constantbuf offsets have changed. However, since we only change them from shaders if immediates need to be emitted, we shouldn't bother if the shader doesn't use immediates. --- src/gallium/drivers/r300/r300_context.h | 8 ++++++++ src/gallium/drivers/r300/r300_state.c | 6 ++++-- src/gallium/drivers/r300/r300_state_shader.c | 1 + src/gallium/drivers/r300/r300_state_tcl.c | 1 + 4 files changed, 14 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index d1cf75032c..a9dd041e08 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -158,6 +158,10 @@ struct r3xx_fragment_shader { /* Pixel stack size */ int stack_size; + + /* Are there immediates in this shader? + * If not, we can heavily optimize recompilation. */ + boolean uses_imms; }; struct r300_fragment_shader { @@ -248,6 +252,10 @@ struct r300_vertex_shader { /* Has this shader been translated yet? */ boolean translated; + /* Are there immediates in this shader? + * If not, we can heavily optimize recompilation. */ + boolean uses_imms; + /* Number of used instructions */ int instruction_count; diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 4e65fbbabe..0461ffd681 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -151,10 +151,12 @@ static void /* If the number of constants have changed, invalidate the shader. */ if (r300->shader_constants[shader].user_count != i) { - if (shader == PIPE_SHADER_FRAGMENT && r300->fs) { + if (shader == PIPE_SHADER_FRAGMENT && r300->fs && + r300->fs->uses_imms) { r300->fs->translated = FALSE; r300_translate_fragment_shader(r300, r300->fs); - } else if (shader == PIPE_SHADER_VERTEX && r300->vs) { + } else if (shader == PIPE_SHADER_VERTEX && r300->vs && + r300->vs->uses_imms) { r300->vs->translated = FALSE; r300_translate_vertex_shader(r300, r300->vs); } diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index a56b507eef..f27d7233d8 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -652,6 +652,7 @@ void r300_translate_fragment_shader(struct r300_context* r300, assembler->tex_count + assembler->color_count); consts->count = consts->user_count + assembler->imm_count; + fs->uses_imms = assembler->imm_count; debug_printf("r300: fs: %d total constants, " "%d from user and %d from immediates\n", consts->count, consts->user_count, assembler->imm_count); diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index fdbcbf3db8..32e61bc1d7 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -386,6 +386,7 @@ void r300_translate_vertex_shader(struct r300_context* r300, assembler->tex_count + assembler->color_count); consts->count = consts->user_count + assembler->imm_count; + vs->uses_imms = assembler->imm_count; debug_printf("r300: vs: %d total constants, " "%d from user and %d from immediates\n", consts->count, consts->user_count, assembler->imm_count); -- cgit v1.2.3 From d67fb5ea1d93db3f64720994017c312a04867eea Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 15:02:45 -0700 Subject: r300-gallium: Prevent assert when fogcoords are present. Seems like this file is the source of all bad logic. (Pun intended.) --- src/gallium/drivers/r300/r300_state_derived.c | 18 +++++++++++++----- src/gallium/drivers/r300/r300_state_shader.c | 1 + 2 files changed, 14 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index caa5f3b543..7ae339cf97 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -64,6 +64,7 @@ static void r300_vs_tab_routes(struct r300_context* r300, break; case TGSI_SEMANTIC_FOG: fog = TRUE; + /* Fall through */ case TGSI_SEMANTIC_GENERIC: texs++; break; @@ -103,6 +104,9 @@ static void r300_vs_tab_routes(struct r300_context* r300, } } + /* XXX magic */ + assert(texs <= 8); + /* Do the actual vertex_info setup. * * vertex_info has four uints of hardware-specific data in it. @@ -140,17 +144,21 @@ static void r300_vs_tab_routes(struct r300_context* r300, vinfo->hwfmt[2] |= (R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i); } - for (i = 0; i < texs; i++) { + /* Init i right here, increment it if fog is enabled. + * This gets around a double-increment problem. */ + i = 0; + + if (fog) { + i++; draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, - draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i)); + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0)); vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); vinfo->hwfmt[3] |= (4 << (3 * i)); } - if (fog) { - i++; + for (i; i < texs; i++) { draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, - draw_find_vs_output(r300->draw, TGSI_SEMANTIC_FOG, 0)); + draw_find_vs_output(r300->draw, TGSI_SEMANTIC_GENERIC, i)); vinfo->hwfmt[1] |= (R300_INPUT_CNTL_TC0 << i); vinfo->hwfmt[3] |= (4 << (3 * i)); } diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index f27d7233d8..d087771c3e 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -31,6 +31,7 @@ static void r300_fs_declare(struct r300_fs_asm* assembler, case TGSI_SEMANTIC_COLOR: assembler->color_count++; break; + case TGSI_SEMANTIC_FOG: case TGSI_SEMANTIC_GENERIC: assembler->tex_count++; break; -- cgit v1.2.3 From f1f0893eba6a3785d309f60ce4027980237fb8a6 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 16:53:45 -0700 Subject: r300-gallium: r500-fs: Combine function. --- src/gallium/drivers/r300/r300_state_shader.c | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index d087771c3e..8a3e380eec 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -306,9 +306,12 @@ static INLINE void r300_emit_maths(struct r300_fragment_shader* fs, } /* Setup an ALU operation. */ -static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_dst_register* dst) +static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst, + unsigned op, + unsigned count) { int i = fs->instruction_count; @@ -331,18 +334,6 @@ static INLINE void r500_emit_alu(struct r500_fragment_shader* fs, R500_ALPHA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); fs->instructions[i].inst5 = R500_ALU_RGBA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); -} - -static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst, - unsigned op, - unsigned count) -{ - int i = fs->instruction_count; - - r500_emit_alu(fs, assembler, dst); switch (count) { case 3: -- cgit v1.2.3 From cfd241e8a68bc04f0f82960eae9ff1ec01384b67 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 21:52:11 -0700 Subject: r300-gallium: r500-fs: LRP. Goddammit. This cannot be the "easy way." :C --- src/gallium/drivers/r300/r300_state_shader.c | 36 ++++++++++++++++++++++++---- 1 file changed, 32 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index 8a3e380eec..cf9eeb4201 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -355,8 +355,8 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, R500_ALU_RGB_SEL_B_SRC1 | R500_SWIZ_RGB_B(r500_rgb_swiz(&src[1])); fs->instructions[i].inst4 |= - R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src[1])) | - R500_ALPHA_SEL_B_SRC1; + R500_ALPHA_SEL_B_SRC1 | + R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src[1])); case 1: case 0: default: @@ -368,8 +368,8 @@ static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, R500_ALU_RGB_SEL_A_SRC0 | R500_SWIZ_RGB_A(r500_rgb_swiz(&src[0])); fs->instructions[i].inst4 |= - R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src[0])) | - R500_ALPHA_SEL_A_SRC0; + R500_ALPHA_SEL_A_SRC0 | + R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src[0])); break; } @@ -539,6 +539,34 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); break; + /* The compound and hybrid insts. */ + case TGSI_OPCODE_LRP: + /* LRP DST A, B, C -> MAD TMP -A, C, C; MAD DST A, B, TMP */ + inst->FullSrcRegisters[3] = inst->FullSrcRegisters[1]; + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[2]; + inst->FullSrcRegisters[0].SrcRegister.Negate = + !(inst->FullSrcRegisters[0].SrcRegister.Negate); + inst->FullDstRegisters[1] = inst->FullDstRegisters[0]; + inst->FullDstRegisters[0].DstRegister.Index = + assembler->temp_count; + inst->FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); + inst->FullSrcRegisters[2].SrcRegister.Index = + assembler->temp_count; + inst->FullSrcRegisters[2].SrcRegister.File = TGSI_FILE_TEMPORARY; + inst->FullSrcRegisters[2].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; + inst->FullSrcRegisters[2].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y; + inst->FullSrcRegisters[2].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z; + inst->FullSrcRegisters[2].SrcRegister.SwizzleW = TGSI_SWIZZLE_W; + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[3]; + inst->FullSrcRegisters[0].SrcRegister.Negate = + !(inst->FullSrcRegisters[0].SrcRegister.Negate); + inst->FullDstRegisters[0] = inst->FullDstRegisters[1]; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); + break; + /* The texture instruction set. */ case TGSI_OPCODE_KIL: case TGSI_OPCODE_TEX: -- cgit v1.2.3 From 3af0952bc9bade8d5a5c60349c045b28762f8815 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 20 May 2009 23:22:16 -0700 Subject: r300-gallium: r500-fs: POW. I feel so unclean. --- src/gallium/drivers/r300/r300_state_shader.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c index cf9eeb4201..cc7f6a7c4b 100644 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ b/src/gallium/drivers/r300/r300_state_shader.c @@ -566,6 +566,32 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, r500_emit_maths(fs, assembler, inst->FullSrcRegisters, &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); break; + case TGSI_OPCODE_POW: + /* POW DST A, B -> LG2 TMP A; MUL TMP TMP, B; EX2 DST TMP */ + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX; + inst->FullSrcRegisters[0].SrcRegister.SwizzleW = + inst->FullSrcRegisters[0].SrcRegister.SwizzleX; + inst->FullDstRegisters[1] = inst->FullDstRegisters[0]; + inst->FullDstRegisters[0].DstRegister.Index = + assembler->temp_count; + inst->FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_LG2, 1); + inst->FullSrcRegisters[0].SrcRegister.Index = + assembler->temp_count; + inst->FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY; + inst->FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; + inst->FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y; + inst->FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z; + inst->FullSrcRegisters[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_W; + inst->FullSrcRegisters[2] = r500_constant_zero; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_MUL, 3); + inst->FullDstRegisters[0] = inst->FullDstRegisters[1]; + r500_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_EX2, 1); + break; /* The texture instruction set. */ case TGSI_OPCODE_KIL: @@ -595,7 +621,7 @@ static void r500_fs_instruction(struct r500_fragment_shader* fs, static void r300_fs_finalize(struct r3xx_fragment_shader* fs, struct r300_fs_asm* assembler) { - fs->stack_size = assembler->temp_count + assembler->temp_offset; + fs->stack_size = assembler->temp_count + assembler->temp_offset + 1; } static void r500_fs_finalize(struct r500_fragment_shader* fs, -- cgit v1.2.3 From b70fcd620d69850c6e19213d84ae4584e77ab689 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 28 May 2009 07:46:34 -0700 Subject: r300-gallium, radeon-gallium: Make add_buffer indicate when a flush is needed. On a side note, why is RADEON_MAX_BOS 24? Should ask airlied about that. --- src/gallium/drivers/r300/r300_emit.c | 28 +++++++++++++++++------- src/gallium/drivers/r300/r300_surface.c | 21 +++++++++++++----- src/gallium/drivers/r300/r300_winsys.h | 8 +++---- src/gallium/winsys/drm/radeon/core/radeon_r300.c | 16 +++++++++----- 4 files changed, 50 insertions(+), 23 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 5e4b179505..caeb73a8ed 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -467,27 +467,39 @@ validate: for (i = 0; i < r300->framebuffer_state.nr_cbufs; i++) { tex = (struct r300_texture*)r300->framebuffer_state.cbufs[i]->texture; assert(tex && tex->buffer && "cbuf is marked, but NULL!"); - r300->winsys->add_buffer(r300->winsys, tex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM); + if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } } /* ...depth buffer... */ if (r300->framebuffer_state.zsbuf) { tex = (struct r300_texture*)r300->framebuffer_state.zsbuf->texture; assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); - r300->winsys->add_buffer(r300->winsys, tex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM); + if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } } /* ...textures... */ for (i = 0; i < r300->texture_count; i++) { tex = r300->textures[i]; assert(tex && tex->buffer && "texture is marked, but NULL!"); - r300->winsys->add_buffer(r300->winsys, tex->buffer, - RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } } /* ...and vertex buffer. */ if (r300->vbo) { - r300->winsys->add_buffer(r300->winsys, r300->vbo, - RADEON_GEM_DOMAIN_GTT, 0); + if (!r300->winsys->add_buffer(r300->winsys, r300->vbo, + RADEON_GEM_DOMAIN_GTT, 0)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } } else { debug_printf("No VBO while emitting dirty state!\n"); } diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 7711e8f569..c9e2dff14e 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -120,8 +120,11 @@ fallback: /* Make sure our target BO is okay. */ validate: - r300->winsys->add_buffer(r300->winsys, tex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM); + if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } if (r300->winsys->validate(r300->winsys)) { r300->context.flush(&r300->context, 0, NULL); if (invalid) { @@ -242,10 +245,16 @@ fallback: /* Add our target BOs to the list. */ validate: - r300->winsys->add_buffer(r300->winsys, srctex->buffer, - RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); - r300->winsys->add_buffer(r300->winsys, desttex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM); + if (!r300->winsys->add_buffer(r300->winsys, srctex->buffer, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } + if (!r300->winsys->add_buffer(r300->winsys, desttex->buffer, + 0, RADEON_GEM_DOMAIN_VRAM)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } if (r300->winsys->validate(r300->winsys)) { r300->context.flush(&r300->context, 0, NULL); if (invalid) { diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index a5ced8041c..d2893c3b9d 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -52,10 +52,10 @@ struct r300_winsys { uint32_t vram_size; /* Add a pipe_buffer to the list of buffer objects to validate. */ - void (*add_buffer)(struct r300_winsys* winsys, - struct pipe_buffer* pbuffer, - uint32_t rd, - uint32_t wd); + boolean (*add_buffer)(struct r300_winsys* winsys, + struct pipe_buffer* pbuffer, + uint32_t rd, + uint32_t wd); /* Revalidate all currently setup pipe_buffers. * Returns TRUE if a flush is required. */ diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index 995bf6aa22..63aa3179ac 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -22,10 +22,10 @@ #include "radeon_r300.h" -static void radeon_r300_add_buffer(struct r300_winsys* winsys, - struct pipe_buffer* pbuffer, - uint32_t rd, - uint32_t wd) +static boolean radeon_r300_add_buffer(struct r300_winsys* winsys, + struct pipe_buffer* pbuffer, + uint32_t rd, + uint32_t wd) { int i; struct radeon_winsys_priv* priv = @@ -35,7 +35,6 @@ static void radeon_r300_add_buffer(struct r300_winsys* winsys, /* Check to see if this BO is already in line for validation; * find a slot for it otherwise. */ - assert(priv->bo_count <= RADEON_MAX_BOS); for (i = 0; i < priv->bo_count; i++) { if (sc[i].bo == bo) { sc[i].read_domains |= rd; @@ -44,10 +43,17 @@ static void radeon_r300_add_buffer(struct r300_winsys* winsys, } } + if (priv->bo_count >= RADEON_MAX_BOS) { + /* Dohoho. Not falling for that one again. Request a flush. */ + return FALSE; + } + sc[priv->bo_count].bo = bo; sc[priv->bo_count].read_domains = rd; sc[priv->bo_count].write_domain = wd; priv->bo_count++; + + return TRUE; } static boolean radeon_r300_validate(struct r300_winsys* winsys) -- cgit v1.2.3 From 1fa023ae48c31176434f5ad4691eae347e7a395f Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 1 Jun 2009 12:04:29 -0700 Subject: r300-gallium: Slightly hacky fix for glxgears-style TCL. --- src/gallium/drivers/r300/r300_state_derived.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 7ae339cf97..2477b30822 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -163,6 +163,13 @@ static void r300_vs_tab_routes(struct r300_context* r300, vinfo->hwfmt[3] |= (4 << (3 * i)); } + /* Handle the case where the vertex shader will be generating some of + * the attribs based on its inputs. */ + if (r300screen->caps->has_tcl && + info->num_inputs < info->num_outputs) { + vinfo->num_attribs = info->num_inputs; + } + draw_compute_vertex_size(vinfo); } -- cgit v1.2.3 From 45b77830eb6fa1b712b0416a27990ad8b6eaf78b Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Tue, 2 Jun 2009 22:23:17 +0200 Subject: r300-gallium: strip swtcl to the bare minimum This was originally taken from i915 and it shows. Basically most the stuff in r300_render.c was never needed and shouldn't have worked in the first place --- src/gallium/drivers/r300/r300_render.c | 56 +++++++++++++--------------------- 1 file changed, 22 insertions(+), 34 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index 29b66cee7e..cd458d019a 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -45,11 +45,7 @@ struct r300_render { /* VBO */ struct pipe_buffer* vbo; - size_t vbo_size; - size_t vbo_offset; - void* vbo_map; size_t vbo_alloc_size; - size_t vbo_max_used; }; static INLINE struct r300_render* @@ -78,24 +74,21 @@ static boolean r300_render_allocate_vertices(struct vbuf_render* render, struct pipe_screen* screen = r300->context.screen; size_t size = (size_t)vertex_size * (size_t)count; - if (r300render->vbo) { + if (r300render->vbo && (size > r300render->vbo_alloc_size)) { pipe_buffer_reference(&r300render->vbo, NULL); } + + if (!r300render->vbo) { + r300render->vbo = pipe_buffer_create(screen, + 64, + PIPE_BUFFER_USAGE_VERTEX, + size); + } - r300render->vbo_size = MAX2(size, r300render->vbo_alloc_size); - r300render->vbo_offset = 0; - r300render->vbo = pipe_buffer_create(screen, - 64, - PIPE_BUFFER_USAGE_VERTEX, - r300render->vbo_size); - + r300render->vbo_alloc_size = MAX2(size, r300render->vbo_alloc_size); r300render->vertex_size = vertex_size; - if (r300render->vbo) { - return TRUE; - } else { - return FALSE; - } + return (r300render->vbo) ? TRUE : FALSE; } static void* r300_render_map_vertices(struct vbuf_render* render) @@ -103,10 +96,8 @@ static void* r300_render_map_vertices(struct vbuf_render* render) struct r300_render* r300render = r300_render(render); struct pipe_screen* screen = r300render->r300->context.screen; - r300render->vbo_map = pipe_buffer_map(screen, r300render->vbo, - PIPE_BUFFER_USAGE_CPU_WRITE); - - return (unsigned char*)r300render->vbo_map + r300render->vbo_offset; + return (unsigned char*)pipe_buffer_map(screen, r300render->vbo, + PIPE_BUFFER_USAGE_CPU_WRITE); } static void r300_render_unmap_vertices(struct vbuf_render* render, @@ -116,9 +107,6 @@ static void r300_render_unmap_vertices(struct vbuf_render* render, struct r300_render* r300render = r300_render(render); struct pipe_screen* screen = r300render->r300->context.screen; - r300render->vbo_max_used = MAX2(r300render->vbo_max_used, - r300render->vertex_size * (max + 1)); - pipe_buffer_unmap(screen, r300render->vbo); } @@ -181,7 +169,6 @@ static void prepare_render(struct r300_render* render, unsigned count) CS_LOCALS(r300); r300->vbo = render->vbo; - r300->vbo_offset = render->vbo_offset; r300_emit_dirty_state(r300); } @@ -195,8 +182,6 @@ static void r300_render_draw_arrays(struct vbuf_render* render, CS_LOCALS(r300); - r300render->vbo_offset = start; - prepare_render(r300render, count); debug_printf("r300: Doing vbuf render, count %d\n", count); @@ -231,13 +216,14 @@ static void r300_render_draw(struct vbuf_render* render, return; } +/* index_map = pipe_buffer_map(screen, index_buffer, PIPE_BUFFER_USAGE_CPU_WRITE); memcpy(index_map, indices, count); pipe_buffer_unmap(screen, index_buffer); debug_printf("r300: Doing indexbuf render, count %d\n", count); -/* + BEGIN_CS(8); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | @@ -247,13 +233,15 @@ static void r300_render_draw(struct vbuf_render* render, OUT_CS_INDEX_RELOC(index_buffer, 0, count, RADEON_GEM_DOMAIN_GTT, 0, 0); END_CS; */ - BEGIN_CS(2 + count); - OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, count); + BEGIN_CS(2 + (count+1)/2); + OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | - r300render->hwprim | R300_VAP_VF_CNTL__INDEX_SIZE_32bit); - for (i = 0; i < count; i++) { - index = indices[i]; - OUT_CS(index); + r300render->hwprim); + for (i = 0; i < count-1; i += 2) { + OUT_CS(indices[i+1] << 16 | indices[i]); + } + if (count % 2) { + OUT_CS(indices[count-1]); } END_CS; } -- cgit v1.2.3 From fb7d1fb0f0ce4137b6cb84198997241d190d13a8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 4 Jun 2009 21:38:33 -0700 Subject: r300: Moar vs debug. --- src/gallium/drivers/r300/r300_debug.c | 19 ++++++++++++++++--- src/gallium/drivers/r300/r300_debug.h | 12 ++++++++++++ 2 files changed, 28 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index ffc93eb591..32fa739a1e 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -165,14 +165,27 @@ static void r300_vs_op_dump(uint32_t op) } } +void r300_vs_src_dump(uint32_t src) +{ + debug_printf(" %s/%s/%s/%s\n", + r300_vs_swiz_debug[(src >> 13) & 0x7], + r300_vs_swiz_debug[(src >> 16) & 0x7], + r300_vs_swiz_debug[(src >> 19) & 0x7], + r300_vs_swiz_debug[(src >> 22) & 0x7]); +} + void r300_vs_dump(struct r300_vertex_shader* vs) { int i; for (i = 0; i < vs->instruction_count; i++) { + debug_printf("%d: op: 0x%08x", i, vs->instructions[i].inst0); r300_vs_op_dump(vs->instructions[i].inst0); - debug_printf("inst1: 0x%x\n", vs->instructions[i].inst1); - debug_printf("inst2: 0x%x\n", vs->instructions[i].inst2); - debug_printf("inst3: 0x%x\n", vs->instructions[i].inst3); + debug_printf(" src0: 0x%08x", vs->instructions[i].inst1); + r300_vs_src_dump(vs->instructions[i].inst1); + debug_printf(" src1: 0x%08x", vs->instructions[i].inst2); + r300_vs_src_dump(vs->instructions[i].inst2); + debug_printf(" src2: 0x%08x", vs->instructions[i].inst3); + r300_vs_src_dump(vs->instructions[i].inst3); } } diff --git a/src/gallium/drivers/r300/r300_debug.h b/src/gallium/drivers/r300/r300_debug.h index 6306594099..3939d834c2 100644 --- a/src/gallium/drivers/r300/r300_debug.h +++ b/src/gallium/drivers/r300/r300_debug.h @@ -173,6 +173,18 @@ static char* r300_vs_me_ops[] = { " (reserved)", }; +/* XXX refactor to avoid clashing symbols */ +static char* r300_vs_swiz_debug[] = { + "X", + "Y", + "Z", + "W", + "0", + "1", + "U", + "U", +}; + void r500_fs_dump(struct r500_fragment_shader* fs); void r300_vs_dump(struct r300_vertex_shader* vs); -- cgit v1.2.3 From 31609acbe9d80daea49e98f026196023a20258a0 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 4 Jun 2009 22:41:33 -0700 Subject: r300-gallium: vs: Add negation, SUB. Doesn't work. WTF. --- src/gallium/drivers/r300/r300_debug.c | 6 +++++- src/gallium/drivers/r300/r300_state_tcl.c | 17 +++++++++++++---- src/gallium/drivers/r300/r300_state_tcl.h | 7 +++++++ 3 files changed, 25 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index 32fa739a1e..1a8c17b28d 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -167,10 +167,14 @@ static void r300_vs_op_dump(uint32_t op) void r300_vs_src_dump(uint32_t src) { - debug_printf(" %s/%s/%s/%s\n", + debug_printf(" %s%s/%s%s/%s%s/%s%s\n", + src & (1 << 25) ? "-" : " ", r300_vs_swiz_debug[(src >> 13) & 0x7], + src & (1 << 26) ? "-" : " ", r300_vs_swiz_debug[(src >> 16) & 0x7], + src & (1 << 27) ? "-" : " ", r300_vs_swiz_debug[(src >> 19) & 0x7], + src & (1 << 28) ? "-" : " ", r300_vs_swiz_debug[(src >> 22) & 0x7]); } diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index 32e61bc1d7..30a8dab307 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -144,6 +144,7 @@ static uint32_t r300_vs_op(unsigned op) return R300_VE_MULTIPLY; case TGSI_OPCODE_ADD: case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SUB: case TGSI_OPCODE_SWZ: return R300_VE_ADD; case TGSI_OPCODE_MAX: @@ -163,12 +164,14 @@ static uint32_t r300_vs_op(unsigned op) static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) { if (reg->SrcRegister.Extended) { - return reg->SrcRegisterExtSwz.ExtSwizzleX | + return (reg->SrcRegister.Negate ? R300_PVS_NEGATE_XYZW : 0) | + reg->SrcRegisterExtSwz.ExtSwizzleX | (reg->SrcRegisterExtSwz.ExtSwizzleY << 3) | (reg->SrcRegisterExtSwz.ExtSwizzleZ << 6) | (reg->SrcRegisterExtSwz.ExtSwizzleW << 9); } else { - return reg->SrcRegister.SwizzleX | + return (reg->SrcRegister.Negate ? R300_PVS_NEGATE_XYZW : 0) | + reg->SrcRegister.SwizzleX | (reg->SrcRegister.SwizzleY << 3) | (reg->SrcRegister.SwizzleZ << 6) | (reg->SrcRegister.SwizzleW << 9); @@ -179,12 +182,14 @@ static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) static uint32_t r300_vs_scalar_swiz(struct tgsi_full_src_register* reg) { if (reg->SrcRegister.Extended) { - return reg->SrcRegisterExtSwz.ExtSwizzleX | + return (reg->SrcRegister.Negate ? R300_PVS_NEGATE_XYZW : 0) | + reg->SrcRegisterExtSwz.ExtSwizzleX | (reg->SrcRegisterExtSwz.ExtSwizzleX << 3) | (reg->SrcRegisterExtSwz.ExtSwizzleX << 6) | (reg->SrcRegisterExtSwz.ExtSwizzleX << 9); } else { - return reg->SrcRegister.SwizzleX | + return (reg->SrcRegister.Negate ? R300_PVS_NEGATE_XYZW : 0) | + reg->SrcRegister.SwizzleX | (reg->SrcRegister.SwizzleX << 3) | (reg->SrcRegister.SwizzleX << 6) | (reg->SrcRegister.SwizzleX << 9); @@ -246,6 +251,10 @@ static void r300_vs_instruction(struct r300_vertex_shader* vs, &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1, TRUE); break; + case TGSI_OPCODE_SUB: + inst->FullSrcRegisters[1].SrcRegister.Negate = + !inst->FullSrcRegisters[1].SrcRegister.Negate; + /* Fall through */ case TGSI_OPCODE_ADD: case TGSI_OPCODE_MUL: case TGSI_OPCODE_MAX: diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h index d5d425e9d6..2c8b586c2f 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ b/src/gallium/drivers/r300/r300_state_tcl.h @@ -76,6 +76,13 @@ ((R300_PVS_SRC_SELECT_FORCE_1 | (R300_PVS_SRC_SELECT_FORCE_1 << 3) | \ (R300_PVS_SRC_SELECT_FORCE_1 << 6) | \ (R300_PVS_SRC_SELECT_FORCE_1 << 9)) << 13) +#define R300_PVS_MODIFIER_X (1 << 25) +#define R300_PVS_MODIFIER_Y (1 << 26) +#define R300_PVS_MODIFIER_Z (1 << 27) +#define R300_PVS_MODIFIER_W (1 << 28) +#define R300_PVS_NEGATE_XYZW \ + (R300_PVS_MODIFIER_X | R300_PVS_MODIFIER_Y | \ + R300_PVS_MODIFIER_Z | R300_PVS_MODIFIER_W) static const struct tgsi_full_src_register r300_constant_zero = { .SrcRegister.Extended = TRUE, -- cgit v1.2.3 From 8652ad68992a63a275bdc3816540c39776b143b2 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 4 Jun 2009 23:25:46 -0700 Subject: r300-gallium: Improve vs debug more. Still not showing me why my stuff's failing, but getting there. --- src/gallium/drivers/r300/r300_debug.c | 5 ++++- src/gallium/drivers/r300/r300_debug.h | 18 ++++++++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index 1a8c17b28d..678cd2b812 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -152,6 +152,8 @@ void r500_fs_dump(struct r500_fragment_shader* fs) static void r300_vs_op_dump(uint32_t op) { + debug_printf(" dst: %d%s op: ", + (op >> 13) & 0x7f, r300_vs_dst_debug[(op >> 8) & 0x7]); if (op & 0x80) { if (op & 0x1) { debug_printf("PVS_MACRO_OP_2CLK_M2X_ADD\n"); @@ -167,7 +169,8 @@ static void r300_vs_op_dump(uint32_t op) void r300_vs_src_dump(uint32_t src) { - debug_printf(" %s%s/%s%s/%s%s/%s%s\n", + debug_printf(" reg: %d%s swiz: %s%s/%s%s/%s%s/%s%s\n", + (src >> 5) & 0x7f, r300_vs_src_debug[src & 0x3], src & (1 << 25) ? "-" : " ", r300_vs_swiz_debug[(src >> 13) & 0x7], src & (1 << 26) ? "-" : " ", diff --git a/src/gallium/drivers/r300/r300_debug.h b/src/gallium/drivers/r300/r300_debug.h index 3939d834c2..c86410ec0a 100644 --- a/src/gallium/drivers/r300/r300_debug.h +++ b/src/gallium/drivers/r300/r300_debug.h @@ -174,6 +174,24 @@ static char* r300_vs_me_ops[] = { }; /* XXX refactor to avoid clashing symbols */ +static char* r300_vs_src_debug[] = { + "t", + "i", + "c", + "a", +}; + +static char* r300_vs_dst_debug[] = { + "t", + "a0", + "o", + "ox", + "a", + "i", + "u", + "u", +}; + static char* r300_vs_swiz_debug[] = { "X", "Y", -- cgit v1.2.3 From 571b36831bed3c8dd5691cad5b544667d07c60b0 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 4 Jun 2009 23:56:08 -0700 Subject: r300-gallium: Fix pasta. Trivial but annoying. --- src/gallium/drivers/r300/r300_emit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index caeb73a8ed..61b416663b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -374,7 +374,7 @@ void r300_emit_vertex_shader(struct r300_context* r300, if (constants->count) { BEGIN_CS(16 + (vs->instruction_count * 4) + (constants->count * 4)); } else { - BEGIN_CS(13 + (vs->instruction_count * 4) + (constants->count * 4)); + BEGIN_CS(13 + (vs->instruction_count * 4)); } OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) | -- cgit v1.2.3 From 4c66c5bf921357c94611e583d1a64f653e957765 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 4 Jun 2009 23:56:32 -0700 Subject: r300-gallium: vs: Fix negation calculation. Still doesn't draw right, but at least it's the right numbers now. Thanks to taiu in #dri-devel. --- src/gallium/drivers/r300/r300_state_tcl.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c index 30a8dab307..8cf8250425 100644 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ b/src/gallium/drivers/r300/r300_state_tcl.c @@ -164,13 +164,13 @@ static uint32_t r300_vs_op(unsigned op) static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) { if (reg->SrcRegister.Extended) { - return (reg->SrcRegister.Negate ? R300_PVS_NEGATE_XYZW : 0) | + return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | reg->SrcRegisterExtSwz.ExtSwizzleX | (reg->SrcRegisterExtSwz.ExtSwizzleY << 3) | (reg->SrcRegisterExtSwz.ExtSwizzleZ << 6) | (reg->SrcRegisterExtSwz.ExtSwizzleW << 9); } else { - return (reg->SrcRegister.Negate ? R300_PVS_NEGATE_XYZW : 0) | + return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | reg->SrcRegister.SwizzleX | (reg->SrcRegister.SwizzleY << 3) | (reg->SrcRegister.SwizzleZ << 6) | @@ -182,13 +182,13 @@ static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) static uint32_t r300_vs_scalar_swiz(struct tgsi_full_src_register* reg) { if (reg->SrcRegister.Extended) { - return (reg->SrcRegister.Negate ? R300_PVS_NEGATE_XYZW : 0) | + return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | reg->SrcRegisterExtSwz.ExtSwizzleX | (reg->SrcRegisterExtSwz.ExtSwizzleX << 3) | (reg->SrcRegisterExtSwz.ExtSwizzleX << 6) | (reg->SrcRegisterExtSwz.ExtSwizzleX << 9); } else { - return (reg->SrcRegister.Negate ? R300_PVS_NEGATE_XYZW : 0) | + return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | reg->SrcRegister.SwizzleX | (reg->SrcRegister.SwizzleX << 3) | (reg->SrcRegister.SwizzleX << 6) | -- cgit v1.2.3 From 90bfff0a295ce28143ecde98ed91eb6d8cfba23c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 5 Jun 2009 00:12:26 -0700 Subject: r300-gallium: Mute some debug info. Most of it is no longer interesting. --- src/gallium/drivers/r300/r300_cs.h | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 2abf04d27e..71b142c0db 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -34,6 +34,7 @@ #define MAX_CS_SIZE 64 * 1024 / 4 +#define VERY_VERBOSE_CS 0 #define VERY_VERBOSE_REGISTERS 0 /* XXX stolen from radeon_drm.h */ @@ -56,8 +57,10 @@ #define BEGIN_CS(size) do { \ CHECK_CS(size); \ - debug_printf("r300: BEGIN_CS, count %d, in %s (%s:%d)\n", \ - size, __FUNCTION__, __FILE__, __LINE__); \ + if (VERY_VERBOSE_CS) { \ + debug_printf("r300: BEGIN_CS, count %d, in %s (%s:%d)\n", \ + size, __FUNCTION__, __FILE__, __LINE__); \ + } \ cs_winsys->begin_cs(cs_winsys, (size), \ __FILE__, __FUNCTION__, __LINE__); \ cs_count = size; \ @@ -103,16 +106,20 @@ } while (0) #define END_CS do { \ - debug_printf("r300: END_CS in %s (%s:%d)\n", __FUNCTION__, __FILE__, \ - __LINE__); \ + if (VERY_VERBOSE_CS) { \ + debug_printf("r300: END_CS in %s (%s:%d)\n", __FUNCTION__, \ + __FILE__, __LINE__); \ + } \ if (cs_count != 0) \ debug_printf("r300: Warning: cs_count off by %d\n", cs_count); \ cs_winsys->end_cs(cs_winsys, __FILE__, __FUNCTION__, __LINE__); \ } while (0) #define FLUSH_CS do { \ - debug_printf("r300: FLUSH_CS in %s (%s:%d)\n\n", __FUNCTION__, __FILE__, \ - __LINE__); \ + if (VERY_VERBOSE_CS) { \ + debug_printf("r300: FLUSH_CS in %s (%s:%d)\n\n", __FUNCTION__, \ + __FILE__, __LINE__); \ + } \ cs_winsys->flush_cs(cs_winsys); \ } while (0) -- cgit v1.2.3 From 9e4590dff72b8739e787da7f0d86c7066f179186 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 5 Jun 2009 10:18:20 -0700 Subject: r300-gallium: Improve vs emit. --- src/gallium/drivers/r300/r300_emit.c | 20 ++++++++++++-------- src/gallium/drivers/r300/r300_reg.h | 2 ++ 2 files changed, 14 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 61b416663b..4a70f3afde 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -372,17 +372,22 @@ void r300_emit_vertex_shader(struct r300_context* r300, } if (constants->count) { - BEGIN_CS(16 + (vs->instruction_count * 4) + (constants->count * 4)); + BEGIN_CS(14 + (vs->instruction_count * 4) + (constants->count * 4)); } else { - BEGIN_CS(13 + (vs->instruction_count * 4)); + BEGIN_CS(11 + (vs->instruction_count * 4)); } - OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) | + /* R300_VAP_PVS_CODE_CNTL_0 + * R300_VAP_PVS_CONST_CNTL + * R300_VAP_PVS_CODE_CNTL_1 + * See the r5xx docs for instructions on how to use these. + * XXX these could be optimized to select better values... */ + OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3); + OUT_CS(R300_PVS_FIRST_INST(0) | + R300_PVS_XYZW_VALID_INST(vs->instruction_count - 1) | R300_PVS_LAST_INST(vs->instruction_count - 1)); - OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, vs->instruction_count - 1); - - /* XXX */ - OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x0); + OUT_CS(R300_PVS_MAX_CONST_ADDR(constants->count - 1)); + OUT_CS(vs->instruction_count - 1); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0); OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, vs->instruction_count * 4); @@ -412,7 +417,6 @@ void r300_emit_vertex_shader(struct r300_context* r300, R300_PVS_VF_MAX_VTX_NUM(12)); OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); END_CS; - } void r300_emit_viewport_state(struct r300_context* r300, diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 920584a59e..3bb9bc47b5 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -511,11 +511,13 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_PVS_XYZW_VALID_INST_SHIFT 10 # define R300_PVS_LAST_INST_SHIFT 20 # define R300_PVS_FIRST_INST(x) ((x) << 0) +# define R300_PVS_XYZW_VALID_INST(x) ((x) << 10) # define R300_PVS_LAST_INST(x) ((x) << 20) /* Addresses are relative the the vertex program parameters area. */ #define R300_VAP_PVS_CONST_CNTL 0x22D4 # define R300_PVS_CONST_BASE_OFFSET_SHIFT 0 # define R300_PVS_MAX_CONST_ADDR_SHIFT 16 +# define R300_PVS_MAX_CONST_ADDR(x) ((x) << 16) #define R300_VAP_PVS_CODE_CNTL_1 0x22D8 # define R300_PVS_LAST_VTX_SRC_INST_SHIFT 0 #define R300_VAP_PVS_FLOW_CNTL_OPC 0x22DC -- cgit v1.2.3 From 1a359d983512b39783ce9f4eb842d3ea4ec012a6 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 5 Jun 2009 11:21:09 -0700 Subject: r300-gallium: Emit UCP. --- src/gallium/drivers/r300/r300_context.h | 37 ++++++++++++++++++--------------- src/gallium/drivers/r300/r300_emit.c | 26 +++++++++++++++++++++++ src/gallium/drivers/r300/r300_emit.h | 3 +++ src/gallium/drivers/r300/r300_state.c | 7 ++++--- 4 files changed, 53 insertions(+), 20 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index a9dd041e08..27bc7fd1a9 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -117,23 +117,24 @@ struct r300_viewport_state { uint32_t vte_control; /* R300_VAP_VTE_CNTL: 0x20b0 */ }; -#define R300_NEW_BLEND 0x0000001 -#define R300_NEW_BLEND_COLOR 0x0000002 -#define R300_NEW_CONSTANTS 0x0000004 -#define R300_NEW_DSA 0x0000008 -#define R300_NEW_FRAMEBUFFERS 0x0000010 -#define R300_NEW_FRAGMENT_SHADER 0x0000020 -#define R300_NEW_RASTERIZER 0x0000040 -#define R300_NEW_RS_BLOCK 0x0000080 -#define R300_NEW_SAMPLER 0x0000100 -#define R300_ANY_NEW_SAMPLERS 0x000ff00 -#define R300_NEW_SCISSOR 0x0010000 -#define R300_NEW_TEXTURE 0x0020000 -#define R300_ANY_NEW_TEXTURES 0x1fe0000 -#define R300_NEW_VERTEX_FORMAT 0x2000000 -#define R300_NEW_VERTEX_SHADER 0x4000000 -#define R300_NEW_VIEWPORT 0x8000000 -#define R300_NEW_KITCHEN_SINK 0xfffffff +#define R300_NEW_BLEND 0x00000001 +#define R300_NEW_BLEND_COLOR 0x00000002 +#define R300_NEW_CLIP 0x00000004 +#define R300_NEW_CONSTANTS 0x00000008 +#define R300_NEW_DSA 0x00000010 +#define R300_NEW_FRAMEBUFFERS 0x00000020 +#define R300_NEW_FRAGMENT_SHADER 0x00000040 +#define R300_NEW_RASTERIZER 0x00000080 +#define R300_NEW_RS_BLOCK 0x00000100 +#define R300_NEW_SAMPLER 0x00000200 +#define R300_ANY_NEW_SAMPLERS 0x0001fe00 +#define R300_NEW_SCISSOR 0x00020000 +#define R300_NEW_TEXTURE 0x00040000 +#define R300_ANY_NEW_TEXTURES 0x03fc0000 +#define R300_NEW_VERTEX_FORMAT 0x04000000 +#define R300_NEW_VERTEX_SHADER 0x08000000 +#define R300_NEW_VIEWPORT 0x10000000 +#define R300_NEW_KITCHEN_SINK 0x1fffffff /* The next several objects are not pure Radeon state; they inherit from * various Gallium classes. */ @@ -292,6 +293,8 @@ struct r300_context { struct r300_blend_state* blend_state; /* Blend color state. */ struct r300_blend_color_state* blend_color_state; + /* User clip planes. */ + struct pipe_clip_state clip_state; /* Shader constants. */ struct r300_constant_buffer shader_constants[PIPE_SHADER_TYPES]; /* Depth, stencil, and alpha state. */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 4a70f3afde..4c7370eee7 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -56,6 +56,27 @@ void r300_emit_blend_color_state(struct r300_context* r300, } } +void r300_emit_clip_state(struct r300_context* r300, + struct pipe_clip_state* clip) +{ + int i; + struct r300_screen* r300screen = r300_screen(r300->context.screen); + CS_LOCALS(r300); + + BEGIN_CS(3 + (6 * 4)); + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, + (r300screen->caps->is_r500 ? + R500_PVS_UCP_START : R300_PVS_UCP_START)); + OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4); + for (i = 0; i < 6; i++) { + OUT_CS_32F(clip->ucp[i][0]); + OUT_CS_32F(clip->ucp[i][1]); + OUT_CS_32F(clip->ucp[i][2]); + OUT_CS_32F(clip->ucp[i][3]); + } + END_CS; +} + void r300_emit_dsa_state(struct r300_context* r300, struct r300_dsa_state* dsa) { @@ -527,6 +548,11 @@ validate: r300->dirty_state &= ~R300_NEW_BLEND_COLOR; } + if (r300->dirty_state & R300_NEW_CLIP) { + r300_emit_clip_state(r300, &r300->clip_state); + r300->dirty_state &= ~R300_NEW_CLIP; + } + if (r300->dirty_state & R300_NEW_DSA) { r300_emit_dsa_state(r300, r300->dsa_state); r300->dirty_state &= ~R300_NEW_DSA; diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 36e14f69f7..946f625bd8 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -36,6 +36,9 @@ void r300_emit_blend_state(struct r300_context* r300, void r300_emit_blend_color_state(struct r300_context* r300, struct r300_blend_color_state* bc); +void r300_emit_clip_state(struct r300_context* r300, + struct pipe_clip_state* clip); + void r300_emit_dsa_state(struct r300_context* r300, struct r300_dsa_state* dsa); diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 0461ffd681..29e721984f 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -119,9 +119,10 @@ static void r300_set_clip_state(struct pipe_context* pipe, const struct pipe_clip_state* state) { struct r300_context* r300 = r300_context(pipe); - /* XXX add HW TCL clipping setup */ - draw_flush(r300->draw); - draw_set_clip_state(r300->draw, state); + + r300->clip_state = *state; + + r300->dirty_state |= R300_NEW_CLIP; } static void -- cgit v1.2.3 From b7aa5b1d10cbe2fd0b796538426f1f2910a4832c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 5 Jun 2009 13:46:59 -0700 Subject: r300-gallium: Use VAP_CLIP_CNTL. Makes tri-userclip work with HW TCL. --- src/gallium/drivers/r300/r300_emit.c | 5 ++++- src/gallium/drivers/r300/r300_state_invariant.c | 4 +--- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 4c7370eee7..d81abe4d0b 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -63,7 +63,7 @@ void r300_emit_clip_state(struct r300_context* r300, struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); - BEGIN_CS(3 + (6 * 4)); + BEGIN_CS(5 + (6 * 4)); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, (r300screen->caps->is_r500 ? R500_PVS_UCP_START : R300_PVS_UCP_START)); @@ -74,6 +74,9 @@ void r300_emit_clip_state(struct r300_context* r300, OUT_CS_32F(clip->ucp[i][2]); OUT_CS_32F(clip->ucp[i][3]); } + + OUT_CS_REG(R300_VAP_CLIP_CNTL, ((1 << clip->nr) - 1) | + R300_PS_UCP_MODE_CLIP_AS_TRIFAN); END_CS; } diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 9dde662802..60eff08f2e 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -69,7 +69,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(77 + (caps->has_tcl ? 7 : 0)); + BEGIN_CS(75 + (caps->has_tcl ? 7 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -80,8 +80,6 @@ void r300_emit_invariant_state(struct r300_context* r300) /* XXX endian */ if (caps->has_tcl) { OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); - OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE | - R300_PS_UCP_MODE_CLIP_AS_TRIFAN); OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); OUT_CS_32F(1.0); OUT_CS_32F(1.0); -- cgit v1.2.3 From ffa1972efb2100fd9a58e3add856852321c3c8ca Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 8 Jun 2009 19:55:33 -0700 Subject: r300-gallium: Don't emit UCP planes for SW TCL. --- src/gallium/drivers/r300/r300_emit.c | 4 ++++ src/gallium/drivers/r300/r300_state.c | 10 +++++++--- src/gallium/drivers/r300/r300_state_invariant.c | 2 +- 3 files changed, 12 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index d81abe4d0b..818880cd38 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -63,6 +63,10 @@ void r300_emit_clip_state(struct r300_context* r300, struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); + if (!r300screen->caps->has_tcl) { + return; + } + BEGIN_CS(5 + (6 * 4)); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, (r300screen->caps->is_r500 ? diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 29e721984f..01e2b51153 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -120,9 +120,13 @@ static void r300_set_clip_state(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); - r300->clip_state = *state; - - r300->dirty_state |= R300_NEW_CLIP; + if (r300_screen(pipe->screen)->caps->has_tcl) { + r300->clip_state = *state; + r300->dirty_state |= R300_NEW_CLIP; + } else { + draw_flush(r300->draw); + draw_set_clip_state(r300->draw, state); + } } static void diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 60eff08f2e..e438114010 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -69,7 +69,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(75 + (caps->has_tcl ? 7 : 0)); + BEGIN_CS(77 + (caps->has_tcl ? 5 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); -- cgit v1.2.3 From cb3b91f2d633ded4fb3e0c595a2c34ee139e9b10 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 8 Jun 2009 20:01:57 -0700 Subject: r300-gallium: Make UCP and clip work again for SW TCL. SW TCL: tri-clip works, tri-userclip works HW TCL: tri-clip fails, tri-userclip works That is a 200% improvement over the previous situation. Woot. --- src/gallium/drivers/r300/r300_context.c | 4 ++-- src/gallium/drivers/r300/r300_emit.c | 36 +++++++++++++++++---------------- 2 files changed, 21 insertions(+), 19 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 21c0fe2b80..233a32b53c 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -149,8 +149,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->draw = draw_create(); /* Enable our renderer. */ draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300)); - /* Tell Draw that we can always do non-UCP clipping. */ - draw_set_driver_clipping(r300->draw, TRUE); + /* Disable Draw's clipping if TCL is present. */ + draw_set_driver_clipping(r300->draw, r300_screen(screen)->caps->has_tcl); /* Force Draw to never do viewport transform, since (again) we can do * transform in hardware, always. */ draw_set_viewport_state(r300->draw, &r300_viewport_identity); diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 818880cd38..8b9fcd75e2 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -63,25 +63,27 @@ void r300_emit_clip_state(struct r300_context* r300, struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); - if (!r300screen->caps->has_tcl) { - return; - } - - BEGIN_CS(5 + (6 * 4)); - OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, - (r300screen->caps->is_r500 ? - R500_PVS_UCP_START : R300_PVS_UCP_START)); - OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4); - for (i = 0; i < 6; i++) { - OUT_CS_32F(clip->ucp[i][0]); - OUT_CS_32F(clip->ucp[i][1]); - OUT_CS_32F(clip->ucp[i][2]); - OUT_CS_32F(clip->ucp[i][3]); + if (r300screen->caps->has_tcl) { + BEGIN_CS(5 + (6 * 4)); + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, + (r300screen->caps->is_r500 ? + R500_PVS_UCP_START : R300_PVS_UCP_START)); + OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4); + for (i = 0; i < 6; i++) { + OUT_CS_32F(clip->ucp[i][0]); + OUT_CS_32F(clip->ucp[i][1]); + OUT_CS_32F(clip->ucp[i][2]); + OUT_CS_32F(clip->ucp[i][3]); + } + OUT_CS_REG(R300_VAP_CLIP_CNTL, ((1 << clip->nr) - 1) | + R300_PS_UCP_MODE_CLIP_AS_TRIFAN); + END_CS; + } else { + BEGIN_CS(2); + OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE); + END_CS; } - OUT_CS_REG(R300_VAP_CLIP_CNTL, ((1 << clip->nr) - 1) | - R300_PS_UCP_MODE_CLIP_AS_TRIFAN); - END_CS; } void r300_emit_dsa_state(struct r300_context* r300, -- cgit v1.2.3 From c534604800e2ea14991acb83fe4c68ffcdb7b661 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 8 Jun 2009 20:23:34 -0700 Subject: r300-gallium: HW TCL glxgears. (Read the rest of the log.) Um. So, yeah. Two massive WTF moments here. The first one is that, somehow, I never actually hooked up vertex shader emission, so the only time that the VAP gets set up is during surface_copy/surface_fill. That's why acidgears was happening. The second one is that, somehow, once I actually hooked it up, glxgears just magically worked. Without any actual, real testing, I somehow accidentally made the shader compiler work. Go figure. --- src/gallium/drivers/r300/r300_emit.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 8b9fcd75e2..93cf6909a3 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -632,6 +632,11 @@ validate: r300->dirty_state &= ~R300_NEW_VERTEX_FORMAT; } + if (r300->dirty_state & R300_NEW_VERTEX_SHADER) { + r300_emit_vertex_shader(r300, r300->vs); + r300->dirty_state &= ~R300_NEW_VERTEX_SHADER; + } + /* Finally, emit the VBO. */ r300_emit_vertex_buffer(r300); -- cgit v1.2.3 From 622858884fc5923c9e7a0c1bb0e80b53f0acb5a7 Mon Sep 17 00:00:00 2001 From: Joakim Sindholt Date: Fri, 26 Jun 2009 01:08:13 +0200 Subject: r300-gallium: organize fragment/vertex shaders Appart from separating r3xx/r5xx fragment shaders, a more consistent naming scheme has been applied. From now on: r300 = all chips r3xx = R300/R400 only r5xx = R500 only This way r300_fragment_shader is the master struct, and the structs r3xx_fragment_shader and r5xx_fragment_shader inherits it. --- src/gallium/drivers/r300/Makefile | 6 +- src/gallium/drivers/r300/SConscript | 6 +- src/gallium/drivers/r300/r300_context.h | 12 +- src/gallium/drivers/r300/r300_debug.c | 54 +- src/gallium/drivers/r300/r300_debug.h | 17 +- src/gallium/drivers/r300/r300_emit.c | 8 +- src/gallium/drivers/r300/r300_emit.h | 4 +- src/gallium/drivers/r300/r300_fs.c | 109 ++++ src/gallium/drivers/r300/r300_fs.h | 36 ++ src/gallium/drivers/r300/r300_fs_inlines.h | 158 ++++++ src/gallium/drivers/r300/r300_shader_inlines.h | 47 ++ src/gallium/drivers/r300/r300_state.c | 14 +- src/gallium/drivers/r300/r300_state_shader.c | 718 ------------------------- src/gallium/drivers/r300/r300_state_shader.h | 220 -------- src/gallium/drivers/r300/r300_state_tcl.c | 412 -------------- src/gallium/drivers/r300/r300_state_tcl.h | 164 ------ src/gallium/drivers/r300/r300_surface.c | 16 +- src/gallium/drivers/r300/r300_surface.h | 12 +- src/gallium/drivers/r300/r300_vs.c | 412 ++++++++++++++ src/gallium/drivers/r300/r300_vs.h | 157 ++++++ src/gallium/drivers/r300/r3xx_fs.c | 96 ++++ src/gallium/drivers/r300/r3xx_fs.h | 76 +++ src/gallium/drivers/r300/r5xx_fs.c | 467 ++++++++++++++++ src/gallium/drivers/r300/r5xx_fs.h | 132 +++++ 24 files changed, 1766 insertions(+), 1587 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_fs.c create mode 100644 src/gallium/drivers/r300/r300_fs.h create mode 100644 src/gallium/drivers/r300/r300_fs_inlines.h create mode 100644 src/gallium/drivers/r300/r300_shader_inlines.h delete mode 100644 src/gallium/drivers/r300/r300_state_shader.c delete mode 100644 src/gallium/drivers/r300/r300_state_shader.h delete mode 100644 src/gallium/drivers/r300/r300_state_tcl.c delete mode 100644 src/gallium/drivers/r300/r300_state_tcl.h create mode 100644 src/gallium/drivers/r300/r300_vs.c create mode 100644 src/gallium/drivers/r300/r300_vs.h create mode 100644 src/gallium/drivers/r300/r3xx_fs.c create mode 100644 src/gallium/drivers/r300/r3xx_fs.h create mode 100644 src/gallium/drivers/r300/r5xx_fs.c create mode 100644 src/gallium/drivers/r300/r5xx_fs.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index e44f9b9dfc..faceec9842 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -4,20 +4,22 @@ include $(TOP)/configs/current LIBNAME = r300 C_SOURCES = \ + r3xx_fs.c \ + r5xx_fs.c \ r300_chipset.c \ r300_clear.c \ r300_context.c \ r300_debug.c \ r300_emit.c \ r300_flush.c \ + r300_fs.c \ r300_query.c \ r300_render.c \ r300_screen.c \ r300_state.c \ r300_state_derived.c \ r300_state_invariant.c \ - r300_state_shader.c \ - r300_state_tcl.c \ + r300_vs.c \ r300_surface.c \ r300_texture.c diff --git a/src/gallium/drivers/r300/SConscript b/src/gallium/drivers/r300/SConscript index 182ed2d459..493d7b28bc 100644 --- a/src/gallium/drivers/r300/SConscript +++ b/src/gallium/drivers/r300/SConscript @@ -5,20 +5,22 @@ env = env.Clone() r300 = env.ConvenienceLibrary( target = 'r300', source = [ + 'r3xx_fs.c', + 'r5xx_fs.c', 'r300_chipset.c', 'r300_clear.c', 'r300_context.c', 'r300_debug.c', 'r300_emit.c', 'r300_flush.c', + 'r300_fs.c', 'r300_query.c', 'r300_render.c', 'r300_screen.c', 'r300_state.c', 'r300_state_derived.c', 'r300_state_invariant.c', - 'r300_state_shader.c', - 'r300_state_tcl.c', + 'r300_vs.c', 'r300_surface.c', 'r300_texture.c', ]) diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 27bc7fd1a9..ae7857498f 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -149,7 +149,7 @@ struct r300_constant_buffer { unsigned count; }; -struct r3xx_fragment_shader { +struct r300_fragment_shader { /* Parent class */ struct pipe_shader_state state; struct tgsi_shader_info info; @@ -165,9 +165,9 @@ struct r3xx_fragment_shader { boolean uses_imms; }; -struct r300_fragment_shader { +struct r3xx_fragment_shader { /* Parent class */ - struct r3xx_fragment_shader shader; + struct r300_fragment_shader shader; /* Number of ALU instructions */ int alu_instruction_count; @@ -190,9 +190,9 @@ struct r300_fragment_shader { } instructions[64]; /* XXX magic num */ }; -struct r500_fragment_shader { +struct r5xx_fragment_shader { /* Parent class */ - struct r3xx_fragment_shader shader; + struct r300_fragment_shader shader; /* Number of used instructions */ int instruction_count; @@ -300,7 +300,7 @@ struct r300_context { /* Depth, stencil, and alpha state. */ struct r300_dsa_state* dsa_state; /* Fragment shader. */ - struct r3xx_fragment_shader* fs; + struct r300_fragment_shader* fs; /* Framebuffer state. We currently don't need our own version of this. */ struct pipe_framebuffer_state framebuffer_state; /* Rasterizer state. */ diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index 678cd2b812..c83e8526cf 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -22,7 +22,7 @@ #include "r300_debug.h" -static void r300_dump_fs(struct r300_fragment_shader* fs) +void r3xx_dump_fs(struct r3xx_fragment_shader* fs) { int i; @@ -30,7 +30,7 @@ static void r300_dump_fs(struct r300_fragment_shader* fs) } } -void r500_fs_dump(struct r500_fragment_shader* fs) +void r5xx_fs_dump(struct r5xx_fragment_shader* fs) { int i; uint32_t inst; @@ -58,8 +58,8 @@ void r500_fs_dump(struct r500_fragment_shader* fs) inst & R500_INST_NOP ? "NOP" : "", inst & R500_INST_ALU_WAIT ? "ALU_WAIT" : ""); debug_printf("wmask: %s omask: %s\n", - r500_fs_mask[(inst >> 11) & 0xf], - r500_fs_mask[(inst >> 15) & 0xf]); + r5xx_fs_mask[(inst >> 11) & 0xf], + r5xx_fs_mask[(inst >> 15) & 0xf]); switch (inst & 0x3) { case R500_INST_TYPE_ALU: case R500_INST_TYPE_OUT: @@ -85,36 +85,36 @@ void r500_fs_dump(struct r500_fragment_shader* fs) debug_printf(" 3: RGB_INST 0x%08x:", inst); debug_printf("rgb_A_src:%d %s/%s/%s %d " "rgb_B_src:%d %s/%s/%s %d\n", - inst & 0x3, r500_fs_swiz[(inst >> 2) & 0x7], - r500_fs_swiz[(inst >> 5) & 0x7], - r500_fs_swiz[(inst >> 8) & 0x7], + inst & 0x3, r5xx_fs_swiz[(inst >> 2) & 0x7], + r5xx_fs_swiz[(inst >> 5) & 0x7], + r5xx_fs_swiz[(inst >> 8) & 0x7], (inst >> 11) & 0x3, (inst >> 13) & 0x3, - r500_fs_swiz[(inst >> 15) & 0x7], - r500_fs_swiz[(inst >> 18) & 0x7], - r500_fs_swiz[(inst >> 21) & 0x7], + r5xx_fs_swiz[(inst >> 15) & 0x7], + r5xx_fs_swiz[(inst >> 18) & 0x7], + r5xx_fs_swiz[(inst >> 21) & 0x7], (inst >> 24) & 0x3); inst = fs->instructions[i].inst4; debug_printf(" 4: ALPHA_INST 0x%08x:", inst); debug_printf("%s dest:%d%s alp_A_src:%d %s %d " "alp_B_src:%d %s %d w:%d\n", - r500_fs_op_alpha[inst & 0xf], (inst >> 4) & 0x7f, + r5xx_fs_op_alpha[inst & 0xf], (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"", (inst >> 12) & 0x3, - r500_fs_swiz[(inst >> 14) & 0x7], (inst >> 17) & 0x3, - (inst >> 19) & 0x3, r500_fs_swiz[(inst >> 21) & 0x7], + r5xx_fs_swiz[(inst >> 14) & 0x7], (inst >> 17) & 0x3, + (inst >> 19) & 0x3, r5xx_fs_swiz[(inst >> 21) & 0x7], (inst >> 24) & 0x3, (inst >> 31) & 0x1); inst = fs->instructions[i].inst5; debug_printf(" 5: RGBA_INST 0x%08x:", inst); debug_printf("%s dest:%d%s rgb_C_src:%d %s/%s/%s %d " "alp_C_src:%d %s %d\n", - r500_fs_op_rgb[inst & 0xf], (inst >> 4) & 0x7f, + r5xx_fs_op_rgb[inst & 0xf], (inst >> 4) & 0x7f, inst & (1 << 11) ? "(rel)":"", (inst >> 12) & 0x3, - r500_fs_swiz[(inst >> 14) & 0x7], - r500_fs_swiz[(inst >> 17) & 0x7], - r500_fs_swiz[(inst >> 20) & 0x7], + r5xx_fs_swiz[(inst >> 14) & 0x7], + r5xx_fs_swiz[(inst >> 17) & 0x7], + r5xx_fs_swiz[(inst >> 20) & 0x7], (inst >> 23) & 0x3, (inst >> 25) & 0x3, - r500_fs_swiz[(inst >> 27) & 0x7], (inst >> 30) & 0x3); + r5xx_fs_swiz[(inst >> 27) & 0x7], (inst >> 30) & 0x3); break; case R500_INST_TYPE_FC: /* XXX don't even bother yet */ @@ -124,7 +124,7 @@ void r500_fs_dump(struct r500_fragment_shader* fs) debug_printf(" 1: TEX_INST 0x%08x: id: %d " "op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf, - r500_fs_tex[(inst >> 22) & 0x7], + r5xx_fs_tex[(inst >> 22) & 0x7], (inst & (1 << 25)) ? "ACQ" : "", (inst & (1 << 26)) ? "IGNUNC" : "", (inst & (1 << 27)) ? "UNSCALED" : "SCALED"); @@ -133,15 +133,15 @@ void r500_fs_dump(struct r500_fragment_shader* fs) debug_printf(" 2: TEX_ADDR 0x%08x: " "src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst, inst & 0x7f, inst & (1 << 7) ? "(rel)" : "", - r500_fs_swiz[(inst >> 8) & 0x3], - r500_fs_swiz[(inst >> 10) & 0x3], - r500_fs_swiz[(inst >> 12) & 0x3], - r500_fs_swiz[(inst >> 14) & 0x3], + r5xx_fs_swiz[(inst >> 8) & 0x3], + r5xx_fs_swiz[(inst >> 10) & 0x3], + r5xx_fs_swiz[(inst >> 12) & 0x3], + r5xx_fs_swiz[(inst >> 14) & 0x3], (inst >> 16) & 0x7f, inst & (1 << 23) ? "(rel)" : "", - r500_fs_swiz[(inst >> 24) & 0x3], - r500_fs_swiz[(inst >> 26) & 0x3], - r500_fs_swiz[(inst >> 28) & 0x3], - r500_fs_swiz[(inst >> 30) & 0x3]); + r5xx_fs_swiz[(inst >> 24) & 0x3], + r5xx_fs_swiz[(inst >> 26) & 0x3], + r5xx_fs_swiz[(inst >> 28) & 0x3], + r5xx_fs_swiz[(inst >> 30) & 0x3]); inst = fs->instructions[i].inst3; debug_printf(" 3: TEX_DXDY 0x%08x\n", inst); diff --git a/src/gallium/drivers/r300/r300_debug.h b/src/gallium/drivers/r300/r300_debug.h index c86410ec0a..6b58c1e250 100644 --- a/src/gallium/drivers/r300/r300_debug.h +++ b/src/gallium/drivers/r300/r300_debug.h @@ -24,10 +24,10 @@ #define R300_DEBUG_H #include "r300_reg.h" -#include "r300_state_shader.h" -#include "r300_state_tcl.h" +#include "r300_fs.h" +#include "r300_vs.h" -static char* r500_fs_swiz[] = { +static char* r5xx_fs_swiz[] = { " R", " G", " B", @@ -38,7 +38,7 @@ static char* r500_fs_swiz[] = { " U", }; -static char* r500_fs_op_rgb[] = { +static char* r5xx_fs_op_rgb[] = { "MAD", "DP3", "DP4", @@ -54,7 +54,7 @@ static char* r500_fs_op_rgb[] = { "MDV", }; -static char* r500_fs_op_alpha[] = { +static char* r5xx_fs_op_alpha[] = { "MAD", " DP", "MIN", @@ -73,7 +73,7 @@ static char* r500_fs_op_alpha[] = { "MDV", }; -static char* r500_fs_mask[] = { +static char* r5xx_fs_mask[] = { "NONE", "R ", " G ", @@ -92,7 +92,7 @@ static char* r500_fs_mask[] = { "RGBA", }; -static char* r500_fs_tex[] = { +static char* r5xx_fs_tex[] = { " NOP", " LD", "TEXKILL", @@ -203,7 +203,8 @@ static char* r300_vs_swiz_debug[] = { "U", }; -void r500_fs_dump(struct r500_fragment_shader* fs); +void r5xx_fs_dump(struct r5xx_fragment_shader* fs); +void r3xx_dump_fs(struct r3xx_fragment_shader* fs); void r300_vs_dump(struct r300_vertex_shader* vs); diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 93cf6909a3..1d297e8593 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -110,7 +110,7 @@ void r300_emit_dsa_state(struct r300_context* r300, } void r300_emit_fragment_shader(struct r300_context* r300, - struct r300_fragment_shader* fs) + struct r3xx_fragment_shader* fs) { int i; CS_LOCALS(r300); @@ -142,7 +142,7 @@ void r300_emit_fragment_shader(struct r300_context* r300, } void r500_emit_fragment_shader(struct r300_context* r300, - struct r500_fragment_shader* fs) + struct r5xx_fragment_shader* fs) { int i; struct r300_constant_buffer* constants = @@ -570,10 +570,10 @@ validate: if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) { if (r300screen->caps->is_r500) { r500_emit_fragment_shader(r300, - (struct r500_fragment_shader*)r300->fs); + (struct r5xx_fragment_shader*)r300->fs); } else { r300_emit_fragment_shader(r300, - (struct r300_fragment_shader*)r300->fs); + (struct r3xx_fragment_shader*)r300->fs); } r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER; } diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 946f625bd8..196b6c58d3 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -43,10 +43,10 @@ void r300_emit_dsa_state(struct r300_context* r300, struct r300_dsa_state* dsa); void r300_emit_fragment_shader(struct r300_context* r300, - struct r300_fragment_shader* fs); + struct r3xx_fragment_shader* fs); void r500_emit_fragment_shader(struct r300_context* r300, - struct r500_fragment_shader* fs); + struct r5xx_fragment_shader* fs); void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb); diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c new file mode 100644 index 0000000000..4b304306d0 --- /dev/null +++ b/src/gallium/drivers/r300/r300_fs.c @@ -0,0 +1,109 @@ +/* + * Copyright 2008 Corbin Simpson + * Joakim Sindholt + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_fs.h" + +void r300_translate_fragment_shader(struct r300_context* r300, + struct r300_fragment_shader* fs) +{ + struct tgsi_parse_context parser; + int i; + boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500; + struct r300_constant_buffer* consts = + &r300->shader_constants[PIPE_SHADER_FRAGMENT]; + + struct r300_fs_asm* assembler = CALLOC_STRUCT(r300_fs_asm); + if (assembler == NULL) { + return; + } + /* Setup starting offset for immediates. */ + assembler->imm_offset = consts->user_count; + /* Enable depth writes, if needed. */ + assembler->writes_depth = fs->info.writes_z; + + /* Make sure we start at the beginning of the shader. */ + if (is_r500) { + ((struct r5xx_fragment_shader*)fs)->instruction_count = 0; + } + + tgsi_parse_init(&parser, fs->state.tokens); + + while (!tgsi_parse_end_of_tokens(&parser)) { + tgsi_parse_token(&parser); + + /* This is seriously the lamest way to create fragment programs ever. + * I blame TGSI. */ + switch (parser.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_DECLARATION: + /* Allocated registers sitting at the beginning + * of the program. */ + r300_fs_declare(assembler, &parser.FullToken.FullDeclaration); + break; + case TGSI_TOKEN_TYPE_IMMEDIATE: + debug_printf("r300: Emitting immediate to constant buffer, " + "position %d\n", + assembler->imm_offset + assembler->imm_count); + /* I am not amused by the length of these. */ + for (i = 0; i < 4; i++) { + consts->constants[assembler->imm_offset + + assembler->imm_count][i] = + parser.FullToken.FullImmediate.u.ImmediateFloat32[i] + .Float; + } + assembler->imm_count++; + break; + case TGSI_TOKEN_TYPE_INSTRUCTION: + if (is_r500) { + r5xx_fs_instruction((struct r5xx_fragment_shader*)fs, + assembler, &parser.FullToken.FullInstruction); + } else { + r3xx_fs_instruction((struct r3xx_fragment_shader*)fs, + assembler, &parser.FullToken.FullInstruction); + } + break; + } + } + + debug_printf("r300: fs: %d texs and %d colors, first free reg is %d\n", + assembler->tex_count, assembler->color_count, + assembler->tex_count + assembler->color_count); + + consts->count = consts->user_count + assembler->imm_count; + fs->uses_imms = assembler->imm_count; + debug_printf("r300: fs: %d total constants, " + "%d from user and %d from immediates\n", consts->count, + consts->user_count, assembler->imm_count); + r3xx_fs_finalize(fs, assembler); + if (is_r500) { + r5xx_fs_finalize((struct r5xx_fragment_shader*)fs, assembler); + } + + tgsi_dump(fs->state.tokens, 0); + /* XXX finish r300 dumper too */ + if (is_r500) { + r5xx_fs_dump((struct r5xx_fragment_shader*)fs); + } + + tgsi_parse_free(&parser); + FREE(assembler); +} diff --git a/src/gallium/drivers/r300/r300_fs.h b/src/gallium/drivers/r300/r300_fs.h new file mode 100644 index 0000000000..18deb7a05e --- /dev/null +++ b/src/gallium/drivers/r300/r300_fs.h @@ -0,0 +1,36 @@ +/* + * Copyright 2008 Corbin Simpson + * Joakim Sindholt + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_FS_H +#define R300_FS_H + +#include "tgsi/tgsi_dump.h" + +#include "r300_context.h" +#include "r3xx_fs.h" +#include "r5xx_fs.h" + +void r300_translate_fragment_shader(struct r300_context* r300, + struct r300_fragment_shader* fs); + + #endif /* R300_FS_H */ diff --git a/src/gallium/drivers/r300/r300_fs_inlines.h b/src/gallium/drivers/r300/r300_fs_inlines.h new file mode 100644 index 0000000000..be4be9465e --- /dev/null +++ b/src/gallium/drivers/r300/r300_fs_inlines.h @@ -0,0 +1,158 @@ +/* + * Copyright 2008 Corbin Simpson + * Joakim Sindholt + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_FS_INLINES_H +#define R300_FS_INLINES_H + +#include "tgsi/tgsi_parse.h" + +#include "r300_context.h" +#include "r300_debug.h" +#include "r300_reg.h" +#include "r300_screen.h" +#include "r300_shader_inlines.h" + +/* Temporary struct used to hold assembly state while putting together + * fragment programs. */ +struct r300_fs_asm { + /* Pipe context. */ + struct r300_context* r300; + /* Number of colors. */ + unsigned color_count; + /* Number of texcoords. */ + unsigned tex_count; + /* Offset for temporary registers. Inputs and temporaries have no + * distinguishing markings, so inputs start at 0 and the first usable + * temporary register is after all inputs. */ + unsigned temp_offset; + /* Number of requested temporary registers. */ + unsigned temp_count; + /* Offset for immediate constants. Neither R300 nor R500 can do four + * inline constants per source, so instead we copy immediates into the + * constant buffer. */ + unsigned imm_offset; + /* Number of immediate constants. */ + unsigned imm_count; + /* Are depth writes enabled? */ + boolean writes_depth; + /* Depth write offset. This is the TGSI output that corresponds to + * depth writes. */ + unsigned depth_output; +}; + +static INLINE void r300_fs_declare(struct r300_fs_asm* assembler, + struct tgsi_full_declaration* decl) +{ + switch (decl->Declaration.File) { + case TGSI_FILE_INPUT: + switch (decl->Semantic.SemanticName) { + case TGSI_SEMANTIC_COLOR: + assembler->color_count++; + break; + case TGSI_SEMANTIC_FOG: + case TGSI_SEMANTIC_GENERIC: + assembler->tex_count++; + break; + default: + debug_printf("r300: fs: Bad semantic declaration %d\n", + decl->Semantic.SemanticName); + break; + } + break; + case TGSI_FILE_OUTPUT: + /* Depth write. Mark the position of the output so we can + * identify it later. */ + if (decl->Semantic.SemanticName == TGSI_SEMANTIC_POSITION) { + assembler->depth_output = decl->DeclarationRange.First; + } + break; + case TGSI_FILE_CONSTANT: + break; + case TGSI_FILE_TEMPORARY: + assembler->temp_count++; + break; + default: + debug_printf("r300: fs: Bad file %d\n", decl->Declaration.File); + break; + } + + assembler->temp_offset = assembler->color_count + assembler->tex_count; +} + +static INLINE unsigned r300_fs_src(struct r300_fs_asm* assembler, + struct tgsi_src_register* src) +{ + switch (src->File) { + case TGSI_FILE_NULL: + return 0; + case TGSI_FILE_INPUT: + /* XXX may be wrong */ + return src->Index; + break; + case TGSI_FILE_TEMPORARY: + return src->Index + assembler->temp_offset; + break; + case TGSI_FILE_IMMEDIATE: + return (src->Index + assembler->imm_offset) | (1 << 8); + break; + case TGSI_FILE_CONSTANT: + /* XXX magic */ + return src->Index | (1 << 8); + break; + default: + debug_printf("r300: fs: Unimplemented src %d\n", src->File); + break; + } + return 0; +} + +static INLINE unsigned r300_fs_dst(struct r300_fs_asm* assembler, + struct tgsi_dst_register* dst) +{ + switch (dst->File) { + case TGSI_FILE_NULL: + /* This happens during KIL instructions. */ + return 0; + break; + case TGSI_FILE_OUTPUT: + return 0; + break; + case TGSI_FILE_TEMPORARY: + return dst->Index + assembler->temp_offset; + break; + default: + debug_printf("r300: fs: Unimplemented dst %d\n", dst->File); + break; + } + return 0; +} + +static INLINE boolean r300_fs_is_depr(struct r300_fs_asm* assembler, + struct tgsi_dst_register* dst) +{ + return (assembler->writes_depth && + (dst->File == TGSI_FILE_OUTPUT) && + (dst->Index == assembler->depth_output)); +} + +#endif /* R300_FS_INLINES_H */ diff --git a/src/gallium/drivers/r300/r300_shader_inlines.h b/src/gallium/drivers/r300/r300_shader_inlines.h new file mode 100644 index 0000000000..a04f45b03e --- /dev/null +++ b/src/gallium/drivers/r300/r300_shader_inlines.h @@ -0,0 +1,47 @@ +/* + * Copyright 2009 Corbin Simpson + * Joakim Sindholt + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_SHADER_INLINES_H +#define R300_SHADER_INLINES_H + +/* TGSI constants. TGSI is like XML: If it can't solve your problems, you're + * not using enough of it. */ +static const struct tgsi_full_src_register r300_constant_zero = { + .SrcRegister.Extended = TRUE, + .SrcRegister.File = TGSI_FILE_NULL, + .SrcRegisterExtSwz.ExtSwizzleX = TGSI_EXTSWIZZLE_ZERO, + .SrcRegisterExtSwz.ExtSwizzleY = TGSI_EXTSWIZZLE_ZERO, + .SrcRegisterExtSwz.ExtSwizzleZ = TGSI_EXTSWIZZLE_ZERO, + .SrcRegisterExtSwz.ExtSwizzleW = TGSI_EXTSWIZZLE_ZERO, +}; + +static const struct tgsi_full_src_register r300_constant_one = { + .SrcRegister.Extended = TRUE, + .SrcRegister.File = TGSI_FILE_NULL, + .SrcRegisterExtSwz.ExtSwizzleX = TGSI_EXTSWIZZLE_ONE, + .SrcRegisterExtSwz.ExtSwizzleY = TGSI_EXTSWIZZLE_ONE, + .SrcRegisterExtSwz.ExtSwizzleZ = TGSI_EXTSWIZZLE_ONE, + .SrcRegisterExtSwz.ExtSwizzleW = TGSI_EXTSWIZZLE_ONE, +}; + +#endif /* R300_SHADER_INLINES_H */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 01e2b51153..d70ef6ba28 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -29,7 +29,7 @@ #include "r300_context.h" #include "r300_reg.h" #include "r300_state_inlines.h" -#include "r300_state_shader.h" +#include "r300_fs.h" /* r300_state: Functions used to intialize state context by translating * Gallium state objects into semi-native r300 state objects. */ @@ -283,14 +283,12 @@ static void* r300_create_fs_state(struct pipe_context* pipe, const struct pipe_shader_state* shader) { struct r300_context* r300 = r300_context(pipe); - struct r3xx_fragment_shader* fs = NULL; + struct r300_fragment_shader* fs = NULL; if (r300_screen(r300->context.screen)->caps->is_r500) { - fs = - (struct r3xx_fragment_shader*)CALLOC_STRUCT(r500_fragment_shader); + fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r5xx_fragment_shader); } else { - fs = - (struct r3xx_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); + fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r3xx_fragment_shader); } /* Copy state directly into shader. */ @@ -306,7 +304,7 @@ static void* r300_create_fs_state(struct pipe_context* pipe, static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) { struct r300_context* r300 = r300_context(pipe); - struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader; + struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; if (fs == NULL) { r300->fs = NULL; @@ -324,7 +322,7 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) /* Delete fragment shader state. */ static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) { - struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader; + struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; FREE(fs->state.tokens); FREE(shader); } diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c deleted file mode 100644 index cc7f6a7c4b..0000000000 --- a/src/gallium/drivers/r300/r300_state_shader.c +++ /dev/null @@ -1,718 +0,0 @@ -/* - * Copyright 2008 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#include "r300_state_shader.h" - -static void r300_fs_declare(struct r300_fs_asm* assembler, - struct tgsi_full_declaration* decl) -{ - switch (decl->Declaration.File) { - case TGSI_FILE_INPUT: - switch (decl->Semantic.SemanticName) { - case TGSI_SEMANTIC_COLOR: - assembler->color_count++; - break; - case TGSI_SEMANTIC_FOG: - case TGSI_SEMANTIC_GENERIC: - assembler->tex_count++; - break; - default: - debug_printf("r300: fs: Bad semantic declaration %d\n", - decl->Semantic.SemanticName); - break; - } - break; - case TGSI_FILE_OUTPUT: - /* Depth write. Mark the position of the output so we can - * identify it later. */ - if (decl->Semantic.SemanticName == TGSI_SEMANTIC_POSITION) { - assembler->depth_output = decl->DeclarationRange.First; - } - break; - case TGSI_FILE_CONSTANT: - break; - case TGSI_FILE_TEMPORARY: - assembler->temp_count++; - break; - default: - debug_printf("r300: fs: Bad file %d\n", decl->Declaration.File); - break; - } - - assembler->temp_offset = assembler->color_count + assembler->tex_count; -} - -static INLINE unsigned r300_fs_src(struct r300_fs_asm* assembler, - struct tgsi_src_register* src) -{ - switch (src->File) { - case TGSI_FILE_NULL: - return 0; - case TGSI_FILE_INPUT: - /* XXX may be wrong */ - return src->Index; - break; - case TGSI_FILE_TEMPORARY: - return src->Index + assembler->temp_offset; - break; - case TGSI_FILE_IMMEDIATE: - return (src->Index + assembler->imm_offset) | (1 << 8); - break; - case TGSI_FILE_CONSTANT: - /* XXX magic */ - return src->Index | (1 << 8); - break; - default: - debug_printf("r300: fs: Unimplemented src %d\n", src->File); - break; - } - return 0; -} - -static INLINE unsigned r300_fs_dst(struct r300_fs_asm* assembler, - struct tgsi_dst_register* dst) -{ - switch (dst->File) { - case TGSI_FILE_NULL: - /* This happens during KIL instructions. */ - return 0; - break; - case TGSI_FILE_OUTPUT: - return 0; - break; - case TGSI_FILE_TEMPORARY: - return dst->Index + assembler->temp_offset; - break; - default: - debug_printf("r300: fs: Unimplemented dst %d\n", dst->File); - break; - } - return 0; -} - -static INLINE boolean r300_fs_is_depr(struct r300_fs_asm* assembler, - struct tgsi_dst_register* dst) -{ - return (assembler->writes_depth && - (dst->File == TGSI_FILE_OUTPUT) && - (dst->Index == assembler->depth_output)); -} - -static INLINE unsigned r500_fix_swiz(unsigned s) -{ - /* For historical reasons, the swizzle values x, y, z, w, and 0 are - * equivalent to the actual machine code, but 1 is not. Thus, we just - * adjust it a bit... */ - if (s == TGSI_EXTSWIZZLE_ONE) { - return R500_SWIZZLE_ONE; - } else { - return s; - } -} - -static uint32_t r500_rgba_swiz(struct tgsi_full_src_register* reg) -{ - if (reg->SrcRegister.Extended) { - return r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleX) | - (r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleY) << 3) | - (r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleZ) << 6) | - (r500_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleW) << 9); - } else { - return reg->SrcRegister.SwizzleX | - (reg->SrcRegister.SwizzleY << 3) | - (reg->SrcRegister.SwizzleZ << 6) | - (reg->SrcRegister.SwizzleW << 9); - } -} - -static uint32_t r500_strq_swiz(struct tgsi_full_src_register* reg) -{ - return reg->SrcRegister.SwizzleX | - (reg->SrcRegister.SwizzleY << 2) | - (reg->SrcRegister.SwizzleZ << 4) | - (reg->SrcRegister.SwizzleW << 6); -} - -static INLINE uint32_t r500_rgb_swiz(struct tgsi_full_src_register* reg) -{ - /* Only the first 9 bits... */ - return (r500_rgba_swiz(reg) & 0x1ff) | - (reg->SrcRegister.Negate ? (1 << 9) : 0) | - (reg->SrcRegisterExtMod.Absolute ? (1 << 10) : 0); -} - -static INLINE uint32_t r500_alpha_swiz(struct tgsi_full_src_register* reg) -{ - /* Only the last 3 bits... */ - return (r500_rgba_swiz(reg) >> 9) | - (reg->SrcRegister.Negate ? (1 << 9) : 0) | - (reg->SrcRegisterExtMod.Absolute ? (1 << 10) : 0); -} - -static INLINE uint32_t r300_rgb_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_MOV: - return R300_ALU_OUTC_CMP; - default: - return 0; - } -} - -static INLINE uint32_t r300_alpha_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_MOV: - return R300_ALU_OUTA_CMP; - default: - return 0; - } -} - -static INLINE uint32_t r500_rgba_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_COS: - case TGSI_OPCODE_EX2: - case TGSI_OPCODE_LG2: - case TGSI_OPCODE_RCP: - case TGSI_OPCODE_RSQ: - case TGSI_OPCODE_SIN: - return R500_ALU_RGBA_OP_SOP; - case TGSI_OPCODE_DDX: - return R500_ALU_RGBA_OP_MDH; - case TGSI_OPCODE_DDY: - return R500_ALU_RGBA_OP_MDV; - case TGSI_OPCODE_FRC: - return R500_ALU_RGBA_OP_FRC; - case TGSI_OPCODE_DP3: - return R500_ALU_RGBA_OP_DP3; - case TGSI_OPCODE_DP4: - case TGSI_OPCODE_DPH: - return R500_ALU_RGBA_OP_DP4; - case TGSI_OPCODE_ABS: - case TGSI_OPCODE_CMP: - case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SWZ: - return R500_ALU_RGBA_OP_CMP; - case TGSI_OPCODE_ADD: - case TGSI_OPCODE_MAD: - case TGSI_OPCODE_MUL: - case TGSI_OPCODE_SUB: - return R500_ALU_RGBA_OP_MAD; - default: - return 0; - } -} - -static INLINE uint32_t r500_alpha_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_COS: - return R500_ALPHA_OP_COS; - case TGSI_OPCODE_EX2: - return R500_ALPHA_OP_EX2; - case TGSI_OPCODE_LG2: - return R500_ALPHA_OP_LN2; - case TGSI_OPCODE_RCP: - return R500_ALPHA_OP_RCP; - case TGSI_OPCODE_RSQ: - return R500_ALPHA_OP_RSQ; - case TGSI_OPCODE_FRC: - return R500_ALPHA_OP_FRC; - case TGSI_OPCODE_SIN: - return R500_ALPHA_OP_SIN; - case TGSI_OPCODE_DDX: - return R500_ALPHA_OP_MDH; - case TGSI_OPCODE_DDY: - return R500_ALPHA_OP_MDV; - case TGSI_OPCODE_DP3: - case TGSI_OPCODE_DP4: - case TGSI_OPCODE_DPH: - return R500_ALPHA_OP_DP; - case TGSI_OPCODE_ABS: - case TGSI_OPCODE_CMP: - case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SWZ: - return R500_ALPHA_OP_CMP; - case TGSI_OPCODE_ADD: - case TGSI_OPCODE_MAD: - case TGSI_OPCODE_MUL: - case TGSI_OPCODE_SUB: - return R500_ALPHA_OP_MAD; - default: - return 0; - } -} - -static INLINE uint32_t r500_tex_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_KIL: - return R500_TEX_INST_TEXKILL; - case TGSI_OPCODE_TEX: - return R500_TEX_INST_LD; - case TGSI_OPCODE_TXB: - return R500_TEX_INST_LODBIAS; - case TGSI_OPCODE_TXP: - return R500_TEX_INST_PROJ; - default: - return 0; - } -} - -static INLINE void r300_emit_maths(struct r300_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst, - unsigned op, - unsigned count) -{ - int i = fs->alu_instruction_count; - - fs->instructions[i].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | - r300_rgb_op(op); - fs->instructions[i].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | - R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ; - fs->instructions[i].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | - r300_alpha_op(op); - fs->instructions[i].alu_alpha_addr = R300_ALPHA_ADDR0(0) | - R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT; - - fs->alu_instruction_count++; -} - -/* Setup an ALU operation. */ -static INLINE void r500_emit_maths(struct r500_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst, - unsigned op, - unsigned count) -{ - int i = fs->instruction_count; - - if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { - fs->instructions[i].inst0 = R500_INST_TYPE_OUT; - if (r300_fs_is_depr(assembler, dst)) { - fs->instructions[i].inst4 = R500_W_OMASK; - } else { - fs->instructions[i].inst0 |= - R500_ALU_OMASK(dst->DstRegister.WriteMask); - } - } else { - fs->instructions[i].inst0 = R500_INST_TYPE_ALU | - R500_ALU_WMASK(dst->DstRegister.WriteMask); - } - - fs->instructions[i].inst0 |= R500_INST_TEX_SEM_WAIT; - - fs->instructions[i].inst4 |= - R500_ALPHA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); - fs->instructions[i].inst5 = - R500_ALU_RGBA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); - - switch (count) { - case 3: - fs->instructions[i].inst1 = - R500_RGB_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); - fs->instructions[i].inst2 = - R500_ALPHA_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); - fs->instructions[i].inst5 |= - R500_ALU_RGBA_SEL_C_SRC2 | - R500_SWIZ_RGBA_C(r500_rgb_swiz(&src[2])) | - R500_ALU_RGBA_ALPHA_SEL_C_SRC2 | - R500_SWIZ_ALPHA_C(r500_alpha_swiz(&src[2])); - case 2: - fs->instructions[i].inst1 |= - R500_RGB_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)); - fs->instructions[i].inst2 |= - R500_ALPHA_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)); - fs->instructions[i].inst3 = - R500_ALU_RGB_SEL_B_SRC1 | - R500_SWIZ_RGB_B(r500_rgb_swiz(&src[1])); - fs->instructions[i].inst4 |= - R500_ALPHA_SEL_B_SRC1 | - R500_SWIZ_ALPHA_B(r500_alpha_swiz(&src[1])); - case 1: - case 0: - default: - fs->instructions[i].inst1 |= - R500_RGB_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)); - fs->instructions[i].inst2 |= - R500_ALPHA_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)); - fs->instructions[i].inst3 |= - R500_ALU_RGB_SEL_A_SRC0 | - R500_SWIZ_RGB_A(r500_rgb_swiz(&src[0])); - fs->instructions[i].inst4 |= - R500_ALPHA_SEL_A_SRC0 | - R500_SWIZ_ALPHA_A(r500_alpha_swiz(&src[0])); - break; - } - - fs->instructions[i].inst4 |= r500_alpha_op(op); - fs->instructions[i].inst5 |= r500_rgba_op(op); - - fs->instruction_count++; -} - -static INLINE void r500_emit_tex(struct r500_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst, - uint32_t op) -{ - int i = fs->instruction_count; - - fs->instructions[i].inst0 = R500_INST_TYPE_TEX | - R500_TEX_WMASK(dst->DstRegister.WriteMask) | - R500_INST_TEX_SEM_WAIT; - fs->instructions[i].inst1 = R500_TEX_ID(0) | - R500_TEX_SEM_ACQUIRE | //R500_TEX_IGNORE_UNCOVERED | - r500_tex_op(op); - fs->instructions[i].inst2 = - R500_TEX_SRC_ADDR(r300_fs_src(assembler, &src->SrcRegister)) | - R500_SWIZ_TEX_STRQ(r500_strq_swiz(src)) | - R500_TEX_DST_ADDR(r300_fs_dst(assembler, &dst->DstRegister)) | - R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | - R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A; - - if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { - fs->instructions[i].inst2 |= - R500_TEX_DST_ADDR(assembler->temp_count + - assembler->temp_offset); - - fs->instruction_count++; - - /* Setup and emit a MOV. */ - src[0].SrcRegister.Index = assembler->temp_count; - src[0].SrcRegister.File = TGSI_FILE_TEMPORARY; - - src[1] = src[0]; - src[2] = r500_constant_zero; - r500_emit_maths(fs, assembler, src, dst, TGSI_OPCODE_MOV, 3); - } else { - fs->instruction_count++; - } -} - -static void r300_fs_instruction(struct r300_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_instruction* inst) -{ - switch (inst->Instruction.Opcode) { - case TGSI_OPCODE_MOV: - /* src0 -> src1 and src2 forced to zero */ - inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; - inst->FullSrcRegisters[2] = r500_constant_zero; - r300_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - case TGSI_OPCODE_END: - break; - default: - debug_printf("r300: fs: Bad opcode %d\n", - inst->Instruction.Opcode); - break; - } -} - -static void r500_fs_instruction(struct r500_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_instruction* inst) -{ - /* Switch between opcodes. When possible, prefer using the official - * AMD/ATI names for opcodes, please, as it facilitates using the - * documentation. */ - switch (inst->Instruction.Opcode) { - /* XXX trig needs extra prep */ - case TGSI_OPCODE_COS: - case TGSI_OPCODE_SIN: - /* The simple scalar ops. */ - case TGSI_OPCODE_EX2: - case TGSI_OPCODE_LG2: - case TGSI_OPCODE_RCP: - case TGSI_OPCODE_RSQ: - /* Copy red swizzle to alpha for src0 */ - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX; - inst->FullSrcRegisters[0].SrcRegister.SwizzleW = - inst->FullSrcRegisters[0].SrcRegister.SwizzleX; - /* Fall through */ - case TGSI_OPCODE_DDX: - case TGSI_OPCODE_DDY: - case TGSI_OPCODE_FRC: - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1); - break; - - /* The dot products. */ - case TGSI_OPCODE_DPH: - /* Set alpha swizzle to one for src0 */ - if (!inst->FullSrcRegisters[0].SrcRegister.Extended) { - inst->FullSrcRegisters[0].SrcRegister.Extended = TRUE; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX = - inst->FullSrcRegisters[0].SrcRegister.SwizzleX; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleY = - inst->FullSrcRegisters[0].SrcRegister.SwizzleY; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleZ = - inst->FullSrcRegisters[0].SrcRegister.SwizzleZ; - } - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = - TGSI_EXTSWIZZLE_ONE; - /* Fall through */ - case TGSI_OPCODE_DP3: - case TGSI_OPCODE_DP4: - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); - break; - - /* Simple three-source operations. */ - case TGSI_OPCODE_CMP: - /* Swap src0 and src2 */ - inst->FullSrcRegisters[3] = inst->FullSrcRegisters[2]; - inst->FullSrcRegisters[2] = inst->FullSrcRegisters[0]; - inst->FullSrcRegisters[0] = inst->FullSrcRegisters[3]; - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - - /* The MAD variants. */ - case TGSI_OPCODE_SUB: - /* Just like ADD, but flip the negation on src1 first */ - inst->FullSrcRegisters[1].SrcRegister.Negate = - !inst->FullSrcRegisters[1].SrcRegister.Negate; - /* Fall through */ - case TGSI_OPCODE_ADD: - /* Force src0 to one, move all registers over */ - inst->FullSrcRegisters[2] = inst->FullSrcRegisters[1]; - inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; - inst->FullSrcRegisters[0] = r500_constant_one; - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - case TGSI_OPCODE_MUL: - /* Force our src2 to zero */ - inst->FullSrcRegisters[2] = r500_constant_zero; - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - case TGSI_OPCODE_MAD: - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - - /* The MOV variants. */ - case TGSI_OPCODE_ABS: - /* Set absolute value modifiers. */ - inst->FullSrcRegisters[0].SrcRegisterExtMod.Absolute = TRUE; - /* Fall through */ - case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SWZ: - /* src0 -> src1 and src2 forced to zero */ - inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; - inst->FullSrcRegisters[2] = r500_constant_zero; - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - - /* The compound and hybrid insts. */ - case TGSI_OPCODE_LRP: - /* LRP DST A, B, C -> MAD TMP -A, C, C; MAD DST A, B, TMP */ - inst->FullSrcRegisters[3] = inst->FullSrcRegisters[1]; - inst->FullSrcRegisters[1] = inst->FullSrcRegisters[2]; - inst->FullSrcRegisters[0].SrcRegister.Negate = - !(inst->FullSrcRegisters[0].SrcRegister.Negate); - inst->FullDstRegisters[1] = inst->FullDstRegisters[0]; - inst->FullDstRegisters[0].DstRegister.Index = - assembler->temp_count; - inst->FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY; - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); - inst->FullSrcRegisters[2].SrcRegister.Index = - assembler->temp_count; - inst->FullSrcRegisters[2].SrcRegister.File = TGSI_FILE_TEMPORARY; - inst->FullSrcRegisters[2].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; - inst->FullSrcRegisters[2].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y; - inst->FullSrcRegisters[2].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z; - inst->FullSrcRegisters[2].SrcRegister.SwizzleW = TGSI_SWIZZLE_W; - inst->FullSrcRegisters[1] = inst->FullSrcRegisters[3]; - inst->FullSrcRegisters[0].SrcRegister.Negate = - !(inst->FullSrcRegisters[0].SrcRegister.Negate); - inst->FullDstRegisters[0] = inst->FullDstRegisters[1]; - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); - break; - case TGSI_OPCODE_POW: - /* POW DST A, B -> LG2 TMP A; MUL TMP TMP, B; EX2 DST TMP */ - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX; - inst->FullSrcRegisters[0].SrcRegister.SwizzleW = - inst->FullSrcRegisters[0].SrcRegister.SwizzleX; - inst->FullDstRegisters[1] = inst->FullDstRegisters[0]; - inst->FullDstRegisters[0].DstRegister.Index = - assembler->temp_count; - inst->FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY; - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], TGSI_OPCODE_LG2, 1); - inst->FullSrcRegisters[0].SrcRegister.Index = - assembler->temp_count; - inst->FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY; - inst->FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; - inst->FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y; - inst->FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z; - inst->FullSrcRegisters[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_W; - inst->FullSrcRegisters[2] = r500_constant_zero; - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], TGSI_OPCODE_MUL, 3); - inst->FullDstRegisters[0] = inst->FullDstRegisters[1]; - r500_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], TGSI_OPCODE_EX2, 1); - break; - - /* The texture instruction set. */ - case TGSI_OPCODE_KIL: - case TGSI_OPCODE_TEX: - case TGSI_OPCODE_TXB: - case TGSI_OPCODE_TXP: - r500_emit_tex(fs, assembler, &inst->FullSrcRegisters[0], - &inst->FullDstRegisters[0], inst->Instruction.Opcode); - break; - - /* This is the end. My only friend, the end. */ - case TGSI_OPCODE_END: - break; - default: - debug_printf("r300: fs: Bad opcode %d\n", - inst->Instruction.Opcode); - break; - } - - /* Clamp, if saturation flags are set. */ - if (inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE) { - fs->instructions[fs->instruction_count - 1].inst0 |= - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; - } -} - -static void r300_fs_finalize(struct r3xx_fragment_shader* fs, - struct r300_fs_asm* assembler) -{ - fs->stack_size = assembler->temp_count + assembler->temp_offset + 1; -} - -static void r500_fs_finalize(struct r500_fragment_shader* fs, - struct r300_fs_asm* assembler) -{ - /* XXX should this just go with OPCODE_END? */ - fs->instructions[fs->instruction_count - 1].inst0 |= - R500_INST_LAST; -} - -void r300_translate_fragment_shader(struct r300_context* r300, - struct r3xx_fragment_shader* fs) -{ - struct tgsi_parse_context parser; - int i; - boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500; - struct r300_constant_buffer* consts = - &r300->shader_constants[PIPE_SHADER_FRAGMENT]; - - struct r300_fs_asm* assembler = CALLOC_STRUCT(r300_fs_asm); - if (assembler == NULL) { - return; - } - /* Setup starting offset for immediates. */ - assembler->imm_offset = consts->user_count; - /* Enable depth writes, if needed. */ - assembler->writes_depth = fs->info.writes_z; - - /* Make sure we start at the beginning of the shader. */ - if (is_r500) { - ((struct r500_fragment_shader*)fs)->instruction_count = 0; - } - - tgsi_parse_init(&parser, fs->state.tokens); - - while (!tgsi_parse_end_of_tokens(&parser)) { - tgsi_parse_token(&parser); - - /* This is seriously the lamest way to create fragment programs ever. - * I blame TGSI. */ - switch (parser.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_DECLARATION: - /* Allocated registers sitting at the beginning - * of the program. */ - r300_fs_declare(assembler, &parser.FullToken.FullDeclaration); - break; - case TGSI_TOKEN_TYPE_IMMEDIATE: - debug_printf("r300: Emitting immediate to constant buffer, " - "position %d\n", - assembler->imm_offset + assembler->imm_count); - /* I am not amused by the length of these. */ - for (i = 0; i < 4; i++) { - consts->constants[assembler->imm_offset + - assembler->imm_count][i] = - parser.FullToken.FullImmediate.u.ImmediateFloat32[i] - .Float; - } - assembler->imm_count++; - break; - case TGSI_TOKEN_TYPE_INSTRUCTION: - if (is_r500) { - r500_fs_instruction((struct r500_fragment_shader*)fs, - assembler, &parser.FullToken.FullInstruction); - } else { - r300_fs_instruction((struct r300_fragment_shader*)fs, - assembler, &parser.FullToken.FullInstruction); - } - break; - } - } - - debug_printf("r300: fs: %d texs and %d colors, first free reg is %d\n", - assembler->tex_count, assembler->color_count, - assembler->tex_count + assembler->color_count); - - consts->count = consts->user_count + assembler->imm_count; - fs->uses_imms = assembler->imm_count; - debug_printf("r300: fs: %d total constants, " - "%d from user and %d from immediates\n", consts->count, - consts->user_count, assembler->imm_count); - r300_fs_finalize(fs, assembler); - if (is_r500) { - r500_fs_finalize((struct r500_fragment_shader*)fs, assembler); - } - - tgsi_dump(fs->state.tokens); - /* XXX finish r300 dumper too */ - if (is_r500) { - r500_fs_dump((struct r500_fragment_shader*)fs); - } - - tgsi_parse_free(&parser); - FREE(assembler); -} diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h deleted file mode 100644 index b6087404ce..0000000000 --- a/src/gallium/drivers/r300/r300_state_shader.h +++ /dev/null @@ -1,220 +0,0 @@ -/* - * Copyright 2008 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#ifndef R300_STATE_SHADER_H -#define R300_STATE_SHADER_H - -#include "tgsi/tgsi_parse.h" - -#include "r300_context.h" -#include "r300_debug.h" -#include "r300_reg.h" -#include "r300_screen.h" - -/* XXX this all should find its way back to r300_reg */ -/* Swizzle tools */ -#define R500_SWIZZLE_ZERO 4 -#define R500_SWIZZLE_HALF 5 -#define R500_SWIZZLE_ONE 6 -#define R500_SWIZ_RGB_ZERO ((4 << 0) | (4 << 3) | (4 << 6)) -#define R500_SWIZ_RGB_ONE ((6 << 0) | (6 << 3) | (6 << 6)) -#define R500_SWIZ_RGB_RGB ((0 << 0) | (1 << 3) | (2 << 6)) -#define R500_SWIZ_MOD_NEG 1 -#define R500_SWIZ_MOD_ABS 2 -#define R500_SWIZ_MOD_NEG_ABS 3 -/* Swizzles for inst2 */ -#define R500_SWIZ_TEX_STRQ(x) ((x) << 8) -#define R500_SWIZ_TEX_RGBA(x) ((x) << 24) -/* Swizzles for inst3 */ -#define R500_SWIZ_RGB_A(x) ((x) << 2) -#define R500_SWIZ_RGB_B(x) ((x) << 15) -/* Swizzles for inst4 */ -#define R500_SWIZ_ALPHA_A(x) ((x) << 14) -#define R500_SWIZ_ALPHA_B(x) ((x) << 21) -/* Swizzle for inst5 */ -#define R500_SWIZ_RGBA_C(x) ((x) << 14) -#define R500_SWIZ_ALPHA_C(x) ((x) << 27) -/* Writemasks */ -#define R500_TEX_WMASK(x) ((x) << 11) -#define R500_ALU_WMASK(x) ((x) << 11) -#define R500_ALU_OMASK(x) ((x) << 15) -#define R500_W_OMASK (1 << 31) - -/* TGSI constants. TGSI is like XML: If it can't solve your problems, you're - * not using enough of it. */ -static const struct tgsi_full_src_register r500_constant_zero = { - .SrcRegister.Extended = TRUE, - .SrcRegister.File = TGSI_FILE_NULL, - .SrcRegisterExtSwz.ExtSwizzleX = TGSI_EXTSWIZZLE_ZERO, - .SrcRegisterExtSwz.ExtSwizzleY = TGSI_EXTSWIZZLE_ZERO, - .SrcRegisterExtSwz.ExtSwizzleZ = TGSI_EXTSWIZZLE_ZERO, - .SrcRegisterExtSwz.ExtSwizzleW = TGSI_EXTSWIZZLE_ZERO, -}; - -static const struct tgsi_full_src_register r500_constant_one = { - .SrcRegister.Extended = TRUE, - .SrcRegister.File = TGSI_FILE_NULL, - .SrcRegisterExtSwz.ExtSwizzleX = TGSI_EXTSWIZZLE_ONE, - .SrcRegisterExtSwz.ExtSwizzleY = TGSI_EXTSWIZZLE_ONE, - .SrcRegisterExtSwz.ExtSwizzleZ = TGSI_EXTSWIZZLE_ONE, - .SrcRegisterExtSwz.ExtSwizzleW = TGSI_EXTSWIZZLE_ONE, -}; - -/* Temporary struct used to hold assembly state while putting together - * fragment programs. */ -struct r300_fs_asm { - /* Pipe context. */ - struct r300_context* r300; - /* Number of colors. */ - unsigned color_count; - /* Number of texcoords. */ - unsigned tex_count; - /* Offset for temporary registers. Inputs and temporaries have no - * distinguishing markings, so inputs start at 0 and the first usable - * temporary register is after all inputs. */ - unsigned temp_offset; - /* Number of requested temporary registers. */ - unsigned temp_count; - /* Offset for immediate constants. Neither R300 nor R500 can do four - * inline constants per source, so instead we copy immediates into the - * constant buffer. */ - unsigned imm_offset; - /* Number of immediate constants. */ - unsigned imm_count; - /* Are depth writes enabled? */ - boolean writes_depth; - /* Depth write offset. This is the TGSI output that corresponds to - * depth writes. */ - unsigned depth_output; -}; - -void r300_translate_fragment_shader(struct r300_context* r300, - struct r3xx_fragment_shader* fs); - -static struct r300_fragment_shader r300_passthrough_fragment_shader = { - .alu_instruction_count = 1, - .tex_instruction_count = 0, - .indirections = 0, - .shader.stack_size = 1, - - .instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | - R300_ALU_OUTC_CMP, - .instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | - R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, - .instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | - R300_ALU_OUTA_CMP, - .instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | - R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, -}; - -static struct r500_fragment_shader r500_passthrough_fragment_shader = { - .shader.stack_size = 0, - .instruction_count = 1, - .instructions[0].inst0 = R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | R500_INST_LAST | - R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, - .instructions[0].inst1 = - R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, - .instructions[0].inst2 = - R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, - .instructions[0].inst3 = - R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, - .instructions[0].inst4 = - R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, - .instructions[0].inst5 = - R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0, -}; - -static struct r300_fragment_shader r300_texture_fragment_shader = { - .alu_instruction_count = 1, - .tex_instruction_count = 0, - .indirections = 0, - .shader.stack_size = 1, - - .instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | - R300_ALU_OUTC_CMP, - .instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | - R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, - .instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | - R300_ALU_OUTA_CMP, - .instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | - R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, -}; - -static struct r500_fragment_shader r500_texture_fragment_shader = { - .shader.stack_size = 1, - .instruction_count = 2, - .instructions[0].inst0 = R500_INST_TYPE_TEX | - R500_INST_TEX_SEM_WAIT | - R500_INST_RGB_WMASK_RGB | R500_INST_ALPHA_WMASK | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, - .instructions[0].inst1 = R500_TEX_ID(0) | R500_TEX_INST_LD | - R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED, - .instructions[0].inst2 = R500_TEX_SRC_ADDR(0) | - R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G | - R500_TEX_SRC_R_SWIZ_B | R500_TEX_SRC_Q_SWIZ_A | - R500_TEX_DST_ADDR(0) | - R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | - R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A, - .instructions[0].inst3 = 0x0, - .instructions[0].inst4 = 0x0, - .instructions[0].inst5 = 0x0, - .instructions[1].inst0 = R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | R500_INST_LAST | - R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, - .instructions[1].inst1 = - R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, - .instructions[1].inst2 = - R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, - .instructions[1].inst3 = - R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, - .instructions[1].inst4 = - R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, - .instructions[1].inst5 = - R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0, -}; - -#endif /* R300_STATE_SHADER_H */ diff --git a/src/gallium/drivers/r300/r300_state_tcl.c b/src/gallium/drivers/r300/r300_state_tcl.c deleted file mode 100644 index 8cf8250425..0000000000 --- a/src/gallium/drivers/r300/r300_state_tcl.c +++ /dev/null @@ -1,412 +0,0 @@ -/* - * Copyright 2009 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#include "r300_state_tcl.h" - -static void r300_vs_declare(struct r300_vs_asm* assembler, - struct tgsi_full_declaration* decl) -{ - switch (decl->Declaration.File) { - case TGSI_FILE_INPUT: - break; - case TGSI_FILE_OUTPUT: - switch (decl->Semantic.SemanticName) { - case TGSI_SEMANTIC_POSITION: - assembler->tab[decl->DeclarationRange.First] = 0; - break; - case TGSI_SEMANTIC_COLOR: - assembler->tab[decl->DeclarationRange.First] = - (assembler->point_size ? 1 : 0) + - assembler->out_colors; - break; - case TGSI_SEMANTIC_FOG: - case TGSI_SEMANTIC_GENERIC: - /* XXX multiple? */ - assembler->tab[decl->DeclarationRange.First] = - (assembler->point_size ? 1 : 0) + - assembler->out_colors + - assembler->out_texcoords; - break; - case TGSI_SEMANTIC_PSIZE: - assembler->tab[decl->DeclarationRange.First] = 1; - break; - default: - debug_printf("r300: vs: Bad semantic declaration %d\n", - decl->Semantic.SemanticName); - break; - } - break; - case TGSI_FILE_CONSTANT: - break; - case TGSI_FILE_TEMPORARY: - assembler->temp_count++; - break; - default: - debug_printf("r300: vs: Bad file %d\n", decl->Declaration.File); - break; - } -} - -static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, - struct tgsi_src_register* src) -{ - switch (src->File) { - case TGSI_FILE_NULL: - case TGSI_FILE_INPUT: - /* Probably a zero or one swizzle */ - return R300_PVS_SRC_REG_INPUT; - case TGSI_FILE_TEMPORARY: - return R300_PVS_SRC_REG_TEMPORARY; - case TGSI_FILE_CONSTANT: - case TGSI_FILE_IMMEDIATE: - return R300_PVS_SRC_REG_CONSTANT; - default: - debug_printf("r300: vs: Unimplemented src type %d\n", src->File); - break; - } - return 0; -} - -static INLINE unsigned r300_vs_src(struct r300_vs_asm* assembler, - struct tgsi_src_register* src) -{ - switch (src->File) { - case TGSI_FILE_NULL: - case TGSI_FILE_INPUT: - case TGSI_FILE_TEMPORARY: - case TGSI_FILE_CONSTANT: - return src->Index; - case TGSI_FILE_IMMEDIATE: - return src->Index + assembler->imm_offset; - default: - debug_printf("r300: vs: Unimplemented src type %d\n", src->File); - break; - } - return 0; -} - -static INLINE unsigned r300_vs_dst_type(struct r300_vs_asm* assembler, - struct tgsi_dst_register* dst) -{ - switch (dst->File) { - case TGSI_FILE_TEMPORARY: - return R300_PVS_DST_REG_TEMPORARY; - case TGSI_FILE_OUTPUT: - return R300_PVS_DST_REG_OUT; - default: - debug_printf("r300: vs: Unimplemented dst type %d\n", dst->File); - break; - } - return 0; -} - -static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, - struct tgsi_dst_register* dst) -{ - switch (dst->File) { - case TGSI_FILE_TEMPORARY: - return dst->Index; - case TGSI_FILE_OUTPUT: - return assembler->tab[dst->Index]; - default: - debug_printf("r300: vs: Unimplemented dst %d\n", dst->File); - break; - } - return 0; -} - -static uint32_t r300_vs_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_DP3: - case TGSI_OPCODE_DP4: - return R300_VE_DOT_PRODUCT; - case TGSI_OPCODE_MUL: - return R300_VE_MULTIPLY; - case TGSI_OPCODE_ADD: - case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SUB: - case TGSI_OPCODE_SWZ: - return R300_VE_ADD; - case TGSI_OPCODE_MAX: - return R300_VE_MAXIMUM; - case TGSI_OPCODE_SLT: - return R300_VE_SET_LESS_THAN; - case TGSI_OPCODE_RSQ: - return R300_PVS_DST_MATH_INST | R300_ME_RECIP_DX; - case TGSI_OPCODE_MAD: - return R300_PVS_DST_MACRO_INST | R300_PVS_MACRO_OP_2CLK_MADD; - default: - break; - } - return 0; -} - -static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) -{ - if (reg->SrcRegister.Extended) { - return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | - reg->SrcRegisterExtSwz.ExtSwizzleX | - (reg->SrcRegisterExtSwz.ExtSwizzleY << 3) | - (reg->SrcRegisterExtSwz.ExtSwizzleZ << 6) | - (reg->SrcRegisterExtSwz.ExtSwizzleW << 9); - } else { - return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | - reg->SrcRegister.SwizzleX | - (reg->SrcRegister.SwizzleY << 3) | - (reg->SrcRegister.SwizzleZ << 6) | - (reg->SrcRegister.SwizzleW << 9); - } -} - -/* XXX icky icky icky icky */ -static uint32_t r300_vs_scalar_swiz(struct tgsi_full_src_register* reg) -{ - if (reg->SrcRegister.Extended) { - return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | - reg->SrcRegisterExtSwz.ExtSwizzleX | - (reg->SrcRegisterExtSwz.ExtSwizzleX << 3) | - (reg->SrcRegisterExtSwz.ExtSwizzleX << 6) | - (reg->SrcRegisterExtSwz.ExtSwizzleX << 9); - } else { - return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | - reg->SrcRegister.SwizzleX | - (reg->SrcRegister.SwizzleX << 3) | - (reg->SrcRegister.SwizzleX << 6) | - (reg->SrcRegister.SwizzleX << 9); - } -} - -/* XXX scalar stupidity */ -static void r300_vs_emit_inst(struct r300_vertex_shader* vs, - struct r300_vs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst, - unsigned op, - unsigned count, - boolean is_scalar) -{ - int i = vs->instruction_count; - vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(r300_vs_op(op)) | - R300_PVS_DST_REG_TYPE(r300_vs_dst_type(assembler, &dst->DstRegister)) | - R300_PVS_DST_OFFSET(r300_vs_dst(assembler, &dst->DstRegister)) | - R300_PVS_DST_WE(dst->DstRegister.WriteMask); - switch (count) { - case 3: - vs->instructions[i].inst3 = - R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, - &src[2].SrcRegister)) | - R300_PVS_SRC_OFFSET(r300_vs_src(assembler, - &src[2].SrcRegister)) | - R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[2])); - /* Fall through */ - case 2: - vs->instructions[i].inst2 = - R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, - &src[1].SrcRegister)) | - R300_PVS_SRC_OFFSET(r300_vs_src(assembler, - &src[1].SrcRegister)) | - R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[1])); - /* Fall through */ - case 1: - vs->instructions[i].inst1 = - R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, - &src[0].SrcRegister)) | - R300_PVS_SRC_OFFSET(r300_vs_src(assembler, - &src[0].SrcRegister)) | - /* XXX the icky, it burns */ - R300_PVS_SRC_SWIZZLE(is_scalar ? r300_vs_scalar_swiz(&src[0]) - : r300_vs_swiz(&src[0])); - break; - } - vs->instruction_count++; -} - -static void r300_vs_instruction(struct r300_vertex_shader* vs, - struct r300_vs_asm* assembler, - struct tgsi_full_instruction* inst) -{ - switch (inst->Instruction.Opcode) { - case TGSI_OPCODE_RSQ: - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 1, TRUE); - break; - case TGSI_OPCODE_SUB: - inst->FullSrcRegisters[1].SrcRegister.Negate = - !inst->FullSrcRegisters[1].SrcRegister.Negate; - /* Fall through */ - case TGSI_OPCODE_ADD: - case TGSI_OPCODE_MUL: - case TGSI_OPCODE_MAX: - case TGSI_OPCODE_SLT: - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2, FALSE); - break; - case TGSI_OPCODE_DP3: - /* Set alpha swizzle to zero for src0 and src1 */ - if (!inst->FullSrcRegisters[0].SrcRegister.Extended) { - inst->FullSrcRegisters[0].SrcRegister.Extended = TRUE; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX = - inst->FullSrcRegisters[0].SrcRegister.SwizzleX; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleY = - inst->FullSrcRegisters[0].SrcRegister.SwizzleY; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleZ = - inst->FullSrcRegisters[0].SrcRegister.SwizzleZ; - } - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = - TGSI_EXTSWIZZLE_ZERO; - if (!inst->FullSrcRegisters[1].SrcRegister.Extended) { - inst->FullSrcRegisters[1].SrcRegister.Extended = TRUE; - inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleX = - inst->FullSrcRegisters[1].SrcRegister.SwizzleX; - inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleY = - inst->FullSrcRegisters[1].SrcRegister.SwizzleY; - inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleZ = - inst->FullSrcRegisters[1].SrcRegister.SwizzleZ; - } - inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleW = - TGSI_EXTSWIZZLE_ZERO; - /* Fall through */ - case TGSI_OPCODE_DP4: - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2, FALSE); - break; - case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SWZ: - inst->FullSrcRegisters[1] = r300_constant_zero; - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2, FALSE); - break; - case TGSI_OPCODE_MAD: - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 3, FALSE); - break; - case TGSI_OPCODE_END: - break; - default: - debug_printf("r300: vs: Bad opcode %d\n", - inst->Instruction.Opcode); - break; - } -} - -static void r300_vs_init(struct r300_vertex_shader* vs, - struct r300_vs_asm* assembler) -{ - struct tgsi_shader_info* info = &vs->info; - int i; - - for (i = 0; i < info->num_outputs; i++) { - switch (info->output_semantic_name[i]) { - case TGSI_SEMANTIC_PSIZE: - assembler->point_size = TRUE; - break; - case TGSI_SEMANTIC_COLOR: - assembler->out_colors++; - break; - case TGSI_SEMANTIC_FOG: - case TGSI_SEMANTIC_GENERIC: - assembler->out_texcoords++; - break; - } - } - - vs->instruction_count = 0; -} - -void r300_translate_vertex_shader(struct r300_context* r300, - struct r300_vertex_shader* vs) -{ - struct tgsi_parse_context parser; - int i; - struct r300_constant_buffer* consts = - &r300->shader_constants[PIPE_SHADER_VERTEX]; - - struct r300_vs_asm* assembler = CALLOC_STRUCT(r300_vs_asm); - if (assembler == NULL) { - return; - } - - /* Init assembler. */ - r300_vs_init(vs, assembler); - - /* Setup starting offset for immediates. */ - assembler->imm_offset = consts->user_count; - - tgsi_parse_init(&parser, vs->state.tokens); - - while (!tgsi_parse_end_of_tokens(&parser)) { - tgsi_parse_token(&parser); - - /* This is seriously the lamest way to create fragment programs ever. - * I blame TGSI. */ - switch (parser.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_DECLARATION: - /* Allocated registers sitting at the beginning - * of the program. */ - r300_vs_declare(assembler, &parser.FullToken.FullDeclaration); - break; - case TGSI_TOKEN_TYPE_IMMEDIATE: - debug_printf("r300: Emitting immediate to constant buffer, " - "position %d\n", - assembler->imm_offset + assembler->imm_count); - /* I am not amused by the length of these. */ - for (i = 0; i < 4; i++) { - consts->constants[assembler->imm_offset + - assembler->imm_count][i] = - parser.FullToken.FullImmediate.u.ImmediateFloat32[i] - .Float; - } - assembler->imm_count++; - break; - case TGSI_TOKEN_TYPE_INSTRUCTION: - r300_vs_instruction(vs, assembler, - &parser.FullToken.FullInstruction); - break; - } - } - - debug_printf("r300: vs: %d texs and %d colors, first free reg is %d\n", - assembler->tex_count, assembler->color_count, - assembler->tex_count + assembler->color_count); - - consts->count = consts->user_count + assembler->imm_count; - vs->uses_imms = assembler->imm_count; - debug_printf("r300: vs: %d total constants, " - "%d from user and %d from immediates\n", consts->count, - consts->user_count, assembler->imm_count); - - debug_printf("r300: vs: tab: %d %d %d %d\n", assembler->tab[0], - assembler->tab[1], assembler->tab[2], assembler->tab[3]); - - tgsi_dump(vs->state.tokens); - /* XXX finish r300 vertex shader dumper */ - r300_vs_dump(vs); - - tgsi_parse_free(&parser); - FREE(assembler); -} diff --git a/src/gallium/drivers/r300/r300_state_tcl.h b/src/gallium/drivers/r300/r300_state_tcl.h deleted file mode 100644 index 2c8b586c2f..0000000000 --- a/src/gallium/drivers/r300/r300_state_tcl.h +++ /dev/null @@ -1,164 +0,0 @@ -/* - * Copyright 2009 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#ifndef R300_STATE_TCL_H -#define R300_STATE_TCL_H - -#include "tgsi/tgsi_parse.h" - -#include "r300_context.h" -#include "r300_debug.h" -#include "r300_reg.h" -#include "r300_screen.h" - -/* XXX get these to r300_reg */ -#define R300_PVS_DST_OPCODE(x) ((x) << 0) -# define R300_VE_DOT_PRODUCT 1 -# define R300_VE_MULTIPLY 2 -# define R300_VE_ADD 3 -# define R300_VE_MAXIMUM 7 -# define R300_VE_SET_LESS_THAN 10 -#define R300_PVS_DST_MATH_INST (1 << 6) -# define R300_ME_RECIP_DX 6 -#define R300_PVS_DST_MACRO_INST (1 << 7) -# define R300_PVS_MACRO_OP_2CLK_MADD 0 -#define R300_PVS_DST_REG_TYPE(x) ((x) << 8) -# define R300_PVS_DST_REG_TEMPORARY 0 -# define R300_PVS_DST_REG_A0 1 -# define R300_PVS_DST_REG_OUT 2 -# define R300_PVS_DST_REG_OUT_REPL_X 3 -# define R300_PVS_DST_REG_ALT_TEMPORARY 4 -# define R300_PVS_DST_REG_INPUT 5 -#define R300_PVS_DST_OFFSET(x) ((x) << 13) -#define R300_PVS_DST_WE(x) ((x) << 20) -#define R300_PVS_DST_WE_XYZW (0xf << 20) - -#define R300_PVS_SRC_REG_TYPE(x) ((x) << 0) -# define R300_PVS_SRC_REG_TEMPORARY 0 -# define R300_PVS_SRC_REG_INPUT 1 -# define R300_PVS_SRC_REG_CONSTANT 2 -# define R300_PVS_SRC_REG_ALT_TEMPORARY 3 -#define R300_PVS_SRC_OFFSET(x) ((x) << 5) -#define R300_PVS_SRC_SWIZZLE(x) ((x) << 13) -# define R300_PVS_SRC_SELECT_X 0 -# define R300_PVS_SRC_SELECT_Y 1 -# define R300_PVS_SRC_SELECT_Z 2 -# define R300_PVS_SRC_SELECT_W 3 -# define R300_PVS_SRC_SELECT_FORCE_0 4 -# define R300_PVS_SRC_SELECT_FORCE_1 5 -# define R300_PVS_SRC_SWIZZLE_XYZW \ - ((R300_PVS_SRC_SELECT_X | (R300_PVS_SRC_SELECT_Y << 3) | \ - (R300_PVS_SRC_SELECT_Z << 6) | (R300_PVS_SRC_SELECT_W << 9)) << 13) -# define R300_PVS_SRC_SWIZZLE_ZERO \ - ((R300_PVS_SRC_SELECT_FORCE_0 | (R300_PVS_SRC_SELECT_FORCE_0 << 3) | \ - (R300_PVS_SRC_SELECT_FORCE_0 << 6) | \ - (R300_PVS_SRC_SELECT_FORCE_0 << 9)) << 13) -# define R300_PVS_SRC_SWIZZLE_ONE \ - ((R300_PVS_SRC_SELECT_FORCE_1 | (R300_PVS_SRC_SELECT_FORCE_1 << 3) | \ - (R300_PVS_SRC_SELECT_FORCE_1 << 6) | \ - (R300_PVS_SRC_SELECT_FORCE_1 << 9)) << 13) -#define R300_PVS_MODIFIER_X (1 << 25) -#define R300_PVS_MODIFIER_Y (1 << 26) -#define R300_PVS_MODIFIER_Z (1 << 27) -#define R300_PVS_MODIFIER_W (1 << 28) -#define R300_PVS_NEGATE_XYZW \ - (R300_PVS_MODIFIER_X | R300_PVS_MODIFIER_Y | \ - R300_PVS_MODIFIER_Z | R300_PVS_MODIFIER_W) - -static const struct tgsi_full_src_register r300_constant_zero = { - .SrcRegister.Extended = TRUE, - .SrcRegister.File = TGSI_FILE_NULL, - .SrcRegisterExtSwz.ExtSwizzleX = TGSI_EXTSWIZZLE_ZERO, - .SrcRegisterExtSwz.ExtSwizzleY = TGSI_EXTSWIZZLE_ZERO, - .SrcRegisterExtSwz.ExtSwizzleZ = TGSI_EXTSWIZZLE_ZERO, - .SrcRegisterExtSwz.ExtSwizzleW = TGSI_EXTSWIZZLE_ZERO, -}; - -/* Temporary struct used to hold assembly state while putting together - * fragment programs. */ -struct r300_vs_asm { - /* Pipe context. */ - struct r300_context* r300; - /* Number of colors. */ - unsigned color_count; - /* Number of texcoords. */ - unsigned tex_count; - /* Number of requested temporary registers. */ - unsigned temp_count; - /* Offset for immediate constants. Neither R300 nor R500 can do four - * inline constants per source, so instead we copy immediates into the - * constant buffer. */ - unsigned imm_offset; - /* Number of immediate constants. */ - unsigned imm_count; - /* Number of colors to write. */ - unsigned out_colors; - /* Number of texcoords to write. */ - unsigned out_texcoords; - /* Whether to emit point size. */ - boolean point_size; - /* Tab of declared outputs to OVM outputs. */ - unsigned tab[16]; -}; - -static struct r300_vertex_shader r300_passthrough_vertex_shader = { - /* XXX translate these back into normal instructions */ - .instruction_count = 2, - .instructions[0].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | - R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | - R300_PVS_DST_OFFSET(0) | R300_PVS_DST_WE_XYZW, - .instructions[0].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | - R300_PVS_SRC_OFFSET(0) | R300_PVS_SRC_SWIZZLE_XYZW, - .instructions[0].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, - .instructions[0].inst3 = 0x0, - .instructions[1].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | - R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | - R300_PVS_DST_OFFSET(1) | R300_PVS_DST_WE_XYZW, - .instructions[1].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | - R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, - .instructions[1].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, - .instructions[1].inst3 = 0x0, -}; - -static struct r300_vertex_shader r300_texture_vertex_shader = { - /* XXX translate these back into normal instructions */ - .instruction_count = 2, - .instructions[0].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | - R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | - R300_PVS_DST_OFFSET(0) | R300_PVS_DST_WE_XYZW, - .instructions[0].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | - R300_PVS_SRC_OFFSET(0) | R300_PVS_SRC_SWIZZLE_XYZW, - .instructions[0].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, - .instructions[0].inst3 = 0x0, - .instructions[1].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | - R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | - R300_PVS_DST_OFFSET(1) | R300_PVS_DST_WE_XYZW, - .instructions[1].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | - R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, - .instructions[1].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, - .instructions[1].inst3 = 0x0, -}; - -void r300_translate_vertex_shader(struct r300_context* r300, - struct r300_vertex_shader* vs); - -#endif /* R300_STATE_TCL_H */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index c9e2dff14e..75b5096919 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -151,11 +151,11 @@ validate: /* Fragment shader setup */ if (caps->is_r500) { - r500_emit_fragment_shader(r300, &r500_passthrough_fragment_shader); - r300_emit_rs_block_state(r300, &r500_rs_block_clear_state); + r500_emit_fragment_shader(r300, &r5xx_passthrough_fragment_shader); + r300_emit_rs_block_state(r300, &r5xx_rs_block_clear_state); } else { - r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader); - r300_emit_rs_block_state(r300, &r300_rs_block_clear_state); + r300_emit_fragment_shader(r300, &r3xx_passthrough_fragment_shader); + r300_emit_rs_block_state(r300, &r3xx_rs_block_clear_state); } BEGIN_CS(26); @@ -291,11 +291,11 @@ validate: /* Fragment shader setup */ if (caps->is_r500) { - r500_emit_fragment_shader(r300, &r500_texture_fragment_shader); - r300_emit_rs_block_state(r300, &r500_rs_block_copy_state); + r500_emit_fragment_shader(r300, &r5xx_texture_fragment_shader); + r300_emit_rs_block_state(r300, &r5xx_rs_block_copy_state); } else { - r300_emit_fragment_shader(r300, &r300_texture_fragment_shader); - r300_emit_rs_block_state(r300, &r300_rs_block_copy_state); + r300_emit_fragment_shader(r300, &r3xx_texture_fragment_shader); + r300_emit_rs_block_state(r300, &r3xx_rs_block_copy_state); } BEGIN_CS(30); diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index 9a4c39f58b..d01f0b143f 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -31,8 +31,8 @@ #include "r300_context.h" #include "r300_cs.h" #include "r300_emit.h" -#include "r300_state_shader.h" -#include "r300_state_tcl.h" +#include "r300_fs.h" +#include "r300_vs.h" #include "r300_state_inlines.h" static struct r300_blend_state blend_clear_state = { @@ -72,7 +72,7 @@ static struct r300_rs_state rs_clear_state = { .color_control = R300_SHADE_MODEL_FLAT, }; -static struct r300_rs_block r300_rs_block_clear_state = { +static struct r300_rs_block r3xx_rs_block_clear_state = { .ip[0] = R500_RS_SEL_S(R300_RS_SEL_K0) | R500_RS_SEL_T(R300_RS_SEL_K0) | R500_RS_SEL_R(R300_RS_SEL_K0) | @@ -82,7 +82,7 @@ static struct r300_rs_block r300_rs_block_clear_state = { .inst_count = 0, }; -static struct r300_rs_block r500_rs_block_clear_state = { +static struct r300_rs_block r5xx_rs_block_clear_state = { .ip[0] = R500_RS_SEL_S(R500_RS_IP_PTR_K0) | R500_RS_SEL_T(R500_RS_IP_PTR_K0) | R500_RS_SEL_R(R500_RS_IP_PTR_K0) | @@ -94,7 +94,7 @@ static struct r300_rs_block r500_rs_block_clear_state = { /* The following state is used for surface_copy only. */ -static struct r300_rs_block r300_rs_block_copy_state = { +static struct r300_rs_block r3xx_rs_block_copy_state = { .ip[0] = R500_RS_SEL_S(R300_RS_SEL_K0) | R500_RS_SEL_T(R300_RS_SEL_K0) | R500_RS_SEL_R(R300_RS_SEL_K0) | @@ -104,7 +104,7 @@ static struct r300_rs_block r300_rs_block_copy_state = { .inst_count = R300_RS_TX_OFFSET(0), }; -static struct r300_rs_block r500_rs_block_copy_state = { +static struct r300_rs_block r5xx_rs_block_copy_state = { .ip[0] = R500_RS_SEL_S(0) | R500_RS_SEL_T(1) | R500_RS_SEL_R(R500_RS_IP_PTR_K0) | diff --git a/src/gallium/drivers/r300/r300_vs.c b/src/gallium/drivers/r300/r300_vs.c new file mode 100644 index 0000000000..f87435f9f0 --- /dev/null +++ b/src/gallium/drivers/r300/r300_vs.c @@ -0,0 +1,412 @@ +/* + * Copyright 2009 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_vs.h" + +static void r300_vs_declare(struct r300_vs_asm* assembler, + struct tgsi_full_declaration* decl) +{ + switch (decl->Declaration.File) { + case TGSI_FILE_INPUT: + break; + case TGSI_FILE_OUTPUT: + switch (decl->Semantic.SemanticName) { + case TGSI_SEMANTIC_POSITION: + assembler->tab[decl->DeclarationRange.First] = 0; + break; + case TGSI_SEMANTIC_COLOR: + assembler->tab[decl->DeclarationRange.First] = + (assembler->point_size ? 1 : 0) + + assembler->out_colors; + break; + case TGSI_SEMANTIC_FOG: + case TGSI_SEMANTIC_GENERIC: + /* XXX multiple? */ + assembler->tab[decl->DeclarationRange.First] = + (assembler->point_size ? 1 : 0) + + assembler->out_colors + + assembler->out_texcoords; + break; + case TGSI_SEMANTIC_PSIZE: + assembler->tab[decl->DeclarationRange.First] = 1; + break; + default: + debug_printf("r300: vs: Bad semantic declaration %d\n", + decl->Semantic.SemanticName); + break; + } + break; + case TGSI_FILE_CONSTANT: + break; + case TGSI_FILE_TEMPORARY: + assembler->temp_count++; + break; + default: + debug_printf("r300: vs: Bad file %d\n", decl->Declaration.File); + break; + } +} + +static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, + struct tgsi_src_register* src) +{ + switch (src->File) { + case TGSI_FILE_NULL: + case TGSI_FILE_INPUT: + /* Probably a zero or one swizzle */ + return R300_PVS_SRC_REG_INPUT; + case TGSI_FILE_TEMPORARY: + return R300_PVS_SRC_REG_TEMPORARY; + case TGSI_FILE_CONSTANT: + case TGSI_FILE_IMMEDIATE: + return R300_PVS_SRC_REG_CONSTANT; + default: + debug_printf("r300: vs: Unimplemented src type %d\n", src->File); + break; + } + return 0; +} + +static INLINE unsigned r300_vs_src(struct r300_vs_asm* assembler, + struct tgsi_src_register* src) +{ + switch (src->File) { + case TGSI_FILE_NULL: + case TGSI_FILE_INPUT: + case TGSI_FILE_TEMPORARY: + case TGSI_FILE_CONSTANT: + return src->Index; + case TGSI_FILE_IMMEDIATE: + return src->Index + assembler->imm_offset; + default: + debug_printf("r300: vs: Unimplemented src type %d\n", src->File); + break; + } + return 0; +} + +static INLINE unsigned r300_vs_dst_type(struct r300_vs_asm* assembler, + struct tgsi_dst_register* dst) +{ + switch (dst->File) { + case TGSI_FILE_TEMPORARY: + return R300_PVS_DST_REG_TEMPORARY; + case TGSI_FILE_OUTPUT: + return R300_PVS_DST_REG_OUT; + default: + debug_printf("r300: vs: Unimplemented dst type %d\n", dst->File); + break; + } + return 0; +} + +static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, + struct tgsi_dst_register* dst) +{ + switch (dst->File) { + case TGSI_FILE_TEMPORARY: + return dst->Index; + case TGSI_FILE_OUTPUT: + return assembler->tab[dst->Index]; + default: + debug_printf("r300: vs: Unimplemented dst %d\n", dst->File); + break; + } + return 0; +} + +static uint32_t r300_vs_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_DP3: + case TGSI_OPCODE_DP4: + return R300_VE_DOT_PRODUCT; + case TGSI_OPCODE_MUL: + return R300_VE_MULTIPLY; + case TGSI_OPCODE_ADD: + case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SUB: + case TGSI_OPCODE_SWZ: + return R300_VE_ADD; + case TGSI_OPCODE_MAX: + return R300_VE_MAXIMUM; + case TGSI_OPCODE_SLT: + return R300_VE_SET_LESS_THAN; + case TGSI_OPCODE_RSQ: + return R300_PVS_DST_MATH_INST | R300_ME_RECIP_DX; + case TGSI_OPCODE_MAD: + return R300_PVS_DST_MACRO_INST | R300_PVS_MACRO_OP_2CLK_MADD; + default: + break; + } + return 0; +} + +static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) +{ + if (reg->SrcRegister.Extended) { + return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | + reg->SrcRegisterExtSwz.ExtSwizzleX | + (reg->SrcRegisterExtSwz.ExtSwizzleY << 3) | + (reg->SrcRegisterExtSwz.ExtSwizzleZ << 6) | + (reg->SrcRegisterExtSwz.ExtSwizzleW << 9); + } else { + return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | + reg->SrcRegister.SwizzleX | + (reg->SrcRegister.SwizzleY << 3) | + (reg->SrcRegister.SwizzleZ << 6) | + (reg->SrcRegister.SwizzleW << 9); + } +} + +/* XXX icky icky icky icky */ +static uint32_t r300_vs_scalar_swiz(struct tgsi_full_src_register* reg) +{ + if (reg->SrcRegister.Extended) { + return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | + reg->SrcRegisterExtSwz.ExtSwizzleX | + (reg->SrcRegisterExtSwz.ExtSwizzleX << 3) | + (reg->SrcRegisterExtSwz.ExtSwizzleX << 6) | + (reg->SrcRegisterExtSwz.ExtSwizzleX << 9); + } else { + return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | + reg->SrcRegister.SwizzleX | + (reg->SrcRegister.SwizzleX << 3) | + (reg->SrcRegister.SwizzleX << 6) | + (reg->SrcRegister.SwizzleX << 9); + } +} + +/* XXX scalar stupidity */ +static void r300_vs_emit_inst(struct r300_vertex_shader* vs, + struct r300_vs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst, + unsigned op, + unsigned count, + boolean is_scalar) +{ + int i = vs->instruction_count; + vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(r300_vs_op(op)) | + R300_PVS_DST_REG_TYPE(r300_vs_dst_type(assembler, &dst->DstRegister)) | + R300_PVS_DST_OFFSET(r300_vs_dst(assembler, &dst->DstRegister)) | + R300_PVS_DST_WE(dst->DstRegister.WriteMask); + switch (count) { + case 3: + vs->instructions[i].inst3 = + R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, + &src[2].SrcRegister)) | + R300_PVS_SRC_OFFSET(r300_vs_src(assembler, + &src[2].SrcRegister)) | + R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[2])); + /* Fall through */ + case 2: + vs->instructions[i].inst2 = + R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, + &src[1].SrcRegister)) | + R300_PVS_SRC_OFFSET(r300_vs_src(assembler, + &src[1].SrcRegister)) | + R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[1])); + /* Fall through */ + case 1: + vs->instructions[i].inst1 = + R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, + &src[0].SrcRegister)) | + R300_PVS_SRC_OFFSET(r300_vs_src(assembler, + &src[0].SrcRegister)) | + /* XXX the icky, it burns */ + R300_PVS_SRC_SWIZZLE(is_scalar ? r300_vs_scalar_swiz(&src[0]) + : r300_vs_swiz(&src[0])); + break; + } + vs->instruction_count++; +} + +static void r300_vs_instruction(struct r300_vertex_shader* vs, + struct r300_vs_asm* assembler, + struct tgsi_full_instruction* inst) +{ + switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_RSQ: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 1, TRUE); + break; + case TGSI_OPCODE_SUB: + inst->FullSrcRegisters[1].SrcRegister.Negate = + !inst->FullSrcRegisters[1].SrcRegister.Negate; + /* Fall through */ + case TGSI_OPCODE_ADD: + case TGSI_OPCODE_MUL: + case TGSI_OPCODE_MAX: + case TGSI_OPCODE_SLT: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 2, FALSE); + break; + case TGSI_OPCODE_DP3: + /* Set alpha swizzle to zero for src0 and src1 */ + if (!inst->FullSrcRegisters[0].SrcRegister.Extended) { + inst->FullSrcRegisters[0].SrcRegister.Extended = TRUE; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX = + inst->FullSrcRegisters[0].SrcRegister.SwizzleX; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleY = + inst->FullSrcRegisters[0].SrcRegister.SwizzleY; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleZ = + inst->FullSrcRegisters[0].SrcRegister.SwizzleZ; + } + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = + TGSI_EXTSWIZZLE_ZERO; + if (!inst->FullSrcRegisters[1].SrcRegister.Extended) { + inst->FullSrcRegisters[1].SrcRegister.Extended = TRUE; + inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleX = + inst->FullSrcRegisters[1].SrcRegister.SwizzleX; + inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleY = + inst->FullSrcRegisters[1].SrcRegister.SwizzleY; + inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleZ = + inst->FullSrcRegisters[1].SrcRegister.SwizzleZ; + } + inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleW = + TGSI_EXTSWIZZLE_ZERO; + /* Fall through */ + case TGSI_OPCODE_DP4: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 2, FALSE); + break; + case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SWZ: + inst->FullSrcRegisters[1] = r300_constant_zero; + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 2, FALSE); + break; + case TGSI_OPCODE_MAD: + r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, + 3, FALSE); + break; + case TGSI_OPCODE_END: + break; + default: + debug_printf("r300: vs: Bad opcode %d\n", + inst->Instruction.Opcode); + break; + } +} + +static void r300_vs_init(struct r300_vertex_shader* vs, + struct r300_vs_asm* assembler) +{ + struct tgsi_shader_info* info = &vs->info; + int i; + + for (i = 0; i < info->num_outputs; i++) { + switch (info->output_semantic_name[i]) { + case TGSI_SEMANTIC_PSIZE: + assembler->point_size = TRUE; + break; + case TGSI_SEMANTIC_COLOR: + assembler->out_colors++; + break; + case TGSI_SEMANTIC_FOG: + case TGSI_SEMANTIC_GENERIC: + assembler->out_texcoords++; + break; + } + } + + vs->instruction_count = 0; +} + +void r300_translate_vertex_shader(struct r300_context* r300, + struct r300_vertex_shader* vs) +{ + struct tgsi_parse_context parser; + int i; + struct r300_constant_buffer* consts = + &r300->shader_constants[PIPE_SHADER_VERTEX]; + + struct r300_vs_asm* assembler = CALLOC_STRUCT(r300_vs_asm); + if (assembler == NULL) { + return; + } + + /* Init assembler. */ + r300_vs_init(vs, assembler); + + /* Setup starting offset for immediates. */ + assembler->imm_offset = consts->user_count; + + tgsi_parse_init(&parser, vs->state.tokens); + + while (!tgsi_parse_end_of_tokens(&parser)) { + tgsi_parse_token(&parser); + + /* This is seriously the lamest way to create fragment programs ever. + * I blame TGSI. */ + switch (parser.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_DECLARATION: + /* Allocated registers sitting at the beginning + * of the program. */ + r300_vs_declare(assembler, &parser.FullToken.FullDeclaration); + break; + case TGSI_TOKEN_TYPE_IMMEDIATE: + debug_printf("r300: Emitting immediate to constant buffer, " + "position %d\n", + assembler->imm_offset + assembler->imm_count); + /* I am not amused by the length of these. */ + for (i = 0; i < 4; i++) { + consts->constants[assembler->imm_offset + + assembler->imm_count][i] = + parser.FullToken.FullImmediate.u.ImmediateFloat32[i] + .Float; + } + assembler->imm_count++; + break; + case TGSI_TOKEN_TYPE_INSTRUCTION: + r300_vs_instruction(vs, assembler, + &parser.FullToken.FullInstruction); + break; + } + } + + debug_printf("r300: vs: %d texs and %d colors, first free reg is %d\n", + assembler->tex_count, assembler->color_count, + assembler->tex_count + assembler->color_count); + + consts->count = consts->user_count + assembler->imm_count; + vs->uses_imms = assembler->imm_count; + debug_printf("r300: vs: %d total constants, " + "%d from user and %d from immediates\n", consts->count, + consts->user_count, assembler->imm_count); + + debug_printf("r300: vs: tab: %d %d %d %d\n", assembler->tab[0], + assembler->tab[1], assembler->tab[2], assembler->tab[3]); + + tgsi_dump(vs->state.tokens, 0); + /* XXX finish r300 vertex shader dumper */ + r300_vs_dump(vs); + + tgsi_parse_free(&parser); + FREE(assembler); +} diff --git a/src/gallium/drivers/r300/r300_vs.h b/src/gallium/drivers/r300/r300_vs.h new file mode 100644 index 0000000000..165d717812 --- /dev/null +++ b/src/gallium/drivers/r300/r300_vs.h @@ -0,0 +1,157 @@ +/* + * Copyright 2009 Corbin Simpson + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_VS_H +#define R300_VS_H + +#include "tgsi/tgsi_parse.h" +#include "tgsi/tgsi_dump.h" + +#include "r300_context.h" +#include "r300_debug.h" +#include "r300_reg.h" +#include "r300_screen.h" +#include "r300_shader_inlines.h" + +/* XXX get these to r300_reg */ +#define R300_PVS_DST_OPCODE(x) ((x) << 0) +# define R300_VE_DOT_PRODUCT 1 +# define R300_VE_MULTIPLY 2 +# define R300_VE_ADD 3 +# define R300_VE_MAXIMUM 7 +# define R300_VE_SET_LESS_THAN 10 +#define R300_PVS_DST_MATH_INST (1 << 6) +# define R300_ME_RECIP_DX 6 +#define R300_PVS_DST_MACRO_INST (1 << 7) +# define R300_PVS_MACRO_OP_2CLK_MADD 0 +#define R300_PVS_DST_REG_TYPE(x) ((x) << 8) +# define R300_PVS_DST_REG_TEMPORARY 0 +# define R300_PVS_DST_REG_A0 1 +# define R300_PVS_DST_REG_OUT 2 +# define R300_PVS_DST_REG_OUT_REPL_X 3 +# define R300_PVS_DST_REG_ALT_TEMPORARY 4 +# define R300_PVS_DST_REG_INPUT 5 +#define R300_PVS_DST_OFFSET(x) ((x) << 13) +#define R300_PVS_DST_WE(x) ((x) << 20) +#define R300_PVS_DST_WE_XYZW (0xf << 20) + +#define R300_PVS_SRC_REG_TYPE(x) ((x) << 0) +# define R300_PVS_SRC_REG_TEMPORARY 0 +# define R300_PVS_SRC_REG_INPUT 1 +# define R300_PVS_SRC_REG_CONSTANT 2 +# define R300_PVS_SRC_REG_ALT_TEMPORARY 3 +#define R300_PVS_SRC_OFFSET(x) ((x) << 5) +#define R300_PVS_SRC_SWIZZLE(x) ((x) << 13) +# define R300_PVS_SRC_SELECT_X 0 +# define R300_PVS_SRC_SELECT_Y 1 +# define R300_PVS_SRC_SELECT_Z 2 +# define R300_PVS_SRC_SELECT_W 3 +# define R300_PVS_SRC_SELECT_FORCE_0 4 +# define R300_PVS_SRC_SELECT_FORCE_1 5 +# define R300_PVS_SRC_SWIZZLE_XYZW \ + ((R300_PVS_SRC_SELECT_X | (R300_PVS_SRC_SELECT_Y << 3) | \ + (R300_PVS_SRC_SELECT_Z << 6) | (R300_PVS_SRC_SELECT_W << 9)) << 13) +# define R300_PVS_SRC_SWIZZLE_ZERO \ + ((R300_PVS_SRC_SELECT_FORCE_0 | (R300_PVS_SRC_SELECT_FORCE_0 << 3) | \ + (R300_PVS_SRC_SELECT_FORCE_0 << 6) | \ + (R300_PVS_SRC_SELECT_FORCE_0 << 9)) << 13) +# define R300_PVS_SRC_SWIZZLE_ONE \ + ((R300_PVS_SRC_SELECT_FORCE_1 | (R300_PVS_SRC_SELECT_FORCE_1 << 3) | \ + (R300_PVS_SRC_SELECT_FORCE_1 << 6) | \ + (R300_PVS_SRC_SELECT_FORCE_1 << 9)) << 13) +#define R300_PVS_MODIFIER_X (1 << 25) +#define R300_PVS_MODIFIER_Y (1 << 26) +#define R300_PVS_MODIFIER_Z (1 << 27) +#define R300_PVS_MODIFIER_W (1 << 28) +#define R300_PVS_NEGATE_XYZW \ + (R300_PVS_MODIFIER_X | R300_PVS_MODIFIER_Y | \ + R300_PVS_MODIFIER_Z | R300_PVS_MODIFIER_W) + +/* Temporary struct used to hold assembly state while putting together + * fragment programs. */ +struct r300_vs_asm { + /* Pipe context. */ + struct r300_context* r300; + /* Number of colors. */ + unsigned color_count; + /* Number of texcoords. */ + unsigned tex_count; + /* Number of requested temporary registers. */ + unsigned temp_count; + /* Offset for immediate constants. Neither R300 nor R500 can do four + * inline constants per source, so instead we copy immediates into the + * constant buffer. */ + unsigned imm_offset; + /* Number of immediate constants. */ + unsigned imm_count; + /* Number of colors to write. */ + unsigned out_colors; + /* Number of texcoords to write. */ + unsigned out_texcoords; + /* Whether to emit point size. */ + boolean point_size; + /* Tab of declared outputs to OVM outputs. */ + unsigned tab[16]; +}; + +static struct r300_vertex_shader r300_passthrough_vertex_shader = { + /* XXX translate these back into normal instructions */ + .instruction_count = 2, + .instructions[0].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(0) | R300_PVS_DST_WE_XYZW, + .instructions[0].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | + R300_PVS_SRC_OFFSET(0) | R300_PVS_SRC_SWIZZLE_XYZW, + .instructions[0].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, + .instructions[0].inst3 = 0x0, + .instructions[1].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(1) | R300_PVS_DST_WE_XYZW, + .instructions[1].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | + R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, + .instructions[1].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, + .instructions[1].inst3 = 0x0, +}; + +static struct r300_vertex_shader r300_texture_vertex_shader = { + /* XXX translate these back into normal instructions */ + .instruction_count = 2, + .instructions[0].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(0) | R300_PVS_DST_WE_XYZW, + .instructions[0].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | + R300_PVS_SRC_OFFSET(0) | R300_PVS_SRC_SWIZZLE_XYZW, + .instructions[0].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, + .instructions[0].inst3 = 0x0, + .instructions[1].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(1) | R300_PVS_DST_WE_XYZW, + .instructions[1].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | + R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, + .instructions[1].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, + .instructions[1].inst3 = 0x0, +}; + +void r300_translate_vertex_shader(struct r300_context* r300, + struct r300_vertex_shader* vs); + +#endif /* R300_VS_H */ diff --git a/src/gallium/drivers/r300/r3xx_fs.c b/src/gallium/drivers/r300/r3xx_fs.c new file mode 100644 index 0000000000..6e05d76977 --- /dev/null +++ b/src/gallium/drivers/r300/r3xx_fs.c @@ -0,0 +1,96 @@ +/* + * Copyright 2008 Corbin Simpson + * Joakim Sindholt + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r3xx_fs.h" + +static INLINE uint32_t r3xx_rgb_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_MOV: + return R300_ALU_OUTC_CMP; + default: + return 0; + } +} + +static INLINE uint32_t r3xx_alpha_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_MOV: + return R300_ALU_OUTA_CMP; + default: + return 0; + } +} + +static INLINE void r3xx_emit_maths(struct r3xx_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst, + unsigned op, + unsigned count) +{ + int i = fs->alu_instruction_count; + + fs->instructions[i].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | + r3xx_rgb_op(op); + fs->instructions[i].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | + R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ; + fs->instructions[i].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | + r3xx_alpha_op(op); + fs->instructions[i].alu_alpha_addr = R300_ALPHA_ADDR0(0) | + R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT; + + fs->alu_instruction_count++; +} + +void r3xx_fs_finalize(struct r300_fragment_shader* fs, + struct r300_fs_asm* assembler) +{ + fs->stack_size = assembler->temp_count + assembler->temp_offset + 1; +} + +void r3xx_fs_instruction(struct r3xx_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_instruction* inst) +{ + switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_MOV: + /* src0 -> src1 and src2 forced to zero */ + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; + inst->FullSrcRegisters[2] = r300_constant_zero; + r3xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); + break; + case TGSI_OPCODE_END: + break; + default: + debug_printf("r300: fs: Bad opcode %d\n", + inst->Instruction.Opcode); + break; + } +} diff --git a/src/gallium/drivers/r300/r3xx_fs.h b/src/gallium/drivers/r300/r3xx_fs.h new file mode 100644 index 0000000000..3da39ec252 --- /dev/null +++ b/src/gallium/drivers/r300/r3xx_fs.h @@ -0,0 +1,76 @@ +/* + * Copyright 2008 Corbin Simpson + * Joakim Sindholt + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R3XX_FS_H +#define R3XX_FS_H + +#include "r300_fs_inlines.h" + +static struct r3xx_fragment_shader r3xx_passthrough_fragment_shader = { + .alu_instruction_count = 1, + .tex_instruction_count = 0, + .indirections = 0, + .shader.stack_size = 1, + + .instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | + R300_ALU_OUTC_CMP, + .instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | + R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, + .instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | + R300_ALU_OUTA_CMP, + .instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | + R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, +}; + +static struct r3xx_fragment_shader r3xx_texture_fragment_shader = { + .alu_instruction_count = 1, + .tex_instruction_count = 0, + .indirections = 0, + .shader.stack_size = 1, + + .instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | + R300_ALU_OUTC_CMP, + .instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | + R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, + .instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | + R300_ALU_OUTA_CMP, + .instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | + R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, +}; + +void r3xx_fs_finalize(struct r300_fragment_shader* fs, + struct r300_fs_asm* assembler); + +void r3xx_fs_instruction(struct r3xx_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_instruction* inst); + +#endif /* R3XX_FS_H */ diff --git a/src/gallium/drivers/r300/r5xx_fs.c b/src/gallium/drivers/r300/r5xx_fs.c new file mode 100644 index 0000000000..99d826278c --- /dev/null +++ b/src/gallium/drivers/r300/r5xx_fs.c @@ -0,0 +1,467 @@ +/* + * Copyright 2008 Corbin Simpson + * Joakim Sindholt + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r5xx_fs.h" + +static INLINE unsigned r5xx_fix_swiz(unsigned s) +{ + /* For historical reasons, the swizzle values x, y, z, w, and 0 are + * equivalent to the actual machine code, but 1 is not. Thus, we just + * adjust it a bit... */ + if (s == TGSI_EXTSWIZZLE_ONE) { + return R500_SWIZZLE_ONE; + } else { + return s; + } +} + +static uint32_t r5xx_rgba_swiz(struct tgsi_full_src_register* reg) +{ + if (reg->SrcRegister.Extended) { + return r5xx_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleX) | + (r5xx_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleY) << 3) | + (r5xx_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleZ) << 6) | + (r5xx_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleW) << 9); + } else { + return reg->SrcRegister.SwizzleX | + (reg->SrcRegister.SwizzleY << 3) | + (reg->SrcRegister.SwizzleZ << 6) | + (reg->SrcRegister.SwizzleW << 9); + } +} + +static uint32_t r5xx_strq_swiz(struct tgsi_full_src_register* reg) +{ + return reg->SrcRegister.SwizzleX | + (reg->SrcRegister.SwizzleY << 2) | + (reg->SrcRegister.SwizzleZ << 4) | + (reg->SrcRegister.SwizzleW << 6); +} + +static INLINE uint32_t r5xx_rgb_swiz(struct tgsi_full_src_register* reg) +{ + /* Only the first 9 bits... */ + return (r5xx_rgba_swiz(reg) & 0x1ff) | + (reg->SrcRegister.Negate ? (1 << 9) : 0) | + (reg->SrcRegisterExtMod.Absolute ? (1 << 10) : 0); +} + +static INLINE uint32_t r5xx_alpha_swiz(struct tgsi_full_src_register* reg) +{ + /* Only the last 3 bits... */ + return (r5xx_rgba_swiz(reg) >> 9) | + (reg->SrcRegister.Negate ? (1 << 9) : 0) | + (reg->SrcRegisterExtMod.Absolute ? (1 << 10) : 0); +} + +static INLINE uint32_t r5xx_rgba_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_COS: + case TGSI_OPCODE_EX2: + case TGSI_OPCODE_LG2: + case TGSI_OPCODE_RCP: + case TGSI_OPCODE_RSQ: + case TGSI_OPCODE_SIN: + return R500_ALU_RGBA_OP_SOP; + case TGSI_OPCODE_DDX: + return R500_ALU_RGBA_OP_MDH; + case TGSI_OPCODE_DDY: + return R500_ALU_RGBA_OP_MDV; + case TGSI_OPCODE_FRC: + return R500_ALU_RGBA_OP_FRC; + case TGSI_OPCODE_DP3: + return R500_ALU_RGBA_OP_DP3; + case TGSI_OPCODE_DP4: + case TGSI_OPCODE_DPH: + return R500_ALU_RGBA_OP_DP4; + case TGSI_OPCODE_ABS: + case TGSI_OPCODE_CMP: + case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SWZ: + return R500_ALU_RGBA_OP_CMP; + case TGSI_OPCODE_ADD: + case TGSI_OPCODE_MAD: + case TGSI_OPCODE_MUL: + case TGSI_OPCODE_SUB: + return R500_ALU_RGBA_OP_MAD; + default: + return 0; + } +} + +static INLINE uint32_t r5xx_alpha_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_COS: + return R500_ALPHA_OP_COS; + case TGSI_OPCODE_EX2: + return R500_ALPHA_OP_EX2; + case TGSI_OPCODE_LG2: + return R500_ALPHA_OP_LN2; + case TGSI_OPCODE_RCP: + return R500_ALPHA_OP_RCP; + case TGSI_OPCODE_RSQ: + return R500_ALPHA_OP_RSQ; + case TGSI_OPCODE_FRC: + return R500_ALPHA_OP_FRC; + case TGSI_OPCODE_SIN: + return R500_ALPHA_OP_SIN; + case TGSI_OPCODE_DDX: + return R500_ALPHA_OP_MDH; + case TGSI_OPCODE_DDY: + return R500_ALPHA_OP_MDV; + case TGSI_OPCODE_DP3: + case TGSI_OPCODE_DP4: + case TGSI_OPCODE_DPH: + return R500_ALPHA_OP_DP; + case TGSI_OPCODE_ABS: + case TGSI_OPCODE_CMP: + case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SWZ: + return R500_ALPHA_OP_CMP; + case TGSI_OPCODE_ADD: + case TGSI_OPCODE_MAD: + case TGSI_OPCODE_MUL: + case TGSI_OPCODE_SUB: + return R500_ALPHA_OP_MAD; + default: + return 0; + } +} + +static INLINE uint32_t r5xx_tex_op(unsigned op) +{ + switch (op) { + case TGSI_OPCODE_KIL: + return R500_TEX_INST_TEXKILL; + case TGSI_OPCODE_TEX: + return R500_TEX_INST_LD; + case TGSI_OPCODE_TXB: + return R500_TEX_INST_LODBIAS; + case TGSI_OPCODE_TXP: + return R500_TEX_INST_PROJ; + default: + return 0; + } +} + +/* Setup an ALU operation. */ +static INLINE void r5xx_emit_maths(struct r5xx_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst, + unsigned op, + unsigned count) +{ + int i = fs->instruction_count; + + if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { + fs->instructions[i].inst0 = R500_INST_TYPE_OUT; + if (r300_fs_is_depr(assembler, dst)) { + fs->instructions[i].inst4 = R500_W_OMASK; + } else { + fs->instructions[i].inst0 |= + R500_ALU_OMASK(dst->DstRegister.WriteMask); + } + } else { + fs->instructions[i].inst0 = R500_INST_TYPE_ALU | + R500_ALU_WMASK(dst->DstRegister.WriteMask); + } + + fs->instructions[i].inst0 |= R500_INST_TEX_SEM_WAIT; + + fs->instructions[i].inst4 |= + R500_ALPHA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); + fs->instructions[i].inst5 = + R500_ALU_RGBA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); + + switch (count) { + case 3: + fs->instructions[i].inst1 = + R500_RGB_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); + fs->instructions[i].inst2 = + R500_ALPHA_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); + fs->instructions[i].inst5 |= + R500_ALU_RGBA_SEL_C_SRC2 | + R500_SWIZ_RGBA_C(r5xx_rgb_swiz(&src[2])) | + R500_ALU_RGBA_ALPHA_SEL_C_SRC2 | + R500_SWIZ_ALPHA_C(r5xx_alpha_swiz(&src[2])); + case 2: + fs->instructions[i].inst1 |= + R500_RGB_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)); + fs->instructions[i].inst2 |= + R500_ALPHA_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)); + fs->instructions[i].inst3 = + R500_ALU_RGB_SEL_B_SRC1 | + R500_SWIZ_RGB_B(r5xx_rgb_swiz(&src[1])); + fs->instructions[i].inst4 |= + R500_ALPHA_SEL_B_SRC1 | + R500_SWIZ_ALPHA_B(r5xx_alpha_swiz(&src[1])); + case 1: + case 0: + default: + fs->instructions[i].inst1 |= + R500_RGB_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)); + fs->instructions[i].inst2 |= + R500_ALPHA_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)); + fs->instructions[i].inst3 |= + R500_ALU_RGB_SEL_A_SRC0 | + R500_SWIZ_RGB_A(r5xx_rgb_swiz(&src[0])); + fs->instructions[i].inst4 |= + R500_ALPHA_SEL_A_SRC0 | + R500_SWIZ_ALPHA_A(r5xx_alpha_swiz(&src[0])); + break; + } + + fs->instructions[i].inst4 |= r5xx_alpha_op(op); + fs->instructions[i].inst5 |= r5xx_rgba_op(op); + + fs->instruction_count++; +} + +static INLINE void r5xx_emit_tex(struct r5xx_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_src_register* src, + struct tgsi_full_dst_register* dst, + uint32_t op) +{ + int i = fs->instruction_count; + + fs->instructions[i].inst0 = R500_INST_TYPE_TEX | + R500_TEX_WMASK(dst->DstRegister.WriteMask) | + R500_INST_TEX_SEM_WAIT; + fs->instructions[i].inst1 = R500_TEX_ID(0) | + R500_TEX_SEM_ACQUIRE | //R500_TEX_IGNORE_UNCOVERED | + r5xx_tex_op(op); + fs->instructions[i].inst2 = + R500_TEX_SRC_ADDR(r300_fs_src(assembler, &src->SrcRegister)) | + R500_SWIZ_TEX_STRQ(r5xx_strq_swiz(src)) | + R500_TEX_DST_ADDR(r300_fs_dst(assembler, &dst->DstRegister)) | + R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | + R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A; + + if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { + fs->instructions[i].inst2 |= + R500_TEX_DST_ADDR(assembler->temp_count + + assembler->temp_offset); + + fs->instruction_count++; + + /* Setup and emit a MOV. */ + src[0].SrcRegister.Index = assembler->temp_count; + src[0].SrcRegister.File = TGSI_FILE_TEMPORARY; + + src[1] = src[0]; + src[2] = r300_constant_zero; + r5xx_emit_maths(fs, assembler, src, dst, TGSI_OPCODE_MOV, 3); + } else { + fs->instruction_count++; + } +} + +void r5xx_fs_finalize(struct r5xx_fragment_shader* fs, + struct r300_fs_asm* assembler) +{ + /* XXX should this just go with OPCODE_END? */ + fs->instructions[fs->instruction_count - 1].inst0 |= + R500_INST_LAST; +} + +void r5xx_fs_instruction(struct r5xx_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_instruction* inst) +{ + /* Switch between opcodes. When possible, prefer using the official + * AMD/ATI names for opcodes, please, as it facilitates using the + * documentation. */ + switch (inst->Instruction.Opcode) { + /* XXX trig needs extra prep */ + case TGSI_OPCODE_COS: + case TGSI_OPCODE_SIN: + /* The simple scalar ops. */ + case TGSI_OPCODE_EX2: + case TGSI_OPCODE_LG2: + case TGSI_OPCODE_RCP: + case TGSI_OPCODE_RSQ: + /* Copy red swizzle to alpha for src0 */ + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX; + inst->FullSrcRegisters[0].SrcRegister.SwizzleW = + inst->FullSrcRegisters[0].SrcRegister.SwizzleX; + /* Fall through */ + case TGSI_OPCODE_DDX: + case TGSI_OPCODE_DDY: + case TGSI_OPCODE_FRC: + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1); + break; + + /* The dot products. */ + case TGSI_OPCODE_DPH: + /* Set alpha swizzle to one for src0 */ + if (!inst->FullSrcRegisters[0].SrcRegister.Extended) { + inst->FullSrcRegisters[0].SrcRegister.Extended = TRUE; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX = + inst->FullSrcRegisters[0].SrcRegister.SwizzleX; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleY = + inst->FullSrcRegisters[0].SrcRegister.SwizzleY; + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleZ = + inst->FullSrcRegisters[0].SrcRegister.SwizzleZ; + } + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = + TGSI_EXTSWIZZLE_ONE; + /* Fall through */ + case TGSI_OPCODE_DP3: + case TGSI_OPCODE_DP4: + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); + break; + + /* Simple three-source operations. */ + case TGSI_OPCODE_CMP: + /* Swap src0 and src2 */ + inst->FullSrcRegisters[3] = inst->FullSrcRegisters[2]; + inst->FullSrcRegisters[2] = inst->FullSrcRegisters[0]; + inst->FullSrcRegisters[0] = inst->FullSrcRegisters[3]; + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); + break; + + /* The MAD variants. */ + case TGSI_OPCODE_SUB: + /* Just like ADD, but flip the negation on src1 first */ + inst->FullSrcRegisters[1].SrcRegister.Negate = + !inst->FullSrcRegisters[1].SrcRegister.Negate; + /* Fall through */ + case TGSI_OPCODE_ADD: + /* Force src0 to one, move all registers over */ + inst->FullSrcRegisters[2] = inst->FullSrcRegisters[1]; + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; + inst->FullSrcRegisters[0] = r300_constant_one; + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); + break; + case TGSI_OPCODE_MUL: + /* Force our src2 to zero */ + inst->FullSrcRegisters[2] = r300_constant_zero; + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); + break; + case TGSI_OPCODE_MAD: + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); + break; + + /* The MOV variants. */ + case TGSI_OPCODE_ABS: + /* Set absolute value modifiers. */ + inst->FullSrcRegisters[0].SrcRegisterExtMod.Absolute = TRUE; + /* Fall through */ + case TGSI_OPCODE_MOV: + case TGSI_OPCODE_SWZ: + /* src0 -> src1 and src2 forced to zero */ + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; + inst->FullSrcRegisters[2] = r300_constant_zero; + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); + break; + + /* The compound and hybrid insts. */ + case TGSI_OPCODE_LRP: + /* LRP DST A, B, C -> MAD TMP -A, C, C; MAD DST A, B, TMP */ + inst->FullSrcRegisters[3] = inst->FullSrcRegisters[1]; + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[2]; + inst->FullSrcRegisters[0].SrcRegister.Negate = + !(inst->FullSrcRegisters[0].SrcRegister.Negate); + inst->FullDstRegisters[1] = inst->FullDstRegisters[0]; + inst->FullDstRegisters[0].DstRegister.Index = + assembler->temp_count; + inst->FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY; + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); + inst->FullSrcRegisters[2].SrcRegister.Index = + assembler->temp_count; + inst->FullSrcRegisters[2].SrcRegister.File = TGSI_FILE_TEMPORARY; + inst->FullSrcRegisters[2].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; + inst->FullSrcRegisters[2].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y; + inst->FullSrcRegisters[2].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z; + inst->FullSrcRegisters[2].SrcRegister.SwizzleW = TGSI_SWIZZLE_W; + inst->FullSrcRegisters[1] = inst->FullSrcRegisters[3]; + inst->FullSrcRegisters[0].SrcRegister.Negate = + !(inst->FullSrcRegisters[0].SrcRegister.Negate); + inst->FullDstRegisters[0] = inst->FullDstRegisters[1]; + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); + break; + case TGSI_OPCODE_POW: + /* POW DST A, B -> LG2 TMP A; MUL TMP TMP, B; EX2 DST TMP */ + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = + inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX; + inst->FullSrcRegisters[0].SrcRegister.SwizzleW = + inst->FullSrcRegisters[0].SrcRegister.SwizzleX; + inst->FullDstRegisters[1] = inst->FullDstRegisters[0]; + inst->FullDstRegisters[0].DstRegister.Index = + assembler->temp_count; + inst->FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY; + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_LG2, 1); + inst->FullSrcRegisters[0].SrcRegister.Index = + assembler->temp_count; + inst->FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY; + inst->FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; + inst->FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y; + inst->FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z; + inst->FullSrcRegisters[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_W; + inst->FullSrcRegisters[2] = r300_constant_zero; + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_MUL, 3); + inst->FullDstRegisters[0] = inst->FullDstRegisters[1]; + r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, + &inst->FullDstRegisters[0], TGSI_OPCODE_EX2, 1); + break; + + /* The texture instruction set. */ + case TGSI_OPCODE_KIL: + case TGSI_OPCODE_TEX: + case TGSI_OPCODE_TXB: + case TGSI_OPCODE_TXP: + r5xx_emit_tex(fs, assembler, &inst->FullSrcRegisters[0], + &inst->FullDstRegisters[0], inst->Instruction.Opcode); + break; + + /* This is the end. My only friend, the end. */ + case TGSI_OPCODE_END: + break; + default: + debug_printf("r300: fs: Bad opcode %d\n", + inst->Instruction.Opcode); + break; + } + + /* Clamp, if saturation flags are set. */ + if (inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE) { + fs->instructions[fs->instruction_count - 1].inst0 |= + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; + } +} diff --git a/src/gallium/drivers/r300/r5xx_fs.h b/src/gallium/drivers/r300/r5xx_fs.h new file mode 100644 index 0000000000..629e587be4 --- /dev/null +++ b/src/gallium/drivers/r300/r5xx_fs.h @@ -0,0 +1,132 @@ +/* + * Copyright 2008 Corbin Simpson + * Joakim Sindholt + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R5XX_FS_H +#define R5XX_FS_H + +#include "r300_fs_inlines.h" + +/* XXX this all should find its way back to r300_reg */ +/* Swizzle tools */ +#define R500_SWIZZLE_ZERO 4 +#define R500_SWIZZLE_HALF 5 +#define R500_SWIZZLE_ONE 6 +#define R500_SWIZ_RGB_ZERO ((4 << 0) | (4 << 3) | (4 << 6)) +#define R500_SWIZ_RGB_ONE ((6 << 0) | (6 << 3) | (6 << 6)) +#define R500_SWIZ_RGB_RGB ((0 << 0) | (1 << 3) | (2 << 6)) +#define R500_SWIZ_MOD_NEG 1 +#define R500_SWIZ_MOD_ABS 2 +#define R500_SWIZ_MOD_NEG_ABS 3 +/* Swizzles for inst2 */ +#define R500_SWIZ_TEX_STRQ(x) ((x) << 8) +#define R500_SWIZ_TEX_RGBA(x) ((x) << 24) +/* Swizzles for inst3 */ +#define R500_SWIZ_RGB_A(x) ((x) << 2) +#define R500_SWIZ_RGB_B(x) ((x) << 15) +/* Swizzles for inst4 */ +#define R500_SWIZ_ALPHA_A(x) ((x) << 14) +#define R500_SWIZ_ALPHA_B(x) ((x) << 21) +/* Swizzle for inst5 */ +#define R500_SWIZ_RGBA_C(x) ((x) << 14) +#define R500_SWIZ_ALPHA_C(x) ((x) << 27) +/* Writemasks */ +#define R500_TEX_WMASK(x) ((x) << 11) +#define R500_ALU_WMASK(x) ((x) << 11) +#define R500_ALU_OMASK(x) ((x) << 15) +#define R500_W_OMASK (1 << 31) + +static struct r5xx_fragment_shader r5xx_passthrough_fragment_shader = { + .shader.stack_size = 0, + .instruction_count = 1, + .instructions[0].inst0 = R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, + .instructions[0].inst1 = + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, + .instructions[0].inst2 = + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, + .instructions[0].inst3 = + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, + .instructions[0].inst4 = + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, + .instructions[0].inst5 = + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0, +}; + +static struct r5xx_fragment_shader r5xx_texture_fragment_shader = { + .shader.stack_size = 1, + .instruction_count = 2, + .instructions[0].inst0 = R500_INST_TYPE_TEX | + R500_INST_TEX_SEM_WAIT | + R500_INST_RGB_WMASK_RGB | R500_INST_ALPHA_WMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, + .instructions[0].inst1 = R500_TEX_ID(0) | R500_TEX_INST_LD | + R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED, + .instructions[0].inst2 = R500_TEX_SRC_ADDR(0) | + R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G | + R500_TEX_SRC_R_SWIZ_B | R500_TEX_SRC_Q_SWIZ_A | + R500_TEX_DST_ADDR(0) | + R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | + R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A, + .instructions[0].inst3 = 0x0, + .instructions[0].inst4 = 0x0, + .instructions[0].inst5 = 0x0, + .instructions[1].inst0 = R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, + .instructions[1].inst1 = + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, + .instructions[1].inst2 = + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, + .instructions[1].inst3 = + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, + .instructions[1].inst4 = + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, + .instructions[1].inst5 = + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0, +}; + +void r5xx_fs_finalize(struct r5xx_fragment_shader* fs, + struct r300_fs_asm* assembler); + +void r5xx_fs_instruction(struct r5xx_fragment_shader* fs, + struct r300_fs_asm* assembler, + struct tgsi_full_instruction* inst); + +#endif /* R5XX_FS_H */ -- cgit v1.2.3 From f80b7f46835f42065d2489f2e1f501187ee026b6 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 8 Jun 2009 23:52:43 -0700 Subject: r300-gallium: Ensure that no dirty state goes unemitted. --- src/gallium/drivers/r300/r300_emit.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 1d297e8593..1cf6ec2262 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -597,10 +597,10 @@ validate: for (i = 0; i < r300->sampler_count; i++) { if (r300->dirty_state & (R300_NEW_SAMPLER << i)) { r300_emit_sampler(r300, r300->sampler_states[i], i); - r300->dirty_state &= ~(R300_NEW_SAMPLER << i); dirty_tex++; } } + r300->dirty_state &= ~R300_ANY_NEW_SAMPLERS; } if (r300->dirty_state & R300_NEW_SCISSOR) { @@ -612,10 +612,10 @@ validate: for (i = 0; i < r300->texture_count; i++) { if (r300->dirty_state & (R300_NEW_TEXTURE << i)) { r300_emit_texture(r300, r300->textures[i], i); - r300->dirty_state &= ~(R300_NEW_TEXTURE << i); dirty_tex++; } } + r300->dirty_state &= ~R300_ANY_NEW_TEXTURES; } if (r300->dirty_state & R300_NEW_VIEWPORT) { @@ -637,6 +637,8 @@ validate: r300->dirty_state &= ~R300_NEW_VERTEX_SHADER; } + assert(r300->dirty_state == 0); + /* Finally, emit the VBO. */ r300_emit_vertex_buffer(r300); -- cgit v1.2.3 From 6a926f9997964df10cf77953b92d585b287c58a4 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 26 Jun 2009 16:32:53 -0700 Subject: r300g: PIPE_CAP_TGSI_CONT_SUPPORTED. --- src/gallium/drivers/r300/r300_screen.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index a6f1efe356..26da389910 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -145,6 +145,9 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: /* XXX guessing (what a terrible guess) */ return 2; + case PIPE_CAP_TGSI_CONT_SUPPORTED: + /* XXX */ + return 0; default: debug_printf("r300: Implementation error: Bad param %d\n", param); -- cgit v1.2.3 From 00ffc90dd25270d84002232f9929cc30abc1e7e2 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 26 Jun 2009 17:39:34 -0700 Subject: r300g: Be more specific on surface_copy fallbacks. --- src/gallium/drivers/r300/r300_surface.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 75b5096919..7829e78dbf 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -234,7 +234,7 @@ static void r300_surface_copy(struct pipe_context* pipe, " dimensions %dx%d (pixel pitch %d)\n", src, srcx, srcy, dest, destx, desty, w, h, pixpitch); - if ((srctex == desttex) && + if ((srctex->buffer == desttex->buffer) && ((destx < srcx + w) || (srcx < destx + w)) && ((desty < srcy + h) || (srcy < desty + h))) { fallback: -- cgit v1.2.3 From 9e7d195fdc739847a3cc1b9a375a6ea2ce460ef8 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 26 Jun 2009 17:42:52 -0700 Subject: r300g: Comment out assert for now. Will fix with better constant refactoring later. --- src/gallium/drivers/r300/r300_emit.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 1cf6ec2262..45f9ec090d 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -637,7 +637,9 @@ validate: r300->dirty_state &= ~R300_NEW_VERTEX_SHADER; } + /* XXX assert(r300->dirty_state == 0); + */ /* Finally, emit the VBO. */ r300_emit_vertex_buffer(r300); -- cgit v1.2.3 From 7a3224c334a9a159f16e37672e4d8d833bc9bb52 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 26 Jun 2009 19:39:24 -0700 Subject: r300g: Definitively forbid unusable Z buffer/stencil formats. --- src/gallium/drivers/r300/r300_screen.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 26da389910..711c22577c 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -185,6 +185,7 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) static boolean check_tex_2d_format(enum pipe_format format, boolean is_r500) { switch (format) { + /* Supported formats. */ /* Colorbuffer */ case PIPE_FORMAT_A4R4G4B4_UNORM: case PIPE_FORMAT_R5G6B5_UNORM: @@ -198,6 +199,15 @@ static boolean check_tex_2d_format(enum pipe_format format, boolean is_r500) case PIPE_FORMAT_Z24S8_UNORM: return TRUE; + /* Definitely unsupported formats. */ + /* Non-usable Z buffer/stencil formats. */ + case PIPE_FORMAT_Z24X8_UNORM: + case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: + debug_printf("r300: Note: Got unsupported format: %s in %s\n", + pf_name(format), __FUNCTION__); + return FALSE; + /* XXX These don't even exist case PIPE_FORMAT_A32R32G32B32: case PIPE_FORMAT_A16R16G16B16: */ @@ -219,7 +229,8 @@ static boolean check_tex_2d_format(enum pipe_format format, boolean is_r500) return FALSE; */ default: - debug_printf("r300: Warning: Got unsupported format: %s in %s\n", + /* Unknown format... */ + debug_printf("r300: Warning: Got unknown format: %s in %s\n", pf_name(format), __FUNCTION__); break; } -- cgit v1.2.3 From aac6648cd8b27cb6653ac4a9722a49868b221447 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 26 Jun 2009 20:37:06 -0700 Subject: r300g: Use real texture formats. What bugs me is that the YUV444 format somehow worked properly. :3 --- src/gallium/drivers/r300/r300_reg.h | 44 +++++++++++++++------------------ src/gallium/drivers/r300/r300_texture.c | 2 +- src/gallium/drivers/r300/r300_texture.h | 21 ++++++++++++++++ 3 files changed, 42 insertions(+), 25 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 3bb9bc47b5..229afc6635 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1487,9 +1487,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. They are given meanings as R, G, B and Alpha by the swizzle specification */ # define R300_TX_FORMAT_X8 0x0 -# define R500_TX_FORMAT_X1 0x0 // bit set in format 2 # define R300_TX_FORMAT_X16 0x1 -# define R500_TX_FORMAT_X1_REV 0x0 // bit set in format 2 # define R300_TX_FORMAT_Y4X4 0x2 # define R300_TX_FORMAT_Y8X8 0x3 # define R300_TX_FORMAT_Y16X16 0x4 @@ -1506,31 +1504,29 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_TX_FORMAT_DXT1 0xF # define R300_TX_FORMAT_DXT3 0x10 # define R300_TX_FORMAT_DXT5 0x11 -# define R300_TX_FORMAT_D3DMFT_CxV8U8 0x12 /* no swizzle */ -# define R300_TX_FORMAT_A8R8G8B8 0x13 /* no swizzle */ -# define R300_TX_FORMAT_B8G8_B8G8 0x14 /* no swizzle */ -# define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */ - - /* These two values are wrong, but they're the only values that - * produce any even vaguely correct results. Can r300 only do 16-bit - * depth textures? - */ -# define R300_TX_FORMAT_X24_Y8 0x1e -# define R300_TX_FORMAT_X32 0x1e - - /* 0x16 - some 16 bit green format.. ?? */ +# define R300_TX_FORMAT_Y8 0x12 +# define R300_TX_FORMAT_AVYU444 0x13 +# define R300_TX_FORMAT_VYUY422 0x14 +# define R300_TX_FORMAT_YVYU422 0x15 +# define R300_TX_FORMAT_16_MPEG 0x16 +# define R300_TX_FORMAT_16_16_MPEG 0x17 +# define R300_TX_FORMAT_16F 0x18 +# define R300_TX_FORMAT_16F_16F 0x19 +# define R300_TX_FORMAT_16F_16F_16F_16F 0x1A +# define R300_TX_FORMAT_32F 0x1B +# define R300_TX_FORMAT_32F_32F 0x1C +# define R300_TX_FORMAT_32F_32F_32F_32F 0x1D +# define R300_TX_FORMAT_W24_FP 0x1E + +# define R300_TX_FORMAT_SIGNED_W (1 << 5) +# define R300_TX_FORMAT_SIGNED_Z (1 << 6) +# define R300_TX_FORMAT_SIGNED_Y (1 << 7) +# define R300_TX_FORMAT_SIGNED_X (1 << 8) +# define R300_TX_FORMAT_SIGNED (0xf << 5) + # define R300_TX_FORMAT_3D (1 << 25) # define R300_TX_FORMAT_CUBIC_MAP (2 << 25) - /* gap */ - /* Floating point formats */ - /* Note - hardware supports both 16 and 32 bit floating point */ -# define R300_TX_FORMAT_FL_I16 0x18 -# define R300_TX_FORMAT_FL_I16A16 0x19 -# define R300_TX_FORMAT_FL_R16G16B16A16 0x1A -# define R300_TX_FORMAT_FL_I32 0x1B -# define R300_TX_FORMAT_FL_I32A32 0x1C -# define R300_TX_FORMAT_FL_R32G32B32A32 0x1D /* alpha modes, convenience mostly */ /* if you have alpha, pick constant appropriate to the number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */ diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 5ea9f56247..e006ecf3ab 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -38,7 +38,7 @@ static void r300_setup_texture_state(struct r300_texture* tex, R300_TX_HEIGHT((height - 1) & 0x7ff) | R300_TX_PITCH_EN; /* XXX */ - state->format1 = R300_TX_FORMAT_A8R8G8B8; + state->format1 = r300_translate_texformat(tex->tex.format); state->format2 = pitch - 1; diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h index 98fb5c9a08..e2429c0738 100644 --- a/src/gallium/drivers/r300/r300_texture.h +++ b/src/gallium/drivers/r300/r300_texture.h @@ -32,6 +32,27 @@ void r300_init_screen_texture_functions(struct pipe_screen* screen); +/* Note the signature of R300_EASY_TX_FORMAT(A, R, G, B, FORMAT)... */ +static INLINE uint32_t r300_translate_texformat(enum pipe_format format) +{ + switch (format) { + /* X8 */ + case PIPE_FORMAT_I8_UNORM: + return R300_EASY_TX_FORMAT(X, X, X, X, X8); + /* W8Z8Y8X8 */ + case PIPE_FORMAT_A8R8G8B8_UNORM: + return R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8); + case PIPE_FORMAT_R8G8B8A8_UNORM: + return R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8); + default: + debug_printf("r300: Implementation error: " + "Got unsupported texture format %s in %s\n", + pf_name(format), __FUNCTION__); + break; + } + return 0; +} + #ifndef R300_WINSYS_H boolean r300_get_texture_buffer(struct pipe_texture* texture, -- cgit v1.2.3 From 6ebcdc754914bac7db005594a1495cceb6c3d85d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 26 Jun 2009 21:13:57 -0700 Subject: r300g: S3TC. tests/texcompress2 doesn't work, but tests/texcmp does (more or less.) --- src/gallium/drivers/r300/r300_screen.c | 31 +++++++++++++++++++++++++------ src/gallium/drivers/r300/r300_texture.h | 11 +++++++++++ 2 files changed, 36 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 711c22577c..6817d7163d 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -94,8 +94,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) return 0; } case PIPE_CAP_S3TC: - /* IN THEORY */ - return 0; + return 1; case PIPE_CAP_ANISOTROPIC_FILTER: return 1; case PIPE_CAP_POINT_SPRITE: @@ -182,7 +181,8 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) } } -static boolean check_tex_2d_format(enum pipe_format format, boolean is_r500) +static boolean check_tex_2d_format(enum pipe_format format, uint32_t usage, + boolean is_r500) { switch (format) { /* Supported formats. */ @@ -190,14 +190,33 @@ static boolean check_tex_2d_format(enum pipe_format format, boolean is_r500) case PIPE_FORMAT_A4R4G4B4_UNORM: case PIPE_FORMAT_R5G6B5_UNORM: case PIPE_FORMAT_A1R5G5B5_UNORM: - case PIPE_FORMAT_A8R8G8B8_UNORM: + return usage & + (PIPE_TEXTURE_USAGE_RENDER_TARGET | + PIPE_TEXTURE_USAGE_DISPLAY_TARGET | + PIPE_TEXTURE_USAGE_PRIMARY); + + /* Texture */ + case PIPE_FORMAT_DXT1_RGB: + case PIPE_FORMAT_DXT1_RGBA: + case PIPE_FORMAT_DXT3_RGBA: + case PIPE_FORMAT_DXT5_RGBA: + return usage & PIPE_TEXTURE_USAGE_SAMPLER; + /* Colorbuffer or texture */ + case PIPE_FORMAT_A8R8G8B8_UNORM: + case PIPE_FORMAT_R8G8B8A8_UNORM: case PIPE_FORMAT_I8_UNORM: + return usage & + (PIPE_TEXTURE_USAGE_RENDER_TARGET | + PIPE_TEXTURE_USAGE_DISPLAY_TARGET | + PIPE_TEXTURE_USAGE_PRIMARY | + PIPE_TEXTURE_USAGE_SAMPLER); + /* Z buffer */ case PIPE_FORMAT_Z16_UNORM: /* Z buffer with stencil */ case PIPE_FORMAT_Z24S8_UNORM: - return TRUE; + return usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL; /* Definitely unsupported formats. */ /* Non-usable Z buffer/stencil formats. */ @@ -247,7 +266,7 @@ static boolean r300_is_format_supported(struct pipe_screen* pscreen, { switch (target) { case PIPE_TEXTURE_2D: - return check_tex_2d_format(format, + return check_tex_2d_format(format, tex_usage, r300_screen(pscreen)->caps->is_r500); case PIPE_TEXTURE_1D: case PIPE_TEXTURE_3D: diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h index e2429c0738..28157de57b 100644 --- a/src/gallium/drivers/r300/r300_texture.h +++ b/src/gallium/drivers/r300/r300_texture.h @@ -44,6 +44,17 @@ static INLINE uint32_t r300_translate_texformat(enum pipe_format format) return R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8); case PIPE_FORMAT_R8G8B8A8_UNORM: return R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8); + /* DXT1 */ + case PIPE_FORMAT_DXT1_RGB: + return R300_EASY_TX_FORMAT(X, Y, Z, ONE, DXT1); + case PIPE_FORMAT_DXT1_RGBA: + return R300_EASY_TX_FORMAT(X, Y, Z, W, DXT1); + /* DXT3 */ + case PIPE_FORMAT_DXT3_RGBA: + return R300_EASY_TX_FORMAT(X, Y, Z, W, DXT3); + /* DXT5 */ + case PIPE_FORMAT_DXT5_RGBA: + return R300_EASY_TX_FORMAT(Y, Z, W, X, DXT5); default: debug_printf("r300: Implementation error: " "Got unsupported texture format %s in %s\n", -- cgit v1.2.3 From 3f15acb7e8575faeacc50dcede6d68b1e583727d Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 26 Jun 2009 21:48:09 -0700 Subject: r300g: EXT_provoking_vertex. --- src/gallium/drivers/r300/r300_reg.h | 6 ++---- src/gallium/drivers/r300/r300_state.c | 4 ++++ 2 files changed, 6 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 229afc6635..e57535fe9e 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1064,8 +1064,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. R300_GA_COLOR_CONTROL_RGB2_SHADING_FLAT | \ R300_GA_COLOR_CONTROL_ALPHA2_SHADING_FLAT | \ R300_GA_COLOR_CONTROL_RGB3_SHADING_FLAT | \ - R300_GA_COLOR_CONTROL_ALPHA3_SHADING_FLAT | \ - R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST ) + R300_GA_COLOR_CONTROL_ALPHA3_SHADING_FLAT ) # define R300_SHADE_MODEL_SMOOTH ( \ R300_GA_COLOR_CONTROL_RGB0_SHADING_GOURAUD | \ @@ -1075,8 +1074,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. R300_GA_COLOR_CONTROL_RGB2_SHADING_GOURAUD | \ R300_GA_COLOR_CONTROL_ALPHA2_SHADING_GOURAUD | \ R300_GA_COLOR_CONTROL_RGB3_SHADING_GOURAUD | \ - R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \ - R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST ) + R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD ) /* Specifies red & green components of fill color -- S312 format -- Backwards comp. */ #define R300_GA_SOLID_RG 0x427c diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index d70ef6ba28..163b14ef8e 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -421,6 +421,10 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->color_control = R300_SHADE_MODEL_SMOOTH; } + if (!state->flatshade_first) { + rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; + } + return (void*)rs; } -- cgit v1.2.3 From f150e05afcbce73ff8422ffef2ce02536f691f2c Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 27 Jun 2009 10:57:03 -0700 Subject: r300g: Fix EXT_packed_depth_stencil functionality. Allow Z24S8 to be a true texture. --- src/gallium/drivers/r300/r300_screen.c | 8 ++++++-- src/gallium/drivers/r300/r300_texture.h | 4 ++++ 2 files changed, 10 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 6817d7163d..42a7009481 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -214,10 +214,14 @@ static boolean check_tex_2d_format(enum pipe_format format, uint32_t usage, /* Z buffer */ case PIPE_FORMAT_Z16_UNORM: - /* Z buffer with stencil */ - case PIPE_FORMAT_Z24S8_UNORM: return usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL; + /* Z buffer with stencil or texture */ + case PIPE_FORMAT_Z24S8_UNORM: + return usage & + (PIPE_TEXTURE_USAGE_DEPTH_STENCIL | + PIPE_TEXTURE_USAGE_SAMPLER); + /* Definitely unsupported formats. */ /* Non-usable Z buffer/stencil formats. */ case PIPE_FORMAT_Z24X8_UNORM: diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h index 28157de57b..5511cca48c 100644 --- a/src/gallium/drivers/r300/r300_texture.h +++ b/src/gallium/drivers/r300/r300_texture.h @@ -55,10 +55,14 @@ static INLINE uint32_t r300_translate_texformat(enum pipe_format format) /* DXT5 */ case PIPE_FORMAT_DXT5_RGBA: return R300_EASY_TX_FORMAT(Y, Z, W, X, DXT5); + /* W24_FP */ + case PIPE_FORMAT_Z24S8_UNORM: + return R300_EASY_TX_FORMAT(X, X, X, X, W24_FP); default: debug_printf("r300: Implementation error: " "Got unsupported texture format %s in %s\n", pf_name(format), __FUNCTION__); + assert(0); break; } return 0; -- cgit v1.2.3 From 928a5684177fdb6cd013949348aee6078dd305c0 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sat, 27 Jun 2009 11:58:00 -0700 Subject: r300g: YCbCr and sRGB textures. --- src/gallium/drivers/r300/r300_reg.h | 3 ++- src/gallium/drivers/r300/r300_screen.c | 3 +++ src/gallium/drivers/r300/r300_texture.h | 10 ++++++++++ 3 files changed, 15 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index e57535fe9e..79c778f954 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1565,7 +1565,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_TX_FORMAT_CONST_Z (4<<5) # define R300_TX_FORMAT_CONST_W (8<<5) -# define R300_TX_FORMAT_YUV_MODE 0x00800000 +# define R300_TX_FORMAT_GAMMA (1 << 21) +# define R300_TX_FORMAT_YUV_TO_RGB (1 << 22) #define R300_TX_FORMAT2_0 0x4500 /* obvious missing in gap */ # define R300_TX_PITCHMASK_SHIFT 0 diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 42a7009481..da1d5ffe2f 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -196,10 +196,13 @@ static boolean check_tex_2d_format(enum pipe_format format, uint32_t usage, PIPE_TEXTURE_USAGE_PRIMARY); /* Texture */ + case PIPE_FORMAT_A8R8G8B8_SRGB: + case PIPE_FORMAT_R8G8B8A8_SRGB: case PIPE_FORMAT_DXT1_RGB: case PIPE_FORMAT_DXT1_RGBA: case PIPE_FORMAT_DXT3_RGBA: case PIPE_FORMAT_DXT5_RGBA: + case PIPE_FORMAT_YCBCR: return usage & PIPE_TEXTURE_USAGE_SAMPLER; /* Colorbuffer or texture */ diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h index 5511cca48c..3b56f0307c 100644 --- a/src/gallium/drivers/r300/r300_texture.h +++ b/src/gallium/drivers/r300/r300_texture.h @@ -44,6 +44,12 @@ static INLINE uint32_t r300_translate_texformat(enum pipe_format format) return R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8); case PIPE_FORMAT_R8G8B8A8_UNORM: return R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8); + case PIPE_FORMAT_A8R8G8B8_SRGB: + return R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8) | + R300_TX_FORMAT_GAMMA; + case PIPE_FORMAT_R8G8B8A8_SRGB: + return R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8) | + R300_TX_FORMAT_GAMMA; /* DXT1 */ case PIPE_FORMAT_DXT1_RGB: return R300_EASY_TX_FORMAT(X, Y, Z, ONE, DXT1); @@ -55,6 +61,10 @@ static INLINE uint32_t r300_translate_texformat(enum pipe_format format) /* DXT5 */ case PIPE_FORMAT_DXT5_RGBA: return R300_EASY_TX_FORMAT(Y, Z, W, X, DXT5); + /* YVYU422 */ + case PIPE_FORMAT_YCBCR: + return R300_EASY_TX_FORMAT(X, Y, Z, ONE, YVYU422) | + R300_TX_FORMAT_YUV_TO_RGB; /* W24_FP */ case PIPE_FORMAT_Z24S8_UNORM: return R300_EASY_TX_FORMAT(X, X, X, X, W24_FP); -- cgit v1.2.3 From 8799a9d24d3d409bb2b587f2c10f2ddae200c114 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 1 Jul 2009 23:09:18 -0700 Subject: r300g: Use floats for surface_copy texcoords, use correct src and dest. This makes demos/copypix better-looking. Horizontal dimensions are right now. --- src/gallium/drivers/r300/r300_surface.c | 33 +++++++++++++++++---------------- 1 file changed, 17 insertions(+), 16 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 7829e78dbf..96b9a83383 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -228,6 +228,7 @@ static void r300_surface_copy(struct pipe_context* pipe, struct r300_texture* desttex = (struct r300_texture*)dest->texture; unsigned pixpitch = srctex->stride / srctex->tex.block.size; boolean invalid = FALSE; + float fsrcx = srcx, fsrcy = srcy, fdestx = destx, fdesty = desty; CS_LOCALS(r300); debug_printf("r300: Copying surface %p at (%d,%d) to %p at (%d, %d)," @@ -329,25 +330,25 @@ validate: OUT_CS(R300_PRIM_TYPE_QUADS | R300_PRIM_WALK_RING | (4 << R300_PRIM_NUM_VERTICES_SHIFT)); /* (x , y ) */ - OUT_CS_32F((float)(destx / dest->width)); - OUT_CS_32F((float)(desty / dest->height)); - OUT_CS_32F((float)(srcx / dest->width)); - OUT_CS_32F((float)(srcy / dest->height)); + OUT_CS_32F(fdestx / dest->width); + OUT_CS_32F(fdesty / dest->height); + OUT_CS_32F(fsrcx / src->width); + OUT_CS_32F(fsrcy / src->height); /* (x , y + h) */ - OUT_CS_32F((float)(destx / dest->width)); - OUT_CS_32F((float)((desty + h) / dest->height)); - OUT_CS_32F((float)(srcx / dest->width)); - OUT_CS_32F((float)((srcy + h) / dest->height)); + OUT_CS_32F(fdestx / dest->width); + OUT_CS_32F((fdesty + h) / dest->height); + OUT_CS_32F(fsrcx / src->width); + OUT_CS_32F((fsrcy + h) / src->height); /* (x + w, y + h) */ - OUT_CS_32F((float)((destx + w) / dest->width)); - OUT_CS_32F((float)((desty + h) / dest->height)); - OUT_CS_32F((float)((srcx + w) / dest->width)); - OUT_CS_32F((float)((srcy + h) / dest->height)); + OUT_CS_32F((fdestx + w) / dest->width); + OUT_CS_32F((fdesty + h) / dest->height); + OUT_CS_32F((fsrcx + w) / src->width); + OUT_CS_32F((fsrcy + h) / src->height); /* (x + w, y ) */ - OUT_CS_32F((float)((destx + w) / dest->width)); - OUT_CS_32F((float)(desty / dest->height)); - OUT_CS_32F((float)((srcx + w) / dest->width)); - OUT_CS_32F((float)(srcy / dest->height)); + OUT_CS_32F((fdestx + w) / dest->width); + OUT_CS_32F(fdesty / dest->height); + OUT_CS_32F((fsrcx + w) / src->width); + OUT_CS_32F(fsrcy / src->height); OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); -- cgit v1.2.3 From 96ef7aae1d58db2cbc2e46347aa87c34126983ef Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 1 Jul 2009 23:25:47 -0700 Subject: r300g: Fix recursive Draw flush. Also just noticed that demos/copypix walks around the overlapping blit rules. Bad, bad Mesa. :3 --- src/gallium/drivers/r300/r300_flush.c | 6 +++++- src/gallium/drivers/r300/r300_flush.h | 2 ++ 2 files changed, 7 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_flush.c b/src/gallium/drivers/r300/r300_flush.c index 89a5f2b20c..0dff1c6f4f 100644 --- a/src/gallium/drivers/r300/r300_flush.c +++ b/src/gallium/drivers/r300/r300_flush.c @@ -29,7 +29,11 @@ static void r300_flush(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); CS_LOCALS(r300); - draw_flush(r300->draw); + /* We probably need to flush Draw, but we may have been called from + * within Draw. This feels kludgy, but it might be the best thing. */ + if (!r300->draw->flushing) { + draw_flush(r300->draw); + } if (r300->dirty_hw) { FLUSH_CS; diff --git a/src/gallium/drivers/r300/r300_flush.h b/src/gallium/drivers/r300/r300_flush.h index a1b224b39c..9a83d89daa 100644 --- a/src/gallium/drivers/r300/r300_flush.h +++ b/src/gallium/drivers/r300/r300_flush.h @@ -23,6 +23,8 @@ #ifndef R300_FLUSH_H #define R300_FLUSH_H +#include "draw/draw_private.h" + #include "pipe/p_context.h" #include "r300_context.h" -- cgit v1.2.3 From e46d12d39498199e18be70826a2d36028c7b93f3 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 8 Jul 2009 11:27:26 -0700 Subject: r300g: Add endian fix to vertex fetcher setup. As reported and initially tested by MrCooper. --- src/gallium/drivers/r300/r300_state.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 163b14ef8e..68da0aa4cb 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -24,6 +24,8 @@ #include "util/u_pack_color.h" #include "util/u_debug.h" + +#include "pipe/p_config.h" #include "pipe/internal/p_winsys_screen.h" #include "r300_context.h" @@ -350,14 +352,19 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->enable_vte = !state->bypass_vs_clip_and_viewport; +#ifdef PIPE_ARCH_LITTLE_ENDIAN + rs->vap_control_status = R300_VC_NO_SWAP; +#else + rs->vap_control_status = R300_VC_32BIT_SWAP; +#endif + /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL. * Else, enable HW TCL and force Draw's TCL off. */ if (state->bypass_vs_clip_and_viewport || !r300_screen(pipe->screen)->caps->has_tcl) { - rs->vap_control_status = R300_VAP_TCL_BYPASS; + rs->vap_control_status |= R300_VAP_TCL_BYPASS; } else { rs->rs.bypass_vs_clip_and_viewport = TRUE; - rs->vap_control_status = 0; } rs->point_size = pack_float_16_6x(state->point_size) | -- cgit v1.2.3 From 1aa38b2c2d80b67fe2eefe468f90aeb44bc20259 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 8 Jul 2009 11:30:59 -0700 Subject: r300-gallium: Mipmap setup. (cherry picked from commit 88c01a15da5639dd68a6a0133724994cb66f1316) --- src/gallium/drivers/r300/r300_reg.h | 1 + src/gallium/drivers/r300/r300_texture.c | 28 ++++++++++++++++++---------- 2 files changed, 19 insertions(+), 10 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 79c778f954..6825d99870 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -1478,6 +1478,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_TX_PITCH_EN (1 << 31) # define R300_TX_WIDTH(x) ((x) << 0) # define R300_TX_HEIGHT(x) ((x) << 11) +# define R300_TX_NUM_LEVELS(x) ((x) << 26) #define R300_TX_FORMAT1_0 0x44C0 /* The interpretation of the format word by Wladimir van der Laan */ diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index e006ecf3ab..f9dff03704 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -22,6 +22,8 @@ #include "r300_texture.h" +/* XXX maths need to go to util */ + static int minify(int i) { return MAX2(1, i >> 1); @@ -30,25 +32,29 @@ static int minify(int i) static void r300_setup_texture_state(struct r300_texture* tex, unsigned width, unsigned height, - unsigned pitch) + unsigned pitch, + unsigned levels) { struct r300_texture_state* state = &tex->state; state->format0 = R300_TX_WIDTH((width - 1) & 0x7ff) | - R300_TX_HEIGHT((height - 1) & 0x7ff) | R300_TX_PITCH_EN; + R300_TX_HEIGHT((height - 1) & 0x7ff) | + R300_TX_NUM_LEVELS(levels) | + R300_TX_PITCH_EN; /* XXX */ state->format1 = r300_translate_texformat(tex->tex.format); state->format2 = pitch - 1; - /* XXX + /* Assume (somewhat foolishly) that oversized textures will + * not be permitted by the state tracker. */ if (width > 2048) { - state->pitch |= R300_TXWIDTH_11; + state->format2 |= R500_TXWIDTH_BIT11; } if (height > 2048) { - state->pitch |= R300_TXHEIGHT_11; - } */ + state->format2 |= R500_TXHEIGHT_BIT11; + } } static void r300_setup_miptree(struct r300_texture* tex) @@ -75,6 +81,7 @@ static void r300_setup_miptree(struct r300_texture* tex) tex->offset[i] = (tex->size + 63) & ~63; tex->size = tex->offset[i] + size; + /* Save stride of first level to the texture. */ if (i == 0) { tex->stride = stride; } @@ -98,9 +105,8 @@ static struct pipe_texture* r300_setup_miptree(tex); - /* XXX */ - r300_setup_texture_state(tex, tex->tex.width[0], tex->tex.height[0], - tex->tex.width[0]); + r300_setup_texture_state(tex, template->width[0], template->height[0], + template->width[0], template->last_level); tex->buffer = screen->buffer_create(screen, 64, PIPE_BUFFER_USAGE_PIXEL, @@ -164,6 +170,7 @@ static struct pipe_texture* { struct r300_texture* tex; + /* XXX we should start doing mips now... */ if (base->target != PIPE_TEXTURE_2D || base->last_level != 0 || base->depth[0] != 1) { @@ -181,8 +188,9 @@ static struct pipe_texture* tex->stride = *stride; + /* XXX */ r300_setup_texture_state(tex, tex->tex.width[0], tex->tex.height[0], - tex->stride); + tex->stride, 0); pipe_buffer_reference(&tex->buffer, buffer); -- cgit v1.2.3 From 746140e215b86ec6eb9f10be45babe700f8e2e62 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 18 May 2009 17:06:42 -0700 Subject: r300-gallium: Unify sampler and texture emit. They have to cross into each other's registers. --- src/gallium/drivers/r300/r300_emit.c | 50 ++++++++++++++------------------- src/gallium/drivers/r300/r300_emit.h | 7 ++--- src/gallium/drivers/r300/r300_surface.c | 8 ++---- 3 files changed, 26 insertions(+), 39 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 45f9ec090d..7ba56cdc1d 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -289,18 +289,6 @@ void r300_emit_rs_block_state(struct r300_context* r300, END_CS; } -void r300_emit_sampler(struct r300_context* r300, - struct r300_sampler_state* sampler, unsigned offset) -{ - CS_LOCALS(r300); - - BEGIN_CS(6); - OUT_CS_REG(R300_TX_FILTER0_0 + (offset * 4), sampler->filter0); - OUT_CS_REG(R300_TX_FILTER1_0 + (offset * 4), sampler->filter1); - OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (offset * 4), sampler->border_color); - END_CS; -} - void r300_emit_scissor_state(struct r300_context* r300, struct r300_scissor_state* scissor) { @@ -314,11 +302,17 @@ void r300_emit_scissor_state(struct r300_context* r300, } void r300_emit_texture(struct r300_context* r300, - struct r300_texture* tex, unsigned offset) + struct r300_sampler_state* sampler, + struct r300_texture* tex, + unsigned offset) { CS_LOCALS(r300); - BEGIN_CS(10); + BEGIN_CS(16); + OUT_CS_REG(R300_TX_FILTER0_0 + (offset * 4), sampler->filter0); + OUT_CS_REG(R300_TX_FILTER1_0 + (offset * 4), sampler->filter1); + OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (offset * 4), sampler->border_color); + OUT_CS_REG(R300_TX_FORMAT0_0 + (offset * 4), tex->state.format0); OUT_CS_REG(R300_TX_FORMAT1_0 + (offset * 4), tex->state.format1); OUT_CS_REG(R300_TX_FORMAT2_0 + (offset * 4), tex->state.format2); @@ -593,29 +587,27 @@ validate: r300->dirty_state &= ~R300_NEW_RS_BLOCK; } - if (r300->dirty_state & R300_ANY_NEW_SAMPLERS) { - for (i = 0; i < r300->sampler_count; i++) { - if (r300->dirty_state & (R300_NEW_SAMPLER << i)) { - r300_emit_sampler(r300, r300->sampler_states[i], i); - dirty_tex++; - } - } - r300->dirty_state &= ~R300_ANY_NEW_SAMPLERS; - } - if (r300->dirty_state & R300_NEW_SCISSOR) { r300_emit_scissor_state(r300, r300->scissor_state); r300->dirty_state &= ~R300_NEW_SCISSOR; } - if (r300->dirty_state & R300_ANY_NEW_TEXTURES) { - for (i = 0; i < r300->texture_count; i++) { - if (r300->dirty_state & (R300_NEW_TEXTURE << i)) { - r300_emit_texture(r300, r300->textures[i], i); + /* Samplers and textures are tracked separately but emitted together. */ + if (r300->dirty_state & + (R300_ANY_NEW_SAMPLERS | R300_ANY_NEW_TEXTURES)) { + for (i = 0; i < MIN2(r300->sampler_count, r300->texture_count); i++) { + if (r300->dirty_state & + ((R300_NEW_SAMPLER << i) | (R300_NEW_TEXTURE << i))) { + r300_emit_texture(r300, + r300->sampler_states[i], + r300->textures[i], + i); + r300->dirty_state &= + ~((R300_NEW_SAMPLER << i) | (R300_NEW_TEXTURE << i)); dirty_tex++; } } - r300->dirty_state &= ~R300_ANY_NEW_TEXTURES; + r300->dirty_state &= ~(R300_ANY_NEW_SAMPLERS | R300_ANY_NEW_TEXTURES); } if (r300->dirty_state & R300_NEW_VIEWPORT) { diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 196b6c58d3..fda26f3948 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -56,14 +56,13 @@ void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs); void r300_emit_rs_block_state(struct r300_context* r300, struct r300_rs_block* rs); -void r300_emit_sampler(struct r300_context* r300, - struct r300_sampler_state* sampler, unsigned offset); - void r300_emit_scissor_state(struct r300_context* r300, struct r300_scissor_state* scissor); void r300_emit_texture(struct r300_context* r300, - struct r300_texture* tex, unsigned offset); + struct r300_sampler_state* sampler, + struct r300_texture* tex, + unsigned offset); void r300_emit_vertex_buffer(struct r300_context* r300); diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 96b9a83383..fdabe4d9cf 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -268,14 +268,10 @@ validate: r300_surface_setup(r300, desttex, destx, desty, w, h); /* Setup the texture. */ - r300_emit_sampler(r300, &r300_sampler_copy_state, 0); - r300_emit_texture(r300, srctex, 0); + r300_emit_texture(r300, &r300_sampler_copy_state, srctex, 0); /* Flush and enable. */ - BEGIN_CS(4); - OUT_CS_REG(R300_TX_INVALTAGS, 0); - OUT_CS_REG(R300_TX_ENABLE, 0x1); - END_CS; + r300_flush_textures(r300); /* Vertex shader setup */ if (caps->has_tcl) { -- cgit v1.2.3 From c737e57357ff002b5e3f8a981fed06b22853f568 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 8 Jul 2009 11:55:27 -0700 Subject: r300g: Disable MSPOS registers for glisse's CS security checker. These will come back in someday, when we can properly use them. --- src/gallium/drivers/r300/r300_state_invariant.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index e438114010..63a0c95918 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -34,14 +34,17 @@ void r300_emit_invariant_state(struct r300_context* r300) struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; CS_LOCALS(r300); - BEGIN_CS(26 + (caps->has_tcl ? 2: 0)); + BEGIN_CS(22 + (caps->has_tcl ? 2: 0)); /*** Graphics Backend (GB) ***/ /* Various GB enables */ OUT_CS_REG(R300_GB_ENABLE, 0x0); - /* Subpixel multisampling for AA */ - OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); - OUT_CS_REG(R300_GB_MSPOS1, 0x6666666); + /* Subpixel multisampling for AA + * These are commented out because glisse's CS checker doesn't like them. + * I presume these will be re-enabled later. + * OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); + * OUT_CS_REG(R300_GB_MSPOS1, 0x6666666); + */ /* Source of fog depth */ OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); /* AA enable */ -- cgit v1.2.3 From 67a43b2cfcc5ca4ce56fce0a2239048535add0f2 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 8 Jul 2009 11:59:56 -0700 Subject: r300g: Remove VAP_CNTL_STATUS from invariant state. Seriously. --- src/gallium/drivers/r300/r300_state_invariant.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 63a0c95918..9f534b8ce3 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -72,7 +72,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(77 + (caps->has_tcl ? 5 : 0)); + BEGIN_CS(75 + (caps->has_tcl ? 5 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -80,17 +80,12 @@ void r300_emit_invariant_state(struct r300_context* r300) R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA | R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA | R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT); - /* XXX endian */ if (caps->has_tcl) { - OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP); OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); OUT_CS_32F(1.0); OUT_CS_32F(1.0); OUT_CS_32F(1.0); OUT_CS_32F(1.0); - } else { - OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP | - R300_VAP_TCL_BYPASS); } /* XXX point tex stuffing */ OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); -- cgit v1.2.3 From ca28e591f2cf62b2c20558bf4f310093067b6209 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Mon, 13 Jul 2009 14:47:36 -0700 Subject: r300g: Use align() instead of inline maths. --- src/gallium/drivers/r300/r300_texture.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index f9dff03704..11c7858d42 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -73,12 +73,15 @@ static void r300_setup_miptree(struct r300_texture* tex) base->nblocksx[i] = pf_get_nblocksx(&base->block, base->width[i]); base->nblocksy[i] = pf_get_nblocksy(&base->block, base->width[i]); - /* Radeons enjoy things in multiples of 32. */ - /* XXX this can be 32 when POT */ - stride = (base->nblocksx[i] * base->block.size + 63) & ~63; + /* Radeons enjoy things in multiples of 64. + * + * XXX + * POT, uncompressed, unmippmapped textures can be aligned to 32, + * instead of 64. */ + stride = align(base->nblocksx[i] * base->block.size, 64); size = stride * base->nblocksy[i] * base->depth[i]; - tex->offset[i] = (tex->size + 63) & ~63; + tex->offset[i] = align(tex->size, 64); tex->size = tex->offset[i] + size; /* Save stride of first level to the texture. */ -- cgit v1.2.3 From b3f1d370a2eeb5ae69a9d59300820d3a2e86724c Mon Sep 17 00:00:00 2001 From: Nicolai Hähnle Date: Mon, 13 Jul 2009 14:58:45 -0700 Subject: r300g, radeon: Whitespace fixes. Signed-off-by: Corbin Simpson --- src/gallium/drivers/r300/r300_context.h | 2 +- src/gallium/winsys/drm/radeon/core/radeon_buffer.c | 8 ++++---- src/gallium/winsys/drm/radeon/core/radeon_buffer.h | 8 ++++---- src/gallium/winsys/drm/radeon/core/radeon_drm.c | 8 ++++---- 4 files changed, 13 insertions(+), 13 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index ae7857498f..7a96f51e5b 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -217,7 +217,7 @@ struct r300_texture { /* Stride (pitch?) of this texture in bytes */ unsigned stride; - + /* Total size of this texture, in bytes. */ unsigned size; diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c index 263f684a8e..684a487f24 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.c @@ -1,8 +1,8 @@ -/* +/* * Copyright © 2008 Jérôme Glisse * 2009 Corbin Simpson * All Rights Reserved. - * + * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including @@ -10,14 +10,14 @@ * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. * * The above copyright notice and this permission notice (including the diff --git a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h index 14c463d702..8c8b61fa10 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_buffer.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_buffer.h @@ -1,7 +1,7 @@ -/* +/* * Copyright © 2008 Jérôme Glisse * All Rights Reserved. - * + * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including @@ -9,14 +9,14 @@ * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. * * The above copyright notice and this permission notice (including the diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.c b/src/gallium/winsys/drm/radeon/core/radeon_drm.c index 8561e124d0..da2010184a 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_drm.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.c @@ -1,7 +1,7 @@ -/* +/* * Copyright © 2009 Corbin Simpson * All Rights Reserved. - * + * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including @@ -9,14 +9,14 @@ * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. * * The above copyright notice and this permission notice (including the -- cgit v1.2.3 From 59155f70e701bc0b4fb816da991d6921f53b3bc7 Mon Sep 17 00:00:00 2001 From: Nicolai Hähnle Date: Mon, 13 Jul 2009 15:01:51 -0700 Subject: r300g: Small compile warning fixes. Signed-off-by: Corbin Simpson --- src/gallium/drivers/r300/r300_context.h | 3 ++- src/gallium/drivers/r300/r300_query.h | 2 ++ src/gallium/drivers/r300/r300_screen.h | 2 +- 3 files changed, 5 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 7a96f51e5b..d891fd6265 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -331,7 +331,8 @@ struct r300_context { }; /* Convenience cast wrapper. */ -static struct r300_context* r300_context(struct pipe_context* context) { +static INLINE struct r300_context* r300_context(struct pipe_context* context) +{ return (struct r300_context*)context; } diff --git a/src/gallium/drivers/r300/r300_query.h b/src/gallium/drivers/r300/r300_query.h index 4f447ea45b..6a7646087a 100644 --- a/src/gallium/drivers/r300/r300_query.h +++ b/src/gallium/drivers/r300/r300_query.h @@ -27,6 +27,8 @@ #include "r300_cs.h" #include "r300_reg.h" +struct r300_context; + struct r300_query { /* The kind of query. Currently only OQ is supported. */ unsigned type; diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index 3f52dbc3be..2a0e41fbc3 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -49,7 +49,7 @@ struct r300_transfer { }; /* Convenience cast wrapper. */ -static struct r300_screen* r300_screen(struct pipe_screen* screen) { +static INLINE struct r300_screen* r300_screen(struct pipe_screen* screen) { return (struct r300_screen*)screen; } -- cgit v1.2.3 From 3326be6c0a008c42e19a039cbfbf2fac3f6e2212 Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Mon, 20 Jul 2009 01:53:15 +0200 Subject: r300g: Guard R500 register writes by is_r500 check. Flagged by the DRM command stream checker. This allows the driver to work on non-R500 cards. --- src/gallium/drivers/r300/r300_state_invariant.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 9f534b8ce3..430129d5bd 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -72,7 +72,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(75 + (caps->has_tcl ? 5 : 0)); + BEGIN_CS(71 + (caps->has_tcl ? 5 : 0) + (caps->is_r500 ? 4 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -115,8 +115,10 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_REG(R300_RB3D_CCTL, 0x00000000); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F); OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); - OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); - OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); + if (caps->is_r500) { + OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000); + OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF); + } OUT_CS_REG(R300_ZB_FORMAT, 0x00000002); OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003); OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000); -- cgit v1.2.3 From fd31f92cea0ce8613a22d8f4b3c75b340bcc5689 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Wed, 22 Jul 2009 00:39:00 +0100 Subject: gallium: simplify tgsi_full_immediate struct Remove the need to have a pointer in this struct by just including the immediate data inline. Having a pointer in the struct introduces complications like needing to alloc/free the data pointed to, uncertainty about who owns the data, etc. There doesn't seem to be a need for it, and it is unlikely to make much difference plus or minus to performance. Added some asserts as we now will trip up on immediates with more than four elements. There were actually already quite a few such asserts, but the >4 case could be used in the future to specify indexable immediate ranges, such as lookup tables. --- src/gallium/auxiliary/draw/draw_pipe_pstipple.c | 5 ++++- src/gallium/auxiliary/draw/draw_vs_aos.c | 3 ++- src/gallium/auxiliary/gallivm/tgsitollvm.cpp | 6 ++++-- src/gallium/auxiliary/tgsi/tgsi_build.c | 23 +++++++++++++--------- src/gallium/auxiliary/tgsi/tgsi_build.h | 2 +- src/gallium/auxiliary/tgsi/tgsi_dump.c | 4 +++- src/gallium/auxiliary/tgsi/tgsi_dump_c.c | 3 ++- src/gallium/auxiliary/tgsi/tgsi_exec.c | 10 +++++----- src/gallium/auxiliary/tgsi/tgsi_parse.c | 13 ++---------- src/gallium/auxiliary/tgsi/tgsi_parse.h | 6 +----- src/gallium/auxiliary/tgsi/tgsi_ppc.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_sse2.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_text.c | 5 ++++- src/gallium/drivers/cell/ppu/cell_gen_fp.c | 4 ++-- .../drivers/i915simple/i915_fpc_translate.c | 3 ++- src/gallium/drivers/i965simple/brw_vs_emit.c | 8 ++++---- src/gallium/drivers/nv20/nv20_vertprog.c | 8 ++++---- src/gallium/drivers/nv30/nv30_fragprog.c | 8 ++++---- src/gallium/drivers/nv30/nv30_vertprog.c | 8 ++++---- src/gallium/drivers/nv40/nv40_fragprog.c | 8 ++++---- src/gallium/drivers/nv40/nv40_vertprog.c | 8 ++++---- src/gallium/drivers/nv50/nv50_program.c | 8 ++++---- src/gallium/drivers/r300/r300_fs.c | 3 +-- src/gallium/drivers/r300/r300_vs.c | 3 +-- src/gallium/include/pipe/p_shader_tokens.h | 2 +- src/mesa/state_tracker/st_mesa_to_tgsi.c | 6 +++++- 26 files changed, 84 insertions(+), 77 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/auxiliary/draw/draw_pipe_pstipple.c b/src/gallium/auxiliary/draw/draw_pipe_pstipple.c index 30a6d2919d..283502cdf3 100644 --- a/src/gallium/auxiliary/draw/draw_pipe_pstipple.c +++ b/src/gallium/auxiliary/draw/draw_pipe_pstipple.c @@ -256,7 +256,10 @@ pstip_transform_inst(struct tgsi_transform_context *ctx, uint size = 4; immed = tgsi_default_full_immediate(); immed.Immediate.NrTokens = 1 + size; /* one for the token itself */ - immed.u.Pointer = (void *) value; + immed.u[0].Float = value[0]; + immed.u[1].Float = value[1]; + immed.u[2].Float = value[2]; + immed.u[3].Float = value[3]; ctx->emit_immediate(ctx, &immed); } diff --git a/src/gallium/auxiliary/draw/draw_vs_aos.c b/src/gallium/auxiliary/draw/draw_vs_aos.c index 9e37a26c1e..68402bed5f 100644 --- a/src/gallium/auxiliary/draw/draw_vs_aos.c +++ b/src/gallium/auxiliary/draw/draw_vs_aos.c @@ -1891,8 +1891,9 @@ static boolean note_immediate( struct aos_compilation *cp, unsigned pos = cp->num_immediates++; unsigned j; + assert( imm->Immediate.NrTokens <= 4 + 1 ); for (j = 0; j < imm->Immediate.NrTokens - 1; j++) { - cp->vaos->machine->immediate[pos][j] = imm->u.ImmediateFloat32[j].Float; + cp->vaos->machine->immediate[pos][j] = imm->u[j].Float; } return TRUE; diff --git a/src/gallium/auxiliary/gallivm/tgsitollvm.cpp b/src/gallium/auxiliary/gallivm/tgsitollvm.cpp index 5b08200d14..9c8f89d520 100644 --- a/src/gallium/auxiliary/gallivm/tgsitollvm.cpp +++ b/src/gallium/auxiliary/gallivm/tgsitollvm.cpp @@ -160,10 +160,11 @@ translate_immediate(Storage *storage, { float vec[4]; int i; + assert( imm->Immediate.NrTokens <= 4 + 1 ); for (i = 0; i < imm->Immediate.NrTokens - 1; ++i) { switch (imm->Immediate.DataType) { case TGSI_IMM_FLOAT32: - vec[i] = imm->u.ImmediateFloat32[i].Float; + vec[i] = imm->u[i].Float; break; default: assert(0); @@ -179,10 +180,11 @@ translate_immediateir(StorageSoa *storage, { float vec[4]; int i; + assert( imm->Immediate.NrTokens <= 4 + 1 ); for (i = 0; i < imm->Immediate.NrTokens - 1; ++i) { switch (imm->Immediate.DataType) { case TGSI_IMM_FLOAT32: - vec[i] = imm->u.ImmediateFloat32[i].Float; + vec[i] = imm->u[i].Float; break; default: assert(0); diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c b/src/gallium/auxiliary/tgsi/tgsi_build.c index d272533d63..010d501c60 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_build.c +++ b/src/gallium/auxiliary/tgsi/tgsi_build.c @@ -335,7 +335,10 @@ tgsi_default_full_immediate( void ) struct tgsi_full_immediate fullimm; fullimm.Immediate = tgsi_default_immediate(); - fullimm.u.Pointer = (void *) 0; + fullimm.u[0].Float = 0.0f; + fullimm.u[1].Float = 0.0f; + fullimm.u[2].Float = 0.0f; + fullimm.u[3].Float = 0.0f; return fullimm; } @@ -352,19 +355,19 @@ immediate_grow( header_bodysize_grow( header ); } -struct tgsi_immediate_float32 +union tgsi_immediate_data tgsi_build_immediate_float32( float value, struct tgsi_immediate *immediate, struct tgsi_header *header ) { - struct tgsi_immediate_float32 immediate_float32; + union tgsi_immediate_data immediate_data; - immediate_float32.Float = value; + immediate_data.Float = value; immediate_grow( immediate, header ); - return immediate_float32; + return immediate_data; } unsigned @@ -384,16 +387,18 @@ tgsi_build_full_immediate( *immediate = tgsi_build_immediate( header ); + assert( full_imm->Immediate.NrTokens <= 4 + 1 ); + for( i = 0; i < full_imm->Immediate.NrTokens - 1; i++ ) { - struct tgsi_immediate_float32 *if32; + union tgsi_immediate_data *data; if( maxsize <= size ) return 0; - if32 = (struct tgsi_immediate_float32 *) &tokens[size]; + data = (union tgsi_immediate_data *) &tokens[size]; size++; - *if32 = tgsi_build_immediate_float32( - full_imm->u.ImmediateFloat32[i].Float, + *data = tgsi_build_immediate_float32( + full_imm->u[i].Float, immediate, header ); } diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.h b/src/gallium/auxiliary/tgsi/tgsi_build.h index 9a3a077cf2..17d977b059 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_build.h +++ b/src/gallium/auxiliary/tgsi/tgsi_build.h @@ -119,7 +119,7 @@ tgsi_build_immediate( struct tgsi_full_immediate tgsi_default_full_immediate( void ); -struct tgsi_immediate_float32 +union tgsi_immediate_data tgsi_build_immediate_float32( float value, struct tgsi_immediate *immediate, diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c b/src/gallium/auxiliary/tgsi/tgsi_dump.c index a6994ecd48..e1cd8479cb 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_dump.c +++ b/src/gallium/auxiliary/tgsi/tgsi_dump.c @@ -295,10 +295,12 @@ iter_immediate( ENM( imm->Immediate.DataType, immediate_type_names ); TXT( " { " ); + + assert( imm->Immediate.NrTokens <= 4 + 1 ); for (i = 0; i < imm->Immediate.NrTokens - 1; i++) { switch (imm->Immediate.DataType) { case TGSI_IMM_FLOAT32: - FLT( imm->u.ImmediateFloat32[i].Float ); + FLT( imm->u[i].Float ); break; default: assert( 0 ); diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump_c.c b/src/gallium/auxiliary/tgsi/tgsi_dump_c.c index 3dc61c48ca..c944760ca6 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_dump_c.c +++ b/src/gallium/auxiliary/tgsi/tgsi_dump_c.c @@ -283,12 +283,13 @@ dump_immediate_verbose( UIX( imm->Immediate.Padding ); } + assert( imm->Immediate.NrTokens <= 4 + 1 ); for( i = 0; i < imm->Immediate.NrTokens - 1; i++ ) { EOL(); switch( imm->Immediate.DataType ) { case TGSI_IMM_FLOAT32: TXT( "\nFloat: " ); - FLT( imm->u.ImmediateFloat32[i].Float ); + FLT( imm->u[i].Float ); break; default: diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c index fe571a86bc..8c68a10a38 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_exec.c +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c @@ -301,14 +301,14 @@ tgsi_exec_machine_bind_shader( case TGSI_TOKEN_TYPE_IMMEDIATE: { uint size = parse.FullToken.FullImmediate.Immediate.NrTokens - 1; - assert( size % 4 == 0 ); - assert( mach->ImmLimit + size / 4 <= TGSI_EXEC_NUM_IMMEDIATES ); + assert( size <= 4 ); + assert( mach->ImmLimit + 1 <= TGSI_EXEC_NUM_IMMEDIATES ); for( i = 0; i < size; i++ ) { - mach->Imms[mach->ImmLimit + i / 4][i % 4] = - parse.FullToken.FullImmediate.u.ImmediateFloat32[i].Float; + mach->Imms[mach->ImmLimit][i] = + parse.FullToken.FullImmediate.u[i].Float; } - mach->ImmLimit += size / 4; + mach->ImmLimit += 1; } break; diff --git a/src/gallium/auxiliary/tgsi/tgsi_parse.c b/src/gallium/auxiliary/tgsi/tgsi_parse.c index 7f2cfb7988..4870f82b6b 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_parse.c +++ b/src/gallium/auxiliary/tgsi/tgsi_parse.c @@ -42,9 +42,6 @@ void tgsi_full_token_free( union tgsi_full_token *full_token ) { - if( full_token->Token.Type == TGSI_TOKEN_TYPE_IMMEDIATE ) { - FREE( (void *) full_token->FullImmediate.u.Pointer ); - } } unsigned @@ -156,14 +153,8 @@ tgsi_parse_token( case TGSI_IMM_FLOAT32: { uint imm_count = imm->Immediate.NrTokens - 1; - struct tgsi_immediate_float32 *data; - - data = (struct tgsi_immediate_float32 *) MALLOC(sizeof(struct tgsi_immediate_float32) * imm_count); - if (data) { - for (i = 0; i < imm_count; i++) { - next_token(ctx, &data[i]); - } - imm->u.ImmediateFloat32 = data; + for (i = 0; i < imm_count; i++) { + next_token(ctx, &imm->u[i]); } } break; diff --git a/src/gallium/auxiliary/tgsi/tgsi_parse.h b/src/gallium/auxiliary/tgsi/tgsi_parse.h index a289e26e3a..1035bda1a8 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_parse.h +++ b/src/gallium/auxiliary/tgsi/tgsi_parse.h @@ -73,11 +73,7 @@ struct tgsi_full_declaration struct tgsi_full_immediate { struct tgsi_immediate Immediate; - union - { - const void *Pointer; - const struct tgsi_immediate_float32 *ImmediateFloat32; - } u; + union tgsi_immediate_data u[4]; }; #define TGSI_FULL_MAX_DST_REGISTERS 2 diff --git a/src/gallium/auxiliary/tgsi/tgsi_ppc.c b/src/gallium/auxiliary/tgsi/tgsi_ppc.c index 0c64ae5713..fddf54460a 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_ppc.c +++ b/src/gallium/auxiliary/tgsi/tgsi_ppc.c @@ -1333,7 +1333,7 @@ tgsi_emit_ppc(const struct tgsi_token *tokens, assert(num_immediates < TGSI_EXEC_NUM_IMMEDIATES); for (i = 0; i < size; i++) { immediates[num_immediates][i] = - parse.FullToken.FullImmediate.u.ImmediateFloat32[i].Float; + parse.FullToken.FullImmediate.u[i].Float; } num_immediates++; } diff --git a/src/gallium/auxiliary/tgsi/tgsi_sse2.c b/src/gallium/auxiliary/tgsi/tgsi_sse2.c index 4c3343d26c..c3470176f9 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_sse2.c +++ b/src/gallium/auxiliary/tgsi/tgsi_sse2.c @@ -2953,7 +2953,7 @@ tgsi_emit_sse2( assert(num_immediates < TGSI_EXEC_NUM_IMMEDIATES); for( i = 0; i < size; i++ ) { immediates[num_immediates][i] = - parse.FullToken.FullImmediate.u.ImmediateFloat32[i].Float; + parse.FullToken.FullImmediate.u[i].Float; } #if 0 debug_printf("SSE FS immediate[%d] = %f %f %f %f\n", diff --git a/src/gallium/auxiliary/tgsi/tgsi_text.c b/src/gallium/auxiliary/tgsi/tgsi_text.c index a76bbc9140..3024da6a32 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_text.c +++ b/src/gallium/auxiliary/tgsi/tgsi_text.c @@ -1091,7 +1091,10 @@ static boolean parse_immediate( struct translate_ctx *ctx ) imm = tgsi_default_full_immediate(); imm.Immediate.NrTokens += 4; imm.Immediate.DataType = TGSI_IMM_FLOAT32; - imm.u.Pointer = values; + imm.u[0].Float = values[0]; + imm.u[1].Float = values[1]; + imm.u[2].Float = values[2]; + imm.u[3].Float = values[3]; advance = tgsi_build_full_immediate( &imm, diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fp.c b/src/gallium/drivers/cell/ppu/cell_gen_fp.c index 5a889a6119..7cd5656a7e 100644 --- a/src/gallium/drivers/cell/ppu/cell_gen_fp.c +++ b/src/gallium/drivers/cell/ppu/cell_gen_fp.c @@ -1875,9 +1875,9 @@ emit_immediate(struct codegen *gen, const struct tgsi_full_immediate *immed) assert(gen->num_imm < MAX_TEMPS); for (ch = 0; ch < 4; ch++) { - float val = immed->u.ImmediateFloat32[ch].Float; + float val = immed->u[ch].Float; - if (ch > 0 && val == immed->u.ImmediateFloat32[ch - 1].Float) { + if (ch > 0 && val == immed->u[ch - 1].Float) { /* re-use previous register */ gen->imm_regs[gen->num_imm][ch] = gen->imm_regs[gen->num_imm][ch - 1]; } diff --git a/src/gallium/drivers/i915simple/i915_fpc_translate.c b/src/gallium/drivers/i915simple/i915_fpc_translate.c index 961c1bf213..89504ced27 100644 --- a/src/gallium/drivers/i915simple/i915_fpc_translate.c +++ b/src/gallium/drivers/i915simple/i915_fpc_translate.c @@ -975,8 +975,9 @@ i915_translate_instructions(struct i915_fp_compile *p, = &parse.FullToken.FullImmediate; const uint pos = p->num_immediates++; uint j; + assert( imm->Immediate.NrTokens <= 4 + 1 ); for (j = 0; j < imm->Immediate.NrTokens - 1; j++) { - p->immediates[pos][j] = imm->u.ImmediateFloat32[j].Float; + p->immediates[pos][j] = imm->u[j].Float; } } break; diff --git a/src/gallium/drivers/i965simple/brw_vs_emit.c b/src/gallium/drivers/i965simple/brw_vs_emit.c index e03d653482..3ee82d95b3 100644 --- a/src/gallium/drivers/i965simple/brw_vs_emit.c +++ b/src/gallium/drivers/i965simple/brw_vs_emit.c @@ -1294,10 +1294,10 @@ void brw_vs_emit(struct brw_vs_compile *c) case TGSI_TOKEN_TYPE_IMMEDIATE: { struct tgsi_full_immediate *imm = &parse.FullToken.FullImmediate; assert(imm->Immediate.NrTokens == 4 + 1); - c->prog_data.imm_buf[c->prog_data.num_imm][0] = imm->u.ImmediateFloat32[0].Float; - c->prog_data.imm_buf[c->prog_data.num_imm][1] = imm->u.ImmediateFloat32[1].Float; - c->prog_data.imm_buf[c->prog_data.num_imm][2] = imm->u.ImmediateFloat32[2].Float; - c->prog_data.imm_buf[c->prog_data.num_imm][3] = imm->u.ImmediateFloat32[3].Float; + c->prog_data.imm_buf[c->prog_data.num_imm][0] = imm->u[0].Float; + c->prog_data.imm_buf[c->prog_data.num_imm][1] = imm->u[1].Float; + c->prog_data.imm_buf[c->prog_data.num_imm][2] = imm->u[2].Float; + c->prog_data.imm_buf[c->prog_data.num_imm][3] = imm->u[3].Float; c->prog_data.num_imm++; } break; diff --git a/src/gallium/drivers/nv20/nv20_vertprog.c b/src/gallium/drivers/nv20/nv20_vertprog.c index c1e588902b..388245ecb0 100644 --- a/src/gallium/drivers/nv20/nv20_vertprog.c +++ b/src/gallium/drivers/nv20/nv20_vertprog.c @@ -617,10 +617,10 @@ nv20_vertprog_translate(struct nv20_context *nv20, assert(imm->Immediate.NrTokens == 4 + 1); vpc->imm[vpc->nr_imm++] = constant(vpc, -1, - imm->u.ImmediateFloat32[0].Float, - imm->u.ImmediateFloat32[1].Float, - imm->u.ImmediateFloat32[2].Float, - imm->u.ImmediateFloat32[3].Float); + imm->u[0].Float, + imm->u[1].Float, + imm->u[2].Float, + imm->u[3].Float); } break; case TGSI_TOKEN_TYPE_INSTRUCTION: diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c index 1d1c556fb1..a48ba9782b 100644 --- a/src/gallium/drivers/nv30/nv30_fragprog.c +++ b/src/gallium/drivers/nv30/nv30_fragprog.c @@ -704,10 +704,10 @@ nv30_fragprog_prepare(struct nv30_fpc *fpc) assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); assert(fpc->nr_imm < MAX_IMM); - vals[0] = imm->u.ImmediateFloat32[0].Float; - vals[1] = imm->u.ImmediateFloat32[1].Float; - vals[2] = imm->u.ImmediateFloat32[2].Float; - vals[3] = imm->u.ImmediateFloat32[3].Float; + vals[0] = imm->u[0].Float; + vals[1] = imm->u[1].Float; + vals[2] = imm->u[2].Float; + vals[3] = imm->u[3].Float; fpc->imm[fpc->nr_imm++] = constant(fpc, -1, vals); } break; diff --git a/src/gallium/drivers/nv30/nv30_vertprog.c b/src/gallium/drivers/nv30/nv30_vertprog.c index c7514efcfe..14a5c0260d 100644 --- a/src/gallium/drivers/nv30/nv30_vertprog.c +++ b/src/gallium/drivers/nv30/nv30_vertprog.c @@ -617,10 +617,10 @@ nv30_vertprog_translate(struct nv30_context *nv30, assert(imm->Immediate.NrTokens == 4 + 1); vpc->imm[vpc->nr_imm++] = constant(vpc, -1, - imm->u.ImmediateFloat32[0].Float, - imm->u.ImmediateFloat32[1].Float, - imm->u.ImmediateFloat32[2].Float, - imm->u.ImmediateFloat32[3].Float); + imm->u[0].Float, + imm->u[1].Float, + imm->u[2].Float, + imm->u[3].Float); } break; case TGSI_TOKEN_TYPE_INSTRUCTION: diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c index 680976da56..32d9ed1a7f 100644 --- a/src/gallium/drivers/nv40/nv40_fragprog.c +++ b/src/gallium/drivers/nv40/nv40_fragprog.c @@ -790,10 +790,10 @@ nv40_fragprog_prepare(struct nv40_fpc *fpc) assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); assert(fpc->nr_imm < MAX_IMM); - vals[0] = imm->u.ImmediateFloat32[0].Float; - vals[1] = imm->u.ImmediateFloat32[1].Float; - vals[2] = imm->u.ImmediateFloat32[2].Float; - vals[3] = imm->u.ImmediateFloat32[3].Float; + vals[0] = imm->u[0].Float; + vals[1] = imm->u[1].Float; + vals[2] = imm->u[2].Float; + vals[3] = imm->u[3].Float; fpc->imm[fpc->nr_imm++] = constant(fpc, -1, vals); } break; diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c index e75e8d3f42..0382dbba8f 100644 --- a/src/gallium/drivers/nv40/nv40_vertprog.c +++ b/src/gallium/drivers/nv40/nv40_vertprog.c @@ -788,10 +788,10 @@ nv40_vertprog_translate(struct nv40_context *nv40, assert(imm->Immediate.NrTokens == 4 + 1); vpc->imm[vpc->nr_imm++] = constant(vpc, -1, - imm->u.ImmediateFloat32[0].Float, - imm->u.ImmediateFloat32[1].Float, - imm->u.ImmediateFloat32[2].Float, - imm->u.ImmediateFloat32[3].Float); + imm->u[0].Float, + imm->u[1].Float, + imm->u[2].Float, + imm->u[3].Float); } break; case TGSI_TOKEN_TYPE_INSTRUCTION: diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c index 5f7d06dbec..4ec9c03305 100644 --- a/src/gallium/drivers/nv50/nv50_program.c +++ b/src/gallium/drivers/nv50/nv50_program.c @@ -1809,10 +1809,10 @@ nv50_program_tx_prep(struct nv50_pc *pc) const struct tgsi_full_immediate *imm = &p.FullToken.FullImmediate; - ctor_immd(pc, imm->u.ImmediateFloat32[0].Float, - imm->u.ImmediateFloat32[1].Float, - imm->u.ImmediateFloat32[2].Float, - imm->u.ImmediateFloat32[3].Float); + ctor_immd(pc, imm->u[0].Float, + imm->u[1].Float, + imm->u[2].Float, + imm->u[3].Float); } break; case TGSI_TOKEN_TYPE_DECLARATION: diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c index 4b304306d0..8672e211bc 100644 --- a/src/gallium/drivers/r300/r300_fs.c +++ b/src/gallium/drivers/r300/r300_fs.c @@ -67,8 +67,7 @@ void r300_translate_fragment_shader(struct r300_context* r300, for (i = 0; i < 4; i++) { consts->constants[assembler->imm_offset + assembler->imm_count][i] = - parser.FullToken.FullImmediate.u.ImmediateFloat32[i] - .Float; + parser.FullToken.FullImmediate.u[i].Float; } assembler->imm_count++; break; diff --git a/src/gallium/drivers/r300/r300_vs.c b/src/gallium/drivers/r300/r300_vs.c index f87435f9f0..a664a316e8 100644 --- a/src/gallium/drivers/r300/r300_vs.c +++ b/src/gallium/drivers/r300/r300_vs.c @@ -378,8 +378,7 @@ void r300_translate_vertex_shader(struct r300_context* r300, for (i = 0; i < 4; i++) { consts->constants[assembler->imm_offset + assembler->imm_count][i] = - parser.FullToken.FullImmediate.u.ImmediateFloat32[i] - .Float; + parser.FullToken.FullImmediate.u[i].Float; } assembler->imm_count++; break; diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h index b00cfe3423..b87aae6197 100644 --- a/src/gallium/include/pipe/p_shader_tokens.h +++ b/src/gallium/include/pipe/p_shader_tokens.h @@ -152,7 +152,7 @@ struct tgsi_immediate unsigned Extended : 1; /**< BOOL */ }; -struct tgsi_immediate_float32 +union tgsi_immediate_data { float Float; }; diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c index e150dff9bb..6380cd6b2a 100644 --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c @@ -225,11 +225,15 @@ static struct tgsi_full_immediate make_immediate(const float *value, uint size) { struct tgsi_full_immediate imm; + unsigned i; imm = tgsi_default_full_immediate(); imm.Immediate.NrTokens += size; imm.Immediate.DataType = TGSI_IMM_FLOAT32; - imm.u.Pointer = value; + + for (i = 0; i < size; i++) + imm.u[i].Float = value[i]; + return imm; } -- cgit v1.2.3 From 07961bb05e5ba05205b9f53834863664f1023870 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Wed, 22 Jul 2009 23:58:35 -0700 Subject: r300g: Actually mark shaders as translated/untranslated. Also trust that Gallium will not give us TGSI that miscounts shader consts. This creates a 20x speedup on glxgears, from 8 FPS to 160 FPS. --- src/gallium/drivers/r300/r300_fs.c | 3 +++ src/gallium/drivers/r300/r300_state.c | 4 ++-- src/gallium/drivers/r300/r300_vs.c | 3 +++ 3 files changed, 8 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c index 8672e211bc..ca8ef99902 100644 --- a/src/gallium/drivers/r300/r300_fs.c +++ b/src/gallium/drivers/r300/r300_fs.c @@ -105,4 +105,7 @@ void r300_translate_fragment_shader(struct r300_context* r300, tgsi_parse_free(&parser); FREE(assembler); + + /* And, finally... */ + fs->translated = TRUE; } diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 68da0aa4cb..162740f594 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -155,7 +155,7 @@ static void } r300->dirty_state |= R300_NEW_CONSTANTS; - +#if 0 /* If the number of constants have changed, invalidate the shader. */ if (r300->shader_constants[shader].user_count != i) { if (shader == PIPE_SHADER_FRAGMENT && r300->fs && @@ -168,6 +168,7 @@ static void r300_translate_vertex_shader(r300, r300->vs); } } +#endif } /* Create a new depth, stencil, and alpha state based on the CSO dsa state. @@ -315,7 +316,6 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) r300_translate_fragment_shader(r300, fs); } - fs->translated = TRUE; r300->fs = fs; r300->dirty_state |= R300_NEW_FRAGMENT_SHADER; diff --git a/src/gallium/drivers/r300/r300_vs.c b/src/gallium/drivers/r300/r300_vs.c index a664a316e8..741a1b6989 100644 --- a/src/gallium/drivers/r300/r300_vs.c +++ b/src/gallium/drivers/r300/r300_vs.c @@ -408,4 +408,7 @@ void r300_translate_vertex_shader(struct r300_context* r300, tgsi_parse_free(&parser); FREE(assembler); + + /* And, finally... */ + vs->translated = TRUE; } -- cgit v1.2.3 From 256eacbde44829b6f3874743e8df6102ce7a6ef0 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 23 Jul 2009 01:04:26 -0700 Subject: r300g: PIPE_CAP_BLEND_EQUATION_SEPARATE. --- src/gallium/drivers/r300/r300_screen.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index da1d5ffe2f..258e4ac7b2 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -147,6 +147,8 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) case PIPE_CAP_TGSI_CONT_SUPPORTED: /* XXX */ return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return 1; default: debug_printf("r300: Implementation error: Bad param %d\n", param); -- cgit v1.2.3 From ca83d5a8db510756eb95423a52b19ff52a2d6dc1 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Thu, 23 Jul 2009 07:14:07 -0700 Subject: r300g, radeon-gallium: Fix API, cleanup. Something called "validate" should return FALSE on failure, not TRUE. --- src/gallium/drivers/r300/r300_emit.c | 3 ++- src/gallium/drivers/r300/r300_surface.c | 6 ++++-- src/gallium/winsys/drm/radeon/core/radeon_drm.c | 9 ++------- src/gallium/winsys/drm/radeon/core/radeon_drm.h | 8 ++++++++ src/gallium/winsys/drm/radeon/core/radeon_r300.c | 11 ++++++++--- src/gallium/winsys/drm/radeon/core/radeon_r300.h | 13 ------------- 6 files changed, 24 insertions(+), 26 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 7ba56cdc1d..ac510ffc2e 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -531,10 +531,11 @@ validate: } else { debug_printf("No VBO while emitting dirty state!\n"); } - if (r300->winsys->validate(r300->winsys)) { + if (!r300->winsys->validate(r300->winsys)) { r300->context.flush(&r300->context, 0, NULL); if (invalid) { /* Well, hell. */ + debug_printf("r300: Stuck in validation loop, gonna quit now."); exit(1); } invalid = TRUE; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index fdabe4d9cf..25168ce5e9 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -125,9 +125,10 @@ validate: r300->context.flush(&r300->context, 0, NULL); goto validate; } - if (r300->winsys->validate(r300->winsys)) { + if (!r300->winsys->validate(r300->winsys)) { r300->context.flush(&r300->context, 0, NULL); if (invalid) { + debug_printf("r300: Stuck in validation loop, gonna fallback."); goto fallback; } invalid = TRUE; @@ -256,9 +257,10 @@ validate: r300->context.flush(&r300->context, 0, NULL); goto validate; } - if (r300->winsys->validate(r300->winsys)) { + if (!r300->winsys->validate(r300->winsys)) { r300->context.flush(&r300->context, 0, NULL); if (invalid) { + debug_printf("r300: Stuck in validation loop, gonna fallback."); goto fallback; } invalid = TRUE; diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.c b/src/gallium/winsys/drm/radeon/core/radeon_drm.c index d6e4e4b5eb..8d818cf830 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_drm.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.c @@ -29,12 +29,6 @@ */ #include "radeon_drm.h" -#include "trace/tr_drm.h" - -#include "r300_screen.h" -#include "xf86drm.h" - -#include /* Create a pipe_screen. */ struct pipe_screen* radeon_create_screen(struct drm_api* api, @@ -59,7 +53,8 @@ struct pipe_context* radeon_create_context(struct drm_api* api, if (getenv("RADEON_SOFTPIPE")) { return radeon_create_softpipe(screen->winsys); } else { - return r300_create_context(screen, screen->winsys); + return r300_create_context(screen, + (struct r300_winsys*)screen->winsys); } } diff --git a/src/gallium/winsys/drm/radeon/core/radeon_drm.h b/src/gallium/winsys/drm/radeon/core/radeon_drm.h index 8560f71db6..88a5c82b28 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_drm.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_drm.h @@ -30,8 +30,13 @@ #ifndef RADEON_DRM_H #define RADEON_DRM_H +#include + +#include "xf86drm.h" + #include "pipe/p_screen.h" +#include "trace/tr_drm.h" #include "util/u_memory.h" #include "state_tracker/drm_api.h" @@ -40,6 +45,9 @@ #include "radeon_r300.h" #include "radeon_winsys_softpipe.h" +/* XXX */ +#include "r300_screen.h" + struct pipe_screen* radeon_create_screen(struct drm_api* api, int drmFB, struct drm_create_screen_arg *arg); diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index ac33ea4c6e..e927409e3a 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -41,11 +41,11 @@ static boolean radeon_r300_validate(struct r300_winsys* winsys) (struct radeon_winsys_priv*)winsys->radeon_winsys; if (radeon_cs_space_check(priv->cs) < 0) { - return TRUE; + return FALSE; } /* Things are fine, we can proceed as normal. */ - return FALSE; + return TRUE; } static boolean radeon_r300_check_cs(struct r300_winsys* winsys, int size) @@ -118,10 +118,15 @@ static void radeon_r300_flush_cs(struct r300_winsys* winsys) debug_printf("radeon: Bad CS, dumping...\n"); radeon_cs_print(priv->cs, stderr); } - radeon_cs_erase(priv->cs); /* Clean out BOs. */ radeon_cs_space_reset_bos(priv->cs); + + /* Reset CS. + * Someday, when we care about performance, we should really find a way + * to rotate between two or three CS objects so that the GPU can be + * spinning through one CS while another one is being filled. */ + radeon_cs_erase(priv->cs); } /* Helper function to do the ioctls needed for setup and init. */ diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.h b/src/gallium/winsys/drm/radeon/core/radeon_r300.h index 7f0246cc7a..741c137188 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.h +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.h @@ -34,19 +34,6 @@ #include "radeon_buffer.h" -/* protect us from bonghits */ -#ifndef RADEON_INFO_DEVICE_ID -#define RADEON_INFO_DEVICE_ID 0 -#endif -#ifndef DRM_RADEON_INFO -#define DRM_RADEON_INFO 0x1 -struct drm_radeon_info { - uint32_t request; - uint32_t pad; - uint64_t value; -}; -#endif - struct radeon_winsys; struct r300_winsys* -- cgit v1.2.3 From 2cbd5ecfb666a757c4abef85dbe40fb53d647ec9 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 24 Jul 2009 14:37:07 -0700 Subject: r300g: Add some debugging, correct little bits of math in texture setup. Simple stuff still works, but not sure about some of the more complex things. --- src/gallium/drivers/r300/r300_texture.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 11c7858d42..1e86020d1f 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -55,6 +55,9 @@ static void r300_setup_texture_state(struct r300_texture* tex, if (height > 2048) { state->format2 |= R500_TXHEIGHT_BIT11; } + + debug_printf("r300: Set texture state (%dx%d, pitch %d, %d levels)\n", + width, height, pitch, levels); } static void r300_setup_miptree(struct r300_texture* tex) @@ -71,19 +74,25 @@ static void r300_setup_miptree(struct r300_texture* tex) } base->nblocksx[i] = pf_get_nblocksx(&base->block, base->width[i]); - base->nblocksy[i] = pf_get_nblocksy(&base->block, base->width[i]); + base->nblocksy[i] = pf_get_nblocksy(&base->block, base->height[i]); /* Radeons enjoy things in multiples of 64. * * XXX * POT, uncompressed, unmippmapped textures can be aligned to 32, * instead of 64. */ - stride = align(base->nblocksx[i] * base->block.size, 64); + stride = align( + (base->nblocksx[i] * base->block.size) / base->block.width, + 32); size = stride * base->nblocksy[i] * base->depth[i]; - tex->offset[i] = align(tex->size, 64); + tex->offset[i] = align(tex->size, 32); tex->size = tex->offset[i] + size; + debug_printf("r300: Texture miptree: Level %d " + "(%dx%dx%d px, pitch %d bytes)\n", + i, base->width[i], base->height[i], base->depth[i], + stride); /* Save stride of first level to the texture. */ if (i == 0) { tex->stride = stride; -- cgit v1.2.3 From 7a10472f095ef0f9f6109ca17d8be16836e56509 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Sun, 26 Jul 2009 22:48:20 -0700 Subject: r300g: Fix two trivial texture size issues. Next thing to fix: progs/tests/mipgen. --- src/gallium/drivers/r300/r300_texture.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 1e86020d1f..daf1647bee 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -87,7 +87,7 @@ static void r300_setup_miptree(struct r300_texture* tex) size = stride * base->nblocksy[i] * base->depth[i]; tex->offset[i] = align(tex->size, 32); - tex->size = tex->offset[i] + size; + tex->size += tex->offset[i] + size; debug_printf("r300: Texture miptree: Level %d " "(%dx%dx%d px, pitch %d bytes)\n", @@ -120,7 +120,7 @@ static struct pipe_texture* r300_setup_texture_state(tex, template->width[0], template->height[0], template->width[0], template->last_level); - tex->buffer = screen->buffer_create(screen, 64, + tex->buffer = screen->buffer_create(screen, 1024, PIPE_BUFFER_USAGE_PIXEL, tex->size); -- cgit v1.2.3 From 188f8c679254f193cdcfcd4ef338f3c8c5e1146d Mon Sep 17 00:00:00 2001 From: Nicolai Hähnle Date: Mon, 27 Jul 2009 20:23:49 +0200 Subject: r300g: Use r300compiler for vertex shaders --- src/gallium/Makefile.template | 4 +- src/gallium/drivers/r300/Makefile | 18 +- src/gallium/drivers/r300/r300_context.h | 29 +- src/gallium/drivers/r300/r300_debug.c | 126 ++++--- src/gallium/drivers/r300/r300_debug.h | 176 --------- src/gallium/drivers/r300/r300_emit.c | 75 ++-- src/gallium/drivers/r300/r300_emit.h | 6 + src/gallium/drivers/r300/r300_state.c | 1 + src/gallium/drivers/r300/r300_state_derived.c | 2 + src/gallium/drivers/r300/r300_surface.c | 4 +- src/gallium/drivers/r300/r300_tgsi_to_rc.c | 299 +++++++++++++++ src/gallium/drivers/r300/r300_tgsi_to_rc.h | 41 ++ src/gallium/drivers/r300/r300_vs.c | 520 +++++++++----------------- src/gallium/drivers/r300/r300_vs.h | 137 +------ src/gallium/drivers/r300/r3xx_fs.h | 2 + src/gallium/drivers/r300/r5xx_fs.h | 2 + 16 files changed, 692 insertions(+), 750 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_tgsi_to_rc.c create mode 100644 src/gallium/drivers/r300/r300_tgsi_to_rc.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/Makefile.template b/src/gallium/Makefile.template index 98487d43bd..2e3da436cd 100644 --- a/src/gallium/Makefile.template +++ b/src/gallium/Makefile.template @@ -31,8 +31,8 @@ INCLUDES = \ default: depend lib$(LIBNAME).a -lib$(LIBNAME).a: $(OBJECTS) Makefile $(TOP)/src/gallium/Makefile.template - $(MKLIB) -o $(LIBNAME) -static $(OBJECTS) +lib$(LIBNAME).a: $(OBJECTS) $(EXTRA_OBJECTS) Makefile $(TOP)/src/gallium/Makefile.template + $(MKLIB) -o $(LIBNAME) -static $(OBJECTS) $(EXTRA_OBJECTS) depend: $(C_SOURCES) $(CPP_SOURCES) $(ASM_SOURCES) $(SYMLINKS) rm -f depend diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index faceec9842..93c2152edc 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -21,6 +21,22 @@ C_SOURCES = \ r300_state_invariant.c \ r300_vs.c \ r300_surface.c \ - r300_texture.c + r300_texture.c \ + r300_tgsi_to_rc.c + +LIBRARY_INCLUDES = \ + -I$(TOP)/src/mesa/drivers/dri/r300/compiler \ + -I$(TOP)/src/mesa \ + -I$(TOP)/include + +COMPILER_ARCHIVE = $(TOP)/src/mesa/drivers/dri/r300/compiler/libr300compiler.a + +EXTRA_OBJECTS = \ + $(COMPILER_ARCHIVE) include ../../Makefile.template + +.PHONY : $(COMPILER_ARCHIVE) + +$(COMPILER_ARCHIVE): + cd $(TOP)/src/mesa/drivers/dri/r300/compiler; make diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index d891fd6265..c1ef64e4ee 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -34,6 +34,8 @@ #include "r300_screen.h" #include "r300_winsys.h" +struct r300_vertex_shader; + struct r300_blend_state { uint32_t blend_control; /* R300_RB3D_CBLEND: 0x4e04 */ uint32_t alpha_blend_control; /* R300_RB3D_ABLEND: 0x4e08 */ @@ -242,33 +244,6 @@ struct r300_vertex_format { int fs_tab[16]; }; -struct r300_vertex_shader { - /* Parent class */ - struct pipe_shader_state state; - struct tgsi_shader_info info; - - /* Fallback shader, because Draw has issues */ - struct draw_vertex_shader* draw; - - /* Has this shader been translated yet? */ - boolean translated; - - /* Are there immediates in this shader? - * If not, we can heavily optimize recompilation. */ - boolean uses_imms; - - /* Number of used instructions */ - int instruction_count; - - /* Machine instructions */ - struct { - uint32_t inst0; - uint32_t inst1; - uint32_t inst2; - uint32_t inst3; - } instructions[128]; /*< XXX magic number */ -}; - static struct pipe_viewport_state r300_viewport_identity = { .scale = {1.0, 1.0, 1.0, 1.0}, .translate = {0.0, 0.0, 0.0, 0.0}, diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index c83e8526cf..aae8a4fbde 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -22,6 +22,83 @@ #include "r300_debug.h" + +static char* r5xx_fs_swiz[] = { + " R", + " G", + " B", + " A", + " 0", + ".5", + " 1", + " U", +}; + +static char* r5xx_fs_op_rgb[] = { + "MAD", + "DP3", + "DP4", + "D2A", + "MIN", + "MAX", + "---", + "CND", + "CMP", + "FRC", + "SOP", + "MDH", + "MDV", +}; + +static char* r5xx_fs_op_alpha[] = { + "MAD", + " DP", + "MIN", + "MAX", + "---", + "CND", + "CMP", + "FRC", + "EX2", + "LN2", + "RCP", + "RSQ", + "SIN", + "COS", + "MDH", + "MDV", +}; + +static char* r5xx_fs_mask[] = { + "NONE", + "R ", + " G ", + "RG ", + " B ", + "R B ", + " GB ", + "RGB ", + " A", + "R A", + " G A", + "RG A", + " BA", + "R BA", + " GBA", + "RGBA", +}; + +static char* r5xx_fs_tex[] = { + " NOP", + " LD", + "TEXKILL", + " PROJ", + "LODBIAS", + " LOD", + " DXDY", +}; + + void r3xx_dump_fs(struct r3xx_fragment_shader* fs) { int i; @@ -142,57 +219,10 @@ void r5xx_fs_dump(struct r5xx_fragment_shader* fs) r5xx_fs_swiz[(inst >> 26) & 0x3], r5xx_fs_swiz[(inst >> 28) & 0x3], r5xx_fs_swiz[(inst >> 30) & 0x3]); - + inst = fs->instructions[i].inst3; debug_printf(" 3: TEX_DXDY 0x%08x\n", inst); break; } } } - -static void r300_vs_op_dump(uint32_t op) -{ - debug_printf(" dst: %d%s op: ", - (op >> 13) & 0x7f, r300_vs_dst_debug[(op >> 8) & 0x7]); - if (op & 0x80) { - if (op & 0x1) { - debug_printf("PVS_MACRO_OP_2CLK_M2X_ADD\n"); - } else { - debug_printf(" PVS_MACRO_OP_2CLK_MADD\n"); - } - } else if (op & 0x40) { - debug_printf("%s\n", r300_vs_me_ops[op & 0x1f]); - } else { - debug_printf("%s\n", r300_vs_ve_ops[op & 0x1f]); - } -} - -void r300_vs_src_dump(uint32_t src) -{ - debug_printf(" reg: %d%s swiz: %s%s/%s%s/%s%s/%s%s\n", - (src >> 5) & 0x7f, r300_vs_src_debug[src & 0x3], - src & (1 << 25) ? "-" : " ", - r300_vs_swiz_debug[(src >> 13) & 0x7], - src & (1 << 26) ? "-" : " ", - r300_vs_swiz_debug[(src >> 16) & 0x7], - src & (1 << 27) ? "-" : " ", - r300_vs_swiz_debug[(src >> 19) & 0x7], - src & (1 << 28) ? "-" : " ", - r300_vs_swiz_debug[(src >> 22) & 0x7]); -} - -void r300_vs_dump(struct r300_vertex_shader* vs) -{ - int i; - - for (i = 0; i < vs->instruction_count; i++) { - debug_printf("%d: op: 0x%08x", i, vs->instructions[i].inst0); - r300_vs_op_dump(vs->instructions[i].inst0); - debug_printf(" src0: 0x%08x", vs->instructions[i].inst1); - r300_vs_src_dump(vs->instructions[i].inst1); - debug_printf(" src1: 0x%08x", vs->instructions[i].inst2); - r300_vs_src_dump(vs->instructions[i].inst2); - debug_printf(" src2: 0x%08x", vs->instructions[i].inst3); - r300_vs_src_dump(vs->instructions[i].inst3); - } -} diff --git a/src/gallium/drivers/r300/r300_debug.h b/src/gallium/drivers/r300/r300_debug.h index 6b58c1e250..c551bd548e 100644 --- a/src/gallium/drivers/r300/r300_debug.h +++ b/src/gallium/drivers/r300/r300_debug.h @@ -27,182 +27,6 @@ #include "r300_fs.h" #include "r300_vs.h" -static char* r5xx_fs_swiz[] = { - " R", - " G", - " B", - " A", - " 0", - ".5", - " 1", - " U", -}; - -static char* r5xx_fs_op_rgb[] = { - "MAD", - "DP3", - "DP4", - "D2A", - "MIN", - "MAX", - "---", - "CND", - "CMP", - "FRC", - "SOP", - "MDH", - "MDV", -}; - -static char* r5xx_fs_op_alpha[] = { - "MAD", - " DP", - "MIN", - "MAX", - "---", - "CND", - "CMP", - "FRC", - "EX2", - "LN2", - "RCP", - "RSQ", - "SIN", - "COS", - "MDH", - "MDV", -}; - -static char* r5xx_fs_mask[] = { - "NONE", - "R ", - " G ", - "RG ", - " B ", - "R B ", - " GB ", - "RGB ", - " A", - "R A", - " G A", - "RG A", - " BA", - "R BA", - " GBA", - "RGBA", -}; - -static char* r5xx_fs_tex[] = { - " NOP", - " LD", - "TEXKILL", - " PROJ", - "LODBIAS", - " LOD", - " DXDY", -}; - -static char* r300_vs_ve_ops[] = { - /* R300 vector ops */ - " VE_NO_OP", - " VE_DOT_PRODUCT", - " VE_MULTIPLY", - " VE_ADD", - " VE_MULTIPLY_ADD", - " VE_DISTANCE_FACTOR", - " VE_FRACTION", - " VE_MAXIMUM", - " VE_MINIMUM", - "VE_SET_GREATER_THAN_EQUAL", - " VE_SET_LESS_THAN", - " VE_MULTIPLYX2_ADD", - " VE_MULTIPLY_CLAMP", - " VE_FLT2FIX_DX", - " VE_FLT2FIX_DX_RND", - /* R500 vector ops */ - " VE_PRED_SET_EQ_PUSH", - " VE_PRED_SET_GT_PUSH", - " VE_PRED_SET_GTE_PUSH", - " VE_PRED_SET_NEQ_PUSH", - " VE_COND_WRITE_EQ", - " VE_COND_WRITE_GT", - " VE_COND_WRITE_GTE", - " VE_COND_WRITE_NEQ", - " VE_SET_GREATER_THAN", - " VE_SET_EQUAL", - " VE_SET_NOT_EQUAL", - " (reserved)", - " (reserved)", - " (reserved)", -}; - -static char* r300_vs_me_ops[] = { - /* R300 math ops */ - " ME_NO_OP", - " ME_EXP_BASE2_DX", - " ME_LOG_BASE2_DX", - " ME_EXP_BASEE_FF", - " ME_LIGHT_COEFF_DX", - " ME_POWER_FUNC_FF", - " ME_RECIP_DX", - " ME_RECIP_FF", - " ME_RECIP_SQRT_DX", - " ME_RECIP_SQRT_FF", - " ME_MULTIPLY", - " ME_EXP_BASE2_FULL_DX", - " ME_LOG_BASE2_FULL_DX", - " ME_POWER_FUNC_FF_CLAMP_B", - "ME_POWER_FUNC_FF_CLAMP_B1", - "ME_POWER_FUNC_FF_CLAMP_01", - " ME_SIN", - " ME_COS", - /* R500 math ops */ - " ME_LOG_BASE2_IEEE", - " ME_RECIP_IEEE", - " ME_RECIP_SQRT_IEEE", - " ME_PRED_SET_EQ", - " ME_PRED_SET_GT", - " ME_PRED_SET_GTE", - " ME_PRED_SET_NEQ", - " ME_PRED_SET_CLR", - " ME_PRED_SET_INV", - " ME_PRED_SET_POP", - " ME_PRED_SET_RESTORE", - " (reserved)", - " (reserved)", - " (reserved)", -}; - -/* XXX refactor to avoid clashing symbols */ -static char* r300_vs_src_debug[] = { - "t", - "i", - "c", - "a", -}; - -static char* r300_vs_dst_debug[] = { - "t", - "a0", - "o", - "ox", - "a", - "i", - "u", - "u", -}; - -static char* r300_vs_swiz_debug[] = { - "X", - "Y", - "Z", - "W", - "0", - "1", - "U", - "U", -}; - void r5xx_fs_dump(struct r5xx_fragment_shader* fs); void r3xx_dump_fs(struct r3xx_fragment_shader* fs); diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index ac510ffc2e..e9ca4ac662 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -24,6 +24,8 @@ #include "r300_emit.h" +#include "r300_vs.h" + void r300_emit_blend_state(struct r300_context* r300, struct r300_blend_state* blend) { @@ -380,13 +382,33 @@ void r300_emit_vertex_format_state(struct r300_context* r300) END_CS; } -void r300_emit_vertex_shader(struct r300_context* r300, - struct r300_vertex_shader* vs) +static const float * get_shader_constant( + struct r300_context * r300, + struct rc_constant * constant, + struct r300_constant_buffer * externals) +{ + static const float zero[4] = { 0.0, 0.0, 0.0, 0.0 }; + switch(constant->Type) { + case RC_CONSTANT_EXTERNAL: + return externals->constants[constant->u.External]; + + case RC_CONSTANT_IMMEDIATE: + return constant->u.Immediate; + + default: + debug_printf("r300: Implementation error: Unhandled constant type %i\n", + constant->Type); + return zero; + } +} + +void r300_emit_vertex_program_code(struct r300_context* r300, + struct r300_vertex_program_code* code, + struct r300_constant_buffer* constants) { int i; struct r300_screen* r300screen = r300_screen(r300->context.screen); - struct r300_constant_buffer* constants = - &r300->shader_constants[PIPE_SHADER_VERTEX]; + unsigned instruction_count = code->length / 4; CS_LOCALS(r300); if (!r300screen->caps->has_tcl) { @@ -395,10 +417,10 @@ void r300_emit_vertex_shader(struct r300_context* r300, return; } - if (constants->count) { - BEGIN_CS(14 + (vs->instruction_count * 4) + (constants->count * 4)); + if (code->constants.Count) { + BEGIN_CS(14 + code->length + (code->constants.Count * 4)); } else { - BEGIN_CS(11 + (vs->instruction_count * 4)); + BEGIN_CS(11 + code->length); } /* R300_VAP_PVS_CODE_CNTL_0 @@ -408,30 +430,27 @@ void r300_emit_vertex_shader(struct r300_context* r300, * XXX these could be optimized to select better values... */ OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3); OUT_CS(R300_PVS_FIRST_INST(0) | - R300_PVS_XYZW_VALID_INST(vs->instruction_count - 1) | - R300_PVS_LAST_INST(vs->instruction_count - 1)); - OUT_CS(R300_PVS_MAX_CONST_ADDR(constants->count - 1)); - OUT_CS(vs->instruction_count - 1); + R300_PVS_XYZW_VALID_INST(instruction_count - 1) | + R300_PVS_LAST_INST(instruction_count - 1)); + OUT_CS(R300_PVS_MAX_CONST_ADDR(code->constants.Count - 1)); + OUT_CS(instruction_count - 1); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0); - OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, vs->instruction_count * 4); - for (i = 0; i < vs->instruction_count; i++) { - OUT_CS(vs->instructions[i].inst0); - OUT_CS(vs->instructions[i].inst1); - OUT_CS(vs->instructions[i].inst2); - OUT_CS(vs->instructions[i].inst3); - } + OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length); + for (i = 0; i < code->length; i++) + OUT_CS(code->body.d[i]); - if (constants->count) { + if (code->constants.Count) { OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, (r300screen->caps->is_r500 ? R500_PVS_CONST_START : R300_PVS_CONST_START)); - OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, constants->count * 4); - for (i = 0; i < constants->count; i++) { - OUT_CS_32F(constants->constants[i][0]); - OUT_CS_32F(constants->constants[i][1]); - OUT_CS_32F(constants->constants[i][2]); - OUT_CS_32F(constants->constants[i][3]); + OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->constants.Count * 4); + for (i = 0; i < code->constants.Count; i++) { + const float * data = get_shader_constant(r300, &code->constants.Constants[i], constants); + OUT_CS_32F(data[0]); + OUT_CS_32F(data[1]); + OUT_CS_32F(data[2]); + OUT_CS_32F(data[3]); } } @@ -443,6 +462,12 @@ void r300_emit_vertex_shader(struct r300_context* r300, END_CS; } +void r300_emit_vertex_shader(struct r300_context* r300, + struct r300_vertex_shader* vs) +{ + r300_emit_vertex_program_code(r300, &vs->code, &r300->shader_constants[PIPE_SHADER_VERTEX]); +} + void r300_emit_viewport_state(struct r300_context* r300, struct r300_viewport_state* viewport) { diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index fda26f3948..fbc6487aa2 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -30,6 +30,8 @@ #include "r300_screen.h" #include "r300_state_inlines.h" +struct r300_vertex_program_code; + void r300_emit_blend_state(struct r300_context* r300, struct r300_blend_state* blend); @@ -68,6 +70,10 @@ void r300_emit_vertex_buffer(struct r300_context* r300); void r300_emit_vertex_format_state(struct r300_context* r300); +void r300_emit_vertex_program_code(struct r300_context* r300, + struct r300_vertex_program_code* code, + struct r300_constant_buffer* constants); + void r300_emit_vertex_shader(struct r300_context* r300, struct r300_vertex_shader* vs); diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 162740f594..33f1d7e79f 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -688,6 +688,7 @@ static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) if (r300_screen(pipe->screen)->caps->has_tcl) { struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; + rc_constants_destroy(&vs->code.constants); draw_delete_vertex_shader(r300->draw, vs->draw); FREE(vs->state.tokens); FREE(shader); diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 2477b30822..5c67eb13ff 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -22,6 +22,8 @@ #include "r300_state_derived.h" +#include "r300_vs.h" + /* r300_state_derived: Various bits of state which are dependent upon * currently bound CSO data. */ diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 25168ce5e9..cf15333198 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -139,7 +139,7 @@ validate: /* Vertex shader setup */ if (caps->has_tcl) { - r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader); + r300_emit_vertex_program_code(r300, &r300_passthrough_vertex_shader, 0); } else { BEGIN_CS(4); OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS); @@ -277,7 +277,7 @@ validate: /* Vertex shader setup */ if (caps->has_tcl) { - r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader); + r300_emit_vertex_program_code(r300, &r300_passthrough_vertex_shader, 0); } else { BEGIN_CS(4); OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS); diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.c b/src/gallium/drivers/r300/r300_tgsi_to_rc.c new file mode 100644 index 0000000000..f530b23380 --- /dev/null +++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.c @@ -0,0 +1,299 @@ +/* + * Copyright 2009 Nicolai Hähnle + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_tgsi_to_rc.h" + +#include "radeon_compiler.h" +#include "radeon_program.h" + +#include "tgsi/tgsi_parse.h" +#include "tgsi/tgsi_scan.h" +#include "tgsi/tgsi_util.h" + + +static unsigned translate_opcode(unsigned opcode) +{ + switch(opcode) { + case TGSI_OPCODE_ARL: return OPCODE_ARL; + case TGSI_OPCODE_MOV: return OPCODE_MOV; + case TGSI_OPCODE_LIT: return OPCODE_LIT; + case TGSI_OPCODE_RCP: return OPCODE_RCP; + case TGSI_OPCODE_RSQ: return OPCODE_RSQ; + case TGSI_OPCODE_EXP: return OPCODE_EXP; + case TGSI_OPCODE_LOG: return OPCODE_LOG; + case TGSI_OPCODE_MUL: return OPCODE_MUL; + case TGSI_OPCODE_ADD: return OPCODE_ADD; + case TGSI_OPCODE_DP3: return OPCODE_DP3; + case TGSI_OPCODE_DP4: return OPCODE_DP4; + case TGSI_OPCODE_DST: return OPCODE_DST; + case TGSI_OPCODE_MIN: return OPCODE_MIN; + case TGSI_OPCODE_MAX: return OPCODE_MAX; + case TGSI_OPCODE_SLT: return OPCODE_SLT; + case TGSI_OPCODE_SGE: return OPCODE_SGE; + case TGSI_OPCODE_MAD: return OPCODE_MAD; + case TGSI_OPCODE_SUB: return OPCODE_SUB; + case TGSI_OPCODE_LRP: return OPCODE_LRP; + /* case TGSI_OPCODE_CND: return OPCODE_CND; */ + /* case TGSI_OPCODE_CND0: return OPCODE_CND0; */ + case TGSI_OPCODE_DP2A: return OPCODE_DP2A; + /* gap */ + case TGSI_OPCODE_FRC: return OPCODE_FRC; + /* case TGSI_OPCODE_CLAMP: return OPCODE_CLAMP; */ + case TGSI_OPCODE_FLR: return OPCODE_FLR; + /* case TGSI_OPCODE_ROUND: return OPCODE_ROUND; */ + case TGSI_OPCODE_EX2: return OPCODE_EX2; + case TGSI_OPCODE_LG2: return OPCODE_LG2; + case TGSI_OPCODE_POW: return OPCODE_POW; + case TGSI_OPCODE_XPD: return OPCODE_XPD; + /* gap */ + case TGSI_OPCODE_ABS: return OPCODE_ABS; + case TGSI_OPCODE_RCC: return OPCODE_RCC; + case TGSI_OPCODE_DPH: return OPCODE_DPH; + case TGSI_OPCODE_COS: return OPCODE_COS; + case TGSI_OPCODE_DDX: return OPCODE_DDX; + case TGSI_OPCODE_DDY: return OPCODE_DDY; + /* case TGSI_OPCODE_KILP: return OPCODE_KILP; */ + case TGSI_OPCODE_PK2H: return OPCODE_PK2H; + case TGSI_OPCODE_PK2US: return OPCODE_PK2US; + case TGSI_OPCODE_PK4B: return OPCODE_PK4B; + case TGSI_OPCODE_PK4UB: return OPCODE_PK4UB; + case TGSI_OPCODE_RFL: return OPCODE_RFL; + case TGSI_OPCODE_SEQ: return OPCODE_SEQ; + case TGSI_OPCODE_SFL: return OPCODE_SFL; + case TGSI_OPCODE_SGT: return OPCODE_SGT; + case TGSI_OPCODE_SIN: return OPCODE_SIN; + case TGSI_OPCODE_SLE: return OPCODE_SLE; + case TGSI_OPCODE_SNE: return OPCODE_SNE; + case TGSI_OPCODE_STR: return OPCODE_STR; + case TGSI_OPCODE_TEX: return OPCODE_TEX; + case TGSI_OPCODE_TXD: return OPCODE_TXD; + case TGSI_OPCODE_TXP: return OPCODE_TXP; + case TGSI_OPCODE_UP2H: return OPCODE_UP2H; + case TGSI_OPCODE_UP2US: return OPCODE_UP2US; + case TGSI_OPCODE_UP4B: return OPCODE_UP4B; + case TGSI_OPCODE_UP4UB: return OPCODE_UP4UB; + case TGSI_OPCODE_X2D: return OPCODE_X2D; + case TGSI_OPCODE_ARA: return OPCODE_ARA; + case TGSI_OPCODE_ARR: return OPCODE_ARR; + case TGSI_OPCODE_BRA: return OPCODE_BRA; + case TGSI_OPCODE_CAL: return OPCODE_CAL; + case TGSI_OPCODE_RET: return OPCODE_RET; + case TGSI_OPCODE_SSG: return OPCODE_SSG; + case TGSI_OPCODE_CMP: return OPCODE_CMP; + case TGSI_OPCODE_SCS: return OPCODE_SCS; + case TGSI_OPCODE_TXB: return OPCODE_TXB; + /* case TGSI_OPCODE_NRM: return OPCODE_NRM; */ + /* case TGSI_OPCODE_DIV: return OPCODE_DIV; */ + case TGSI_OPCODE_DP2: return OPCODE_DP2; + case TGSI_OPCODE_TXL: return OPCODE_TXL; + case TGSI_OPCODE_BRK: return OPCODE_BRK; + case TGSI_OPCODE_IF: return OPCODE_IF; + /* case TGSI_OPCODE_LOOP: return OPCODE_LOOP; */ + /* case TGSI_OPCODE_REP: return OPCODE_REP; */ + case TGSI_OPCODE_ELSE: return OPCODE_ELSE; + case TGSI_OPCODE_ENDIF: return OPCODE_ENDIF; + case TGSI_OPCODE_ENDLOOP: return OPCODE_ENDLOOP; + /* case TGSI_OPCODE_ENDREP: return OPCODE_ENDREP; */ + case TGSI_OPCODE_PUSHA: return OPCODE_PUSHA; + case TGSI_OPCODE_POPA: return OPCODE_POPA; + /* case TGSI_OPCODE_CEIL: return OPCODE_CEIL; */ + /* case TGSI_OPCODE_I2F: return OPCODE_I2F; */ + case TGSI_OPCODE_NOT: return OPCODE_NOT; + case TGSI_OPCODE_TRUNC: return OPCODE_TRUNC; + /* case TGSI_OPCODE_SHL: return OPCODE_SHL; */ + /* case TGSI_OPCODE_SHR: return OPCODE_SHR; */ + case TGSI_OPCODE_AND: return OPCODE_AND; + case TGSI_OPCODE_OR: return OPCODE_OR; + /* case TGSI_OPCODE_MOD: return OPCODE_MOD; */ + case TGSI_OPCODE_XOR: return OPCODE_XOR; + /* case TGSI_OPCODE_SAD: return OPCODE_SAD; */ + /* case TGSI_OPCODE_TXF: return OPCODE_TXF; */ + /* case TGSI_OPCODE_TXQ: return OPCODE_TXQ; */ + case TGSI_OPCODE_CONT: return OPCODE_CONT; + /* case TGSI_OPCODE_EMIT: return OPCODE_EMIT; */ + /* case TGSI_OPCODE_ENDPRIM: return OPCODE_ENDPRIM; */ + /* case TGSI_OPCODE_BGNLOOP2: return OPCODE_BGNLOOP2; */ + case TGSI_OPCODE_BGNSUB: return OPCODE_BGNSUB; + /* case TGSI_OPCODE_ENDLOOP2: return OPCODE_ENDLOOP2; */ + case TGSI_OPCODE_ENDSUB: return OPCODE_ENDSUB; + case TGSI_OPCODE_NOISE1: return OPCODE_NOISE1; + case TGSI_OPCODE_NOISE2: return OPCODE_NOISE2; + case TGSI_OPCODE_NOISE3: return OPCODE_NOISE3; + case TGSI_OPCODE_NOISE4: return OPCODE_NOISE4; + case TGSI_OPCODE_NOP: return OPCODE_NOP; + /* gap */ + case TGSI_OPCODE_NRM4: return OPCODE_NRM4; + /* case TGSI_OPCODE_CALLNZ: return OPCODE_CALLNZ; */ + /* case TGSI_OPCODE_IFC: return OPCODE_IFC; */ + /* case TGSI_OPCODE_BREAKC: return OPCODE_BREAKC; */ + case TGSI_OPCODE_KIL: return OPCODE_KIL; + case TGSI_OPCODE_END: return OPCODE_END; + case TGSI_OPCODE_SWZ: return OPCODE_SWZ; + } + + fprintf(stderr, "Unknown opcode: %i\n", opcode); + abort(); +} + +static unsigned translate_saturate(unsigned saturate) +{ + switch(saturate) { + case TGSI_SAT_NONE: return SATURATE_OFF; + case TGSI_SAT_ZERO_ONE: return SATURATE_ZERO_ONE; + case TGSI_SAT_MINUS_PLUS_ONE: return SATURATE_PLUS_MINUS_ONE; + } + + fprintf(stderr, "Unknown saturate mode: %i\n", saturate); + abort(); +} + +static unsigned translate_register_file(unsigned file) +{ + switch(file) { + case TGSI_FILE_CONSTANT: return PROGRAM_CONSTANT; + case TGSI_FILE_IMMEDIATE: return PROGRAM_CONSTANT; + case TGSI_FILE_INPUT: return PROGRAM_INPUT; + case TGSI_FILE_OUTPUT: return PROGRAM_OUTPUT; + case TGSI_FILE_TEMPORARY: return PROGRAM_TEMPORARY; + case TGSI_FILE_ADDRESS: return PROGRAM_ADDRESS; + } + + fprintf(stderr, "Unhandled register file: %i\n", file); + abort(); +} + +static int translate_register_index( + struct tgsi_to_rc * ttr, + unsigned file, + int index) +{ + if (file == TGSI_FILE_IMMEDIATE) + return ttr->immediate_offset + index; + + return index; +} + +static void transform_dstreg( + struct tgsi_to_rc * ttr, + struct prog_dst_register * dst, + struct tgsi_full_dst_register * src) +{ + dst->File = translate_register_file(src->DstRegister.File); + dst->Index = translate_register_index(ttr, src->DstRegister.File, src->DstRegister.Index); + dst->WriteMask = src->DstRegister.WriteMask; + dst->RelAddr = src->DstRegister.Indirect; +} + +static void transform_srcreg( + struct tgsi_to_rc * ttr, + struct prog_src_register * dst, + struct tgsi_full_src_register * src) +{ + dst->File = translate_register_file(src->SrcRegister.File); + dst->Index = translate_register_index(ttr, src->SrcRegister.File, src->SrcRegister.Index); + dst->RelAddr = src->SrcRegister.Indirect; + dst->Swizzle = tgsi_util_get_full_src_register_extswizzle(src, 0); + dst->Swizzle |= tgsi_util_get_full_src_register_extswizzle(src, 1) << 3; + dst->Swizzle |= tgsi_util_get_full_src_register_extswizzle(src, 2) << 6; + dst->Swizzle |= tgsi_util_get_full_src_register_extswizzle(src, 3) << 9; + dst->Abs = src->SrcRegisterExtMod.Absolute; + dst->Negate = + src->SrcRegisterExtSwz.NegateX | + (src->SrcRegisterExtSwz.NegateY << 1) | + (src->SrcRegisterExtSwz.NegateZ << 2) | + (src->SrcRegisterExtSwz.NegateW << 3); + dst->Negate ^= src->SrcRegister.Negate ? NEGATE_XYZW : 0; +} + +static void transform_instruction(struct tgsi_to_rc * ttr, struct tgsi_full_instruction * src) +{ + if (src->Instruction.Opcode == TGSI_OPCODE_END) + return; + + struct rc_instruction * dst = rc_insert_new_instruction(ttr->compiler, ttr->compiler->Program.Instructions.Prev); + int i; + + dst->I.Opcode = translate_opcode(src->Instruction.Opcode); + dst->I.SaturateMode = translate_saturate(src->Instruction.Saturate); + + if (src->Instruction.NumDstRegs) + transform_dstreg(ttr, &dst->I.DstReg, &src->FullDstRegisters[0]); + + for(i = 0; i < src->Instruction.NumSrcRegs; ++i) + transform_srcreg(ttr, &dst->I.SrcReg[i], &src->FullSrcRegisters[i]); + + /* TODO: Textures */ +} + +static void handle_immediate(struct tgsi_to_rc * ttr, struct tgsi_full_immediate * imm) +{ + struct rc_constant constant; + int i; + + constant.Type = RC_CONSTANT_IMMEDIATE; + constant.Size = 4; + for(i = 0; i < 4; ++i) + constant.u.Immediate[i] = imm->u[i].Float; + rc_constants_add(&ttr->compiler->Program.Constants, &constant); +} + +void r300_tgsi_to_rc(struct tgsi_to_rc * ttr, const struct tgsi_token * tokens) +{ + struct tgsi_parse_context parser; + int i; + + /* Allocate constants placeholders. + * + * Note: What if declared constants are not contiguous? */ + for(i = 0; i <= ttr->info->file_max[TGSI_FILE_CONSTANT]; ++i) { + struct rc_constant constant; + memset(&constant, 0, sizeof(constant)); + constant.Type = RC_CONSTANT_EXTERNAL; + constant.Size = 4; + constant.u.External = i; + rc_constants_add(&ttr->compiler->Program.Constants, &constant); + } + + ttr->immediate_offset = ttr->compiler->Program.Constants.Count; + + tgsi_parse_init(&parser, tokens); + + while (!tgsi_parse_end_of_tokens(&parser)) { + tgsi_parse_token(&parser); + + switch (parser.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_DECLARATION: + break; + case TGSI_TOKEN_TYPE_IMMEDIATE: + handle_immediate(ttr, &parser.FullToken.FullImmediate); + break; + case TGSI_TOKEN_TYPE_INSTRUCTION: + transform_instruction(ttr, &parser.FullToken.FullInstruction); + break; + } + } + + tgsi_parse_free(&parser); + + rc_calculate_inputs_outputs(ttr->compiler); +} + diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.h b/src/gallium/drivers/r300/r300_tgsi_to_rc.h new file mode 100644 index 0000000000..93e90ec6d2 --- /dev/null +++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.h @@ -0,0 +1,41 @@ +/* + * Copyright 2009 Nicolai Hähnle + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_TGSI_TO_RC_H +#define R300_TGSI_TO_RC_H + +struct radeon_compiler; + +struct tgsi_full_declaration; +struct tgsi_shader_info; +struct tgsi_token; + +struct tgsi_to_rc { + struct radeon_compiler * compiler; + const struct tgsi_shader_info * info; + + int immediate_offset; +}; + +void r300_tgsi_to_rc(struct tgsi_to_rc * ttr, const struct tgsi_token * tokens); + +#endif /* R300_TGSI_TO_RC_H */ diff --git a/src/gallium/drivers/r300/r300_vs.c b/src/gallium/drivers/r300/r300_vs.c index 741a1b6989..02dd7be7c4 100644 --- a/src/gallium/drivers/r300/r300_vs.c +++ b/src/gallium/drivers/r300/r300_vs.c @@ -22,393 +22,215 @@ #include "r300_vs.h" -static void r300_vs_declare(struct r300_vs_asm* assembler, - struct tgsi_full_declaration* decl) -{ - switch (decl->Declaration.File) { - case TGSI_FILE_INPUT: - break; - case TGSI_FILE_OUTPUT: - switch (decl->Semantic.SemanticName) { - case TGSI_SEMANTIC_POSITION: - assembler->tab[decl->DeclarationRange.First] = 0; - break; - case TGSI_SEMANTIC_COLOR: - assembler->tab[decl->DeclarationRange.First] = - (assembler->point_size ? 1 : 0) + - assembler->out_colors; - break; - case TGSI_SEMANTIC_FOG: - case TGSI_SEMANTIC_GENERIC: - /* XXX multiple? */ - assembler->tab[decl->DeclarationRange.First] = - (assembler->point_size ? 1 : 0) + - assembler->out_colors + - assembler->out_texcoords; - break; - case TGSI_SEMANTIC_PSIZE: - assembler->tab[decl->DeclarationRange.First] = 1; - break; - default: - debug_printf("r300: vs: Bad semantic declaration %d\n", - decl->Semantic.SemanticName); - break; - } - break; - case TGSI_FILE_CONSTANT: - break; - case TGSI_FILE_TEMPORARY: - assembler->temp_count++; - break; - default: - debug_printf("r300: vs: Bad file %d\n", decl->Declaration.File); - break; - } -} +#include "r300_context.h" +#include "r300_tgsi_to_rc.h" -static INLINE unsigned r300_vs_src_type(struct r300_vs_asm* assembler, - struct tgsi_src_register* src) -{ - switch (src->File) { - case TGSI_FILE_NULL: - case TGSI_FILE_INPUT: - /* Probably a zero or one swizzle */ - return R300_PVS_SRC_REG_INPUT; - case TGSI_FILE_TEMPORARY: - return R300_PVS_SRC_REG_TEMPORARY; - case TGSI_FILE_CONSTANT: - case TGSI_FILE_IMMEDIATE: - return R300_PVS_SRC_REG_CONSTANT; - default: - debug_printf("r300: vs: Unimplemented src type %d\n", src->File); - break; - } - return 0; -} +#include "tgsi/tgsi_dump.h" +#include "tgsi/tgsi_parse.h" -static INLINE unsigned r300_vs_src(struct r300_vs_asm* assembler, - struct tgsi_src_register* src) -{ - switch (src->File) { - case TGSI_FILE_NULL: - case TGSI_FILE_INPUT: - case TGSI_FILE_TEMPORARY: - case TGSI_FILE_CONSTANT: - return src->Index; - case TGSI_FILE_IMMEDIATE: - return src->Index + assembler->imm_offset; - default: - debug_printf("r300: vs: Unimplemented src type %d\n", src->File); - break; - } - return 0; -} +#include "radeon_compiler.h" -static INLINE unsigned r300_vs_dst_type(struct r300_vs_asm* assembler, - struct tgsi_dst_register* dst) -{ - switch (dst->File) { - case TGSI_FILE_TEMPORARY: - return R300_PVS_DST_REG_TEMPORARY; - case TGSI_FILE_OUTPUT: - return R300_PVS_DST_REG_OUT; - default: - debug_printf("r300: vs: Unimplemented dst type %d\n", dst->File); - break; - } - return 0; -} -static INLINE unsigned r300_vs_dst(struct r300_vs_asm* assembler, - struct tgsi_dst_register* dst) -{ - switch (dst->File) { - case TGSI_FILE_TEMPORARY: - return dst->Index; - case TGSI_FILE_OUTPUT: - return assembler->tab[dst->Index]; - default: - debug_printf("r300: vs: Unimplemented dst %d\n", dst->File); - break; - } - return 0; -} - -static uint32_t r300_vs_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_DP3: - case TGSI_OPCODE_DP4: - return R300_VE_DOT_PRODUCT; - case TGSI_OPCODE_MUL: - return R300_VE_MULTIPLY; - case TGSI_OPCODE_ADD: - case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SUB: - case TGSI_OPCODE_SWZ: - return R300_VE_ADD; - case TGSI_OPCODE_MAX: - return R300_VE_MAXIMUM; - case TGSI_OPCODE_SLT: - return R300_VE_SET_LESS_THAN; - case TGSI_OPCODE_RSQ: - return R300_PVS_DST_MATH_INST | R300_ME_RECIP_DX; - case TGSI_OPCODE_MAD: - return R300_PVS_DST_MACRO_INST | R300_PVS_MACRO_OP_2CLK_MADD; - default: - break; - } - return 0; -} - -static uint32_t r300_vs_swiz(struct tgsi_full_src_register* reg) -{ - if (reg->SrcRegister.Extended) { - return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | - reg->SrcRegisterExtSwz.ExtSwizzleX | - (reg->SrcRegisterExtSwz.ExtSwizzleY << 3) | - (reg->SrcRegisterExtSwz.ExtSwizzleZ << 6) | - (reg->SrcRegisterExtSwz.ExtSwizzleW << 9); - } else { - return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | - reg->SrcRegister.SwizzleX | - (reg->SrcRegister.SwizzleY << 3) | - (reg->SrcRegister.SwizzleZ << 6) | - (reg->SrcRegister.SwizzleW << 9); - } -} - -/* XXX icky icky icky icky */ -static uint32_t r300_vs_scalar_swiz(struct tgsi_full_src_register* reg) -{ - if (reg->SrcRegister.Extended) { - return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | - reg->SrcRegisterExtSwz.ExtSwizzleX | - (reg->SrcRegisterExtSwz.ExtSwizzleX << 3) | - (reg->SrcRegisterExtSwz.ExtSwizzleX << 6) | - (reg->SrcRegisterExtSwz.ExtSwizzleX << 9); - } else { - return (reg->SrcRegister.Negate ? (0xf << 12) : 0) | - reg->SrcRegister.SwizzleX | - (reg->SrcRegister.SwizzleX << 3) | - (reg->SrcRegister.SwizzleX << 6) | - (reg->SrcRegister.SwizzleX << 9); - } -} - -/* XXX scalar stupidity */ -static void r300_vs_emit_inst(struct r300_vertex_shader* vs, - struct r300_vs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst, - unsigned op, - unsigned count, - boolean is_scalar) -{ - int i = vs->instruction_count; - vs->instructions[i].inst0 = R300_PVS_DST_OPCODE(r300_vs_op(op)) | - R300_PVS_DST_REG_TYPE(r300_vs_dst_type(assembler, &dst->DstRegister)) | - R300_PVS_DST_OFFSET(r300_vs_dst(assembler, &dst->DstRegister)) | - R300_PVS_DST_WE(dst->DstRegister.WriteMask); - switch (count) { - case 3: - vs->instructions[i].inst3 = - R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, - &src[2].SrcRegister)) | - R300_PVS_SRC_OFFSET(r300_vs_src(assembler, - &src[2].SrcRegister)) | - R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[2])); - /* Fall through */ - case 2: - vs->instructions[i].inst2 = - R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, - &src[1].SrcRegister)) | - R300_PVS_SRC_OFFSET(r300_vs_src(assembler, - &src[1].SrcRegister)) | - R300_PVS_SRC_SWIZZLE(r300_vs_swiz(&src[1])); - /* Fall through */ - case 1: - vs->instructions[i].inst1 = - R300_PVS_SRC_REG_TYPE(r300_vs_src_type(assembler, - &src[0].SrcRegister)) | - R300_PVS_SRC_OFFSET(r300_vs_src(assembler, - &src[0].SrcRegister)) | - /* XXX the icky, it burns */ - R300_PVS_SRC_SWIZZLE(is_scalar ? r300_vs_scalar_swiz(&src[0]) - : r300_vs_swiz(&src[0])); - break; - } - vs->instruction_count++; -} - -static void r300_vs_instruction(struct r300_vertex_shader* vs, - struct r300_vs_asm* assembler, - struct tgsi_full_instruction* inst) -{ - switch (inst->Instruction.Opcode) { - case TGSI_OPCODE_RSQ: - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 1, TRUE); - break; - case TGSI_OPCODE_SUB: - inst->FullSrcRegisters[1].SrcRegister.Negate = - !inst->FullSrcRegisters[1].SrcRegister.Negate; - /* Fall through */ - case TGSI_OPCODE_ADD: - case TGSI_OPCODE_MUL: - case TGSI_OPCODE_MAX: - case TGSI_OPCODE_SLT: - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2, FALSE); - break; - case TGSI_OPCODE_DP3: - /* Set alpha swizzle to zero for src0 and src1 */ - if (!inst->FullSrcRegisters[0].SrcRegister.Extended) { - inst->FullSrcRegisters[0].SrcRegister.Extended = TRUE; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX = - inst->FullSrcRegisters[0].SrcRegister.SwizzleX; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleY = - inst->FullSrcRegisters[0].SrcRegister.SwizzleY; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleZ = - inst->FullSrcRegisters[0].SrcRegister.SwizzleZ; - } - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = - TGSI_EXTSWIZZLE_ZERO; - if (!inst->FullSrcRegisters[1].SrcRegister.Extended) { - inst->FullSrcRegisters[1].SrcRegister.Extended = TRUE; - inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleX = - inst->FullSrcRegisters[1].SrcRegister.SwizzleX; - inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleY = - inst->FullSrcRegisters[1].SrcRegister.SwizzleY; - inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleZ = - inst->FullSrcRegisters[1].SrcRegister.SwizzleZ; - } - inst->FullSrcRegisters[1].SrcRegisterExtSwz.ExtSwizzleW = - TGSI_EXTSWIZZLE_ZERO; - /* Fall through */ - case TGSI_OPCODE_DP4: - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2, FALSE); - break; - case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SWZ: - inst->FullSrcRegisters[1] = r300_constant_zero; - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 2, FALSE); - break; - case TGSI_OPCODE_MAD: - r300_vs_emit_inst(vs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, - 3, FALSE); - break; - case TGSI_OPCODE_END: - break; - default: - debug_printf("r300: vs: Bad opcode %d\n", - inst->Instruction.Opcode); - break; - } -} - -static void r300_vs_init(struct r300_vertex_shader* vs, - struct r300_vs_asm* assembler) +static void set_vertex_inputs_outputs(struct r300_vertex_program_compiler * c) { + struct r300_vertex_shader * vs = c->UserData; struct tgsi_shader_info* info = &vs->info; + boolean pointsize = false; + int out_colors = 0; + int colors = 0; + int out_generic = 0; + int generic = 0; int i; + /* Fill in the input mapping */ + for (i = 0; i < info->num_inputs; i++) + c->code->inputs[i] = i; + + /* Fill in the output mapping */ for (i = 0; i < info->num_outputs; i++) { switch (info->output_semantic_name[i]) { case TGSI_SEMANTIC_PSIZE: - assembler->point_size = TRUE; + pointsize = true; break; case TGSI_SEMANTIC_COLOR: - assembler->out_colors++; + out_colors++; break; case TGSI_SEMANTIC_FOG: case TGSI_SEMANTIC_GENERIC: - assembler->out_texcoords++; + out_generic++; break; } } - vs->instruction_count = 0; -} - -void r300_translate_vertex_shader(struct r300_context* r300, - struct r300_vertex_shader* vs) -{ struct tgsi_parse_context parser; - int i; - struct r300_constant_buffer* consts = - &r300->shader_constants[PIPE_SHADER_VERTEX]; - - struct r300_vs_asm* assembler = CALLOC_STRUCT(r300_vs_asm); - if (assembler == NULL) { - return; - } - - /* Init assembler. */ - r300_vs_init(vs, assembler); - - /* Setup starting offset for immediates. */ - assembler->imm_offset = consts->user_count; tgsi_parse_init(&parser, vs->state.tokens); while (!tgsi_parse_end_of_tokens(&parser)) { tgsi_parse_token(&parser); - /* This is seriously the lamest way to create fragment programs ever. - * I blame TGSI. */ - switch (parser.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_DECLARATION: - /* Allocated registers sitting at the beginning - * of the program. */ - r300_vs_declare(assembler, &parser.FullToken.FullDeclaration); + if (parser.FullToken.Token.Type != TGSI_TOKEN_TYPE_DECLARATION) + continue; + + struct tgsi_full_declaration * decl = &parser.FullToken.FullDeclaration; + + if (decl->Declaration.File != TGSI_FILE_OUTPUT) + continue; + + switch (decl->Semantic.SemanticName) { + case TGSI_SEMANTIC_POSITION: + c->code->outputs[decl->DeclarationRange.First] = 0; break; - case TGSI_TOKEN_TYPE_IMMEDIATE: - debug_printf("r300: Emitting immediate to constant buffer, " - "position %d\n", - assembler->imm_offset + assembler->imm_count); - /* I am not amused by the length of these. */ - for (i = 0; i < 4; i++) { - consts->constants[assembler->imm_offset + - assembler->imm_count][i] = - parser.FullToken.FullImmediate.u[i].Float; - } - assembler->imm_count++; + case TGSI_SEMANTIC_PSIZE: + c->code->outputs[decl->DeclarationRange.First] = 1; + break; + case TGSI_SEMANTIC_COLOR: + c->code->outputs[decl->DeclarationRange.First] = 1 + + (pointsize ? 1 : 0) + + colors++; + break; + case TGSI_SEMANTIC_FOG: + case TGSI_SEMANTIC_GENERIC: + c->code->outputs[decl->DeclarationRange.First] = 1 + + (pointsize ? 1 : 0) + + out_colors + + generic++; break; - case TGSI_TOKEN_TYPE_INSTRUCTION: - r300_vs_instruction(vs, assembler, - &parser.FullToken.FullInstruction); + default: + debug_printf("r300: vs: Bad semantic declaration %d\n", + decl->Semantic.SemanticName); break; } } - debug_printf("r300: vs: %d texs and %d colors, first free reg is %d\n", - assembler->tex_count, assembler->color_count, - assembler->tex_count + assembler->color_count); + tgsi_parse_free(&parser); +} - consts->count = consts->user_count + assembler->imm_count; - vs->uses_imms = assembler->imm_count; - debug_printf("r300: vs: %d total constants, " - "%d from user and %d from immediates\n", consts->count, - consts->user_count, assembler->imm_count); - debug_printf("r300: vs: tab: %d %d %d %d\n", assembler->tab[0], - assembler->tab[1], assembler->tab[2], assembler->tab[3]); +void r300_translate_vertex_shader(struct r300_context* r300, + struct r300_vertex_shader* vs) +{ + struct r300_vertex_program_compiler compiler; + struct tgsi_to_rc ttr; - tgsi_dump(vs->state.tokens, 0); - /* XXX finish r300 vertex shader dumper */ - r300_vs_dump(vs); + printf("translate_vertex_shader\n"); - tgsi_parse_free(&parser); - FREE(assembler); + /* Setup the compiler */ + rc_init(&compiler.Base); + + compiler.Base.Debug = 1; + compiler.code = &vs->code; + compiler.UserData = vs; + + if (compiler.Base.Debug) { + debug_printf("r300: Initial vertex program\n"); + tgsi_dump(vs->state.tokens, 0); + } + + /* Translate TGSI to our internal representation */ + ttr.compiler = &compiler.Base; + ttr.info = &vs->info; + + r300_tgsi_to_rc(&ttr, vs->state.tokens); + + compiler.RequiredOutputs = ~(~0 << vs->info.num_outputs); + compiler.SetHwInputOutput = &set_vertex_inputs_outputs; + + /* Invoke the compiler */ + r3xx_compile_vertex_program(&compiler); + if (compiler.Base.Error) { + /* Todo: Fail gracefully */ + fprintf(stderr, "r300 VP: Compiler error\n"); + abort(); + } /* And, finally... */ + rc_destroy(&compiler.Base); vs->translated = TRUE; } + + +/* XXX get these to r300_reg */ +#define R300_PVS_DST_OPCODE(x) ((x) << 0) +# define R300_VE_DOT_PRODUCT 1 +# define R300_VE_MULTIPLY 2 +# define R300_VE_ADD 3 +# define R300_VE_MAXIMUM 7 +# define R300_VE_SET_LESS_THAN 10 +#define R300_PVS_DST_MATH_INST (1 << 6) +# define R300_ME_RECIP_DX 6 +#define R300_PVS_DST_MACRO_INST (1 << 7) +# define R300_PVS_MACRO_OP_2CLK_MADD 0 +#define R300_PVS_DST_REG_TYPE(x) ((x) << 8) +# define R300_PVS_DST_REG_TEMPORARY 0 +# define R300_PVS_DST_REG_A0 1 +# define R300_PVS_DST_REG_OUT 2 +# define R300_PVS_DST_REG_OUT_REPL_X 3 +# define R300_PVS_DST_REG_ALT_TEMPORARY 4 +# define R300_PVS_DST_REG_INPUT 5 +#define R300_PVS_DST_OFFSET(x) ((x) << 13) +#define R300_PVS_DST_WE(x) ((x) << 20) +#define R300_PVS_DST_WE_XYZW (0xf << 20) + +#define R300_PVS_SRC_REG_TYPE(x) ((x) << 0) +# define R300_PVS_SRC_REG_TEMPORARY 0 +# define R300_PVS_SRC_REG_INPUT 1 +# define R300_PVS_SRC_REG_CONSTANT 2 +# define R300_PVS_SRC_REG_ALT_TEMPORARY 3 +#define R300_PVS_SRC_OFFSET(x) ((x) << 5) +#define R300_PVS_SRC_SWIZZLE(x) ((x) << 13) +# define R300_PVS_SRC_SELECT_X 0 +# define R300_PVS_SRC_SELECT_Y 1 +# define R300_PVS_SRC_SELECT_Z 2 +# define R300_PVS_SRC_SELECT_W 3 +# define R300_PVS_SRC_SELECT_FORCE_0 4 +# define R300_PVS_SRC_SELECT_FORCE_1 5 +# define R300_PVS_SRC_SWIZZLE_XYZW \ + ((R300_PVS_SRC_SELECT_X | (R300_PVS_SRC_SELECT_Y << 3) | \ + (R300_PVS_SRC_SELECT_Z << 6) | (R300_PVS_SRC_SELECT_W << 9)) << 13) +# define R300_PVS_SRC_SWIZZLE_ZERO \ + ((R300_PVS_SRC_SELECT_FORCE_0 | (R300_PVS_SRC_SELECT_FORCE_0 << 3) | \ + (R300_PVS_SRC_SELECT_FORCE_0 << 6) | \ + (R300_PVS_SRC_SELECT_FORCE_0 << 9)) << 13) +# define R300_PVS_SRC_SWIZZLE_ONE \ + ((R300_PVS_SRC_SELECT_FORCE_1 | (R300_PVS_SRC_SELECT_FORCE_1 << 3) | \ + (R300_PVS_SRC_SELECT_FORCE_1 << 6) | \ + (R300_PVS_SRC_SELECT_FORCE_1 << 9)) << 13) +#define R300_PVS_MODIFIER_X (1 << 25) +#define R300_PVS_MODIFIER_Y (1 << 26) +#define R300_PVS_MODIFIER_Z (1 << 27) +#define R300_PVS_MODIFIER_W (1 << 28) +#define R300_PVS_NEGATE_XYZW \ + (R300_PVS_MODIFIER_X | R300_PVS_MODIFIER_Y | \ + R300_PVS_MODIFIER_Z | R300_PVS_MODIFIER_W) + +struct r300_vertex_program_code r300_passthrough_vertex_shader = { + .length = 8, /* two instructions */ + + /* MOV out[0], in[0] */ + .body.d[0] = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(0) | R300_PVS_DST_WE_XYZW, + .body.d[1] = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | + R300_PVS_SRC_OFFSET(0) | R300_PVS_SRC_SWIZZLE_XYZW, + .body.d[2] = R300_PVS_SRC_SWIZZLE_ZERO, + .body.d[3] = 0x0, + + /* MOV out[1], in[1] */ + .body.d[4] = R300_PVS_DST_OPCODE(R300_VE_ADD) | + R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | + R300_PVS_DST_OFFSET(1) | R300_PVS_DST_WE_XYZW, + .body.d[5] = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | + R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, + .body.d[6] = R300_PVS_SRC_SWIZZLE_ZERO, + .body.d[7] = 0x0, + + .inputs[0] = 0, + .inputs[1] = 1, + .outputs[0] = 0, + .outputs[1] = 1, + + .InputsRead = 3, + .OutputsWritten = 3 +}; + diff --git a/src/gallium/drivers/r300/r300_vs.h b/src/gallium/drivers/r300/r300_vs.h index 165d717812..2a4ce315e3 100644 --- a/src/gallium/drivers/r300/r300_vs.h +++ b/src/gallium/drivers/r300/r300_vs.h @@ -23,134 +23,31 @@ #ifndef R300_VS_H #define R300_VS_H -#include "tgsi/tgsi_parse.h" -#include "tgsi/tgsi_dump.h" +#include "pipe/p_state.h" +#include "tgsi/tgsi_scan.h" -#include "r300_context.h" -#include "r300_debug.h" -#include "r300_reg.h" -#include "r300_screen.h" -#include "r300_shader_inlines.h" +#include "radeon_code.h" -/* XXX get these to r300_reg */ -#define R300_PVS_DST_OPCODE(x) ((x) << 0) -# define R300_VE_DOT_PRODUCT 1 -# define R300_VE_MULTIPLY 2 -# define R300_VE_ADD 3 -# define R300_VE_MAXIMUM 7 -# define R300_VE_SET_LESS_THAN 10 -#define R300_PVS_DST_MATH_INST (1 << 6) -# define R300_ME_RECIP_DX 6 -#define R300_PVS_DST_MACRO_INST (1 << 7) -# define R300_PVS_MACRO_OP_2CLK_MADD 0 -#define R300_PVS_DST_REG_TYPE(x) ((x) << 8) -# define R300_PVS_DST_REG_TEMPORARY 0 -# define R300_PVS_DST_REG_A0 1 -# define R300_PVS_DST_REG_OUT 2 -# define R300_PVS_DST_REG_OUT_REPL_X 3 -# define R300_PVS_DST_REG_ALT_TEMPORARY 4 -# define R300_PVS_DST_REG_INPUT 5 -#define R300_PVS_DST_OFFSET(x) ((x) << 13) -#define R300_PVS_DST_WE(x) ((x) << 20) -#define R300_PVS_DST_WE_XYZW (0xf << 20) +struct r300_context; -#define R300_PVS_SRC_REG_TYPE(x) ((x) << 0) -# define R300_PVS_SRC_REG_TEMPORARY 0 -# define R300_PVS_SRC_REG_INPUT 1 -# define R300_PVS_SRC_REG_CONSTANT 2 -# define R300_PVS_SRC_REG_ALT_TEMPORARY 3 -#define R300_PVS_SRC_OFFSET(x) ((x) << 5) -#define R300_PVS_SRC_SWIZZLE(x) ((x) << 13) -# define R300_PVS_SRC_SELECT_X 0 -# define R300_PVS_SRC_SELECT_Y 1 -# define R300_PVS_SRC_SELECT_Z 2 -# define R300_PVS_SRC_SELECT_W 3 -# define R300_PVS_SRC_SELECT_FORCE_0 4 -# define R300_PVS_SRC_SELECT_FORCE_1 5 -# define R300_PVS_SRC_SWIZZLE_XYZW \ - ((R300_PVS_SRC_SELECT_X | (R300_PVS_SRC_SELECT_Y << 3) | \ - (R300_PVS_SRC_SELECT_Z << 6) | (R300_PVS_SRC_SELECT_W << 9)) << 13) -# define R300_PVS_SRC_SWIZZLE_ZERO \ - ((R300_PVS_SRC_SELECT_FORCE_0 | (R300_PVS_SRC_SELECT_FORCE_0 << 3) | \ - (R300_PVS_SRC_SELECT_FORCE_0 << 6) | \ - (R300_PVS_SRC_SELECT_FORCE_0 << 9)) << 13) -# define R300_PVS_SRC_SWIZZLE_ONE \ - ((R300_PVS_SRC_SELECT_FORCE_1 | (R300_PVS_SRC_SELECT_FORCE_1 << 3) | \ - (R300_PVS_SRC_SELECT_FORCE_1 << 6) | \ - (R300_PVS_SRC_SELECT_FORCE_1 << 9)) << 13) -#define R300_PVS_MODIFIER_X (1 << 25) -#define R300_PVS_MODIFIER_Y (1 << 26) -#define R300_PVS_MODIFIER_Z (1 << 27) -#define R300_PVS_MODIFIER_W (1 << 28) -#define R300_PVS_NEGATE_XYZW \ - (R300_PVS_MODIFIER_X | R300_PVS_MODIFIER_Y | \ - R300_PVS_MODIFIER_Z | R300_PVS_MODIFIER_W) +struct r300_vertex_shader { + /* Parent class */ + struct pipe_shader_state state; + struct tgsi_shader_info info; -/* Temporary struct used to hold assembly state while putting together - * fragment programs. */ -struct r300_vs_asm { - /* Pipe context. */ - struct r300_context* r300; - /* Number of colors. */ - unsigned color_count; - /* Number of texcoords. */ - unsigned tex_count; - /* Number of requested temporary registers. */ - unsigned temp_count; - /* Offset for immediate constants. Neither R300 nor R500 can do four - * inline constants per source, so instead we copy immediates into the - * constant buffer. */ - unsigned imm_offset; - /* Number of immediate constants. */ - unsigned imm_count; - /* Number of colors to write. */ - unsigned out_colors; - /* Number of texcoords to write. */ - unsigned out_texcoords; - /* Whether to emit point size. */ - boolean point_size; - /* Tab of declared outputs to OVM outputs. */ - unsigned tab[16]; -}; + /* Fallback shader, because Draw has issues */ + struct draw_vertex_shader* draw; -static struct r300_vertex_shader r300_passthrough_vertex_shader = { - /* XXX translate these back into normal instructions */ - .instruction_count = 2, - .instructions[0].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | - R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | - R300_PVS_DST_OFFSET(0) | R300_PVS_DST_WE_XYZW, - .instructions[0].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | - R300_PVS_SRC_OFFSET(0) | R300_PVS_SRC_SWIZZLE_XYZW, - .instructions[0].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, - .instructions[0].inst3 = 0x0, - .instructions[1].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | - R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | - R300_PVS_DST_OFFSET(1) | R300_PVS_DST_WE_XYZW, - .instructions[1].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | - R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, - .instructions[1].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, - .instructions[1].inst3 = 0x0, -}; + /* Has this shader been translated yet? */ + boolean translated; -static struct r300_vertex_shader r300_texture_vertex_shader = { - /* XXX translate these back into normal instructions */ - .instruction_count = 2, - .instructions[0].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | - R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | - R300_PVS_DST_OFFSET(0) | R300_PVS_DST_WE_XYZW, - .instructions[0].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | - R300_PVS_SRC_OFFSET(0) | R300_PVS_SRC_SWIZZLE_XYZW, - .instructions[0].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, - .instructions[0].inst3 = 0x0, - .instructions[1].inst0 = R300_PVS_DST_OPCODE(R300_VE_ADD) | - R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) | - R300_PVS_DST_OFFSET(1) | R300_PVS_DST_WE_XYZW, - .instructions[1].inst1 = R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) | - R300_PVS_SRC_OFFSET(1) | R300_PVS_SRC_SWIZZLE_XYZW, - .instructions[1].inst2 = R300_PVS_SRC_SWIZZLE_ZERO, - .instructions[1].inst3 = 0x0, + /* Machine code (if translated) */ + struct r300_vertex_program_code code; }; + +extern struct r300_vertex_program_code r300_passthrough_vertex_shader; + void r300_translate_vertex_shader(struct r300_context* r300, struct r300_vertex_shader* vs); diff --git a/src/gallium/drivers/r300/r3xx_fs.h b/src/gallium/drivers/r300/r3xx_fs.h index 3da39ec252..592898d899 100644 --- a/src/gallium/drivers/r300/r3xx_fs.h +++ b/src/gallium/drivers/r300/r3xx_fs.h @@ -66,6 +66,8 @@ static struct r3xx_fragment_shader r3xx_texture_fragment_shader = { R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, }; +struct r300_fs_asm; + void r3xx_fs_finalize(struct r300_fragment_shader* fs, struct r300_fs_asm* assembler); diff --git a/src/gallium/drivers/r300/r5xx_fs.h b/src/gallium/drivers/r300/r5xx_fs.h index 629e587be4..7e62c3352b 100644 --- a/src/gallium/drivers/r300/r5xx_fs.h +++ b/src/gallium/drivers/r300/r5xx_fs.h @@ -122,6 +122,8 @@ static struct r5xx_fragment_shader r5xx_texture_fragment_shader = { R500_ALU_RGBA_A_SWIZ_0, }; +struct r300_fs_asm; + void r5xx_fs_finalize(struct r5xx_fragment_shader* fs, struct r300_fs_asm* assembler); -- cgit v1.2.3 From fbc88a7334c9567b623572b60267c747a9baa0fb Mon Sep 17 00:00:00 2001 From: Nicolai Hähnle Date: Wed, 29 Jul 2009 19:22:56 +0200 Subject: r300g: Remove extraneous printf MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Nicolai Hähnle --- src/gallium/drivers/r300/r300_vs.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_vs.c b/src/gallium/drivers/r300/r300_vs.c index 02dd7be7c4..2cb903bba2 100644 --- a/src/gallium/drivers/r300/r300_vs.c +++ b/src/gallium/drivers/r300/r300_vs.c @@ -113,8 +113,6 @@ void r300_translate_vertex_shader(struct r300_context* r300, struct r300_vertex_program_compiler compiler; struct tgsi_to_rc ttr; - printf("translate_vertex_shader\n"); - /* Setup the compiler */ rc_init(&compiler.Base); -- cgit v1.2.3 From d0c398a8e2985b855f923aec3470cef8734a622a Mon Sep 17 00:00:00 2001 From: Nicolai Hähnle Date: Thu, 30 Jul 2009 23:45:34 +0200 Subject: r300g: Use radeon compiler for fragment programs This is entirely untested on R500, and needs more testing on R300. --- src/gallium/drivers/r300/Makefile | 1 - src/gallium/drivers/r300/r300_context.h | 60 +-- src/gallium/drivers/r300/r300_debug.c | 228 ----------- src/gallium/drivers/r300/r300_debug.h | 35 -- src/gallium/drivers/r300/r300_emit.c | 216 +++++++---- src/gallium/drivers/r300/r300_emit.h | 11 +- src/gallium/drivers/r300/r300_fs.c | 162 ++++---- src/gallium/drivers/r300/r300_fs.h | 15 + src/gallium/drivers/r300/r300_fs_inlines.h | 158 -------- src/gallium/drivers/r300/r300_state.c | 23 +- src/gallium/drivers/r300/r300_state_derived.c | 1 + src/gallium/drivers/r300/r300_surface.c | 8 +- src/gallium/drivers/r300/r300_tgsi_to_rc.c | 44 ++- src/gallium/drivers/r300/r3xx_fs.c | 100 ++--- src/gallium/drivers/r300/r3xx_fs.h | 52 +-- src/gallium/drivers/r300/r5xx_fs.c | 540 +++++--------------------- src/gallium/drivers/r300/r5xx_fs.h | 108 +----- 17 files changed, 450 insertions(+), 1312 deletions(-) delete mode 100644 src/gallium/drivers/r300/r300_debug.c delete mode 100644 src/gallium/drivers/r300/r300_debug.h delete mode 100644 src/gallium/drivers/r300/r300_fs_inlines.h (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 93c2152edc..d7a2c8c462 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -9,7 +9,6 @@ C_SOURCES = \ r300_chipset.c \ r300_clear.c \ r300_context.c \ - r300_debug.c \ r300_emit.c \ r300_flush.c \ r300_fs.c \ diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index c1ef64e4ee..6984225967 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -34,6 +34,7 @@ #include "r300_screen.h" #include "r300_winsys.h" +struct r300_fragment_shader; struct r300_vertex_shader; struct r300_blend_state { @@ -151,65 +152,6 @@ struct r300_constant_buffer { unsigned count; }; -struct r300_fragment_shader { - /* Parent class */ - struct pipe_shader_state state; - struct tgsi_shader_info info; - - /* Has this shader been translated yet? */ - boolean translated; - - /* Pixel stack size */ - int stack_size; - - /* Are there immediates in this shader? - * If not, we can heavily optimize recompilation. */ - boolean uses_imms; -}; - -struct r3xx_fragment_shader { - /* Parent class */ - struct r300_fragment_shader shader; - - /* Number of ALU instructions */ - int alu_instruction_count; - - /* Number of texture instructions */ - int tex_instruction_count; - - /* Number of texture indirections */ - int indirections; - - /* Indirection node offsets */ - int alu_offset[4]; - - /* Machine instructions */ - struct { - uint32_t alu_rgb_inst; - uint32_t alu_rgb_addr; - uint32_t alu_alpha_inst; - uint32_t alu_alpha_addr; - } instructions[64]; /* XXX magic num */ -}; - -struct r5xx_fragment_shader { - /* Parent class */ - struct r300_fragment_shader shader; - - /* Number of used instructions */ - int instruction_count; - - /* Machine instructions */ - struct { - uint32_t inst0; - uint32_t inst1; - uint32_t inst2; - uint32_t inst3; - uint32_t inst4; - uint32_t inst5; - } instructions[256]; /*< XXX magic number */ -}; - struct r300_texture { /* Parent class */ struct pipe_texture tex; diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c deleted file mode 100644 index aae8a4fbde..0000000000 --- a/src/gallium/drivers/r300/r300_debug.c +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Copyright 2009 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#include "r300_debug.h" - - -static char* r5xx_fs_swiz[] = { - " R", - " G", - " B", - " A", - " 0", - ".5", - " 1", - " U", -}; - -static char* r5xx_fs_op_rgb[] = { - "MAD", - "DP3", - "DP4", - "D2A", - "MIN", - "MAX", - "---", - "CND", - "CMP", - "FRC", - "SOP", - "MDH", - "MDV", -}; - -static char* r5xx_fs_op_alpha[] = { - "MAD", - " DP", - "MIN", - "MAX", - "---", - "CND", - "CMP", - "FRC", - "EX2", - "LN2", - "RCP", - "RSQ", - "SIN", - "COS", - "MDH", - "MDV", -}; - -static char* r5xx_fs_mask[] = { - "NONE", - "R ", - " G ", - "RG ", - " B ", - "R B ", - " GB ", - "RGB ", - " A", - "R A", - " G A", - "RG A", - " BA", - "R BA", - " GBA", - "RGBA", -}; - -static char* r5xx_fs_tex[] = { - " NOP", - " LD", - "TEXKILL", - " PROJ", - "LODBIAS", - " LOD", - " DXDY", -}; - - -void r3xx_dump_fs(struct r3xx_fragment_shader* fs) -{ - int i; - - for (i = 0; i < fs->alu_instruction_count; i++) { - } -} - -void r5xx_fs_dump(struct r5xx_fragment_shader* fs) -{ - int i; - uint32_t inst; - - for (i = 0; i < fs->instruction_count; i++) { - inst = fs->instructions[i].inst0; - debug_printf("%d: 0: CMN_INST 0x%08x:", i, inst); - switch (inst & 0x3) { - case R500_INST_TYPE_ALU: - debug_printf("ALU "); - break; - case R500_INST_TYPE_OUT: - debug_printf("OUT "); - break; - case R500_INST_TYPE_FC: - debug_printf("FC "); - break; - case R500_INST_TYPE_TEX: - debug_printf("TEX "); - break; - } - debug_printf("%s %s %s %s ", - inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "", - inst & R500_INST_LAST ? "LAST" : "", - inst & R500_INST_NOP ? "NOP" : "", - inst & R500_INST_ALU_WAIT ? "ALU_WAIT" : ""); - debug_printf("wmask: %s omask: %s\n", - r5xx_fs_mask[(inst >> 11) & 0xf], - r5xx_fs_mask[(inst >> 15) & 0xf]); - switch (inst & 0x3) { - case R500_INST_TYPE_ALU: - case R500_INST_TYPE_OUT: - inst = fs->instructions[i].inst1; - debug_printf(" 1: RGB_ADDR 0x%08x:", inst); - debug_printf("Addr0: %d%c, Addr1: %d%c, " - "Addr2: %d%c, srcp:%d\n", - inst & 0xff, (inst & (1 << 8)) ? 'c' : 't', - (inst >> 10) & 0xff, (inst & (1 << 18)) ? 'c' : 't', - (inst >> 20) & 0xff, (inst & (1 << 28)) ? 'c' : 't', - (inst >> 30)); - - inst = fs->instructions[i].inst2; - debug_printf(" 2: ALPHA_ADDR 0x%08x:", inst); - debug_printf("Addr0: %d%c, Addr1: %d%c, " - "Addr2: %d%c, srcp:%d\n", - inst & 0xff, (inst & (1 << 8)) ? 'c' : 't', - (inst >> 10) & 0xff, (inst & (1 << 18)) ? 'c' : 't', - (inst >> 20) & 0xff, (inst & (1 << 28)) ? 'c' : 't', - (inst >> 30)); - - inst = fs->instructions[i].inst3; - debug_printf(" 3: RGB_INST 0x%08x:", inst); - debug_printf("rgb_A_src:%d %s/%s/%s %d " - "rgb_B_src:%d %s/%s/%s %d\n", - inst & 0x3, r5xx_fs_swiz[(inst >> 2) & 0x7], - r5xx_fs_swiz[(inst >> 5) & 0x7], - r5xx_fs_swiz[(inst >> 8) & 0x7], - (inst >> 11) & 0x3, (inst >> 13) & 0x3, - r5xx_fs_swiz[(inst >> 15) & 0x7], - r5xx_fs_swiz[(inst >> 18) & 0x7], - r5xx_fs_swiz[(inst >> 21) & 0x7], - (inst >> 24) & 0x3); - - inst = fs->instructions[i].inst4; - debug_printf(" 4: ALPHA_INST 0x%08x:", inst); - debug_printf("%s dest:%d%s alp_A_src:%d %s %d " - "alp_B_src:%d %s %d w:%d\n", - r5xx_fs_op_alpha[inst & 0xf], (inst >> 4) & 0x7f, - inst & (1<<11) ? "(rel)":"", (inst >> 12) & 0x3, - r5xx_fs_swiz[(inst >> 14) & 0x7], (inst >> 17) & 0x3, - (inst >> 19) & 0x3, r5xx_fs_swiz[(inst >> 21) & 0x7], - (inst >> 24) & 0x3, (inst >> 31) & 0x1); - - inst = fs->instructions[i].inst5; - debug_printf(" 5: RGBA_INST 0x%08x:", inst); - debug_printf("%s dest:%d%s rgb_C_src:%d %s/%s/%s %d " - "alp_C_src:%d %s %d\n", - r5xx_fs_op_rgb[inst & 0xf], (inst >> 4) & 0x7f, - inst & (1 << 11) ? "(rel)":"", (inst >> 12) & 0x3, - r5xx_fs_swiz[(inst >> 14) & 0x7], - r5xx_fs_swiz[(inst >> 17) & 0x7], - r5xx_fs_swiz[(inst >> 20) & 0x7], - (inst >> 23) & 0x3, (inst >> 25) & 0x3, - r5xx_fs_swiz[(inst >> 27) & 0x7], (inst >> 30) & 0x3); - break; - case R500_INST_TYPE_FC: - /* XXX don't even bother yet */ - break; - case R500_INST_TYPE_TEX: - inst = fs->instructions[i].inst1; - debug_printf(" 1: TEX_INST 0x%08x: id: %d " - "op:%s, %s, %s %s\n", - inst, (inst >> 16) & 0xf, - r5xx_fs_tex[(inst >> 22) & 0x7], - (inst & (1 << 25)) ? "ACQ" : "", - (inst & (1 << 26)) ? "IGNUNC" : "", - (inst & (1 << 27)) ? "UNSCALED" : "SCALED"); - - inst = fs->instructions[i].inst2; - debug_printf(" 2: TEX_ADDR 0x%08x: " - "src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", - inst, inst & 0x7f, inst & (1 << 7) ? "(rel)" : "", - r5xx_fs_swiz[(inst >> 8) & 0x3], - r5xx_fs_swiz[(inst >> 10) & 0x3], - r5xx_fs_swiz[(inst >> 12) & 0x3], - r5xx_fs_swiz[(inst >> 14) & 0x3], - (inst >> 16) & 0x7f, inst & (1 << 23) ? "(rel)" : "", - r5xx_fs_swiz[(inst >> 24) & 0x3], - r5xx_fs_swiz[(inst >> 26) & 0x3], - r5xx_fs_swiz[(inst >> 28) & 0x3], - r5xx_fs_swiz[(inst >> 30) & 0x3]); - - inst = fs->instructions[i].inst3; - debug_printf(" 3: TEX_DXDY 0x%08x\n", inst); - break; - } - } -} diff --git a/src/gallium/drivers/r300/r300_debug.h b/src/gallium/drivers/r300/r300_debug.h deleted file mode 100644 index c551bd548e..0000000000 --- a/src/gallium/drivers/r300/r300_debug.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright 2009 Corbin Simpson - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#ifndef R300_DEBUG_H -#define R300_DEBUG_H - -#include "r300_reg.h" -#include "r300_fs.h" -#include "r300_vs.h" - -void r5xx_fs_dump(struct r5xx_fragment_shader* fs); -void r3xx_dump_fs(struct r3xx_fragment_shader* fs); - -void r300_vs_dump(struct r300_vertex_shader* vs); - -#endif /* R300_DEBUG_H */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index e9ca4ac662..e0c38a06e4 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -24,6 +24,7 @@ #include "r300_emit.h" +#include "r300_fs.h" #include "r300_vs.h" void r300_emit_blend_state(struct r300_context* r300, @@ -111,73 +112,158 @@ void r300_emit_dsa_state(struct r300_context* r300, END_CS; } -void r300_emit_fragment_shader(struct r300_context* r300, - struct r3xx_fragment_shader* fs) +static const float * get_shader_constant( + struct r300_context * r300, + struct rc_constant * constant, + struct r300_constant_buffer * externals) +{ + static const float zero[4] = { 0.0, 0.0, 0.0, 0.0 }; + switch(constant->Type) { + case RC_CONSTANT_EXTERNAL: + return externals->constants[constant->u.External]; + + case RC_CONSTANT_IMMEDIATE: + return constant->u.Immediate; + + default: + debug_printf("r300: Implementation error: Unhandled constant type %i\n", + constant->Type); + return zero; + } +} + +/* Convert a normal single-precision float into the 7.16 format + * used by the R300 fragment shader. + */ +static uint32_t pack_float24(float f) +{ + union { + float fl; + uint32_t u; + } u; + float mantissa; + int exponent; + uint32_t float24 = 0; + + if (f == 0.0) + return 0; + + u.fl = f; + + mantissa = frexpf(f, &exponent); + + /* Handle -ve */ + if (mantissa < 0) { + float24 |= (1 << 23); + mantissa = mantissa * -1.0; + } + /* Handle exponent, bias of 63 */ + exponent += 62; + float24 |= (exponent << 16); + /* Kill 7 LSB of mantissa */ + float24 |= (u.u & 0x7FFFFF) >> 7; + + return float24; +} + +void r300_emit_fragment_program_code(struct r300_context* r300, + struct rX00_fragment_program_code* generic_code, + struct r300_constant_buffer* externals) { + struct r300_fragment_program_code * code = &generic_code->code.r300; + struct rc_constant_list * constants = &generic_code->constants; int i; CS_LOCALS(r300); - BEGIN_CS(22); - - OUT_CS_REG(R300_US_CONFIG, fs->indirections); - OUT_CS_REG(R300_US_PIXSIZE, fs->shader.stack_size); - /* XXX figure out exactly how big the sizes are on this reg */ - OUT_CS_REG(R300_US_CODE_OFFSET, 0x40); - /* XXX figure these ones out a bit better kthnx */ - OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0); - OUT_CS_REG(R300_US_CODE_ADDR_3, 0x40 | R300_RGBA_OUT); - - for (i = 0; i < fs->alu_instruction_count; i++) { - OUT_CS_REG(R300_US_ALU_RGB_INST_0 + (4 * i), - fs->instructions[i].alu_rgb_inst); - OUT_CS_REG(R300_US_ALU_RGB_ADDR_0 + (4 * i), - fs->instructions[i].alu_rgb_addr); - OUT_CS_REG(R300_US_ALU_ALPHA_INST_0 + (4 * i), - fs->instructions[i].alu_alpha_inst); - OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0 + (4 * i), - fs->instructions[i].alu_alpha_addr); + BEGIN_CS(15 + + code->alu.length * 4 + + (code->tex.length ? (1 + code->tex.length) : 0) + + (constants->Count ? (1 + constants->Count * 4) : 0)); + + OUT_CS_REG(R300_US_CONFIG, code->config); + OUT_CS_REG(R300_US_PIXSIZE, code->pixsize); + OUT_CS_REG(R300_US_CODE_OFFSET, code->code_offset); + + OUT_CS_REG_SEQ(R300_US_CODE_ADDR_0, 4); + for(i = 0; i < 4; ++i) + OUT_CS(code->code_addr[i]); + + OUT_CS_REG_SEQ(R300_US_ALU_RGB_INST_0, code->alu.length); + for (i = 0; i < code->alu.length; i++) + OUT_CS(code->alu.inst[i].rgb_inst); + + OUT_CS_REG_SEQ(R300_US_ALU_RGB_ADDR_0, code->alu.length); + for (i = 0; i < code->alu.length; i++) + OUT_CS(code->alu.inst[i].rgb_addr); + + OUT_CS_REG_SEQ(R300_US_ALU_ALPHA_INST_0, code->alu.length); + for (i = 0; i < code->alu.length; i++) + OUT_CS(code->alu.inst[i].alpha_inst); + + OUT_CS_REG_SEQ(R300_US_ALU_ALPHA_ADDR_0, code->alu.length); + for (i = 0; i < code->alu.length; i++) + OUT_CS(code->alu.inst[i].alpha_addr); + + if (code->tex.length) { + OUT_CS_REG_SEQ(R300_US_TEX_INST_0, code->tex.length); + for(i = 0; i < code->tex.length; ++i) + OUT_CS(code->tex.inst[i]); + } + + if (constants->Count) { + OUT_CS_ONE_REG(R300_PFS_PARAM_0_X, constants->Count * 4); + for(i = 0; i < constants->Count; ++i) { + const float * data = get_shader_constant(r300, &constants->Constants[i], externals); + OUT_CS(pack_float24(data[0])); + OUT_CS(pack_float24(data[1])); + OUT_CS(pack_float24(data[2])); + OUT_CS(pack_float24(data[3])); + } } END_CS; } -void r500_emit_fragment_shader(struct r300_context* r300, - struct r5xx_fragment_shader* fs) +void r500_emit_fragment_program_code(struct r300_context* r300, + struct rX00_fragment_program_code* generic_code, + struct r300_constant_buffer* externals) { + struct r500_fragment_program_code * code = &generic_code->code.r500; + struct rc_constant_list * constants = &generic_code->constants; int i; - struct r300_constant_buffer* constants = - &r300->shader_constants[PIPE_SHADER_FRAGMENT]; CS_LOCALS(r300); - BEGIN_CS(9 + (fs->instruction_count * 6) + (constants->count ? 3 : 0) + - (constants->count * 4)); - OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); - OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size); - OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) | - R500_US_CODE_END_ADDR(fs->instruction_count)); + BEGIN_CS(13 + + ((code->inst_end + 1) * 6) + + (constants->Count ? (3 + (constants->Count * 4)) : 0)); + OUT_CS_REG(R500_US_CONFIG, 0); + OUT_CS_REG(R500_US_PIXSIZE, code->max_temp_idx); + OUT_CS_REG(R500_US_CODE_RANGE, + R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(code->inst_end)); + OUT_CS_REG(R500_US_CODE_OFFSET, 0); + OUT_CS_REG(R500_US_CODE_ADDR, + R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(code->inst_end)); OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR); - OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, fs->instruction_count * 6); - for (i = 0; i < fs->instruction_count; i++) { - OUT_CS(fs->instructions[i].inst0); - OUT_CS(fs->instructions[i].inst1); - OUT_CS(fs->instructions[i].inst2); - OUT_CS(fs->instructions[i].inst3); - OUT_CS(fs->instructions[i].inst4); - OUT_CS(fs->instructions[i].inst5); - } - - if (constants->count) { - OUT_CS_REG(R500_GA_US_VECTOR_INDEX, - R500_GA_US_VECTOR_INDEX_TYPE_CONST); - OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, constants->count * 4); - for (i = 0; i < constants->count; i++) { - OUT_CS_32F(constants->constants[i][0]); - OUT_CS_32F(constants->constants[i][1]); - OUT_CS_32F(constants->constants[i][2]); - OUT_CS_32F(constants->constants[i][3]); + OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, (code->inst_end + 1) * 6); + for (i = 0; i <= code->inst_end; i++) { + OUT_CS(code->inst[i].inst0); + OUT_CS(code->inst[i].inst1); + OUT_CS(code->inst[i].inst2); + OUT_CS(code->inst[i].inst3); + OUT_CS(code->inst[i].inst4); + OUT_CS(code->inst[i].inst5); + } + + if (constants->Count) { + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST); + OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, constants->Count * 4); + for (i = 0; i < constants->Count; i++) { + const float * data = get_shader_constant(r300, &constants->Constants[i], externals); + OUT_CS_32F(data[0]); + OUT_CS_32F(data[1]); + OUT_CS_32F(data[2]); + OUT_CS_32F(data[3]); } } @@ -382,26 +468,6 @@ void r300_emit_vertex_format_state(struct r300_context* r300) END_CS; } -static const float * get_shader_constant( - struct r300_context * r300, - struct rc_constant * constant, - struct r300_constant_buffer * externals) -{ - static const float zero[4] = { 0.0, 0.0, 0.0, 0.0 }; - switch(constant->Type) { - case RC_CONSTANT_EXTERNAL: - return externals->constants[constant->u.External]; - - case RC_CONSTANT_IMMEDIATE: - return constant->u.Immediate; - - default: - debug_printf("r300: Implementation error: Unhandled constant type %i\n", - constant->Type); - return zero; - } -} - void r300_emit_vertex_program_code(struct r300_context* r300, struct r300_vertex_program_code* code, struct r300_constant_buffer* constants) @@ -589,11 +655,9 @@ validate: if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) { if (r300screen->caps->is_r500) { - r500_emit_fragment_shader(r300, - (struct r5xx_fragment_shader*)r300->fs); + r500_emit_fragment_program_code(r300, &r300->fs->code, &r300->shader_constants[PIPE_SHADER_FRAGMENT]); } else { - r300_emit_fragment_shader(r300, - (struct r3xx_fragment_shader*)r300->fs); + r300_emit_fragment_program_code(r300, &r300->fs->code, &r300->shader_constants[PIPE_SHADER_FRAGMENT]); } r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER; } diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index fbc6487aa2..350691d592 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -30,6 +30,7 @@ #include "r300_screen.h" #include "r300_state_inlines.h" +struct rX00_fragment_program_code; struct r300_vertex_program_code; void r300_emit_blend_state(struct r300_context* r300, @@ -44,11 +45,13 @@ void r300_emit_clip_state(struct r300_context* r300, void r300_emit_dsa_state(struct r300_context* r300, struct r300_dsa_state* dsa); -void r300_emit_fragment_shader(struct r300_context* r300, - struct r3xx_fragment_shader* fs); +void r300_emit_fragment_program_code(struct r300_context* r300, + struct rX00_fragment_program_code* generic_code, + struct r300_constant_buffer* externals); -void r500_emit_fragment_shader(struct r300_context* r300, - struct r5xx_fragment_shader* fs); +void r500_emit_fragment_program_code(struct r300_context* r300, + struct rX00_fragment_program_code* generic_code, + struct r300_constant_buffer* externals); void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb); diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c index ca8ef99902..2cddb97038 100644 --- a/src/gallium/drivers/r300/r300_fs.c +++ b/src/gallium/drivers/r300/r300_fs.c @@ -23,89 +23,115 @@ #include "r300_fs.h" -void r300_translate_fragment_shader(struct r300_context* r300, - struct r300_fragment_shader* fs) -{ - struct tgsi_parse_context parser; - int i; - boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500; - struct r300_constant_buffer* consts = - &r300->shader_constants[PIPE_SHADER_FRAGMENT]; +#include "r300_tgsi_to_rc.h" - struct r300_fs_asm* assembler = CALLOC_STRUCT(r300_fs_asm); - if (assembler == NULL) { - return; - } - /* Setup starting offset for immediates. */ - assembler->imm_offset = consts->user_count; - /* Enable depth writes, if needed. */ - assembler->writes_depth = fs->info.writes_z; - - /* Make sure we start at the beginning of the shader. */ - if (is_r500) { - ((struct r5xx_fragment_shader*)fs)->instruction_count = 0; - } +#include "radeon_compiler.h" - tgsi_parse_init(&parser, fs->state.tokens); +static void find_output_registers(struct r300_fragment_program_compiler * compiler, + struct r300_fragment_shader * fs) +{ + unsigned i; - while (!tgsi_parse_end_of_tokens(&parser)) { - tgsi_parse_token(&parser); + /* Mark the outputs as not present initially */ + compiler->OutputColor = fs->info.num_outputs; + compiler->OutputDepth = fs->info.num_outputs; - /* This is seriously the lamest way to create fragment programs ever. - * I blame TGSI. */ - switch (parser.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_DECLARATION: - /* Allocated registers sitting at the beginning - * of the program. */ - r300_fs_declare(assembler, &parser.FullToken.FullDeclaration); + /* Now see where they really are. */ + for(i = 0; i < fs->info.num_outputs; ++i) { + switch(fs->info.output_semantic_name[i]) { + case TGSI_SEMANTIC_COLOR: + compiler->OutputColor = i; + break; + case TGSI_SEMANTIC_POSITION: + compiler->OutputDepth = i; break; - case TGSI_TOKEN_TYPE_IMMEDIATE: - debug_printf("r300: Emitting immediate to constant buffer, " - "position %d\n", - assembler->imm_offset + assembler->imm_count); - /* I am not amused by the length of these. */ - for (i = 0; i < 4; i++) { - consts->constants[assembler->imm_offset + - assembler->imm_count][i] = - parser.FullToken.FullImmediate.u[i].Float; - } - assembler->imm_count++; + } + } +} + +static void allocate_hardware_inputs( + struct r300_fragment_program_compiler * c, + void (*allocate)(void * data, unsigned input, unsigned hwreg), + void * mydata) +{ + struct tgsi_shader_info* info = &((struct r300_fragment_shader*)c->UserData)->info; + int total_colors = 0; + int colors = 0; + int total_generic = 0; + int generic = 0; + int i; + + for (i = 0; i < info->num_inputs; i++) { + switch (info->input_semantic_name[i]) { + case TGSI_SEMANTIC_COLOR: + total_colors++; break; - case TGSI_TOKEN_TYPE_INSTRUCTION: - if (is_r500) { - r5xx_fs_instruction((struct r5xx_fragment_shader*)fs, - assembler, &parser.FullToken.FullInstruction); - } else { - r3xx_fs_instruction((struct r3xx_fragment_shader*)fs, - assembler, &parser.FullToken.FullInstruction); - } + case TGSI_SEMANTIC_FOG: + case TGSI_SEMANTIC_GENERIC: + total_generic++; break; } } - debug_printf("r300: fs: %d texs and %d colors, first free reg is %d\n", - assembler->tex_count, assembler->color_count, - assembler->tex_count + assembler->color_count); - - consts->count = consts->user_count + assembler->imm_count; - fs->uses_imms = assembler->imm_count; - debug_printf("r300: fs: %d total constants, " - "%d from user and %d from immediates\n", consts->count, - consts->user_count, assembler->imm_count); - r3xx_fs_finalize(fs, assembler); - if (is_r500) { - r5xx_fs_finalize((struct r5xx_fragment_shader*)fs, assembler); + for(i = 0; i < info->num_inputs; i++) { + switch (info->input_semantic_name[i]) { + case TGSI_SEMANTIC_COLOR: + allocate(mydata, i, colors); + colors++; + break; + case TGSI_SEMANTIC_FOG: + case TGSI_SEMANTIC_GENERIC: + allocate(mydata, i, total_colors + generic); + generic++; + break; + } } +} + +void r300_translate_fragment_shader(struct r300_context* r300, + struct r300_fragment_shader* fs) +{ + struct r300_fragment_program_compiler compiler; + struct tgsi_to_rc ttr; - tgsi_dump(fs->state.tokens, 0); - /* XXX finish r300 dumper too */ - if (is_r500) { - r5xx_fs_dump((struct r5xx_fragment_shader*)fs); + memset(&compiler, 0, sizeof(compiler)); + rc_init(&compiler.Base); + compiler.Base.Debug = 1; + + compiler.code = &fs->code; + compiler.is_r500 = r300_screen(r300->context.screen)->caps->is_r500; + compiler.AllocateHwInputs = &allocate_hardware_inputs; + compiler.UserData = fs; + + /* TODO: Program compilation depends on texture compare modes, + * which are sampler state. Therefore, programs need to be recompiled + * depending on this state as in the classic Mesa driver. + * + * This is not yet handled correctly. + */ + + find_output_registers(&compiler, fs); + + if (compiler.Base.Debug) { + debug_printf("r300: Initial vertex program\n"); + tgsi_dump(fs->state.tokens, 0); } - tgsi_parse_free(&parser); - FREE(assembler); + /* Translate TGSI to our internal representation */ + ttr.compiler = &compiler.Base; + ttr.info = &fs->info; + + r300_tgsi_to_rc(&ttr, fs->state.tokens); + + /* Invoke the compiler */ + r3xx_compile_fragment_program(&compiler); + if (compiler.Base.Error) { + /* Todo: Fail gracefully */ + fprintf(stderr, "r300 FP: Compiler error\n"); + abort(); + } /* And, finally... */ + rc_destroy(&compiler.Base); fs->translated = TRUE; } diff --git a/src/gallium/drivers/r300/r300_fs.h b/src/gallium/drivers/r300/r300_fs.h index 18deb7a05e..9fab789402 100644 --- a/src/gallium/drivers/r300/r300_fs.h +++ b/src/gallium/drivers/r300/r300_fs.h @@ -30,6 +30,21 @@ #include "r3xx_fs.h" #include "r5xx_fs.h" +#include "radeon_code.h" + +struct r300_fragment_shader { + /* Parent class */ + struct pipe_shader_state state; + struct tgsi_shader_info info; + + /* Has this shader been translated yet? */ + boolean translated; + + /* Compiled code */ + struct rX00_fragment_program_code code; +}; + + void r300_translate_fragment_shader(struct r300_context* r300, struct r300_fragment_shader* fs); diff --git a/src/gallium/drivers/r300/r300_fs_inlines.h b/src/gallium/drivers/r300/r300_fs_inlines.h deleted file mode 100644 index be4be9465e..0000000000 --- a/src/gallium/drivers/r300/r300_fs_inlines.h +++ /dev/null @@ -1,158 +0,0 @@ -/* - * Copyright 2008 Corbin Simpson - * Joakim Sindholt - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#ifndef R300_FS_INLINES_H -#define R300_FS_INLINES_H - -#include "tgsi/tgsi_parse.h" - -#include "r300_context.h" -#include "r300_debug.h" -#include "r300_reg.h" -#include "r300_screen.h" -#include "r300_shader_inlines.h" - -/* Temporary struct used to hold assembly state while putting together - * fragment programs. */ -struct r300_fs_asm { - /* Pipe context. */ - struct r300_context* r300; - /* Number of colors. */ - unsigned color_count; - /* Number of texcoords. */ - unsigned tex_count; - /* Offset for temporary registers. Inputs and temporaries have no - * distinguishing markings, so inputs start at 0 and the first usable - * temporary register is after all inputs. */ - unsigned temp_offset; - /* Number of requested temporary registers. */ - unsigned temp_count; - /* Offset for immediate constants. Neither R300 nor R500 can do four - * inline constants per source, so instead we copy immediates into the - * constant buffer. */ - unsigned imm_offset; - /* Number of immediate constants. */ - unsigned imm_count; - /* Are depth writes enabled? */ - boolean writes_depth; - /* Depth write offset. This is the TGSI output that corresponds to - * depth writes. */ - unsigned depth_output; -}; - -static INLINE void r300_fs_declare(struct r300_fs_asm* assembler, - struct tgsi_full_declaration* decl) -{ - switch (decl->Declaration.File) { - case TGSI_FILE_INPUT: - switch (decl->Semantic.SemanticName) { - case TGSI_SEMANTIC_COLOR: - assembler->color_count++; - break; - case TGSI_SEMANTIC_FOG: - case TGSI_SEMANTIC_GENERIC: - assembler->tex_count++; - break; - default: - debug_printf("r300: fs: Bad semantic declaration %d\n", - decl->Semantic.SemanticName); - break; - } - break; - case TGSI_FILE_OUTPUT: - /* Depth write. Mark the position of the output so we can - * identify it later. */ - if (decl->Semantic.SemanticName == TGSI_SEMANTIC_POSITION) { - assembler->depth_output = decl->DeclarationRange.First; - } - break; - case TGSI_FILE_CONSTANT: - break; - case TGSI_FILE_TEMPORARY: - assembler->temp_count++; - break; - default: - debug_printf("r300: fs: Bad file %d\n", decl->Declaration.File); - break; - } - - assembler->temp_offset = assembler->color_count + assembler->tex_count; -} - -static INLINE unsigned r300_fs_src(struct r300_fs_asm* assembler, - struct tgsi_src_register* src) -{ - switch (src->File) { - case TGSI_FILE_NULL: - return 0; - case TGSI_FILE_INPUT: - /* XXX may be wrong */ - return src->Index; - break; - case TGSI_FILE_TEMPORARY: - return src->Index + assembler->temp_offset; - break; - case TGSI_FILE_IMMEDIATE: - return (src->Index + assembler->imm_offset) | (1 << 8); - break; - case TGSI_FILE_CONSTANT: - /* XXX magic */ - return src->Index | (1 << 8); - break; - default: - debug_printf("r300: fs: Unimplemented src %d\n", src->File); - break; - } - return 0; -} - -static INLINE unsigned r300_fs_dst(struct r300_fs_asm* assembler, - struct tgsi_dst_register* dst) -{ - switch (dst->File) { - case TGSI_FILE_NULL: - /* This happens during KIL instructions. */ - return 0; - break; - case TGSI_FILE_OUTPUT: - return 0; - break; - case TGSI_FILE_TEMPORARY: - return dst->Index + assembler->temp_offset; - break; - default: - debug_printf("r300: fs: Unimplemented dst %d\n", dst->File); - break; - } - return 0; -} - -static INLINE boolean r300_fs_is_depr(struct r300_fs_asm* assembler, - struct tgsi_dst_register* dst) -{ - return (assembler->writes_depth && - (dst->File == TGSI_FILE_OUTPUT) && - (dst->Index == assembler->depth_output)); -} - -#endif /* R300_FS_INLINES_H */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 33f1d7e79f..bb4b4be50f 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -32,6 +32,7 @@ #include "r300_reg.h" #include "r300_state_inlines.h" #include "r300_fs.h" +#include "r300_vs.h" /* r300_state: Functions used to intialize state context by translating * Gallium state objects into semi-native r300 state objects. */ @@ -155,20 +156,6 @@ static void } r300->dirty_state |= R300_NEW_CONSTANTS; -#if 0 - /* If the number of constants have changed, invalidate the shader. */ - if (r300->shader_constants[shader].user_count != i) { - if (shader == PIPE_SHADER_FRAGMENT && r300->fs && - r300->fs->uses_imms) { - r300->fs->translated = FALSE; - r300_translate_fragment_shader(r300, r300->fs); - } else if (shader == PIPE_SHADER_VERTEX && r300->vs && - r300->vs->uses_imms) { - r300->vs->translated = FALSE; - r300_translate_vertex_shader(r300, r300->vs); - } - } -#endif } /* Create a new depth, stencil, and alpha state based on the CSO dsa state. @@ -285,14 +272,9 @@ static void static void* r300_create_fs_state(struct pipe_context* pipe, const struct pipe_shader_state* shader) { - struct r300_context* r300 = r300_context(pipe); struct r300_fragment_shader* fs = NULL; - if (r300_screen(r300->context.screen)->caps->is_r500) { - fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r5xx_fragment_shader); - } else { - fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r3xx_fragment_shader); - } + fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); /* Copy state directly into shader. */ fs->state = *shader; @@ -325,6 +307,7 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) { struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; + rc_constants_destroy(&fs->code.constants); FREE(fs->state.tokens); FREE(shader); } diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 5c67eb13ff..ea670f41fb 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -22,6 +22,7 @@ #include "r300_state_derived.h" +#include "r300_fs.h" #include "r300_vs.h" /* r300_state_derived: Various bits of state which are dependent upon diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index cf15333198..7dbfb64dbe 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -152,10 +152,10 @@ validate: /* Fragment shader setup */ if (caps->is_r500) { - r500_emit_fragment_shader(r300, &r5xx_passthrough_fragment_shader); + r500_emit_fragment_program_code(r300, &r5xx_passthrough_fragment_shader, 0); r300_emit_rs_block_state(r300, &r5xx_rs_block_clear_state); } else { - r300_emit_fragment_shader(r300, &r3xx_passthrough_fragment_shader); + r300_emit_fragment_program_code(r300, &r3xx_passthrough_fragment_shader, 0); r300_emit_rs_block_state(r300, &r3xx_rs_block_clear_state); } @@ -290,10 +290,10 @@ validate: /* Fragment shader setup */ if (caps->is_r500) { - r500_emit_fragment_shader(r300, &r5xx_texture_fragment_shader); + r500_emit_fragment_program_code(r300, &r5xx_texture_fragment_shader, 0); r300_emit_rs_block_state(r300, &r5xx_rs_block_copy_state); } else { - r300_emit_fragment_shader(r300, &r3xx_texture_fragment_shader); + r300_emit_fragment_program_code(r300, &r3xx_texture_fragment_shader, 0); r300_emit_rs_block_state(r300, &r3xx_rs_block_copy_state); } diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.c b/src/gallium/drivers/r300/r300_tgsi_to_rc.c index f530b23380..3adbb715f3 100644 --- a/src/gallium/drivers/r300/r300_tgsi_to_rc.c +++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.c @@ -224,6 +224,39 @@ static void transform_srcreg( dst->Negate ^= src->SrcRegister.Negate ? NEGATE_XYZW : 0; } +static void transform_texture(struct rc_instruction * dst, struct tgsi_instruction_ext_texture src) +{ + switch(src.Texture) { + case TGSI_TEXTURE_1D: + dst->I.TexSrcTarget = TEXTURE_1D_INDEX; + break; + case TGSI_TEXTURE_2D: + dst->I.TexSrcTarget = TEXTURE_2D_INDEX; + break; + case TGSI_TEXTURE_3D: + dst->I.TexSrcTarget = TEXTURE_3D_INDEX; + break; + case TGSI_TEXTURE_CUBE: + dst->I.TexSrcTarget = TEXTURE_CUBE_INDEX; + break; + case TGSI_TEXTURE_RECT: + dst->I.TexSrcTarget = TEXTURE_RECT_INDEX; + break; + case TGSI_TEXTURE_SHADOW1D: + dst->I.TexSrcTarget = TEXTURE_1D_INDEX; + dst->I.TexShadow = 1; + break; + case TGSI_TEXTURE_SHADOW2D: + dst->I.TexSrcTarget = TEXTURE_2D_INDEX; + dst->I.TexShadow = 1; + break; + case TGSI_TEXTURE_SHADOWRECT: + dst->I.TexSrcTarget = TEXTURE_RECT_INDEX; + dst->I.TexShadow = 1; + break; + } +} + static void transform_instruction(struct tgsi_to_rc * ttr, struct tgsi_full_instruction * src) { if (src->Instruction.Opcode == TGSI_OPCODE_END) @@ -238,10 +271,15 @@ static void transform_instruction(struct tgsi_to_rc * ttr, struct tgsi_full_inst if (src->Instruction.NumDstRegs) transform_dstreg(ttr, &dst->I.DstReg, &src->FullDstRegisters[0]); - for(i = 0; i < src->Instruction.NumSrcRegs; ++i) - transform_srcreg(ttr, &dst->I.SrcReg[i], &src->FullSrcRegisters[i]); + for(i = 0; i < src->Instruction.NumSrcRegs; ++i) { + if (src->FullSrcRegisters[i].SrcRegister.File == TGSI_FILE_SAMPLER) + dst->I.TexSrcUnit = src->FullSrcRegisters[i].SrcRegister.Index; + else + transform_srcreg(ttr, &dst->I.SrcReg[i], &src->FullSrcRegisters[i]); + } - /* TODO: Textures */ + /* Texturing. */ + transform_texture(dst, src->InstructionExtTexture); } static void handle_immediate(struct tgsi_to_rc * ttr, struct tgsi_full_immediate * imm) diff --git a/src/gallium/drivers/r300/r3xx_fs.c b/src/gallium/drivers/r300/r3xx_fs.c index 6e05d76977..c1c1194d58 100644 --- a/src/gallium/drivers/r300/r3xx_fs.c +++ b/src/gallium/drivers/r300/r3xx_fs.c @@ -23,74 +23,52 @@ #include "r3xx_fs.h" -static INLINE uint32_t r3xx_rgb_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_MOV: - return R300_ALU_OUTC_CMP; - default: - return 0; - } -} +#include "r300_reg.h" -static INLINE uint32_t r3xx_alpha_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_MOV: - return R300_ALU_OUTA_CMP; - default: - return 0; - } -} +struct rX00_fragment_program_code r3xx_passthrough_fragment_shader = { + .code.r300.alu.length = 1, + .code.r300.tex.length = 0, -static INLINE void r3xx_emit_maths(struct r3xx_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst, - unsigned op, - unsigned count) -{ - int i = fs->alu_instruction_count; + .code.r300.config = 0, + .code.r300.pixsize = 0, + .code.r300.code_offset = 0, + .code.r300.code_addr[3] = R300_RGBA_OUT, - fs->instructions[i].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | + .code.r300.alu.inst[0].rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | - r3xx_rgb_op(op); - fs->instructions[i].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | - R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ; - fs->instructions[i].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | + R300_ALU_OUTC_CMP, + .code.r300.alu.inst[0].rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | + R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, + .code.r300.alu.inst[0].alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | - r3xx_alpha_op(op); - fs->instructions[i].alu_alpha_addr = R300_ALPHA_ADDR0(0) | - R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT; + R300_ALU_OUTA_CMP, + .code.r300.alu.inst[0].alpha_addr = R300_ALPHA_ADDR0(0) | + R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, +}; - fs->alu_instruction_count++; -} +struct rX00_fragment_program_code r3xx_texture_fragment_shader = { + .code.r300.alu.length = 1, + .code.r300.tex.length = 1, -void r3xx_fs_finalize(struct r300_fragment_shader* fs, - struct r300_fs_asm* assembler) -{ - fs->stack_size = assembler->temp_count + assembler->temp_offset + 1; -} + .code.r300.config = R300_PFS_CNTL_FIRST_NODE_HAS_TEX, + .code.r300.pixsize = 0, + .code.r300.code_offset = 0, + .code.r300.code_addr[3] = R300_RGBA_OUT, -void r3xx_fs_instruction(struct r3xx_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_instruction* inst) -{ - switch (inst->Instruction.Opcode) { - case TGSI_OPCODE_MOV: - /* src0 -> src1 and src2 forced to zero */ - inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; - inst->FullSrcRegisters[2] = r300_constant_zero; - r3xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - case TGSI_OPCODE_END: - break; - default: - debug_printf("r300: fs: Bad opcode %d\n", - inst->Instruction.Opcode); - break; - } -} + .code.r300.tex.inst[0] = R300_TEX_OP_LD << R300_TEX_INST_SHIFT, + + .code.r300.alu.inst[0].rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | + R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | + R300_ALU_OUTC_CMP, + .code.r300.alu.inst[0].rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | + R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, + .code.r300.alu.inst[0].alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | + R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | + R300_ALU_OUTA_CMP, + .code.r300.alu.inst[0].alpha_addr = R300_ALPHA_ADDR0(0) | + R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, +}; diff --git a/src/gallium/drivers/r300/r3xx_fs.h b/src/gallium/drivers/r300/r3xx_fs.h index 592898d899..51cd245724 100644 --- a/src/gallium/drivers/r300/r3xx_fs.h +++ b/src/gallium/drivers/r300/r3xx_fs.h @@ -24,55 +24,9 @@ #ifndef R3XX_FS_H #define R3XX_FS_H -#include "r300_fs_inlines.h" +#include "radeon_code.h" -static struct r3xx_fragment_shader r3xx_passthrough_fragment_shader = { - .alu_instruction_count = 1, - .tex_instruction_count = 0, - .indirections = 0, - .shader.stack_size = 1, - - .instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | - R300_ALU_OUTC_CMP, - .instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | - R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, - .instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | - R300_ALU_OUTA_CMP, - .instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | - R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, -}; - -static struct r3xx_fragment_shader r3xx_texture_fragment_shader = { - .alu_instruction_count = 1, - .tex_instruction_count = 0, - .indirections = 0, - .shader.stack_size = 1, - - .instructions[0].alu_rgb_inst = R300_RGB_SWIZA(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZB(R300_ALU_ARGC_SRC0C_XYZ) | - R300_RGB_SWIZC(R300_ALU_ARGC_ZERO) | - R300_ALU_OUTC_CMP, - .instructions[0].alu_rgb_addr = R300_RGB_ADDR0(0) | R300_RGB_ADDR1(0) | - R300_RGB_ADDR2(0) | R300_ALU_DSTC_OUTPUT_XYZ, - .instructions[0].alu_alpha_inst = R300_ALPHA_SWIZA(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZB(R300_ALU_ARGA_SRC0A) | - R300_ALPHA_SWIZC(R300_ALU_ARGA_ZERO) | - R300_ALU_OUTA_CMP, - .instructions[0].alu_alpha_addr = R300_ALPHA_ADDR0(0) | - R300_ALPHA_ADDR1(0) | R300_ALPHA_ADDR2(0) | R300_ALU_DSTA_OUTPUT, -}; - -struct r300_fs_asm; - -void r3xx_fs_finalize(struct r300_fragment_shader* fs, - struct r300_fs_asm* assembler); - -void r3xx_fs_instruction(struct r3xx_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_instruction* inst); +struct rX00_fragment_program_code r3xx_passthrough_fragment_shader; +struct rX00_fragment_program_code r3xx_texture_fragment_shader; #endif /* R3XX_FS_H */ diff --git a/src/gallium/drivers/r300/r5xx_fs.c b/src/gallium/drivers/r300/r5xx_fs.c index 99d826278c..f072deab0d 100644 --- a/src/gallium/drivers/r300/r5xx_fs.c +++ b/src/gallium/drivers/r300/r5xx_fs.c @@ -23,445 +23,103 @@ #include "r5xx_fs.h" -static INLINE unsigned r5xx_fix_swiz(unsigned s) -{ - /* For historical reasons, the swizzle values x, y, z, w, and 0 are - * equivalent to the actual machine code, but 1 is not. Thus, we just - * adjust it a bit... */ - if (s == TGSI_EXTSWIZZLE_ONE) { - return R500_SWIZZLE_ONE; - } else { - return s; - } -} - -static uint32_t r5xx_rgba_swiz(struct tgsi_full_src_register* reg) -{ - if (reg->SrcRegister.Extended) { - return r5xx_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleX) | - (r5xx_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleY) << 3) | - (r5xx_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleZ) << 6) | - (r5xx_fix_swiz(reg->SrcRegisterExtSwz.ExtSwizzleW) << 9); - } else { - return reg->SrcRegister.SwizzleX | - (reg->SrcRegister.SwizzleY << 3) | - (reg->SrcRegister.SwizzleZ << 6) | - (reg->SrcRegister.SwizzleW << 9); - } -} - -static uint32_t r5xx_strq_swiz(struct tgsi_full_src_register* reg) -{ - return reg->SrcRegister.SwizzleX | - (reg->SrcRegister.SwizzleY << 2) | - (reg->SrcRegister.SwizzleZ << 4) | - (reg->SrcRegister.SwizzleW << 6); -} - -static INLINE uint32_t r5xx_rgb_swiz(struct tgsi_full_src_register* reg) -{ - /* Only the first 9 bits... */ - return (r5xx_rgba_swiz(reg) & 0x1ff) | - (reg->SrcRegister.Negate ? (1 << 9) : 0) | - (reg->SrcRegisterExtMod.Absolute ? (1 << 10) : 0); -} - -static INLINE uint32_t r5xx_alpha_swiz(struct tgsi_full_src_register* reg) -{ - /* Only the last 3 bits... */ - return (r5xx_rgba_swiz(reg) >> 9) | - (reg->SrcRegister.Negate ? (1 << 9) : 0) | - (reg->SrcRegisterExtMod.Absolute ? (1 << 10) : 0); -} - -static INLINE uint32_t r5xx_rgba_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_COS: - case TGSI_OPCODE_EX2: - case TGSI_OPCODE_LG2: - case TGSI_OPCODE_RCP: - case TGSI_OPCODE_RSQ: - case TGSI_OPCODE_SIN: - return R500_ALU_RGBA_OP_SOP; - case TGSI_OPCODE_DDX: - return R500_ALU_RGBA_OP_MDH; - case TGSI_OPCODE_DDY: - return R500_ALU_RGBA_OP_MDV; - case TGSI_OPCODE_FRC: - return R500_ALU_RGBA_OP_FRC; - case TGSI_OPCODE_DP3: - return R500_ALU_RGBA_OP_DP3; - case TGSI_OPCODE_DP4: - case TGSI_OPCODE_DPH: - return R500_ALU_RGBA_OP_DP4; - case TGSI_OPCODE_ABS: - case TGSI_OPCODE_CMP: - case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SWZ: - return R500_ALU_RGBA_OP_CMP; - case TGSI_OPCODE_ADD: - case TGSI_OPCODE_MAD: - case TGSI_OPCODE_MUL: - case TGSI_OPCODE_SUB: - return R500_ALU_RGBA_OP_MAD; - default: - return 0; - } -} - -static INLINE uint32_t r5xx_alpha_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_COS: - return R500_ALPHA_OP_COS; - case TGSI_OPCODE_EX2: - return R500_ALPHA_OP_EX2; - case TGSI_OPCODE_LG2: - return R500_ALPHA_OP_LN2; - case TGSI_OPCODE_RCP: - return R500_ALPHA_OP_RCP; - case TGSI_OPCODE_RSQ: - return R500_ALPHA_OP_RSQ; - case TGSI_OPCODE_FRC: - return R500_ALPHA_OP_FRC; - case TGSI_OPCODE_SIN: - return R500_ALPHA_OP_SIN; - case TGSI_OPCODE_DDX: - return R500_ALPHA_OP_MDH; - case TGSI_OPCODE_DDY: - return R500_ALPHA_OP_MDV; - case TGSI_OPCODE_DP3: - case TGSI_OPCODE_DP4: - case TGSI_OPCODE_DPH: - return R500_ALPHA_OP_DP; - case TGSI_OPCODE_ABS: - case TGSI_OPCODE_CMP: - case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SWZ: - return R500_ALPHA_OP_CMP; - case TGSI_OPCODE_ADD: - case TGSI_OPCODE_MAD: - case TGSI_OPCODE_MUL: - case TGSI_OPCODE_SUB: - return R500_ALPHA_OP_MAD; - default: - return 0; - } -} - -static INLINE uint32_t r5xx_tex_op(unsigned op) -{ - switch (op) { - case TGSI_OPCODE_KIL: - return R500_TEX_INST_TEXKILL; - case TGSI_OPCODE_TEX: - return R500_TEX_INST_LD; - case TGSI_OPCODE_TXB: - return R500_TEX_INST_LODBIAS; - case TGSI_OPCODE_TXP: - return R500_TEX_INST_PROJ; - default: - return 0; - } -} - -/* Setup an ALU operation. */ -static INLINE void r5xx_emit_maths(struct r5xx_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst, - unsigned op, - unsigned count) -{ - int i = fs->instruction_count; - - if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { - fs->instructions[i].inst0 = R500_INST_TYPE_OUT; - if (r300_fs_is_depr(assembler, dst)) { - fs->instructions[i].inst4 = R500_W_OMASK; - } else { - fs->instructions[i].inst0 |= - R500_ALU_OMASK(dst->DstRegister.WriteMask); - } - } else { - fs->instructions[i].inst0 = R500_INST_TYPE_ALU | - R500_ALU_WMASK(dst->DstRegister.WriteMask); - } - - fs->instructions[i].inst0 |= R500_INST_TEX_SEM_WAIT; - - fs->instructions[i].inst4 |= - R500_ALPHA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); - fs->instructions[i].inst5 = - R500_ALU_RGBA_ADDRD(r300_fs_dst(assembler, &dst->DstRegister)); - - switch (count) { - case 3: - fs->instructions[i].inst1 = - R500_RGB_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); - fs->instructions[i].inst2 = - R500_ALPHA_ADDR2(r300_fs_src(assembler, &src[2].SrcRegister)); - fs->instructions[i].inst5 |= - R500_ALU_RGBA_SEL_C_SRC2 | - R500_SWIZ_RGBA_C(r5xx_rgb_swiz(&src[2])) | - R500_ALU_RGBA_ALPHA_SEL_C_SRC2 | - R500_SWIZ_ALPHA_C(r5xx_alpha_swiz(&src[2])); - case 2: - fs->instructions[i].inst1 |= - R500_RGB_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)); - fs->instructions[i].inst2 |= - R500_ALPHA_ADDR1(r300_fs_src(assembler, &src[1].SrcRegister)); - fs->instructions[i].inst3 = - R500_ALU_RGB_SEL_B_SRC1 | - R500_SWIZ_RGB_B(r5xx_rgb_swiz(&src[1])); - fs->instructions[i].inst4 |= - R500_ALPHA_SEL_B_SRC1 | - R500_SWIZ_ALPHA_B(r5xx_alpha_swiz(&src[1])); - case 1: - case 0: - default: - fs->instructions[i].inst1 |= - R500_RGB_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)); - fs->instructions[i].inst2 |= - R500_ALPHA_ADDR0(r300_fs_src(assembler, &src[0].SrcRegister)); - fs->instructions[i].inst3 |= - R500_ALU_RGB_SEL_A_SRC0 | - R500_SWIZ_RGB_A(r5xx_rgb_swiz(&src[0])); - fs->instructions[i].inst4 |= - R500_ALPHA_SEL_A_SRC0 | - R500_SWIZ_ALPHA_A(r5xx_alpha_swiz(&src[0])); - break; - } - - fs->instructions[i].inst4 |= r5xx_alpha_op(op); - fs->instructions[i].inst5 |= r5xx_rgba_op(op); - - fs->instruction_count++; -} - -static INLINE void r5xx_emit_tex(struct r5xx_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_src_register* src, - struct tgsi_full_dst_register* dst, - uint32_t op) -{ - int i = fs->instruction_count; - - fs->instructions[i].inst0 = R500_INST_TYPE_TEX | - R500_TEX_WMASK(dst->DstRegister.WriteMask) | - R500_INST_TEX_SEM_WAIT; - fs->instructions[i].inst1 = R500_TEX_ID(0) | - R500_TEX_SEM_ACQUIRE | //R500_TEX_IGNORE_UNCOVERED | - r5xx_tex_op(op); - fs->instructions[i].inst2 = - R500_TEX_SRC_ADDR(r300_fs_src(assembler, &src->SrcRegister)) | - R500_SWIZ_TEX_STRQ(r5xx_strq_swiz(src)) | - R500_TEX_DST_ADDR(r300_fs_dst(assembler, &dst->DstRegister)) | +#include "r300_reg.h" + +/* XXX this all should find its way back to r300_reg */ +/* Swizzle tools */ +#define R500_SWIZZLE_ZERO 4 +#define R500_SWIZZLE_HALF 5 +#define R500_SWIZZLE_ONE 6 +#define R500_SWIZ_RGB_ZERO ((4 << 0) | (4 << 3) | (4 << 6)) +#define R500_SWIZ_RGB_ONE ((6 << 0) | (6 << 3) | (6 << 6)) +#define R500_SWIZ_RGB_RGB ((0 << 0) | (1 << 3) | (2 << 6)) +#define R500_SWIZ_MOD_NEG 1 +#define R500_SWIZ_MOD_ABS 2 +#define R500_SWIZ_MOD_NEG_ABS 3 +/* Swizzles for inst2 */ +#define R500_SWIZ_TEX_STRQ(x) ((x) << 8) +#define R500_SWIZ_TEX_RGBA(x) ((x) << 24) +/* Swizzles for inst3 */ +#define R500_SWIZ_RGB_A(x) ((x) << 2) +#define R500_SWIZ_RGB_B(x) ((x) << 15) +/* Swizzles for inst4 */ +#define R500_SWIZ_ALPHA_A(x) ((x) << 14) +#define R500_SWIZ_ALPHA_B(x) ((x) << 21) +/* Swizzle for inst5 */ +#define R500_SWIZ_RGBA_C(x) ((x) << 14) +#define R500_SWIZ_ALPHA_C(x) ((x) << 27) +/* Writemasks */ +#define R500_TEX_WMASK(x) ((x) << 11) +#define R500_ALU_WMASK(x) ((x) << 11) +#define R500_ALU_OMASK(x) ((x) << 15) +#define R500_W_OMASK (1 << 31) + +struct rX00_fragment_program_code r5xx_passthrough_fragment_shader = { + .code.r500.max_temp_idx = 0, + .code.r500.inst_end = 0, + + .code.r500.inst[0].inst0 = R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, + .code.r500.inst[0].inst1 = + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, + .code.r500.inst[0].inst2 = + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, + .code.r500.inst[0].inst3 = + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, + .code.r500.inst[0].inst4 = + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, + .code.r500.inst[0].inst5 = + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0, +}; + +struct rX00_fragment_program_code r5xx_texture_fragment_shader = { + .code.r500.max_temp_idx = 0, + .code.r500.inst_end = 1, + + .code.r500.inst[0].inst0 = R500_INST_TYPE_TEX | + R500_INST_TEX_SEM_WAIT | + R500_INST_RGB_WMASK_RGB | R500_INST_ALPHA_WMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, + .code.r500.inst[0].inst1 = R500_TEX_ID(0) | R500_TEX_INST_LD | + R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED, + .code.r500.inst[0].inst2 = R500_TEX_SRC_ADDR(0) | + R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G | + R500_TEX_SRC_R_SWIZ_B | R500_TEX_SRC_Q_SWIZ_A | + R500_TEX_DST_ADDR(0) | R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | - R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A; - - if (dst->DstRegister.File == TGSI_FILE_OUTPUT) { - fs->instructions[i].inst2 |= - R500_TEX_DST_ADDR(assembler->temp_count + - assembler->temp_offset); - - fs->instruction_count++; - - /* Setup and emit a MOV. */ - src[0].SrcRegister.Index = assembler->temp_count; - src[0].SrcRegister.File = TGSI_FILE_TEMPORARY; - - src[1] = src[0]; - src[2] = r300_constant_zero; - r5xx_emit_maths(fs, assembler, src, dst, TGSI_OPCODE_MOV, 3); - } else { - fs->instruction_count++; - } -} - -void r5xx_fs_finalize(struct r5xx_fragment_shader* fs, - struct r300_fs_asm* assembler) -{ - /* XXX should this just go with OPCODE_END? */ - fs->instructions[fs->instruction_count - 1].inst0 |= - R500_INST_LAST; -} - -void r5xx_fs_instruction(struct r5xx_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_instruction* inst) -{ - /* Switch between opcodes. When possible, prefer using the official - * AMD/ATI names for opcodes, please, as it facilitates using the - * documentation. */ - switch (inst->Instruction.Opcode) { - /* XXX trig needs extra prep */ - case TGSI_OPCODE_COS: - case TGSI_OPCODE_SIN: - /* The simple scalar ops. */ - case TGSI_OPCODE_EX2: - case TGSI_OPCODE_LG2: - case TGSI_OPCODE_RCP: - case TGSI_OPCODE_RSQ: - /* Copy red swizzle to alpha for src0 */ - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX; - inst->FullSrcRegisters[0].SrcRegister.SwizzleW = - inst->FullSrcRegisters[0].SrcRegister.SwizzleX; - /* Fall through */ - case TGSI_OPCODE_DDX: - case TGSI_OPCODE_DDY: - case TGSI_OPCODE_FRC: - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 1); - break; - - /* The dot products. */ - case TGSI_OPCODE_DPH: - /* Set alpha swizzle to one for src0 */ - if (!inst->FullSrcRegisters[0].SrcRegister.Extended) { - inst->FullSrcRegisters[0].SrcRegister.Extended = TRUE; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX = - inst->FullSrcRegisters[0].SrcRegister.SwizzleX; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleY = - inst->FullSrcRegisters[0].SrcRegister.SwizzleY; - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleZ = - inst->FullSrcRegisters[0].SrcRegister.SwizzleZ; - } - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = - TGSI_EXTSWIZZLE_ONE; - /* Fall through */ - case TGSI_OPCODE_DP3: - case TGSI_OPCODE_DP4: - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 2); - break; - - /* Simple three-source operations. */ - case TGSI_OPCODE_CMP: - /* Swap src0 and src2 */ - inst->FullSrcRegisters[3] = inst->FullSrcRegisters[2]; - inst->FullSrcRegisters[2] = inst->FullSrcRegisters[0]; - inst->FullSrcRegisters[0] = inst->FullSrcRegisters[3]; - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - - /* The MAD variants. */ - case TGSI_OPCODE_SUB: - /* Just like ADD, but flip the negation on src1 first */ - inst->FullSrcRegisters[1].SrcRegister.Negate = - !inst->FullSrcRegisters[1].SrcRegister.Negate; - /* Fall through */ - case TGSI_OPCODE_ADD: - /* Force src0 to one, move all registers over */ - inst->FullSrcRegisters[2] = inst->FullSrcRegisters[1]; - inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; - inst->FullSrcRegisters[0] = r300_constant_one; - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - case TGSI_OPCODE_MUL: - /* Force our src2 to zero */ - inst->FullSrcRegisters[2] = r300_constant_zero; - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - case TGSI_OPCODE_MAD: - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - - /* The MOV variants. */ - case TGSI_OPCODE_ABS: - /* Set absolute value modifiers. */ - inst->FullSrcRegisters[0].SrcRegisterExtMod.Absolute = TRUE; - /* Fall through */ - case TGSI_OPCODE_MOV: - case TGSI_OPCODE_SWZ: - /* src0 -> src1 and src2 forced to zero */ - inst->FullSrcRegisters[1] = inst->FullSrcRegisters[0]; - inst->FullSrcRegisters[2] = r300_constant_zero; - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], inst->Instruction.Opcode, 3); - break; - - /* The compound and hybrid insts. */ - case TGSI_OPCODE_LRP: - /* LRP DST A, B, C -> MAD TMP -A, C, C; MAD DST A, B, TMP */ - inst->FullSrcRegisters[3] = inst->FullSrcRegisters[1]; - inst->FullSrcRegisters[1] = inst->FullSrcRegisters[2]; - inst->FullSrcRegisters[0].SrcRegister.Negate = - !(inst->FullSrcRegisters[0].SrcRegister.Negate); - inst->FullDstRegisters[1] = inst->FullDstRegisters[0]; - inst->FullDstRegisters[0].DstRegister.Index = - assembler->temp_count; - inst->FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY; - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); - inst->FullSrcRegisters[2].SrcRegister.Index = - assembler->temp_count; - inst->FullSrcRegisters[2].SrcRegister.File = TGSI_FILE_TEMPORARY; - inst->FullSrcRegisters[2].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; - inst->FullSrcRegisters[2].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y; - inst->FullSrcRegisters[2].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z; - inst->FullSrcRegisters[2].SrcRegister.SwizzleW = TGSI_SWIZZLE_W; - inst->FullSrcRegisters[1] = inst->FullSrcRegisters[3]; - inst->FullSrcRegisters[0].SrcRegister.Negate = - !(inst->FullSrcRegisters[0].SrcRegister.Negate); - inst->FullDstRegisters[0] = inst->FullDstRegisters[1]; - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], TGSI_OPCODE_MAD, 3); - break; - case TGSI_OPCODE_POW: - /* POW DST A, B -> LG2 TMP A; MUL TMP TMP, B; EX2 DST TMP */ - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleW = - inst->FullSrcRegisters[0].SrcRegisterExtSwz.ExtSwizzleX; - inst->FullSrcRegisters[0].SrcRegister.SwizzleW = - inst->FullSrcRegisters[0].SrcRegister.SwizzleX; - inst->FullDstRegisters[1] = inst->FullDstRegisters[0]; - inst->FullDstRegisters[0].DstRegister.Index = - assembler->temp_count; - inst->FullDstRegisters[0].DstRegister.File = TGSI_FILE_TEMPORARY; - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], TGSI_OPCODE_LG2, 1); - inst->FullSrcRegisters[0].SrcRegister.Index = - assembler->temp_count; - inst->FullSrcRegisters[0].SrcRegister.File = TGSI_FILE_TEMPORARY; - inst->FullSrcRegisters[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; - inst->FullSrcRegisters[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_Y; - inst->FullSrcRegisters[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_Z; - inst->FullSrcRegisters[0].SrcRegister.SwizzleW = TGSI_SWIZZLE_W; - inst->FullSrcRegisters[2] = r300_constant_zero; - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], TGSI_OPCODE_MUL, 3); - inst->FullDstRegisters[0] = inst->FullDstRegisters[1]; - r5xx_emit_maths(fs, assembler, inst->FullSrcRegisters, - &inst->FullDstRegisters[0], TGSI_OPCODE_EX2, 1); - break; - - /* The texture instruction set. */ - case TGSI_OPCODE_KIL: - case TGSI_OPCODE_TEX: - case TGSI_OPCODE_TXB: - case TGSI_OPCODE_TXP: - r5xx_emit_tex(fs, assembler, &inst->FullSrcRegisters[0], - &inst->FullDstRegisters[0], inst->Instruction.Opcode); - break; - - /* This is the end. My only friend, the end. */ - case TGSI_OPCODE_END: - break; - default: - debug_printf("r300: fs: Bad opcode %d\n", - inst->Instruction.Opcode); - break; - } - - /* Clamp, if saturation flags are set. */ - if (inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE) { - fs->instructions[fs->instruction_count - 1].inst0 |= - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP; - } -} + R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A, + .code.r500.inst[0].inst3 = 0x0, + .code.r500.inst[0].inst4 = 0x0, + .code.r500.inst[0].inst5 = 0x0, + + .code.r500.inst[1].inst0 = R500_INST_TYPE_OUT | + R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | + R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, + .code.r500.inst[1].inst1 = + R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, + .code.r500.inst[1].inst2 = + R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, + .code.r500.inst[1].inst3 = + R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | + R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | + R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, + .code.r500.inst[1].inst4 = + R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, + .code.r500.inst[1].inst5 = + R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | + R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0, +}; diff --git a/src/gallium/drivers/r300/r5xx_fs.h b/src/gallium/drivers/r300/r5xx_fs.h index 7e62c3352b..a4addde32b 100644 --- a/src/gallium/drivers/r300/r5xx_fs.h +++ b/src/gallium/drivers/r300/r5xx_fs.h @@ -24,111 +24,9 @@ #ifndef R5XX_FS_H #define R5XX_FS_H -#include "r300_fs_inlines.h" +#include "radeon_code.h" -/* XXX this all should find its way back to r300_reg */ -/* Swizzle tools */ -#define R500_SWIZZLE_ZERO 4 -#define R500_SWIZZLE_HALF 5 -#define R500_SWIZZLE_ONE 6 -#define R500_SWIZ_RGB_ZERO ((4 << 0) | (4 << 3) | (4 << 6)) -#define R500_SWIZ_RGB_ONE ((6 << 0) | (6 << 3) | (6 << 6)) -#define R500_SWIZ_RGB_RGB ((0 << 0) | (1 << 3) | (2 << 6)) -#define R500_SWIZ_MOD_NEG 1 -#define R500_SWIZ_MOD_ABS 2 -#define R500_SWIZ_MOD_NEG_ABS 3 -/* Swizzles for inst2 */ -#define R500_SWIZ_TEX_STRQ(x) ((x) << 8) -#define R500_SWIZ_TEX_RGBA(x) ((x) << 24) -/* Swizzles for inst3 */ -#define R500_SWIZ_RGB_A(x) ((x) << 2) -#define R500_SWIZ_RGB_B(x) ((x) << 15) -/* Swizzles for inst4 */ -#define R500_SWIZ_ALPHA_A(x) ((x) << 14) -#define R500_SWIZ_ALPHA_B(x) ((x) << 21) -/* Swizzle for inst5 */ -#define R500_SWIZ_RGBA_C(x) ((x) << 14) -#define R500_SWIZ_ALPHA_C(x) ((x) << 27) -/* Writemasks */ -#define R500_TEX_WMASK(x) ((x) << 11) -#define R500_ALU_WMASK(x) ((x) << 11) -#define R500_ALU_OMASK(x) ((x) << 15) -#define R500_W_OMASK (1 << 31) - -static struct r5xx_fragment_shader r5xx_passthrough_fragment_shader = { - .shader.stack_size = 0, - .instruction_count = 1, - .instructions[0].inst0 = R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | R500_INST_LAST | - R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, - .instructions[0].inst1 = - R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, - .instructions[0].inst2 = - R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, - .instructions[0].inst3 = - R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, - .instructions[0].inst4 = - R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, - .instructions[0].inst5 = - R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0, -}; - -static struct r5xx_fragment_shader r5xx_texture_fragment_shader = { - .shader.stack_size = 1, - .instruction_count = 2, - .instructions[0].inst0 = R500_INST_TYPE_TEX | - R500_INST_TEX_SEM_WAIT | - R500_INST_RGB_WMASK_RGB | R500_INST_ALPHA_WMASK | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, - .instructions[0].inst1 = R500_TEX_ID(0) | R500_TEX_INST_LD | - R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED, - .instructions[0].inst2 = R500_TEX_SRC_ADDR(0) | - R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G | - R500_TEX_SRC_R_SWIZ_B | R500_TEX_SRC_Q_SWIZ_A | - R500_TEX_DST_ADDR(0) | - R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | - R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A, - .instructions[0].inst3 = 0x0, - .instructions[0].inst4 = 0x0, - .instructions[0].inst5 = 0x0, - .instructions[1].inst0 = R500_INST_TYPE_OUT | - R500_INST_TEX_SEM_WAIT | R500_INST_LAST | - R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK | - R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP, - .instructions[1].inst1 = - R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | - R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST, - .instructions[1].inst2 = - R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | - R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST, - .instructions[1].inst3 = - R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R | - R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | - R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R | - R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B, - .instructions[1].inst4 = - R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A, - .instructions[1].inst5 = - R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 | - R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | - R500_ALU_RGBA_A_SWIZ_0, -}; - -struct r300_fs_asm; - -void r5xx_fs_finalize(struct r5xx_fragment_shader* fs, - struct r300_fs_asm* assembler); - -void r5xx_fs_instruction(struct r5xx_fragment_shader* fs, - struct r300_fs_asm* assembler, - struct tgsi_full_instruction* inst); +struct rX00_fragment_program_code r5xx_passthrough_fragment_shader; +struct rX00_fragment_program_code r5xx_texture_fragment_shader; #endif /* R5XX_FS_H */ -- cgit v1.2.3 From 048f988aeb06fa360c6c41eaa50cb96b4b86e34e Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Tue, 4 Aug 2009 10:57:47 +0200 Subject: r300g: Slightly saner initialization of some texture / transfer fields. --- src/gallium/drivers/r300/r300_screen.c | 5 +++-- src/gallium/drivers/r300/r300_texture.c | 6 ++---- 2 files changed, 5 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 258e4ac7b2..96a7304621 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -322,13 +322,14 @@ r300_get_tex_transfer(struct pipe_screen *screen, trans = CALLOC_STRUCT(r300_transfer); if (trans) { pipe_texture_reference(&trans->transfer.texture, texture); - trans->transfer.format = trans->transfer.format; + trans->transfer.format = texture->format; trans->transfer.width = w; trans->transfer.height = h; trans->transfer.block = texture->block; trans->transfer.nblocksx = texture->nblocksx[level]; trans->transfer.nblocksy = texture->nblocksy[level]; - trans->transfer.stride = tex->stride; + trans->transfer.stride = align(pf_get_stride(&trans->transfer.block, + texture->width[level]), 32); trans->transfer.usage = usage; trans->offset = offset; } diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index daf1647bee..0164f05096 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -81,13 +81,11 @@ static void r300_setup_miptree(struct r300_texture* tex) * XXX * POT, uncompressed, unmippmapped textures can be aligned to 32, * instead of 64. */ - stride = align( - (base->nblocksx[i] * base->block.size) / base->block.width, - 32); + stride = align(pf_get_stride(&base->block, base->width[i]), 32); size = stride * base->nblocksy[i] * base->depth[i]; tex->offset[i] = align(tex->size, 32); - tex->size += tex->offset[i] + size; + tex->size = tex->offset[i] + size; debug_printf("r300: Texture miptree: Level %d " "(%dx%dx%d px, pitch %d bytes)\n", -- cgit v1.2.3 From c58133b81ab7c9ee12cac05c4671a87e34708a66 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 7 Aug 2009 19:46:52 -0700 Subject: r300g: Remove r300_constant_buffer::user_count. Not needed with new compiler. --- src/gallium/drivers/r300/r300_context.c | 2 +- src/gallium/drivers/r300/r300_context.h | 2 -- src/gallium/drivers/r300/r300_state.c | 5 ++--- 3 files changed, 3 insertions(+), 6 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 233a32b53c..c8510bc63e 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -52,7 +52,7 @@ static boolean r300_draw_range_elements(struct pipe_context* pipe, draw_set_mapped_constant_buffer(r300->draw, r300->shader_constants[PIPE_SHADER_VERTEX].constants, - r300->shader_constants[PIPE_SHADER_VERTEX].user_count * + r300->shader_constants[PIPE_SHADER_VERTEX].count * (sizeof(float) * 4)); draw_arrays(r300->draw, mode, start, count); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 6984225967..fc8a449893 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -146,8 +146,6 @@ struct r300_constant_buffer { /* Buffer of constants */ /* XXX first number should be raised */ float constants[32][4]; - /* Number of user-defined constants */ - unsigned user_count; /* Total number of constants */ unsigned count; }; diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index bb4b4be50f..a02fb34b2a 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -138,7 +138,6 @@ static void const struct pipe_constant_buffer* buffer) { struct r300_context* r300 = r300_context(pipe); - int i = r300->shader_constants[shader].user_count; /* This entire chunk of code seems ever-so-slightly baked. * It's as if I've got pipe_buffer* matryoshkas... */ @@ -149,10 +148,10 @@ static void map, buffer->buffer->size); pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer); - r300->shader_constants[shader].user_count = + r300->shader_constants[shader].count = buffer->buffer->size / (sizeof(float) * 4); } else { - r300->shader_constants[shader].user_count = 0; + r300->shader_constants[shader].count = 0; } r300->dirty_state |= R300_NEW_CONSTANTS; -- cgit v1.2.3 From 847fcb645c1d0c69617f0cafe8e6410e13f08fa6 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 7 Aug 2009 20:16:39 -0700 Subject: gallium: Move minify() to u_math. minify() is usually used in mipmap size calculation. Strangely enough, we all defined it as MAX2(1, d >> 1); imagine that. :3 --- src/gallium/auxiliary/util/u_math.h | 5 +++++ src/gallium/drivers/cell/ppu/cell_texture.c | 7 ------- src/gallium/drivers/i915simple/i915_texture.c | 5 ----- src/gallium/drivers/i965simple/brw_tex_layout.c | 5 ----- src/gallium/drivers/r300/r300_texture.c | 7 ------- src/gallium/drivers/softpipe/sp_texture.c | 5 ----- 6 files changed, 5 insertions(+), 29 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/auxiliary/util/u_math.h b/src/gallium/auxiliary/util/u_math.h index 167fc83dc1..57410e78b0 100644 --- a/src/gallium/auxiliary/util/u_math.h +++ b/src/gallium/auxiliary/util/u_math.h @@ -450,6 +450,11 @@ align(int value, int alignment) return (value + alignment - 1) & ~(alignment - 1); } +static INLINE unsigned +minify(unsigned value) +{ + return MAX2(1, value >> 1); +} #ifndef COPY_4V #define COPY_4V( DST, SRC ) \ diff --git a/src/gallium/drivers/cell/ppu/cell_texture.c b/src/gallium/drivers/cell/ppu/cell_texture.c index e26594448f..80418f5aa2 100644 --- a/src/gallium/drivers/cell/ppu/cell_texture.c +++ b/src/gallium/drivers/cell/ppu/cell_texture.c @@ -44,13 +44,6 @@ -static unsigned -minify(unsigned d) -{ - return MAX2(1, d>>1); -} - - static void cell_texture_layout(struct cell_texture *ct) { diff --git a/src/gallium/drivers/i915simple/i915_texture.c b/src/gallium/drivers/i915simple/i915_texture.c index ac38bb50ac..03f0e14e7c 100644 --- a/src/gallium/drivers/i915simple/i915_texture.c +++ b/src/gallium/drivers/i915simple/i915_texture.c @@ -72,11 +72,6 @@ static const int step_offsets[6][2] = { {-1, 1} }; -static unsigned minify( unsigned d ) -{ - return MAX2(1, d>>1); -} - static unsigned power_of_two(unsigned x) { diff --git a/src/gallium/drivers/i965simple/brw_tex_layout.c b/src/gallium/drivers/i965simple/brw_tex_layout.c index 8aea8c0558..998ffaeac4 100644 --- a/src/gallium/drivers/i965simple/brw_tex_layout.c +++ b/src/gallium/drivers/i965simple/brw_tex_layout.c @@ -65,11 +65,6 @@ unsigned intel_compressed_alignment(unsigned internalFormat) } #endif -static unsigned minify( unsigned d ) -{ - return MAX2(1, d>>1); -} - static void intel_miptree_set_image_offset(struct brw_texture *tex, unsigned level, diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 0164f05096..590052509c 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -22,13 +22,6 @@ #include "r300_texture.h" -/* XXX maths need to go to util */ - -static int minify(int i) -{ - return MAX2(1, i >> 1); -} - static void r300_setup_texture_state(struct r300_texture* tex, unsigned width, unsigned height, diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c index 4af520e3fd..b7e52af032 100644 --- a/src/gallium/drivers/softpipe/sp_texture.c +++ b/src/gallium/drivers/softpipe/sp_texture.c @@ -48,11 +48,6 @@ /* Simple, maximally packed layout. */ -static unsigned minify( unsigned d ) -{ - return MAX2(1, d>>1); -} - /* Conventional allocation path for non-display textures: */ -- cgit v1.2.3 From 10b9d9f89528971475138b50487e0c4735987a24 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Fri, 7 Aug 2009 20:29:50 -0700 Subject: r300g: Knock out another fragment of invariant state. Colorbuffer setup will always happen. --- src/gallium/drivers/r300/r300_state_invariant.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 430129d5bd..1e92374a4e 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -34,7 +34,7 @@ void r300_emit_invariant_state(struct r300_context* r300) struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; CS_LOCALS(r300); - BEGIN_CS(22 + (caps->has_tcl ? 2: 0)); + BEGIN_CS(24 + (caps->has_tcl ? 2: 0)); /*** Graphics Backend (GB) ***/ /* Various GB enables */ @@ -56,6 +56,7 @@ void r300_emit_invariant_state(struct r300_context* r300) OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x0); OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x0); OUT_CS_REG(R300_FG_DEPTH_SRC, 0x0); + OUT_CS_REG(R300_US_W_FMT, 0x0); /*** VAP ***/ /* Max and min vertex index clamp. */ @@ -72,7 +73,7 @@ void r300_emit_invariant_state(struct r300_context* r300) END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(71 + (caps->has_tcl ? 5 : 0) + (caps->is_r500 ? 4 : 0)); + BEGIN_CS(64 + (caps->has_tcl ? 5 : 0) + (caps->is_r500 ? 4 : 0)); /* Flush PVS. */ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0); @@ -132,11 +133,5 @@ void r300_emit_invariant_state(struct r300_context* r300) /* XXX */ OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); - OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4); - OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS(R300_US_OUT_FMT_UNUSED); - OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); END_CS; } -- cgit v1.2.3 From 2cbd3fce8f6e97f85423f1b185f72e7fbc946e94 Mon Sep 17 00:00:00 2001 From: Cooper Yuan Date: Tue, 11 Aug 2009 14:39:58 +0800 Subject: r300g: a typo of debug message --- src/gallium/drivers/r300/r300_fs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c index 2cddb97038..36463b9a2e 100644 --- a/src/gallium/drivers/r300/r300_fs.c +++ b/src/gallium/drivers/r300/r300_fs.c @@ -113,7 +113,7 @@ void r300_translate_fragment_shader(struct r300_context* r300, find_output_registers(&compiler, fs); if (compiler.Base.Debug) { - debug_printf("r300: Initial vertex program\n"); + debug_printf("r300: Initial fragment program\n"); tgsi_dump(fs->state.tokens, 0); } -- cgit v1.2.3 From bb913680031f8ed3fc7e293c9874dea3571510b1 Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Tue, 11 Aug 2009 09:13:12 +0200 Subject: r300g: Emit relocations for pitch registers. Fixes CS failures with tiling enabled kernels. --- src/gallium/drivers/r300/r300_emit.c | 11 +++++++---- src/gallium/drivers/r300/r300_surface.c | 8 +++++--- 2 files changed, 12 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index e0c38a06e4..53256fc6dd 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -278,7 +278,7 @@ void r300_emit_fb_state(struct r300_context* r300, int i; CS_LOCALS(r300); - BEGIN_CS((8 * fb->nr_cbufs) + (fb->zsbuf ? 8 : 0) + 4); + BEGIN_CS((10 * fb->nr_cbufs) + (fb->zsbuf ? 10 : 0) + 4); for (i = 0; i < fb->nr_cbufs; i++) { tex = (struct r300_texture*)fb->cbufs[i]->texture; assert(tex && tex->buffer && "cbuf is marked, but NULL!"); @@ -287,8 +287,10 @@ void r300_emit_fb_state(struct r300_context* r300, OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_CS_REG(R300_RB3D_COLORPITCH0 + (4 * i), pixpitch | - r300_translate_colorformat(tex->tex.format)); + OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1); + OUT_CS_RELOC(tex->buffer, pixpitch | + r300_translate_colorformat(tex->tex.format), 0, + RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), r300_translate_out_fmt(fb->cbufs[i]->format)); @@ -304,7 +306,8 @@ void r300_emit_fb_state(struct r300_context* r300, OUT_CS_REG(R300_ZB_FORMAT, r300_translate_zsformat(tex->tex.format)); - OUT_CS_REG(R300_ZB_DEPTHPITCH, pixpitch); + OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1); + OUT_CS_RELOC(tex->buffer, pixpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0); } OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 7dbfb64dbe..22196e3a9f 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -37,7 +37,7 @@ static void r300_surface_setup(struct r300_context* r300, r300_emit_dsa_state(r300, &dsa_clear_state); r300_emit_rs_state(r300, &rs_clear_state); - BEGIN_CS(24); + BEGIN_CS(26); /* Viewport setup */ OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6); @@ -78,8 +78,10 @@ static void r300_surface_setup(struct r300_context* r300, /* Setup colorbuffer. */ OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1); OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_CS_REG(R300_RB3D_COLORPITCH0, pixpitch | - r300_translate_colorformat(dest->tex.format)); + OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0, 1); + OUT_CS_RELOC(dest->buffer, pixpitch | + r300_translate_colorformat(dest->tex.format), 0, + RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0xf); END_CS; -- cgit v1.2.3 From e93be5132c24becf4f7f3d30de4b76300af0b6a4 Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Tue, 11 Aug 2009 09:16:48 +0200 Subject: r300g: Fix up remaining VAP_CNTL_STATUS writes for big endian. --- src/gallium/drivers/r300/r300_surface.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index 22196e3a9f..a093f83945 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -144,7 +144,11 @@ validate: r300_emit_vertex_program_code(r300, &r300_passthrough_vertex_shader, 0); } else { BEGIN_CS(4); - OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS); + OUT_CS_REG(R300_VAP_CNTL_STATUS, +#ifdef PIPE_ARCH_BIG_ENDIAN + R300_VC_32BIT_SWAP | +#endif + R300_VAP_TCL_BYPASS); OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) | R300_PVS_NUM_CNTLRS(5) | R300_PVS_NUM_FPUS(caps->num_vert_fpus) | @@ -282,7 +286,11 @@ validate: r300_emit_vertex_program_code(r300, &r300_passthrough_vertex_shader, 0); } else { BEGIN_CS(4); - OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS); + OUT_CS_REG(R300_VAP_CNTL_STATUS, +#ifdef PIPE_ARCH_BIG_ENDIAN + R300_VC_32BIT_SWAP | +#endif + R300_VAP_TCL_BYPASS); OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) | R300_PVS_NUM_CNTLRS(5) | R300_PVS_NUM_FPUS(caps->num_vert_fpus) | -- cgit v1.2.3 From c63bd15f81cecfb421ff798a3e2d0f82b90331db Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 18 Aug 2009 11:44:53 -0700 Subject: Revert "r300-gallium, radeon-gallium: Nuke gb_pipes from orbit." This reverts commit 6a40d1e9d96f8e8c57bc3bbd6f567cacd4471f59. Turns out that we *do* need these for OQ after all. Go figure. Conflicts: src/gallium/winsys/drm/radeon/core/radeon_r300.h --- src/gallium/drivers/r300/r300_chipset.c | 1 + src/gallium/drivers/r300/r300_chipset.h | 2 ++ src/gallium/drivers/r300/r300_screen.c | 1 + src/gallium/drivers/r300/r300_state_inlines.h | 19 +++++++++++++++++++ src/gallium/drivers/r300/r300_winsys.h | 3 +++ src/gallium/winsys/drm/radeon/core/radeon_r300.c | 22 ++++++++++++++++++++-- 6 files changed, 46 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 00fae8d26f..864bdedec0 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -34,6 +34,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) caps->is_r500 = FALSE; caps->num_vert_fpus = 4; + /* Note: These are not ordered by PCI ID. I leave that task to GCC, * which will perform the ordering while collating jump tables. Instead, * I've tried to group them according to capabilities and age. */ diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index 5b2e1f0568..21eebeae60 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -34,6 +34,8 @@ struct r300_capabilities { int family; /* The number of vertex floating-point units */ int num_vert_fpus; + /* The number of fragment pipes */ + int num_frag_pipes; /* Whether or not TCL is physically present */ boolean has_tcl; /* Whether or not this is an RV515 or newer; R500s have many differences diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 96a7304621..15740f6125 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -392,6 +392,7 @@ struct pipe_screen* r300_create_screen(struct r300_winsys* r300_winsys) return NULL; caps->pci_id = r300_winsys->pci_id; + caps->num_frag_pipes = r300_winsys->gb_pipes; r300_parse_chipset(caps); diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index 22c8e199ae..91b93fc367 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -353,6 +353,25 @@ static INLINE uint32_t r300_translate_out_fmt(enum pipe_format format) /* Non-CSO state. (For now.) */ +static INLINE uint32_t r300_translate_gb_pipes(int pipe_count) +{ + switch (pipe_count) { + case 1: + return R300_GB_TILE_PIPE_COUNT_RV300; + break; + case 2: + return R300_GB_TILE_PIPE_COUNT_R300; + break; + case 3: + return R300_GB_TILE_PIPE_COUNT_R420_3P; + break; + case 4: + return R300_GB_TILE_PIPE_COUNT_R420; + break; + } + return 0; +} + static INLINE uint32_t translate_vertex_data_type(int type) { switch (type) { case EMIT_1F: diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index d2893c3b9d..f18ad75a47 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -45,6 +45,9 @@ struct r300_winsys { /* PCI ID */ uint32_t pci_id; + /* GB pipe count */ + uint32_t gb_pipes; + /* GART size. */ uint32_t gart_size; diff --git a/src/gallium/winsys/drm/radeon/core/radeon_r300.c b/src/gallium/winsys/drm/radeon/core/radeon_r300.c index 4e9a2ddd16..d6bb77dc7e 100644 --- a/src/gallium/winsys/drm/radeon/core/radeon_r300.c +++ b/src/gallium/winsys/drm/radeon/core/radeon_r300.c @@ -139,7 +139,25 @@ static void do_ioctls(struct r300_winsys* winsys, int fd) info.value = ⌖ - /* First, get PCI ID */ + /* First, get the number of pixel pipes */ + info.request = RADEON_INFO_NUM_GB_PIPES; + retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info)); + if (retval) { + fprintf(stderr, "%s: New ioctl for GB pipe count failed " + "(error number %d), trying classic ioctl...\n", + __FUNCTION__, retval); + gp.param = RADEON_PARAM_NUM_GB_PIPES; + retval = drmCommandWriteRead(fd, DRM_RADEON_GETPARAM, &gp, + sizeof(gp)); + if (retval) { + fprintf(stderr, "%s: Failed to get GB pipe count, " + "error number %d\n", __FUNCTION__, retval); + exit(1); + } + } + winsys->gb_pipes = target; + + /* Then, get PCI ID */ info.request = RADEON_INFO_DEVICE_ID; retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info)); if (retval) { @@ -149,7 +167,7 @@ static void do_ioctls(struct r300_winsys* winsys, int fd) } winsys->pci_id = target; - /* Then, retrieve MM info */ + /* Finally, retrieve MM info */ retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO, &gem_info, sizeof(gem_info)); if (retval) { -- cgit v1.2.3 From 4092f318db440532f78a39c0444b987039c8f7f7 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 18 Aug 2009 17:49:58 -0700 Subject: r300g: Add high_second_pipe cap for R3xx chipsets. This name is totally subject to change if ever I need to separate R3xx for some other reason. --- src/gallium/drivers/r300/r300_chipset.c | 10 +++++++++- src/gallium/drivers/r300/r300_chipset.h | 2 ++ 2 files changed, 11 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 864bdedec0..d138866d33 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -30,9 +30,10 @@ void r300_parse_chipset(struct r300_capabilities* caps) { /* Reasonable defaults */ + caps->num_vert_fpus = 4; caps->has_tcl = getenv("RADEON_NO_TCL") ? FALSE : TRUE; caps->is_r500 = FALSE; - caps->num_vert_fpus = 4; + caps->high_second_pipe = FALSE; /* Note: These are not ordered by PCI ID. I leave that task to GCC, @@ -41,6 +42,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) switch (caps->pci_id) { case 0x4144: caps->family = CHIP_FAMILY_R300; + caps->high_second_pipe = TRUE; break; case 0x4145: @@ -51,6 +53,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x4E46: case 0x4E47: caps->family = CHIP_FAMILY_R300; + caps->high_second_pipe = TRUE; break; case 0x4150: @@ -67,6 +70,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x4E54: case 0x4E56: caps->family = CHIP_FAMILY_RV350; + caps->high_second_pipe = TRUE; break; case 0x4148: @@ -77,10 +81,12 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x4E49: case 0x4E4B: caps->family = CHIP_FAMILY_R350; + caps->high_second_pipe = TRUE; break; case 0x4E4A: caps->family = CHIP_FAMILY_R360; + caps->high_second_pipe = TRUE; break; case 0x5460: @@ -92,6 +98,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x5B64: case 0x5B65: caps->family = CHIP_FAMILY_RV370; + caps->high_second_pipe = TRUE; break; case 0x3150: @@ -100,6 +107,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x3E50: case 0x3E54: caps->family = CHIP_FAMILY_RV380; + caps->high_second_pipe = TRUE; break; case 0x4A48: diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index 21eebeae60..322d4a57e4 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -44,6 +44,8 @@ struct r300_capabilities { * - Blend color is split across two registers * - Universal Shader (US) block used for fragment shaders */ boolean is_r500; + /* Whether or not the second pixel pipe is accessed with the high bit */ + boolean high_second_pipe; }; /* Enumerations for legibility and telling which card we're running on. */ -- cgit v1.2.3 From a381ee82663f10ff3cdcfad331258d03d4188894 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 18 Aug 2009 17:52:03 -0700 Subject: r300g: Massively cleanup OQ. Still broken, but compiles cleaner, behaves better, etc. --- src/gallium/drivers/r300/r300_context.c | 24 ++++++++-- src/gallium/drivers/r300/r300_context.h | 32 +++++++++++++ src/gallium/drivers/r300/r300_emit.c | 79 +++++++++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_query.c | 57 ++++++++++++++++-------- src/gallium/drivers/r300/r300_query.h | 7 --- src/gallium/drivers/r300/r300_reg.h | 4 ++ 6 files changed, 174 insertions(+), 29 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index c8510bc63e..da67bc29b8 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -88,9 +88,21 @@ static boolean r300_draw_arrays(struct pipe_context* pipe, unsigned mode, static void r300_destroy_context(struct pipe_context* context) { struct r300_context* r300 = r300_context(context); + struct r300_query* query, * temp; draw_destroy(r300->draw); + /* Free the OQ BO. */ + context->screen->buffer_destroy(r300->oqbo); + + /* If there are any queries pending or not destroyed, remove them now. */ + if (r300->query_list) { + foreach_s(query, temp, r300->query_list) { + remove_from_list(query); + FREE(query); + } + } + FREE(r300->blend_color_state); FREE(r300->rs_block); FREE(r300->scissor_state); @@ -145,6 +157,11 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.is_texture_referenced = r300_is_texture_referenced; r300->context.is_buffer_referenced = r300_is_buffer_referenced; + r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); + r300->rs_block = CALLOC_STRUCT(r300_rs_block); + r300->scissor_state = CALLOC_STRUCT(r300_scissor_state); + r300->viewport_state = CALLOC_STRUCT(r300_viewport_state); + /* Create a Draw. This is used for vert collation and SW TCL. */ r300->draw = draw_create(); /* Enable our renderer. */ @@ -155,10 +172,9 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, * transform in hardware, always. */ draw_set_viewport_state(r300->draw, &r300_viewport_identity); - r300->blend_color_state = CALLOC_STRUCT(r300_blend_color_state); - r300->rs_block = CALLOC_STRUCT(r300_rs_block); - r300->scissor_state = CALLOC_STRUCT(r300_scissor_state); - r300->viewport_state = CALLOC_STRUCT(r300_viewport_state); + /* Open up the OQ BO. */ + r300->oqbo = screen->buffer_create(screen, 4096, + PIPE_BUFFER_USAGE_VERTEX, 4096); r300_init_flush_functions(r300); diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index fc8a449893..f78492d4aa 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -25,9 +25,13 @@ #include "draw/draw_context.h" #include "draw/draw_vertex.h" + #include "pipe/p_context.h" + #include "tgsi/tgsi_scan.h" + #include "util/u_memory.h" +#include "util/u_simple_list.h" #include "r300_clear.h" #include "r300_query.h" @@ -150,6 +154,29 @@ struct r300_constant_buffer { unsigned count; }; +/* Query object. + * + * This is not a subclass of pipe_query because pipe_query is never + * actually fully defined. So, rather than have it as a member, and do + * subclass-style casting, we treat pipe_query as an opaque, and just + * trust that our state tracker does not ever mess up query objects. + */ +struct r300_query { + /* The kind of query. Currently only OQ is supported. */ + unsigned type; + /* Whether this query is currently active. Only active queries will + * get emitted into the command stream, and only active queries get + * tallied. */ + boolean active; + /* The current count of this query. Required to be at least 32 bits. */ + unsigned int count; + /* The offset of this query into the query buffer, in bytes. */ + unsigned offset; + /* Linked list members. */ + struct r300_query* prev; + struct r300_query* next; +}; + struct r300_texture { /* Parent class */ struct pipe_texture tex; @@ -203,6 +230,11 @@ struct r300_context { /* Offset into the VBO. */ size_t vbo_offset; + /* Occlusion query buffer. */ + struct pipe_buffer* oqbo; + /* Query list. */ + struct r300_query* query_list; + /* Various CSO state objects. */ /* Blend state. */ struct r300_blend_state* blend_state; diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 53256fc6dd..bd4d59e6f1 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -319,6 +319,79 @@ void r300_emit_fb_state(struct r300_context* r300, END_CS; } +void r300_emit_query_begin(struct r300_context* r300, + struct r300_query* query) +{ + CS_LOCALS(r300); + + /* XXX This will almost certainly not return good results + * for overlapping queries. */ + BEGIN_CS(2); + OUT_CS_REG(R300_ZB_ZPASS_DATA, 0); + END_CS; +} + +void r300_emit_query_end(struct r300_context* r300, + struct r300_query* query) +{ + struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; + CS_LOCALS(r300); + + if (!r300->winsys->add_buffer(r300->winsys, r300->oqbo, + 0, RADEON_GEM_DOMAIN_GTT)) { + debug_printf("r300: There wasn't room for the OQ buffer!?" + " Oh noes!\n"); + } + + assert(caps->num_frag_pipes); + BEGIN_CS(6 * caps->num_frag_pipes + 2); + /* I'm not so sure I like this switch, but it's hard to be elegant + * when there's so many special cases... + * + * So here's the basic idea. For each pipe, enable writes to it only, + * then put out the relocation for ZPASS_ADDR, taking into account a + * 4-byte offset for each pipe. RV380 and older are special; they have + * only two pipes, and the second pipe's enable is on bit 3, not bit 1, + * so there's a chipset cap for that. */ + switch (caps->num_frag_pipes) { + case 4: + /* pipe 3 only */ + OUT_CS_REG(R300_SU_REG_DEST, 1 << 3); + OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); + OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 3), + 0, RADEON_GEM_DOMAIN_GTT, 0); + case 3: + /* pipe 2 only */ + OUT_CS_REG(R300_SU_REG_DEST, 1 << 2); + OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); + OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 2), + 0, RADEON_GEM_DOMAIN_GTT, 0); + case 2: + /* pipe 1 only */ + /* As mentioned above, accomodate RV380 and older. */ + OUT_CS_REG(R300_SU_REG_DEST, + 1 << (caps->high_second_pipe ? 3 : 1)); + OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); + OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 1), + 0, RADEON_GEM_DOMAIN_GTT, 0); + case 1: + /* pipe 0 only */ + OUT_CS_REG(R300_SU_REG_DEST, 1 << 0); + OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); + OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 0), + 0, RADEON_GEM_DOMAIN_GTT, 0); + default: + debug_printf("r300: Implementation error: Chipset reports %d" + " pixel pipes!\n", caps->num_frag_pipes); + assert(0); + } + + /* And, finally, reset it to normal... */ + OUT_CS_REG(R300_SU_REG_DEST, 0xF); + END_CS; + +} + void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs) { CS_LOCALS(r300); @@ -615,6 +688,12 @@ validate: goto validate; } } + /* ...occlusion query buffer... */ + if (!r300->winsys->add_buffer(r300->winsys, r300->oqbo, + 0, RADEON_GEM_DOMAIN_GTT)) { + r300->context.flush(&r300->context, 0, NULL); + goto validate; + } /* ...and vertex buffer. */ if (r300->vbo) { if (!r300->winsys->add_buffer(r300->winsys, r300->vbo, diff --git a/src/gallium/drivers/r300/r300_query.c b/src/gallium/drivers/r300/r300_query.c index 8fc61c2dec..b3a8dc12c8 100644 --- a/src/gallium/drivers/r300/r300_query.c +++ b/src/gallium/drivers/r300/r300_query.c @@ -25,14 +25,30 @@ static struct pipe_query* r300_create_query(struct pipe_context* pipe, unsigned query_type) { - struct r300_query* q = CALLOC_STRUCT(r300_query); + struct r300_context* r300 = r300_context(pipe); + struct r300_screen* r300screen = r300_screen(r300->context.screen); + unsigned query_size = r300screen->caps->num_frag_pipes * 4; + struct r300_query* q, * qptr; + + q = CALLOC_STRUCT(r300_query); q->type = query_type; assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); - /* XXX this is to force winsys to give us a GTT buffer */ - q->buf = pipe->screen->buffer_create(pipe->screen, 64, - PIPE_BUFFER_USAGE_VERTEX, 64); + q->active = FALSE; + + if (!r300->query_list) { + r300->query_list = q; + } else if (!is_empty_list(r300->query_list)) { + qptr = last_elem(r300->query_list); + q->offset = qptr->offset + query_size; + insert_at_tail(r300->query_list, q); + } + + /* XXX */ + if (q->offset >= 4096) { + q->offset = 0; + } return (struct pipe_query*)q; } @@ -40,6 +56,9 @@ static struct pipe_query* r300_create_query(struct pipe_context* pipe, static void r300_destroy_query(struct pipe_context* pipe, struct pipe_query* query) { + struct r300_query* q = (struct r300_query*)query; + + remove_from_list(q); FREE(query); } @@ -49,15 +68,15 @@ static void r300_begin_query(struct pipe_context* pipe, uint32_t* map; struct r300_context* r300 = r300_context(pipe); struct r300_query* q = (struct r300_query*)query; - CS_LOCALS(r300); - map = pipe_buffer_map(pipe->screen, q->buf, PIPE_BUFFER_USAGE_CPU_WRITE); + map = pipe->screen->buffer_map(pipe->screen, r300->oqbo, + PIPE_BUFFER_USAGE_CPU_WRITE); + map += q->offset / 4; *map = ~0; - pipe_buffer_unmap(pipe->screen, q->buf); + pipe->screen->buffer_unmap(pipe->screen, r300->oqbo); - BEGIN_CS(2); - OUT_CS_REG(R300_ZB_ZPASS_DATA, 0); - END_CS; + r300_emit_dirty_state(r300); + r300_emit_query_begin(r300, q); } static void r300_end_query(struct pipe_context* pipe, @@ -65,12 +84,9 @@ static void r300_end_query(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); struct r300_query* q = (struct r300_query*)query; - CS_LOCALS(r300); - BEGIN_CS(4); - OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(q->buf, 0, 0, RADEON_GEM_DOMAIN_GTT, 0); - END_CS; + r300_emit_dirty_state(r300); + r300_emit_query_end(r300, q); } static boolean r300_get_query_result(struct pipe_context* pipe, @@ -78,6 +94,7 @@ static boolean r300_get_query_result(struct pipe_context* pipe, boolean wait, uint64_t* result) { + struct r300_context* r300 = r300_context(pipe); struct r300_query* q = (struct r300_query*)query; uint32_t* map; uint32_t temp; @@ -89,11 +106,15 @@ static boolean r300_get_query_result(struct pipe_context* pipe, pipe->flush(pipe, 0, NULL); } - map = pipe_buffer_map(pipe->screen, q->buf, PIPE_BUFFER_USAGE_CPU_READ); + + map = pipe->screen->buffer_map(pipe->screen, r300->oqbo, + PIPE_BUFFER_USAGE_CPU_WRITE); + map += q->offset / 4; temp = *map; - pipe_buffer_unmap(pipe->screen, q->buf); + *map = ~0; + pipe->screen->buffer_unmap(pipe->screen, r300->oqbo); - if (temp < 0) { + if (temp == ~0) { /* Our results haven't been written yet... */ return FALSE; } diff --git a/src/gallium/drivers/r300/r300_query.h b/src/gallium/drivers/r300/r300_query.h index 6a7646087a..4f50e8f844 100644 --- a/src/gallium/drivers/r300/r300_query.h +++ b/src/gallium/drivers/r300/r300_query.h @@ -29,13 +29,6 @@ struct r300_context; -struct r300_query { - /* The kind of query. Currently only OQ is supported. */ - unsigned type; - /* Buffer object where we want our results to reside. */ - struct pipe_buffer* buf; -}; - static INLINE struct r300_query* r300_query(struct pipe_query* q) { return (struct r300_query*)q; diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index 6825d99870..03cd219cde 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -3312,6 +3312,10 @@ enum { #define R200_3D_DRAW_IMMD_2 0xC0003500 +/* XXX Oh look, stuff not brought over from docs yet */ + +#define R300_SU_REG_DEST 0x42C8 + #endif /* _R300_REG_H */ /* *INDENT-ON* */ -- cgit v1.2.3 From 0086a84e2df92d48d3fb3361daaa1359d920fb31 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 18 Aug 2009 18:14:22 -0700 Subject: r300g: Utilize DONTBLOCK. Also ALGYRHYTHMS. --- src/gallium/drivers/r300/r300_query.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_query.c b/src/gallium/drivers/r300/r300_query.c index b3a8dc12c8..1d5185b417 100644 --- a/src/gallium/drivers/r300/r300_query.c +++ b/src/gallium/drivers/r300/r300_query.c @@ -95,23 +95,34 @@ static boolean r300_get_query_result(struct pipe_context* pipe, uint64_t* result) { struct r300_context* r300 = r300_context(pipe); + struct r300_screen* r300screen = r300_screen(r300->context.screen); struct r300_query* q = (struct r300_query*)query; + unsigned flags = PIPE_BUFFER_USAGE_CPU_READ; uint32_t* map; uint32_t temp; + unsigned i; if (wait) { - /* Well, we're expected to just sit here and spin, so let's go ahead - * and flush so we can be sure that the card's spinning... */ - /* XXX double-check these params */ pipe->flush(pipe, 0, NULL); + } else { + flags |= PIPE_BUFFER_USAGE_DONTBLOCK; } - - map = pipe->screen->buffer_map(pipe->screen, r300->oqbo, - PIPE_BUFFER_USAGE_CPU_WRITE); + map = pipe->screen->buffer_map(pipe->screen, r300->oqbo, flags); map += q->offset / 4; - temp = *map; - *map = ~0; + for (i = 0; i < r300screen->caps->num_frag_pipes; i++) { + if (*map == ~0) { + /* Looks like our results aren't ready yet. */ + if (wait) { + debug_printf("r300: Despite waiting, OQ results haven't" + " come in yet.\n"); + } + temp = ~0; + break; + } + temp += *map; + map++; + } pipe->screen->buffer_unmap(pipe->screen, r300->oqbo); if (temp == ~0) { -- cgit v1.2.3 From e327845e2b72936c60a143d46a52dbbe81afdd72 Mon Sep 17 00:00:00 2001 From: Corbin Simpson Date: Tue, 18 Aug 2009 21:22:30 -0700 Subject: r300g: Force off ZTOP optimizations for now. --- src/gallium/drivers/r300/r300_state.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index a02fb34b2a..27680a3863 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -224,7 +224,8 @@ static void* dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f, 0, 1023); } else { - dsa->z_buffer_top = R300_ZTOP_ENABLE; + /* XXX need to fix this to be dynamically set + dsa->z_buffer_top = R300_ZTOP_ENABLE; */ } return (void*)dsa; -- cgit v1.2.3 From 7ee4f32dcdd4cc935ed48ffb46ecc6678047958e Mon Sep 17 00:00:00 2001 From: Cooper Yuan Date: Mon, 24 Aug 2009 13:56:23 +0800 Subject: r300g: Set the vector address in the input memory for bypass_vs_clip_and_viewport case --- src/gallium/drivers/r300/r300_state_derived.c | 36 +++++++++++++++------------ 1 file changed, 20 insertions(+), 16 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index ea670f41fb..c01e61a9b1 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -49,59 +49,63 @@ static void r300_vs_tab_routes(struct r300_context* r300, assert(info->num_inputs <= 16); - if (r300screen->caps->has_tcl) { - /* Just copy vert attribs over as-is. */ + if (!r300screen->caps->has_tcl || !r300->rs_state->enable_vte) + { for (i = 0; i < info->num_inputs; i++) { - tab[i] = i; - } - for (i = 0; i < info->num_outputs; i++) { - switch (info->output_semantic_name[i]) { + switch (info->input_semantic_name[i]) { case TGSI_SEMANTIC_POSITION: pos = TRUE; + tab[i] = 0; break; case TGSI_SEMANTIC_COLOR: + tab[i] = 2 + cols; cols++; break; case TGSI_SEMANTIC_PSIZE: psize = TRUE; + tab[i] = 15; break; case TGSI_SEMANTIC_FOG: fog = TRUE; /* Fall through */ case TGSI_SEMANTIC_GENERIC: + tab[i] = 6 + texs; texs++; break; default: - debug_printf("r300: Unknown vertex output %d\n", - info->output_semantic_name[i]); + debug_printf("r300: Unknown vertex input %d\n", + info->input_semantic_name[i]); break; } } - } else { + } + else + { + /* Just copy vert attribs over as-is. */ for (i = 0; i < info->num_inputs; i++) { - switch (info->input_semantic_name[i]) { + tab[i] = i; + } + + for (i = 0; i < info->num_outputs; i++) { + switch (info->output_semantic_name[i]) { case TGSI_SEMANTIC_POSITION: pos = TRUE; - tab[i] = 0; break; case TGSI_SEMANTIC_COLOR: - tab[i] = 2 + cols; cols++; break; case TGSI_SEMANTIC_PSIZE: psize = TRUE; - tab[i] = 15; break; case TGSI_SEMANTIC_FOG: fog = TRUE; /* Fall through */ case TGSI_SEMANTIC_GENERIC: - tab[i] = 6 + texs; texs++; break; default: - debug_printf("r300: Unknown vertex input %d\n", - info->input_semantic_name[i]); + debug_printf("r300: Unknown vertex output %d\n", + info->output_semantic_name[i]); break; } } -- cgit v1.2.3 From ba87cbf2be04d9d14d7e0b6d40508edadd4705e9 Mon Sep 17 00:00:00 2001 From: Cooper Yuan Date: Thu, 27 Aug 2009 17:46:59 +0800 Subject: r300g: Correct scissor setting, subtract 1 from window's width and height --- src/gallium/drivers/r300/r300_state.c | 8 ++++---- src/gallium/drivers/r300/r300_surface.c | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 27680a3863..c16cadd040 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -538,16 +538,16 @@ static void r300_set_scissor_state(struct pipe_context* pipe, (state->minx << R300_SCISSORS_X_SHIFT) | (state->miny << R300_SCISSORS_Y_SHIFT); r300->scissor_state->scissor_bottom_right = - (state->maxx << R300_SCISSORS_X_SHIFT) | - (state->maxy << R300_SCISSORS_Y_SHIFT); + ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) | + ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT); } else { /* Offset of 1440 in non-R500 chipsets. */ r300->scissor_state->scissor_top_left = ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) | ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT); r300->scissor_state->scissor_bottom_right = - ((state->maxx + 1440) << R300_SCISSORS_X_SHIFT) | - ((state->maxy + 1440) << R300_SCISSORS_Y_SHIFT); + (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) | + (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT); } r300->dirty_state |= R300_NEW_SCISSOR; diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c index a093f83945..96e6e4a77d 100644 --- a/src/gallium/drivers/r300/r300_surface.c +++ b/src/gallium/drivers/r300/r300_surface.c @@ -58,13 +58,13 @@ static void r300_surface_setup(struct r300_context* r300, OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); if (caps->is_r500) { OUT_CS((x << R300_SCISSORS_X_SHIFT) | (y << R300_SCISSORS_Y_SHIFT)); - OUT_CS((w << R300_SCISSORS_X_SHIFT) | (h << R300_SCISSORS_Y_SHIFT)); + OUT_CS(((w - 1) << R300_SCISSORS_X_SHIFT) | ((h - 1) << R300_SCISSORS_Y_SHIFT)); } else { /* Non-R500 chipsets have an offset of 1440 in their scissors. */ OUT_CS(((x + 1440) << R300_SCISSORS_X_SHIFT) | ((y + 1440) << R300_SCISSORS_Y_SHIFT)); - OUT_CS(((w + 1440) << R300_SCISSORS_X_SHIFT) | - ((h + 1440) << R300_SCISSORS_Y_SHIFT)); + OUT_CS((((w - 1) + 1440) << R300_SCISSORS_X_SHIFT) | + (((h - 1) + 1440) << R300_SCISSORS_Y_SHIFT)); } /* Flush colorbuffer and blend caches. */ -- cgit v1.2.3 From 165e87c49180380b67b096211b4c5f9670e3020a Mon Sep 17 00:00:00 2001 From: Cooper Yuan Date: Tue, 1 Sep 2009 17:59:03 +0800 Subject: r300g: Fix clear issue on r300 --- src/gallium/drivers/r300/r300_surface.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h index d01f0b143f..f9e98b2ec9 100644 --- a/src/gallium/drivers/r300/r300_surface.h +++ b/src/gallium/drivers/r300/r300_surface.h @@ -73,9 +73,9 @@ static struct r300_rs_state rs_clear_state = { }; static struct r300_rs_block r3xx_rs_block_clear_state = { - .ip[0] = R500_RS_SEL_S(R300_RS_SEL_K0) | - R500_RS_SEL_T(R300_RS_SEL_K0) | - R500_RS_SEL_R(R300_RS_SEL_K0) | + .ip[0] = R500_RS_SEL_S(R300_RS_SEL_C0) | + R500_RS_SEL_T(R300_RS_SEL_C0) | + R500_RS_SEL_R(R300_RS_SEL_C0) | R500_RS_SEL_Q(R300_RS_SEL_K1), .inst[0] = R300_RS_INST_COL_CN_WRITE, .count = R300_IT_COUNT(0) | R300_IC_COUNT(1) | R300_HIRES_EN, -- cgit v1.2.3 From b3f4b56a3b7f979c631358caefed635c6ec56453 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Tue, 1 Sep 2009 17:29:24 +0100 Subject: tgsi: remove redundant CND0 opcode Can be implemented with CMP src2, src1, src0 --- src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt | 6 +----- src/gallium/auxiliary/tgsi/tgsi_exec.c | 10 ---------- src/gallium/auxiliary/tgsi/tgsi_info.c | 2 +- src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h | 1 - src/gallium/auxiliary/tgsi/tgsi_sse2.c | 4 ---- src/gallium/drivers/cell/spu/spu_exec.c | 4 ---- src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c | 4 ---- src/gallium/drivers/r300/r300_tgsi_to_rc.c | 1 - src/gallium/include/pipe/p_shader_tokens.h | 2 +- 9 files changed, 3 insertions(+), 31 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt b/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt index 802ec37118..a989514b75 100644 --- a/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt +++ b/src/gallium/auxiliary/tgsi/tgsi-instruction-set.txt @@ -187,11 +187,7 @@ TGSI Instruction Specification 1.2.6 CND0 - Condition Zero - dst.x = (src2.x >= 0.0) ? src0.x : src1.x - dst.y = (src2.y >= 0.0) ? src0.y : src1.y - dst.z = (src2.z >= 0.0) ? src0.z : src1.z - dst.w = (src2.w >= 0.0) ? src0.w : src1.w - + Removed. Use (CMP src2, src1, src0) instead. 1.2.7 DOT2ADD - 2-component Dot Product And Add diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c index 711e86d6ed..d3ffd4a85f 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_exec.c +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c @@ -2329,16 +2329,6 @@ exec_instruction( } break; - case TGSI_OPCODE_CND0: - FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) { - FETCH(&r[0], 0, chan_index); - FETCH(&r[1], 1, chan_index); - FETCH(&r[2], 2, chan_index); - micro_le(&r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[2], &r[0], &r[1]); - STORE(&r[0], 0, chan_index); - } - break; - case TGSI_OPCODE_DP2A: FETCH( &r[0], 0, CHAN_X ); FETCH( &r[1], 1, CHAN_X ); diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c index ccf4b205ff..e69cd05213 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_info.c +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c @@ -51,7 +51,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] = { 1, 2, 0, 0, "SUB", TGSI_OPCODE_SUB }, { 1, 3, 0, 0, "LRP", TGSI_OPCODE_LRP }, { 1, 3, 0, 0, "CND", TGSI_OPCODE_CND }, - { 1, 3, 0, 0, "CND0", TGSI_OPCODE_CND0 }, + { 0, 0, 0, 0, "", 20 }, /* removed */ { 1, 3, 0, 0, "DP2A", TGSI_OPCODE_DP2A }, { 0, 0, 0, 0, "", 22 }, /* removed */ { 0, 0, 0, 0, "", 23 }, /* removed */ diff --git a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h index ed594a3e2c..e7bcf4bf75 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h +++ b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h @@ -60,7 +60,6 @@ OP13(MAD) OP12(SUB) OP13(LRP) OP13(CND) -OP13(CND0) OP13(DP2A) OP11(FRC) OP13(CLAMP) diff --git a/src/gallium/auxiliary/tgsi/tgsi_sse2.c b/src/gallium/auxiliary/tgsi/tgsi_sse2.c index 46f2387c15..3cdf8b9f35 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_sse2.c +++ b/src/gallium/auxiliary/tgsi/tgsi_sse2.c @@ -2089,10 +2089,6 @@ emit_instruction( return 0; break; - case TGSI_OPCODE_CND0: - return 0; - break; - case TGSI_OPCODE_DP2A: FETCH( func, *inst, 0, 0, CHAN_X ); /* xmm0 = src[0].x */ FETCH( func, *inst, 1, 1, CHAN_X ); /* xmm1 = src[1].x */ diff --git a/src/gallium/drivers/cell/spu/spu_exec.c b/src/gallium/drivers/cell/spu/spu_exec.c index 6db9501128..0eaae2e451 100644 --- a/src/gallium/drivers/cell/spu/spu_exec.c +++ b/src/gallium/drivers/cell/spu/spu_exec.c @@ -1150,10 +1150,6 @@ exec_instruction( ASSERT (0); break; - case TGSI_OPCODE_CND0: - ASSERT (0); - break; - case TGSI_OPCODE_DP2A: ASSERT (0); break; diff --git a/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c b/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c index bce26607f9..d4d18febec 100644 --- a/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c +++ b/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c @@ -687,10 +687,6 @@ emit_instruction( return 0; break; - case TGSI_OPCODE_CND0: - return 0; - break; - case TGSI_OPCODE_DP2A: tmp0 = emit_fetch( bld, inst, 0, CHAN_X ); /* xmm0 = src[0].x */ tmp1 = emit_fetch( bld, inst, 1, CHAN_X ); /* xmm1 = src[1].x */ diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.c b/src/gallium/drivers/r300/r300_tgsi_to_rc.c index 3adbb715f3..d68a104106 100644 --- a/src/gallium/drivers/r300/r300_tgsi_to_rc.c +++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.c @@ -53,7 +53,6 @@ static unsigned translate_opcode(unsigned opcode) case TGSI_OPCODE_SUB: return OPCODE_SUB; case TGSI_OPCODE_LRP: return OPCODE_LRP; /* case TGSI_OPCODE_CND: return OPCODE_CND; */ - /* case TGSI_OPCODE_CND0: return OPCODE_CND0; */ case TGSI_OPCODE_DP2A: return OPCODE_DP2A; /* gap */ case TGSI_OPCODE_FRC: return OPCODE_FRC; diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h index f0ba4fb308..5fa6c9af30 100644 --- a/src/gallium/include/pipe/p_shader_tokens.h +++ b/src/gallium/include/pipe/p_shader_tokens.h @@ -184,7 +184,7 @@ union tgsi_immediate_data #define TGSI_OPCODE_SUB 17 #define TGSI_OPCODE_LRP 18 #define TGSI_OPCODE_CND 19 -#define TGSI_OPCODE_CND0 20 + /* gap */ #define TGSI_OPCODE_DP2A 21 /* gap */ #define TGSI_OPCODE_FRC 24 -- cgit v1.2.3 From e938d4a0535a6dc18c170ac40585424754961cc4 Mon Sep 17 00:00:00 2001 From: Cooper Yuan Date: Thu, 3 Sep 2009 17:06:18 +0800 Subject: r300g: specify point/line/triangle have stuffed texture coord --- src/gallium/drivers/r300/r300_state_invariant.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 1e92374a4e..7d822fec48 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -38,7 +38,9 @@ void r300_emit_invariant_state(struct r300_context* r300) /*** Graphics Backend (GB) ***/ /* Various GB enables */ - OUT_CS_REG(R300_GB_ENABLE, 0x0); + OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | + R300_GB_LINE_STUFF_ENABLE | + R300_GB_TRIANGLE_STUFF_ENABLE); /* Subpixel multisampling for AA * These are commented out because glisse's CS checker doesn't like them. * I presume these will be re-enabled later. -- cgit v1.2.3 From 8f990f928b1d6cb395ea4f3d4c1d7e3a670f1ad6 Mon Sep 17 00:00:00 2001 From: Cooper Yuan Date: Sat, 5 Sep 2009 10:26:39 +0800 Subject: r300g: need to validate scissor and viewport state if bind new rasterizer --- src/gallium/drivers/r300/r300_state.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index c16cadd040..5642aed663 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -429,6 +429,8 @@ static void r300_bind_rs_state(struct pipe_context* pipe, void* state) r300->rs_state = rs; r300->dirty_state |= R300_NEW_RASTERIZER; + r300->dirty_state |= R300_NEW_SCISSOR; + r300->dirty_state |= R300_NEW_VIEWPORT; } /* Free rasterizer state. */ -- cgit v1.2.3 From 80ea03bd174ab7824c754faa9944d7736bf513f2 Mon Sep 17 00:00:00 2001 From: Cooper Yuan Date: Sat, 5 Sep 2009 14:26:39 +0800 Subject: r300g: update rs_block state after changing rasterizer --- src/gallium/drivers/r300/r300_state.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 5642aed663..81808017f8 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -429,6 +429,7 @@ static void r300_bind_rs_state(struct pipe_context* pipe, void* state) r300->rs_state = rs; r300->dirty_state |= R300_NEW_RASTERIZER; + r300->dirty_state |= R300_NEW_RS_BLOCK; r300->dirty_state |= R300_NEW_SCISSOR; r300->dirty_state |= R300_NEW_VIEWPORT; } -- cgit v1.2.3 From 9778731732b4753e79a1b786c65325a52392411d Mon Sep 17 00:00:00 2001 From: Cooper Yuan Date: Sat, 5 Sep 2009 20:58:32 +0800 Subject: r300g: update the value of register VAP_VF_MAX_VTX_INDX according to actual vertex index count. --- src/gallium/drivers/r300/r300_render.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index cd458d019a..aced4ab887 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -233,7 +233,8 @@ static void r300_render_draw(struct vbuf_render* render, OUT_CS_INDEX_RELOC(index_buffer, 0, count, RADEON_GEM_DOMAIN_GTT, 0, 0); END_CS; */ - BEGIN_CS(2 + (count+1)/2); + BEGIN_CS(4 + (count+1)/2); + OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | r300render->hwprim); -- cgit v1.2.3 From 4b01e6f614052e48971f2b2ff474fb66afc4f752 Mon Sep 17 00:00:00 2001 From: Nicolai Hähnle Date: Sun, 6 Sep 2009 15:03:51 +0200 Subject: r300g: Debug flags infrastructure So that debugging is no longer a full-spam-or-nothing approach, you are now supposed to set the RADEON_DEBUG environment flag just like for classic Mesa. The available debug flags are different, however. Just running an OpenGL application with RADEON_DEBUG set to an arbitrary string will print out helpful information. Everything must be compiled with -DDEBUG for any of this to work --- src/gallium/drivers/r300/Makefile | 1 + src/gallium/drivers/r300/r300_context.c | 2 + src/gallium/drivers/r300/r300_context.h | 39 ++++++++++++ src/gallium/drivers/r300/r300_cs.h | 19 +++--- src/gallium/drivers/r300/r300_debug.c | 88 +++++++++++++++++++++++++++ src/gallium/drivers/r300/r300_emit.c | 2 +- src/gallium/drivers/r300/r300_fs.c | 2 +- src/gallium/drivers/r300/r300_render.c | 6 +- src/gallium/drivers/r300/r300_state_derived.c | 12 ++-- src/gallium/drivers/r300/r300_vs.c | 2 +- 10 files changed, 152 insertions(+), 21 deletions(-) create mode 100644 src/gallium/drivers/r300/r300_debug.c (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index d7a2c8c462..93c2152edc 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -9,6 +9,7 @@ C_SOURCES = \ r300_chipset.c \ r300_clear.c \ r300_context.c \ + r300_debug.c \ r300_emit.c \ r300_flush.c \ r300_fs.c \ diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index da67bc29b8..ef79d7bbbb 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -146,6 +146,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.winsys = (struct pipe_winsys*)r300_winsys; r300->context.screen = r300_screen(screen); + r300_init_debug(r300); + r300->context.destroy = r300_destroy_context; r300->context.clear = r300_clear; diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index f78492d4aa..cd7b36b467 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -275,6 +275,9 @@ struct r300_context { uint32_t dirty_state; /* Flag indicating whether or not the HW is dirty. */ uint32_t dirty_hw; + + /** Combination of DBG_xxx flags */ + unsigned debug; }; /* Convenience cast wrapper. */ @@ -288,4 +291,40 @@ struct draw_stage* r300_draw_stage(struct r300_context* r300); void r300_init_state_functions(struct r300_context* r300); void r300_init_surface_functions(struct r300_context* r300); +/* Debug functionality. */ + +/** + * Debug flags to disable/enable certain groups of debugging outputs. + * + * \note These may be rather coarse, and the grouping may be impractical. + * If you find, while debugging the driver, that a different grouping + * of these flags would be beneficial, just feel free to change them + * but make sure to update the documentation in r300_debug.c to reflect + * those changes. + */ +/*@{*/ +#define DBG_HELP 0x0000001 +#define DBG_FP 0x0000002 +#define DBG_VP 0x0000004 +#define DBG_CS 0x0000008 +#define DBG_DRAW 0x0000010 +/*@}*/ + +static INLINE boolean DBG_ON(struct r300_context * ctx, unsigned flags) +{ + return (ctx->debug & flags) ? true : false; +} + +static INLINE void DBG(struct r300_context * ctx, unsigned flags, const char * fmt, ...) +{ + if (DBG_ON(ctx, flags)) { + va_list va; + va_start(va, fmt); + debug_vprintf(fmt, va); + va_end(va); + } +} + +void r300_init_debug(struct r300_context * ctx); + #endif /* R300_CONTEXT_H */ diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 71b142c0db..0a7e470363 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -49,7 +49,8 @@ (RADEON_CP_PACKET0 | ((count) << 16) | ((register) >> 2)) #define CS_LOCALS(context) \ - struct r300_winsys* cs_winsys = context->winsys; \ + struct r300_context* const cs_context_copy = (context); \ + struct r300_winsys* cs_winsys = cs_context_copy->winsys; \ int cs_count = 0; #define CHECK_CS(size) \ @@ -58,7 +59,7 @@ #define BEGIN_CS(size) do { \ CHECK_CS(size); \ if (VERY_VERBOSE_CS) { \ - debug_printf("r300: BEGIN_CS, count %d, in %s (%s:%d)\n", \ + DBG(cs_context_copy, DBG_CS, "r300: BEGIN_CS, count %d, in %s (%s:%d)\n", \ size, __FUNCTION__, __FILE__, __LINE__); \ } \ cs_winsys->begin_cs(cs_winsys, (size), \ @@ -78,7 +79,7 @@ #define OUT_CS_REG(register, value) do { \ if (VERY_VERBOSE_REGISTERS) \ - debug_printf("r300: writing 0x%08X to register 0x%04X\n", \ + DBG(cs_context_copy, DBG_CS, "r300: writing 0x%08X to register 0x%04X\n", \ value, register); \ assert(register); \ OUT_CS(CP_PACKET0(register, 0)); \ @@ -89,14 +90,14 @@ * not the actual packet0 count! */ #define OUT_CS_REG_SEQ(register, count) do { \ if (VERY_VERBOSE_REGISTERS) \ - debug_printf("r300: writing register sequence of %d to 0x%04X\n", \ + DBG(cs_context_copy, DBG_CS, "r300: writing register sequence of %d to 0x%04X\n", \ count, register); \ assert(register); \ OUT_CS(CP_PACKET0(register, ((count) - 1))); \ } while (0) #define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ - debug_printf("r300: writing relocation for buffer %p, offset %d, " \ + DBG(cs_context_copy, DBG_CS, "r300: writing relocation for buffer %p, offset %d, " \ "domains (%d, %d, %d)\n", \ bo, offset, rd, wd, flags); \ assert(bo); \ @@ -107,7 +108,7 @@ #define END_CS do { \ if (VERY_VERBOSE_CS) { \ - debug_printf("r300: END_CS in %s (%s:%d)\n", __FUNCTION__, \ + DBG(cs_context_copy, DBG_CS, "r300: END_CS in %s (%s:%d)\n", __FUNCTION__, \ __FILE__, __LINE__); \ } \ if (cs_count != 0) \ @@ -117,7 +118,7 @@ #define FLUSH_CS do { \ if (VERY_VERBOSE_CS) { \ - debug_printf("r300: FLUSH_CS in %s (%s:%d)\n\n", __FUNCTION__, \ + DBG(cs_context_copy, DBG_CS, "r300: FLUSH_CS in %s (%s:%d)\n\n", __FUNCTION__, \ __FILE__, __LINE__); \ } \ cs_winsys->flush_cs(cs_winsys); \ @@ -127,7 +128,7 @@ #define OUT_CS_ONE_REG(register, count) do { \ if (VERY_VERBOSE_REGISTERS) \ - debug_printf("r300: writing data sequence of %d to 0x%04X\n", \ + DBG(cs_context_copy, DBG_CS, "r300: writing data sequence of %d to 0x%04X\n", \ count, register); \ assert(register); \ OUT_CS(CP_PACKET0(register, ((count) - 1)) | RADEON_ONE_REG_WR); \ @@ -141,7 +142,7 @@ } while (0) #define OUT_CS_INDEX_RELOC(bo, offset, count, rd, wd, flags) do { \ - debug_printf("r300: writing relocation for index buffer %p," \ + DBG(cs_context_copy, DBG_CS, "r300: writing relocation for index buffer %p," \ "offset %d\n", bo, offset); \ assert(bo); \ OUT_CS(offset); \ diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c new file mode 100644 index 0000000000..15308dda1d --- /dev/null +++ b/src/gallium/drivers/r300/r300_debug.c @@ -0,0 +1,88 @@ +/* + * Copyright 2009 Nicolai Haehnle + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_context.h" + +#include + + +struct debug_option { + const char * name; + unsigned flag; + const char * description; +}; + +static struct debug_option debug_options[] = { + { "help", DBG_HELP, "Helpful meta-information about the driver" }, + { "fp", DBG_FP, "Fragment program handling" }, + { "vp", DBG_VP, "Vertex program handling" }, + { "cs", DBG_CS, "Command submissions" }, + { "draw", DBG_DRAW, "Draw and emit" }, + + { "all", ~0, "Convenience option that enables all debug flags" }, + + /* must be last */ + { 0, 0, 0 } +}; + +void r300_init_debug(struct r300_context * ctx) +{ + const char * options = debug_get_option("RADEON_DEBUG", 0); + boolean printhint = false; + + if (options) { + while(*options) { + if (*options == ' ' || *options == ',') { + options++; + continue; + } + + size_t length = strcspn(options, " ,"); + struct debug_option * opt; + + for(opt = debug_options; opt->name; ++opt) { + if (!strncmp(options, opt->name, length)) { + ctx->debug |= opt->flag; + break; + } + } + + if (!opt->name) { + debug_printf("Unknown debug option: %s\n", options); + printhint = true; + } + + options += length; + } + + if (!ctx->debug) + printhint = true; + } + + if (printhint || ctx->debug & DBG_HELP) { + debug_printf("You can enable debug output by setting the RADEON_DEBUG environment variable\n" + "to a comma-separated list of debug options. Available options are:\n"); + for(struct debug_option * opt = debug_options; opt->name; ++opt) { + debug_printf(" %s: %s\n", opt->name, opt->description); + } + } +} diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index bd4d59e6f1..f77df22326 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -490,7 +490,7 @@ void r300_emit_vertex_buffer(struct r300_context* r300) { CS_LOCALS(r300); - debug_printf("r300: Preparing vertex buffer %p for render, " + DBG(r300, DBG_DRAW, "r300: Preparing vertex buffer %p for render, " "vertex size %d\n", r300->vbo, r300->vertex_info.vinfo.size); /* Set the pointer to our vertex buffer. The emitted values are this: diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c index 36463b9a2e..a0e848a59a 100644 --- a/src/gallium/drivers/r300/r300_fs.c +++ b/src/gallium/drivers/r300/r300_fs.c @@ -96,7 +96,7 @@ void r300_translate_fragment_shader(struct r300_context* r300, memset(&compiler, 0, sizeof(compiler)); rc_init(&compiler.Base); - compiler.Base.Debug = 1; + compiler.Base.Debug = DBG_ON(r300, DBG_FP); compiler.code = &fs->code; compiler.is_r500 = r300_screen(r300->context.screen)->caps->is_r500; diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index aced4ab887..df511abfd9 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -34,7 +34,7 @@ struct r300_render { /* Parent class */ struct vbuf_render base; - + /* Pipe context */ struct r300_context* r300; @@ -77,7 +77,7 @@ static boolean r300_render_allocate_vertices(struct vbuf_render* render, if (r300render->vbo && (size > r300render->vbo_alloc_size)) { pipe_buffer_reference(&r300render->vbo, NULL); } - + if (!r300render->vbo) { r300render->vbo = pipe_buffer_create(screen, 64, @@ -184,7 +184,7 @@ static void r300_render_draw_arrays(struct vbuf_render* render, prepare_render(r300render, count); - debug_printf("r300: Doing vbuf render, count %d\n", count); + DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count); BEGIN_CS(2); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index c01e61a9b1..94e3ce085c 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -195,13 +195,13 @@ static void r300_vertex_psc(struct r300_context* r300, * and not on attrib information. */ if (r300screen->caps->has_tcl) { attrib_count = r300->vs->info.num_inputs; - debug_printf("r300: routing %d attribs in psc for vs\n", + DBG(r300, DBG_DRAW, "r300: routing %d attribs in psc for vs\n", attrib_count); } else { attrib_count = vinfo->num_attribs; - debug_printf("r300: attrib count: %d\n", attrib_count); + DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count); for (i = 0; i < attrib_count; i++) { - debug_printf("r300: attrib: offset %d, interp %d, size %d," + DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d," " tab %d\n", vinfo->attrib[i].src_index, vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit, tab[i]); @@ -299,18 +299,18 @@ static void r300_update_fs_tab(struct r300_context* r300) } /* Now that we know where everything is... */ - debug_printf("r300: fp input count: %d\n", info->num_inputs); + DBG(r300, DBG_DRAW, "r300: fp input count: %d\n", info->num_inputs); for (i = 0; i < info->num_inputs; i++) { switch (tab[i]) { case INTERP_LINEAR: - debug_printf("r300: attrib: " + DBG(r300, DBG_DRAW, "r300: attrib: " "stack offset %d, color, tab %d\n", i, cols_emitted); tab[i] = cols_emitted; cols_emitted++; break; case INTERP_PERSPECTIVE: - debug_printf("r300: attrib: " + DBG(r300, DBG_DRAW, "r300: attrib: " "stack offset %d, texcoord, tab %d\n", i, cols + texs); tab[i] = cols + texs; diff --git a/src/gallium/drivers/r300/r300_vs.c b/src/gallium/drivers/r300/r300_vs.c index 2cb903bba2..12a6e37be6 100644 --- a/src/gallium/drivers/r300/r300_vs.c +++ b/src/gallium/drivers/r300/r300_vs.c @@ -116,7 +116,7 @@ void r300_translate_vertex_shader(struct r300_context* r300, /* Setup the compiler */ rc_init(&compiler.Base); - compiler.Base.Debug = 1; + compiler.Base.Debug = DBG_ON(r300, DBG_VP); compiler.code = &vs->code; compiler.UserData = vs; -- cgit v1.2.3 From 1ddb22675c123fc955ad3ab46bba45d3330d2ec4 Mon Sep 17 00:00:00 2001 From: Nicolai Hähnle Date: Sun, 6 Sep 2009 15:10:59 +0200 Subject: r300g: Fix a number of warnings Seriously guys.... --- src/gallium/drivers/r300/r300_context.c | 3 +++ src/gallium/drivers/r300/r300_context.h | 5 +---- src/gallium/drivers/r300/r300_emit.c | 1 + src/gallium/drivers/r300/r300_emit.h | 5 +++++ src/gallium/drivers/r300/r300_query.c | 2 ++ src/gallium/drivers/r300/r300_render.c | 1 + src/gallium/drivers/r300/r300_state.c | 3 ++- src/gallium/drivers/r300/r300_state_derived.c | 1 + src/gallium/drivers/r300/r300_state_derived.h | 6 +----- src/gallium/drivers/r300/r300_state_invariant.c | 6 ++++++ 10 files changed, 23 insertions(+), 10 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index ef79d7bbbb..9cc455135d 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -22,6 +22,9 @@ #include "r300_context.h" +#include "r300_flush.h" +#include "r300_state_invariant.h" + static boolean r300_draw_range_elements(struct pipe_context* pipe, struct pipe_buffer* indexBuffer, unsigned indexSize, diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index cd7b36b467..6c5914baa3 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -211,10 +211,7 @@ struct r300_vertex_format { int fs_tab[16]; }; -static struct pipe_viewport_state r300_viewport_identity = { - .scale = {1.0, 1.0, 1.0, 1.0}, - .translate = {0.0, 0.0, 0.0, 0.0}, -}; +extern struct pipe_viewport_state r300_viewport_identity; struct r300_context { /* Parent class */ diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index f77df22326..1bc35c2486 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -25,6 +25,7 @@ #include "r300_emit.h" #include "r300_fs.h" +#include "r300_state_derived.h" #include "r300_vs.h" void r300_emit_blend_state(struct r300_context* r300, diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 350691d592..c4002b8e5d 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -56,6 +56,11 @@ void r500_emit_fragment_program_code(struct r300_context* r300, void r300_emit_fb_state(struct r300_context* r300, struct pipe_framebuffer_state* fb); +void r300_emit_query_begin(struct r300_context* r300, + struct r300_query* query); +void r300_emit_query_end(struct r300_context* r300, + struct r300_query* query); + void r300_emit_rs_state(struct r300_context* r300, struct r300_rs_state* rs); void r300_emit_rs_block_state(struct r300_context* r300, diff --git a/src/gallium/drivers/r300/r300_query.c b/src/gallium/drivers/r300/r300_query.c index 1d5185b417..2880d34877 100644 --- a/src/gallium/drivers/r300/r300_query.c +++ b/src/gallium/drivers/r300/r300_query.c @@ -22,6 +22,8 @@ #include "r300_query.h" +#include "r300_emit.h" + static struct pipe_query* r300_create_query(struct pipe_context* pipe, unsigned query_type) { diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index df511abfd9..d05a736dd9 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -26,6 +26,7 @@ #include "r300_cs.h" #include "r300_context.h" +#include "r300_emit.h" #include "r300_reg.h" #include "r300_state_derived.h" diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 81808017f8..88cb9af6fb 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -20,10 +20,11 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#include "util/u_debug.h" #include "util/u_math.h" #include "util/u_pack_color.h" -#include "util/u_debug.h" +#include "tgsi/tgsi_parse.h" #include "pipe/p_config.h" #include "pipe/internal/p_winsys_screen.h" diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 94e3ce085c..5f6b225d34 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -23,6 +23,7 @@ #include "r300_state_derived.h" #include "r300_fs.h" +#include "r300_state_inlines.h" #include "r300_vs.h" /* r300_state_derived: Various bits of state which are dependent upon diff --git a/src/gallium/drivers/r300/r300_state_derived.h b/src/gallium/drivers/r300/r300_state_derived.h index 63ae8eb8d0..71a4a47b00 100644 --- a/src/gallium/drivers/r300/r300_state_derived.h +++ b/src/gallium/drivers/r300/r300_state_derived.h @@ -23,11 +23,7 @@ #ifndef R300_STATE_DERIVED_H #define R300_STATE_DERIVED_H -#include "draw/draw_vertex.h" - -#include "r300_context.h" -#include "r300_reg.h" -#include "r300_state_inlines.h" +struct r300_context; void r300_update_derived_state(struct r300_context* r300); diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 7d822fec48..3865730d63 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -23,6 +23,12 @@ #include "r300_state_invariant.h" + +struct pipe_viewport_state r300_viewport_identity = { + .scale = {1.0, 1.0, 1.0, 1.0}, + .translate = {0.0, 0.0, 0.0, 0.0}, +}; + /* Calculate and emit invariant state. This is data that the 3D engine * will probably want at the beginning of every CS, but it's not currently * handled by any CSO setup, and in addition it doesn't really change much. -- cgit v1.2.3 From 622b31925b6a68b496cd65c627b8a1ed7e811cc3 Mon Sep 17 00:00:00 2001 From: Cooper Yuan Date: Fri, 11 Sep 2009 23:21:28 +0800 Subject: r300g: only allocate one BO for vertex buffers, default size is 64*1024 it can fix redbook/sceneflat, scene, scenebamb, surface, nurbs and so on --- src/gallium/drivers/r300/r300_render.c | 68 +++++++++++++++++----------------- 1 file changed, 33 insertions(+), 35 deletions(-) (limited to 'src/gallium/drivers/r300') diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index d05a736dd9..737396d8d9 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -31,6 +31,7 @@ #include "r300_state_derived.h" /* r300_render: Vertex and index buffer primitive emission. */ +#define R300_MAX_VBO_SIZE (1024 * 1024) struct r300_render { /* Parent class */ @@ -46,7 +47,10 @@ struct r300_render { /* VBO */ struct pipe_buffer* vbo; - size_t vbo_alloc_size; + size_t vbo_size; + size_t vbo_offset; + size_t vbo_max_used; + void * vbo_ptr; }; static INLINE struct r300_render* @@ -75,19 +79,18 @@ static boolean r300_render_allocate_vertices(struct vbuf_render* render, struct pipe_screen* screen = r300->context.screen; size_t size = (size_t)vertex_size * (size_t)count; - if (r300render->vbo && (size > r300render->vbo_alloc_size)) { - pipe_buffer_reference(&r300render->vbo, NULL); - } - - if (!r300render->vbo) { + if (size + r300render->vbo_offset > r300render->vbo_size) + { r300render->vbo = pipe_buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, - size); + R300_MAX_VBO_SIZE); + r300render->vbo_size = R300_MAX_VBO_SIZE; } - r300render->vbo_alloc_size = MAX2(size, r300render->vbo_alloc_size); r300render->vertex_size = vertex_size; + r300->vbo = r300render->vbo; + r300->vbo_offset = r300render->vbo_offset; return (r300render->vbo) ? TRUE : FALSE; } @@ -97,8 +100,10 @@ static void* r300_render_map_vertices(struct vbuf_render* render) struct r300_render* r300render = r300_render(render); struct pipe_screen* screen = r300render->r300->context.screen; - return (unsigned char*)pipe_buffer_map(screen, r300render->vbo, - PIPE_BUFFER_USAGE_CPU_WRITE); + r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo, + PIPE_BUFFER_USAGE_CPU_WRITE); + + return (r300render->vbo_ptr + r300render->vbo_offset); } static void r300_render_unmap_vertices(struct vbuf_render* render, @@ -107,15 +112,24 @@ static void r300_render_unmap_vertices(struct vbuf_render* render, { struct r300_render* r300render = r300_render(render); struct pipe_screen* screen = r300render->r300->context.screen; + CS_LOCALS(r300render->r300); + BEGIN_CS(2); + OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max); + END_CS; + r300render->vbo_max_used = MAX2(r300render->vbo_max_used, + r300render->vertex_size * (max + 1)); pipe_buffer_unmap(screen, r300render->vbo); } static void r300_render_release_vertices(struct vbuf_render* render) { struct r300_render* r300render = r300_render(render); + struct r300_context* r300 = r300render->r300; - pipe_buffer_reference(&r300render->vbo, NULL); + r300render->vbo_offset += r300render->vbo_max_used; + r300render->vbo_max_used = 0; + r300->vbo = NULL; } static boolean r300_render_set_primitive(struct vbuf_render* render, @@ -163,14 +177,12 @@ static boolean r300_render_set_primitive(struct vbuf_render* render, return TRUE; } -static void prepare_render(struct r300_render* render, unsigned count) +static void r300_prepare_render(struct r300_render* render, unsigned count) { struct r300_context* r300 = render->r300; CS_LOCALS(r300); - r300->vbo = render->vbo; - r300_emit_dirty_state(r300); } @@ -183,7 +195,7 @@ static void r300_render_draw_arrays(struct vbuf_render* render, CS_LOCALS(r300); - prepare_render(r300render, count); + r300_prepare_render(r300render, count); DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count); @@ -208,7 +220,7 @@ static void r300_render_draw(struct vbuf_render* render, CS_LOCALS(r300); - prepare_render(r300render, count); + r300_prepare_render(r300render, count); /* Send our indices into an index buffer. */ index_buffer = pipe_buffer_create(screen, 64, PIPE_BUFFER_USAGE_VERTEX, @@ -217,25 +229,7 @@ static void r300_render_draw(struct vbuf_render* render, return; } -/* - index_map = pipe_buffer_map(screen, index_buffer, - PIPE_BUFFER_USAGE_CPU_WRITE); - memcpy(index_map, indices, count); - pipe_buffer_unmap(screen, index_buffer); - - debug_printf("r300: Doing indexbuf render, count %d\n", count); - - BEGIN_CS(8); - OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); - OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | - r300render->hwprim); - OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); - OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2)); - OUT_CS_INDEX_RELOC(index_buffer, 0, count, RADEON_GEM_DOMAIN_GTT, 0, 0); - END_CS; */ - - BEGIN_CS(4 + (count+1)/2); - OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count); + BEGIN_CS(2 + (count+1)/2); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | r300render->hwprim); @@ -273,6 +267,10 @@ static struct vbuf_render* r300_render_create(struct r300_context* r300) r300render->base.release_vertices = r300_render_release_vertices; r300render->base.destroy = r300_render_destroy; + r300render->vbo = NULL; + r300render->vbo_size = 0; + r300render->vbo_offset = 0; + return &r300render->base; } -- cgit v1.2.3