From 05d1d86907b12011fdb80e147ae68b4cd207f789 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 1 Oct 2010 09:43:14 +1000 Subject: r600g: add winsys support for CTL constants. These need to be emitted, we also need them to do proper vtx start, instead of abusing index offset. --- src/gallium/drivers/r600/evergreen_state.c | 2 ++ src/gallium/drivers/r600/evergreend.h | 6 ++++++ src/gallium/drivers/r600/r600_state.c | 2 ++ src/gallium/drivers/r600/r600d.h | 3 +++ 4 files changed, 13 insertions(+) (limited to 'src/gallium/drivers/r600') diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 5775b04cc7..21d3394ca6 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -1450,6 +1450,8 @@ void evergreen_draw(struct pipe_context *ctx, const struct pipe_draw_info *info) r600_pipe_state_add_reg(&vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, 0xFFFFFFFF, NULL); r600_pipe_state_add_reg(&vgt, R_028400_VGT_MAX_VTX_INDX, draw.max_index, 0xFFFFFFFF, NULL); r600_pipe_state_add_reg(&vgt, R_028404_VGT_MIN_VTX_INDX, draw.min_index, 0xFFFFFFFF, NULL); + r600_pipe_state_add_reg(&vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0xFFFFFFFF, NULL); + r600_pipe_state_add_reg(&vgt, R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0xFFFFFFFF, NULL); if (rctx->rasterizer && rctx->framebuffer.zsbuf) { float offset_units = rctx->rasterizer->offset_units; diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h index 54b26f6fb6..ce2b667868 100644 --- a/src/gallium/drivers/r600/evergreend.h +++ b/src/gallium/drivers/r600/evergreend.h @@ -40,6 +40,9 @@ #define EVERGREEN_SAMPLER_OFFSET 0X0003C000 #define EVERGREEN_SAMPLER_END 0X0003CFF0 +#define EVERGREEN_CTL_CONST_OFFSET 0x0003CFF0 +#define EVERGREEN_CTL_CONST_END 0x0003E200 + #define EVENT_TYPE_ZPASS_DONE 0x15 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16 @@ -1890,4 +1893,7 @@ #define R_008970_VGT_NUM_INDICES 0x008970 #define R_0287F0_VGT_DRAW_INITIATOR 0x0287F0 +#define R_03CFF0_SQ_VTX_BASE_VTX_LOC 0x03CFF0 +#define R_03CFF4_SQ_VTX_START_INST_LOC 0x03CFF4 + #endif diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 83eedd2040..c86bad7ff5 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -126,6 +126,8 @@ static void r600_draw_common(struct r600_drawl *draw) r600_pipe_state_add_reg(&vgt, R_028400_VGT_MAX_VTX_INDX, draw->max_index, 0xFFFFFFFF, NULL); r600_pipe_state_add_reg(&vgt, R_028404_VGT_MIN_VTX_INDX, draw->min_index, 0xFFFFFFFF, NULL); r600_pipe_state_add_reg(&vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, 0xFFFFFFFF, NULL); + r600_pipe_state_add_reg(&vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0xFFFFFFFF, NULL); + r600_pipe_state_add_reg(&vgt, R_03CFF4_SQ_VTX_START_INST_LOC, 0, 0xFFFFFFFF, NULL); /* build late state */ if (rctx->rasterizer && rctx->framebuffer.zsbuf) { float offset_units = rctx->rasterizer->offset_units; diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h index 169cda5295..02e3734fcc 100644 --- a/src/gallium/drivers/r600/r600d.h +++ b/src/gallium/drivers/r600/r600d.h @@ -3489,6 +3489,9 @@ #define R_028940_ALU_CONST_CACHE_PS_0 0x00028940 #define R_028980_ALU_CONST_CACHE_VS_0 0x00028980 +#define R_03CFF0_SQ_VTX_BASE_VTX_LOC 0x03CFF0 +#define R_03CFF4_SQ_VTX_START_INST_LOC 0x03CFF4 + #define SQ_TEX_INST_LD 0x03 #define SQ_TEX_INST_GET_GRADIENTS_H 0x7 #define SQ_TEX_INST_GET_GRADIENTS_V 0x8 -- cgit v1.2.3