From a23f25eba1fb8919a29efb88ef9e351abcc65b2e Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 17 Nov 2010 21:30:09 -0500 Subject: r600g: fix buffer alignment This should fix the remaining buffer alignment issues in r600g. --- src/gallium/winsys/r600/drm/r600_drm.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/gallium/winsys/r600') diff --git a/src/gallium/winsys/r600/drm/r600_drm.c b/src/gallium/winsys/r600/drm/r600_drm.c index 60c2f51fac..6742993ef3 100644 --- a/src/gallium/winsys/r600/drm/r600_drm.c +++ b/src/gallium/winsys/r600/drm/r600_drm.c @@ -195,12 +195,16 @@ struct radeon *radeon_new(int fd, unsigned device) case CHIP_RS780: case CHIP_RS880: radeon->chip_class = R600; + /* set default group bytes, overridden by tiling info ioctl */ + radeon->tiling_info.group_bytes = 256; break; case CHIP_RV770: case CHIP_RV730: case CHIP_RV710: case CHIP_RV740: radeon->chip_class = R700; + /* set default group bytes, overridden by tiling info ioctl */ + radeon->tiling_info.group_bytes = 256; break; case CHIP_CEDAR: case CHIP_REDWOOD: @@ -208,6 +212,8 @@ struct radeon *radeon_new(int fd, unsigned device) case CHIP_CYPRESS: case CHIP_HEMLOCK: radeon->chip_class = EVERGREEN; + /* set default group bytes, overridden by tiling info ioctl */ + radeon->tiling_info.group_bytes = 512; break; default: fprintf(stderr, "%s unknown or unsupported chipset 0x%04X\n", -- cgit v1.2.3