From af64dd2ae0aa31261002335f10d46492000f552b Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Fri, 2 Feb 2007 17:10:25 +0100 Subject: i915tex: Make page flipping work again. --- src/mesa/drivers/dri/i915tex/intel_context.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mesa/drivers/dri/i915tex/intel_context.h') diff --git a/src/mesa/drivers/dri/i915tex/intel_context.h b/src/mesa/drivers/dri/i915tex/intel_context.h index 96b911501f..321a945c05 100644 --- a/src/mesa/drivers/dri/i915tex/intel_context.h +++ b/src/mesa/drivers/dri/i915tex/intel_context.h @@ -295,6 +295,10 @@ struct intel_context int height; int current_rotation; + /* Page flipping + */ + GLboolean doPageFlip; + GLboolean flip_pending; }; /* These are functions now: -- cgit v1.2.3 From 6b99cafd69a791d03ce749d0fd2b9f59ca265677 Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Thu, 15 Feb 2007 16:30:40 +0100 Subject: i915tex: Support page flipping on both CRTCs independently. No longer track page flipping state per context but per window, via struct intel_framebuffer which wraps struct gl_framebuffer for windows. --- src/mesa/drivers/dri/i915tex/intel_blit.c | 45 ++++---- src/mesa/drivers/dri/i915tex/intel_buffers.c | 156 +++++++++++++++++++++------ src/mesa/drivers/dri/i915tex/intel_buffers.h | 3 + src/mesa/drivers/dri/i915tex/intel_context.c | 13 +-- src/mesa/drivers/dri/i915tex/intel_context.h | 5 - src/mesa/drivers/dri/i915tex/intel_fbo.c | 36 ++++--- src/mesa/drivers/dri/i915tex/intel_fbo.h | 14 +++ src/mesa/drivers/dri/i915tex/intel_reg.h | 1 + src/mesa/drivers/dri/i915tex/intel_screen.c | 37 ++++--- src/mesa/drivers/dri/i915tex/intel_tris.c | 10 +- 10 files changed, 203 insertions(+), 117 deletions(-) (limited to 'src/mesa/drivers/dri/i915tex/intel_context.h') diff --git a/src/mesa/drivers/dri/i915tex/intel_blit.c b/src/mesa/drivers/dri/i915tex/intel_blit.c index c08c45a936..e33d283076 100644 --- a/src/mesa/drivers/dri/i915tex/intel_blit.c +++ b/src/mesa/drivers/dri/i915tex/intel_blit.c @@ -123,14 +123,13 @@ noschedule: */ LOCK_HARDWARE(intel); - if (intel->driDrawable && intel->driDrawable->numClipRects) { + if (dPriv && dPriv->numClipRects) { const intelScreenPrivate *intelScreen = intel->intelScreen; - struct gl_framebuffer *fb - = (struct gl_framebuffer *) dPriv->driverPrivate; + struct intel_framebuffer *intel_fb = dPriv->driverPrivate; const struct intel_region *frontRegion - = intel_get_rb_region(fb, BUFFER_FRONT_LEFT); + = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT); const struct intel_region *backRegion - = intel_get_rb_region(fb, BUFFER_BACK_LEFT); + = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT); const int nbox = dPriv->numClipRects; const drm_clip_rect_t *pbox = dPriv->pClipRects; const int pitch = frontRegion->pitch; @@ -138,8 +137,8 @@ noschedule: int BR13, CMD; int i; - ASSERT(fb); - ASSERT(fb->Name == 0); /* Not a user-created FBO */ + ASSERT(intel_fb); + ASSERT(intel_fb->Base.Name == 0); /* Not a user-created FBO */ ASSERT(frontRegion); ASSERT(backRegion); ASSERT(frontRegion->pitch == backRegion->pitch); @@ -185,7 +184,7 @@ noschedule: OUT_BATCH((pbox->y1 << 16) | pbox->x1); OUT_BATCH((pbox->y2 << 16) | pbox->x2); - if (intel->sarea->pf_current_page == 0) + if (intel_fb->pf_current_page == 0) OUT_RELOC(frontRegion->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE, 0); @@ -196,7 +195,7 @@ noschedule: OUT_BATCH((pbox->y1 << 16) | pbox->x1); OUT_BATCH(BR13 & 0xffff); - if (intel->sarea->pf_current_page == 0) + if (intel_fb->pf_current_page == 0) OUT_RELOC(backRegion->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, DRM_BO_MASK_MEM | DRM_BO_FLAG_READ, 0); @@ -406,6 +405,7 @@ void intelClearWithBlit(GLcontext * ctx, GLbitfield mask) { struct intel_context *intel = intel_context(ctx); + struct gl_framebuffer *fb = ctx->DrawBuffer; GLuint clear_depth; GLbitfield skipBuffers = 0; BATCH_LOCALS; @@ -417,7 +417,7 @@ intelClearWithBlit(GLcontext * ctx, GLbitfield mask) */ clear_depth = 0; if (mask & BUFFER_BIT_DEPTH) { - clear_depth = (GLuint) (ctx->DrawBuffer->_DepthMax * ctx->Depth.Clear); + clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear); } if (mask & BUFFER_BIT_STENCIL) { clear_depth |= (ctx->Stencil.Clear & 0xff) << 24; @@ -440,12 +440,12 @@ intelClearWithBlit(GLcontext * ctx, GLbitfield mask) int i; /* Get clear bounds after locking */ - cx = ctx->DrawBuffer->_Xmin; - cy = ctx->DrawBuffer->_Ymin; - cw = ctx->DrawBuffer->_Xmax - ctx->DrawBuffer->_Xmin; - ch = ctx->DrawBuffer->_Ymax - ctx->DrawBuffer->_Ymin; + cx = fb->_Xmin; + cy = fb->_Ymin; + cw = fb->_Xmax - cx; + ch = fb->_Ymax - cy; - if (intel->ctx.DrawBuffer->Name == 0) { + if (fb->Name == 0) { /* clearing a window */ /* flip top to bottom */ @@ -470,8 +470,7 @@ intelClearWithBlit(GLcontext * ctx, GLbitfield mask) drm_clip_rect_t b; GLuint buf; GLuint clearMask = mask; /* use copy, since we modify it below */ - GLboolean all = (cw == ctx->DrawBuffer->Width && - ch == ctx->DrawBuffer->Height); + GLboolean all = (cw == fb->Width && ch == fb->Height); if (!all) { intel_intersect_cliprects(&b, &clear, box); @@ -490,7 +489,7 @@ intelClearWithBlit(GLcontext * ctx, GLbitfield mask) if ((clearMask & bufBit) && !(bufBit & skipBuffers)) { /* OK, clear this renderbuffer */ struct intel_region *irb_region = - intel_get_rb_region(ctx->DrawBuffer, buf); + intel_get_rb_region(fb, buf); struct _DriBufferObject *write_buffer = intel_region_buffer(intel->intelScreen, irb_region, all ? INTEL_WRITE_FULL : @@ -546,15 +545,7 @@ intelClearWithBlit(GLcontext * ctx, GLbitfield mask) _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n", buf, irb->Base.Name); */ - if (intel->flip_pending) { - /* Wait for a pending flip to take effect */ - BEGIN_BATCH(2, INTEL_BATCH_NO_CLIPRECTS); - OUT_BATCH(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP); - OUT_BATCH(0); - ADVANCE_BATCH(); - - intel->flip_pending = GL_FALSE; - } + intel_wait_flips(intel, INTEL_BATCH_NO_CLIPRECTS); BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS); OUT_BATCH(CMD); diff --git a/src/mesa/drivers/dri/i915tex/intel_buffers.c b/src/mesa/drivers/dri/i915tex/intel_buffers.c index a8fb0b14a1..fdb6ea9444 100644 --- a/src/mesa/drivers/dri/i915tex/intel_buffers.c +++ b/src/mesa/drivers/dri/i915tex/intel_buffers.c @@ -34,6 +34,7 @@ #include "intel_tris.h" #include "intel_regions.h" #include "intel_batchbuffer.h" +#include "intel_reg.h" #include "context.h" #include "utils.h" #include "drirenderbuffer.h" @@ -155,11 +156,14 @@ static void intelSetBackClipRects(struct intel_context *intel) { __DRIdrawablePrivate *dPriv = intel->driDrawable; + struct intel_framebuffer *intel_fb; if (!dPriv) return; - if (intel->sarea->pf_active || dPriv->numBackClipRects == 0) { + intel_fb = dPriv->driverPrivate; + + if (intel_fb->pf_active || dPriv->numBackClipRects == 0) { /* use the front clip rects */ intel->numClipRects = dPriv->numClipRects; intel->pClipRects = dPriv->pClipRects; @@ -185,7 +189,7 @@ intelWindowMoved(struct intel_context *intel) { GLcontext *ctx = &intel->ctx; __DRIdrawablePrivate *dPriv = intel->driDrawable; - GLframebuffer *drawFb = (GLframebuffer *) dPriv->driverPrivate; + struct intel_framebuffer *intel_fb = dPriv->driverPrivate; if (!intel->ctx.DrawBuffer) { /* when would this happen? -BP */ @@ -197,7 +201,7 @@ intelWindowMoved(struct intel_context *intel) } else { /* drawing to a window */ - switch (drawFb->_ColorDrawBufferMask[0]) { + switch (intel_fb->Base._ColorDrawBufferMask[0]) { case BUFFER_BIT_FRONT_LEFT: intelSetFrontClipRects(intel); break; @@ -212,7 +216,7 @@ intelWindowMoved(struct intel_context *intel) /* Update Mesa's notion of window size */ driUpdateFramebufferSize(ctx, dPriv); - drawFb->Initialized = GL_TRUE; /* XXX remove someday */ + intel_fb->Base.Initialized = GL_TRUE; /* XXX remove someday */ if (intel->intelScreen->driScrnPriv->ddxMinor >= 7) { drmI830Sarea *sarea = intel->sarea; @@ -227,7 +231,50 @@ intelWindowMoved(struct intel_context *intel) GLint areaA = driIntersectArea( drw_rect, pipeA_rect ); GLint areaB = driIntersectArea( drw_rect, pipeB_rect ); GLuint flags = intel->vblank_flags; + GLboolean pf_active; + GLint pf_pipes; + + /* Update page flipping info + */ + pf_pipes = 0; + + if (areaA > 0) + pf_pipes |= 1; + + if (areaB > 0) + pf_pipes |= 2; + + intel_fb->pf_current_page = (intel->sarea->pf_current_page >> + (intel_fb->pf_pipes & 0x2)) & 0x3; + + pf_active = (pf_pipes & intel->sarea->pf_active) == pf_pipes; + + if (1 /*INTEL_DEBUG & DEBUG_LOCK*/) + if (pf_active != intel_fb->pf_active) + _mesa_printf("%s - Page flipping %sactive\n", __progname, + pf_active ? "" : "in"); + + if (pf_active) { + if (pf_pipes != intel_fb->pf_pipes && intel_fb->pf_pipes == 0x3 && + (intel->sarea->pf_current_page & 0x3) != + ((intel->sarea->pf_current_page) >> 2 & 0x3)) { + drm_i915_flip_t flip; + + flip.pipes = (intel_fb->pf_current_page == + (intel->sarea->pf_current_page & 0x3)) ? 0x2 : 0x1; + + drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip)); + } + + intel_fb->pf_pipes = pf_pipes; + } + + intel_fb->pf_active = pf_active; + driFlipRenderbuffers(intel->ctx.WinSysDrawBuffer, intel_fb->pf_current_page); + intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer); + /* Update vblank info + */ if (areaB > areaA || (areaA == areaB && areaB > 0)) { flags = intel->vblank_flags | VBLANK_FLAG_SECONDARY; } else { @@ -259,6 +306,7 @@ static void intelClearWithTris(struct intel_context *intel, GLbitfield mask) { GLcontext *ctx = &intel->ctx; + struct gl_framebuffer *fb = ctx->DrawBuffer; drm_clip_rect_t clear; if (INTEL_DEBUG & DEBUG_BLIT) @@ -274,10 +322,10 @@ intelClearWithTris(struct intel_context *intel, GLbitfield mask) intel->vtbl.install_meta_state(intel); /* Get clear bounds after locking */ - cx = ctx->DrawBuffer->_Xmin; - cy = ctx->DrawBuffer->_Ymin; - ch = ctx->DrawBuffer->_Ymax - ctx->DrawBuffer->_Ymin; - cw = ctx->DrawBuffer->_Xmax - ctx->DrawBuffer->_Xmin; + cx = fb->_Xmin; + cy = fb->_Ymin; + ch = fb->_Ymax - cx; + cw = fb->_Xmax - cy; /* note: regardless of 'all', cx, cy, cw, ch are now correct */ clear.x1 = cx; @@ -291,9 +339,9 @@ intelClearWithTris(struct intel_context *intel, GLbitfield mask) if (mask & (BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH)) { struct intel_region *backRegion = - intel_get_rb_region(ctx->DrawBuffer, BUFFER_BACK_LEFT); + intel_get_rb_region(fb, BUFFER_BACK_LEFT); struct intel_region *depthRegion = - intel_get_rb_region(ctx->DrawBuffer, BUFFER_DEPTH); + intel_get_rb_region(fb, BUFFER_DEPTH); const GLuint clearColor = (backRegion && backRegion->cpp == 4) ? intel->ClearColor8888 : intel->ClearColor565; @@ -330,8 +378,7 @@ intelClearWithTris(struct intel_context *intel, GLbitfield mask) const GLuint bufBit = 1 << buf; if (mask & bufBit) { struct intel_renderbuffer *irbColor = - intel_renderbuffer(ctx->DrawBuffer-> - Attachment[buf].Renderbuffer); + intel_renderbuffer(fb->Attachment[buf].Renderbuffer); GLuint color = (irbColor->region->cpp == 4) ? intel->ClearColor8888 : intel->ClearColor565; @@ -372,6 +419,7 @@ intelRotateWindow(struct intel_context *intel, { intelScreenPrivate *screen = intel->intelScreen; drm_clip_rect_t fullRect; + struct intel_framebuffer *intel_fb; struct intel_region *src; const drm_clip_rect_t *clipRects; int numClipRects; @@ -421,8 +469,10 @@ intelRotateWindow(struct intel_context *intel, intel->vtbl.meta_draw_region(intel, screen->rotated_region, NULL); /* ? */ - if ((srcBuf == BUFFER_BIT_BACK_LEFT && intel->sarea->pf_current_page) || - (srcBuf == BUFFER_BIT_FRONT_LEFT && !intel->sarea->pf_current_page)) { + intel_fb = dPriv->driverPrivate; + + if ((srcBuf == BUFFER_BIT_BACK_LEFT && intel_fb->pf_current_page) || + (srcBuf == BUFFER_BIT_FRONT_LEFT && !intel_fb->pf_current_page)) { src = intel->intelScreen->front_region; clipRects = dPriv->pClipRects; numClipRects = dPriv->numClipRects; @@ -517,6 +567,7 @@ intelClear(GLcontext *ctx, GLbitfield mask) GLbitfield tri_mask = 0; GLbitfield blit_mask = 0; GLbitfield swrast_mask = 0; + struct gl_framebuffer *fb = ctx->DrawBuffer; GLuint i; if (0) @@ -536,7 +587,7 @@ intelClear(GLcontext *ctx, GLbitfield mask) /* HW stencil */ if (mask & BUFFER_BIT_STENCIL) { const struct intel_region *stencilRegion - = intel_get_rb_region(ctx->DrawBuffer, BUFFER_STENCIL); + = intel_get_rb_region(fb, BUFFER_STENCIL); if (stencilRegion) { /* have hw stencil */ if ((ctx->Stencil.WriteMask[0] & 0xff) != 0xff) { @@ -565,7 +616,7 @@ intelClear(GLcontext *ctx, GLbitfield mask) for (i = 0; i < BUFFER_COUNT; i++) { GLuint bufBit = 1 << i; if ((blit_mask | tri_mask) & bufBit) { - if (!ctx->DrawBuffer->Attachment[i].Renderbuffer->ClassID) { + if (!fb->Attachment[i].Renderbuffer->ClassID) { blit_mask &= ~bufBit; tri_mask &= ~bufBit; swrast_mask |= bufBit; @@ -587,15 +638,44 @@ intelClear(GLcontext *ctx, GLbitfield mask) } +/* Emit wait for pending flips */ +void +intel_wait_flips(struct intel_context *intel, GLuint batch_flags) +{ + struct intel_framebuffer *intel_fb = + (struct intel_framebuffer *) intel->ctx.DrawBuffer; + + if (intel_fb->Base.Name == 0 && intel_fb->flip_pending) { + GLuint mi_wait = MI_WAIT_FOR_EVENT; + GLint pf_pipes = intel_fb->pf_pipes; + BATCH_LOCALS; + + if (pf_pipes & 0x1) + mi_wait |= MI_WAIT_FOR_PLANE_A_FLIP; + + if (pf_pipes & 0x2) + mi_wait |= MI_WAIT_FOR_PLANE_B_FLIP; + + /* Wait for pending flips to take effect */ + BEGIN_BATCH(2, batch_flags); + OUT_BATCH(mi_wait); + OUT_BATCH(0); + ADVANCE_BATCH(); + + intel_fb->flip_pending = GL_FALSE; + } +} + /* Flip the front & back buffers */ -static void +static GLboolean intelPageFlip(const __DRIdrawablePrivate * dPriv) { struct intel_context *intel; GLboolean missed_target; int ret; + struct intel_framebuffer *intel_fb = dPriv->driverPrivate; if (INTEL_DEBUG & DEBUG_IOCTL) fprintf(stderr, "%s\n", __FUNCTION__); @@ -606,6 +686,9 @@ intelPageFlip(const __DRIdrawablePrivate * dPriv) intel = (struct intel_context *) dPriv->driContextPriv->driverPrivate; + if (intel->intelScreen->drmMinor < 9) + return GL_FALSE; + intelFlush(&intel->ctx); driWaitForVBlank(dPriv, &intel->vbl_seq, intel->vblank_flags, &missed_target); @@ -615,28 +698,36 @@ intelPageFlip(const __DRIdrawablePrivate * dPriv) (void)(*dri_interface->getUST) (&intel->swap_missed_ust); } + ret = 0; + LOCK_HARDWARE(intel); - if (!dPriv->numClipRects) { - UNLOCK_HARDWARE(intel); - usleep(10000); /* throttle invisible client 10ms */ - return; + if (dPriv->numClipRects && intel_fb->pf_active) { + drm_i915_flip_t flip; + + flip.pipes = intel_fb->pf_pipes; + + ret = drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip)); } - ret = drmCommandNone(intel->driFd, DRM_I830_FLIP); UNLOCK_HARDWARE(intel); - if (ret) { - _mesa_error(&intel->ctx, GL_INVALID_OPERATION, "DRM_I830_FLIP: %d\n", - ret); - return; + if (ret || !intel_fb->pf_active) + return GL_FALSE; + + if (!dPriv->numClipRects) { + usleep(10000); /* throttle invisible client 10ms */ } - driFlipRenderbuffers(intel->ctx.WinSysDrawBuffer, - intel->sarea->pf_current_page); - intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer); + intel_fb->pf_current_page = (intel->sarea->pf_current_page >> + (intel_fb->pf_pipes & 0x2)) & 0x3; + + driFlipRenderbuffers(intel->ctx.WinSysDrawBuffer, intel_fb->pf_current_page); + intel_draw_buffer(&intel->ctx, &intel_fb->Base); - intel->flip_pending = GL_TRUE; + intel_fb->flip_pending = dPriv->numClipRects != 0; + + return GL_TRUE; } #if 0 @@ -682,10 +773,7 @@ intelSwapBuffers(__DRIdrawablePrivate * dPriv) if (ctx->Visual.doubleBufferMode) { intelScreenPrivate *screen = intel->intelScreen; _mesa_notifySwapBuffers(ctx); /* flush pending rendering comands */ - if (screen->current_rotation == 0 && intel->doPageFlip) { - intelPageFlip(dPriv); - } - else { + if (screen->current_rotation != 0 || !intelPageFlip(dPriv)) { intelCopyBuffer(dPriv, NULL); } if (screen->current_rotation != 0) { diff --git a/src/mesa/drivers/dri/i915tex/intel_buffers.h b/src/mesa/drivers/dri/i915tex/intel_buffers.h index 0faf055347..3b686cb5c1 100644 --- a/src/mesa/drivers/dri/i915tex/intel_buffers.h +++ b/src/mesa/drivers/dri/i915tex/intel_buffers.h @@ -30,6 +30,7 @@ struct intel_context; +struct intel_framebuffer; extern GLboolean @@ -41,6 +42,8 @@ extern struct intel_region *intel_readbuf_region(struct intel_context *intel); extern struct intel_region *intel_drawbuf_region(struct intel_context *intel); +extern void intel_wait_flips(struct intel_context *intel, GLuint batch_flags); + extern void intelSwapBuffers(__DRIdrawablePrivate * dPriv); extern void intelWindowMoved(struct intel_context *intel); diff --git a/src/mesa/drivers/dri/i915tex/intel_context.c b/src/mesa/drivers/dri/i915tex/intel_context.c index 7eb209cf5f..8d90489b4e 100644 --- a/src/mesa/drivers/dri/i915tex/intel_context.c +++ b/src/mesa/drivers/dri/i915tex/intel_context.c @@ -690,21 +690,10 @@ intelContendedLock(struct intel_context *intel, GLuint flags) intelWindowMoved(intel); intel->lastStamp = dPriv->lastStamp; } - - /* Update page flipping info - */ - if (INTEL_DEBUG & DEBUG_LOCK) - if (intel->doPageFlip != intel->sarea->pf_active) - _mesa_printf("%s - age flipping %sactive\n", __progname, - intel->sarea->pf_active ? "" : "in"); - - intel->doPageFlip = intel->sarea->pf_active; - driFlipRenderbuffers(intel->ctx.WinSysDrawBuffer, - intel->sarea->pf_current_page); - intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer); } + /* Lock the hardware and validate our state. */ void LOCK_HARDWARE( struct intel_context *intel ) diff --git a/src/mesa/drivers/dri/i915tex/intel_context.h b/src/mesa/drivers/dri/i915tex/intel_context.h index 321a945c05..8f78597ba0 100644 --- a/src/mesa/drivers/dri/i915tex/intel_context.h +++ b/src/mesa/drivers/dri/i915tex/intel_context.h @@ -294,11 +294,6 @@ struct intel_context int width; int height; int current_rotation; - - /* Page flipping - */ - GLboolean doPageFlip; - GLboolean flip_pending; }; /* These are functions now: diff --git a/src/mesa/drivers/dri/i915tex/intel_fbo.c b/src/mesa/drivers/dri/i915tex/intel_fbo.c index b739e22cca..104cf1d9bb 100644 --- a/src/mesa/drivers/dri/i915tex/intel_fbo.c +++ b/src/mesa/drivers/dri/i915tex/intel_fbo.c @@ -71,6 +71,21 @@ intel_renderbuffer(struct gl_renderbuffer *rb) struct intel_renderbuffer * intel_get_renderbuffer(struct gl_framebuffer *fb, GLuint attIndex) { + if (fb->Name == 0) { + struct intel_framebuffer *intel_fb = (struct intel_framebuffer*)fb; + + if (intel_fb->pf_current_page) { + switch (attIndex) { + case BUFFER_BACK_LEFT: + attIndex = BUFFER_FRONT_LEFT; + break; + case BUFFER_FRONT_LEFT: + attIndex = BUFFER_BACK_LEFT; + break; + } + } + } + return intel_renderbuffer(fb->Attachment[attIndex].Renderbuffer); } @@ -78,22 +93,7 @@ intel_get_renderbuffer(struct gl_framebuffer *fb, GLuint attIndex) struct intel_region * intel_get_rb_region(struct gl_framebuffer *fb, GLuint attIndex) { - GET_CURRENT_CONTEXT(ctx); - struct intel_context *intel = intel_context(ctx); - struct intel_renderbuffer *irb; - - if (intel->sarea->pf_current_page) { - switch (attIndex) { - case BUFFER_BACK_LEFT: - attIndex = BUFFER_FRONT_LEFT; - break; - case BUFFER_FRONT_LEFT: - attIndex = BUFFER_BACK_LEFT; - break; - } - } - - irb = intel_renderbuffer(fb->Attachment[attIndex].Renderbuffer); + struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, attIndex); if (irb) return irb->region; @@ -109,7 +109,9 @@ intel_get_rb_region(struct gl_framebuffer *fb, GLuint attIndex) static struct gl_framebuffer * intel_new_framebuffer(GLcontext * ctx, GLuint name) { - /* there's no intel_framebuffer at this time, just use Mesa's class */ + /* Only drawable state in intel_framebuffer at this time, just use Mesa's + * class + */ return _mesa_new_framebuffer(ctx, name); } diff --git a/src/mesa/drivers/dri/i915tex/intel_fbo.h b/src/mesa/drivers/dri/i915tex/intel_fbo.h index 221f09b39a..d55f02967f 100644 --- a/src/mesa/drivers/dri/i915tex/intel_fbo.h +++ b/src/mesa/drivers/dri/i915tex/intel_fbo.h @@ -32,6 +32,20 @@ struct intel_context; struct intel_region; +/** + * Intel framebuffer, derived from gl_framebuffer. + */ +struct intel_framebuffer +{ + struct gl_framebuffer Base; + + /* Drawable page flipping state */ + GLboolean pf_active; + GLboolean flip_pending; + GLint pf_pipes; + GLint pf_current_page; +}; + /** * Intel renderbuffer, derived from gl_renderbuffer. diff --git a/src/mesa/drivers/dri/i915tex/intel_reg.h b/src/mesa/drivers/dri/i915tex/intel_reg.h index 126d2ea7ff..7828ba6ad3 100644 --- a/src/mesa/drivers/dri/i915tex/intel_reg.h +++ b/src/mesa/drivers/dri/i915tex/intel_reg.h @@ -82,6 +82,7 @@ #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define MI_WAIT_FOR_EVENT ((0x3<<23)) +#define MI_WAIT_FOR_PLANE_B_FLIP (1<<6) #define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) #endif diff --git a/src/mesa/drivers/dri/i915tex/intel_screen.c b/src/mesa/drivers/dri/i915tex/intel_screen.c index efa1b014a6..f26b3f33ad 100644 --- a/src/mesa/drivers/dri/i915tex/intel_screen.c +++ b/src/mesa/drivers/dri/i915tex/intel_screen.c @@ -541,7 +541,12 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv, mesaVis->depthBits != 24); GLenum rgbFormat = (mesaVis->redBits == 5 ? GL_RGB5 : GL_RGBA8); - struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis); + struct intel_framebuffer *intel_fb = CALLOC_STRUCT(intel_framebuffer); + + if (!intel_fb) + return GL_FALSE; + + _mesa_initialize_framebuffer(&intel_fb->Base, mesaVis); /* setup the hardware-based renderbuffers */ { @@ -553,7 +558,8 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv, screen->cpp, screen->front.map); intel_set_span_functions(&frontRb->Base); - _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontRb->Base); + _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_FRONT_LEFT, + &frontRb->Base); } if (mesaVis->doubleBufferMode) { @@ -565,7 +571,8 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv, screen->cpp, screen->back.map); intel_set_span_functions(&backRb->Base); - _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backRb->Base); + _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT, + &backRb->Base); } if (mesaVis->depthBits == 24 && mesaVis->stencilBits == 8) { @@ -579,8 +586,10 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv, screen->depth.map); intel_set_span_functions(&depthStencilRb->Base); /* note: bind RB to two attachment points */ - _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthStencilRb->Base); - _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depthStencilRb->Base); + _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_DEPTH, + &depthStencilRb->Base); + _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_STENCIL, + &depthStencilRb->Base); } else if (mesaVis->depthBits == 16) { /* just 16-bit depth buffer, no hw stencil */ @@ -592,17 +601,19 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv, screen->cpp, /* 2! */ screen->depth.map); intel_set_span_functions(&depthRb->Base); - _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base); + _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_DEPTH, &depthRb->Base); } /* now add any/all software-based renderbuffers we may need */ - _mesa_add_soft_renderbuffers(fb, GL_FALSE, /* never sw color */ - GL_FALSE, /* never sw depth */ - swStencil, mesaVis->accumRedBits > 0, GL_FALSE, /* never sw alpha */ - GL_FALSE /* never sw aux */ ); - driDrawPriv->driverPrivate = (void *) fb; - - return (driDrawPriv->driverPrivate != NULL); + _mesa_add_soft_renderbuffers(&intel_fb->Base, + GL_FALSE, /* never sw color */ + GL_FALSE, /* never sw depth */ + swStencil, mesaVis->accumRedBits > 0, + GL_FALSE, /* never sw alpha */ + GL_FALSE /* never sw aux */ ); + driDrawPriv->driverPrivate = (void *) intel_fb; + + return GL_TRUE; } } diff --git a/src/mesa/drivers/dri/i915tex/intel_tris.c b/src/mesa/drivers/dri/i915tex/intel_tris.c index 4e0ca70c1e..9ac8c32f60 100644 --- a/src/mesa/drivers/dri/i915tex/intel_tris.c +++ b/src/mesa/drivers/dri/i915tex/intel_tris.c @@ -102,15 +102,7 @@ intelStartInlinePrimitive(struct intel_context *intel, /* _mesa_printf("%s *", __progname); */ - if (intel->flip_pending) { - /* Wait for a pending flip to take effect */ - BEGIN_BATCH(2, batch_flags); - OUT_BATCH(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP); - OUT_BATCH(0); - ADVANCE_BATCH(); - - intel->flip_pending = GL_FALSE; - } + intel_wait_flips(intel, batch_flags); /* Emit a slot which will be filled with the inline primitive * command later. -- cgit v1.2.3 From 641c966e3de192eba17c693f00d6654742c72eb6 Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Thu, 22 Feb 2007 17:24:09 +0100 Subject: i915tex: Schedule flips when possible. Also move vsync related state from context to window, so it's possible to schedule several flips ahead of time with triple buffering. --- src/mesa/drivers/dri/i915tex/intel_blit.c | 195 ++++++++++----------------- src/mesa/drivers/dri/i915tex/intel_buffers.c | 134 +++++++++++++++--- src/mesa/drivers/dri/i915tex/intel_context.c | 36 +++-- src/mesa/drivers/dri/i915tex/intel_context.h | 13 -- src/mesa/drivers/dri/i915tex/intel_fbo.h | 14 ++ src/mesa/drivers/dri/i915tex/intel_screen.c | 15 +-- 6 files changed, 228 insertions(+), 179 deletions(-) (limited to 'src/mesa/drivers/dri/i915tex/intel_context.h') diff --git a/src/mesa/drivers/dri/i915tex/intel_blit.c b/src/mesa/drivers/dri/i915tex/intel_blit.c index 640c73e355..dbe4ba2ac5 100644 --- a/src/mesa/drivers/dri/i915tex/intel_blit.c +++ b/src/mesa/drivers/dri/i915tex/intel_blit.c @@ -55,8 +55,6 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv, struct intel_context *intel; const intelScreenPrivate *intelScreen; - GLboolean missed_target; - int64_t ust; DBG("%s\n", __FUNCTION__); @@ -68,41 +66,6 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv, intelScreen = intel->intelScreen; - if (!rect && !intel->swap_scheduled && intelScreen->drmMinor >= 6 && - !(intel->vblank_flags & VBLANK_FLAG_NO_IRQ) && - intelScreen->current_rotation == 0) { - unsigned int interval = driGetVBlankInterval(dPriv, intel->vblank_flags); - unsigned int target; - drm_i915_vblank_swap_t swap; - - swap.drawable = dPriv->hHWDrawable; - swap.seqtype = DRM_VBLANK_ABSOLUTE; - target = swap.sequence = intel->vbl_seq + interval; - - if (intel->vblank_flags & VBLANK_FLAG_SYNC) { - swap.seqtype |= DRM_VBLANK_NEXTONMISS; - } else if (interval == 0) { - goto noschedule; - } - - if ( intel->vblank_flags & VBLANK_FLAG_SECONDARY ) { - swap.seqtype |= DRM_VBLANK_SECONDARY; - } - - intel_batchbuffer_flush(intel->batch); - - if (!drmCommandWriteRead(intel->driFd, DRM_I915_VBLANK_SWAP, &swap, - sizeof(swap))) { - intel->swap_scheduled = 1; - intel->vbl_seq = swap.sequence; - swap.sequence -= target; - missed_target = swap.sequence > 0 && swap.sequence <= (1 << 23); - } - } else { - intel->swap_scheduled = 0; - } -noschedule: - if (intel->last_swap_fence) { driFenceFinish(intel->last_swap_fence, DRM_FENCE_TYPE_EXE, GL_TRUE); driFenceUnReference(intel->last_swap_fence); @@ -111,108 +74,88 @@ noschedule: intel->last_swap_fence = intel->first_swap_fence; intel->first_swap_fence = NULL; - if (!intel->swap_scheduled) { - if (!rect) { - driWaitForVBlank(dPriv, &intel->vbl_seq, intel->vblank_flags, - &missed_target); + /* The LOCK_HARDWARE is required for the cliprects. Buffer offsets + * should work regardless. + */ + LOCK_HARDWARE(intel); + + if (dPriv && dPriv->numClipRects) { + struct intel_framebuffer *intel_fb = dPriv->driverPrivate; + const struct intel_region *frontRegion + = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT); + const struct intel_region *backRegion + = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT); + const int nbox = dPriv->numClipRects; + const drm_clip_rect_t *pbox = dPriv->pClipRects; + const int pitch = frontRegion->pitch; + const int cpp = frontRegion->cpp; + int BR13, CMD; + int i; + + ASSERT(intel_fb); + ASSERT(intel_fb->Base.Name == 0); /* Not a user-created FBO */ + ASSERT(frontRegion); + ASSERT(backRegion); + ASSERT(frontRegion->pitch == backRegion->pitch); + ASSERT(frontRegion->cpp == backRegion->cpp); + + if (cpp == 2) { + BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24); + CMD = XY_SRC_COPY_BLT_CMD; + } + else { + BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24) | (1 << 25); + CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | + XY_SRC_COPY_BLT_WRITE_RGB); } + for (i = 0; i < nbox; i++, pbox++) { + drm_clip_rect_t box; - /* The LOCK_HARDWARE is required for the cliprects. Buffer offsets - * should work regardless. - */ - LOCK_HARDWARE(intel); - - if (dPriv && dPriv->numClipRects) { - const intelScreenPrivate *intelScreen = intel->intelScreen; - struct intel_framebuffer *intel_fb = dPriv->driverPrivate; - const struct intel_region *frontRegion - = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT); - const struct intel_region *backRegion - = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT); - const int nbox = dPriv->numClipRects; - const drm_clip_rect_t *pbox = dPriv->pClipRects; - const int pitch = frontRegion->pitch; - const int cpp = frontRegion->cpp; - int BR13, CMD; - int i; - - ASSERT(intel_fb); - ASSERT(intel_fb->Base.Name == 0); /* Not a user-created FBO */ - ASSERT(frontRegion); - ASSERT(backRegion); - ASSERT(frontRegion->pitch == backRegion->pitch); - ASSERT(frontRegion->cpp == backRegion->cpp); - - if (cpp == 2) { - BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24); - CMD = XY_SRC_COPY_BLT_CMD; - } - else { - BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24) | (1 << 25); - CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); - } + if (pbox->x1 > pbox->x2 || + pbox->y1 > pbox->y2 || + pbox->x2 > intelScreen->width || pbox->y2 > intelScreen->height) + continue; - for (i = 0; i < nbox; i++, pbox++) { - drm_clip_rect_t box; + box = *pbox; - if (pbox->x1 > pbox->x2 || - pbox->y1 > pbox->y2 || - pbox->x2 > intelScreen->width || pbox->y2 > intelScreen->height) - continue; + if (rect) { + if (rect->x1 > box.x1) + box.x1 = rect->x1; + if (rect->y1 > box.y1) + box.y1 = rect->y1; + if (rect->x2 < box.x2) + box.x2 = rect->x2; + if (rect->y2 < box.y2) + box.y2 = rect->y2; - box = *pbox; - - if (rect) { - if (rect->x1 > box.x1) - box.x1 = rect->x1; - if (rect->y1 > box.y1) - box.y1 = rect->y1; - if (rect->x2 < box.x2) - box.x2 = rect->x2; - if (rect->y2 < box.y2) - box.y2 = rect->y2; - - if (box.x1 > box.x2 || box.y1 > box.y2) - continue; - } - - BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS); - OUT_BATCH(CMD); - OUT_BATCH(BR13); - OUT_BATCH((pbox->y1 << 16) | pbox->x1); - OUT_BATCH((pbox->y2 << 16) | pbox->x2); - - OUT_RELOC(frontRegion->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, - DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE, 0); - OUT_BATCH((pbox->y1 << 16) | pbox->x1); - OUT_BATCH(BR13 & 0xffff); - OUT_RELOC(backRegion->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, - DRM_BO_MASK_MEM | DRM_BO_FLAG_READ, 0); - - ADVANCE_BATCH(); + if (box.x1 > box.x2 || box.y1 > box.y2) + continue; } - if (intel->first_swap_fence) - driFenceUnReference(intel->first_swap_fence); - intel->first_swap_fence = intel_batchbuffer_flush(intel->batch); - driFenceReference(intel->first_swap_fence); - } + BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS); + OUT_BATCH(CMD); + OUT_BATCH(BR13); + OUT_BATCH((pbox->y1 << 16) | pbox->x1); + OUT_BATCH((pbox->y2 << 16) | pbox->x2); - UNLOCK_HARDWARE(intel); - } + OUT_RELOC(frontRegion->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, + DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE, 0); + OUT_BATCH((pbox->y1 << 16) | pbox->x1); + OUT_BATCH(BR13 & 0xffff); + OUT_RELOC(backRegion->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, + DRM_BO_MASK_MEM | DRM_BO_FLAG_READ, 0); - if (!rect) { - intel->swap_count++; - (*dri_interface->getUST) (&ust); - if (missed_target) { - intel->swap_missed_count++; - intel->swap_missed_ust = ust - intel->swap_ust; + ADVANCE_BATCH(); } - intel->swap_ust = ust; + if (intel->first_swap_fence) + driFenceUnReference(intel->first_swap_fence); + intel->first_swap_fence = intel_batchbuffer_flush(intel->batch); + driFenceReference(intel->first_swap_fence); } + + UNLOCK_HARDWARE(intel); } diff --git a/src/mesa/drivers/dri/i915tex/intel_buffers.c b/src/mesa/drivers/dri/i915tex/intel_buffers.c index 7db5ccfc26..8054d98646 100644 --- a/src/mesa/drivers/dri/i915tex/intel_buffers.c +++ b/src/mesa/drivers/dri/i915tex/intel_buffers.c @@ -226,7 +226,7 @@ intelWindowMoved(struct intel_context *intel) .y2 = sarea->pipeB_y + sarea->pipeB_h }; GLint areaA = driIntersectArea( drw_rect, pipeA_rect ); GLint areaB = driIntersectArea( drw_rect, pipeB_rect ); - GLuint flags = intel->vblank_flags; + GLuint flags = intel_fb->vblank_flags; GLboolean pf_active; GLint pf_pipes; @@ -278,17 +278,17 @@ intelWindowMoved(struct intel_context *intel) /* Update vblank info */ if (areaB > areaA || (areaA == areaB && areaB > 0)) { - flags = intel->vblank_flags | VBLANK_FLAG_SECONDARY; + flags = intel_fb->vblank_flags | VBLANK_FLAG_SECONDARY; } else { - flags = intel->vblank_flags & ~VBLANK_FLAG_SECONDARY; + flags = intel_fb->vblank_flags & ~VBLANK_FLAG_SECONDARY; } - if (flags != intel->vblank_flags) { - intel->vblank_flags = flags; - driGetCurrentVBlank(dPriv, intel->vblank_flags, &intel->vbl_seq); + if (flags != intel_fb->vblank_flags) { + intel_fb->vblank_flags = flags; + driGetCurrentVBlank(dPriv, intel_fb->vblank_flags, &intel_fb->vbl_seq); } } else { - intel->vblank_flags &= ~VBLANK_FLAG_SECONDARY; + intel_fb->vblank_flags &= ~VBLANK_FLAG_SECONDARY; } /* Update Mesa's notion of window size */ @@ -683,7 +683,6 @@ static GLboolean intelPageFlip(const __DRIdrawablePrivate * dPriv) { struct intel_context *intel; - GLboolean missed_target; int ret; struct intel_framebuffer *intel_fb = dPriv->driverPrivate; @@ -701,13 +700,6 @@ intelPageFlip(const __DRIdrawablePrivate * dPriv) intelFlush(&intel->ctx); - driWaitForVBlank(dPriv, &intel->vbl_seq, intel->vblank_flags, &missed_target); - - if (missed_target) { - intel->swap_missed_count++; - (void)(*dri_interface->getUST) (&intel->swap_missed_ust); - } - ret = 0; LOCK_HARDWARE(intel); @@ -772,6 +764,83 @@ intelSwapBuffers(__DRIdrawablePrivate * dPriv) #else /* Trunk version: */ + +static GLboolean +intelScheduleSwap(const __DRIdrawablePrivate * dPriv, GLboolean *missed_target) +{ + struct intel_framebuffer *intel_fb = dPriv->driverPrivate; + unsigned int interval = driGetVBlankInterval(dPriv, intel_fb->vblank_flags); + struct intel_context *intel = + intelScreenContext(dPriv->driScreenPriv->private); + const intelScreenPrivate *intelScreen = intel->intelScreen; + unsigned int target; + drm_i915_vblank_swap_t swap; + GLboolean ret; + + if ((intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ) || + intelScreen->current_rotation != 0 || + intelScreen->drmMinor < (intel_fb->pf_active ? 9 : 6)) + return GL_FALSE; + + swap.seqtype = DRM_VBLANK_ABSOLUTE; + + if (intel_fb->vblank_flags & VBLANK_FLAG_SYNC) { + swap.seqtype |= DRM_VBLANK_NEXTONMISS; + } else if (interval == 0) { + return GL_FALSE; + } + + swap.drawable = dPriv->hHWDrawable; + target = swap.sequence = intel_fb->vbl_seq + interval; + + if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) { + swap.seqtype |= DRM_VBLANK_SECONDARY; + } + + LOCK_HARDWARE(intel); + + intel_batchbuffer_flush(intel->batch); + + if ( intel_fb->pf_active ) { + swap.seqtype |= DRM_VBLANK_FLIP; + + intel_fb->pf_current_page = (((intel->sarea->pf_current_page >> + (intel_fb->pf_pipes & 0x2)) & 0x3) + 1) % + intel_fb->pf_num_pages; + } + + if (!drmCommandWriteRead(intel->driFd, DRM_I915_VBLANK_SWAP, &swap, + sizeof(swap))) { + intel_fb->vbl_seq = swap.sequence; + swap.sequence -= target; + *missed_target = swap.sequence > 0 && swap.sequence <= (1 << 23); + + if (swap.seqtype & DRM_VBLANK_FLIP) { + intel_get_renderbuffer(&intel_fb->Base, + BUFFER_FRONT_LEFT)->vbl_pending = + intel_get_renderbuffer(&intel_fb->Base, + BUFFER_BACK_LEFT)->vbl_pending = intel_fb->vbl_seq; + + intel_flip_renderbuffers(intel_fb); + intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer); + } + + ret = GL_TRUE; + } else { + if (swap.seqtype & DRM_VBLANK_FLIP) { + intel_fb->pf_current_page = ((intel->sarea->pf_current_page >> + (intel_fb->pf_pipes & 0x2)) & 0x3) % + intel_fb->pf_num_pages; + } + + ret = GL_FALSE; + } + + UNLOCK_HARDWARE(intel); + + return ret; +} + void intelSwapBuffers(__DRIdrawablePrivate * dPriv) { @@ -786,13 +855,34 @@ intelSwapBuffers(__DRIdrawablePrivate * dPriv) if (ctx->Visual.doubleBufferMode) { intelScreenPrivate *screen = intel->intelScreen; - _mesa_notifySwapBuffers(ctx); /* flush pending rendering comands */ - if (screen->current_rotation != 0 || !intelPageFlip(dPriv)) { - intelCopyBuffer(dPriv, NULL); - } - if (screen->current_rotation != 0) { - intelRotateWindow(intel, dPriv, BUFFER_BIT_FRONT_LEFT); - } + GLboolean missed_target; + struct intel_framebuffer *intel_fb = dPriv->driverPrivate; + int64_t ust; + + _mesa_notifySwapBuffers(ctx); /* flush pending rendering comands */ + + if (screen->current_rotation != 0 || + !intelScheduleSwap(dPriv, &missed_target)) { + driWaitForVBlank(dPriv, &intel_fb->vbl_seq, intel_fb->vblank_flags, + &missed_target); + + if (screen->current_rotation != 0 || !intelPageFlip(dPriv)) { + intelCopyBuffer(dPriv, NULL); + } + + if (screen->current_rotation != 0) { + intelRotateWindow(intel, dPriv, BUFFER_BIT_FRONT_LEFT); + } + } + + intel_fb->swap_count++; + (*dri_interface->getUST) (&ust); + if (missed_target) { + intel_fb->swap_missed_count++; + intel_fb->swap_missed_ust = ust - intel_fb->swap_ust; + } + + intel_fb->swap_ust = ust; } } else { diff --git a/src/mesa/drivers/dri/i915tex/intel_context.c b/src/mesa/drivers/dri/i915tex/intel_context.c index 649fe549bf..b1352a766e 100644 --- a/src/mesa/drivers/dri/i915tex/intel_context.c +++ b/src/mesa/drivers/dri/i915tex/intel_context.c @@ -443,10 +443,6 @@ intelInitContext(struct intel_context *intel, intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS); - intel->vblank_flags = (intel->intelScreen->irq_active != 0) - ? driGetDefaultVBlankFlags(&intel->optionCache) : VBLANK_FLAG_NO_IRQ; - - (*dri_interface->getUST) (&intel->swap_ust); _math_matrix_ctr(&intel->ViewportMatrix); /* Disable imaging extension until convolution is working in @@ -591,7 +587,12 @@ intelMakeCurrent(__DRIcontextPrivate * driContextPriv, if (intel->ctx.DrawBuffer == &intel_fb->Base) { if (intel->driDrawable != driDrawPriv) { - driDrawableInitVBlank(driDrawPriv, intel->vblank_flags, &intel->vbl_seq); + intel_fb->vblank_flags = (intel->intelScreen->irq_active != 0) + ? driGetDefaultVBlankFlags(&intel->optionCache) + : VBLANK_FLAG_NO_IRQ; + (*dri_interface->getUST) (&intel_fb->swap_ust); + driDrawableInitVBlank(driDrawPriv, intel_fb->vblank_flags, + &intel_fb->vbl_seq); intel->driDrawable = driDrawPriv; intelWindowMoved(intel); } @@ -702,19 +703,34 @@ intelContendedLock(struct intel_context *intel, GLuint flags) void LOCK_HARDWARE( struct intel_context *intel ) { char __ret=0; - + struct intel_framebuffer *intel_fb = NULL; + struct intel_renderbuffer *intel_rb = NULL; _glthread_LOCK_MUTEX(lockMutex); assert(!intel->locked); - if (intel->swap_scheduled) { + if (intel->driDrawable) { + intel_fb = intel->driDrawable->driverPrivate; + + if (intel_fb) + intel_rb = + intel_get_renderbuffer(&intel_fb->Base, + intel_fb->Base._ColorDrawBufferMask[0] == + BUFFER_BIT_FRONT_LEFT ? BUFFER_FRONT_LEFT : + BUFFER_BACK_LEFT); + } + + if (intel_rb && (intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) { drmVBlank vbl; + vbl.request.type = DRM_VBLANK_ABSOLUTE; - if ( intel->vblank_flags & VBLANK_FLAG_SECONDARY ) { + + if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) { vbl.request.type |= DRM_VBLANK_SECONDARY; } - vbl.request.sequence = intel->vbl_seq; + + vbl.request.sequence = intel_rb->vbl_pending; drmWaitVBlank(intel->driFd, &vbl); - intel->swap_scheduled = 0; + intel_fb->vbl_waited = intel_rb->vbl_pending; } DRM_CAS(intel->driHwLock, intel->hHWContext, diff --git a/src/mesa/drivers/dri/i915tex/intel_context.h b/src/mesa/drivers/dri/i915tex/intel_context.h index 8f78597ba0..44c20af7f8 100644 --- a/src/mesa/drivers/dri/i915tex/intel_context.h +++ b/src/mesa/drivers/dri/i915tex/intel_context.h @@ -274,19 +274,6 @@ struct intel_context */ driOptionCache optionCache; - /* VBI - */ - GLuint vbl_seq; - GLuint vblank_flags; - - int64_t swap_ust; - int64_t swap_missed_ust; - - GLuint swap_count; - GLuint swap_missed_count; - - GLuint swap_scheduled; - /* Rotation. Need to match that of the * current screen. */ diff --git a/src/mesa/drivers/dri/i915tex/intel_fbo.h b/src/mesa/drivers/dri/i915tex/intel_fbo.h index 0446d681c6..963f5e706f 100644 --- a/src/mesa/drivers/dri/i915tex/intel_fbo.h +++ b/src/mesa/drivers/dri/i915tex/intel_fbo.h @@ -47,6 +47,18 @@ struct intel_framebuffer GLint pf_pipes; GLint pf_current_page; GLint pf_num_pages; + + /* VBI + */ + GLuint vbl_seq; + GLuint vblank_flags; + GLuint vbl_waited; + + int64_t swap_ust; + int64_t swap_missed_ust; + + GLuint swap_count; + GLuint swap_missed_count; }; @@ -68,6 +80,8 @@ struct intel_renderbuffer GLuint PairedStencil; /**< only used if this is a stencil renderbuffer */ GLuint pf_pending; /**< sequence number of pending flip */ + + GLuint vbl_pending; /**< vblank sequence number of pending flip */ }; diff --git a/src/mesa/drivers/dri/i915tex/intel_screen.c b/src/mesa/drivers/dri/i915tex/intel_screen.c index 4763d14f4f..86a3d79266 100644 --- a/src/mesa/drivers/dri/i915tex/intel_screen.c +++ b/src/mesa/drivers/dri/i915tex/intel_screen.c @@ -679,21 +679,20 @@ intelDestroyBuffer(__DRIdrawablePrivate * driDrawPriv) static int intelGetSwapInfo(__DRIdrawablePrivate * dPriv, __DRIswapInfo * sInfo) { - struct intel_context *intel; + struct intel_framebuffer *intel_fb; - if ((dPriv == NULL) || (dPriv->driContextPriv == NULL) - || (dPriv->driContextPriv->driverPrivate == NULL) + if ((dPriv == NULL) || (dPriv->driverPrivate == NULL) || (sInfo == NULL)) { return -1; } - intel = dPriv->driContextPriv->driverPrivate; - sInfo->swap_count = intel->swap_count; - sInfo->swap_ust = intel->swap_ust; - sInfo->swap_missed_count = intel->swap_missed_count; + intel_fb = dPriv->driverPrivate; + sInfo->swap_count = intel_fb->swap_count; + sInfo->swap_ust = intel_fb->swap_ust; + sInfo->swap_missed_count = intel_fb->swap_missed_count; sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0) - ? driCalculateSwapUsage(dPriv, 0, intel->swap_missed_ust) + ? driCalculateSwapUsage(dPriv, 0, intel_fb->swap_missed_ust) : 0.0; return 0; -- cgit v1.2.3