From 1d4bace9fca64c61ccd9f4205262417fa0ae3883 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 4 Aug 2009 15:27:40 -0700 Subject: i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}. I was getting tired of doing the dance of INTEL_DEBUG=batch, copying it out, and running intel-gen4disasm on it. --- src/mesa/drivers/dri/i965/brw_disasm.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'src/mesa/drivers/dri/i965/brw_disasm.c') diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c index 7556e97cba..3e22ca6c99 100644 --- a/src/mesa/drivers/dri/i965/brw_disasm.c +++ b/src/mesa/drivers/dri/i965/brw_disasm.c @@ -27,7 +27,9 @@ #include #include -#include "gen4asm.h" +#include "main/mtypes.h" + +#include "brw_context.h" #include "brw_defines.h" struct { @@ -626,13 +628,13 @@ static int imm (FILE *file, GLuint type, struct brw_instruction *inst) { format (file, "0x%08xUD", inst->bits3.ud); break; case BRW_REGISTER_TYPE_D: - format (file, "%dD", inst->bits3.id); + format (file, "%dD", inst->bits3.d); break; case BRW_REGISTER_TYPE_UW: format (file, "0x%04xUW", (uint16_t) inst->bits3.ud); break; case BRW_REGISTER_TYPE_W: - format (file, "%dW", (int16_t) inst->bits3.id); + format (file, "%dW", (int16_t) inst->bits3.d); break; case BRW_REGISTER_TYPE_UB: format (file, "0x%02xUB", (int8_t) inst->bits3.ud); @@ -644,7 +646,7 @@ static int imm (FILE *file, GLuint type, struct brw_instruction *inst) { format (file, "0x%08xV", inst->bits3.ud); break; case BRW_REGISTER_TYPE_F: - format (file, "%-gF", inst->bits3.fd); + format (file, "%-gF", inst->bits3.f); } return 0; } @@ -769,7 +771,7 @@ static int src1 (FILE *file, struct brw_instruction *inst) } } -int disasm (FILE *file, struct brw_instruction *inst) +int brw_disasm (FILE *file, struct brw_instruction *inst) { int err = 0; int space = 0; -- cgit v1.2.3