From 1c96e85c9d6b8c636b0636f3320d1057ab5357b3 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 16 Dec 2009 14:45:50 -0800 Subject: intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync. Saves ~480 bytes of code. --- src/mesa/drivers/dri/i965/brw_misc_state.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mesa/drivers/dri/i965/brw_misc_state.c') diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 4b0d598336..6cb2da28e6 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -212,7 +212,7 @@ static void emit_depthbuffer(struct brw_context *brw) { struct intel_context *intel = &brw->intel; struct intel_region *region = brw->state.depth_region; - unsigned int len = (BRW_IS_G4X(brw) || BRW_IS_IGDNG(brw)) ? 6 : 5; + unsigned int len = (BRW_IS_G4X(brw) || intel->is_ironlake) ? 6 : 5; if (region == NULL) { BEGIN_BATCH(len, IGNORE_CLIPRECTS); @@ -223,7 +223,7 @@ static void emit_depthbuffer(struct brw_context *brw) OUT_BATCH(0); OUT_BATCH(0); - if (BRW_IS_G4X(brw) || BRW_IS_IGDNG(brw)) + if (BRW_IS_G4X(brw) || intel->is_ironlake) OUT_BATCH(0); ADVANCE_BATCH(); @@ -262,7 +262,7 @@ static void emit_depthbuffer(struct brw_context *brw) ((region->height - 1) << 19)); OUT_BATCH(0); - if (BRW_IS_G4X(brw) || BRW_IS_IGDNG(brw)) + if (BRW_IS_G4X(brw) || intel->is_ironlake) OUT_BATCH(0); ADVANCE_BATCH(); @@ -512,7 +512,7 @@ static void upload_state_base_address( struct brw_context *brw ) /* Output the structure (brw_state_base_address) directly to the * batchbuffer, so we can emit relocations inline. */ - if (BRW_IS_IGDNG(brw)) { + if (intel->is_ironlake) { BEGIN_BATCH(8, IGNORE_CLIPRECTS); OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (8 - 2)); OUT_BATCH(1); /* General state base address */ -- cgit v1.2.3