From 8c31a4c3cf6655fe4db6befb4a7b029ada62aaf6 Mon Sep 17 00:00:00 2001 From: Zhenyu Wang Date: Fri, 17 Sep 2010 12:45:01 +0800 Subject: i965: enable accumulator update in PS kernel too on sandybridge Accumulator update flag must be set for implicit update on sandybridge. --- src/mesa/drivers/dri/i965/brw_wm_glsl.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mesa/drivers/dri/i965/brw_wm_glsl.c') diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c index f60245377e..1cbd5d2b55 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c +++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c @@ -711,6 +711,9 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c) brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MOV(p, get_addr_reg(stack_index), brw_address(c->stack)); + if (intel->gen >= 6) + brw_set_acc_write_control(p, 1); + for (i = 0; i < c->nr_fp_insns; i++) { const struct prog_instruction *inst = &c->prog_instructions[i]; int dst_flags; -- cgit v1.2.3