From 5a7c2a99a65399a59f54c6a0756c106c1ae048ff Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 5 Jan 2010 11:07:54 -0800 Subject: i965: Fix build after blind merge of mesa 7.7 by Brian. --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/mesa/drivers/dri/i965') diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 9db434c596..f26cfabb7d 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -511,7 +511,8 @@ brw_update_renderbuffer_surface(struct brw_context *brw, struct gl_renderbuffer *rb, unsigned int unit) { - GLcontext *ctx = &brw->intel.ctx; + struct intel_context *intel = &brw->intel;; + GLcontext *ctx = &intel->ctx; dri_bo *region_bo = NULL; struct intel_renderbuffer *irb = intel_renderbuffer(rb); struct intel_region *region = irb ? irb->region : NULL; @@ -622,7 +623,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw, tile_base = ((key.draw_y / 32) * (32 * pitch)); tile_base += (key.draw_x - tile_x) / (128 / key.cpp) * 4096; } - assert(BRW_IS_G4X(brw) || (tile_x == 0 && tile_y == 0)); + assert(intel->is_g4x || (tile_x == 0 && tile_y == 0)); assert(tile_x % 4 == 0); assert(tile_y % 2 == 0); /* Note that the low bits of these fields are missing, so -- cgit v1.2.3