From f00a64999c197e6a96e65fd00f64224a6f22c9fa Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 16 Nov 2007 16:43:45 -0800 Subject: [intel] Add 965 support to shared intel_blit.c This requires that regions grow a marker of whether they are tiled or not, because fence (surface) registers are ignored by the 965 2D engine. --- src/mesa/drivers/dri/intel/intel_tex_copy.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/intel/intel_tex_copy.c') diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c index b85a25642a..f1a455a04c 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_copy.c +++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c @@ -40,7 +40,6 @@ #include "intel_fbo.h" #include "intel_tex.h" #include "intel_blit.h" -#include "intel_pixel.h" #define FILE_DEBUG_FLAG DEBUG_TEXTURE @@ -142,9 +141,11 @@ do_copy_texsubimage(struct intel_context *intel, -src->pitch, src->buffer, src->height * src->pitch * src->cpp, + GL_FALSE, intelImage->mt->pitch, intelImage->mt->region->buffer, image_offset, + intelImage->mt->region->tiled, x, y + height, dstx, dsty, width, height, GL_COPY); /* ? */ -- cgit v1.2.3