From 1ba96651e12b3c74fb9c8f5a61b183ef36a27b1e Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 3 Jun 2009 16:40:20 +0000 Subject: intel: Add support for tiled textures. This is about a 30% performance win in OA with high settings on my GM45, and experiments with 915GM indicate that it'll be around a 20% win there. Currently, 915-class hardware is seriously hurt by the fact that we use fence regs to control the tiling even for 3D instructions that could live without them, so we spend a bunch of time waiting on previous rendering in order to pull fences off. Thus, the texture_tiling driconf option defaults off there for now. --- src/mesa/drivers/dri/intel/intel_tex_layout.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'src/mesa/drivers/dri/intel/intel_tex_layout.c') diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c index e6f9a41779..b8be7ef41a 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_layout.c +++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c @@ -52,7 +52,9 @@ GLuint intel_compressed_alignment(GLenum internalFormat) return alignment; } -void i945_miptree_layout_2d( struct intel_context *intel, struct intel_mipmap_tree *mt ) +void i945_miptree_layout_2d( struct intel_context *intel, + struct intel_mipmap_tree *mt, + uint32_t tiling ) { GLint align_h = 2, align_w = 4; GLuint level; @@ -86,13 +88,18 @@ void i945_miptree_layout_2d( struct intel_context *intel, struct intel_mipmap_tr if (mip1_width > mt->pitch) { mt->pitch = mip1_width; + + if (tiling == I915_TILING_X) + mt->pitch = ALIGN(mt->pitch * mt->cpp, 512) / mt->cpp; + if (tiling == I915_TILING_Y) + mt->pitch = ALIGN(mt->pitch * mt->cpp, 128) / mt->cpp; } } /* Pitch must be a whole number of dwords, even though we * express it in texels. */ - mt->pitch = intel_miptree_pitch_align (intel, mt, mt->pitch); + mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->pitch); mt->total_height = 0; for ( level = mt->first_level ; level <= mt->last_level ; level++ ) { -- cgit v1.2.3 From 38eddf04ed04966db09b67de4cdabef681dc2696 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Sat, 6 Jun 2009 07:22:00 +0000 Subject: intel: Remove an unneeded hunk that slipped in with texture tiling. intel_miptree_pitch_align does this later on. --- src/mesa/drivers/dri/intel/intel_tex_layout.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'src/mesa/drivers/dri/intel/intel_tex_layout.c') diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c index b8be7ef41a..2c1b722b7f 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_layout.c +++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c @@ -88,11 +88,6 @@ void i945_miptree_layout_2d( struct intel_context *intel, if (mip1_width > mt->pitch) { mt->pitch = mip1_width; - - if (tiling == I915_TILING_X) - mt->pitch = ALIGN(mt->pitch * mt->cpp, 512) / mt->cpp; - if (tiling == I915_TILING_Y) - mt->pitch = ALIGN(mt->pitch * mt->cpp, 128) / mt->cpp; } } -- cgit v1.2.3