From 43cf0d1eebb9f425e1a0e176394b64e2cb406709 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Mon, 6 Apr 2009 13:15:54 -0700 Subject: intel / DRI2: Track and flush front-buffer rendering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Track two flags: whether or not front-buffer rendering is currently enabled and whether or not front-buffer rendering has been enabled since the last glFlush. If the second flag is set, the front-buffer is flushed via a loader call back. If the first flag is cleared, the second flag is cleared at this time. Signed-off-by: Ian Romanick Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/intel/intel_buffers.c | 8 ++++++++ src/mesa/drivers/dri/intel/intel_context.c | 20 ++++++++++++++++++++ src/mesa/drivers/dri/intel/intel_context.h | 18 ++++++++++++++++++ 3 files changed, 46 insertions(+) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c index 0929a2c223..f1249f7635 100644 --- a/src/mesa/drivers/dri/intel/intel_buffers.c +++ b/src/mesa/drivers/dri/intel/intel_buffers.c @@ -202,6 +202,8 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb) intel_batchbuffer_flush(intel->batch); intel->front_cliprects = GL_TRUE; colorRegions[0] = intel_get_rb_region(fb, BUFFER_FRONT_LEFT); + + intel->front_buffer_dirty = GL_TRUE; } else { if (!intel->constant_cliprect && intel->front_cliprects) @@ -319,6 +321,12 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb) static void intelDrawBuffer(GLcontext * ctx, GLenum mode) { + if (ctx->DrawBuffer->Name == 0) { + struct intel_context *const intel = intel_context(ctx); + + intel->is_front_buffer_rendering = (mode == GL_FRONT_LEFT); + } + intel_draw_buffer(ctx, ctx->DrawBuffer); } diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index a664e74936..797bfa8c4b 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -391,6 +391,26 @@ intel_flush(GLcontext *ctx, GLboolean needs_mi_flush) if (intel->batch->map != intel->batch->ptr) intel_batchbuffer_flush(intel->batch); + + if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) { + __DRIscreen *const screen = intel->intelScreen->driScrnPriv; + + if ((screen->dri2.loader->base.version >= 2) + && (screen->dri2.loader->flushFrontBuffer != NULL)) { + (*screen->dri2.loader->flushFrontBuffer)(intel->driDrawable, + intel->driDrawable->loaderPrivate); + + /* Only clear the dirty bit if front-buffer rendering is no longer + * enabled. This is done so that the dirty bit can only be set in + * glDrawBuffer. Otherwise the dirty bit would have to be set at + * each of N places that do rendering. This has worse performances, + * but it is much easier to get correct. + */ + if (intel->is_front_buffer_rendering) { + intel->front_buffer_dirty = GL_FALSE; + } + } + } } void diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index d635f3f50d..bd3810549a 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -262,11 +262,29 @@ struct intel_context * flush time while the lock is held. */ GLboolean constant_cliprect; + /** * In !constant_cliprect mode, set to true if the front cliprects should be * used instead of back. */ GLboolean front_cliprects; + + /** + * Set if rendering has occured to the drawable's front buffer. + * + * This is used in the DRI2 case to detect that glFlush should also copy + * the contents of the fake front buffer to the real front buffer. + */ + GLboolean front_buffer_dirty; + + /** + * Track whether front-buffer rendering is currently enabled + * + * A separate flag is used to track this in order to support MRT more + * easily. + */ + GLboolean is_front_buffer_rendering; + drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */ int perf_boxes; -- cgit v1.2.3 From 6a6e478e5555714226c6f15c63c393f5c0d74de4 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Tue, 7 Apr 2009 11:23:10 -0700 Subject: intel / DRI2: Accept fake front-buffer from loader MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Handle the loader returning a fake front-buffer. Since the driver never specifically requests a fake front-buffer, the driver assumes that it will never receive both a fake and a real front-buffer. Signed-off-by: Ian Romanick Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/intel/intel_context.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index 797bfa8c4b..56d03c1e78 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -235,6 +235,11 @@ intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) region_name = "dri2 front buffer"; break; + case __DRI_BUFFER_FAKE_FRONT_LEFT: + rb = intel_fb->color_rb[0]; + region_name = "dri2 fake front buffer"; + break; + case __DRI_BUFFER_BACK_LEFT: rb = intel_fb->color_rb[1]; region_name = "dri2 back buffer"; -- cgit v1.2.3 From ded05d32d5f948770ece088ea0ed6363c0055a4c Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Fri, 10 Apr 2009 08:35:21 -0600 Subject: intel: added screen->dri2.loader null pointer check in intel_flush() Fixes segfaults when rendering to front buffer. --- src/mesa/drivers/dri/intel/intel_context.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index 56d03c1e78..3436b8ecd3 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -400,7 +400,8 @@ intel_flush(GLcontext *ctx, GLboolean needs_mi_flush) if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) { __DRIscreen *const screen = intel->intelScreen->driScrnPriv; - if ((screen->dri2.loader->base.version >= 2) + if (screen->dri2.loader && + (screen->dri2.loader->base.version >= 2) && (screen->dri2.loader->flushFrontBuffer != NULL)) { (*screen->dri2.loader->flushFrontBuffer)(intel->driDrawable, intel->driDrawable->loaderPrivate); -- cgit v1.2.3 From 153012b29b4f2183a1be6a01eec63e720a192718 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Sat, 11 Apr 2009 14:02:33 -0700 Subject: DRI2: Don't fault on NULL DrawBuffer It is possible for ctx->DrawBuffer to be NULL, so don't fault when that happens. This change is not being committed to master because it doesn't appear to be necessary there. Signed-off-by: Ian Romanick Cherry picked from mesa_7_4_branch, commit 49e0c74ddd91900fc4effb6d305d56e0563b456d --- src/mesa/drivers/dri/intel/intel_buffers.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c index f1249f7635..90964df355 100644 --- a/src/mesa/drivers/dri/intel/intel_buffers.c +++ b/src/mesa/drivers/dri/intel/intel_buffers.c @@ -321,7 +321,7 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb) static void intelDrawBuffer(GLcontext * ctx, GLenum mode) { - if (ctx->DrawBuffer->Name == 0) { + if ((ctx->DrawBuffer != NULL) && (ctx->DrawBuffer->Name == 0)) { struct intel_context *const intel = intel_context(ctx); intel->is_front_buffer_rendering = (mode == GL_FRONT_LEFT); -- cgit v1.2.3 From 8bc3a6eb1918710eadecb9b8d28a4afa2150a257 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 9 Apr 2009 11:03:03 -0700 Subject: intel: Fix segfault when doing SW mipmap generation with a PBO texture upload. Triggered in test-fbo from clutter since 37fb2d9b23eab5dbbb43a212c3475cb8016837d8. --- src/mesa/drivers/dri/intel/intel_tex_image.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c index 71561cf85c..c81f230984 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_image.c +++ b/src/mesa/drivers/dri/intel/intel_tex_image.c @@ -316,7 +316,7 @@ intelTexImage(GLcontext * ctx, GLint postConvHeight = height; GLint texelBytes, sizeInBytes; GLuint dstRowStride, srcRowStride = texImage->RowStride; - + GLboolean needs_map; DBG("%s target %s level %d %dx%dx%d border %d\n", __FUNCTION__, _mesa_lookup_enum_by_nr(target), level, width, height, depth, border); @@ -482,8 +482,15 @@ intelTexImage(GLcontext * ctx, LOCK_HARDWARE(intel); + /* Two cases where we need a mapping of the miptree: when the user supplied + * data is mapped as well (non-PBO, memcpy upload) or when we're going to do + * (software) mipmap generation. + */ + needs_map = (pixels != NULL) || (level == texObj->BaseLevel && + texObj->GenerateMipmap); + if (intelImage->mt) { - if (pixels) + if (needs_map) texImage->Data = intel_miptree_image_map(intel, intelImage->mt, intelImage->face, @@ -549,7 +556,7 @@ intelTexImage(GLcontext * ctx, _mesa_unmap_teximage_pbo(ctx, unpack); if (intelImage->mt) { - if (pixels) + if (needs_map) intel_miptree_image_unmap(intel, intelImage->mt); texImage->Data = NULL; } -- cgit v1.2.3 From 0af7e9170fd7c0d906652378b9f78fe2ba9725ad Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 9 Apr 2009 18:31:28 -0700 Subject: i915: Add decode of dest buffer variables (destination format) --- src/mesa/drivers/dri/intel/intel_decode.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/intel/intel_decode.c b/src/mesa/drivers/dri/intel/intel_decode.c index f04638206d..a9dfe281cb 100644 --- a/src/mesa/drivers/dri/intel/intel_decode.c +++ b/src/mesa/drivers/dri/intel/intel_decode.c @@ -800,6 +800,7 @@ static int decode_3d_1d(uint32_t *data, int count, uint32_t hw_offset, int *failures, int i830) { unsigned int len, i, c, opcode, word, map, sampler, instr; + char *format; struct { uint32_t opcode; @@ -1001,6 +1002,35 @@ decode_3d_1d(uint32_t *data, int count, uint32_t hw_offset, int *failures, int i (*failures)++; } return len; + case 0x85: + len = (data[0] & 0x0000000f) + 2; + + if (len != 2) + fprintf(out, "Bad count in 3DSTATE_DEST_BUFFER_VARIABLES\n"); + if (count < 2) + BUFFER_FAIL(count, len, "3DSTATE_DEST_BUFFER_VARIABLES"); + + instr_out(data, hw_offset, 0, + "3DSTATE_DEST_BUFFER_VARIABLES\n"); + + switch ((data[1] >> 8) & 0xf) { + case 0x0: format = "g8"; break; + case 0x1: format = "x1r5g5b5"; break; + case 0x2: format = "r5g6b5"; break; + case 0x3: format = "a8r8g8b8"; break; + case 0x4: format = "ycrcb_swapy"; break; + case 0x5: format = "ycrcb_normal"; break; + case 0x6: format = "ycrcb_swapuv"; break; + case 0x7: format = "ycrcb_swapuvy"; break; + case 0x8: format = "a4r4g4b4"; break; + case 0x9: format = "a1r5g5b5"; break; + case 0xa: format = "a2r10g10b10"; break; + default: format = "BAD"; break; + } + instr_out(data, hw_offset, 1, "%s format, early Z %sabled\n", + format, + (data[1] & (1 << 31)) ? "en" : "dis"); + return len; } for (opcode = 0; opcode < sizeof(opcodes_3d_1d) / sizeof(opcodes_3d_1d[0]); -- cgit v1.2.3 From 69cbf3c68675915517ae64c81d7a8a42de4e01a3 Mon Sep 17 00:00:00 2001 From: Roland Scheidegger Date: Thu, 16 Apr 2009 17:39:43 +0200 Subject: intel: fix small compressed texture upload need to round up height for _mesa_copy_rect otherwise textures with height smaller than 4 won't get copied to the miptree at all Also fix up the confusing debug output (don't output unitialized values, and output if data is present and the compressed flag) --- src/mesa/drivers/dri/intel/intel_tex_image.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c index c81f230984..1f192dafbe 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_image.c +++ b/src/mesa/drivers/dri/intel/intel_tex_image.c @@ -315,7 +315,7 @@ intelTexImage(GLcontext * ctx, GLint postConvWidth = width; GLint postConvHeight = height; GLint texelBytes, sizeInBytes; - GLuint dstRowStride, srcRowStride = texImage->RowStride; + GLuint dstRowStride = 0, srcRowStride = texImage->RowStride; GLboolean needs_map; DBG("%s target %s level %d %dx%dx%d border %d\n", __FUNCTION__, @@ -516,8 +516,9 @@ intelTexImage(GLcontext * ctx, } DBG("Upload image %dx%dx%d row_len %d " - "pitch %d\n", - width, height, depth, width * texelBytes, dstRowStride); + "pitch %d pixels %d compressed %d\n", + width, height, depth, width * texelBytes, dstRowStride, + pixels ? 1 : 0, compressed); /* Copy data. Would like to know when it's ok for us to eg. use * the blitter to copy. Or, use the hardware to do the format @@ -530,7 +531,7 @@ intelTexImage(GLcontext * ctx, _mesa_copy_rect(texImage->Data, dst->cpp, dst->pitch, 0, 0, intelImage->mt->level[level].width, - intelImage->mt->level[level].height/4, + (intelImage->mt->level[level].height+3)/4, pixels, srcRowStride, 0, 0); -- cgit v1.2.3 From 2c30fd84dfa052949a117c78d932b58c1f88b446 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 9 Apr 2009 18:30:12 -0700 Subject: intel: Add support for argb1555, argb4444 FBOs and fix rgb565 fbo readpixels. Also enable them all regardless of screen bpp, as 32 bpp what I've been testing against, and haven't been able to detect any screen bpp-specific troubles with them. --- src/mesa/drivers/dri/common/spantmp2.h | 65 +++++++++ src/mesa/drivers/dri/i915/i830_vtbl.c | 30 +++- src/mesa/drivers/dri/i915/i915_vtbl.c | 28 +++- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 48 +++++-- src/mesa/drivers/dri/intel/intel_blit.c | 54 +++++-- src/mesa/drivers/dri/intel/intel_context.h | 3 + src/mesa/drivers/dri/intel/intel_fbo.c | 69 +++++---- src/mesa/drivers/dri/intel/intel_fbo.h | 2 + src/mesa/drivers/dri/intel/intel_span.c | 172 +++++++++++++++-------- 9 files changed, 346 insertions(+), 125 deletions(-) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/common/spantmp2.h b/src/mesa/drivers/dri/common/spantmp2.h index f2868cb58a..89c815722f 100644 --- a/src/mesa/drivers/dri/common/spantmp2.h +++ b/src/mesa/drivers/dri/common/spantmp2.h @@ -82,6 +82,71 @@ rgba[3] = 0xff; \ } while (0) +#elif (SPANTMP_PIXEL_FMT == GL_BGRA) && (SPANTMP_PIXEL_TYPE == GL_UNSIGNED_SHORT_4_4_4_4_REV) + +/** + ** GL_BGRA, GL_UNSIGNED_SHORT_4_4_4_4_REV + **/ + +#ifndef GET_VALUE +#ifndef GET_PTR +#define GET_PTR(_x, _y) (buf + (_x) * 2 + (_y) * pitch) +#endif + +#define GET_VALUE(_x, _y) *(volatile GLushort *)(GET_PTR(_x, _y)) +#define PUT_VALUE(_x, _y, _v) *(volatile GLushort *)(GET_PTR(_x, _y)) = (_v) +#endif /* GET_VALUE */ + +#define INIT_MONO_PIXEL(p, color) \ + p = PACK_COLOR_4444(color[3], color[0], color[1], color[2]) + +#define WRITE_RGBA( _x, _y, r, g, b, a ) \ + PUT_VALUE(_x, _y, PACK_COLOR_4444(a, r, g, b)) \ + +#define WRITE_PIXEL( _x, _y, p ) PUT_VALUE(_x, _y, p) + +#define READ_RGBA( rgba, _x, _y ) \ + do { \ + GLushort p = GET_VALUE(_x, _y); \ + rgba[0] = ((p >> 8) & 0xf) * 0x11; \ + rgba[1] = ((p >> 4) & 0xf) * 0x11; \ + rgba[2] = ((p >> 0) & 0xf) * 0x11; \ + rgba[3] = ((p >> 12) & 0xf) * 0x11; \ + } while (0) + + +#elif (SPANTMP_PIXEL_FMT == GL_BGRA) && (SPANTMP_PIXEL_TYPE == GL_UNSIGNED_SHORT_1_5_5_5_REV) + +/** + ** GL_BGRA, GL_UNSIGNED_SHORT_1_5_5_5_REV + **/ + +#ifndef GET_VALUE +#ifndef GET_PTR +#define GET_PTR(_x, _y) (buf + (_x) * 2 + (_y) * pitch) +#endif + +#define GET_VALUE(_x, _y) *(volatile GLushort *)(GET_PTR(_x, _y)) +#define PUT_VALUE(_x, _y, _v) *(volatile GLushort *)(GET_PTR(_x, _y)) = (_v) +#endif /* GET_VALUE */ + +#define INIT_MONO_PIXEL(p, color) \ + p = PACK_COLOR_1555(color[3], color[0], color[1], color[2]) + +#define WRITE_RGBA( _x, _y, r, g, b, a ) \ + PUT_VALUE(_x, _y, PACK_COLOR_1555(a, r, g, b)) \ + +#define WRITE_PIXEL( _x, _y, p ) PUT_VALUE(_x, _y, p) + +#define READ_RGBA( rgba, _x, _y ) \ + do { \ + GLushort p = GET_VALUE(_x, _y); \ + rgba[0] = ((p >> 7) & 0xf8) * 255 / 0xf8; \ + rgba[1] = ((p >> 2) & 0xf8) * 255 / 0xf8; \ + rgba[2] = ((p << 3) & 0xf8) * 255 / 0xf8; \ + rgba[3] = ((p >> 15) & 0x1) * 0xff; \ + } while (0) + #elif (SPANTMP_PIXEL_FMT == GL_BGRA) && (SPANTMP_PIXEL_TYPE == GL_UNSIGNED_INT_8_8_8_8_REV) /** diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index 1a94921078..3bf02de61f 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -26,12 +26,14 @@ **************************************************************************/ #include "glapi/glapi.h" +#include "main/texformat.h" #include "i830_context.h" #include "i830_reg.h" #include "intel_batchbuffer.h" #include "intel_regions.h" #include "intel_tris.h" +#include "intel_fbo.h" #include "tnl/t_context.h" #include "tnl/t_vertex.h" @@ -614,6 +616,8 @@ i830_state_draw_region(struct intel_context *intel, { struct i830_context *i830 = i830_context(&intel->ctx); GLcontext *ctx = &intel->ctx; + struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0]; + struct intel_renderbuffer *irb = intel_renderbuffer(rb); GLuint value; ASSERT(state == &i830->state || state == &i830->meta); @@ -651,13 +655,27 @@ i830_state_draw_region(struct intel_context *intel, */ value = (DSTORG_HORT_BIAS(0x8) | /* .5 */ DSTORG_VERT_BIAS(0x8) | DEPTH_IS_Z); /* .5 */ - - if (color_region && color_region->cpp == 4) { - value |= DV_PF_8888; - } - else { - value |= DV_PF_565; + + if (irb != NULL) { + switch (irb->texformat->MesaFormat) { + case MESA_FORMAT_ARGB8888: + value |= DV_PF_8888; + break; + case MESA_FORMAT_RGB565: + value |= DV_PF_565; + break; + case MESA_FORMAT_ARGB1555: + value |= DV_PF_1555; + break; + case MESA_FORMAT_ARGB4444: + value |= DV_PF_4444; + break; + default: + _mesa_problem(ctx, "Bad renderbuffer format: %d\n", + irb->texformat->MesaFormat); + } } + if (depth_region && depth_region->cpp == 4) { value |= DEPTH_FRMT_24_FIXED_8_OTHER; } diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c index 3f6d282d34..115004616f 100644 --- a/src/mesa/drivers/dri/i915/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915/i915_vtbl.c @@ -32,6 +32,7 @@ #include "main/imports.h" #include "main/macros.h" #include "main/colormac.h" +#include "main/texformat.h" #include "tnl/t_context.h" #include "tnl/t_vertex.h" @@ -40,6 +41,7 @@ #include "intel_tex.h" #include "intel_regions.h" #include "intel_tris.h" +#include "intel_fbo.h" #include "i915_reg.h" #include "i915_context.h" @@ -542,6 +544,8 @@ i915_state_draw_region(struct intel_context *intel, { struct i915_context *i915 = i915_context(&intel->ctx); GLcontext *ctx = &intel->ctx; + struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0]; + struct intel_renderbuffer *irb = intel_renderbuffer(rb); GLuint value; ASSERT(state == &i915->state || state == &i915->meta); @@ -580,12 +584,26 @@ i915_state_draw_region(struct intel_context *intel, value = (DSTORG_HORT_BIAS(0x8) | /* .5 */ DSTORG_VERT_BIAS(0x8) | /* .5 */ LOD_PRECLAMP_OGL | TEX_DEFAULT_COLOR_OGL); - if (color_region && color_region->cpp == 4) { - value |= DV_PF_8888; - } - else { - value |= (DITHER_FULL_ALWAYS | DV_PF_565); + if (irb != NULL) { + switch (irb->texformat->MesaFormat) { + case MESA_FORMAT_ARGB8888: + value |= DV_PF_8888; + break; + case MESA_FORMAT_RGB565: + value |= DV_PF_565 | DITHER_FULL_ALWAYS; + break; + case MESA_FORMAT_ARGB1555: + value |= DV_PF_1555 | DITHER_FULL_ALWAYS; + break; + case MESA_FORMAT_ARGB4444: + value |= DV_PF_4444 | DITHER_FULL_ALWAYS; + break; + default: + _mesa_problem(ctx, "Bad renderbuffer format: %d\n", + irb->texformat->MesaFormat); + } } + if (depth_region && depth_region->cpp == 4) { value |= DEPTH_FRMT_24_FIXED_8_OTHER; } diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index ce5dbb334b..0dc377be65 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -38,7 +38,7 @@ #include "intel_mipmap_tree.h" #include "intel_batchbuffer.h" #include "intel_tex.h" - +#include "intel_fbo.h" #include "brw_context.h" #include "brw_state.h" @@ -505,15 +505,18 @@ brw_update_vs_constant_surface( GLcontext *ctx, * usable for further buffers when doing ARB_draw_buffer support. */ static void -brw_update_region_surface(struct brw_context *brw, struct intel_region *region, - unsigned int unit, GLboolean cached) +brw_update_renderbuffer_surface(struct brw_context *brw, + struct gl_renderbuffer *rb, + unsigned int unit, GLboolean cached) { GLcontext *ctx = &brw->intel.ctx; dri_bo *region_bo = NULL; + struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct intel_region *region = irb ? irb->region : NULL; struct { unsigned int surface_type; unsigned int surface_format; - unsigned int width, height, cpp; + unsigned int width, height, pitch, cpp; GLubyte color_mask[4]; GLboolean color_blend; uint32_t tiling; @@ -525,13 +528,27 @@ brw_update_region_surface(struct brw_context *brw, struct intel_region *region, region_bo = region->buffer; key.surface_type = BRW_SURFACE_2D; - if (region->cpp == 4) + switch (irb->texformat->MesaFormat) { + case MESA_FORMAT_ARGB8888: key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; - else + break; + case MESA_FORMAT_RGB565: key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; + break; + case MESA_FORMAT_ARGB1555: + key.surface_format = BRW_SURFACEFORMAT_B5G5R5A1_UNORM; + break; + case MESA_FORMAT_ARGB4444: + key.surface_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM; + break; + default: + _mesa_problem(ctx, "Bad renderbuffer format: %d\n", + irb->texformat->MesaFormat); + } key.tiling = region->tiling; - key.width = region->pitch; /* XXX: not really! */ - key.height = region->height; + key.width = rb->Width; + key.height = rb->Height; + key.pitch = region->pitch; key.cpp = region->cpp; } else { key.surface_type = BRW_SURFACE_NULL; @@ -567,7 +584,7 @@ brw_update_region_surface(struct brw_context *brw, struct intel_region *region, surf.ss2.width = key.width - 1; surf.ss2.height = key.height - 1; brw_set_surface_tiling(&surf, key.tiling); - surf.ss3.pitch = (key.width * key.cpp) - 1; + surf.ss3.pitch = (key.pitch * key.cpp) - 1; /* _NEW_COLOR */ surf.ss0.color_blend = key.color_blend; @@ -655,14 +672,17 @@ static void prepare_wm_surfaces(struct brw_context *brw ) GLuint i; int old_nr_surfaces; + /* _NEW_BUFFERS */ /* Update surfaces for drawing buffers */ - if (brw->state.nr_color_regions > 1) { - for (i = 0; i < brw->state.nr_color_regions; i++) { - brw_update_region_surface(brw, brw->state.color_regions[i], i, - GL_FALSE); + if (ctx->DrawBuffer->_NumColorDrawBuffers >= 1) { + for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) { + brw_update_renderbuffer_surface(brw, + ctx->DrawBuffer->_ColorDrawBuffers[i], + i, + GL_FALSE); } } else { - brw_update_region_surface(brw, brw->state.color_regions[0], 0, GL_TRUE); + brw_update_renderbuffer_surface(brw, NULL, 0, GL_TRUE); } old_nr_surfaces = brw->wm.nr_surfaces; diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c index 4ae9b118a3..4919828131 100644 --- a/src/mesa/drivers/dri/intel/intel_blit.c +++ b/src/mesa/drivers/dri/intel/intel_blit.c @@ -32,6 +32,8 @@ #include "main/mtypes.h" #include "main/context.h" #include "main/enums.h" +#include "main/texformat.h" +#include "main/colormac.h" #include "intel_blit.h" #include "intel_buffers.h" @@ -484,10 +486,9 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask) const GLbitfield bufBit = 1 << buf; if ((clearMask & bufBit) && !(bufBit & skipBuffers)) { /* OK, clear this renderbuffer */ - struct intel_region *irb_region = - intel_get_rb_region(fb, buf); + struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, buf); dri_bo *write_buffer = - intel_region_buffer(intel, irb_region, + intel_region_buffer(intel, irb->region, all ? INTEL_WRITE_FULL : INTEL_WRITE_PART); @@ -495,15 +496,13 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask) GLint pitch, cpp; GLuint BR13, CMD; - ASSERT(irb_region); - - pitch = irb_region->pitch; - cpp = irb_region->cpp; + pitch = irb->region->pitch; + cpp = irb->region->cpp; DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", __FUNCTION__, - irb_region->buffer, (pitch * cpp), - irb_region->draw_offset, + irb->region->buffer, (pitch * cpp), + irb->region->draw_offset, b.x1, b.y1, b.x2 - b.x1, b.y2 - b.y1); BR13 = 0xf0 << 16; @@ -529,7 +528,7 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask) } #ifndef I915 - if (irb_region->tiling != I915_TILING_NONE) { + if (irb->region->tiling != I915_TILING_NONE) { CMD |= XY_DST_TILED; pitch /= 4; } @@ -540,9 +539,36 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask) clearVal = clear_depth; } else { - clearVal = (cpp == 4) - ? intel->ClearColor8888 : intel->ClearColor565; - } + uint8_t clear[4]; + GLclampf *color = ctx->Color.ClearColor; + + CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]); + CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]); + CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]); + CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]); + + switch (irb->texformat->MesaFormat) { + case MESA_FORMAT_ARGB8888: + clearVal = intel->ClearColor8888; + break; + case MESA_FORMAT_RGB565: + clearVal = intel->ClearColor565; + break; + case MESA_FORMAT_ARGB4444: + clearVal = PACK_COLOR_4444(clear[3], clear[0], + clear[1], clear[2]); + break; + case MESA_FORMAT_ARGB1555: + clearVal = PACK_COLOR_1555(clear[3], clear[0], + clear[1], clear[2]); + break; + default: + _mesa_problem(ctx, "Unexpected renderbuffer format: %d\n", + irb->texformat->MesaFormat); + clearVal = 0; + } + } + /* _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n", buf, irb->Base.Name); @@ -558,7 +584,7 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask) OUT_BATCH((b.y2 << 16) | b.x2); OUT_RELOC(write_buffer, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - irb_region->draw_offset); + irb->region->draw_offset); OUT_BATCH(clearVal); ADVANCE_BATCH(); clearMask &= ~bufBit; /* turn off bit, for faster loop exit */ diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index bd3810549a..d798225ddd 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -48,6 +48,8 @@ #define DV_PF_555 (1<<8) #define DV_PF_565 (2<<8) #define DV_PF_8888 (3<<8) +#define DV_PF_4444 (8<<8) +#define DV_PF_1555 (9<<8) struct intel_region; struct intel_context; @@ -337,6 +339,7 @@ extern char *__progname; #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) #define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1)) +#define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0) #define INTEL_FIREVERTICES(intel) \ do { \ diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index a401f730ba..52647ddf8b 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -119,6 +119,7 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, rb->RedBits = 5; rb->GreenBits = 6; rb->BlueBits = 5; + irb->texformat = &_mesa_texformat_rgb565; cpp = 2; break; case GL_RGB: @@ -132,6 +133,7 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, rb->GreenBits = 8; rb->BlueBits = 8; rb->AlphaBits = 0; + irb->texformat = &_mesa_texformat_argb8888; /* XXX: Need xrgb8888 */ cpp = 4; break; case GL_RGBA: @@ -148,6 +150,7 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, rb->GreenBits = 8; rb->BlueBits = 8; rb->AlphaBits = 8; + irb->texformat = &_mesa_texformat_argb8888; cpp = 4; break; case GL_STENCIL_INDEX: @@ -160,12 +163,14 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, rb->DataType = GL_UNSIGNED_INT_24_8_EXT; rb->StencilBits = 8; cpp = 4; + irb->texformat = &_mesa_texformat_s8_z24; break; case GL_DEPTH_COMPONENT16: rb->_ActualFormat = GL_DEPTH_COMPONENT16; rb->DataType = GL_UNSIGNED_SHORT; rb->DepthBits = 16; cpp = 2; + irb->texformat = &_mesa_texformat_z16; break; case GL_DEPTH_COMPONENT: case GL_DEPTH_COMPONENT24: @@ -174,6 +179,7 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, rb->DataType = GL_UNSIGNED_INT_24_8_EXT; rb->DepthBits = 24; cpp = 4; + irb->texformat = &_mesa_texformat_s8_z24; break; case GL_DEPTH_STENCIL_EXT: case GL_DEPTH24_STENCIL8_EXT: @@ -182,6 +188,7 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, rb->DepthBits = 24; rb->StencilBits = 8; cpp = 4; + irb->texformat = &_mesa_texformat_s8_z24; break; default: _mesa_problem(ctx, @@ -322,6 +329,7 @@ intel_create_renderbuffer(GLenum intFormat) irb->Base.GreenBits = 6; irb->Base.BlueBits = 5; irb->Base.DataType = GL_UNSIGNED_BYTE; + irb->texformat = &_mesa_texformat_rgb565; break; case GL_RGB8: irb->Base._ActualFormat = GL_RGB8; @@ -331,6 +339,7 @@ intel_create_renderbuffer(GLenum intFormat) irb->Base.BlueBits = 8; irb->Base.AlphaBits = 0; irb->Base.DataType = GL_UNSIGNED_BYTE; + irb->texformat = &_mesa_texformat_argb8888; /* XXX: Need xrgb8888 */ break; case GL_RGBA8: irb->Base._ActualFormat = GL_RGBA8; @@ -340,24 +349,28 @@ intel_create_renderbuffer(GLenum intFormat) irb->Base.BlueBits = 8; irb->Base.AlphaBits = 8; irb->Base.DataType = GL_UNSIGNED_BYTE; + irb->texformat = &_mesa_texformat_argb8888; break; case GL_STENCIL_INDEX8_EXT: irb->Base._ActualFormat = GL_STENCIL_INDEX8_EXT; irb->Base._BaseFormat = GL_STENCIL_INDEX; irb->Base.StencilBits = 8; irb->Base.DataType = GL_UNSIGNED_BYTE; + irb->texformat = &_mesa_texformat_s8_z24; break; case GL_DEPTH_COMPONENT16: irb->Base._ActualFormat = GL_DEPTH_COMPONENT16; irb->Base._BaseFormat = GL_DEPTH_COMPONENT; irb->Base.DepthBits = 16; irb->Base.DataType = GL_UNSIGNED_SHORT; + irb->texformat = &_mesa_texformat_z16; break; case GL_DEPTH_COMPONENT24: irb->Base._ActualFormat = GL_DEPTH24_STENCIL8_EXT; irb->Base._BaseFormat = GL_DEPTH_COMPONENT; irb->Base.DepthBits = 24; irb->Base.DataType = GL_UNSIGNED_INT; + irb->texformat = &_mesa_texformat_s8_z24; break; case GL_DEPTH24_STENCIL8_EXT: irb->Base._ActualFormat = GL_DEPTH24_STENCIL8_EXT; @@ -365,6 +378,7 @@ intel_create_renderbuffer(GLenum intFormat) irb->Base.DepthBits = 24; irb->Base.StencilBits = 8; irb->Base.DataType = GL_UNSIGNED_INT_24_8_EXT; + irb->texformat = &_mesa_texformat_s8_z24; break; default: _mesa_problem(NULL, @@ -449,6 +463,8 @@ static GLboolean intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb, struct gl_texture_image *texImage) { + irb->texformat = texImage->TexFormat; + if (texImage->TexFormat == &_mesa_texformat_argb8888) { irb->Base._ActualFormat = GL_RGBA8; irb->Base._BaseFormat = GL_RGBA; @@ -458,9 +474,21 @@ intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb, else if (texImage->TexFormat == &_mesa_texformat_rgb565) { irb->Base._ActualFormat = GL_RGB5; irb->Base._BaseFormat = GL_RGB; - irb->Base.DataType = GL_UNSIGNED_SHORT; + irb->Base.DataType = GL_UNSIGNED_BYTE; DBG("Render to RGB5 texture OK\n"); } + else if (texImage->TexFormat == &_mesa_texformat_argb1555) { + irb->Base._ActualFormat = GL_RGB5_A1; + irb->Base._BaseFormat = GL_RGBA; + irb->Base.DataType = GL_UNSIGNED_BYTE; + DBG("Render to ARGB1555 texture OK\n"); + } + else if (texImage->TexFormat == &_mesa_texformat_argb4444) { + irb->Base._ActualFormat = GL_RGBA4; + irb->Base._BaseFormat = GL_RGBA; + irb->Base.DataType = GL_UNSIGNED_BYTE; + DBG("Render to ARGB4444 texture OK\n"); + } else if (texImage->TexFormat == &_mesa_texformat_z16) { irb->Base._ActualFormat = GL_DEPTH_COMPONENT16; irb->Base._BaseFormat = GL_DEPTH_COMPONENT; @@ -631,11 +659,11 @@ intel_finish_render_texture(GLcontext * ctx, static void intel_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb) { - struct intel_context *intel = intel_context(ctx); const struct intel_renderbuffer *depthRb = intel_get_renderbuffer(fb, BUFFER_DEPTH); const struct intel_renderbuffer *stencilRb = intel_get_renderbuffer(fb, BUFFER_STENCIL); + int i; if (stencilRb && stencilRb != depthRb) { /* we only support combined depth/stencil buffers, not separate @@ -644,32 +672,21 @@ intel_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb) fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT; } - /* check that texture color buffers are a format we can render into */ - { - const struct gl_texture_format *supportedFormat; - GLuint i; + for (i = 0; i < ctx->Const.MaxDrawBuffers; i++) { + struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[i]; + struct intel_renderbuffer *irb = intel_renderbuffer(rb); - /* The texture format we can render into seems to depend on the - * screen depth. There currently seems to be a problem when - * rendering into a rgb565 texture when the screen is abgr8888. - */ + if (rb == NULL) + continue; - if (intel->ctx.Visual.rgbBits >= 24) - supportedFormat = &_mesa_texformat_argb8888; - else - supportedFormat = &_mesa_texformat_rgb565; - - for (i = 0; i < ctx->Const.MaxDrawBuffers; i++) { - const struct gl_texture_object *texObj = - fb->Attachment[BUFFER_COLOR0 + i].Texture; - if (texObj) { - const struct gl_texture_image *texImg = - texObj->Image[0][texObj->BaseLevel]; - if (texImg && texImg->TexFormat != supportedFormat) { - fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT; - break; - } - } + switch (irb->texformat->MesaFormat) { + case MESA_FORMAT_ARGB8888: + case MESA_FORMAT_RGB565: + case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_ARGB4444: + break; + default: + fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT; } } } diff --git a/src/mesa/drivers/dri/intel/intel_fbo.h b/src/mesa/drivers/dri/intel/intel_fbo.h index 7226ee026f..f0665af482 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.h +++ b/src/mesa/drivers/dri/intel/intel_fbo.h @@ -61,6 +61,8 @@ struct intel_renderbuffer struct gl_renderbuffer Base; struct intel_region *region; + const struct gl_texture_format *texformat; + GLuint vbl_pending; /**< vblank sequence number of pending flip */ uint8_t *span_cache; diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c index c3a873f1ab..34b78ebc1a 100644 --- a/src/mesa/drivers/dri/intel/intel_span.c +++ b/src/mesa/drivers/dri/intel/intel_span.c @@ -29,6 +29,7 @@ #include "main/macros.h" #include "main/mtypes.h" #include "main/colormac.h" +#include "main/texformat.h" #include "intel_buffers.h" #include "intel_fbo.h" @@ -313,6 +314,22 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, #define INTEL_TAG(x) x##_RGB565 #include "intel_spantmp.h" +/* a4r4g4b4 color span and pixel functions */ +#define INTEL_PIXEL_FMT GL_BGRA +#define INTEL_PIXEL_TYPE GL_UNSIGNED_SHORT_4_4_4_4_REV +#define INTEL_READ_VALUE(offset) pread_16(irb, offset) +#define INTEL_WRITE_VALUE(offset, v) pwrite_16(irb, offset, v) +#define INTEL_TAG(x) x##_ARGB4444 +#include "intel_spantmp.h" + +/* a1r5g5b5 color span and pixel functions */ +#define INTEL_PIXEL_FMT GL_BGRA +#define INTEL_PIXEL_TYPE GL_UNSIGNED_SHORT_1_5_5_5_REV +#define INTEL_READ_VALUE(offset) pread_16(irb, offset) +#define INTEL_WRITE_VALUE(offset, v) pwrite_16(irb, offset, v) +#define INTEL_TAG(x) x##_ARGB1555 +#include "intel_spantmp.h" + /* a8r8g8b8 color span and pixel functions */ #define INTEL_PIXEL_FMT GL_BGRA #define INTEL_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV @@ -561,8 +578,8 @@ intel_set_span_functions(struct intel_context *intel, else tiling = I915_TILING_NONE; - if (rb->_ActualFormat == GL_RGB5) { - /* 565 RGB */ + switch (irb->texformat->MesaFormat) { + case MESA_FORMAT_RGB565: switch (tiling) { case I915_TILING_NONE: default: @@ -575,38 +592,67 @@ intel_set_span_functions(struct intel_context *intel, intel_YTile_InitPointers_RGB565(rb); break; } - } - else if (rb->_ActualFormat == GL_RGB8) { - /* 8888 RGBx */ + break; + case MESA_FORMAT_ARGB4444: switch (tiling) { case I915_TILING_NONE: default: - intelInitPointers_xRGB8888(rb); + intelInitPointers_ARGB4444(rb); break; case I915_TILING_X: - intel_XTile_InitPointers_xRGB8888(rb); + intel_XTile_InitPointers_ARGB4444(rb); break; case I915_TILING_Y: - intel_YTile_InitPointers_xRGB8888(rb); + intel_YTile_InitPointers_ARGB4444(rb); break; } - } - else if (rb->_ActualFormat == GL_RGBA8) { - /* 8888 RGBA */ + break; + case MESA_FORMAT_ARGB1555: switch (tiling) { case I915_TILING_NONE: default: - intelInitPointers_ARGB8888(rb); + intelInitPointers_ARGB1555(rb); break; case I915_TILING_X: - intel_XTile_InitPointers_ARGB8888(rb); + intel_XTile_InitPointers_ARGB1555(rb); break; case I915_TILING_Y: - intel_YTile_InitPointers_ARGB8888(rb); + intel_YTile_InitPointers_ARGB1555(rb); break; } - } - else if (rb->_ActualFormat == GL_DEPTH_COMPONENT16) { + break; + case MESA_FORMAT_ARGB8888: + if (rb->AlphaBits == 0) { /* XXX: Need xRGB8888 Mesa format */ + /* 8888 RGBx */ + switch (tiling) { + case I915_TILING_NONE: + default: + intelInitPointers_xRGB8888(rb); + break; + case I915_TILING_X: + intel_XTile_InitPointers_xRGB8888(rb); + break; + case I915_TILING_Y: + intel_YTile_InitPointers_xRGB8888(rb); + break; + } + } else { + /* 8888 RGBA */ + switch (tiling) { + case I915_TILING_NONE: + default: + intelInitPointers_ARGB8888(rb); + break; + case I915_TILING_X: + intel_XTile_InitPointers_ARGB8888(rb); + break; + case I915_TILING_Y: + intel_YTile_InitPointers_ARGB8888(rb); + break; + } + } + break; + case MESA_FORMAT_Z16: switch (tiling) { case I915_TILING_NONE: default: @@ -619,51 +665,57 @@ intel_set_span_functions(struct intel_context *intel, intel_YTile_InitDepthPointers_z16(rb); break; } - } - else if (rb->_ActualFormat == GL_DEPTH_COMPONENT24) { - switch (tiling) { - case I915_TILING_NONE: - default: - intelInitDepthPointers_z24(rb); - break; - case I915_TILING_X: - intel_XTile_InitDepthPointers_z24(rb); - break; - case I915_TILING_Y: - intel_YTile_InitDepthPointers_z24(rb); - break; - } - } - else if (rb->_ActualFormat == GL_DEPTH24_STENCIL8_EXT) { - switch (tiling) { - case I915_TILING_NONE: - default: - intelInitDepthPointers_z24_s8(rb); - break; - case I915_TILING_X: - intel_XTile_InitDepthPointers_z24_s8(rb); - break; - case I915_TILING_Y: - intel_YTile_InitDepthPointers_z24_s8(rb); - break; - } - } - else if (rb->_ActualFormat == GL_STENCIL_INDEX8_EXT) { - switch (tiling) { - case I915_TILING_NONE: - default: - intelInitStencilPointers_z24_s8(rb); - break; - case I915_TILING_X: - intel_XTile_InitStencilPointers_z24_s8(rb); - break; - case I915_TILING_Y: - intel_YTile_InitStencilPointers_z24_s8(rb); - break; + break; + case MESA_FORMAT_S8_Z24: + /* There are a few different ways SW asks us to access the S8Z24 data: + * Z24 depth-only depth reads + * S8Z24 depth reads + * S8Z24 stencil reads. + */ + if (rb->_ActualFormat == GL_DEPTH_COMPONENT24) { + switch (tiling) { + case I915_TILING_NONE: + default: + intelInitDepthPointers_z24(rb); + break; + case I915_TILING_X: + intel_XTile_InitDepthPointers_z24(rb); + break; + case I915_TILING_Y: + intel_YTile_InitDepthPointers_z24(rb); + break; + } + } else if (rb->_ActualFormat == GL_DEPTH24_STENCIL8_EXT) { + switch (tiling) { + case I915_TILING_NONE: + default: + intelInitDepthPointers_z24_s8(rb); + break; + case I915_TILING_X: + intel_XTile_InitDepthPointers_z24_s8(rb); + break; + case I915_TILING_Y: + intel_YTile_InitDepthPointers_z24_s8(rb); + break; + } + } else if (rb->_ActualFormat == GL_STENCIL_INDEX8_EXT) { + switch (tiling) { + case I915_TILING_NONE: + default: + intelInitStencilPointers_z24_s8(rb); + break; + case I915_TILING_X: + intel_XTile_InitStencilPointers_z24_s8(rb); + break; + case I915_TILING_Y: + intel_YTile_InitStencilPointers_z24_s8(rb); + break; + } } - } - else { + break; + default: _mesa_problem(NULL, - "Unexpected _ActualFormat in intelSetSpanFunctions"); + "Unexpected MesaFormat in intelSetSpanFunctions"); + break; } } -- cgit v1.2.3 From 794d488e6dc795c225505b8c00a7f00f1960a5ad Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Fri, 17 Apr 2009 16:11:05 -0600 Subject: intel: make sure polygon mode is set properly in intel_clear_tris() Fixes progs/glsl/skinning.c demo. --- src/mesa/drivers/dri/intel/intel_clear.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c index 28281b3861..8c431cf189 100644 --- a/src/mesa/drivers/dri/intel/intel_clear.c +++ b/src/mesa/drivers/dri/intel/intel_clear.c @@ -93,6 +93,7 @@ intel_clear_tris(GLcontext *ctx, GLbitfield mask) GL_CURRENT_BIT | GL_DEPTH_BUFFER_BIT | GL_ENABLE_BIT | + GL_POLYGON_BIT | GL_STENCIL_BUFFER_BIT | GL_TRANSFORM_BIT | GL_CURRENT_BIT); @@ -114,6 +115,7 @@ intel_clear_tris(GLcontext *ctx, GLbitfield mask) _mesa_Disable(GL_CLIP_PLANE3); _mesa_Disable(GL_CLIP_PLANE4); _mesa_Disable(GL_CLIP_PLANE5); + _mesa_PolygonMode(GL_FRONT_AND_BACK, GL_FILL); if (ctx->Extensions.ARB_fragment_program && ctx->FragmentProgram.Enabled) { saved_fp_enable = GL_TRUE; _mesa_Disable(GL_FRAGMENT_PROGRAM_ARB); -- cgit v1.2.3 From 54fb6f0053dc153b76a2e6a242bac376c6723279 Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Sat, 18 Apr 2009 15:47:14 +0200 Subject: intel: Handle ARB_vertex_buffer_object state in intel_clear_tris(). Fixes gearsvbo app by Michael Clark. --- src/mesa/drivers/dri/intel/intel_clear.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c index 8c431cf189..6c609336a2 100644 --- a/src/mesa/drivers/dri/intel/intel_clear.c +++ b/src/mesa/drivers/dri/intel/intel_clear.c @@ -148,6 +148,11 @@ intel_clear_tris(GLcontext *ctx, GLbitfield mask) } } +#if FEATURE_ARB_vertex_buffer_object + _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, 0); + _mesa_BindBufferARB(GL_ELEMENT_ARRAY_BUFFER_ARB, 0); +#endif + intel_meta_set_passthrough_transform(intel); for (i = 0; i < 4; i++) { -- cgit v1.2.3 From 957a625b2d7cf1f84c917948c8c0f6899d86379e Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Sat, 18 Apr 2009 10:40:21 -0600 Subject: intel: #include polygon.h to silence warning --- src/mesa/drivers/dri/intel/intel_clear.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mesa/drivers/dri/intel') diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c index 6c609336a2..aed95c7c56 100644 --- a/src/mesa/drivers/dri/intel/intel_clear.c +++ b/src/mesa/drivers/dri/intel/intel_clear.c @@ -38,6 +38,7 @@ #include "main/enable.h" #include "main/macros.h" #include "main/matrix.h" +#include "main/polygon.h" #include "main/texstate.h" #include "main/shaders.h" #include "main/stencil.h" -- cgit v1.2.3