From fbe5296d1463e1052590b744f3d62ebb9e5d5dd4 Mon Sep 17 00:00:00 2001 From: Roland Scheidegger Date: Tue, 15 Mar 2005 22:23:29 +0000 Subject: add support for user-configurable brilinear filtering on r200 --- src/mesa/drivers/dri/r200/r200_sanity.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'src/mesa/drivers/dri/r200/r200_sanity.c') diff --git a/src/mesa/drivers/dri/r200/r200_sanity.c b/src/mesa/drivers/dri/r200/r200_sanity.c index a950b36414..79d0f3c552 100644 --- a/src/mesa/drivers/dri/r200/r200_sanity.c +++ b/src/mesa/drivers/dri/r200/r200_sanity.c @@ -150,6 +150,7 @@ static struct { { RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0" }, { RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2" }, { RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0" }, + { R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF" }, }; struct reg_names { @@ -475,11 +476,13 @@ static struct reg_names reg_names[] = { { R200_RB3D_CBLENDCNTL, "R200_RB3D_CBLENDCNTL" }, { R200_SE_TCL_OUTPUT_VTX_COMP_SEL, "R200_SE_TCL_OUTPUT_VTX_COMP_SEL" }, { R200_PP_CNTL_X, "R200_PP_CNTL_X" }, - { R200_SE_VAP_CNTL_STATUS, "R200_SE_VAP_CNTL_STATUS" }, + { R200_SE_VAP_CNTL_STATUS, "R200_SE_VAP_CNTL_STATUS" }, { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0" }, - { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_1, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_1" }, - { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_2, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_2" }, - { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_3, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_3" }, + { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_1, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_1" }, + { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_2, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_2" }, + { R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_3, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_3" }, + { R200_PP_TRI_PERF, "R200_PP_TRI_PERF" }, + { R200_PP_PERF_CNTL, "R200_PP_PERF_CNTL" }, }; static struct reg_names scalar_names[] = { -- cgit v1.2.3