From 4637235183b80963536f2364e4d50fcb894886dd Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Wed, 14 Jan 2009 10:44:48 +1000
Subject: radeon/r200/r300: initial attempt to convert to common context code

---
 src/mesa/drivers/dri/r200/r200_state.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/mesa/drivers/dri/r200/r200_state.h')

diff --git a/src/mesa/drivers/dri/r200/r200_state.h b/src/mesa/drivers/dri/r200/r200_state.h
index a917163a00..5d7347af31 100644
--- a/src/mesa/drivers/dri/r200/r200_state.h
+++ b/src/mesa/drivers/dri/r200/r200_state.h
@@ -59,7 +59,7 @@ extern void r200Fallback( GLcontext *ctx, GLuint bit, GLboolean mode );
 #define FALLBACK( rmesa, bit, mode ) do {				\
    if ( 0 ) fprintf( stderr, "FALLBACK in %s: #%d=%d\n",		\
 		     __FUNCTION__, bit, mode );				\
-   r200Fallback( rmesa->glCtx, bit, mode );				\
+   r200Fallback( rmesa->radeon.glCtx, bit, mode );				\
 } while (0)
 
 extern void r200LightingSpaceChange( GLcontext *ctx );
-- 
cgit v1.2.3


From 4aa874c6368f2485d4ef72e2dc0230b7d443f9f0 Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Wed, 14 Jan 2009 15:48:02 +1000
Subject: r200: add missing symbols

---
 src/mesa/drivers/dri/r200/r200_context.c | 2 +-
 src/mesa/drivers/dri/r200/r200_state.h   | 2 --
 2 files changed, 1 insertion(+), 3 deletions(-)

(limited to 'src/mesa/drivers/dri/r200/r200_state.h')

diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index ebd4913267..730831db04 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -672,7 +672,7 @@ r200MakeCurrent( __DRIcontextPrivate *driContextPriv,
 
 	 newCtx->radeon.dri.drawable = driDrawPriv;
 
-	 r200SetCliprects(newCtx);
+	 radeonSetCliprects(&newCtx->radeon);
 	 r200UpdateViewportOffset( newCtx->radeon.glCtx );
       }
 
diff --git a/src/mesa/drivers/dri/r200/r200_state.h b/src/mesa/drivers/dri/r200/r200_state.h
index 5d7347af31..741bf88e9c 100644
--- a/src/mesa/drivers/dri/r200/r200_state.h
+++ b/src/mesa/drivers/dri/r200/r200_state.h
@@ -43,8 +43,6 @@ extern void r200InitTnlFuncs( GLcontext *ctx );
 
 extern void r200UpdateMaterial( GLcontext *ctx );
 
-extern void r200SetCliprects( r200ContextPtr rmesa );
-extern void r200RecalcScissorRects( r200ContextPtr rmesa );
 extern void r200UpdateViewportOffset( GLcontext *ctx );
 extern void r200UpdateWindow( GLcontext *ctx );
 extern void r200UpdateDrawBuffer(GLcontext *ctx);
-- 
cgit v1.2.3


From e45213d89bf26c68c9f4c9074eaec9ab3311de7d Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Sat, 31 Jan 2009 01:59:57 +1000
Subject: r200/r300: add aperture space checks

---
 src/mesa/drivers/dri/r200/r200_ioctl.h         |   2 +
 src/mesa/drivers/dri/r200/r200_state.c         |  71 ++++++++++++++++-
 src/mesa/drivers/dri/r200/r200_state.h         |   2 +-
 src/mesa/drivers/dri/r200/r200_tcl.c           |   3 +-
 src/mesa/drivers/dri/r300/r300_cmdbuf.c        |   8 +-
 src/mesa/drivers/dri/r300/r300_render.c        |   3 +
 src/mesa/drivers/dri/r300/r300_state.c         |   1 -
 src/mesa/drivers/dri/r300/r300_swtcl.c         |   2 +
 src/mesa/drivers/dri/r300/r300_tex.h           |   2 +-
 src/mesa/drivers/dri/r300/r300_texstate.c      |  53 ++++++++++++-
 src/mesa/drivers/dri/radeon/common_misc.c      |  49 ++++++++++--
 src/mesa/drivers/dri/radeon/common_misc.h      |  33 ++++++++
 src/mesa/drivers/dri/radeon/radeon_bo_legacy.c |  65 +++++++++-------
 src/mesa/drivers/dri/radeon/radeon_bo_legacy.h |   1 +
 src/mesa/drivers/dri/radeon/radeon_cs_legacy.c | 104 ++++++++++++++++++++++++-
 15 files changed, 345 insertions(+), 54 deletions(-)

(limited to 'src/mesa/drivers/dri/r200/r200_state.h')

diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.h b/src/mesa/drivers/dri/r200/r200_ioctl.h
index 0410fdf3c3..3e39a9124d 100644
--- a/src/mesa/drivers/dri/r200/r200_ioctl.h
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.h
@@ -43,6 +43,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "drm.h"
 #include "radeon_drm.h"
 
+#include "common_cmdbuf.h"
+
 extern void r200EmitState( r200ContextPtr rmesa );
 extern void r200EmitVertexAOS( r200ContextPtr rmesa,
 			       GLuint vertex_size,
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index f2e62d1bf7..f3d809d62c 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -48,6 +48,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "swrast_setup/swrast_setup.h"
 
 #include "radeon_buffer.h"
+#include "radeon_cs.h"
+#include "radeon_mipmap_tree.h"
 #include "r200_context.h"
 #include "r200_ioctl.h"
 #include "r200_state.h"
@@ -2347,9 +2349,66 @@ r200UpdateDrawBuffer(GLcontext *ctx)
 #endif
 }
 
+static GLboolean r200ValidateBuffers(GLcontext *ctx)
+{
+   r200ContextPtr rmesa = R200_CONTEXT(ctx);
+   struct radeon_cs_space_check bos[8];
+   struct radeon_renderbuffer *rrb;
+   int num_bo = 0;
+   int i;
+   int flushed = 0, ret;
+again:
+   num_bo = 0;
+   
+   rrb = radeon_get_colorbuffer(&rmesa->radeon);
+   /* color buffer */
+   if (rrb && rrb->bo) {
+      bos[num_bo].bo = rrb->bo;
+      bos[num_bo].read_domains = 0;
+      bos[num_bo].write_domain = RADEON_GEM_DOMAIN_VRAM;
+      bos[num_bo].new_accounted = 0;
+      num_bo++;
+   }
+
+   /* depth buffer */
+   rrb = radeon_get_depthbuffer(&rmesa->radeon);
+   /* color buffer */
+   if (rrb && rrb->bo) {
+      bos[num_bo].bo = rrb->bo;
+      bos[num_bo].read_domains = 0;
+      bos[num_bo].write_domain = RADEON_GEM_DOMAIN_VRAM;
+      bos[num_bo].new_accounted = 0;
+      num_bo++;
+   }
+
+   for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) {
+      radeonTexObj *t;
+      
+      if (!ctx->Texture.Unit[i]._ReallyEnabled)
+	 continue;
+      
+      t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
+      bos[num_bo].bo = t->mt->bo;
+      bos[num_bo].read_domains = RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM;
+      bos[num_bo].write_domain = 0;
+      bos[num_bo].new_accounted = 0;
+      num_bo++;
+   }
+   
+   ret = radeon_cs_space_check(rmesa->radeon.cmdbuf.cs, bos, num_bo);
+   if (ret == RADEON_CS_SPACE_OP_TO_BIG)
+      return GL_FALSE;
+   if (ret == RADEON_CS_SPACE_FLUSH) {
+      r200Flush(ctx);
+      if (flushed)
+	 return GL_FALSE;
+      flushed = 1;
+      goto again;
+   }
+   return GL_TRUE;
+}
 
-
-void r200ValidateState( GLcontext *ctx )
+GLboolean r200ValidateState( GLcontext *ctx )
 {
    r200ContextPtr rmesa = R200_CONTEXT(ctx);
    GLuint new_state = rmesa->radeon.NewGLState;
@@ -2364,6 +2423,10 @@ void r200ValidateState( GLcontext *ctx )
       r200UpdateLocalViewer( ctx );
    }
 
+   /* we need to do a space check here */
+   if (!r200ValidateBuffers(ctx))
+     return GL_FALSE;
+
 /* FIXME: don't really need most of these when vertex progs are enabled */
 
    /* Need an event driven matrix update?
@@ -2408,6 +2471,7 @@ void r200ValidateState( GLcontext *ctx )
    }
 
    rmesa->radeon.NewGLState = 0;
+   return GL_TRUE;
 }
 
 
@@ -2452,7 +2516,8 @@ static void r200WrapRunPipeline( GLcontext *ctx )
    /* Validate state:
     */
    if (rmesa->radeon.NewGLState)
-      r200ValidateState( ctx );
+      if (!r200ValidateState( ctx ))
+	 FALLBACK(rmesa, RADEON_FALLBACK_TEXTURE, GL_TRUE);
 
    has_material = !ctx->VertexProgram._Enabled && ctx->Light.Enabled && check_material( ctx );
 
diff --git a/src/mesa/drivers/dri/r200/r200_state.h b/src/mesa/drivers/dri/r200/r200_state.h
index 741bf88e9c..1dddbfdbfe 100644
--- a/src/mesa/drivers/dri/r200/r200_state.h
+++ b/src/mesa/drivers/dri/r200/r200_state.h
@@ -47,7 +47,7 @@ extern void r200UpdateViewportOffset( GLcontext *ctx );
 extern void r200UpdateWindow( GLcontext *ctx );
 extern void r200UpdateDrawBuffer(GLcontext *ctx);
 
-extern void r200ValidateState( GLcontext *ctx );
+extern GLboolean r200ValidateState( GLcontext *ctx );
 
 extern void r200PrintDirty( r200ContextPtr rmesa,
 			      const char *msg );
diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c
index 5bb25bc53a..3c19e330f5 100644
--- a/src/mesa/drivers/dri/r200/r200_tcl.c
+++ b/src/mesa/drivers/dri/r200/r200_tcl.c
@@ -406,7 +406,8 @@ static GLboolean r200_run_tcl_render( GLcontext *ctx,
    /* Validate state:
     */
    if (rmesa->radeon.NewGLState)
-      r200ValidateState( ctx );
+      if (!r200ValidateState( ctx ))
+         return GL_TRUE; /* fallback to sw t&l */
 
    if (!ctx->VertexProgram._Enabled) {
    /* NOTE: inputs != tnl->render_inputs - these are the untransformed
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index 04bb76bb30..9098931602 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -296,12 +296,8 @@ static void emit_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom)
 	BATCH_LOCALS(&r300->radeon);
 	struct radeon_renderbuffer *rrb;
 	uint32_t cbpitch;
-	GLframebuffer *fb = r300->radeon.dri.drawable->driverPrivate;
 
-	rrb = r300->radeon.state.color.rrb;
-	if (r300->radeon.radeonScreen->driScreen->dri2.enabled) {
-		rrb = (struct radeon_renderbuffer *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer;
-	}
+	rrb = radeon_get_colorbuffer(&r300->radeon);
 	if (!rrb || !rrb->bo) {
 		fprintf(stderr, "no rrb\n");
 		return;
@@ -331,7 +327,7 @@ static void emit_zb_offset(GLcontext *ctx, struct radeon_state_atom * atom)
 	struct radeon_renderbuffer *rrb;
 	uint32_t zbpitch;
 
-	rrb = r300->radeon.state.depth.rrb;
+	rrb = radeon_get_depthbuffer(&r300->radeon);
 	if (!rrb)
 		return;
 
diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index 57249c46ef..3b00de2b56 100644
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -501,6 +501,9 @@ static GLboolean r300RunTCLRender(GLcontext * ctx,
 		return GL_TRUE;
 	}
 
+	if (!r300ValidateTextures(ctx))
+	    return GL_TRUE;
+	
 	r300UpdateShaders(rmesa);
 
 	vp = (struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx);
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index 5fbd5b93ff..e5939afeeb 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -2632,7 +2632,6 @@ void r300UpdateShaderStates(r300ContextPtr rmesa)
 	GLcontext *ctx;
 	ctx = rmesa->radeon.glCtx;
 
-	r300ValidateTextures(ctx);
 	r300SetEarlyZState(ctx);
 
 	GLuint fgdepthsrc = R300_FG_DEPTH_SRC_SCAN;
diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.c b/src/mesa/drivers/dri/r300/r300_swtcl.c
index 6ae5868a52..ef65fbb127 100644
--- a/src/mesa/drivers/dri/r300/r300_swtcl.c
+++ b/src/mesa/drivers/dri/r300/r300_swtcl.c
@@ -579,6 +579,8 @@ static void r300RenderStart(GLcontext *ctx)
 	r300ChooseRenderState(ctx);
 	r300SetVertexFormat(ctx);
 
+	r300ValidateTextures(ctx);
+
 	r300UpdateShaders(rmesa);
 	r300UpdateShaderStates(rmesa);
 
diff --git a/src/mesa/drivers/dri/r300/r300_tex.h b/src/mesa/drivers/dri/r300/r300_tex.h
index 358b927828..a293ccf02c 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.h
+++ b/src/mesa/drivers/dri/r300/r300_tex.h
@@ -41,7 +41,7 @@ extern void r300SetTexOffset(__DRIcontext *pDRICtx, GLint texname,
 			     unsigned long long offset, GLint depth,
 			     GLuint pitch);
 
-extern void r300ValidateTextures(GLcontext * ctx);
+extern GLboolean r300ValidateTextures(GLcontext * ctx);
 
 extern void r300InitTextureFuncs(struct dd_function_table *functions);
 
diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c
index 68c7ca3d29..7ffc15fe39 100644
--- a/src/mesa/drivers/dri/r300/r300_texstate.c
+++ b/src/mesa/drivers/dri/r300/r300_texstate.c
@@ -49,6 +49,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r300_ioctl.h"
 #include "radeon_ioctl.h"
 #include "radeon_mipmap_tree.h"
+#include "radeon_cs.h"
 #include "r300_tex.h"
 #include "r300_reg.h"
 #include "radeon_buffer.h"
@@ -265,13 +266,43 @@ static GLboolean r300_validate_texture(GLcontext * ctx, struct gl_texture_object
 
 
 /**
- * Ensure all enabled and complete textures are uploaded.
+ * Ensure all enabled and complete textures are uploaded along with any buffers being used.
  */
-void r300ValidateTextures(GLcontext * ctx)
+GLboolean r300ValidateBuffers(GLcontext * ctx)
 {
+	r300ContextPtr rmesa = R300_CONTEXT(ctx);
+	struct radeon_cs_space_check bos[16];
+	struct radeon_renderbuffer *rrb;
+	int num_bo = 0;
 	int i;
+	int flushed = 0, ret;
+again:
+	num_bo = 0;
+
+	rrb = radeon_get_colorbuffer(&rmesa->radeon);
+	/* color buffer */
+	if (rrb && rrb->bo) {
+		bos[num_bo].bo = rrb->bo;
+		bos[num_bo].read_domains = 0;
+		bos[num_bo].write_domain = RADEON_GEM_DOMAIN_VRAM;
+		bos[num_bo].new_accounted = 0;
+		num_bo++;
+	}
 
+	/* depth buffer */
+	rrb = radeon_get_depthbuffer(&rmesa->radeon);
+	/* color buffer */
+	if (rrb && rrb->bo) {
+		bos[num_bo].bo = rrb->bo;
+		bos[num_bo].read_domains = 0;
+		bos[num_bo].write_domain = RADEON_GEM_DOMAIN_VRAM;
+		bos[num_bo].new_accounted = 0;
+		num_bo++;
+	}
+	
 	for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) {
+		radeonTexObj *t;
+
 		if (!ctx->Texture.Unit[i]._ReallyEnabled)
 			continue;
 
@@ -280,7 +311,25 @@ void r300ValidateTextures(GLcontext * ctx)
 				      "failed to validate texture for unit %d.\n",
 				      i);
 		}
+		t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
+		bos[num_bo].bo = t->mt->bo;
+		bos[num_bo].read_domains = RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM;
+		bos[num_bo].write_domain = 0;
+		bos[num_bo].new_accounted = 0;
+		num_bo++;
 	}
+
+	ret = radeon_cs_space_check(rmesa->radeon.cmdbuf.cs, bos, num_bo);
+	if (ret == RADEON_CS_SPACE_OP_TO_BIG)
+		return GL_FALSE;
+	if (ret == RADEON_CS_SPACE_FLUSH) {
+		r300Flush(ctx);
+		if (flushed)
+			return GL_FALSE;
+		flushed = 1;
+		goto again;
+	}
+	return GL_TRUE;
 }
 
 void r300SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
diff --git a/src/mesa/drivers/dri/radeon/common_misc.c b/src/mesa/drivers/dri/radeon/common_misc.c
index 19294487f6..1adcefb19a 100644
--- a/src/mesa/drivers/dri/radeon/common_misc.c
+++ b/src/mesa/drivers/dri/radeon/common_misc.c
@@ -685,6 +685,14 @@ void rcommonInitCmdBuf(radeonContextPtr rmesa, int max_state_size)
 	assert(rmesa->cmdbuf.cs != NULL);
 	rmesa->cmdbuf.size = size;
 
+	if (!rmesa->radeonScreen->kernel_mm) {
+		radeon_cs_set_limit(rmesa->cmdbuf.cs, RADEON_GEM_DOMAIN_VRAM, rmesa->radeonScreen->texSize[0]);
+		radeon_cs_set_limit(rmesa->cmdbuf.cs, RADEON_GEM_DOMAIN_GTT, rmesa->radeonScreen->gartTextures.size);
+	} else {
+		radeon_cs_set_limit(rmesa->cmdbuf.cs, RADEON_GEM_DOMAIN_VRAM, rmesa->radeonScreen->texSize[0]);
+		radeon_cs_set_limit(rmesa->cmdbuf.cs, RADEON_GEM_DOMAIN_GTT, rmesa->radeonScreen->gartTextures.size);
+	}
+
 }
 /**
  * Destroy the command buffer
@@ -907,7 +915,7 @@ void radeonCleanupContext(radeonContextPtr radeon)
 	}
 }
 
-void
+static void
 radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon,
 					GLframebuffer *draw)
 {
@@ -1314,7 +1322,6 @@ void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos,
 {
 	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 	uint32_t *out;
-	uint32_t bo_size;
 
 	if (stride == 0) {
 		radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * 4, 32);
@@ -1328,7 +1335,6 @@ void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos,
 	aos->components = size;
 	aos->count = count;
 
-//	radeon_bo_map(aos->bo, 1);
 	out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
 	switch (size) {
 	case 1: radeonEmitVec4(out, data, stride, count); break;
@@ -1339,7 +1345,6 @@ void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos,
 		assert(0);
 		break;
 	}
-//	radeon_bo_unmap(aos->bo);
 }
 
 
@@ -2320,6 +2325,9 @@ void radeonSpanRenderFinish(GLcontext * ctx)
 
 void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size)
 {
+	struct radeon_cs_space_check bos[1];
+	int flushed, ret;
+
 	size = MAX2(size, MAX_DMA_BUF_SZ * 16);
 
 	if (RADEON_DEBUG & (DEBUG_IOCTL | DEBUG_DMA))
@@ -2330,8 +2338,6 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size)
 		rmesa->dma.flush(rmesa->glCtx);
 	}
 
-
-
 	if (rmesa->dma.nr_released_bufs > 4) {
 		rcommonFlushCmdBuf(rmesa, __FUNCTION__);
 		rmesa->dma.nr_released_bufs = 0;
@@ -2341,13 +2347,42 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size)
 		radeon_bo_unref(rmesa->dma.current);
 		rmesa->dma.current = 0;
 	}
-	
+
+again_alloc:	
 	rmesa->dma.current = radeon_bo_open(rmesa->radeonScreen->bom,
 					    0, size, 4, RADEON_GEM_DOMAIN_GTT,
 					    0);
 
+	if (!rmesa->dma.current) {
+		rcommonFlushCmdBuf(rmesa, __FUNCTION__);
+		rmesa->dma.nr_released_bufs = 0;
+		goto again_alloc;
+	}
+
 	rmesa->dma.current_used = 0;
 	rmesa->dma.current_vertexptr = 0;
+	
+	bos[0].bo = rmesa->dma.current;
+	bos[0].read_domains = RADEON_GEM_DOMAIN_GTT;
+	bos[0].write_domain =0 ;
+	bos[0].new_accounted = 0;
+
+again:
+	ret = radeon_cs_space_check(rmesa->cmdbuf.cs, bos, 1);
+	if (ret == RADEON_CS_SPACE_OP_TO_BIG) {
+		fprintf(stderr,"Got OPEARTION TO BIG ILLEGAL - this cannot happen");
+		assert(0);
+	} else if (ret == RADEON_CS_SPACE_FLUSH) {
+		rcommonFlushCmdBuf(rmesa, __FUNCTION__);
+		if (flushed) {
+			fprintf(stderr,"flushed but still no space\n");
+			assert(0);
+		}
+		flushed = 1;
+		goto again;
+	}
+		
+	
 	radeon_bo_map(rmesa->dma.current, 1);
 }
 
diff --git a/src/mesa/drivers/dri/radeon/common_misc.h b/src/mesa/drivers/dri/radeon/common_misc.h
index d17d1607db..44e464eb13 100644
--- a/src/mesa/drivers/dri/radeon/common_misc.h
+++ b/src/mesa/drivers/dri/radeon/common_misc.h
@@ -2,6 +2,7 @@
 #define COMMON_MISC_H
 
 #include "common_context.h"
+#include "radeon_buffer.h"
 void radeonRecalcScissorRects(radeonContextPtr radeon);
 void radeonSetCliprects(radeonContextPtr radeon);
 void radeonUpdateScissor( GLcontext *ctx );
@@ -122,4 +123,36 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size);
 void radeonAllocDmaRegion(radeonContextPtr rmesa,
 			  struct radeon_bo **pbo, int *poffset,
 			  int bytes, int alignment);
+void radeonReleaseDmaRegion(radeonContextPtr rmesa);
+
+void rcommon_flush_last_swtcl_prim(GLcontext *ctx);
+
+void *rcommonAllocDmaLowVerts(radeonContextPtr rmesa, int nverts, int vsize);
+
+
+static inline struct radeon_renderbuffer *radeon_get_depthbuffer(radeonContextPtr rmesa)
+{
+	struct radeon_renderbuffer *rrb;
+	rrb = rmesa->state.depth.rrb;
+	if (!rrb)
+		return NULL;
+
+	return rrb;
+}
+
+static inline struct radeon_renderbuffer *radeon_get_colorbuffer(radeonContextPtr rmesa)
+{
+	struct radeon_renderbuffer *rrb;
+	GLframebuffer *fb = rmesa->dri.drawable->driverPrivate;
+
+	rrb = rmesa->state.color.rrb;
+	if (rmesa->radeonScreen->driScreen->dri2.enabled) {
+		rrb = (struct radeon_renderbuffer *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer;
+	}
+	if (!rrb)
+		return NULL;
+	return rrb;
+}
+
+
 #endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c
index bd126c026c..f782d96900 100644
--- a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c
@@ -413,10 +413,8 @@ static struct radeon_bo *bo_open(struct radeon_bo_manager *bom,
         r = bo_dma_alloc(&(bo_legacy->base));
         if (r) {
 	  if (legacy_wait_any_pending(boml) == -1) {
-	    fprintf(stderr, "Ran out of GART memory (for %d)!\n", size);
-            fprintf(stderr, "Please consider adjusting GARTSize option.\n");
             bo_free(bo_legacy);
-            exit(-1);
+	    return NULL;
 	  }
 	  goto retry;
 	  return NULL;
@@ -639,6 +637,24 @@ void radeon_bo_manager_legacy_dtor(struct radeon_bo_manager *bom)
     free(boml);
 }
 
+static struct bo_legacy *radeon_legacy_bo_alloc_static(struct bo_manager_legacy *bom,
+						       int size, uint32_t offset)
+{
+    struct bo_legacy *bo;
+
+    bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0);
+    if (bo == NULL)
+	return NULL;
+    bo->static_bo = 1;
+    bo->offset = offset + bom->fb_location;
+    bo->base.handle = bo->offset;
+    bo->ptr = bom->screen->driScreen->pFB + offset;
+    if (bo->base.handle > bom->nhandle) {
+        bom->nhandle = bo->base.handle + 1;
+    }
+    return bo;
+}
+
 struct radeon_bo_manager *radeon_bo_manager_legacy_ctor(struct radeon_screen *scrn)
 {
     struct bo_manager_legacy *bom;
@@ -682,41 +698,30 @@ struct radeon_bo_manager *radeon_bo_manager_legacy_ctor(struct radeon_screen *sc
 
     /* biggest framebuffer size */
     size = 4096*4096*4; 
+
     /* allocate front */
-    bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0);
-    if (bo == NULL) {
+    bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->frontOffset);
+    if (!bo) {
         radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom);
         return NULL;
     }
     if (scrn->sarea->tiling_enabled) {
         bo->base.flags = RADEON_BO_FLAGS_MACRO_TILE;
     }
-    bo->static_bo = 1;
-    bo->offset = bom->screen->frontOffset + bom->fb_location;
-    bo->base.handle = bo->offset;
-    bo->ptr = scrn->driScreen->pFB + bom->screen->frontOffset;
-    if (bo->base.handle > bom->nhandle) {
-        bom->nhandle = bo->base.handle + 1;
-    }
+
     /* allocate back */
-    bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0);
-    if (bo == NULL) {
+    bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->backOffset);
+    if (!bo) {
         radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom);
         return NULL;
     }
     if (scrn->sarea->tiling_enabled) {
         bo->base.flags = RADEON_BO_FLAGS_MACRO_TILE;
     }
-    bo->static_bo = 1;
-    bo->offset = bom->screen->backOffset + bom->fb_location;
-    bo->base.handle = bo->offset;
-    bo->ptr = scrn->driScreen->pFB + bom->screen->backOffset;
-    if (bo->base.handle > bom->nhandle) {
-        bom->nhandle = bo->base.handle + 1;
-    }
+
     /* allocate depth */
-    bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0);
-    if (bo == NULL) {
+    bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->depthOffset);
+    if (!bo) {
         radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom);
         return NULL;
     }
@@ -725,13 +730,6 @@ struct radeon_bo_manager *radeon_bo_manager_legacy_ctor(struct radeon_screen *sc
         bo->base.flags |= RADEON_BO_FLAGS_MACRO_TILE;
         bo->base.flags |= RADEON_BO_FLAGS_MICRO_TILE;
     }
-    bo->static_bo = 1;
-    bo->offset = bom->screen->depthOffset + bom->fb_location;
-    bo->base.handle = bo->offset;
-    bo->ptr = scrn->driScreen->pFB + bom->screen->depthOffset;
-    if (bo->base.handle > bom->nhandle) {
-        bom->nhandle = bo->base.handle + 1;
-    }
     return (struct radeon_bo_manager*)bom;
 }
 
@@ -750,3 +748,10 @@ unsigned radeon_bo_legacy_relocs_size(struct radeon_bo *bo)
     }
     return bo->size;
 }
+
+int radeon_legacy_bo_is_static(struct radeon_bo *bo)
+{
+    struct bo_legacy *bo_legacy = (struct bo_legacy*)bo;
+    return bo_legacy->static_bo;
+}
+
diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.h b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.h
index 208171e372..575979cbec 100644
--- a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.h
+++ b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.h
@@ -44,4 +44,5 @@ void radeon_bo_manager_legacy_dtor(struct radeon_bo_manager *bom);
 void radeon_bo_legacy_texture_age(struct radeon_bo_manager *bom);
 unsigned radeon_bo_legacy_relocs_size(struct radeon_bo *bo);
 
+int radeon_legacy_bo_is_static(struct radeon_bo *bo);
 #endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c
index 8997187d62..171818db37 100644
--- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c
@@ -315,7 +315,7 @@ static int cs_emit(struct radeon_cs *cs)
         cmd.boxes = (drm_clip_rect_t *) csm->ctx->pClipRects;
     }
 
-    dump_cmdbuf(cs);
+    //    dump_cmdbuf(cs);
 
     r = drmCommandWrite(cs->csm->fd, DRM_RADEON_CMDBUF, &cmd, sizeof(cmd));
     if (r) {
@@ -330,6 +330,10 @@ static int cs_emit(struct radeon_cs *cs)
 	}
     }
     cs_set_age(cs);
+
+    cs->csm->read_used = 0;
+    cs->csm->vram_write_used = 0;
+    cs->csm->gart_write_used = 0;
     return 0;
 }
 
@@ -374,6 +378,101 @@ static void cs_print(struct radeon_cs *cs, FILE *file)
 {
 }
 
+static int cs_check_space(struct radeon_cs *cs, struct radeon_cs_space_check *bos, int num_bo)
+{
+    struct radeon_cs_manager *csm = cs->csm;
+    int this_op_read = 0, this_op_gart_write = 0, this_op_vram_write = 0;
+    uint32_t read_domains, write_domain;
+    int i;
+    struct radeon_bo *bo;
+
+    /* check the totals for this operation */
+
+    if (num_bo == 0)
+        return 0;
+
+    /* prepare */
+    for (i = 0; i < num_bo; i++) {
+      bo = bos[i].bo;
+
+      bos[i].new_accounted = 0;
+      read_domains = bos[i].read_domains;
+      write_domain = bos[i].write_domain;
+		
+      /* pinned bos don't count */
+      if (radeon_legacy_bo_is_static(bo))
+	  continue;
+ 
+      /* already accounted this bo */
+      if (write_domain && (write_domain == bo->space_accounted))
+	  continue;
+
+      if (read_domains && ((read_domains << 16) == bo->space_accounted))
+	  continue;
+      
+      if (bo->space_accounted == 0) {
+	  if (write_domain == RADEON_GEM_DOMAIN_VRAM)
+	      this_op_vram_write += bo->size;
+	  else if (write_domain == RADEON_GEM_DOMAIN_GTT)
+	      this_op_gart_write += bo->size;
+	  else
+	      this_op_read += bo->size;
+	  bos[i].new_accounted = (read_domains << 16) | write_domain;
+      } else {
+	  uint16_t old_read, old_write;
+	  
+	  old_read = bo->space_accounted >> 16;
+	  old_write = bo->space_accounted & 0xffff;
+
+	  if (write_domain && (old_read & write_domain)) {
+	      bos[i].new_accounted = write_domain;
+	      /* moving from read to a write domain */
+	      if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
+		  this_op_read -= bo->size;
+		  this_op_vram_write += bo->size;
+	      } else if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
+		  this_op_read -= bo->size;
+		  this_op_gart_write += bo->size;
+	      }
+	  } else if (read_domains & old_write) {
+	      bos[i].new_accounted = bo->space_accounted & 0xffff;
+	  } else {
+	      /* rewrite the domains */
+	      if (write_domain != old_write)
+		  fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write);
+	      if (read_domains != old_read)
+		  fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read);
+	      return RADEON_CS_SPACE_FLUSH;
+	  }
+      }
+	}
+	
+	if (this_op_read < 0)
+		this_op_read = 0;
+
+	/* check sizes - operation first */
+	if ((this_op_read + this_op_gart_write > csm->gart_limit) ||
+	    (this_op_vram_write > csm->vram_limit)) {
+	    return RADEON_CS_SPACE_OP_TO_BIG;
+	}
+
+	if (((csm->vram_write_used + this_op_vram_write) > csm->vram_limit) ||
+	    ((csm->read_used + csm->gart_write_used + this_op_gart_write + this_op_read) > csm->gart_limit)) {
+		return RADEON_CS_SPACE_FLUSH;
+	}
+
+	csm->gart_write_used += this_op_gart_write;
+	csm->vram_write_used += this_op_vram_write;
+	csm->read_used += this_op_read;
+	/* commit */
+	for (i = 0; i < num_bo; i++) {
+		bo = bos[i].bo;
+		bo->space_accounted = bos[i].new_accounted;
+	}
+
+	return RADEON_CS_SPACE_OK;
+}
+
 static struct radeon_cs_funcs  radeon_cs_legacy_funcs = {
     cs_create,
     cs_write_dword,
@@ -384,7 +483,8 @@ static struct radeon_cs_funcs  radeon_cs_legacy_funcs = {
     cs_destroy,
     cs_erase,
     cs_need_flush,
-    cs_print
+    cs_print,
+    cs_check_space
 };
 
 struct radeon_cs_manager *radeon_cs_manager_legacy_ctor(struct radeon_context *ctx)
-- 
cgit v1.2.3


From e00ef43d796f0ae0247b1072bf0aa8cdd8e3034d Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Thu, 2 Apr 2009 14:25:07 +1000
Subject: radeon/r200/r300: collapse context destruction down to a common path.

Context destruction was nearly the same over all the drivers,
so collapse it down.
---
 src/mesa/drivers/dri/r200/r200_cmdbuf.c            | 96 ++++++++++-----------
 src/mesa/drivers/dri/r200/r200_context.c           | 58 -------------
 src/mesa/drivers/dri/r200/r200_context.h           |  6 --
 src/mesa/drivers/dri/r200/r200_maos.h              |  1 -
 src/mesa/drivers/dri/r200/r200_maos_arrays.c       | 24 ++----
 src/mesa/drivers/dri/r200/r200_state.h             |  4 -
 src/mesa/drivers/dri/r200/r200_state_init.c        | 16 ----
 src/mesa/drivers/dri/r200/r200_swtcl.c             |  4 -
 src/mesa/drivers/dri/r200/r200_swtcl.h             |  1 -
 src/mesa/drivers/dri/r200/r200_tcl.c               | 16 ++--
 src/mesa/drivers/dri/r300/r300_cmdbuf.c            | 13 ---
 src/mesa/drivers/dri/r300/r300_cmdbuf.h            |  2 -
 src/mesa/drivers/dri/r300/r300_context.c           | 48 -----------
 src/mesa/drivers/dri/r300/r300_context.h           |  4 -
 src/mesa/drivers/dri/r300/r300_emit.c              | 21 +----
 src/mesa/drivers/dri/r300/r300_emit.h              |  1 -
 src/mesa/drivers/dri/r300/r300_render.c            | 98 +++++++++++-----------
 src/mesa/drivers/dri/radeon/Makefile               |  3 +-
 .../drivers/dri/radeon/radeon_common_context.c     | 90 +++++++++++++++-----
 .../drivers/dri/radeon/radeon_common_context.h     | 12 ++-
 src/mesa/drivers/dri/radeon/radeon_context.c       | 54 ++----------
 src/mesa/drivers/dri/radeon/radeon_context.h       | 24 ++----
 src/mesa/drivers/dri/radeon/radeon_dma.c           | 17 ++++
 src/mesa/drivers/dri/radeon/radeon_dma.h           |  1 +
 src/mesa/drivers/dri/radeon/radeon_ioctl.c         | 76 ++++++++---------
 src/mesa/drivers/dri/radeon/radeon_maos.h          |  1 -
 src/mesa/drivers/dri/radeon/radeon_maos_arrays.c   | 13 ---
 src/mesa/drivers/dri/radeon/radeon_maos_verts.c    | 29 ++-----
 src/mesa/drivers/dri/radeon/radeon_screen.c        | 46 +++-------
 src/mesa/drivers/dri/radeon/radeon_state.h         |  3 -
 src/mesa/drivers/dri/radeon/radeon_state_init.c    | 16 ----
 src/mesa/drivers/dri/radeon/radeon_swtcl.c         |  4 -
 src/mesa/drivers/dri/radeon/radeon_swtcl.h         |  1 -
 src/mesa/drivers/dri/radeon/radeon_tcl.c           |  8 +-
 34 files changed, 286 insertions(+), 525 deletions(-)

(limited to 'src/mesa/drivers/dri/r200/r200_state.h')

diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
index 83375c88a7..3a11a448ec 100644
--- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c
+++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
@@ -143,18 +143,18 @@ static void r200FireEB(r200ContextPtr rmesa, int vertex_count, int type)
 		if (!rmesa->radeon.radeonScreen->kernel_mm) {
 			OUT_BATCH_PACKET3(R200_CP_CMD_INDX_BUFFER, 2);
 			OUT_BATCH((0x80 << 24) | (0 << 16) | 0x810);
-			OUT_BATCH_RELOC(rmesa->tcl.elt_dma_offset,
-					rmesa->tcl.elt_dma_bo,
-					rmesa->tcl.elt_dma_offset,
+			OUT_BATCH_RELOC(rmesa->radeon.tcl.elt_dma_offset,
+					rmesa->radeon.tcl.elt_dma_bo,
+					rmesa->radeon.tcl.elt_dma_offset,
 					RADEON_GEM_DOMAIN_GTT, 0, 0);
 			OUT_BATCH(vertex_count/2);
 		} else {
 			OUT_BATCH_PACKET3(R200_CP_CMD_INDX_BUFFER, 2);
 			OUT_BATCH((0x80 << 24) | (0 << 16) | 0x810);
-			OUT_BATCH(rmesa->tcl.elt_dma_offset);
+			OUT_BATCH(rmesa->radeon.tcl.elt_dma_offset);
 			OUT_BATCH(vertex_count/2);
 			radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-					      rmesa->tcl.elt_dma_bo,
+					      rmesa->radeon.tcl.elt_dma_bo,
 					      RADEON_GEM_DOMAIN_GTT, 0, 0);
 		}
 		END_BATCH();
@@ -176,12 +176,12 @@ void r200FlushElts(GLcontext *ctx)
 
    nr = elt_used / 2;
 
-   radeon_bo_unmap(rmesa->tcl.elt_dma_bo);
+   radeon_bo_unmap(rmesa->radeon.tcl.elt_dma_bo);
 
    r200FireEB(rmesa, nr, rmesa->tcl.hw_primitive);
 
-   radeon_bo_unref(rmesa->tcl.elt_dma_bo);
-   rmesa->tcl.elt_dma_bo = NULL;
+   radeon_bo_unref(rmesa->radeon.tcl.elt_dma_bo);
+   rmesa->radeon.tcl.elt_dma_bo = NULL;
 
    if (R200_DEBUG & DEBUG_SYNC) {
       fprintf(stderr, "%s: Syncing\n", __FUNCTION__);
@@ -203,14 +203,14 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
    
    radeonEmitState(&rmesa->radeon);
 
-   rmesa->tcl.elt_dma_bo = radeon_bo_open(rmesa->radeon.radeonScreen->bom,
+   rmesa->radeon.tcl.elt_dma_bo = radeon_bo_open(rmesa->radeon.radeonScreen->bom,
 					  0, R200_ELT_BUF_SZ, 4,
 					  RADEON_GEM_DOMAIN_GTT, 0);
-   rmesa->tcl.elt_dma_offset = 0;
+   rmesa->radeon.tcl.elt_dma_offset = 0;
    rmesa->tcl.elt_used = min_nr * 2;
 
-   radeon_bo_map(rmesa->tcl.elt_dma_bo, 1);
-   retval = rmesa->tcl.elt_dma_bo->ptr + rmesa->tcl.elt_dma_offset;
+   radeon_bo_map(rmesa->radeon.tcl.elt_dma_bo, 1);
+   retval = rmesa->radeon.tcl.elt_dma_bo->ptr + rmesa->radeon.tcl.elt_dma_offset;
    
 
    if (R200_DEBUG & DEBUG_PRIMS)
@@ -264,79 +264,79 @@ void r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset)
     
    if (!rmesa->radeon.radeonScreen->kernel_mm) {
       for (i = 0; i + 1 < nr; i += 2) {
-	 OUT_BATCH((rmesa->tcl.aos[i].components << 0) |
-		   (rmesa->tcl.aos[i].stride << 8) |
-		   (rmesa->tcl.aos[i + 1].components << 16) |
-		   (rmesa->tcl.aos[i + 1].stride << 24));
+	 OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+		   (rmesa->radeon.tcl.aos[i].stride << 8) |
+		   (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+		   (rmesa->radeon.tcl.aos[i + 1].stride << 24));
 			
-	 voffset =  rmesa->tcl.aos[i + 0].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 0].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
 	 OUT_BATCH_RELOC(voffset,
-			 rmesa->tcl.aos[i].bo,
+			 rmesa->radeon.tcl.aos[i].bo,
 			 voffset,
 			 RADEON_GEM_DOMAIN_GTT,
 			 0, 0);
-	 voffset =  rmesa->tcl.aos[i + 1].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 1].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
 	 OUT_BATCH_RELOC(voffset,
-			 rmesa->tcl.aos[i+1].bo,
+			 rmesa->radeon.tcl.aos[i+1].bo,
 			 voffset,
 			 RADEON_GEM_DOMAIN_GTT,
 			 0, 0);
       }
       
       if (nr & 1) {
-	 OUT_BATCH((rmesa->tcl.aos[nr - 1].components << 0) |
-		   (rmesa->tcl.aos[nr - 1].stride << 8));
-	 voffset =  rmesa->tcl.aos[nr - 1].offset +
-	    offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+	 OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+		   (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+	 voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
 	 OUT_BATCH_RELOC(voffset,
-			 rmesa->tcl.aos[nr - 1].bo,
+			 rmesa->radeon.tcl.aos[nr - 1].bo,
 			 voffset,
 			 RADEON_GEM_DOMAIN_GTT,
 			 0, 0);
       }
    } else {
       for (i = 0; i + 1 < nr; i += 2) {
-	 OUT_BATCH((rmesa->tcl.aos[i].components << 0) |
-		   (rmesa->tcl.aos[i].stride << 8) |
-		   (rmesa->tcl.aos[i + 1].components << 16) |
-		   (rmesa->tcl.aos[i + 1].stride << 24));
+	 OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+		   (rmesa->radeon.tcl.aos[i].stride << 8) |
+		   (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+		   (rmesa->radeon.tcl.aos[i + 1].stride << 24));
 	 
-	 voffset =  rmesa->tcl.aos[i + 0].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 0].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
 	 OUT_BATCH(voffset);
-	 voffset =  rmesa->tcl.aos[i + 1].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 1].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
 	 OUT_BATCH(voffset);
       }
       
       if (nr & 1) {
-	 OUT_BATCH((rmesa->tcl.aos[nr - 1].components << 0) |
-		   (rmesa->tcl.aos[nr - 1].stride << 8));
-	 voffset =  rmesa->tcl.aos[nr - 1].offset +
-	    offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+	 OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+		   (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+	 voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
 	 OUT_BATCH(voffset);
       }
       for (i = 0; i + 1 < nr; i += 2) {
-	 voffset =  rmesa->tcl.aos[i + 0].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 0].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
 	 radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-			       rmesa->tcl.aos[i+0].bo,
+			       rmesa->radeon.tcl.aos[i+0].bo,
 			       RADEON_GEM_DOMAIN_GTT,
 			       0, 0);
-	 voffset =  rmesa->tcl.aos[i + 1].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 1].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
 	 radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-			       rmesa->tcl.aos[i+1].bo,
+			       rmesa->radeon.tcl.aos[i+1].bo,
 			       RADEON_GEM_DOMAIN_GTT,
 			       0, 0);
       }
       if (nr & 1) {
-	 voffset =  rmesa->tcl.aos[nr - 1].offset +
-	    offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+	 voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
 	 radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-			       rmesa->tcl.aos[nr-1].bo,
+			       rmesa->radeon.tcl.aos[nr-1].bo,
 			       RADEON_GEM_DOMAIN_GTT,
 			       0, 0);
       }
diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index 564e168290..f80f0d8ac7 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -491,61 +491,3 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
 }
 
 
-/* Destroy the device specific context.
- */
-/* Destroy the Mesa and driver specific context data.
- */
-void r200DestroyContext( __DRIcontextPrivate *driContextPriv )
-{
-   GET_CURRENT_CONTEXT(ctx);
-   r200ContextPtr rmesa = (r200ContextPtr) driContextPriv->driverPrivate;
-   r200ContextPtr current = ctx ? R200_CONTEXT(ctx) : NULL;
-
-   /* check if we're deleting the currently bound context */
-   if (rmesa == current) {
-      radeon_firevertices(&rmesa->radeon);
-      _mesa_make_current(NULL, NULL, NULL);
-   }
-
-   /* Free r200 context resources */
-   assert(rmesa); /* should never be null */
-   if ( rmesa ) {
-
-      _swsetup_DestroyContext( rmesa->radeon.glCtx );
-      _tnl_DestroyContext( rmesa->radeon.glCtx );
-      _vbo_DestroyContext( rmesa->radeon.glCtx );
-      _swrast_DestroyContext( rmesa->radeon.glCtx );
-
-      r200DestroySwtcl( rmesa->radeon.glCtx );
-      r200ReleaseArrays( rmesa->radeon.glCtx, ~0 );
-
-      if (rmesa->radeon.dma.current) {
-	 radeonReleaseDmaRegion( &rmesa->radeon );
-	 rcommonFlushCmdBuf( &rmesa->radeon, __FUNCTION__ );
-      }
-
-      if (rmesa->radeon.state.scissor.pClipRects) {
-	 FREE(rmesa->radeon.state.scissor.pClipRects);
-	 rmesa->radeon.state.scissor.pClipRects = NULL;
-      }
-
-      radeonCleanupContext(&rmesa->radeon);
-
-      FREE( rmesa );
-   }
-}
-
-
-
-/* Force the context `c' to be unbound from its buffer.
- */
-GLboolean
-r200UnbindContext( __DRIcontextPrivate *driContextPriv )
-{
-   r200ContextPtr rmesa = (r200ContextPtr) driContextPriv->driverPrivate;
-
-   if (R200_DEBUG & DEBUG_DRI)
-      fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *)rmesa->radeon.glCtx);
-
-   return GL_TRUE;
-}
diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h
index fcbe725d6f..6267293817 100644
--- a/src/mesa/drivers/dri/r200/r200_context.h
+++ b/src/mesa/drivers/dri/r200/r200_context.h
@@ -526,14 +526,8 @@ struct r200_state {
 struct r200_tcl_info {
    GLuint hw_primitive;
 
-/* hw can handle 12 components max */
-  struct radeon_aos aos[12];
-   GLuint nr_aos_components;
-
    GLuint *Elts;
 
-   struct radeon_bo *elt_dma_bo;
-   int elt_dma_offset; /** Offset into this buffer object, in bytes */
    int elt_used;
 
 };
diff --git a/src/mesa/drivers/dri/r200/r200_maos.h b/src/mesa/drivers/dri/r200/r200_maos.h
index d3ed06d402..16a70475e1 100644
--- a/src/mesa/drivers/dri/r200/r200_maos.h
+++ b/src/mesa/drivers/dri/r200/r200_maos.h
@@ -38,6 +38,5 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r200_context.h"
 
 extern void r200EmitArrays( GLcontext *ctx, GLubyte *vimap_rev );
-extern void r200ReleaseArrays( GLcontext *ctx, GLuint newinputs );
 
 #endif
diff --git a/src/mesa/drivers/dri/r200/r200_maos_arrays.c b/src/mesa/drivers/dri/r200/r200_maos_arrays.c
index 5dbc202330..383a0c4b0d 100644
--- a/src/mesa/drivers/dri/r200/r200_maos_arrays.c
+++ b/src/mesa/drivers/dri/r200/r200_maos_arrays.c
@@ -142,17 +142,17 @@ void r200EmitArrays( GLcontext *ctx, GLubyte *vimap_rev )
 	 case 3:
 	    /* special handling to fix up fog. Will get us into trouble with vbos...*/
 	    assert(attrib == VERT_ATTRIB_FOG);
-	    if (!rmesa->tcl.aos[i].bo) {
+	    if (!rmesa->radeon.tcl.aos[i].bo) {
 	       if (ctx->VertexProgram._Enabled)
 		  rcommon_emit_vector( ctx,
-				       &(rmesa->tcl.aos[nr]),
+				       &(rmesa->radeon.tcl.aos[nr]),
 				       (char *)VB->AttribPtr[attrib]->data,
 				       1,
 				       VB->AttribPtr[attrib]->stride,
 				       count);
 	       else
 		 r200_emit_vecfog( ctx,
-				   &(rmesa->tcl.aos[nr]),
+				   &(rmesa->radeon.tcl.aos[nr]),
 				   (char *)VB->AttribPtr[attrib]->data,
 				   VB->AttribPtr[attrib]->stride,
 				   count);
@@ -199,9 +199,9 @@ void r200EmitArrays( GLcontext *ctx, GLubyte *vimap_rev )
 	 default:
 	    assert(0);
 	 }
-	 if (!rmesa->tcl.aos[nr].bo) {
+	 if (!rmesa->radeon.tcl.aos[nr].bo) {
 	   rcommon_emit_vector( ctx,
-				&(rmesa->tcl.aos[nr]),
+				&(rmesa->radeon.tcl.aos[nr]),
 				(char *)VB->AttribPtr[attrib]->data,
 				emitsize,
 				VB->AttribPtr[attrib]->stride,
@@ -220,18 +220,6 @@ after_emit:
       rmesa->hw.vtx.cmd[VTX_VTXFMT_1] = vfmt1;
    }
 
-   rmesa->tcl.nr_aos_components = nr;
+   rmesa->radeon.tcl.aos_count = nr;
 }
 
-
-void r200ReleaseArrays( GLcontext *ctx, GLuint newinputs )
-{
-   r200ContextPtr rmesa = R200_CONTEXT( ctx );
-   int i;
-   for (i = 0; i < rmesa->tcl.nr_aos_components; i++) {
-     if (rmesa->tcl.aos[i].bo) {
-       radeon_bo_unref(rmesa->tcl.aos[i].bo);
-       rmesa->tcl.aos[i].bo = NULL;
-     }
-   }
-}
diff --git a/src/mesa/drivers/dri/r200/r200_state.h b/src/mesa/drivers/dri/r200/r200_state.h
index 1dddbfdbfe..23cf8aea66 100644
--- a/src/mesa/drivers/dri/r200/r200_state.h
+++ b/src/mesa/drivers/dri/r200/r200_state.h
@@ -49,10 +49,6 @@ extern void r200UpdateDrawBuffer(GLcontext *ctx);
 
 extern GLboolean r200ValidateState( GLcontext *ctx );
 
-extern void r200PrintDirty( r200ContextPtr rmesa,
-			      const char *msg );
-
-
 extern void r200Fallback( GLcontext *ctx, GLuint bit, GLboolean mode );
 #define FALLBACK( rmesa, bit, mode ) do {				\
    if ( 0 ) fprintf( stderr, "FALLBACK in %s: #%d=%d\n",		\
diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index 2400abe838..75262e46bd 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -166,22 +166,6 @@ static struct {
 /* =============================================================
  * State initialization
  */
-
-void r200PrintDirty( r200ContextPtr rmesa, const char *msg )
-{
-   struct radeon_state_atom *l;
-
-   fprintf(stderr, msg);
-   fprintf(stderr, ": ");
-
-   foreach(l, &rmesa->radeon.hw.atomlist) {
-      if (l->dirty || rmesa->radeon.hw.all_dirty)
-	 fprintf(stderr, "%s, ", l->name);
-   }
-
-   fprintf(stderr, "\n");
-}
-
 static int cmdpkt( r200ContextPtr rmesa, int id ) 
 {
    drm_radeon_cmd_header_t h;
diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c
index b006409987..712da98077 100644
--- a/src/mesa/drivers/dri/r200/r200_swtcl.c
+++ b/src/mesa/drivers/dri/r200/r200_swtcl.c
@@ -908,7 +908,3 @@ void r200InitSwtcl( GLcontext *ctx )
    rmesa->radeon.swtcl.hw_primitive = 0;
 }
 
-
-void r200DestroySwtcl( GLcontext *ctx )
-{
-}
diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.h b/src/mesa/drivers/dri/r200/r200_swtcl.h
index a4051a4b76..b0905879d7 100644
--- a/src/mesa/drivers/dri/r200/r200_swtcl.h
+++ b/src/mesa/drivers/dri/r200/r200_swtcl.h
@@ -39,7 +39,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r200_context.h"
 
 extern void r200InitSwtcl( GLcontext *ctx );
-extern void r200DestroySwtcl( GLcontext *ctx );
 
 extern void r200ChooseRenderState( GLcontext *ctx );
 extern void r200ChooseVertexState( GLcontext *ctx );
diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c
index 8e0fb14e70..580370933e 100644
--- a/src/mesa/drivers/dri/r200/r200_tcl.c
+++ b/src/mesa/drivers/dri/r200/r200_tcl.c
@@ -145,7 +145,7 @@ static GLushort *r200AllocElts( r200ContextPtr rmesa, GLuint nr )
    if (rmesa->radeon.dma.flush == r200FlushElts &&
        rmesa->tcl.elt_used + nr*2 < R200_ELT_BUF_SZ) {
 
-      GLushort *dest = (GLushort *)(rmesa->tcl.elt_dma_bo->ptr +
+      GLushort *dest = (GLushort *)(rmesa->radeon.tcl.elt_dma_bo->ptr +
 				    rmesa->tcl.elt_used);
 
       rmesa->tcl.elt_used += nr*2;
@@ -156,10 +156,10 @@ static GLushort *r200AllocElts( r200ContextPtr rmesa, GLuint nr )
       if (rmesa->radeon.dma.flush)
 	 rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 
-      rcommonEnsureCmdBufSpace(&rmesa->radeon, AOS_BUFSZ(rmesa->tcl.nr_aos_components), __FUNCTION__);
+      rcommonEnsureCmdBufSpace(&rmesa->radeon, AOS_BUFSZ(rmesa->radeon.tcl.aos_count), __FUNCTION__);
 
       r200EmitAOS( rmesa,
-		   rmesa->tcl.nr_aos_components, 0 );
+		   rmesa->radeon.tcl.aos_count, 0 );
 
       return r200AllocEltsOpenEnded( rmesa, rmesa->tcl.hw_primitive, nr );
    }
@@ -186,13 +186,13 @@ static void r200EmitPrim( GLcontext *ctx,
    r200ContextPtr rmesa = R200_CONTEXT( ctx );
    r200TclPrimitive( ctx, prim, hwprim );
    
-   //   fprintf(stderr,"Emit prim %d\n", rmesa->tcl.nr_aos_components);
+   //   fprintf(stderr,"Emit prim %d\n", rmesa->radeon.tcl.aos_count);
    rcommonEnsureCmdBufSpace( &rmesa->radeon,
-			     AOS_BUFSZ(rmesa->tcl.nr_aos_components) +
+			     AOS_BUFSZ(rmesa->radeon.tcl.aos_count) +
 			     rmesa->radeon.hw.max_state_size + VBUF_BUFSZ, __FUNCTION__ );
 
    r200EmitAOS( rmesa,
-		rmesa->tcl.nr_aos_components,
+		rmesa->radeon.tcl.aos_count,
 		start );
    
    /* Why couldn't this packet have taken an offset param?
@@ -481,7 +481,7 @@ static GLboolean r200_run_tcl_render( GLcontext *ctx,
 
    /* Do the actual work:
     */
-   r200ReleaseArrays( ctx, ~0 /* stage->changed_inputs */ );
+   radeonReleaseArrays( ctx, ~0 /* stage->changed_inputs */ );
    r200EmitArrays( ctx, vimap_rev );
 
    rmesa->tcl.Elts = VB->Elts;
@@ -545,7 +545,7 @@ static void transition_to_swtnl( GLcontext *ctx )
    tnl->Driver.NotifyMaterialChange = 
       _mesa_validate_all_lighting_tables;
 
-   r200ReleaseArrays( ctx, ~0 );
+   radeonReleaseArrays( ctx, ~0 );
 
    /* Still using the D3D based hardware-rasterizer from the radeon;
     * need to put the card into D3D mode to make it work:
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index fc8a2e7431..1ecbeea489 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -649,16 +649,3 @@ void r300InitCmdBuf(r300ContextPtr r300)
 
 	rcommonInitCmdBuf(&r300->radeon);
 }
-
-/**
- * Destroy the command buffer and state atoms.
- */
-void r300DestroyCmdBuf(r300ContextPtr r300)
-{
-	struct radeon_state_atom *atom;
-
-	foreach(atom, &r300->radeon.hw.atomlist) {
-		FREE(atom->cmd);
-	}
-
-}
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.h b/src/mesa/drivers/dri/r300/r300_cmdbuf.h
index b7798eb97b..3786813de3 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.h
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.h
@@ -39,8 +39,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r300_context.h"
 
 extern void r300InitCmdBuf(r300ContextPtr r300);
-extern void r300DestroyCmdBuf(r300ContextPtr r300);
-
 
 void emit_vpu(GLcontext *ctx, struct radeon_state_atom * atom);
 int check_vpu(GLcontext *ctx, struct radeon_state_atom *atom);
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 5e271c6010..06db7ab8ff 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -470,51 +470,3 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 	return GL_TRUE;
 }
 
-/* Destroy the device specific context.
- */
-void r300DestroyContext(__DRIcontextPrivate * driContextPriv)
-{
-	GET_CURRENT_CONTEXT(ctx);
-	r300ContextPtr r300 = (r300ContextPtr) driContextPriv->driverPrivate;
-	radeonContextPtr radeon = (radeonContextPtr) r300;
-	radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
-
-	if (RADEON_DEBUG & DEBUG_DRI) {
-		fprintf(stderr, "Destroying context !\n");
-	}
-
-	/* check if we're deleting the currently bound context */
-	if (&r300->radeon == current) {
-		radeonFlush(r300->radeon.glCtx);
-		_mesa_make_current(NULL, NULL, NULL);
-	}
-
-	/* Free r300 context resources */
-	assert(r300);		/* should never be null */
-
-	if (r300) {
-		_swsetup_DestroyContext(r300->radeon.glCtx);
-		_tnl_DestroyContext(r300->radeon.glCtx);
-		_vbo_DestroyContext(r300->radeon.glCtx);
-		_swrast_DestroyContext(r300->radeon.glCtx);
-
-		radeon_firevertices(&r300->radeon);
-
-		if (radeon->state.scissor.pClipRects) {
-			FREE(radeon->state.scissor.pClipRects);
-			radeon->state.scissor.pClipRects = NULL;
-		}
-
-		r300DestroyCmdBuf(r300);
-
-		radeonCleanupContext(&r300->radeon);
-
-
-		/* the memory manager might be accessed when Mesa frees the shared
-		 * state, so don't destroy it earlier
-		 */
-
-
-		FREE(r300);
-	}
-}
diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index 37718f5415..5ef59d258e 100644
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -633,11 +633,7 @@ struct r300_state {
 	struct r300_texture_state texture;
 	int sw_tcl_inputs[VERT_ATTRIB_MAX];
 	struct r300_vertex_shader_state vertex_shader;
-	struct radeon_aos aos[R300_MAX_AOS_ARRAYS];
-	int aos_count;
 
-	struct radeon_bo *elt_dma_bo; /** Buffer object that contains element indices */
-	int elt_dma_offset; /** Offset into this buffer object, in bytes */
 
 	DECLARE_RENDERINPUTS(render_inputs_bitset);	/* actual render inputs that R300 was configured for.
 							   They are the same as tnl->render_inputs for fixed pipeline */
diff --git a/src/mesa/drivers/dri/r300/r300_emit.c b/src/mesa/drivers/dri/r300/r300_emit.c
index 4bf0e7a189..3ce0ba68c9 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.c
+++ b/src/mesa/drivers/dri/r300/r300_emit.c
@@ -302,7 +302,7 @@ int r300EmitArrays(GLcontext * ctx)
 		for (ci = 0; ci < vb->AttribPtr[tab[i]]->size; ci++) {
 			swizzle[i][ci] = ci;
 		}
-		rcommon_emit_vector(ctx, &rmesa->state.aos[i],
+		rcommon_emit_vector(ctx, &rmesa->radeon.tcl.aos[i],
 				    vb->AttribPtr[tab[i]]->data,
 				    vb->AttribPtr[tab[i]]->size,
 				    vb->AttribPtr[tab[i]]->stride, count);
@@ -343,28 +343,11 @@ int r300EmitArrays(GLcontext * ctx)
 	rmesa->hw.vof.cmd[R300_VOF_CNTL_1] =
 	    r300VAPOutputCntl1(ctx, OutputsWritten);
 
-	rmesa->state.aos_count = nr;
+	rmesa->radeon.tcl.aos_count = nr;
 
 	return R300_FALLBACK_NONE;
 }
 
-void r300ReleaseArrays(GLcontext * ctx)
-{
-	r300ContextPtr rmesa = R300_CONTEXT(ctx);
-	int i;
-
-	if (rmesa->state.elt_dma_bo) {
-		radeon_bo_unref(rmesa->state.elt_dma_bo);
-		rmesa->state.elt_dma_bo = NULL;
-	}
-	for (i = 0; i < rmesa->state.aos_count; i++) {
-		if (rmesa->state.aos[i].bo) {
-			radeon_bo_unref(rmesa->state.aos[i].bo);
-			rmesa->state.aos[i].bo = NULL;
-		}
-	}
-}
-
 void r300EmitCacheFlush(r300ContextPtr rmesa)
 {
 	BATCH_LOCALS(&rmesa->radeon);
diff --git a/src/mesa/drivers/dri/r300/r300_emit.h b/src/mesa/drivers/dri/r300/r300_emit.h
index 6bc8f8e944..80c22d5e9a 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.h
+++ b/src/mesa/drivers/dri/r300/r300_emit.h
@@ -218,7 +218,6 @@ void static INLINE cp_wait(radeonContextPtr radeon, unsigned char flags)
 
 extern int r300EmitArrays(GLcontext * ctx);
 
-extern void r300ReleaseArrays(GLcontext * ctx);
 extern int r300PrimitiveType(r300ContextPtr rmesa, int prim);
 extern int r300NumVerts(r300ContextPtr rmesa, int num_verts, int prim);
 
diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index 829d088033..924305dd12 100644
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -175,12 +175,12 @@ static void r300EmitElts(GLcontext * ctx, void *elts, unsigned long n_elts)
 	r300ContextPtr rmesa = R300_CONTEXT(ctx);
 	void *out;
 
-	radeonAllocDmaRegion(&rmesa->radeon, &rmesa->state.elt_dma_bo,
-			     &rmesa->state.elt_dma_offset, n_elts * 4, 4);
-	radeon_bo_map(rmesa->state.elt_dma_bo, 1);
-	out = rmesa->state.elt_dma_bo->ptr + rmesa->state.elt_dma_offset;
+	radeonAllocDmaRegion(&rmesa->radeon, &rmesa->radeon.tcl.elt_dma_bo,
+			     &rmesa->radeon.tcl.elt_dma_offset, n_elts * 4, 4);
+	radeon_bo_map(rmesa->radeon.tcl.elt_dma_bo, 1);
+	out = rmesa->radeon.tcl.elt_dma_bo->ptr + rmesa->radeon.tcl.elt_dma_offset;
 	memcpy(out, elts, n_elts * 4);
-	radeon_bo_unmap(rmesa->state.elt_dma_bo);
+	radeon_bo_unmap(rmesa->radeon.tcl.elt_dma_bo);
 }
 
 static void r300FireEB(r300ContextPtr rmesa, int vertex_count, int type)
@@ -199,19 +199,19 @@ static void r300FireEB(r300ContextPtr rmesa, int vertex_count, int type)
 			OUT_BATCH_PACKET3(R300_PACKET3_INDX_BUFFER, 2);
 			OUT_BATCH(R300_INDX_BUFFER_ONE_REG_WR | (0 << R300_INDX_BUFFER_SKIP_SHIFT) |
 	    			 (R300_VAP_PORT_IDX0 >> 2));
-			OUT_BATCH_RELOC(rmesa->state.elt_dma_offset,
-					rmesa->state.elt_dma_bo,
-					rmesa->state.elt_dma_offset,
+			OUT_BATCH_RELOC(rmesa->radeon.tcl.elt_dma_offset,
+					rmesa->radeon.tcl.elt_dma_bo,
+					rmesa->radeon.tcl.elt_dma_offset,
 					RADEON_GEM_DOMAIN_GTT, 0, 0);
 			OUT_BATCH(vertex_count);
 		} else {
 			OUT_BATCH_PACKET3(R300_PACKET3_INDX_BUFFER, 2);
 			OUT_BATCH(R300_INDX_BUFFER_ONE_REG_WR | (0 << R300_INDX_BUFFER_SKIP_SHIFT) |
 	    			 (R300_VAP_PORT_IDX0 >> 2));
-			OUT_BATCH(rmesa->state.elt_dma_offset);
+			OUT_BATCH(rmesa->radeon.tcl.elt_dma_offset);
 			OUT_BATCH(vertex_count);
 			radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-					      rmesa->state.elt_dma_bo,
+					      rmesa->radeon.tcl.elt_dma_bo,
 					      RADEON_GEM_DOMAIN_GTT, 0, 0);
 		}
 		END_BATCH();
@@ -236,34 +236,34 @@ static void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset)
 		OUT_BATCH(nr);
 
 		for (i = 0; i + 1 < nr; i += 2) {
-			OUT_BATCH((rmesa->state.aos[i].components << 0) |
-				  (rmesa->state.aos[i].stride << 8) |
-				  (rmesa->state.aos[i + 1].components << 16) |
-				  (rmesa->state.aos[i + 1].stride << 24));
+			OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+				  (rmesa->radeon.tcl.aos[i].stride << 8) |
+				  (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+				  (rmesa->radeon.tcl.aos[i + 1].stride << 24));
 			
-			voffset =  rmesa->state.aos[i + 0].offset +
-				offset * 4 * rmesa->state.aos[i + 0].stride;
+			voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+				offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
 			OUT_BATCH_RELOC(voffset,
-					rmesa->state.aos[i].bo,
+					rmesa->radeon.tcl.aos[i].bo,
 					voffset,
 					RADEON_GEM_DOMAIN_GTT,
 					0, 0);
-			voffset =  rmesa->state.aos[i + 1].offset +
-			  offset * 4 * rmesa->state.aos[i + 1].stride;
+			voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+			  offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
 			OUT_BATCH_RELOC(voffset,
-					rmesa->state.aos[i+1].bo,
+					rmesa->radeon.tcl.aos[i+1].bo,
 					voffset,
 					RADEON_GEM_DOMAIN_GTT,
 					0, 0);
 		}
 		
 		if (nr & 1) {
-			OUT_BATCH((rmesa->state.aos[nr - 1].components << 0) |
-				  (rmesa->state.aos[nr - 1].stride << 8));
-			voffset =  rmesa->state.aos[nr - 1].offset +
-				offset * 4 * rmesa->state.aos[nr - 1].stride;
+			OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+				  (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+			voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+				offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
 			OUT_BATCH_RELOC(voffset,
-					rmesa->state.aos[nr - 1].bo,
+					rmesa->radeon.tcl.aos[nr - 1].bo,
 					voffset,
 					RADEON_GEM_DOMAIN_GTT,
 					0, 0);
@@ -276,45 +276,45 @@ static void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset)
 		OUT_BATCH(nr);
 
 		for (i = 0; i + 1 < nr; i += 2) {
-			OUT_BATCH((rmesa->state.aos[i].components << 0) |
-				  (rmesa->state.aos[i].stride << 8) |
-				  (rmesa->state.aos[i + 1].components << 16) |
-				  (rmesa->state.aos[i + 1].stride << 24));
+			OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+				  (rmesa->radeon.tcl.aos[i].stride << 8) |
+				  (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+				  (rmesa->radeon.tcl.aos[i + 1].stride << 24));
 			
-			voffset =  rmesa->state.aos[i + 0].offset +
-				offset * 4 * rmesa->state.aos[i + 0].stride;
+			voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+				offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
 			OUT_BATCH(voffset);
-			voffset =  rmesa->state.aos[i + 1].offset +
-				offset * 4 * rmesa->state.aos[i + 1].stride;
+			voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+				offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
 			OUT_BATCH(voffset);
 		}
 		
 		if (nr & 1) {
-			OUT_BATCH((rmesa->state.aos[nr - 1].components << 0) |
-			  (rmesa->state.aos[nr - 1].stride << 8));
-			voffset =  rmesa->state.aos[nr - 1].offset +
-				offset * 4 * rmesa->state.aos[nr - 1].stride;
+			OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+			  (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+			voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+				offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
 			OUT_BATCH(voffset);
 		}
 		for (i = 0; i + 1 < nr; i += 2) {
-			voffset =  rmesa->state.aos[i + 0].offset +
-				offset * 4 * rmesa->state.aos[i + 0].stride;
+			voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+				offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
 			radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-					      rmesa->state.aos[i+0].bo,
+					      rmesa->radeon.tcl.aos[i+0].bo,
 					      RADEON_GEM_DOMAIN_GTT,
 					      0, 0);
-			voffset =  rmesa->state.aos[i + 1].offset +
-				offset * 4 * rmesa->state.aos[i + 1].stride;
+			voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+				offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
 			radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-					      rmesa->state.aos[i+1].bo,
+					      rmesa->radeon.tcl.aos[i+1].bo,
 					      RADEON_GEM_DOMAIN_GTT,
 					      0, 0);
 		}
 		if (nr & 1) {
-			voffset =  rmesa->state.aos[nr - 1].offset +
-				offset * 4 * rmesa->state.aos[nr - 1].stride;
+			voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+				offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
 			radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-					      rmesa->state.aos[nr-1].bo,
+					      rmesa->radeon.tcl.aos[nr-1].bo,
 					      RADEON_GEM_DOMAIN_GTT,
 					      0, 0);
 		}
@@ -370,10 +370,10 @@ static void r300RunRenderPrimitive(r300ContextPtr rmesa, GLcontext * ctx,
 		 * arrays. *sigh*
 		 */
 		r300EmitElts(ctx, vb->Elts, num_verts);
-		r300EmitAOS(rmesa, rmesa->state.aos_count, start);
+		r300EmitAOS(rmesa, rmesa->radeon.tcl.aos_count, start);
 		r300FireEB(rmesa, num_verts, type);
 	} else {
-		r300EmitAOS(rmesa, rmesa->state.aos_count, start);
+		r300EmitAOS(rmesa, rmesa->radeon.tcl.aos_count, start);
 		r300FireAOS(rmesa, num_verts, type);
 	}
 	COMMIT_BATCH();
@@ -408,7 +408,7 @@ static GLboolean r300RunRender(GLcontext * ctx,
 
 	r300EmitCacheFlush(rmesa);
 
-	r300ReleaseArrays(ctx);
+	radeonReleaseArrays(ctx, ~0);
 
 	return GL_FALSE;
 }
diff --git a/src/mesa/drivers/dri/radeon/Makefile b/src/mesa/drivers/dri/radeon/Makefile
index f469c6f43a..ba409ba813 100644
--- a/src/mesa/drivers/dri/radeon/Makefile
+++ b/src/mesa/drivers/dri/radeon/Makefile
@@ -19,7 +19,8 @@ RADEON_COMMON_SOURCES = \
 	radeon_bo_legacy.c \
 	radeon_cs_legacy.c \
 	radeon_mipmap_tree.c \
-	radeon_span.c
+	radeon_span.c \
+	radeon_fbo.c
 
 DRIVER_SOURCES = \
 	radeon_context.c \
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index 9103c8c0f6..4d61b00345 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -37,8 +37,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "utils.h"
 #include "vblank.h"
 #include "drirenderbuffer.h"
+#include "main/context.h"
 #include "main/framebuffer.h"
 #include "main/state.h"
+#include "main/simple_list.h"
+#include "swrast/swrast.h"
+#include "swrast_setup/swrast_setup.h"
+#include "tnl/tnl.h"
 
 #define DRIVER_DATE "20090101"
 
@@ -175,39 +180,81 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
 	return GL_TRUE;
 }
 
+
+
+/**
+ * Destroy the command buffer and state atoms.
+ */
+static void radeon_destroy_atom_list(radeonContextPtr radeon)
+{
+	struct radeon_state_atom *atom;
+
+	foreach(atom, &radeon->hw.atomlist) {
+		FREE(atom->cmd);
+		if (atom->lastcmd)
+			FREE(atom->lastcmd);
+	}
+
+}
+
 /**
  * Cleanup common context fields.
  * Called by r200DestroyContext/r300DestroyContext
  */
-void radeonCleanupContext(radeonContextPtr radeon)
+void radeonDestroyContext(__DRIcontextPrivate *driContextPriv )
 {
 #ifdef RADEON_BO_TRACK
 	FILE *track;
 #endif
-	struct radeon_framebuffer *rfb;
-
-	radeonDestroyBuffer(radeon->dri.drawable);
-	radeonDestroyBuffer(radeon->dri.readable);
-
-	/* free the Mesa context */
-	_mesa_destroy_context(radeon->glCtx);
-
-	/* _mesa_destroy_context() might result in calls to functions that
-	 * depend on the DriverCtx, so don't set it to NULL before.
-	 *
-	 * radeon->glCtx->DriverCtx = NULL;
-	 */
-
+	GET_CURRENT_CONTEXT(ctx);
+	radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
+	radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
 
+	if (radeon == current) {
+		radeon_firevertices(radeon);
+		_mesa_make_current(NULL, NULL, NULL);
+	}
+	
+	assert(radeon);
+	if (radeon) {
 
-	/* free the option cache */
-	driDestroyOptionCache(&radeon->optionCache);
+		if (radeon->dma.current) {
+			radeonReleaseDmaRegion( radeon );
+			rcommonFlushCmdBuf( radeon, __FUNCTION__ );
+		}
 
-	rcommonDestroyCmdBuf(radeon);
+		radeonReleaseArrays(ctx, ~0);
 
-	if (radeon->state.scissor.pClipRects) {
-		FREE(radeon->state.scissor.pClipRects);
-		radeon->state.scissor.pClipRects = 0;
+		if (radeon->vtbl.free_context)
+			radeon->vtbl.free_context(radeon->glCtx);
+		_swsetup_DestroyContext( radeon->glCtx );
+		_tnl_DestroyContext( radeon->glCtx );
+		_vbo_DestroyContext( radeon->glCtx );
+		_swrast_DestroyContext( radeon->glCtx );
+	
+		radeonDestroyBuffer(radeon->dri.drawable);
+		radeonDestroyBuffer(radeon->dri.readable);
+
+		/* free atom list */
+		/* free the Mesa context */
+		_mesa_destroy_context(radeon->glCtx);
+		
+		/* _mesa_destroy_context() might result in calls to functions that
+		 * depend on the DriverCtx, so don't set it to NULL before.
+		 *
+		 * radeon->glCtx->DriverCtx = NULL;
+		 */
+		/* free the option cache */
+		driDestroyOptionCache(&radeon->optionCache);
+		
+		rcommonDestroyCmdBuf(radeon);
+
+		radeon_destroy_atom_list(radeon);
+
+		if (radeon->state.scissor.pClipRects) {
+			FREE(radeon->state.scissor.pClipRects);
+			radeon->state.scissor.pClipRects = 0;
+		}
 	}
 #ifdef RADEON_BO_TRACK
 	track = fopen("/tmp/tracklog", "w");
@@ -216,6 +263,7 @@ void radeonCleanupContext(radeonContextPtr radeon)
 		fclose(track);
 	}
 #endif
+	FREE(radeon);
 }
 
 /* Force the context `c' to be unbound from its buffer.
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index 0ce72c9198..c6e6be7484 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -290,6 +290,14 @@ struct radeon_swtcl_info {
 
 };
 
+#define RADEON_MAX_AOS_ARRAYS		16
+struct radeon_tcl_info {
+	struct radeon_aos aos[RADEON_MAX_AOS_ARRAYS];
+	GLuint aos_count;
+	struct radeon_bo *elt_dma_bo; /** Buffer object that contains element indices */
+	int elt_dma_offset; /** Offset into this buffer object, in bytes */
+};
+
 struct radeon_ioctl {
 	GLuint vertex_offset;
         struct radeon_bo *bo;
@@ -367,7 +375,6 @@ struct radeon_dri_mirror {
 #define DEBUG_MEMORY    0x4000
 
 
-
 typedef void (*radeon_tri_func) (radeonContextPtr,
 				 radeonVertex *,
 				 radeonVertex *, radeonVertex *);
@@ -436,6 +443,7 @@ struct radeon_context {
    struct radeon_state state;
 
    struct radeon_swtcl_info swtcl;
+   struct radeon_tcl_info tcl;
    /* Configuration cache
     */
    driOptionCache optionCache;
@@ -468,6 +476,7 @@ struct radeon_context {
 	   void (*pre_emit_atoms)(radeonContextPtr rmesa);
 	   void (*pre_emit_state)(radeonContextPtr rmesa);
 	   void (*fallback)(GLcontext *ctx, GLuint bit, GLboolean mode);
+	   void (*free_context)(GLcontext *ctx);
    } vtbl;
 };
 
@@ -530,6 +539,7 @@ void radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
 			    __DRIdrawablePrivate * driDrawPriv,
 			    __DRIdrawablePrivate * driReadPriv);
+extern void radeonDestroyContext(__DRIcontextPrivate * driContextPriv);
 
 /* ================================================================
  * Debugging:
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c
index cad2c3e0c1..2600c78df3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -188,6 +188,11 @@ static void r100_vtbl_pre_emit_state(radeonContextPtr radeon)
    radeon->hw.is_dirty = 1;
 }
 
+static void r100_vtbl_free_context(GLcontext *ctx)
+{
+   r100ContextPtr rmesa = R100_CONTEXT(ctx);
+   _mesa_vector4f_free( &rmesa->tcl.ObjClean );
+}
 
 static void r100_init_vtbl(radeonContextPtr radeon)
 {
@@ -202,7 +207,7 @@ static void r100_init_vtbl(radeonContextPtr radeon)
 /* Create the device specific context.
  */
 GLboolean
-radeonCreateContext( const __GLcontextModes *glVisual,
+r100CreateContext( const __GLcontextModes *glVisual,
                      __DRIcontextPrivate *driContextPriv,
                      void *sharedContextPrivate)
 {
@@ -397,50 +402,3 @@ radeonCreateContext( const __GLcontextModes *glVisual,
    }
    return GL_TRUE;
 }
-
-
-/* Destroy the device specific context.
- */
-/* Destroy the Mesa and driver specific context data.
- */
-void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
-{
-   GET_CURRENT_CONTEXT(ctx);
-   r100ContextPtr rmesa = (r100ContextPtr) driContextPriv->driverPrivate;
-   r100ContextPtr current = ctx ? R100_CONTEXT(ctx) : NULL;
-
-   /* check if we're deleting the currently bound context */
-   if (rmesa == current) {
-      radeon_firevertices(&rmesa->radeon);
-      _mesa_make_current(NULL, NULL, NULL);
-   }
-
-   /* Free radeon context resources */
-   assert(rmesa); /* should never be null */
-   if ( rmesa ) {
-
-      _swsetup_DestroyContext( rmesa->radeon.glCtx );
-      _tnl_DestroyContext( rmesa->radeon.glCtx );
-      _vbo_DestroyContext( rmesa->radeon.glCtx );
-      _swrast_DestroyContext( rmesa->radeon.glCtx );
-
-      radeonDestroySwtcl( rmesa->radeon.glCtx );
-      radeonReleaseArrays( rmesa->radeon.glCtx, ~0 );
-      if (rmesa->radeon.dma.current) {
-	 radeonReleaseDmaRegion( &rmesa->radeon );
-	 rcommonFlushCmdBuf( &rmesa->radeon, __FUNCTION__ );
-      }
-
-      _mesa_vector4f_free( &rmesa->tcl.ObjClean );
-
-      if (rmesa->radeon.state.scissor.pClipRects) {
-	 FREE(rmesa->radeon.state.scissor.pClipRects);
-	 rmesa->radeon.state.scissor.pClipRects = NULL;
-      }
-
-      radeonCleanupContext(&rmesa->radeon);
-
-      FREE( rmesa );
-   }
-}
-
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h
index 5235a6e374..1795d8bdb6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_context.h
@@ -332,7 +332,7 @@ struct r100_state {
 #define R200_ELT_BUF_SZ  (8*1024)
 /* radeon_tcl.c
  */
-struct radeon_tcl_info {
+struct r100_tcl_info {
 	GLuint vertex_format;
 	GLuint hw_primitive;
 
@@ -341,14 +341,9 @@ struct radeon_tcl_info {
 	 */
 	GLvector4f ObjClean;
 
-        struct radeon_aos aos[8];
-	GLuint nr_aos_components;
-
 	GLuint *Elts;
 
-	struct radeon_bo *indexed_bo;
-
-        int elt_cmd_offset; /** Offset into the cmdbuf */
+        int elt_cmd_offset;
 	int elt_cmd_start;
         int elt_used;
 };
@@ -416,7 +411,7 @@ struct r100_context {
 
 	/* radeon_tcl.c
 	 */
-	struct radeon_tcl_info tcl;
+	struct r100_tcl_info tcl;
 
 	/* radeon_swtcl.c
 	 */
@@ -443,15 +438,10 @@ struct r100_context {
 
 #define RADEON_OLD_PACKETS 1
 
-extern void radeonDestroyContext(__DRIcontextPrivate * driContextPriv);
-extern GLboolean radeonCreateContext(const __GLcontextModes * glVisual,
-				     __DRIcontextPrivate * driContextPriv,
-				     void *sharedContextPrivate);
-extern GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
-				   __DRIdrawablePrivate * driDrawPriv,
-				   __DRIdrawablePrivate * driReadPriv);
-extern GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv);
-
+extern GLboolean r100CreateContext( const __GLcontextModes *glVisual,
+				    __DRIcontextPrivate *driContextPriv,
+				    void *sharedContextPrivate);
+  
 
 
 #endif				/* __RADEON_CONTEXT_H__ */
diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c
index 01fc20bd79..47f789e9cd 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.c
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.c
@@ -328,3 +328,20 @@ restart:
 	rmesa->swtcl.numverts += nverts;
 	return head;
 }
+
+void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
+{
+   radeonContextPtr radeon = RADEON_CONTEXT( ctx );
+   int i;
+
+   if (radeon->tcl.elt_dma_bo) {
+	   radeon_bo_unref(radeon->tcl.elt_dma_bo);
+	   radeon->tcl.elt_dma_bo = NULL;
+   }
+   for (i = 0; i < radeon->tcl.aos_count; i++) {
+      if (radeon->tcl.aos[i].bo) {
+         radeon_bo_unref(radeon->tcl.aos[i].bo);
+         radeon->tcl.aos[i].bo = NULL;
+      }
+   }
+}
diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.h b/src/mesa/drivers/dri/radeon/radeon_dma.h
index cee3744fed..06e388fc1d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.h
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.h
@@ -48,4 +48,5 @@ void radeonReleaseDmaRegion(radeonContextPtr rmesa);
 void rcommon_flush_last_swtcl_prim(GLcontext *ctx);
 
 void *rcommonAllocDmaLowVerts(radeonContextPtr rmesa, int nverts, int vsize);
+void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs );
 #endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index f18aa1a4da..b5fde6d3de 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -313,9 +313,9 @@ void radeonEmitAOS( r100ContextPtr rmesa,
 {
 #if RADEON_OLD_PACKETS
    assert( nr == 1 );
-   rmesa->ioctl.bo = rmesa->tcl.aos[0].bo;
+   rmesa->ioctl.bo = rmesa->radeon.tcl.aos[0].bo;
    rmesa->ioctl.vertex_offset = 
-     (rmesa->tcl.aos[0].offset + offset * rmesa->tcl.aos[0].stride * 4);
+     (rmesa->radeon.tcl.aos[0].offset + offset * rmesa->radeon.tcl.aos[0].stride * 4);
 #else
    BATCH_LOCALS(&rmesa->radeon);
    uint32_t voffset;
@@ -332,79 +332,79 @@ void radeonEmitAOS( r100ContextPtr rmesa,
 
    if (!rmesa->radeon.radeonScreen->kernel_mm) {
       for (i = 0; i + 1 < nr; i += 2) {
-	 OUT_BATCH((rmesa->tcl.aos[i].components << 0) |
-		   (rmesa->tcl.aos[i].stride << 8) |
-		   (rmesa->tcl.aos[i + 1].components << 16) |
-		   (rmesa->tcl.aos[i + 1].stride << 24));
+	 OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+		   (rmesa->radeon.tcl.aos[i].stride << 8) |
+		   (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+		   (rmesa->radeon.tcl.aos[i + 1].stride << 24));
 			
-	 voffset =  rmesa->tcl.aos[i + 0].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 0].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
 	 OUT_BATCH_RELOC(voffset,
-			 rmesa->tcl.aos[i].bo,
+			 rmesa->radeon.tcl.aos[i].bo,
 			 voffset,
 			 RADEON_GEM_DOMAIN_GTT,
 			 0, 0);
-	 voffset =  rmesa->tcl.aos[i + 1].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 1].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
 	 OUT_BATCH_RELOC(voffset,
-			 rmesa->tcl.aos[i+1].bo,
+			 rmesa->radeon.tcl.aos[i+1].bo,
 			 voffset,
 			 RADEON_GEM_DOMAIN_GTT,
 			 0, 0);
       }
       
       if (nr & 1) {
-	 OUT_BATCH((rmesa->tcl.aos[nr - 1].components << 0) |
-		   (rmesa->tcl.aos[nr - 1].stride << 8));
-	 voffset =  rmesa->tcl.aos[nr - 1].offset +
-	    offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+	 OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+		   (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+	 voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
 	 OUT_BATCH_RELOC(voffset,
-			 rmesa->tcl.aos[nr - 1].bo,
+			 rmesa->radeon.tcl.aos[nr - 1].bo,
 			 voffset,
 			 RADEON_GEM_DOMAIN_GTT,
 			 0, 0);
       }
    } else {
       for (i = 0; i + 1 < nr; i += 2) {
-	 OUT_BATCH((rmesa->tcl.aos[i].components << 0) |
-		   (rmesa->tcl.aos[i].stride << 8) |
-		   (rmesa->tcl.aos[i + 1].components << 16) |
-		   (rmesa->tcl.aos[i + 1].stride << 24));
+	 OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+		   (rmesa->radeon.tcl.aos[i].stride << 8) |
+		   (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+		   (rmesa->radeon.tcl.aos[i + 1].stride << 24));
 	 
-	 voffset =  rmesa->tcl.aos[i + 0].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 0].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
 	 OUT_BATCH(voffset);
-	 voffset =  rmesa->tcl.aos[i + 1].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 1].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
 	 OUT_BATCH(voffset);
       }
       
       if (nr & 1) {
-	 OUT_BATCH((rmesa->tcl.aos[nr - 1].components << 0) |
-		   (rmesa->tcl.aos[nr - 1].stride << 8));
-	 voffset =  rmesa->tcl.aos[nr - 1].offset +
-	    offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+	 OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+		   (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+	 voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
 	 OUT_BATCH(voffset);
       }
       for (i = 0; i + 1 < nr; i += 2) {
-	 voffset =  rmesa->tcl.aos[i + 0].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 0].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
 	 radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-			       rmesa->tcl.aos[i+0].bo,
+			       rmesa->radeon.tcl.aos[i+0].bo,
 			       RADEON_GEM_DOMAIN_GTT,
 			       0, 0);
-	 voffset =  rmesa->tcl.aos[i + 1].offset +
-	    offset * 4 * rmesa->tcl.aos[i + 1].stride;
+	 voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
 	 radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-			       rmesa->tcl.aos[i+1].bo,
+			       rmesa->radeon.tcl.aos[i+1].bo,
 			       RADEON_GEM_DOMAIN_GTT,
 			       0, 0);
       }
       if (nr & 1) {
-	 voffset =  rmesa->tcl.aos[nr - 1].offset +
-	    offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+	 voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+	    offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
 	 radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-			       rmesa->tcl.aos[nr-1].bo,
+			       rmesa->radeon.tcl.aos[nr-1].bo,
 			       RADEON_GEM_DOMAIN_GTT,
 			       0, 0);
       }
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos.h b/src/mesa/drivers/dri/radeon/radeon_maos.h
index b8935e84a0..b88eb198d5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos.h
+++ b/src/mesa/drivers/dri/radeon/radeon_maos.h
@@ -38,6 +38,5 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_context.h"
 
 extern void radeonEmitArrays( GLcontext *ctx, GLuint inputs );
-extern void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs );
 
 #endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
index 7f5da16b03..7c6ea0530e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
@@ -324,16 +324,3 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
    rmesa->tcl.vertex_format = vfmt;
 }
 
-
-void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
-{
-   r100ContextPtr rmesa = R100_CONTEXT( ctx );
-   int i;
-
-   for (i = 0; i < rmesa->tcl.nr_aos_components; i++) {
-     if (rmesa->tcl.aos[i].bo) {
-       radeon_bo_unref(rmesa->tcl.aos[i].bo);
-       rmesa->tcl.aos[i].bo = NULL;
-     }
-   }
-}
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
index d468a97200..78ec119302 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
@@ -374,15 +374,15 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
 	 break;
 
    if (rmesa->tcl.vertex_format == setup_tab[i].vertex_format &&
-       rmesa->tcl.aos[0].bo)
+       rmesa->radeon.tcl.aos[0].bo)
       return;
 
-   if (rmesa->tcl.aos[0].bo)
+   if (rmesa->radeon.tcl.aos[0].bo)
       radeonReleaseArrays( ctx, ~0 );
 
    radeonAllocDmaRegion( &rmesa->radeon,
-			 &rmesa->tcl.aos[0].bo,
-			 &rmesa->tcl.aos[0].offset,
+			 &rmesa->radeon.tcl.aos[0].bo,
+			 &rmesa->radeon.tcl.aos[0].offset,
 			 VB->Count * setup_tab[i].vertex_size * 4, 
 			 4);
 
@@ -422,25 +422,12 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
 
 
    setup_tab[i].emit( ctx, 0, VB->Count, 
-		      rmesa->tcl.aos[0].bo->ptr + rmesa->tcl.aos[0].offset);
+		      rmesa->radeon.tcl.aos[0].bo->ptr + rmesa->radeon.tcl.aos[0].offset);
 
-   //   rmesa->tcl.aos[0].size = setup_tab[i].vertex_size;
-   rmesa->tcl.aos[0].stride = setup_tab[i].vertex_size;
+   //   rmesa->radeon.tcl.aos[0].size = setup_tab[i].vertex_size;
+   rmesa->radeon.tcl.aos[0].stride = setup_tab[i].vertex_size;
    rmesa->tcl.vertex_format = setup_tab[i].vertex_format;
-   rmesa->tcl.nr_aos_components = 1;
+   rmesa->radeon.tcl.aos_count = 1;
 }
 
 
-
-void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
-{
-   r100ContextPtr rmesa = R100_CONTEXT( ctx );
-   int i;
-
-   for (i = 0; i < rmesa->tcl.nr_aos_components; i++) {
-      if (rmesa->tcl.aos[i].bo) {
-         radeon_bo_unref(rmesa->tcl.aos[i].bo);
-         rmesa->tcl.aos[i].bo = NULL;
-      }
-   }
-}
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index ea400a672d..ecfdce9d01 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -1332,7 +1332,6 @@ radeonDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
     _mesa_reference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
 }
 
-#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
 /**
  * Choose the appropriate CreateContext function based on the chipset.
  * Eventually, all drivers will go through this process.
@@ -1343,25 +1342,21 @@ static GLboolean radeonCreateContext(const __GLcontextModes * glVisual,
 {
 	__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 	radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
-
+#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
 	if (IS_R300_CLASS(screen))
 		return r300CreateContext(glVisual, driContextPriv, sharedContextPriv);
-        return GL_FALSE;
-}
-
-/**
- * Choose the appropriate DestroyContext function based on the chipset.
- */
-static void radeonDestroyContext(__DRIcontextPrivate * driContextPriv)
-{
-	radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
-
-	if (IS_R300_CLASS(radeon->radeonScreen))
-		return r300DestroyContext(driContextPriv);
-}
+#endif
 
+#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
+	if (IS_R200_CLASS(screen))
+		return r200CreateContext(glVisual, driContextPriv, sharedContextPriv);
+#endif
 
+#if !RADEON_COMMON
+	return r100CreateContext(glVisual, driContextPriv, sharedContextPriv);
 #endif
+	return GL_FALSE;
+}
 
 
 /**
@@ -1547,7 +1542,6 @@ getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
    return 0;
 }
 
-#if !RADEON_COMMON || (RADEON_COMMON && defined(RADEON_COMMON_FOR_R300))
 const struct __DriverAPIRec driDriverAPI = {
    .InitScreen      = radeonInitScreen,
    .DestroyScreen   = radeonDestroyScreen,
@@ -1567,24 +1561,4 @@ const struct __DriverAPIRec driDriverAPI = {
     /* DRI2 */
    .InitScreen2     = radeonInitScreen2,
 };
-#else
-const struct __DriverAPIRec driDriverAPI = {
-   .InitScreen      = radeonInitScreen,
-   .DestroyScreen   = radeonDestroyScreen,
-   .CreateContext   = r200CreateContext,
-   .DestroyContext  = r200DestroyContext,
-   .CreateBuffer    = radeonCreateBuffer,
-   .DestroyBuffer   = radeonDestroyBuffer,
-   .SwapBuffers     = radeonSwapBuffers,
-   .MakeCurrent     = radeonMakeCurrent,
-   .UnbindContext   = radeonUnbindContext,
-   .GetSwapInfo     = getSwapInfo,
-   .GetDrawableMSC  = driDrawableGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL,
-   .CopySubBuffer   = radeonCopySubBuffer,
-   .InitScreen2     = radeonInitScreen2,
-};
-#endif
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.h b/src/mesa/drivers/dri/radeon/radeon_state.h
index 17c2b11222..f05fa827d7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.h
+++ b/src/mesa/drivers/dri/radeon/radeon_state.h
@@ -52,9 +52,6 @@ extern void radeonUploadTexMatrix( r100ContextPtr rmesa,
 
 extern void radeonValidateState( GLcontext *ctx );
 
-extern void radeonPrintDirty( r100ContextPtr rmesa,
-			      const char *msg );
-
 
 extern void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode );
 #define FALLBACK( rmesa, bit, mode ) do {				\
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index 3d0cd8d3f8..174a7e1862 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -161,22 +161,6 @@ static struct {
 /* =============================================================
  * State initialization
  */
-
-void radeonPrintDirty( r100ContextPtr rmesa, const char *msg )
-{
-   struct radeon_state_atom *l;
-
-   fprintf(stderr, msg);
-   fprintf(stderr, ": ");
-
-   foreach(l, &rmesa->radeon.hw.atomlist) {
-      if (l->dirty || rmesa->radeon.hw.all_dirty)
-	 fprintf(stderr, "%s, ", l->name);
-   }
-
-   fprintf(stderr, "\n");
-}
-
 static int cmdpkt( r100ContextPtr rmesa, int id ) 
 {
    drm_radeon_cmd_header_t h;
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index 2484006f1c..e31f045991 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -822,7 +822,3 @@ void radeonInitSwtcl( GLcontext *ctx )
    rmesa->radeon.swtcl.hw_primitive = 0;
 }
 
-
-void radeonDestroySwtcl( GLcontext *ctx )
-{
-}
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.h b/src/mesa/drivers/dri/radeon/radeon_swtcl.h
index 3ada9890b3..da89158eeb 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.h
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.h
@@ -40,7 +40,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_context.h"
 
 extern void radeonInitSwtcl( GLcontext *ctx );
-extern void radeonDestroySwtcl( GLcontext *ctx );
 
 extern void radeonChooseRenderState( GLcontext *ctx );
 extern void radeonChooseVertexState( GLcontext *ctx );
diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.c b/src/mesa/drivers/dri/radeon/radeon_tcl.c
index 5887ab355d..df6708f05e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tcl.c
@@ -150,10 +150,10 @@ static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuint nr )
 	 rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 
       rcommonEnsureCmdBufSpace(&rmesa->radeon, rmesa->radeon.hw.max_state_size + ELTS_BUFSZ(nr) + 
-			       AOS_BUFSZ(rmesa->tcl.nr_aos_components), __FUNCTION__);
+			       AOS_BUFSZ(rmesa->radeon.tcl.aos_count), __FUNCTION__);
 
       radeonEmitAOS( rmesa,
-		     rmesa->tcl.nr_aos_components, 0 );
+		     rmesa->radeon.tcl.aos_count, 0 );
 
       return radeonAllocEltsOpenEnded( rmesa, rmesa->tcl.vertex_format,
 				       rmesa->tcl.hw_primitive, nr );
@@ -177,11 +177,11 @@ static void radeonEmitPrim( GLcontext *ctx,
    radeonTclPrimitive( ctx, prim, hwprim );
    
    rcommonEnsureCmdBufSpace( &rmesa->radeon,
-			     AOS_BUFSZ(rmesa->tcl.nr_aos_components) +
+			     AOS_BUFSZ(rmesa->radeon.tcl.aos_count) +
 			     rmesa->radeon.hw.max_state_size + VBUF_BUFSZ, __FUNCTION__ );
 
    radeonEmitAOS( rmesa,
-		  rmesa->tcl.nr_aos_components,
+		  rmesa->radeon.tcl.aos_count,
 		  start );
    
    /* Why couldn't this packet have taken an offset param?
-- 
cgit v1.2.3