From e6b137dcce58ca074458b184304573613917553f Mon Sep 17 00:00:00 2001 From: Nicolai Hähnle Date: Sun, 4 Oct 2009 11:13:09 +0200 Subject: r300/compiler: Introduce aluresult register for branch operation support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Nicolai Hähnle --- src/mesa/drivers/dri/r300/compiler/r500_fragprog.c | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'src/mesa/drivers/dri/r300/compiler/r500_fragprog.c') diff --git a/src/mesa/drivers/dri/r300/compiler/r500_fragprog.c b/src/mesa/drivers/dri/r300/compiler/r500_fragprog.c index 971465e359..39f2445bd4 100644 --- a/src/mesa/drivers/dri/r300/compiler/r500_fragprog.c +++ b/src/mesa/drivers/dri/r300/compiler/r500_fragprog.c @@ -169,6 +169,34 @@ int r500_transform_TEX( return 1; } +/** + * Rewrite IF instructions to use the ALU result special register. + */ +int r500_transform_IF( + struct radeon_compiler * c, + struct rc_instruction * inst, + void* data) +{ + if (inst->I.Opcode != RC_OPCODE_IF) + return 0; + + struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst->Prev); + inst_mov->I.Opcode = RC_OPCODE_MOV; + inst_mov->I.DstReg.WriteMask = 0; + inst_mov->I.WriteALUResult = RC_ALURESULT_W; + inst_mov->I.ALUResultCompare = RC_COMPARE_FUNC_NOTEQUAL; + inst_mov->I.SrcReg[0] = inst->I.SrcReg[0]; + inst_mov->I.SrcReg[0].Swizzle = combine_swizzles4(inst_mov->I.SrcReg[0].Swizzle, + RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED, RC_SWIZZLE_X); + + inst->I.SrcReg[0].File = RC_FILE_SPECIAL; + inst->I.SrcReg[0].Index = RC_SPECIAL_ALU_RESULT; + inst->I.SrcReg[0].Swizzle = RC_SWIZZLE_XYZW; + inst->I.SrcReg[0].Negate = 0; + + return 1; +} + static int r500_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg) { unsigned int relevant; -- cgit v1.2.3