From a195f7162a2183d58423954fdf10df6ddcead40e Mon Sep 17 00:00:00 2001 From: Christoph Brill Date: Mon, 25 Feb 2008 20:30:40 +0100 Subject: [r300] Add some more register from the AMD spec in the area of AARESOLVE --- src/mesa/drivers/dri/r300/r300_cmdbuf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/r300/r300_cmdbuf.c') diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c index dad81bac94..399799eca1 100644 --- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c +++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c @@ -421,7 +421,7 @@ void r300InitCmdBuf(r300ContextPtr r300) ALLOC_STATE(rb3d_dither_ctl, always, 10, 0); r300->hw.rb3d_dither_ctl.cmd[0] = cmdpacket0(R300_RB3D_DITHER_CTL, R300_RB3D_DITHER_CTL_DITHER_MODE_ROUND | R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT); ALLOC_STATE(rb3d_aaresolve_ctl, always, 2, 0); - r300->hw.rb3d_aaresolve_ctl.cmd[0] = cmdpacket0(R300_RB3D_AARESOLVE_CTL, R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE); + r300->hw.rb3d_aaresolve_ctl.cmd[0] = cmdpacket0(RB3D_AARESOLVE_CTL, RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE); ALLOC_STATE(rb3d_discard_src_pixel_lte_threshold, always, 3, 0); r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[0] = cmdpacket0(RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 2); ALLOC_STATE(zs, always, R300_ZS_CMDSIZE, 0); -- cgit v1.2.3