From 9818734e0148510967ca9ee0d1aa8b196b509f02 Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Sat, 21 Feb 2009 14:53:25 -0700 Subject: mesa: use an array for current texture objects Use loops to consolidate lots of texture object code. --- src/mesa/drivers/dri/r300/r300_state.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/r300/r300_state.c') diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index c192fecca4..ade45f581c 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -1199,7 +1199,7 @@ r300FetchStateParameter(GLcontext * ctx, case STATE_R300_TEXRECT_FACTOR:{ struct gl_texture_object *t = - ctx->Texture.Unit[state[2]].CurrentRect; + ctx->Texture.Unit[state[2]].CurrentTex[TEXTURE_RECT_INDEX]; if (t && t->Image[0][t->BaseLevel]) { struct gl_texture_image *image = -- cgit v1.2.3 From 91e61f435a71436c209934a0ece165b540aba3e0 Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Mon, 2 Mar 2009 11:47:52 -0700 Subject: mesa: use Stencil._Enabled field instead of Stencil.Enabled --- src/mesa/drivers/common/driverfuncs.c | 2 +- src/mesa/drivers/dri/ffb/ffb_state.c | 4 ++-- src/mesa/drivers/dri/i965/brw_cc.c | 2 +- src/mesa/drivers/dri/i965/brw_fallback.c | 2 +- src/mesa/drivers/dri/i965/brw_wm.c | 2 +- src/mesa/drivers/dri/intel/intel_buffers.c | 4 ++-- src/mesa/drivers/dri/intel/intel_pixel.c | 2 +- src/mesa/drivers/dri/intel/intel_pixel_copy.c | 2 +- src/mesa/drivers/dri/intel/intel_pixel_draw.c | 2 +- src/mesa/drivers/dri/mga/mgapixel.c | 2 +- src/mesa/drivers/dri/r200/r200_pixel.c | 2 +- src/mesa/drivers/dri/r300/r300_state.c | 2 +- src/mesa/drivers/dri/savage/savagestate.c | 4 ++-- src/mesa/drivers/dri/tdfx/tdfx_pixels.c | 2 +- src/mesa/drivers/dri/tdfx/tdfx_render.c | 2 +- src/mesa/drivers/dri/tdfx/tdfx_state.c | 2 +- src/mesa/drivers/dri/unichrome/via_state.c | 2 +- src/mesa/drivers/ggi/default/stubs.c | 2 +- src/mesa/drivers/glide/fxdd.c | 2 +- src/mesa/swrast/s_context.c | 2 +- src/mesa/swrast/s_span.c | 8 ++++---- src/mesa/swrast/s_triangle.c | 2 +- 22 files changed, 28 insertions(+), 28 deletions(-) (limited to 'src/mesa/drivers/dri/r300/r300_state.c') diff --git a/src/mesa/drivers/common/driverfuncs.c b/src/mesa/drivers/common/driverfuncs.c index 986f751bdc..9bee212c6a 100644 --- a/src/mesa/drivers/common/driverfuncs.c +++ b/src/mesa/drivers/common/driverfuncs.c @@ -308,7 +308,7 @@ _mesa_init_driver_state(GLcontext *ctx) ctx->Driver.Enable(ctx, GL_LINE_SMOOTH, ctx->Line.SmoothFlag); ctx->Driver.Enable(ctx, GL_POLYGON_STIPPLE, ctx->Polygon.StippleFlag); ctx->Driver.Enable(ctx, GL_SCISSOR_TEST, ctx->Scissor.Enabled); - ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled); + ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil._Enabled); ctx->Driver.Enable(ctx, GL_TEXTURE_1D, GL_FALSE); ctx->Driver.Enable(ctx, GL_TEXTURE_2D, GL_FALSE); ctx->Driver.Enable(ctx, GL_TEXTURE_RECTANGLE_NV, GL_FALSE); diff --git a/src/mesa/drivers/dri/ffb/ffb_state.c b/src/mesa/drivers/dri/ffb/ffb_state.c index ee0fe4e0db..5eb8f417ff 100644 --- a/src/mesa/drivers/dri/ffb/ffb_state.c +++ b/src/mesa/drivers/dri/ffb/ffb_state.c @@ -275,7 +275,7 @@ ffbDDStencilFuncSeparate(GLcontext *ctx, GLenum face, GLenum func, /* We will properly update sw/hw state when stenciling is * enabled. */ - if (! ctx->Stencil.Enabled) + if (! ctx->Stencil._Enabled) return; stencilctl = fmesa->stencilctl; @@ -333,7 +333,7 @@ ffbDDStencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail, /* We will properly update sw/hw state when stenciling is * enabled. */ - if (! ctx->Stencil.Enabled) + if (! ctx->Stencil._Enabled) return; stencilctl = fmesa->stencilctl; diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index 82370162f5..c724218cf5 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -88,7 +88,7 @@ cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key) memset(key, 0, sizeof(*key)); - key->stencil = ctx->Stencil.Enabled; + key->stencil = ctx->Stencil._Enabled; key->stencil_two_side = ctx->Stencil._TestTwoSide; if (key->stencil) { diff --git a/src/mesa/drivers/dri/i965/brw_fallback.c b/src/mesa/drivers/dri/i965/brw_fallback.c index 5f4f2d515d..299357409c 100644 --- a/src/mesa/drivers/dri/i965/brw_fallback.c +++ b/src/mesa/drivers/dri/i965/brw_fallback.c @@ -75,7 +75,7 @@ static GLboolean do_check_fallback(struct brw_context *brw) /* _NEW_STENCIL */ - if (ctx->Stencil.Enabled && + if (ctx->Stencil._Enabled && (ctx->DrawBuffer->Name == 0 && !brw->intel.hw_stencil)) { DBG("FALLBACK: stencil\n"); return GL_TRUE; diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 06a6f3f0f4..879000644b 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -210,7 +210,7 @@ static void brw_wm_populate_key( struct brw_context *brw, lookup |= IZ_DEPTH_WRITE_ENABLE_BIT; /* _NEW_STENCIL */ - if (ctx->Stencil.Enabled) { + if (ctx->Stencil._Enabled) { lookup |= IZ_STENCIL_TEST_ENABLE_BIT; if (ctx->Stencil.WriteMask[0] || diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c index 7f2144abd4..732bae5b5a 100644 --- a/src/mesa/drivers/dri/intel/intel_buffers.c +++ b/src/mesa/drivers/dri/intel/intel_buffers.c @@ -263,7 +263,7 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb) } } else { - /* XXX FBO: instead of FALSE, pass ctx->Stencil.Enabled ??? */ + /* XXX FBO: instead of FALSE, pass ctx->Stencil._Enabled ??? */ FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_FALSE); } @@ -274,7 +274,7 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb) ctx->Driver.Enable(ctx, GL_DEPTH_TEST, (ctx->Depth.Test && fb->Visual.depthBits > 0)); ctx->Driver.Enable(ctx, GL_STENCIL_TEST, - (ctx->Stencil.Enabled && fb->Visual.stencilBits > 0)); + (ctx->Stencil._Enabled && fb->Visual.stencilBits > 0)); } else { ctx->NewState |= (_NEW_DEPTH | _NEW_STENCIL); diff --git a/src/mesa/drivers/dri/intel/intel_pixel.c b/src/mesa/drivers/dri/intel/intel_pixel.c index 5e32288844..9f4b4ff0ba 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel.c +++ b/src/mesa/drivers/dri/intel/intel_pixel.c @@ -112,7 +112,7 @@ intel_check_blit_fragment_ops(GLcontext * ctx, GLboolean src_alpha_is_one) return GL_FALSE; } - if (ctx->Stencil.Enabled) { + if (ctx->Stencil._Enabled) { DBG("fallback due to image stencil\n"); return GL_FALSE; } diff --git a/src/mesa/drivers/dri/intel/intel_pixel_copy.c b/src/mesa/drivers/dri/intel/intel_pixel_copy.c index 7c7aa6097c..d50dd68092 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_copy.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_copy.c @@ -87,7 +87,7 @@ intel_check_copypixel_blit_fragment_ops(GLcontext * ctx) ctx->Color.AlphaEnabled || ctx->Depth.Test || ctx->Fog.Enabled || - ctx->Stencil.Enabled || + ctx->Stencil._Enabled || !ctx->Color.ColorMask[0] || !ctx->Color.ColorMask[1] || !ctx->Color.ColorMask[2] || diff --git a/src/mesa/drivers/dri/intel/intel_pixel_draw.c b/src/mesa/drivers/dri/intel/intel_pixel_draw.c index 7be7ea82b3..e8d5ac8569 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_draw.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_draw.c @@ -233,7 +233,7 @@ intel_stencil_drawpixels(GLcontext * ctx, } /* We don't support stencil testing/ops here */ - if (ctx->Stencil.Enabled) + if (ctx->Stencil._Enabled) return GL_FALSE; /* We use FBOs for our wrapping of the depthbuffer into a color diff --git a/src/mesa/drivers/dri/mga/mgapixel.c b/src/mesa/drivers/dri/mga/mgapixel.c index 9f90047ba5..977dfa0b76 100644 --- a/src/mesa/drivers/dri/mga/mgapixel.c +++ b/src/mesa/drivers/dri/mga/mgapixel.c @@ -133,7 +133,7 @@ check_color_per_fragment_ops( const GLcontext *ctx ) ctx->Depth.Test || ctx->Fog.Enabled || ctx->Scissor.Enabled || - ctx->Stencil.Enabled || + ctx->Stencil._Enabled || !ctx->Color.ColorMask[0] || !ctx->Color.ColorMask[1] || !ctx->Color.ColorMask[2] || diff --git a/src/mesa/drivers/dri/r200/r200_pixel.c b/src/mesa/drivers/dri/r200/r200_pixel.c index be68821dc1..2797cbb3dc 100644 --- a/src/mesa/drivers/dri/r200/r200_pixel.c +++ b/src/mesa/drivers/dri/r200/r200_pixel.c @@ -87,7 +87,7 @@ check_color_per_fragment_ops( const GLcontext *ctx ) ctx->Depth.Test || ctx->Fog.Enabled || ctx->Scissor.Enabled || - ctx->Stencil.Enabled || + ctx->Stencil._Enabled || !ctx->Color.ColorMask[0] || !ctx->Color.ColorMask[1] || !ctx->Color.ColorMask[2] || diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index ade45f581c..37dae6c886 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -2205,7 +2205,7 @@ static void r300ResetHwState(r300ContextPtr r300) r300DepthFunc(ctx, ctx->Depth.Func); /* stencil */ - r300Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled); + r300Enable(ctx, GL_STENCIL_TEST, ctx->Stencil._Enabled); r300StencilMaskSeparate(ctx, 0, ctx->Stencil.WriteMask[0]); r300StencilFuncSeparate(ctx, 0, ctx->Stencil.Function[0], ctx->Stencil.Ref[0], ctx->Stencil.ValueMask[0]); diff --git a/src/mesa/drivers/dri/savage/savagestate.c b/src/mesa/drivers/dri/savage/savagestate.c index 73d85ed57b..84e1b52585 100644 --- a/src/mesa/drivers/dri/savage/savagestate.c +++ b/src/mesa/drivers/dri/savage/savagestate.c @@ -514,7 +514,7 @@ static void savageDDDepthFunc_s4(GLcontext *ctx, GLenum func) imesa->regs.s4.drawLocalCtrl.ni.flushPdZbufWrites = GL_TRUE; imesa->regs.s4.zBufCtrl.ni.zBufEn = GL_TRUE; } - else if (imesa->glCtx->Stencil.Enabled && imesa->hw_stencil) + else if (imesa->glCtx->Stencil._Enabled && imesa->hw_stencil) { /* Need to keep Z on for Stencil. */ imesa->regs.s4.zBufCtrl.ni.zCmpFunc = CF_Always; @@ -1092,7 +1092,7 @@ static void savageDDEnable_s4(GLcontext *ctx, GLenum cap, GLboolean state) FALLBACK (ctx, SAVAGE_FALLBACK_STENCIL, state); else { imesa->regs.s4.stencilCtrl.ni.stencilEn = state; - if (ctx->Stencil.Enabled && + if (ctx->Stencil._Enabled && imesa->regs.s4.zBufCtrl.ni.zBufEn != GL_TRUE) { /* Stencil buffer requires Z enabled. */ diff --git a/src/mesa/drivers/dri/tdfx/tdfx_pixels.c b/src/mesa/drivers/dri/tdfx/tdfx_pixels.c index 9ab9c05f2b..18729d5ae0 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_pixels.c +++ b/src/mesa/drivers/dri/tdfx/tdfx_pixels.c @@ -610,7 +610,7 @@ tdfx_drawpixels_R8G8B8A8(GLcontext * ctx, GLint x, GLint y, ctx->Depth.Test || ctx->Fog.Enabled || ctx->Scissor.Enabled || - ctx->Stencil.Enabled || + ctx->Stencil._Enabled || !ctx->Color.ColorMask[0] || !ctx->Color.ColorMask[1] || !ctx->Color.ColorMask[2] || diff --git a/src/mesa/drivers/dri/tdfx/tdfx_render.c b/src/mesa/drivers/dri/tdfx/tdfx_render.c index cf840c57a7..2cd8e12d95 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_render.c +++ b/src/mesa/drivers/dri/tdfx/tdfx_render.c @@ -740,7 +740,7 @@ void tdfxEmitHwStateLocked( tdfxContextPtr fxMesa ) } if ( fxMesa->dirty & TDFX_UPLOAD_STENCIL ) { - if (fxMesa->glCtx->Stencil.Enabled) { + if (fxMesa->glCtx->Stencil._Enabled) { fxMesa->Glide.grEnable(GR_STENCIL_MODE_EXT); fxMesa->Glide.grStencilOp(fxMesa->Stencil.FailFunc, fxMesa->Stencil.ZFailFunc, diff --git a/src/mesa/drivers/dri/tdfx/tdfx_state.c b/src/mesa/drivers/dri/tdfx/tdfx_state.c index a2d7bcd97d..591df8a905 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_state.c +++ b/src/mesa/drivers/dri/tdfx/tdfx_state.c @@ -459,7 +459,7 @@ static void tdfxUpdateStencil( GLcontext *ctx ) } if (fxMesa->haveHwStencil) { - if (ctx->Stencil.Enabled) { + if (ctx->Stencil._Enabled) { fxMesa->Stencil.Function = ctx->Stencil.Function[0] - GL_NEVER + GR_CMP_NEVER; fxMesa->Stencil.RefValue = ctx->Stencil.Ref[0] & 0xff; fxMesa->Stencil.ValueMask = ctx->Stencil.ValueMask[0] & 0xff; diff --git a/src/mesa/drivers/dri/unichrome/via_state.c b/src/mesa/drivers/dri/unichrome/via_state.c index 1cef01ab03..840e4e42da 100644 --- a/src/mesa/drivers/dri/unichrome/via_state.c +++ b/src/mesa/drivers/dri/unichrome/via_state.c @@ -1342,7 +1342,7 @@ static void viaChooseStencilState(GLcontext *ctx) { struct via_context *vmesa = VIA_CONTEXT(ctx); - if (ctx->Stencil.Enabled) { + if (ctx->Stencil._Enabled) { GLuint temp; vmesa->regEnable |= HC_HenST_MASK; diff --git a/src/mesa/drivers/ggi/default/stubs.c b/src/mesa/drivers/ggi/default/stubs.c index 7b442b6d20..62722972b2 100644 --- a/src/mesa/drivers/ggi/default/stubs.c +++ b/src/mesa/drivers/ggi/default/stubs.c @@ -472,7 +472,7 @@ static void GGItriangle_flat_depth(GLcontext *ctx, const SWvertex *v0, const SWv static swrast_tri_func ggimesa_stubs_get_triangle_func(GLcontext *ctx) { - if (ctx->Stencil.Enabled) return NULL; + if (ctx->Stencil._Enabled) return NULL; if (ctx->Polygon.SmoothFlag) return NULL; if (ctx->Polygon.StippleFlag) return NULL; if (ctx->Texture._ReallyEnabled) return NULL; diff --git a/src/mesa/drivers/glide/fxdd.c b/src/mesa/drivers/glide/fxdd.c index 338cd37382..1bcf2512a6 100644 --- a/src/mesa/drivers/glide/fxdd.c +++ b/src/mesa/drivers/glide/fxdd.c @@ -1948,7 +1948,7 @@ fx_check_IsInHardware(GLcontext * ctx) return FX_FALLBACK_RENDER_MODE; } - if (ctx->Stencil.Enabled && !fxMesa->haveHwStencil) { + if (ctx->Stencil._Enabled && !fxMesa->haveHwStencil) { return FX_FALLBACK_STENCIL; } diff --git a/src/mesa/swrast/s_context.c b/src/mesa/swrast/s_context.c index 719e6b8296..4dbccbb2d5 100644 --- a/src/mesa/swrast/s_context.c +++ b/src/mesa/swrast/s_context.c @@ -61,7 +61,7 @@ _swrast_update_rasterflags( GLcontext *ctx ) if (ctx->Depth.Test) rasterMask |= DEPTH_BIT; if (swrast->_FogEnabled) rasterMask |= FOG_BIT; if (ctx->Scissor.Enabled) rasterMask |= CLIP_BIT; - if (ctx->Stencil.Enabled) rasterMask |= STENCIL_BIT; + if (ctx->Stencil._Enabled) rasterMask |= STENCIL_BIT; if (ctx->Visual.rgbMode) { const GLuint colorMask = *((GLuint *) &ctx->Color.ColorMask); if (colorMask != 0xffffffff) rasterMask |= MASKING_BIT; diff --git a/src/mesa/swrast/s_span.c b/src/mesa/swrast/s_span.c index 43e0721ec9..5e1f412d6b 100644 --- a/src/mesa/swrast/s_span.c +++ b/src/mesa/swrast/s_span.c @@ -846,11 +846,11 @@ _swrast_write_index_span( GLcontext *ctx, SWspan *span) } /* Stencil and Z testing */ - if (ctx->Depth.Test || ctx->Stencil.Enabled) { + if (ctx->Stencil._Enabled || ctx->Depth.Test) { if (!(span->arrayMask & SPAN_Z)) _swrast_span_interpolate_z(ctx, span); - if (ctx->Stencil.Enabled) { + if (ctx->Stencil._Enabled) { if (!_swrast_stencil_and_ztest_span(ctx, span)) { span->arrayMask = origArrayMask; return; @@ -1317,11 +1317,11 @@ _swrast_write_rgba_span( GLcontext *ctx, SWspan *span) } /* Stencil and Z testing */ - if (ctx->Stencil.Enabled || ctx->Depth.Test) { + if (ctx->Stencil._Enabled || ctx->Depth.Test) { if (!(span->arrayMask & SPAN_Z)) _swrast_span_interpolate_z(ctx, span); - if (ctx->Stencil.Enabled && fb->Visual.stencilBits > 0) { + if (ctx->Stencil._Enabled) { /* Combined Z/stencil tests */ if (!_swrast_stencil_and_ztest_span(ctx, span)) { /* all fragments failed test */ diff --git a/src/mesa/swrast/s_triangle.c b/src/mesa/swrast/s_triangle.c index c97cd4dfe7..9260e35066 100644 --- a/src/mesa/swrast/s_triangle.c +++ b/src/mesa/swrast/s_triangle.c @@ -1022,7 +1022,7 @@ _swrast_choose_triangle( GLcontext *ctx ) ctx->Depth.Test && ctx->Depth.Mask == GL_FALSE && ctx->Depth.Func == GL_LESS && - !ctx->Stencil.Enabled) { + !ctx->Stencil._Enabled) { if ((rgbmode && ctx->Color.ColorMask[0] == 0 && ctx->Color.ColorMask[1] == 0 && -- cgit v1.2.3 From d8b8fb68954e6eebd0b38708c25a5bec4cf1a26c Mon Sep 17 00:00:00 2001 From: Maciej Cencora Date: Wed, 18 Feb 2009 10:42:01 +0100 Subject: r300: rewrite and hopefully simplify RS setup Testing and regression fixes by Markus Amsler Signed-off-by: Nicolai Haehnle --- src/mesa/drivers/dri/r300/r300_state.c | 401 ++++++++++++------------ src/mesa/drivers/dri/r300/r300_vertprog.c | 9 +- src/mesa/drivers/dri/r300/radeon_program_pair.c | 28 +- 3 files changed, 225 insertions(+), 213 deletions(-) (limited to 'src/mesa/drivers/dri/r300/r300_state.c') diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 37dae6c886..171a154918 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -1595,18 +1595,14 @@ union r300_outputs_written { static void r300SetupRSUnit(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); - /* I'm still unsure if these are needed */ - GLuint interp_col[8]; TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; union r300_outputs_written OutputsWritten; GLuint InputsRead; int fp_reg, high_rr; - int col_interp_nr; - int rs_tex_count = 0, rs_col_count = 0; - int i, count; - - memset(interp_col, 0, sizeof(interp_col)); + int col_ip, tex_ip; + int rs_tex_count = 0; + int i, count, col_fmt; if (hw_tcl_on) OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten; @@ -1624,51 +1620,66 @@ static void r300SetupRSUnit(GLcontext * ctx) R300_STATECHANGE(r300, rc); R300_STATECHANGE(r300, rr); - fp_reg = col_interp_nr = high_rr = 0; - - r300->hw.rr.cmd[R300_RR_INST_1] = 0; + fp_reg = col_ip = tex_ip = col_fmt = 0; - if (InputsRead & FRAG_BIT_WPOS) { - for (i = 0; i < ctx->Const.MaxTextureUnits; i++) - if (!(InputsRead & (FRAG_BIT_TEX0 << i))) - break; + r300->hw.rc.cmd[1] = 0; + r300->hw.rc.cmd[2] = 0; + for (i=0; ihw.rr.cmd[R300_RR_INST_0 + i] = 0; - if (i == ctx->Const.MaxTextureUnits) { - fprintf(stderr, "\tno free texcoord found...\n"); - _mesa_exit(-1); - } + for (i=0; ihw.ri.cmd[R300_RI_INTERP_0 + i] = 0; - InputsRead |= (FRAG_BIT_TEX0 << i); - InputsRead &= ~FRAG_BIT_WPOS; - } if (InputsRead & FRAG_BIT_COL0) { - count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size; - interp_col[0] |= R300_RS_COL_PTR(rs_col_count); - if (count == 3) - interp_col[0] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGB1); - rs_col_count += count; + if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) { + count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size; + if (count == 4) + col_fmt = R300_RS_COL_FMT_RGBA; + else if (count == 3) + col_fmt = R300_RS_COL_FMT_RGB1; + else + col_fmt = R300_RS_COL_FMT_0001; + + r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt); + r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg); + InputsRead &= ~FRAG_BIT_COL0; + ++col_ip; + ++fp_reg; + } else { + WARN_ONCE("fragprog wants col0, vp doesn't provide it\n"); + } } - else - interp_col[0] = R300_RS_COL_FMT(R300_RS_COL_FMT_0001); if (InputsRead & FRAG_BIT_COL1) { - count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size; - if (count == 3) - interp_col[1] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGB0); - interp_col[1] |= R300_RS_COL_PTR(1); - rs_col_count += count; - } - - if (InputsRead & FRAG_BIT_FOGC) { - /* XXX FIX THIS - * Just turn off the bit for now. - * Need to do something similar to the color/texcoord inputs. - */ - InputsRead &= ~FRAG_BIT_FOGC; + if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) { + count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size; + if (count == 4) + col_fmt = R300_RS_COL_FMT_RGBA; + else if (count == 3) + col_fmt = R300_RS_COL_FMT_RGB1; + else + col_fmt = R300_RS_COL_FMT_0001; + + r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt); + r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg); + InputsRead &= ~FRAG_BIT_COL1; + ++col_ip; + ++fp_reg; + } else { + WARN_ONCE("fragprog wants col1, vp doesn't provide it\n"); + } } for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { + if (! ( InputsRead & FRAG_BIT_TEX(i) ) ) + continue; + + if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) { + WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i); + continue; + } + int swiz; /* with TCL we always seem to route 4 components */ @@ -1677,7 +1688,6 @@ static void r300SetupRSUnit(GLcontext * ctx) else count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size; - r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = interp_col[i] | rs_tex_count; switch(count) { case 4: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3); break; case 3: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(R300_RS_SEL_K1); break; @@ -1686,63 +1696,48 @@ static void r300SetupRSUnit(GLcontext * ctx) case 2: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1); break; }; - r300->hw.ri.cmd[R300_RI_INTERP_0 + i] |= swiz; - - r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] = 0; - if (InputsRead & (FRAG_BIT_TEX0 << i)) { - - rs_tex_count += count; - - //assert(r300->state.texture.tc_count != 0); - r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] |= R300_RS_INST_TEX_CN_WRITE | i /* source INTERP */ - | (fp_reg << R300_RS_INST_TEX_ADDR_SHIFT); - high_rr = fp_reg; - - /* Passing invalid data here can lock the GPU. */ - if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) { - InputsRead &= ~(FRAG_BIT_TEX0 << i); - fp_reg++; - } else { - WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i); - } - } + r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= swiz | R300_RS_TEX_PTR(rs_tex_count); + r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg); + InputsRead &= ~(FRAG_BIT_TEX0 << i); + rs_tex_count += count; + ++tex_ip; + ++fp_reg; } - if (InputsRead & FRAG_BIT_COL0) { - if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) { - r300->hw.rr.cmd[R300_RR_INST_0] |= R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | (fp_reg++ << R300_RS_INST_COL_ADDR_SHIFT); - InputsRead &= ~FRAG_BIT_COL0; - col_interp_nr++; + if (InputsRead & FRAG_BIT_FOGC) { + if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) { + r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count); + r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg); + InputsRead &= ~FRAG_BIT_FOGC; + rs_tex_count += 4; + ++tex_ip; + ++fp_reg; } else { - WARN_ONCE("fragprog wants col0, vp doesn't provide it\n"); + WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n"); } } - if (InputsRead & FRAG_BIT_COL1) { - if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) { - r300->hw.rr.cmd[R300_RR_INST_1] |= R300_RS_INST_COL_ID(1) | R300_RS_INST_COL_CN_WRITE | (fp_reg++ << R300_RS_INST_COL_ADDR_SHIFT); - InputsRead &= ~FRAG_BIT_COL1; - if (high_rr < 1) - high_rr = 1; - col_interp_nr++; - } else { - WARN_ONCE("fragprog wants col1, vp doesn't provide it\n"); - } + if (InputsRead & FRAG_BIT_WPOS) { + r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count); + r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg); + InputsRead &= ~FRAG_BIT_WPOS; + rs_tex_count += 4; + ++tex_ip; + ++fp_reg; } + InputsRead &= ~FRAG_BIT_WPOS; - /* Need at least one. This might still lock as the values are undefined... */ - if (rs_tex_count == 0 && col_interp_nr == 0) { - r300->hw.rr.cmd[R300_RR_INST_0] |= R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | (fp_reg++ << R300_RS_INST_COL_ADDR_SHIFT); - col_interp_nr++; + /* Setup default color if no color or tex was set */ + if (rs_tex_count == 0 && col_ip == 0) { + r300->hw.rr.cmd[R300_RR_INST_0] = R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(0) | R300_RS_COL_FMT(R300_RS_COL_FMT_0001); + ++col_ip; } - r300->hw.rc.cmd[1] = 0 | (rs_tex_count << R300_IT_COUNT_SHIFT) - | (col_interp_nr << R300_IC_COUNT_SHIFT) - | R300_HIRES_EN; + high_rr = (col_ip > tex_ip) ? col_ip : tex_ip; + r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN; + r300->hw.rc.cmd[2] |= high_rr - 1; - assert(high_rr >= 0); - r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_INST_0, high_rr + 1); - r300->hw.rc.cmd[2] = high_rr; + r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_INST_0, high_rr); if (InputsRead) WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead); @@ -1751,18 +1746,15 @@ static void r300SetupRSUnit(GLcontext * ctx) static void r500SetupRSUnit(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); - /* I'm still unsure if these are needed */ - GLuint interp_col[8]; - union r300_outputs_written OutputsWritten; TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; + union r300_outputs_written OutputsWritten; GLuint InputsRead; int fp_reg, high_rr; - int rs_col_count = 0; - int in_texcoords, col_interp_nr; - int i, count; + int col_ip, tex_ip; + int rs_tex_count = 0; + int i, count, col_fmt; - memset(interp_col, 0, sizeof(interp_col)); if (hw_tcl_on) OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten; else @@ -1779,130 +1771,151 @@ static void r500SetupRSUnit(GLcontext * ctx) R300_STATECHANGE(r300, rc); R300_STATECHANGE(r300, rr); - fp_reg = col_interp_nr = high_rr = in_texcoords = 0; - - r300->hw.rr.cmd[R300_RR_INST_1] = 0; + fp_reg = col_ip = tex_ip = col_fmt = 0; - if (InputsRead & FRAG_BIT_WPOS) { - for (i = 0; i < ctx->Const.MaxTextureUnits; i++) - if (!(InputsRead & (FRAG_BIT_TEX0 << i))) - break; + r300->hw.rc.cmd[1] = 0; + r300->hw.rc.cmd[2] = 0; + for (i=0; ihw.rr.cmd[R300_RR_INST_0 + i] = 0; - if (i == ctx->Const.MaxTextureUnits) { - fprintf(stderr, "\tno free texcoord found...\n"); - _mesa_exit(-1); - } + for (i=0; ihw.ri.cmd[R300_RI_INTERP_0 + i] = 0; - InputsRead |= (FRAG_BIT_TEX0 << i); - InputsRead &= ~FRAG_BIT_WPOS; - } if (InputsRead & FRAG_BIT_COL0) { - count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size; - interp_col[0] |= R500_RS_COL_PTR(rs_col_count); - if (count == 3) - interp_col[0] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGB1); - rs_col_count += count; + if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) { + count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size; + if (count == 4) + col_fmt = R300_RS_COL_FMT_RGBA; + else if (count == 3) + col_fmt = R300_RS_COL_FMT_RGB1; + else + col_fmt = R300_RS_COL_FMT_0001; + + r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt); + r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg); + InputsRead &= ~FRAG_BIT_COL0; + ++col_ip; + ++fp_reg; + } else { + WARN_ONCE("fragprog wants col0, vp doesn't provide it\n"); + } } - else - interp_col[0] = R500_RS_COL_FMT(R300_RS_COL_FMT_0001); if (InputsRead & FRAG_BIT_COL1) { - count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size; - interp_col[1] |= R500_RS_COL_PTR(1); - if (count == 3) - interp_col[1] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGB0); - rs_col_count += count; + if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) { + count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size; + if (count == 4) + col_fmt = R300_RS_COL_FMT_RGBA; + else if (count == 3) + col_fmt = R300_RS_COL_FMT_RGB1; + else + col_fmt = R300_RS_COL_FMT_0001; + + r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt); + r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg); + InputsRead &= ~FRAG_BIT_COL1; + ++col_ip; + ++fp_reg; + } else { + WARN_ONCE("fragprog wants col1, vp doesn't provide it\n"); + } } + for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { - GLuint swiz = 0; + if (! ( InputsRead & FRAG_BIT_TEX(i) ) ) + continue; - /* with TCL we always seem to route 4 components */ - if (InputsRead & (FRAG_BIT_TEX0 << i)) { - - if (hw_tcl_on) - count = 4; - else - count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size; - - /* always have on texcoord */ - swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_S_SHIFT; - if (count >= 2) - swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_T_SHIFT; - else - swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT; - - if (count >= 3) - swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_R_SHIFT; - else - swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT; - - if (count == 4) - swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_Q_SHIFT; - else - swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT; - - } else - swiz = (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | - (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | - (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | - (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT); - - r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = interp_col[i] | swiz; - - r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] = 0; - if (InputsRead & (FRAG_BIT_TEX0 << i)) { - //assert(r300->state.texture.tc_count != 0); - r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] |= R500_RS_INST_TEX_CN_WRITE | i /* source INTERP */ - | (fp_reg << R500_RS_INST_TEX_ADDR_SHIFT); - high_rr = fp_reg; - - /* Passing invalid data here can lock the GPU. */ - if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) { - InputsRead &= ~(FRAG_BIT_TEX0 << i); - fp_reg++; - } else { - WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i); - } + if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) { + WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i); + continue; } - } - if (InputsRead & FRAG_BIT_COL0) { - if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) { - r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_ADDR_SHIFT); - InputsRead &= ~FRAG_BIT_COL0; - col_interp_nr++; + int swiz = 0; + + /* with TCL we always seem to route 4 components */ + if (hw_tcl_on) + count = 4; + else + count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size; + + if (count == 4) { + swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT; + swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT; + swiz |= (rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT; + swiz |= (rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT; + } else if (count == 3) { + swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT; + swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT; + swiz |= (rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT; + swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT; + } else if (count == 2) { + swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT; + swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT; + swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT; + swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT; + } else if (count == 1) { + swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT; + swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT; + swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT; + swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT; } else { - WARN_ONCE("fragprog wants col0, vp doesn't provide it\n"); + swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT; + swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT; + swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT; + swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT; } + + r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= swiz; + r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg); + InputsRead &= ~(FRAG_BIT_TEX0 << i); + rs_tex_count += count; + ++tex_ip; + ++fp_reg; } - if (InputsRead & FRAG_BIT_COL1) { - if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) { - r300->hw.rr.cmd[R300_RR_INST_1] |= (1 << 12) | R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_ADDR_SHIFT); - InputsRead &= ~FRAG_BIT_COL1; - if (high_rr < 1) - high_rr = 1; - col_interp_nr++; + if (InputsRead & FRAG_BIT_FOGC) { + if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) { + r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) | + ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) | + ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) | + ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT); + + r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg); + InputsRead &= ~FRAG_BIT_FOGC; + rs_tex_count += 4; + ++tex_ip; + ++fp_reg; } else { - WARN_ONCE("fragprog wants col1, vp doesn't provide it\n"); + WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n"); } } - /* Need at least one. This might still lock as the values are undefined... */ - if (in_texcoords == 0 && col_interp_nr == 0) { - r300->hw.rr.cmd[R300_RR_INST_0] |= 0 | R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_ADDR_SHIFT); - col_interp_nr++; + if (InputsRead & FRAG_BIT_WPOS) { + r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) | + ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) | + ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) | + ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT); + + r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg); + InputsRead &= ~FRAG_BIT_WPOS; + rs_tex_count += 4; + ++tex_ip; + ++fp_reg; + } + + /* Setup default color if no color or tex was set */ + if (rs_tex_count == 0 && col_ip == 0) { + r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_ID(0) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(0) | R500_RS_COL_FMT(R300_RS_COL_FMT_0001); + ++col_ip; } - r300->hw.rc.cmd[1] = 0 | (in_texcoords << R300_IT_COUNT_SHIFT) - | (col_interp_nr << R300_IC_COUNT_SHIFT) - | R300_HIRES_EN; + high_rr = (col_ip > tex_ip) ? col_ip : tex_ip; + r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN; + r300->hw.rc.cmd[2] |= 0xC0 | (high_rr - 1); - assert(high_rr >= 0); - r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R500_RS_INST_0, high_rr + 1); - r300->hw.rc.cmd[2] = 0xC0 | high_rr; + r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R500_RS_INST_0, high_rr); if (InputsRead) WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead); diff --git a/src/mesa/drivers/dri/r300/r300_vertprog.c b/src/mesa/drivers/dri/r300/r300_vertprog.c index c4e325e6a7..b6a4d30687 100644 --- a/src/mesa/drivers/dri/r300/r300_vertprog.c +++ b/src/mesa/drivers/dri/r300/r300_vertprog.c @@ -993,17 +993,16 @@ static void t_inputs_outputs(struct r300_vertex_program *vp) vp->outputs[VERT_RESULT_COL0] + 3; cur_reg = vp->outputs[VERT_RESULT_BFC1] + 1; } -#if 0 - if (vp->key.OutputsWritten & (1 << VERT_RESULT_FOGC)) { - vp->outputs[VERT_RESULT_FOGC] = cur_reg++; - } -#endif for (i = VERT_RESULT_TEX0; i <= VERT_RESULT_TEX7; i++) { if (vp->key.OutputsWritten & (1 << i)) { vp->outputs[i] = cur_reg++; } } + + if (vp->key.OutputsWritten & (1 << VERT_RESULT_FOGC)) { + vp->outputs[VERT_RESULT_FOGC] = cur_reg++; + } } static void r300TranslateVertexShader(struct r300_vertex_program *vp, diff --git a/src/mesa/drivers/dri/r300/radeon_program_pair.c b/src/mesa/drivers/dri/r300/radeon_program_pair.c index 365e7c1722..f398404f9f 100644 --- a/src/mesa/drivers/dri/r300/radeon_program_pair.c +++ b/src/mesa/drivers/dri/r300/radeon_program_pair.c @@ -451,19 +451,7 @@ static void allocate_input_registers(struct pair_state *s) int i; GLuint hwindex = 0; - /* Texcoords come first */ - for (i = 0; i < s->Ctx->Const.MaxTextureUnits; i++) { - if (InputsRead & (FRAG_BIT_TEX0 << i)) - alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_TEX0+i, hwindex++); - } - InputsRead &= ~FRAG_BITS_TEX_ANY; - - /* fragment position treated as a texcoord */ - if (InputsRead & FRAG_BIT_WPOS) - alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_WPOS, hwindex++); - InputsRead &= ~FRAG_BIT_WPOS; - - /* Then primary colour */ + /* Primary colour */ if (InputsRead & FRAG_BIT_COL0) alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_COL0, hwindex++); InputsRead &= ~FRAG_BIT_COL0; @@ -473,11 +461,23 @@ static void allocate_input_registers(struct pair_state *s) alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_COL1, hwindex++); InputsRead &= ~FRAG_BIT_COL1; - /* Fog coordinate */ + /* Texcoords */ + for (i = 0; i < s->Ctx->Const.MaxTextureUnits; i++) { + if (InputsRead & (FRAG_BIT_TEX0 << i)) + alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_TEX0+i, hwindex++); + } + InputsRead &= ~FRAG_BITS_TEX_ANY; + + /* Fogcoords treated as a texcoord */ if (InputsRead & FRAG_BIT_FOGC) alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_FOGC, hwindex++); InputsRead &= ~FRAG_BIT_FOGC; + /* fragment position treated as a texcoord */ + if (InputsRead & FRAG_BIT_WPOS) + alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_WPOS, hwindex++); + InputsRead &= ~FRAG_BIT_WPOS; + /* Anything else */ if (InputsRead) error("Don't know how to handle inputs 0x%x\n", InputsRead); -- cgit v1.2.3 From 0828bfaa4534615e29284c95df7435883dbeb735 Mon Sep 17 00:00:00 2001 From: Maciej Cencora Date: Sun, 15 Feb 2009 21:58:18 +0100 Subject: r300: enable EXT_fog_coord extension Remove fixed function fog setup. Signed-off-by: Nicolai Haehnle --- src/mesa/drivers/dri/r300/r300_context.c | 4 +- src/mesa/drivers/dri/r300/r300_state.c | 177 ++++--------------------------- 2 files changed, 20 insertions(+), 161 deletions(-) (limited to 'src/mesa/drivers/dri/r300/r300_state.c') diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index 4c14c7eefe..fddd87b85f 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -83,7 +83,7 @@ int hw_tcl_on = 1; #define need_GL_EXT_blend_equation_separate #define need_GL_EXT_blend_func_separate #define need_GL_EXT_blend_minmax -//#define need_GL_EXT_fog_coord +#define need_GL_EXT_fog_coord #define need_GL_EXT_gpu_program_parameters #define need_GL_EXT_secondary_color #define need_GL_EXT_stencil_two_side @@ -111,7 +111,7 @@ const struct dri_extension card_extensions[] = { {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions}, {"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions}, {"GL_EXT_blend_subtract", NULL}, -// {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions }, + {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions }, {"GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions}, {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions}, {"GL_EXT_shadow_funcs", NULL}, diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 171a154918..8361afafef 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -729,134 +729,6 @@ static void r300ColorMask(GLcontext * ctx, } } -/* ============================================================= - * Fog - */ -static void r300Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param) -{ - r300ContextPtr r300 = R300_CONTEXT(ctx); - union { - int i; - float f; - } fogScale, fogStart; - - (void)param; - - fogScale.i = r300->hw.fogp.cmd[R300_FOGP_SCALE]; - fogStart.i = r300->hw.fogp.cmd[R300_FOGP_START]; - - switch (pname) { - case GL_FOG_MODE: - switch (ctx->Fog.Mode) { - case GL_LINEAR: - R300_STATECHANGE(r300, fogs); - r300->hw.fogs.cmd[R300_FOGS_STATE] = - (r300->hw.fogs. - cmd[R300_FOGS_STATE] & ~R300_FG_FOG_BLEND_FN_MASK) | - R300_FG_FOG_BLEND_FN_LINEAR; - - if (ctx->Fog.Start == ctx->Fog.End) { - fogScale.f = -1.0; - fogStart.f = 1.0; - } else { - fogScale.f = - 1.0 / (ctx->Fog.End - ctx->Fog.Start); - fogStart.f = - -ctx->Fog.Start / (ctx->Fog.End - - ctx->Fog.Start); - } - break; - case GL_EXP: - R300_STATECHANGE(r300, fogs); - r300->hw.fogs.cmd[R300_FOGS_STATE] = - (r300->hw.fogs. - cmd[R300_FOGS_STATE] & ~R300_FG_FOG_BLEND_FN_MASK) | - R300_FG_FOG_BLEND_FN_EXP; - fogScale.f = 0.0933 * ctx->Fog.Density; - fogStart.f = 0.0; - break; - case GL_EXP2: - R300_STATECHANGE(r300, fogs); - r300->hw.fogs.cmd[R300_FOGS_STATE] = - (r300->hw.fogs. - cmd[R300_FOGS_STATE] & ~R300_FG_FOG_BLEND_FN_MASK) | - R300_FG_FOG_BLEND_FN_EXP2; - fogScale.f = 0.3 * ctx->Fog.Density; - fogStart.f = 0.0; - break; - default: - return; - } - break; - case GL_FOG_DENSITY: - switch (ctx->Fog.Mode) { - case GL_EXP: - fogScale.f = 0.0933 * ctx->Fog.Density; - fogStart.f = 0.0; - break; - case GL_EXP2: - fogScale.f = 0.3 * ctx->Fog.Density; - fogStart.f = 0.0; - default: - break; - } - break; - case GL_FOG_START: - case GL_FOG_END: - if (ctx->Fog.Mode == GL_LINEAR) { - if (ctx->Fog.Start == ctx->Fog.End) { - fogScale.f = -1.0; - fogStart.f = 1.0; - } else { - fogScale.f = - 1.0 / (ctx->Fog.End - ctx->Fog.Start); - fogStart.f = - -ctx->Fog.Start / (ctx->Fog.End - - ctx->Fog.Start); - } - } - break; - case GL_FOG_COLOR: - R300_STATECHANGE(r300, fogc); - r300->hw.fogc.cmd[R300_FOGC_R] = - (GLuint) (ctx->Fog.Color[0] * 1023.0F) & 0x3FF; - r300->hw.fogc.cmd[R300_FOGC_G] = - (GLuint) (ctx->Fog.Color[1] * 1023.0F) & 0x3FF; - r300->hw.fogc.cmd[R300_FOGC_B] = - (GLuint) (ctx->Fog.Color[2] * 1023.0F) & 0x3FF; - break; - case GL_FOG_COORD_SRC: - break; - default: - return; - } - - if (fogScale.i != r300->hw.fogp.cmd[R300_FOGP_SCALE] || - fogStart.i != r300->hw.fogp.cmd[R300_FOGP_START]) { - R300_STATECHANGE(r300, fogp); - r300->hw.fogp.cmd[R300_FOGP_SCALE] = fogScale.i; - r300->hw.fogp.cmd[R300_FOGP_START] = fogStart.i; - } -} - -static void r300SetFogState(GLcontext * ctx, GLboolean state) -{ - r300ContextPtr r300 = R300_CONTEXT(ctx); - - R300_STATECHANGE(r300, fogs); - if (state) { - r300->hw.fogs.cmd[R300_FOGS_STATE] |= R300_FG_FOG_BLEND_ENABLE; - - r300Fogfv(ctx, GL_FOG_MODE, NULL); - r300Fogfv(ctx, GL_FOG_DENSITY, &ctx->Fog.Density); - r300Fogfv(ctx, GL_FOG_START, &ctx->Fog.Start); - r300Fogfv(ctx, GL_FOG_END, &ctx->Fog.End); - r300Fogfv(ctx, GL_FOG_COLOR, ctx->Fog.Color); - } else { - r300->hw.fogs.cmd[R300_FOGS_STATE] &= ~R300_FG_FOG_BLEND_ENABLE; - } -} - /* ============================================================= * Point state */ @@ -2153,7 +2025,7 @@ static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state) /* empty */ break; case GL_FOG: - r300SetFogState(ctx, state); + /* empty */ break; case GL_ALPHA_TEST: r300SetAlphaState(ctx); @@ -2307,11 +2179,9 @@ static void r300ResetHwState(r300ContextPtr r300) break; } - /* XXX: set to 0 when fog is disabled? */ - r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = R300_GB_FOG_SELECT_1_1_W; - /* XXX: Enable anti-aliasing? */ r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = GB_AA_CONFIG_AA_DISABLE; + r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0; r300->hw.ga_point_s0.cmd[1] = r300PackFloat32(0.0); r300->hw.ga_point_s0.cmd[2] = r300PackFloat32(0.0); @@ -2360,17 +2230,11 @@ static void r300ResetHwState(r300ContextPtr r300) R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A; r300->hw.us_out_fmt.cmd[4] = R500_OUT_FMT_UNUSED | R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A; - r300->hw.us_out_fmt.cmd[5] = R300_W_FMT_W24; + r300->hw.us_out_fmt.cmd[5] = R300_W_FMT_W0 | R300_W_SRC_US; - r300Enable(ctx, GL_FOG, ctx->Fog.Enabled); - r300Fogfv(ctx, GL_FOG_MODE, NULL); - r300Fogfv(ctx, GL_FOG_DENSITY, &ctx->Fog.Density); - r300Fogfv(ctx, GL_FOG_START, &ctx->Fog.Start); - r300Fogfv(ctx, GL_FOG_END, &ctx->Fog.End); - r300Fogfv(ctx, GL_FOG_COLOR, ctx->Fog.Color); - r300Fogfv(ctx, GL_FOG_COORDINATE_SOURCE_EXT, NULL); - - r300->hw.fg_depth_src.cmd[1] = 0; + /* disable fog unit */ + r300->hw.fogs.cmd[R300_FOGS_STATE] = 0; + r300->hw.fg_depth_src.cmd[1] = R300_FG_DEPTH_SRC_SHADER; r300->hw.rb3d_cctl.cmd[1] = 0; @@ -2625,16 +2489,6 @@ static void r500SetupPixelShader(r300ContextPtr rmesa) } code = &fp->code; - if (fp->mesa_program.FogOption != GL_NONE) { - /* Enable HW fog. Try not to squish GL context. - * (Anybody sane remembered to set glFog() opts first!) */ - r300SetFogState(ctx, GL_TRUE); - ctx->Fog.Mode = fp->mesa_program.FogOption; - r300Fogfv(ctx, GL_FOG_MODE, NULL); - } else - /* Make sure HW is matching GL context. */ - r300SetFogState(ctx, ctx->Fog.Enabled); - r300SetupTextures(ctx); R300_STATECHANGE(rmesa, fp); @@ -2683,12 +2537,18 @@ void r300UpdateShaderStates(r300ContextPtr rmesa) r300UpdateTextureState(ctx); r300SetEarlyZState(ctx); - GLuint fgdepthsrc = R300_FG_DEPTH_SRC_SCAN; - if (current_fragment_program_writes_depth(ctx)) - fgdepthsrc = R300_FG_DEPTH_SRC_SHADER; - if (fgdepthsrc != rmesa->hw.fg_depth_src.cmd[1]) { - R300_STATECHANGE(rmesa, fg_depth_src); - rmesa->hw.fg_depth_src.cmd[1] = fgdepthsrc; + /* w_fmt value is set to get best performance + * see p.130 R5xx 3D acceleration guide v1.3 */ + GLuint w_fmt; + if (current_fragment_program_writes_depth(ctx)) { + w_fmt = R300_W_FMT_W24 | R300_W_SRC_US; + } else { + w_fmt = R300_W_FMT_W0 | R300_W_SRC_US; + } + + if (w_fmt != rmesa->hw.us_out_fmt.cmd[5]) { + R300_STATECHANGE(rmesa, us_out_fmt); + rmesa->hw.us_out_fmt.cmd[5] = w_fmt; } if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) @@ -2806,7 +2666,6 @@ void r300InitStateFuncs(struct dd_function_table *functions) functions->DepthFunc = r300DepthFunc; functions->DepthMask = r300DepthMask; functions->CullFace = r300CullFace; - functions->Fogfv = r300Fogfv; functions->FrontFace = r300FrontFace; functions->ShadeModel = r300ShadeModel; functions->LogicOpcode = r300LogicOpcode; -- cgit v1.2.3 From 99e4809f5d2126db36ec652e07bc8e77f1383a84 Mon Sep 17 00:00:00 2001 From: Maciej Cencora Date: Tue, 17 Feb 2009 13:30:33 +0100 Subject: r300: fix depth write regression (found by Nicolai Haehnle) Signed-off-by: Nicolai Haehnle --- src/mesa/drivers/dri/r300/r300_state.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'src/mesa/drivers/dri/r300/r300_state.c') diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 8361afafef..8095538ff9 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -2234,7 +2234,7 @@ static void r300ResetHwState(r300ContextPtr r300) /* disable fog unit */ r300->hw.fogs.cmd[R300_FOGS_STATE] = 0; - r300->hw.fg_depth_src.cmd[1] = R300_FG_DEPTH_SRC_SHADER; + r300->hw.fg_depth_src.cmd[1] = R300_FG_DEPTH_SRC_SCAN; r300->hw.rb3d_cctl.cmd[1] = 0; @@ -2539,18 +2539,25 @@ void r300UpdateShaderStates(r300ContextPtr rmesa) /* w_fmt value is set to get best performance * see p.130 R5xx 3D acceleration guide v1.3 */ - GLuint w_fmt; + GLuint w_fmt, fgdepthsrc; if (current_fragment_program_writes_depth(ctx)) { + fgdepthsrc = R300_FG_DEPTH_SRC_SHADER; w_fmt = R300_W_FMT_W24 | R300_W_SRC_US; } else { + fgdepthsrc = R300_FG_DEPTH_SRC_SCAN; w_fmt = R300_W_FMT_W0 | R300_W_SRC_US; } - + if (w_fmt != rmesa->hw.us_out_fmt.cmd[5]) { R300_STATECHANGE(rmesa, us_out_fmt); rmesa->hw.us_out_fmt.cmd[5] = w_fmt; } + if (fgdepthsrc != rmesa->hw.fg_depth_src.cmd[1]) { + R300_STATECHANGE(rmesa, fg_depth_src); + rmesa->hw.fg_depth_src.cmd[1] = fgdepthsrc; + } + if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) r500SetupPixelShader(rmesa); else -- cgit v1.2.3