From 8520b15018ca10e2bc47c1db4f7378df6d3c2e99 Mon Sep 17 00:00:00 2001 From: Nicolai Haehnle Date: Sat, 14 Feb 2009 17:06:06 +0100 Subject: r300: Redirect constant TEX coordinates R3xx/R5xx fragment program texture constants must come from a hardware register instead of the constant file, so we redirect if necessary during the native rewrite phase. The symptoms of this bug started appearing when the Mesa fixed function texenvprogram code started using STATE_CURRENT_ATTRIB constants for texture coordinates when the corresponding attributes were constant across all vertices. Signed-off-by: Nicolai Haehnle --- src/mesa/drivers/dri/r300/r500_fragprog.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'src/mesa/drivers/dri/r300/r500_fragprog.c') diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.c b/src/mesa/drivers/dri/r300/r500_fragprog.c index 75dae86fa8..926ddd5964 100644 --- a/src/mesa/drivers/dri/r300/r500_fragprog.c +++ b/src/mesa/drivers/dri/r300/r500_fragprog.c @@ -31,6 +31,12 @@ #include "radeon_program_alu.h" +static void reset_srcreg(struct prog_src_register* reg) +{ + _mesa_bzero(reg, sizeof(*reg)); + reg->Swizzle = SWIZZLE_NOOP; +} + static struct prog_src_register shadow_ambient(struct gl_program *program, int tmu) { gl_state_index fail_value_tokens[STATE_LENGTH] = { @@ -99,6 +105,19 @@ static GLboolean transform_TEX( destredirect = GL_TRUE; } + if (inst.SrcReg[0].File != PROGRAM_TEMPORARY && inst.SrcReg[0].File != PROGRAM_INPUT) { + int tmpreg = radeonFindFreeTemporary(t); + tgt = radeonAppendInstructions(t->Program, 1); + tgt->Opcode = OPCODE_MOV; + tgt->DstReg.File = PROGRAM_TEMPORARY; + tgt->DstReg.Index = tmpreg; + tgt->SrcReg[0] = inst.SrcReg[0]; + + reset_srcreg(&inst.SrcReg[0]); + inst.SrcReg[0].File = PROGRAM_TEMPORARY; + inst.SrcReg[0].Index = tmpreg; + } + tgt = radeonAppendInstructions(t->Program, 1); _mesa_copy_instructions(tgt, &inst, 1); -- cgit v1.2.3