From 3023328ea721d2b87112e37e119345a9662d7e5e Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 20 Aug 2009 10:56:35 -0400 Subject: r300: add support for getting Z pipe info from drm Needed for occulsion queries on rv530 chips Signed-off-by: Alex Deucher --- src/mesa/drivers/dri/r300/r300_context.c | 24 +++++++++--------------- src/mesa/drivers/dri/r300/r300_context.h | 1 - 2 files changed, 9 insertions(+), 16 deletions(-) (limited to 'src/mesa/drivers/dri/r300') diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index 5b5c064aca..c4b5afa23e 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -241,8 +241,8 @@ static void r300_emit_query_finish(radeonContextPtr radeon) struct radeon_query_object *query = radeon->query.current; BATCH_LOCALS(radeon); - BEGIN_BATCH_NO_AUTOSTATE(3 * 2 *r300->num_z_pipes + 2); - switch (r300->num_z_pipes) { + BEGIN_BATCH_NO_AUTOSTATE(3 * 2 *r300->radeon.radeonScreen->num_gb_pipes + 2); + switch (r300->radeon.radeonScreen->num_gb_pipes) { case 4: OUT_BATCH_REGVAL(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_3); OUT_BATCH_REGSEQ(R300_ZB_ZPASS_ADDR, 1); @@ -268,7 +268,7 @@ static void r300_emit_query_finish(radeonContextPtr radeon) } OUT_BATCH_REGVAL(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL); END_BATCH(); - query->curr_offset += r300->num_z_pipes * sizeof(uint32_t); + query->curr_offset += r300->radeon.radeonScreen->num_gb_pipes * sizeof(uint32_t); assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE); query->emitted_begin = GL_FALSE; } @@ -290,10 +290,8 @@ static void rv530_emit_query_finish_single_z(radeonContextPtr radeon) query->emitted_begin = GL_FALSE; } -#if 0 static void rv530_emit_query_finish_double_z(radeonContextPtr radeon) { - r300ContextPtr r300 = (r300ContextPtr)radeon; BATCH_LOCALS(radeon); struct radeon_query_object *query = radeon->query.current; @@ -311,7 +309,6 @@ static void rv530_emit_query_finish_double_z(radeonContextPtr radeon) assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE); query->emitted_begin = GL_FALSE; } -#endif static void r300_init_vtbl(radeonContextPtr radeon) { @@ -321,11 +318,12 @@ static void r300_init_vtbl(radeonContextPtr radeon) radeon->vtbl.swtcl_flush = r300_swtcl_flush; radeon->vtbl.pre_emit_atoms = r300_vtbl_pre_emit_atoms; radeon->vtbl.fallback = r300_fallback; - if (radeon->radeonScreen->chip_family == CHIP_FAMILY_RV530) - /* single Z gives me correct results on my hw need to check if we ever need - * double z */ - radeon->vtbl.emit_query_finish = rv530_emit_query_finish_single_z; - else + if (radeon->radeonScreen->chip_family == CHIP_FAMILY_RV530) { + if (radeon->radeonScreen->num_z_pipes == 2) + radeon->vtbl.emit_query_finish = rv530_emit_query_finish_double_z; + else + radeon->vtbl.emit_query_finish = rv530_emit_query_finish_single_z; + } else radeon->vtbl.emit_query_finish = r300_emit_query_finish; } @@ -399,10 +397,6 @@ static void r300InitConstValues(GLcontext *ctx, radeonScreenPtr screen) ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; } - if (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530) - r300->num_z_pipes = 2; - else - r300->num_z_pipes = r300->radeon.radeonScreen->num_gb_pipes; } static void r300ParseOptions(r300ContextPtr r300, radeonScreenPtr screen) diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h index 339b304558..a8fe508c4a 100644 --- a/src/mesa/drivers/dri/r300/r300_context.h +++ b/src/mesa/drivers/dri/r300/r300_context.h @@ -529,7 +529,6 @@ struct r300_context { uint32_t fallback; DECLARE_RENDERINPUTS(render_inputs_bitset); - int num_z_pipes; }; #define R300_CONTEXT(ctx) ((r300ContextPtr)(ctx->DriverCtx)) -- cgit v1.2.3 From ff235c8ccbca77c6591aa327f1e0530584a1629e Mon Sep 17 00:00:00 2001 From: Maciej Cencora Date: Tue, 25 Aug 2009 01:26:28 +0200 Subject: r300: set proper CS section size --- src/mesa/drivers/dri/r300/r300_context.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/r300') diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index c4b5afa23e..d457ac1d6c 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -295,7 +295,7 @@ static void rv530_emit_query_finish_double_z(radeonContextPtr radeon) BATCH_LOCALS(radeon); struct radeon_query_object *query = radeon->query.current; - BEGIN_BATCH_NO_AUTOSTATE(6); + BEGIN_BATCH_NO_AUTOSTATE(14); OUT_BATCH_REGVAL(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0); OUT_BATCH_REGSEQ(R300_ZB_ZPASS_ADDR, 1); OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0); -- cgit v1.2.3 From 1d5a06a1f7812c055db1d724e40d21a0e3686dd1 Mon Sep 17 00:00:00 2001 From: Maciej Cencora Date: Tue, 25 Aug 2009 01:27:40 +0200 Subject: r300: fix condition logic The s3tc extensions are properly enabled now, when force_s3tc_enable option is set in driconf. --- src/mesa/drivers/dri/r300/r300_context.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/r300') diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index d457ac1d6c..f701c434a4 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -433,7 +433,7 @@ static void r300InitGLExtensions(GLcontext *ctx) if (r300->options.stencil_two_side_disabled) _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side"); - if (ctx->Mesa_DXTn && !r300->options.s3tc_force_enabled) { + if (r300->options.s3tc_force_enabled) { _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc"); _mesa_enable_extension(ctx, "GL_S3_s3tc"); } else if (r300->options.s3tc_force_disabled) { -- cgit v1.2.3