From 8446f257b3e3ca4a3eb2c79bc357e46343e04e87 Mon Sep 17 00:00:00 2001 From: Mario Kleiner Date: Sun, 25 Jul 2010 16:29:24 +0200 Subject: radeon: Add DRI2 flush extension to so we synchronize properly. When DRI2 swap buffer is pending (copy buffer not pageflipping) we need to make sure we have the flush extension so radeon doesn't resume rendering on the not yet blitted front buffer. Modified version of Jerome's patch to add flush extension in the correct place. This prepares a possible fix for: https://bugs.freedesktop.org/show_bug.cgi?id=28341 https://bugs.freedesktop.org/show_bug.cgi?id=28410 Signed-off-by: Jerome Glisse Signed-off-by: Mario Kleiner --- src/mesa/drivers/dri/r600/r700_clear.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mesa/drivers/dri/r600/r700_clear.c') diff --git a/src/mesa/drivers/dri/r600/r700_clear.c b/src/mesa/drivers/dri/r600/r700_clear.c index 09c48565b6..d1008f28b9 100644 --- a/src/mesa/drivers/dri/r600/r700_clear.c +++ b/src/mesa/drivers/dri/r600/r700_clear.c @@ -48,6 +48,7 @@ static GLboolean r700ClearFast(context_t *context, GLbitfield mask) void r700Clear(GLcontext * ctx, GLbitfield mask) { context_t *context = R700_CONTEXT(ctx); + radeonContextPtr radeon = &context->radeon; __DRIdrawable *dPriv = radeon_get_drawable(&context->radeon); const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask[0]); GLbitfield swrast_mask = 0, tri_mask = 0; @@ -60,6 +61,8 @@ void r700Clear(GLcontext * ctx, GLbitfield mask) context->radeon.front_buffer_dirty = GL_TRUE; } + radeon_prepare_render(radeon); + if( GL_TRUE == r700ClearFast(context, mask) ) { return; -- cgit v1.2.3