From 6f63698d2678790bef4d4b84d52c9a15cdb2de1c Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Thu, 16 Jul 2009 17:35:44 -0400
Subject: R6xx: fix rendering on r6xx/rs780 chips
You always need to emit a fetch shader (fs) even if you
aren't using it. For now, just emit the fs with the
vs address to make the kernel happy.
---
src/mesa/drivers/dri/r600/r700_chip.c | 41 +++++++++++++++++++++++++++++++++
src/mesa/drivers/dri/r600/r700_chip.h | 2 +-
src/mesa/drivers/dri/r600/r700_render.c | 1 +
3 files changed, 43 insertions(+), 1 deletion(-)
(limited to 'src/mesa/drivers/dri/r600')
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index b944f5466e..a0506fc124 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -638,6 +638,47 @@ GLboolean r700SendVSState(context_t *context)
return GL_TRUE;
}
+GLboolean r700SendFSState(context_t *context)
+{
+ R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context);
+ struct radeon_renderbuffer *rrb;
+ struct radeon_bo * pbo;
+ offset_modifiers offset_mod;
+ BATCH_LOCALS(&context->radeon);
+
+ /* XXX fixme
+ * R6xx chips require a FS be emitted, even if it's not used.
+ * since we aren't using FS yet, just send the VS address to make
+ * the kernel command checker happy
+ */
+ pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(GL_CONTEXT(context));
+ r700->fs.SQ_PGM_START_FS.u32All = r700->vs.SQ_PGM_START_VS.u32All;
+ r700->fs.SQ_PGM_RESOURCES_FS.u32All = 0;
+ r700->fs.SQ_PGM_CF_OFFSET_FS.u32All = 0;
+ /* XXX */
+
+ offset_mod.shift = NO_SHIFT;
+ offset_mod.shiftbits = 0;
+ offset_mod.mask = 0xFFFFFFFF;
+
+ BEGIN_BATCH_NO_AUTOSTATE(3);
+ R600_OUT_BATCH_REGSEQ(SQ_PGM_START_FS, 1);
+ R600_OUT_BATCH_RELOC(r700->fs.SQ_PGM_START_FS.u32All,
+ pbo,
+ r700->fs.SQ_PGM_START_FS.u32All,
+ RADEON_GEM_DOMAIN_GTT, 0, 0, &offset_mod);
+ END_BATCH();
+
+ BEGIN_BATCH_NO_AUTOSTATE(6);
+ R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_FS, r700->fs.SQ_PGM_RESOURCES_FS.u32All);
+ R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_FS, r700->fs.SQ_PGM_CF_OFFSET_FS.u32All);
+ END_BATCH();
+
+ COMMIT_BATCH();
+
+ return GL_TRUE;
+}
+
GLboolean r700SendViewportState(context_t *context, int id)
{
R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context);
diff --git a/src/mesa/drivers/dri/r600/r700_chip.h b/src/mesa/drivers/dri/r600/r700_chip.h
index 691e9dd741..f27d3c055f 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.h
+++ b/src/mesa/drivers/dri/r600/r700_chip.h
@@ -491,7 +491,7 @@ typedef struct _R700_CHIP_CONTEXT
VS_STATE_STRUCT vs;
GS_STATE_STRUCT gs;
ES_STATE_STRUCT es;
- PS_STATE_STRUCT fs;
+ FS_STATE_STRUCT fs;
// SQ CONFIG
SQ_CONFIG_STRUCT sq_config;
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 9b9d35412e..8c82f2aa5a 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -311,6 +311,7 @@ static GLboolean r700RunRender(GLcontext * ctx,
r700SetupShaders(ctx);
+ r700SendFSState(context); // FIXME just a place holder for now
r700SendPSState(context);
r700SendVSState(context);
--
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