From 23d3559bd4ece1fcab5513ebdaa38600d6654374 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 12 Feb 2009 22:38:10 +1000 Subject: radeon: renaming and headers cleanup --- src/mesa/drivers/dri/radeon/radeon_common.h | 56 +++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 src/mesa/drivers/dri/radeon/radeon_common.h (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h new file mode 100644 index 0000000000..cc9d579ea1 --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -0,0 +1,56 @@ +#ifndef COMMON_MISC_H +#define COMMON_MISC_H + +#include "radeon_common_context.h" +#include "radeon_buffer.h" +#include "radeon_dma.h" +#include "radeon_texture.h" + +void radeonRecalcScissorRects(radeonContextPtr radeon); +void radeonSetCliprects(radeonContextPtr radeon); +void radeonUpdateScissor( GLcontext *ctx ); +void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h); + +void radeonWaitForIdleLocked(radeonContextPtr radeon); +extern uint32_t radeonGetAge(radeonContextPtr radeon); +void radeonCopyBuffer( __DRIdrawablePrivate *dPriv, + const drm_clip_rect_t *rect); +void radeonPageFlip( __DRIdrawablePrivate *dPriv ); +void radeonSwapBuffers(__DRIdrawablePrivate * dPriv); +void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv, + int x, int y, int w, int h ); + +void radeonUpdatePageFlipping(radeonContextPtr rmesa); + +void radeonFlush(GLcontext *ctx); +void radeonFinish(GLcontext * ctx); +void radeonEmitState(radeonContextPtr radeon); + +static inline struct radeon_renderbuffer *radeon_get_depthbuffer(radeonContextPtr rmesa) +{ + struct radeon_renderbuffer *rrb; + rrb = rmesa->state.depth.rrb; + if (!rrb) + return NULL; + + return rrb; +} + +static inline struct radeon_renderbuffer *radeon_get_colorbuffer(radeonContextPtr rmesa) +{ + struct radeon_renderbuffer *rrb; + GLframebuffer *fb = rmesa->dri.drawable->driverPrivate; + + rrb = rmesa->state.color.rrb; + if (rmesa->radeonScreen->driScreen->dri2.enabled) { + rrb = (struct radeon_renderbuffer *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + } + if (!rrb) + return NULL; + return rrb; +} + +#include "radeon_cmdbuf.h" + + +#endif -- cgit v1.2.3 From dc8a707c672918b88dd4135930bef60ed148d8ce Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 12 Feb 2009 23:52:51 +1000 Subject: radeon/r200/r300: make build with out libdrm_radeon installed for now --- src/mesa/drivers/dri/r200/Makefile | 2 +- src/mesa/drivers/dri/r200/r200_ioctl.h | 2 +- src/mesa/drivers/dri/r200/r200_state.c | 3 +- src/mesa/drivers/dri/r200/r200_swtcl.c | 1 - src/mesa/drivers/dri/r300/Makefile | 2 +- src/mesa/drivers/dri/r300/r300_cmdbuf.c | 4 +- src/mesa/drivers/dri/r300/r300_cmdbuf.h | 1 - src/mesa/drivers/dri/r300/r300_context.c | 2 +- src/mesa/drivers/dri/r300/r300_context.h | 1 - src/mesa/drivers/dri/r300/r300_state.c | 1 - src/mesa/drivers/dri/r300/r300_texstate.c | 2 - src/mesa/drivers/dri/radeon/radeon_bo_drm.h | 179 +++++++++++++++++++ src/mesa/drivers/dri/radeon/radeon_bo_legacy.c | 4 +- src/mesa/drivers/dri/radeon/radeon_bo_legacy.h | 1 - src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h | 35 ++++ src/mesa/drivers/dri/radeon/radeon_buffer.h | 49 ----- src/mesa/drivers/dri/radeon/radeon_cmdbuf.h | 2 +- src/mesa/drivers/dri/radeon/radeon_common.c | 8 +- src/mesa/drivers/dri/radeon/radeon_common.h | 1 - .../drivers/dri/radeon/radeon_common_context.h | 16 ++ src/mesa/drivers/dri/radeon/radeon_cs_drm.h | 198 +++++++++++++++++++++ src/mesa/drivers/dri/radeon/radeon_cs_legacy.c | 5 +- src/mesa/drivers/dri/radeon/radeon_cs_legacy.h | 1 - src/mesa/drivers/dri/radeon/radeon_ioctl.c | 1 - src/mesa/drivers/dri/radeon/radeon_ioctl.h | 2 +- src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 2 - src/mesa/drivers/dri/radeon/radeon_screen.c | 5 +- src/mesa/drivers/dri/radeon/radeon_screen.h | 1 - src/mesa/drivers/dri/radeon/radeon_span.c | 2 - src/mesa/drivers/dri/radeon/radeon_span.h | 2 - src/mesa/drivers/dri/radeon/radeon_state_init.c | 1 - 31 files changed, 442 insertions(+), 94 deletions(-) create mode 100644 src/mesa/drivers/dri/radeon/radeon_bo_drm.h create mode 100644 src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h delete mode 100644 src/mesa/drivers/dri/radeon/radeon_buffer.h create mode 100644 src/mesa/drivers/dri/radeon/radeon_cs_drm.h (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile index 4f626c0584..7b5fe95577 100644 --- a/src/mesa/drivers/dri/r200/Makefile +++ b/src/mesa/drivers/dri/r200/Makefile @@ -62,9 +62,9 @@ COMMON_SYMLINKS = \ radeon_cs_legacy.c \ radeon_bo_legacy.h \ radeon_cs_legacy.h \ + radeon_bocs_wrapper.h \ radeon_span.h \ radeon_span.c \ - radeon_buffer.h \ radeon_lock.c \ radeon_lock.h \ radeon_common.c \ diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.h b/src/mesa/drivers/dri/r200/r200_ioctl.h index 777fdc38a5..950478e762 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.h +++ b/src/mesa/drivers/dri/r200/r200_ioctl.h @@ -38,7 +38,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "main/simple_list.h" #include "radeon_dri.h" -#include "radeon_cs_legacy.h" +#include "radeon_bocs_wrapper.h" #include "xf86drm.h" #include "drm.h" diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 84b0d90c69..559985bc3f 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -47,8 +47,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "tnl/t_pipeline.h" #include "swrast_setup/swrast_setup.h" -#include "radeon_buffer.h" -#include "radeon_cs.h" +#include "radeon_common.h" #include "radeon_mipmap_tree.h" #include "r200_context.h" #include "r200_ioctl.h" diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c index df786561e1..b006409987 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.c +++ b/src/mesa/drivers/dri/r200/r200_swtcl.c @@ -48,7 +48,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "tnl/t_context.h" #include "tnl/t_pipeline.h" -#include "radeon_bo.h" #include "r200_context.h" #include "r200_ioctl.h" #include "r200_state.h" diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile index e9264ce77a..20ee195fe7 100644 --- a/src/mesa/drivers/dri/r300/Makefile +++ b/src/mesa/drivers/dri/r300/Makefile @@ -75,11 +75,11 @@ COMMON_SYMLINKS = \ radeon_screen.h \ radeon_span.h \ radeon_span.c \ - radeon_buffer.h \ radeon_bo_legacy.c \ radeon_cs_legacy.c \ radeon_bo_legacy.h \ radeon_cs_legacy.h \ + radeon_bocs_wrapper.h \ radeon_lock.c \ radeon_lock.h \ radeon_common.c \ diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c index d6acb39d9f..29b2c2eb25 100644 --- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c +++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c @@ -44,17 +44,15 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "drm.h" #include "radeon_drm.h" -#include "radeon_buffer.h" #include "r300_context.h" #include "r300_ioctl.h" #include "radeon_reg.h" #include "r300_reg.h" #include "r300_cmdbuf.h" #include "r300_emit.h" +#include "radeon_bocs_wrapper.h" #include "radeon_mipmap_tree.h" #include "r300_state.h" -#include "radeon_cs_legacy.h" -#include "radeon_cs_gem.h" #include "radeon_reg.h" #define R300_VAP_PVS_UPLOAD_ADDRESS 0x2200 diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.h b/src/mesa/drivers/dri/r300/r300_cmdbuf.h index ab5d50f58e..b7798eb97b 100644 --- a/src/mesa/drivers/dri/r300/r300_cmdbuf.h +++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.h @@ -37,7 +37,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define __R300_CMDBUF_H__ #include "r300_context.h" -#include "radeon_cs.h" extern void r300InitCmdBuf(r300ContextPtr r300); extern void r300DestroyCmdBuf(r300ContextPtr r300); diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index e4dc37debc..449252a930 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -63,7 +63,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_tex.h" #include "r300_emit.h" #include "r300_swtcl.h" -#include "radeon_bo_legacy.h" +#include "radeon_bocs_wrapper.h" #include "vblank.h" diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h index 0be3657249..6d3472722d 100644 --- a/src/mesa/drivers/dri/r300/r300_context.h +++ b/src/mesa/drivers/dri/r300/r300_context.h @@ -43,7 +43,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "dri_util.h" #include "texmem.h" #include "radeon_common.h" -#include "radeon_bo.h" #include "main/macros.h" #include "main/mtypes.h" diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 4258a61000..fe58ac00a8 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -53,7 +53,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "vbo/vbo.h" #include "tnl/tnl.h" -#include "radeon_buffer.h" #include "r300_context.h" #include "r300_ioctl.h" #include "r300_state.h" diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c index 50ecc570bd..e5afff0d61 100644 --- a/src/mesa/drivers/dri/r300/r300_texstate.c +++ b/src/mesa/drivers/dri/r300/r300_texstate.c @@ -48,10 +48,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_state.h" #include "r300_ioctl.h" #include "radeon_mipmap_tree.h" -#include "radeon_cs.h" #include "r300_tex.h" #include "r300_reg.h" -#include "radeon_buffer.h" #define VALID_FORMAT(f) ( ((f) <= MESA_FORMAT_RGBA_DXT5 \ || ((f) >= MESA_FORMAT_RGBA_FLOAT32 && \ diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_drm.h b/src/mesa/drivers/dri/radeon/radeon_bo_drm.h new file mode 100644 index 0000000000..3cabdfc4e8 --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_bo_drm.h @@ -0,0 +1,179 @@ +/* + * Copyright © 2008 Jérôme Glisse + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ +/* + * Authors: + * Jérôme Glisse + */ +#ifndef RADEON_BO_H +#define RADEON_BO_H + +#include +#include +#include "radeon_track.h" + +/* bo object */ +#define RADEON_BO_FLAGS_MACRO_TILE 1 +#define RADEON_BO_FLAGS_MICRO_TILE 2 + +struct radeon_bo_manager; + +struct radeon_bo { + uint32_t alignment; + uint32_t handle; + uint32_t size; + uint32_t domains; + uint32_t flags; + unsigned cref; +#ifdef RADEON_BO_TRACK + struct radeon_track *track; +#endif + void *ptr; + struct radeon_bo_manager *bom; + uint32_t space_accounted; +}; + +/* bo functions */ +struct radeon_bo_funcs { + struct radeon_bo *(*bo_open)(struct radeon_bo_manager *bom, + uint32_t handle, + uint32_t size, + uint32_t alignment, + uint32_t domains, + uint32_t flags); + void (*bo_ref)(struct radeon_bo *bo); + struct radeon_bo *(*bo_unref)(struct radeon_bo *bo); + int (*bo_map)(struct radeon_bo *bo, int write); + int (*bo_unmap)(struct radeon_bo *bo); + int (*bo_wait)(struct radeon_bo *bo); +}; + +struct radeon_bo_manager { + struct radeon_bo_funcs *funcs; + int fd; + struct radeon_tracker tracker; +}; + +static inline void _radeon_bo_debug(struct radeon_bo *bo, + const char *op, + const char *file, + const char *func, + int line) +{ + fprintf(stderr, "%s %p 0x%08X 0x%08X 0x%08X [%s %s %d]\n", + op, bo, bo->handle, bo->size, bo->cref, file, func, line); +} + +static inline struct radeon_bo *_radeon_bo_open(struct radeon_bo_manager *bom, + uint32_t handle, + uint32_t size, + uint32_t alignment, + uint32_t domains, + uint32_t flags, + const char *file, + const char *func, + int line) +{ + struct radeon_bo *bo; + + bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags); +#ifdef RADEON_BO_TRACK + if (bo) { + bo->track = radeon_tracker_add_track(&bom->tracker, bo->handle); + radeon_track_add_event(bo->track, file, func, "open", line); + } +#endif + return bo; +} + +static inline void _radeon_bo_ref(struct radeon_bo *bo, + const char *file, + const char *func, + int line) +{ + bo->cref++; +#ifdef RADEON_BO_TRACK + radeon_track_add_event(bo->track, file, func, "ref", line); +#endif + bo->bom->funcs->bo_ref(bo); +} + +static inline struct radeon_bo *_radeon_bo_unref(struct radeon_bo *bo, + const char *file, + const char *func, + int line) +{ + bo->cref--; +#ifdef RADEON_BO_TRACK + radeon_track_add_event(bo->track, file, func, "unref", line); + if (bo->cref <= 0) { + radeon_tracker_remove_track(&bo->bom->tracker, bo->track); + bo->track = NULL; + } +#endif + return bo->bom->funcs->bo_unref(bo); +} + +static inline int _radeon_bo_map(struct radeon_bo *bo, + int write, + const char *file, + const char *func, + int line) +{ + return bo->bom->funcs->bo_map(bo, write); +} + +static inline int _radeon_bo_unmap(struct radeon_bo *bo, + const char *file, + const char *func, + int line) +{ + return bo->bom->funcs->bo_unmap(bo); +} + +static inline int _radeon_bo_wait(struct radeon_bo *bo, + const char *file, + const char *func, + int line) +{ + return bo->bom->funcs->bo_wait(bo); +} + +#define radeon_bo_open(bom, h, s, a, d, f)\ + _radeon_bo_open(bom, h, s, a, d, f, __FILE__, __FUNCTION__, __LINE__) +#define radeon_bo_ref(bo)\ + _radeon_bo_ref(bo, __FILE__, __FUNCTION__, __LINE__) +#define radeon_bo_unref(bo)\ + _radeon_bo_unref(bo, __FILE__, __FUNCTION__, __LINE__) +#define radeon_bo_map(bo, w)\ + _radeon_bo_map(bo, w, __FILE__, __FUNCTION__, __LINE__) +#define radeon_bo_unmap(bo)\ + _radeon_bo_unmap(bo, __FILE__, __FUNCTION__, __LINE__) +#define radeon_bo_debug(bo, opcode)\ + _radeon_bo_debug(bo, opcode, __FILE__, __FUNCTION__, __LINE__) +#define radeon_bo_wait(bo) \ + _radeon_bo_wait(bo, __FILE__, __func__, __LINE__) + +#endif diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c index b7658353af..1d25887e69 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c +++ b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c @@ -45,9 +45,9 @@ #include "drm.h" #include "radeon_drm.h" -#include "radeon_bo.h" -#include "radeon_bo_legacy.h" #include "radeon_common.h" +#include "radeon_bocs_wrapper.h" + struct bo_legacy { struct radeon_bo base; diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.h b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.h index 575979cbec..9187cd7201 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.h +++ b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.h @@ -32,7 +32,6 @@ #ifndef RADEON_BO_LEGACY_H #define RADEON_BO_LEGACY_H -#include "radeon_bo.h" #include "radeon_screen.h" void radeon_bo_legacy_pending(struct radeon_bo *bo, uint32_t pending); diff --git a/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h b/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h new file mode 100644 index 0000000000..36dea3be7b --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h @@ -0,0 +1,35 @@ +#ifndef RADEON_CS_WRAPPER_H +#define RADEON_CS_WRAPPER_H + +#ifdef HAVE_LIBDRM_RADEON + +#include "radeon_bo.h" +#include "radeon_bo_gem.h" +#include "radeon_cs.h" +#include "radeon_cs_gem.h" + +#else +/* to be used to build locally in mesa with no libdrm bits */ +#include "../radeon/radeon_bo_drm.h" +#include "../radeon/radeon_cs_drm.h" + +#define RADEON_GEM_DOMAIN_CPU 0x1 // Cached CPU domain +#define RADEON_GEM_DOMAIN_GTT 0x2 // GTT or cache flushed +#define RADEON_GEM_DOMAIN_VRAM 0x4 // VRAM domain + +static inline void *radeon_bo_manager_gem_ctor(int fd) +{ + return NULL; +} + +static inline void radeon_bo_manager_gem_dtor(void *dummy) +{ +} + + +#endif + +#include "radeon_bo_legacy.h" +#include "radeon_cs_legacy.h" + +#endif diff --git a/src/mesa/drivers/dri/radeon/radeon_buffer.h b/src/mesa/drivers/dri/radeon/radeon_buffer.h deleted file mode 100644 index 62cdfad4a0..0000000000 --- a/src/mesa/drivers/dri/radeon/radeon_buffer.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright 2008 Red Hat, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software") - * to deal in the software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * them Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTIBILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES, OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT, OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Adam Jackson - */ - -#ifndef RADEON_BUFFER_H -#define RADEON_BUFFER_H - -#include "radeon_bo.h" -#include "dri_util.h" - -struct radeon_renderbuffer -{ - struct gl_renderbuffer base; - struct radeon_bo *bo; - unsigned int cpp; - /* unsigned int offset; */ - unsigned int pitch; - unsigned int width; - unsigned int height; - - /* boo Xorg 6.8.2 compat */ - int has_surface; - - - __DRIdrawablePrivate *dPriv; -}; - -#endif diff --git a/src/mesa/drivers/dri/radeon/radeon_cmdbuf.h b/src/mesa/drivers/dri/radeon/radeon_cmdbuf.h index 5526934209..4b5116c474 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cmdbuf.h +++ b/src/mesa/drivers/dri/radeon/radeon_cmdbuf.h @@ -1,7 +1,7 @@ #ifndef COMMON_CMDBUF_H #define COMMON_CMDBUF_H -#include "radeon_cs.h" +#include "radeon_bocs_wrapper.h" void rcommonEnsureCmdBufSpace(radeonContextPtr rmesa, int dwords, const char *caller); int rcommonFlushCmdBuf(radeonContextPtr rmesa, const char *caller); diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 87b6dac40b..80e8e0d86d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -63,13 +63,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "vblank.h" #include "radeon_common.h" -#include "radeon_common.h" -#include "radeon_bo.h" -#include "radeon_cs.h" -#include "radeon_bo_legacy.h" -#include "radeon_cs_legacy.h" -#include "radeon_bo_gem.h" -#include "radeon_cs_gem.h" +#include "radeon_bocs_wrapper.h" #include "radeon_drm.h" #include "radeon_mipmap_tree.h" diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index cc9d579ea1..ead0f5551b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -2,7 +2,6 @@ #define COMMON_MISC_H #include "radeon_common_context.h" -#include "radeon_buffer.h" #include "radeon_dma.h" #include "radeon_texture.h" diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index b88aeab051..c9be104578 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -68,6 +68,22 @@ typedef struct radeon_context *radeonContextPtr; #include "tnl_dd/t_dd_vertex.h" #undef TAG +struct radeon_renderbuffer +{ + struct gl_renderbuffer base; + struct radeon_bo *bo; + unsigned int cpp; + /* unsigned int offset; */ + unsigned int pitch; + unsigned int width; + unsigned int height; + + /* boo Xorg 6.8.2 compat */ + int has_surface; + + __DRIdrawablePrivate *dPriv; +}; + struct radeon_colorbuffer_state { GLuint clear; int roundEnable; diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_drm.h b/src/mesa/drivers/dri/radeon/radeon_cs_drm.h new file mode 100644 index 0000000000..7cc75d4700 --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_cs_drm.h @@ -0,0 +1,198 @@ +/* + * Copyright © 2008 Nicolai Haehnle + * Copyright © 2008 Jérôme Glisse + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ +/* + * Authors: + * Aapo Tahkola + * Nicolai Haehnle + * Jérôme Glisse + */ +#ifndef RADEON_CS_H +#define RADEON_CS_H + +#include +#include "drm.h" +#include "radeon_drm.h" +#include "radeon_bo.h" + +struct radeon_cs_reloc { + struct radeon_bo *bo; + uint32_t read_domain; + uint32_t write_domain; + uint32_t flags; +}; + + +#define RADEON_CS_SPACE_OK 0 +#define RADEON_CS_SPACE_OP_TO_BIG 1 +#define RADEON_CS_SPACE_FLUSH 2 + +struct radeon_cs_space_check { + struct radeon_bo *bo; + uint32_t read_domains; + uint32_t write_domain; + uint32_t new_accounted; +}; + +struct radeon_cs_manager; + +struct radeon_cs { + struct radeon_cs_manager *csm; + void *relocs; + uint32_t *packets; + unsigned crelocs; + unsigned relocs_total_size; + unsigned cdw; + unsigned ndw; + int section; + unsigned section_ndw; + unsigned section_cdw; + const char *section_file; + const char *section_func; + int section_line; + +}; + +/* cs functions */ +struct radeon_cs_funcs { + struct radeon_cs *(*cs_create)(struct radeon_cs_manager *csm, + uint32_t ndw); + int (*cs_write_reloc)(struct radeon_cs *cs, + struct radeon_bo *bo, + uint32_t read_domain, + uint32_t write_domain, + uint32_t flags); + int (*cs_begin)(struct radeon_cs *cs, + uint32_t ndw, + const char *file, + const char *func, + int line); + int (*cs_end)(struct radeon_cs *cs, + const char *file, + const char *func, + int line); + int (*cs_emit)(struct radeon_cs *cs); + int (*cs_destroy)(struct radeon_cs *cs); + int (*cs_erase)(struct radeon_cs *cs); + int (*cs_need_flush)(struct radeon_cs *cs); + void (*cs_print)(struct radeon_cs *cs, FILE *file); + int (*cs_space_check)(struct radeon_cs *cs, struct radeon_cs_space_check *bos, + int num_bo); +}; + +struct radeon_cs_manager { + struct radeon_cs_funcs *funcs; + int fd; + uint32_t vram_limit, gart_limit; + uint32_t vram_write_used, gart_write_used; + uint32_t read_used; +}; + +static inline struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm, + uint32_t ndw) +{ + return csm->funcs->cs_create(csm, ndw); +} + +static inline int radeon_cs_write_reloc(struct radeon_cs *cs, + struct radeon_bo *bo, + uint32_t read_domain, + uint32_t write_domain, + uint32_t flags) +{ + return cs->csm->funcs->cs_write_reloc(cs, + bo, + read_domain, + write_domain, + flags); +} + +static inline int radeon_cs_begin(struct radeon_cs *cs, + uint32_t ndw, + const char *file, + const char *func, + int line) +{ + return cs->csm->funcs->cs_begin(cs, ndw, file, func, line); +} + +static inline int radeon_cs_end(struct radeon_cs *cs, + const char *file, + const char *func, + int line) +{ + return cs->csm->funcs->cs_end(cs, file, func, line); +} + +static inline int radeon_cs_emit(struct radeon_cs *cs) +{ + return cs->csm->funcs->cs_emit(cs); +} + +static inline int radeon_cs_destroy(struct radeon_cs *cs) +{ + return cs->csm->funcs->cs_destroy(cs); +} + +static inline int radeon_cs_erase(struct radeon_cs *cs) +{ + return cs->csm->funcs->cs_erase(cs); +} + +static inline int radeon_cs_need_flush(struct radeon_cs *cs) +{ + return cs->csm->funcs->cs_need_flush(cs); +} + +static inline void radeon_cs_print(struct radeon_cs *cs, FILE *file) +{ + cs->csm->funcs->cs_print(cs, file); +} + +static inline int radeon_cs_space_check(struct radeon_cs *cs, + struct radeon_cs_space_check *bos, + int num_bo) +{ + return cs->csm->funcs->cs_space_check(cs, bos, num_bo); +} + +static inline void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit) +{ + + if (domain == RADEON_GEM_DOMAIN_VRAM) + cs->csm->vram_limit = limit; + else + cs->csm->gart_limit = limit; +} + +static inline void radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword) +{ + cs->packets[cs->cdw++] = dword; + if (cs->section) { + cs->section_cdw++; + } +} + +#endif diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c index 2db3f7a68d..0f73dec1e5 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c +++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c @@ -31,10 +31,7 @@ */ #include -#include "radeon_cs.h" -#include "radeon_cs_legacy.h" -#include "radeon_bo_legacy.h" - +#include "radeon_bocs_wrapper.h" struct cs_manager_legacy { struct radeon_cs_manager base; diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h index 19d904174f..e177b4bafe 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h +++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h @@ -32,7 +32,6 @@ #ifndef RADEON_CS_LEGACY_H #define RADEON_CS_LEGACY_H -#include "radeon_cs.h" #include "radeon_common.h" struct radeon_cs_manager *radeon_cs_manager_legacy_ctor(struct radeon_context *ctx); diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c index 99b1ef332f..fb3a236d7c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c +++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c @@ -44,7 +44,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "radeon_context.h" #include "radeon_common.h" -#include "radeon_cs.h" #include "radeon_state.h" #include "radeon_ioctl.h" #include "radeon_tcl.h" diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.h b/src/mesa/drivers/dri/radeon/radeon_ioctl.h index 6d616bf804..18805d4c57 100644 --- a/src/mesa/drivers/dri/radeon/radeon_ioctl.h +++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.h @@ -38,7 +38,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "main/simple_list.h" #include "radeon_lock.h" -#include "radeon_cs_legacy.h" +#include "radeon_bocs_wrapper.h" extern void radeonEmitVertexAOS( r100ContextPtr rmesa, GLuint vertex_size, diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index 323726c574..c21d297b22 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -34,8 +34,6 @@ #include "main/texcompress.h" #include "main/texformat.h" -#include "radeon_buffer.h" - static GLuint radeon_compressed_texture_size(GLcontext *ctx, GLsizei width, GLsizei height, GLsizei depth, GLuint mesaFormat) diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 7f0d526ed2..e8cc3b25a8 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -46,7 +46,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "radeon_chipset.h" #include "radeon_macros.h" #include "radeon_screen.h" -#include "radeon_buffer.h" #include "radeon_common.h" #include "radeon_span.h" #if !RADEON_COMMON @@ -66,13 +65,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "vblank.h" #include "drirenderbuffer.h" +#include "radeon_bocs_wrapper.h" + #include "GL/internal/dri_interface.h" /* Radeon configuration */ #include "xmlpool.h" -#include "radeon_bo_legacy.h" -#include "radeon_bo_gem.h" #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \ DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \ diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h index 3287e125f4..1c0f5bb9bc 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.h +++ b/src/mesa/drivers/dri/radeon/radeon_screen.h @@ -46,7 +46,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "radeon_reg.h" #include "drm_sarea.h" #include "xmlconfig.h" -#include "radeon_bo.h" typedef struct { diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c index ebd18a1634..49ec2c378e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_span.c +++ b/src/mesa/drivers/dri/radeon/radeon_span.c @@ -47,8 +47,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "radeon_lock.h" #include "radeon_span.h" -#include "radeon_buffer.h" - #define DBG 0 static GLubyte *radeon_ptr32(const struct radeon_renderbuffer * rrb, diff --git a/src/mesa/drivers/dri/radeon/radeon_span.h b/src/mesa/drivers/dri/radeon/radeon_span.h index dda542c8d1..dd44ab517a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_span.h +++ b/src/mesa/drivers/dri/radeon/radeon_span.h @@ -42,8 +42,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #ifndef __RADEON_SPAN_H__ #define __RADEON_SPAN_H__ -#include "radeon_buffer.h" - extern void radeonInitSpanFuncs(GLcontext * ctx); extern void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb); diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c index a397c0824f..fc42318017 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state_init.c +++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c @@ -38,7 +38,6 @@ #include "swrast_setup/swrast_setup.h" #include "radeon_context.h" -#include "radeon_cs.h" #include "radeon_mipmap_tree.h" #include "radeon_ioctl.h" #include "radeon_state.h" -- cgit v1.2.3 From 2b85fccae5ba33748846f74f90fe0f72c673a4b1 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 3 Mar 2009 03:27:59 +1000 Subject: radeon: refactor framebuffer code like intel this is a step towards fbos and should fix pageflipping, but I think the first flip seems broken. --- src/mesa/drivers/dri/r200/r200_context.c | 2 +- src/mesa/drivers/dri/r200/r200_ioctl.c | 2 +- src/mesa/drivers/dri/r200/r200_state.c | 94 +---- src/mesa/drivers/dri/r300/r300_context.c | 39 +- src/mesa/drivers/dri/r300/r300_ioctl.c | 8 +- src/mesa/drivers/dri/r300/r300_render.c | 3 +- src/mesa/drivers/dri/r300/r300_state.c | 71 +--- src/mesa/drivers/dri/r300/r300_texstate.c | 10 +- src/mesa/drivers/dri/radeon/radeon_common.c | 470 ++++++++++++++++----- src/mesa/drivers/dri/radeon/radeon_common.h | 11 +- .../drivers/dri/radeon/radeon_common_context.c | 124 +++--- .../drivers/dri/radeon/radeon_common_context.h | 43 +- src/mesa/drivers/dri/radeon/radeon_context.c | 4 +- src/mesa/drivers/dri/radeon/radeon_lock.c | 78 ++-- src/mesa/drivers/dri/radeon/radeon_lock.h | 69 +-- src/mesa/drivers/dri/radeon/radeon_screen.c | 69 +-- src/mesa/drivers/dri/radeon/radeon_state.c | 80 +--- 17 files changed, 612 insertions(+), 565 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c index a744469b31..10a6362afd 100644 --- a/src/mesa/drivers/dri/r200/r200_context.c +++ b/src/mesa/drivers/dri/r200/r200_context.c @@ -261,9 +261,9 @@ static void r200_init_vtbl(radeonContextPtr radeon) { radeon->vtbl.get_lock = r200_get_lock; radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset; - radeon->vtbl.update_draw_buffer = r200UpdateDrawBuffer; radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header; radeon->vtbl.swtcl_flush = r200_swtcl_flush; + radeon->vtbl.fallback = r200Fallback; } diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c index c08968f7f8..6076b6d7ea 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.c +++ b/src/mesa/drivers/dri/r200/r200_ioctl.c @@ -203,7 +203,7 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask ) GLint ret; if ( R200_DEBUG & DEBUG_IOCTL ) { - fprintf( stderr, "r200Clear\n"); + fprintf( stderr, "r200Clear %x %d\n", mask, rmesa->radeon.sarea->pfCurrentPage); } { diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 126f78b39c..46baad33f5 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -1639,6 +1639,8 @@ static void r200Viewport( GLcontext *ctx, GLint x, GLint y, * values, or keep the originals hanging around. */ r200UpdateWindow( ctx ); + + radeon_viewport(ctx, x, y, width, height); } static void r200DepthRange( GLcontext *ctx, GLclampd nearval, @@ -1754,47 +1756,6 @@ static void r200LogicOpCode( GLcontext *ctx, GLenum opcode ) rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = r200_rop_tab[rop]; } - -static void r200DrawBuffer( GLcontext *ctx, GLenum mode ) -{ - r200ContextPtr rmesa = R200_CONTEXT(ctx); - - if (R200_DEBUG & DEBUG_DRI) - fprintf(stderr, "%s %s\n", __FUNCTION__, - _mesa_lookup_enum_by_nr( mode )); - - radeon_firevertices(&rmesa->radeon); /* don't pipeline cliprect changes */ - - if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) { - /* 0 (GL_NONE) buffers or multiple color drawing buffers */ - FALLBACK( rmesa, R200_FALLBACK_DRAW_BUFFER, GL_TRUE ); - return; - } - - switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) { - case BUFFER_FRONT_LEFT: - case BUFFER_BACK_LEFT: - FALLBACK( rmesa, R200_FALLBACK_DRAW_BUFFER, GL_FALSE ); - break; - default: - FALLBACK( rmesa, R200_FALLBACK_DRAW_BUFFER, GL_TRUE ); - return; - } - - radeonSetCliprects( &rmesa->radeon ); - radeonUpdatePageFlipping(&rmesa->radeon); - - /* We'll set the drawing engine's offset/pitch parameters later - * when we update other state. - */ -} - - -static void r200ReadBuffer( GLcontext *ctx, GLenum mode ) -{ - /* nothing, until we implement h/w glRead/CopyPixels or CopyTexImage */ -} - /* ============================================================= * State enable/disable */ @@ -2289,47 +2250,6 @@ static void update_texturematrix( GLcontext *ctx ) } } - - -/** - * Tell the card where to render (offset, pitch). - * Effected by glDrawBuffer, etc - */ -void -r200UpdateDrawBuffer(GLcontext *ctx) -{ - r200ContextPtr rmesa = R200_CONTEXT(ctx); - struct gl_framebuffer *fb = ctx->DrawBuffer; - struct radeon_renderbuffer *rrb; - - if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) { - /* draw to front */ - rrb = (void *) fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; - } else if (fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) { - /* draw to back */ - rrb = (void *) fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; - } else { - /* drawing to multiple buffers, or none */ - return; - } - - assert(rrb); - assert(rrb->pitch); - - R200_STATECHANGE( rmesa, ctx ); - -#if 0 - /* Note: we used the (possibly) page-flipped values */ - rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] - = ((rrb->flippedOffset + rmesa->radeon.radeonScreen->fbLocation) - & R200_COLOROFFSET_MASK); - rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = drb->flippedPitch; - if (rmesa->radeon.sarea->tiling_enabled) { - rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE; - } -#endif -} - static GLboolean r200ValidateBuffers(GLcontext *ctx) { r200ContextPtr rmesa = R200_CONTEXT(ctx); @@ -2395,7 +2315,11 @@ GLboolean r200ValidateState( GLcontext *ctx ) GLuint new_state = rmesa->radeon.NewGLState; if (new_state & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) { - r200UpdateDrawBuffer(ctx); + _mesa_update_framebuffer(ctx); + /* this updates the DrawBuffer's Width/Height if it's a FBO */ + _mesa_update_draw_buffer_bounds(ctx); + + R200_STATECHANGE(rmesa, ctx); } if (new_state & (_NEW_TEXTURE | _NEW_PROGRAM)) { @@ -2523,8 +2447,8 @@ void r200InitStateFuncs( struct dd_function_table *functions ) functions->UpdateState = r200InvalidateState; functions->LightingSpaceChange = r200LightingSpaceChange; - functions->DrawBuffer = r200DrawBuffer; - functions->ReadBuffer = r200ReadBuffer; + functions->DrawBuffer = radeonDrawBuffer; + functions->ReadBuffer = radeonReadBuffer; functions->AlphaFunc = r200AlphaFunc; functions->BlendColor = r200BlendColor; diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index 5d497efc9c..488fd44740 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -235,26 +235,35 @@ static void r300_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmes static void r300_vtbl_pre_emit_atoms(radeonContextPtr radeon) { - r300ContextPtr r300 = (r300ContextPtr)radeon; - BATCH_LOCALS(radeon); - - r300->vap_flush_needed = GL_TRUE; + r300ContextPtr r300 = (r300ContextPtr)radeon; + BATCH_LOCALS(radeon); + + r300->vap_flush_needed = GL_TRUE; + + cp_wait(radeon, R300_WAIT_3D | R300_WAIT_3D_CLEAN); + BEGIN_BATCH_NO_AUTOSTATE(2); + OUT_BATCH_REGVAL(R300_TX_INVALTAGS, R300_TX_FLUSH); + END_BATCH(); + end_3d(radeon); +} - cp_wait(radeon, R300_WAIT_3D | R300_WAIT_3D_CLEAN); - BEGIN_BATCH_NO_AUTOSTATE(2); - OUT_BATCH_REGVAL(R300_TX_INVALTAGS, R300_TX_FLUSH); - END_BATCH(); - end_3d(radeon); +static void r300_fallback(GLcontext *ctx, GLuint bit, GLboolean mode) +{ + r300ContextPtr r300 = R300_CONTEXT(ctx); + if (mode) + r300->radeon.Fallback |= bit; + else + r300->radeon.Fallback &= ~bit; } static void r300_init_vtbl(radeonContextPtr radeon) { - radeon->vtbl.get_lock = r300_get_lock; - radeon->vtbl.update_viewport_offset = r300UpdateViewportOffset; - radeon->vtbl.update_draw_buffer = r300UpdateDrawBuffer; - radeon->vtbl.emit_cs_header = r300_vtbl_emit_cs_header; - radeon->vtbl.swtcl_flush = r300_swtcl_flush; - radeon->vtbl.pre_emit_atoms = r300_vtbl_pre_emit_atoms; + radeon->vtbl.get_lock = r300_get_lock; + radeon->vtbl.update_viewport_offset = r300UpdateViewportOffset; + radeon->vtbl.emit_cs_header = r300_vtbl_emit_cs_header; + radeon->vtbl.swtcl_flush = r300_swtcl_flush; + radeon->vtbl.pre_emit_atoms = r300_vtbl_pre_emit_atoms; + radeon->vtbl.fallback = r300_fallback; } diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.c b/src/mesa/drivers/dri/r300/r300_ioctl.c index 619d268f38..d1cf57959f 100644 --- a/src/mesa/drivers/dri/r300/r300_ioctl.c +++ b/src/mesa/drivers/dri/r300/r300_ioctl.c @@ -541,7 +541,7 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask) { r300ContextPtr r300 = R300_CONTEXT(ctx); __DRIdrawablePrivate *dPriv = r300->radeon.dri.drawable; - GLframebuffer *fb = dPriv->driverPrivate; + struct radeon_framebuffer *rfb = dPriv->driverPrivate; struct radeon_renderbuffer *rrb; struct radeon_renderbuffer *rrbd; int flags = 0; @@ -594,16 +594,16 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask) rcommonEnsureCmdBufSpace(&r300->radeon, 421 * 3, __FUNCTION__); if (flags || bits) r300EmitClearState(ctx); - rrbd = (void *)fb->Attachment[BUFFER_DEPTH].Renderbuffer; + rrbd = (void *)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; if (flags & BUFFER_BIT_FRONT_LEFT) { - rrb = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rrb = (void *)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; r300ClearBuffer(r300, bits | CLEARBUFFER_COLOR, rrb, rrbd); bits = 0; } if (flags & BUFFER_BIT_BACK_LEFT) { - rrb = (void *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rrb = (void *)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; r300ClearBuffer(r300, bits | CLEARBUFFER_COLOR, rrb, rrbd); bits = 0; } diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c index f46477f0f6..402d2d7638 100644 --- a/src/mesa/drivers/dri/r300/r300_render.c +++ b/src/mesa/drivers/dri/r300/r300_render.c @@ -427,7 +427,8 @@ static int r300Fallback(GLcontext * ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); const unsigned back = ctx->Stencil._BackFace; - + + FALLBACK_IF(r300->radeon.Fallback); /* Do we need to use new-style shaders? * Also is there a better way to do this? */ if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) { diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 59728a07e5..6bb0063bc1 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -1083,20 +1083,13 @@ static void r300UpdateWindow(GLcontext * ctx) static void r300Viewport(GLcontext * ctx, GLint x, GLint y, GLsizei width, GLsizei height) { - r300ContextPtr rmesa = R300_CONTEXT(ctx); - __DRIcontext *driContext = rmesa->radeon.dri.context; /* Don't pipeline viewport changes, conflict with window offset * setting below. Could apply deltas to rescue pipelined viewport * values, or keep the originals hanging around. */ - if (rmesa->radeon.radeonScreen->driScreen->dri2.enabled) { - radeon_update_renderbuffers(driContext, driContext->driDrawablePriv); - if (driContext->driDrawablePriv != driContext->driReadablePriv) { - radeon_update_renderbuffers(driContext, - driContext->driReadablePriv); - } - } r300UpdateWindow(ctx); + + radeon_viewport(ctx, x, y, width, height); } static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval) @@ -1129,34 +1122,6 @@ void r300UpdateViewportOffset(GLcontext * ctx) radeonUpdateScissor(ctx); } -/** - * Tell the card where to render (offset, pitch). - * Effected by glDrawBuffer, etc - */ -void r300UpdateDrawBuffer(GLcontext * ctx) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct gl_framebuffer *fb = ctx->DrawBuffer; - struct radeon_renderbuffer *rrb; - - if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) { - /* draw to front */ - rrb = - (void *) fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; - } else if (fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) { - /* draw to back */ - rrb = (void *) fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; - } else { - /* drawing to multiple buffers, or none */ - return; - } - - assert(rrb); - assert(rrb->pitch); - - R300_STATECHANGE(rmesa, cb); -} - static void r300FetchStateParameter(GLcontext * ctx, const gl_state_index state[STATE_LENGTH], @@ -2653,7 +2618,11 @@ static void r300InvalidateState(GLcontext * ctx, GLuint new_state) _ae_invalidate_state(ctx, new_state); if (new_state & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) { - r300UpdateDrawBuffer(ctx); + _mesa_update_framebuffer(ctx); + /* this updates the DrawBuffer's Width/Height if it's a FBO */ + _mesa_update_draw_buffer_bounds(ctx); + + R300_STATECHANGE(r300, cb); } r300UpdateStateParameters(ctx, new_state); @@ -2705,28 +2674,6 @@ void r300UpdateClipPlanes( GLcontext *ctx ) } } -static void r300DrawBuffer( GLcontext *ctx, GLenum mode ) -{ - r300ContextPtr rmesa = R300_CONTEXT(ctx); - if (RADEON_DEBUG & DEBUG_DRI) - fprintf(stderr, "%s %s\n", __FUNCTION__, - _mesa_lookup_enum_by_nr( mode )); - - radeon_firevertices(&rmesa->radeon); /* don't pipeline cliprect changes */ - - radeonSetCliprects( &rmesa->radeon ); - if (!rmesa->radeon.radeonScreen->driScreen->dri2.enabled) - radeonUpdatePageFlipping(&rmesa->radeon); -} - -static void r300ReadBuffer( GLcontext *ctx, GLenum mode ) -{ - if (RADEON_DEBUG & DEBUG_DRI) - fprintf(stderr, "%s %s\n", __FUNCTION__, - _mesa_lookup_enum_by_nr( mode )); - -}; - /** * Initialize driver's state callback functions */ @@ -2770,6 +2717,6 @@ void r300InitStateFuncs(struct dd_function_table *functions) functions->ClipPlane = r300ClipPlane; functions->Scissor = radeonScissor; - functions->DrawBuffer = r300DrawBuffer; - functions->ReadBuffer = r300ReadBuffer; + functions->DrawBuffer = radeonDrawBuffer; + functions->ReadBuffer = radeonReadBuffer; } diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c index 8a90069a6d..2d7f392e7c 100644 --- a/src/mesa/drivers/dri/r300/r300_texstate.c +++ b/src/mesa/drivers/dri/r300/r300_texstate.c @@ -393,7 +393,7 @@ void r300SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv) radeon_texture_image *rImage; radeonContextPtr radeon; r300ContextPtr rmesa; - GLframebuffer *fb; + struct radeon_framebuffer *rfb; radeonTexObjPtr t; uint32_t pitch_val; @@ -402,7 +402,7 @@ void r300SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv) radeon = pDRICtx->driverPrivate; rmesa = pDRICtx->driverPrivate; - fb = dPriv->driverPrivate; + rfb = dPriv->driverPrivate; texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit]; texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target); texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0); @@ -415,17 +415,17 @@ void r300SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv) radeon_update_renderbuffers(pDRICtx, dPriv); /* back & depth buffer are useless free them right away */ - rb = (void*)fb->Attachment[BUFFER_DEPTH].Renderbuffer; + rb = (void*)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void*)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rb = (void*)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void*)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rb = (void*)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; if (rb->bo == NULL) { /* Failed to BO for the buffer */ return; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index f7c0d7d64f..1021f9beec 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -51,7 +51,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "main/light.h" #include "main/framebuffer.h" #include "main/simple_list.h" - +#include "main/renderbuffer.h" #include "swrast/swrast.h" #include "vbo/vbo.h" #include "tnl/tnl.h" @@ -132,6 +132,38 @@ void radeonRecalcScissorRects(radeonContextPtr radeon) } } +static void radeon_get_cliprects(radeonContextPtr radeon, + struct drm_clip_rect **cliprects, + unsigned int *num_cliprects, + int *x_off, int *y_off) +{ + __DRIdrawablePrivate *dPriv = radeon->dri.drawable; + struct radeon_framebuffer *rfb = dPriv->driverPrivate; + + if (radeon->constant_cliprect) { + radeon->fboRect.x1 = 0; + radeon->fboRect.y1 = 0; + radeon->fboRect.x2 = radeon->glCtx->DrawBuffer->Width; + radeon->fboRect.y2 = radeon->glCtx->DrawBuffer->Height; + + *cliprects = &radeon->fboRect; + *num_cliprects = 1; + *x_off = 0; + *y_off = 0; + } else if (radeon->front_cliprects || + rfb->pf_active || dPriv->numBackClipRects == 0) { + *cliprects = dPriv->pClipRects; + *num_cliprects = dPriv->numClipRects; + *x_off = dPriv->x; + *y_off = dPriv->y; + } else { + *num_cliprects = dPriv->numBackClipRects; + *cliprects = dPriv->pBackClipRects; + *x_off = dPriv->backX; + *y_off = dPriv->backY; + } +} + /** * Update cliprects and scissors. */ @@ -139,49 +171,37 @@ void radeonSetCliprects(radeonContextPtr radeon) { __DRIdrawablePrivate *const drawable = radeon->dri.drawable; __DRIdrawablePrivate *const readable = radeon->dri.readable; - GLframebuffer *const draw_fb = (GLframebuffer*)drawable->driverPrivate; - GLframebuffer *const read_fb = (GLframebuffer*)readable->driverPrivate; + struct radeon_framebuffer *const draw_rfb = drawable->driverPrivate; + struct radeon_framebuffer *const read_rfb = readable->driverPrivate; + int x_off, y_off; - if (!radeon->radeonScreen->driScreen->dri2.enabled) { - if (draw_fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) { - /* Can't ignore 2d windows if we are page flipping. */ - if (drawable->numBackClipRects == 0 || radeon->doPageFlip || - radeon->sarea->pfCurrentPage == 1) { - radeon->numClipRects = drawable->numClipRects; - radeon->pClipRects = drawable->pClipRects; - } else { - radeon->numClipRects = drawable->numBackClipRects; - radeon->pClipRects = drawable->pBackClipRects; - } - } else { - /* front buffer (or none, or multiple buffers */ - radeon->numClipRects = drawable->numClipRects; - radeon->pClipRects = drawable->pClipRects; - } - } + fprintf(stderr,"cliprects %d %d\n", radeon->front_cliprects, radeon->constant_cliprect); + radeon_get_cliprects(radeon, &radeon->pClipRects, + &radeon->numClipRects, &x_off, &y_off); - if ((draw_fb->Width != drawable->w) || - (draw_fb->Height != drawable->h)) { - _mesa_resize_framebuffer(radeon->glCtx, draw_fb, + if ((draw_rfb->base.Width != drawable->w) || + (draw_rfb->base.Height != drawable->h)) { + _mesa_resize_framebuffer(radeon->glCtx, &draw_rfb->base, drawable->w, drawable->h); - draw_fb->Initialized = GL_TRUE; + draw_rfb->base.Initialized = GL_TRUE; } if (drawable != readable) { - if ((read_fb->Width != readable->w) || - (read_fb->Height != readable->h)) { - _mesa_resize_framebuffer(radeon->glCtx, read_fb, + if ((read_rfb->base.Width != readable->w) || + (read_rfb->base.Height != readable->h)) { + _mesa_resize_framebuffer(radeon->glCtx, &read_rfb->base, readable->w, readable->h); - read_fb->Initialized = GL_TRUE; + read_rfb->base.Initialized = GL_TRUE; } } if (radeon->state.scissor.enabled) radeonRecalcScissorRects(radeon); - radeon->lastStamp = drawable->lastStamp; } + + void radeonUpdateScissor( GLcontext *ctx ) { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); @@ -348,6 +368,37 @@ static void radeonWaitForIdle(radeonContextPtr radeon) UNLOCK_HARDWARE(radeon); } +static void radeon_flip_renderbuffers(struct radeon_framebuffer *rfb) +{ + int current_page = rfb->pf_current_page; + int next_page = (current_page + 1) % rfb->pf_num_pages; + struct gl_renderbuffer *tmp_rb; + + /* Exchange renderbuffers if necessary but make sure their + * reference counts are preserved. + */ + if (rfb->color_rb[current_page] && + rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer != + &rfb->color_rb[current_page]->base) { + tmp_rb = NULL; + _mesa_reference_renderbuffer(&tmp_rb, + rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer); + tmp_rb = &rfb->color_rb[current_page]->base; + _mesa_reference_renderbuffer(&rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer, tmp_rb); + _mesa_reference_renderbuffer(&tmp_rb, NULL); + } + + if (rfb->color_rb[next_page] && + rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer != + &rfb->color_rb[next_page]->base) { + tmp_rb = NULL; + _mesa_reference_renderbuffer(&tmp_rb, + rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer); + tmp_rb = &rfb->color_rb[next_page]->base; + _mesa_reference_renderbuffer(&rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer, tmp_rb); + _mesa_reference_renderbuffer(&tmp_rb, NULL); + } +} /* Copy the back color buffer to the front color buffer. */ @@ -355,10 +406,8 @@ void radeonCopyBuffer( __DRIdrawablePrivate *dPriv, const drm_clip_rect_t *rect) { radeonContextPtr rmesa; + struct radeon_framebuffer *rfb; GLint nbox, i, ret; - GLboolean missed_target; - int64_t ust; - __DRIscreenPrivate *psp; assert(dPriv); assert(dPriv->driContextPriv); @@ -366,24 +415,12 @@ void radeonCopyBuffer( __DRIdrawablePrivate *dPriv, rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate; + rfb = dPriv->driverPrivate; + if ( RADEON_DEBUG & DEBUG_IOCTL ) { fprintf( stderr, "\n%s( %p )\n\n", __FUNCTION__, (void *) rmesa->glCtx ); } - radeon_firevertices(rmesa); - LOCK_HARDWARE( rmesa ); - - /* Throttle the frame rate -- only allow one pending swap buffers - * request at a time. - */ - radeonWaitForFrameCompletion( rmesa ); - if (!rect) - { - UNLOCK_HARDWARE( rmesa ); - driWaitForVBlank( dPriv, & missed_target ); - LOCK_HARDWARE( rmesa ); - } - nbox = dPriv->numClipRects; /* must be in locked region */ for ( i = 0 ; i < nbox ; ) { @@ -429,94 +466,76 @@ void radeonCopyBuffer( __DRIdrawablePrivate *dPriv, } UNLOCK_HARDWARE( rmesa ); - if (!rect) - { - psp = dPriv->driScreenPriv; - rmesa->swap_count++; - (*psp->systemTime->getUST)( & ust ); - if ( missed_target ) { - rmesa->swap_missed_count++; - rmesa->swap_missed_ust = ust - rmesa->swap_ust; - } +} - rmesa->swap_ust = ust; - rmesa->hw.all_dirty = GL_TRUE; +static int radeonScheduleSwap(__DRIdrawablePrivate *dPriv, GLboolean *missed_target) +{ + radeonContextPtr rmesa; + + rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate; + radeon_firevertices(rmesa); + LOCK_HARDWARE( rmesa ); + + if (!dPriv->numClipRects) { + UNLOCK_HARDWARE(rmesa); + usleep(10000); /* throttle invisible client 10ms */ + return 0; } + + radeonWaitForFrameCompletion(rmesa); + + UNLOCK_HARDWARE(rmesa); + driWaitForVBlank(dPriv, missed_target); + LOCK_HARDWARE(rmesa); + + return 0; } -void radeonPageFlip( __DRIdrawablePrivate *dPriv ) +static GLboolean radeonPageFlip( __DRIdrawablePrivate *dPriv ) { - radeonContextPtr rmesa; + radeonContextPtr radeon; GLint ret; - GLboolean missed_target; __DRIscreenPrivate *psp; struct radeon_renderbuffer *rrb; - GLframebuffer *fb = dPriv->driverPrivate; - + struct radeon_framebuffer *rfb; + assert(dPriv); assert(dPriv->driContextPriv); assert(dPriv->driContextPriv->driverPrivate); - rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate; - rrb = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + radeon = (radeonContextPtr) dPriv->driContextPriv->driverPrivate; + rfb = dPriv->driverPrivate; + rrb = (void *)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; psp = dPriv->driScreenPriv; if ( RADEON_DEBUG & DEBUG_IOCTL ) { - fprintf(stderr, "%s: pfCurrentPage: %d\n", __FUNCTION__, - rmesa->sarea->pfCurrentPage); + fprintf(stderr, "%s: pfCurrentPage: %d %d\n", __FUNCTION__, + radeon->sarea->pfCurrentPage, radeon->sarea->pfState); } - - radeon_firevertices(rmesa); - - LOCK_HARDWARE( rmesa ); - - if (!dPriv->numClipRects) { - UNLOCK_HARDWARE(rmesa); - usleep(10000); /* throttle invisible client 10ms */ - return; - } - drm_clip_rect_t *box = dPriv->pClipRects; - drm_clip_rect_t *b = rmesa->sarea->boxes; + drm_clip_rect_t *b = radeon->sarea->boxes; b[0] = box[0]; - rmesa->sarea->nbox = 1; - - /* Throttle the frame rate -- only allow a few pending swap buffers - * request at a time. - */ - radeonWaitForFrameCompletion( rmesa ); - UNLOCK_HARDWARE( rmesa ); - driWaitForVBlank( dPriv, & missed_target ); - if ( missed_target ) { - rmesa->swap_missed_count++; - (void) (*psp->systemTime->getUST)( & rmesa->swap_missed_ust ); - } - LOCK_HARDWARE( rmesa ); + radeon->sarea->nbox = 1; - ret = drmCommandNone( rmesa->dri.fd, DRM_RADEON_FLIP ); + ret = drmCommandNone( radeon->dri.fd, DRM_RADEON_FLIP ); - UNLOCK_HARDWARE( rmesa ); + UNLOCK_HARDWARE( radeon ); if ( ret ) { fprintf( stderr, "DRM_RADEON_FLIP: return = %d\n", ret ); - exit( 1 ); + return GL_FALSE; } - rmesa->swap_count++; - (void) (*psp->systemTime->getUST)( & rmesa->swap_ust ); - - /* Get ready for drawing next frame. Update the renderbuffers' - * flippedOffset/Pitch fields so we draw into the right place. - */ - // driFlipRenderbuffers(rmesa->glCtx->WinSysDrawBuffer, - // rmesa->sarea->pfCurrentPage); - - rmesa->state.color.rrb = rrb; + if (!rfb->pf_active) + return GL_FALSE; + + rfb->pf_current_page = radeon->sarea->pfCurrentPage; + radeon_flip_renderbuffers(rfb); + radeon_draw_buffer(radeon->glCtx, &rfb->base); - if (rmesa->vtbl.update_draw_buffer) - rmesa->vtbl.update_draw_buffer(rmesa->glCtx); + return GL_TRUE; } @@ -525,6 +544,9 @@ void radeonPageFlip( __DRIdrawablePrivate *dPriv ) */ void radeonSwapBuffers(__DRIdrawablePrivate * dPriv) { + int64_t ust; + __DRIscreenPrivate *psp; + if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) { radeonContextPtr radeon; GLcontext *ctx; @@ -533,12 +555,29 @@ void radeonSwapBuffers(__DRIdrawablePrivate * dPriv) ctx = radeon->glCtx; if (ctx->Visual.doubleBufferMode) { + GLboolean missed_target; + struct radeon_framebuffer *rfb = dPriv->driverPrivate; _mesa_notifySwapBuffers(ctx);/* flush pending rendering comands */ - if (radeon->doPageFlip) { + + radeonScheduleSwap(dPriv, &missed_target); + + if (rfb->pf_active) { radeonPageFlip(dPriv); } else { radeonCopyBuffer(dPriv, NULL); } + + psp = dPriv->driScreenPriv; + + rfb->swap_count++; + (*psp->systemTime->getUST)( & ust ); + if ( missed_target ) { + rfb->swap_missed_count++; + rfb->swap_missed_ust = ust - rfb->swap_ust; + } + + rfb->swap_ust = ust; + radeon->hw.all_dirty = GL_TRUE; } } else { /* XXX this shouldn't be an error but we can't handle it for now */ @@ -573,7 +612,224 @@ void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv, } } +void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) +{ + radeonContextPtr radeon = RADEON_CONTEXT(ctx); + struct radeon_renderbuffer *rrbDepth = NULL, *rrbStencil = NULL, + *rrbColor = NULL; + + + if (!fb) { + /* this can happen during the initial context initialization */ + return; + } + + /* radeons only handle 1 color draw so far */ + if (fb->_NumColorDrawBuffers != 1) { + radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DRAW_BUFFER, GL_TRUE); + return; + } + + /* Do this here, note core Mesa, since this function is called from + * many places within the driver. + */ + if (ctx->NewState & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) { + /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */ + _mesa_update_framebuffer(ctx); + /* this updates the DrawBuffer's Width/Height if it's a FBO */ + _mesa_update_draw_buffer_bounds(ctx); + } + + if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) { + /* this may occur when we're called by glBindFrameBuffer() during + * the process of someone setting up renderbuffers, etc. + */ + /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/ + return; + } + + if (fb->Name) + ;/* do something depthy/stencily TODO */ + + + /* none */ + if (fb->Name == 0) { + if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) { + rrbColor = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + radeon->front_cliprects = GL_TRUE; + } else { + rrbColor = (void *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + radeon->front_cliprects = GL_FALSE; + } + } else { + /* user FBO in theory */ + struct radeon_renderbuffer *rrb; + rrb = (void *)fb->_ColorDrawBuffers[0]; + rrbColor = rrb; + radeon->constant_cliprect = GL_TRUE; + } + + if (rrbColor == NULL) + radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DRAW_BUFFER, GL_TRUE); + else + radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DRAW_BUFFER, GL_FALSE); + + + + if (fb->_DepthBuffer && fb->_DepthBuffer->Wrapped) { + rrbDepth = (struct radeon_renderbuffer *)fb->_DepthBuffer->Wrapped; + if (rrbDepth && rrbDepth->bo) { + radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DEPTH_BUFFER, GL_FALSE); + } else { + radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DEPTH_BUFFER, GL_TRUE); + } + } else { + radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DEPTH_BUFFER, GL_FALSE); + rrbDepth = NULL; + } + + /* TODO stencil things */ + if (fb->_StencilBuffer && fb->_StencilBuffer->Wrapped) { + rrbStencil = (struct radeon_renderbuffer *)fb->_DepthBuffer->Wrapped; + if (rrbStencil && rrbStencil->bo) { + radeon->vtbl.fallback(ctx, RADEON_FALLBACK_STENCIL_BUFFER, GL_FALSE); + /* need to re-compute stencil hw state */ + if (ctx->Driver.Enable != NULL) + ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled); + else + ctx->NewState |= _NEW_STENCIL; + if (!rrbDepth) + rrbDepth = rrbStencil; + } else { + radeon->vtbl.fallback(ctx, RADEON_FALLBACK_STENCIL_BUFFER, GL_TRUE); + } + } else { + radeon->vtbl.fallback(ctx, RADEON_FALLBACK_STENCIL_BUFFER, GL_FALSE); + if (ctx->Driver.Enable != NULL) + ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled); + else + ctx->NewState |= _NEW_STENCIL; + } + + /* Update culling direction which changes depending on the + * orientation of the buffer: + */ + if (ctx->Driver.FrontFace) + ctx->Driver.FrontFace(ctx, ctx->Polygon.FrontFace); + else + ctx->NewState |= _NEW_POLYGON; + + /* + * Update depth test state + */ + if (ctx->Driver.Enable) { + if (ctx->Depth.Test && fb->Visual.depthBits > 0) { + ctx->Driver.Enable(ctx, GL_DEPTH_TEST, GL_TRUE); + } else { + ctx->Driver.Enable(ctx, GL_DEPTH_TEST, GL_FALSE); + } + } else { + ctx->NewState |= _NEW_DEPTH; + } + + radeon->state.depth.rrb = rrbDepth; + + radeon->state.color.rrb = rrbColor; + + /* update viewport since it depends on window size */ + if (ctx->Driver.Viewport) { + ctx->Driver.Viewport(ctx, ctx->Viewport.X, ctx->Viewport.Y, + ctx->Viewport.Width, ctx->Viewport.Height); + } else { + ctx->NewState |= _NEW_VIEWPORT; + } + + /* Set state we know depends on drawable parameters: + */ + if (ctx->Driver.Scissor) + ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y, + ctx->Scissor.Width, ctx->Scissor.Height); + radeon->NewGLState |= _NEW_SCISSOR; +} + +/** + * Called via glDrawBuffer. + */ +void radeonDrawBuffer( GLcontext *ctx, GLenum mode ) +{ + radeonContextPtr radeon = RADEON_CONTEXT(ctx); + + if (RADEON_DEBUG & DEBUG_DRI) + fprintf(stderr, "%s %s\n", __FUNCTION__, + _mesa_lookup_enum_by_nr( mode )); + + radeon_firevertices(radeon); /* don't pipeline cliprect changes */ + + radeon_draw_buffer(ctx, ctx->DrawBuffer); +} + +void radeonReadBuffer( GLcontext *ctx, GLenum mode ) +{ + /* nothing, until we implement h/w glRead/CopyPixels or CopyTexImage */ + if (ctx->ReadBuffer == ctx->DrawBuffer) { + /* This will update FBO completeness status. + * A framebuffer will be incomplete if the GL_READ_BUFFER setting + * refers to a missing renderbuffer. Calling glReadBuffer can set + * that straight and can make the drawing buffer complete. + */ + radeon_draw_buffer(ctx, ctx->DrawBuffer); + } +} + +/* Turn on/off page flipping according to the flags in the sarea: + */ +void radeonUpdatePageFlipping(radeonContextPtr radeon) +{ + struct radeon_framebuffer *rfb = radeon->dri.drawable->driverPrivate; + + rfb->pf_active = radeon->sarea->pfState; + rfb->pf_current_page = radeon->sarea->pfCurrentPage; + rfb->pf_num_pages = 2; + radeon_flip_renderbuffers(rfb); + radeon_draw_buffer(radeon->glCtx, radeon->glCtx->DrawBuffer); +} + +void radeon_window_moved(radeonContextPtr radeon) +{ + GLcontext *ctx = radeon->glCtx; + __DRIdrawablePrivate *dPriv = radeon->dri.drawable; + struct radeon_framebuffer *rfb = dPriv->driverPrivate; + + if (!radeon->radeonScreen->driScreen->dri2.enabled) { + radeonUpdatePageFlipping(radeon); + } + radeonSetCliprects(radeon); +} + +void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height) +{ + radeonContextPtr radeon = RADEON_CONTEXT(ctx); + __DRIcontext *driContext = radeon->dri.context; + void (*old_viewport)(GLcontext *ctx, GLint x, GLint y, + GLsizei w, GLsizei h); + + if (!driContext->driScreenPriv->dri2.enabled) + return; + + radeon_update_renderbuffers(driContext, driContext->driDrawablePriv); + if (driContext->driDrawablePriv != driContext->driReadablePriv) + radeon_update_renderbuffers(driContext, driContext->driReadablePriv); + + old_viewport = ctx->Driver.Viewport; + ctx->Driver.Viewport = NULL; + radeon->dri.drawable = driContext->driDrawablePriv; + radeon_window_moved(radeon); + radeon_draw_buffer(ctx, radeon->glCtx->DrawBuffer); + ctx->Driver.Viewport = old_viewport; + + +} static void radeon_print_state_atom(radeonContextPtr radeon, struct radeon_state_atom *state ) { int i; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index ead0f5551b..95b718184b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -14,7 +14,6 @@ void radeonWaitForIdleLocked(radeonContextPtr radeon); extern uint32_t radeonGetAge(radeonContextPtr radeon); void radeonCopyBuffer( __DRIdrawablePrivate *dPriv, const drm_clip_rect_t *rect); -void radeonPageFlip( __DRIdrawablePrivate *dPriv ); void radeonSwapBuffers(__DRIdrawablePrivate * dPriv); void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv, int x, int y, int w, int h ); @@ -25,6 +24,12 @@ void radeonFlush(GLcontext *ctx); void radeonFinish(GLcontext * ctx); void radeonEmitState(radeonContextPtr radeon); +void radeon_window_moved(radeonContextPtr radeon); +void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb); +void radeonDrawBuffer( GLcontext *ctx, GLenum mode ); +void radeonReadBuffer( GLcontext *ctx, GLenum mode ); +void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height); + static inline struct radeon_renderbuffer *radeon_get_depthbuffer(radeonContextPtr rmesa) { struct radeon_renderbuffer *rrb; @@ -38,11 +43,11 @@ static inline struct radeon_renderbuffer *radeon_get_depthbuffer(radeonContextPt static inline struct radeon_renderbuffer *radeon_get_colorbuffer(radeonContextPtr rmesa) { struct radeon_renderbuffer *rrb; - GLframebuffer *fb = rmesa->dri.drawable->driverPrivate; + struct radeon_framebuffer *rfb = rmesa->dri.drawable->driverPrivate; rrb = rmesa->state.color.rrb; if (rmesa->radeonScreen->driScreen->dri2.enabled) { - rrb = (struct radeon_renderbuffer *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rrb = (struct radeon_renderbuffer *)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; } if (!rrb) return NULL; diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 1b8a05d045..4da2055c13 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -35,7 +35,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "radeon_common.h" #include "xmlpool.h" /* for symbolic values of enum-type options */ #include "utils.h" -#include "drirenderbuffer.h" #include "vblank.h" #include "main/state.h" @@ -165,8 +164,6 @@ GLboolean radeonInitContext(radeonContextPtr radeon, radeon->do_usleeps ? "usleeps" : "busy waits", fthrottle_mode, radeon->radeonScreen->irq); - (*sPriv->systemTime->getUST) (&radeon->swap_ust); - return GL_TRUE; } @@ -180,39 +177,39 @@ void radeonCleanupContext(radeonContextPtr radeon) FILE *track; #endif struct radeon_renderbuffer *rb; - GLframebuffer *fb; + struct radeon_framebuffer *rfb; /* free the Mesa context */ _mesa_destroy_context(radeon->glCtx); - fb = (void*)radeon->dri.drawable->driverPrivate; - rb = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rfb = (void*)radeon->dri.drawable->driverPrivate; + rb = (void *)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rb = (void *)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void *)fb->Attachment[BUFFER_DEPTH].Renderbuffer; + rb = (void *)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - fb = (void*)radeon->dri.readable->driverPrivate; - rb = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rfb = (void*)radeon->dri.readable->driverPrivate; + rb = (void *)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rb = (void *)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void *)fb->Attachment[BUFFER_DEPTH].Renderbuffer; + rb = (void *)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; @@ -260,12 +257,12 @@ GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv) static void radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon, - GLframebuffer *draw) + struct radeon_framebuffer *draw) { /* if radeon->fake */ struct radeon_renderbuffer *rb; - if ((rb = (void *)draw->Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) { if (!rb->bo) { rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->frontOffset, @@ -277,7 +274,7 @@ radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon, rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->frontPitch * rb->cpp; } - if ((rb = (void *)draw->Attachment[BUFFER_BACK_LEFT].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer)) { if (!rb->bo) { rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->backOffset, @@ -289,7 +286,7 @@ radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon, rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->backPitch * rb->cpp; } - if ((rb = (void *)draw->Attachment[BUFFER_DEPTH].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer)) { if (!rb->bo) { rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->depthOffset, @@ -301,7 +298,7 @@ radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon, rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp; } - if ((rb = (void *)draw->Attachment[BUFFER_STENCIL].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_STENCIL].Renderbuffer)) { if (!rb->bo) { rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->depthOffset, @@ -317,7 +314,7 @@ radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon, static void radeon_make_renderbuffer_current(radeonContextPtr radeon, - GLframebuffer *draw) + struct radeon_framebuffer *draw) { int size = 4096*4096*4; /* if radeon->fake */ @@ -329,7 +326,7 @@ radeon_make_renderbuffer_current(radeonContextPtr radeon, } - if ((rb = (void *)draw->Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) { if (!rb->bo) { rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->frontOffset + @@ -342,7 +339,7 @@ radeon_make_renderbuffer_current(radeonContextPtr radeon, rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->frontPitch * rb->cpp; } - if ((rb = (void *)draw->Attachment[BUFFER_BACK_LEFT].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer)) { if (!rb->bo) { rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->backOffset + @@ -355,7 +352,7 @@ radeon_make_renderbuffer_current(radeonContextPtr radeon, rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->backPitch * rb->cpp; } - if ((rb = (void *)draw->Attachment[BUFFER_DEPTH].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer)) { if (!rb->bo) { rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->depthOffset + @@ -368,7 +365,7 @@ radeon_make_renderbuffer_current(radeonContextPtr radeon, rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp; } - if ((rb = (void *)draw->Attachment[BUFFER_STENCIL].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_STENCIL].Renderbuffer)) { if (!rb->bo) { rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->depthOffset + @@ -392,7 +389,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) __DRIscreen *screen; struct radeon_renderbuffer *rb; int i, count; - GLframebuffer *draw; + struct radeon_framebuffer *draw; radeonContextPtr radeon; if (RADEON_DEBUG & DEBUG_DRI) @@ -402,13 +399,13 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) screen = context->driScreenPriv; radeon = (radeonContextPtr) context->driverPrivate; i = 0; - if ((rb = (void *)draw->Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) { attachments[i++] = __DRI_BUFFER_FRONT_LEFT; } - if ((rb = (void *)draw->Attachment[BUFFER_BACK_LEFT].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer)) { attachments[i++] = __DRI_BUFFER_BACK_LEFT; } - if ((rb = (void *)draw->Attachment[BUFFER_DEPTH].Renderbuffer)) { + if ((rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer)) { attachments[i++] = __DRI_BUFFER_DEPTH; } @@ -439,7 +436,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) for (i = 0; i < count; i++) { switch (buffers[i].attachment) { case __DRI_BUFFER_FRONT_LEFT: - rb = (void *)draw->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; if (rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; @@ -461,7 +458,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) } break; case __DRI_BUFFER_BACK_LEFT: - rb = (void *)draw->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; if (rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; @@ -479,7 +476,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) buffers[i].flags); break; case __DRI_BUFFER_DEPTH: - rb = (void *)draw->Attachment[BUFFER_DEPTH].Renderbuffer; + rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer; if (rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; @@ -518,7 +515,8 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, __DRIdrawablePrivate * driReadPriv) { radeonContextPtr radeon; - GLframebuffer *dfb, *rfb; + struct radeon_framebuffer *drfb; + struct gl_framebuffer *readfb; if (!driContextPriv) { if (RADEON_DEBUG & DEBUG_DRI) @@ -526,61 +524,65 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, _mesa_make_current(NULL, NULL, NULL); return GL_TRUE; } + radeon = (radeonContextPtr) driContextPriv->driverPrivate; - dfb = driDrawPriv->driverPrivate; - rfb = driReadPriv->driverPrivate; + drfb = driDrawPriv->driverPrivate; + readfb = driReadPriv->driverPrivate; if (driContextPriv->driScreenPriv->dri2.enabled) { radeon_update_renderbuffers(driContextPriv, driDrawPriv); if (driDrawPriv != driReadPriv) radeon_update_renderbuffers(driContextPriv, driReadPriv); radeon->state.color.rrb = - (void *)dfb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + (void *)drfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; radeon->state.depth.rrb = - (void *)dfb->Attachment[BUFFER_DEPTH].Renderbuffer; + (void *)drfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; } else { - radeon_make_renderbuffer_current(radeon, dfb); + radeon_make_renderbuffer_current(radeon, drfb); } if (RADEON_DEBUG & DEBUG_DRI) - fprintf(stderr, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__, radeon->glCtx, dfb, rfb); + fprintf(stderr, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__, radeon->glCtx, drfb, readfb); driUpdateFramebufferSize(radeon->glCtx, driDrawPriv); if (driReadPriv != driDrawPriv) driUpdateFramebufferSize(radeon->glCtx, driReadPriv); + _mesa_make_current(radeon->glCtx, &drfb->base, readfb); - - _mesa_make_current(radeon->glCtx, dfb, rfb); - - if (radeon->dri.drawable != driDrawPriv) { - if (driDrawPriv->swap_interval == (unsigned)-1) { - driDrawPriv->vblFlags = - (radeon->radeonScreen->irq != 0) - ? driGetDefaultVBlankFlags(&radeon-> - optionCache) - : VBLANK_FLAG_NO_IRQ; - - driDrawableInitVBlank(driDrawPriv); - } - } + _mesa_update_state(radeon->glCtx); - radeon->dri.readable = driReadPriv; + if (radeon->glCtx->DrawBuffer == &drfb->base) { - if (radeon->dri.drawable != driDrawPriv || - radeon->lastStamp != driDrawPriv->lastStamp) { - radeon->dri.drawable = driDrawPriv; + if (radeon->dri.readable != driReadPriv) + radeon->dri.readable = driReadPriv; - radeonSetCliprects(radeon); - radeon->vtbl.update_viewport_offset(radeon->glCtx); + if (radeon->dri.drawable != driDrawPriv) { + if (driDrawPriv->swap_interval == (unsigned)-1) { + int i; + driDrawPriv->vblFlags = + (radeon->radeonScreen->irq != 0) + ? driGetDefaultVBlankFlags(&radeon-> + optionCache) + : VBLANK_FLAG_NO_IRQ; + + driDrawableInitVBlank(driDrawPriv); + drfb->vbl_waited = driDrawPriv->vblSeq; + + for (i = 0; i < 2; i++) { + if (drfb->color_rb[i]) + drfb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq; + } + + } + radeon->dri.drawable = driDrawPriv; + +// radeonWindowMoved(radeon); + } + radeon_draw_buffer(radeon->glCtx, &drfb->base); } - _mesa_update_state(radeon->glCtx); - - if (!driContextPriv->driScreenPriv->dri2.enabled) { - radeonUpdatePageFlipping(radeon); - } if (RADEON_DEBUG & DEBUG_DRI) fprintf(stderr, "End %s\n", __FUNCTION__); diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index a200e90221..4aeb50fe68 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -39,6 +39,8 @@ typedef struct radeon_context *radeonContextPtr; #define RADEON_FALLBACK_BLEND_FUNC 0x0020 #define RADEON_FALLBACK_DISABLE 0x0040 #define RADEON_FALLBACK_BORDER_MODE 0x0080 +#define RADEON_FALLBACK_DEPTH_BUFFER 0x0100 +#define RADEON_FALLBACK_STENCIL_BUFFER 0x0200 #define R200_FALLBACK_TEXTURE 0x01 #define R200_FALLBACK_DRAW_BUFFER 0x02 @@ -81,9 +83,34 @@ struct radeon_renderbuffer /* boo Xorg 6.8.2 compat */ int has_surface; + GLuint pf_pending; /**< sequence number of pending flip */ + GLuint vbl_pending; /**< vblank sequence number of pending flip */ __DRIdrawablePrivate *dPriv; }; +struct radeon_framebuffer +{ + struct gl_framebuffer base; + + struct radeon_renderbuffer *color_rb[2]; + + GLuint vbl_waited; + + /* buffer swap */ + int64_t swap_ust; + int64_t swap_missed_ust; + + GLuint swap_count; + GLuint swap_missed_count; + + /* Drawable page flipping state */ + GLboolean pf_active; + GLint pf_current_page; + GLint pf_num_pages; + +}; + + struct radeon_colorbuffer_state { GLuint clear; int roundEnable; @@ -387,9 +414,6 @@ struct radeon_context { GLuint NewGLState; DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */ - /* Page flipping */ - GLuint doPageFlip; - /* Drawable, cliprect and scissor information */ GLuint numClipRects; /* Cliprects for the draw buffer */ drm_clip_rect_t *pClipRects; @@ -406,13 +430,6 @@ struct radeon_context { GLuint irqsEmitted; drm_radeon_irq_wait_t iw; - /* buffer swap */ - int64_t swap_ust; - int64_t swap_missed_ust; - - GLuint swap_count; - GLuint swap_missed_count; - /* Derived state - for r300 only */ struct radeon_state state; @@ -422,15 +439,19 @@ struct radeon_context { driOptionCache optionCache; struct radeon_cmdbuf cmdbuf; + + drm_clip_rect_t fboRect; + GLboolean constant_cliprect; /* use for FBO or DRI2 rendering */ + GLboolean front_cliprects; struct { void (*get_lock)(radeonContextPtr radeon); void (*update_viewport_offset)(GLcontext *ctx); - void (*update_draw_buffer)(GLcontext *ctx); void (*emit_cs_header)(struct radeon_cs *cs, radeonContextPtr rmesa); void (*swtcl_flush)(GLcontext *ctx, uint32_t offset); void (*pre_emit_atoms)(radeonContextPtr rmesa); void (*pre_emit_state)(radeonContextPtr rmesa); + void (*fallback)(GLcontext *ctx, GLuint bit, GLboolean mode); } vtbl; }; diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c index e4202c71fc..47ebe41c6d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_context.c @@ -186,10 +186,10 @@ static void r100_init_vtbl(radeonContextPtr radeon) { radeon->vtbl.get_lock = r100_get_lock; radeon->vtbl.update_viewport_offset = radeonUpdateViewportOffset; - radeon->vtbl.update_draw_buffer = radeonUpdateDrawBuffer; radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header; radeon->vtbl.swtcl_flush = r100_swtcl_flush; radeon->vtbl.pre_emit_state = r100_vtbl_pre_emit_state; + radeon->vtbl.fallback = radeonFallback; } /* Create the device specific context. @@ -369,8 +369,6 @@ radeonCreateContext( const __GLcontextModes *glVisual, rmesa->radeon.do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS); - (*sPriv->systemTime->getUST)( & rmesa->radeon.swap_ust ); - #if DO_DEBUG RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ), diff --git a/src/mesa/drivers/dri/radeon/radeon_lock.c b/src/mesa/drivers/dri/radeon/radeon_lock.c index 9a7e76b245..fb9e5e025e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_lock.c +++ b/src/mesa/drivers/dri/radeon/radeon_lock.c @@ -48,37 +48,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "radeon_lock.h" #include "drirenderbuffer.h" -#if DEBUG_LOCKING -char *prevLockFile = NULL; -int prevLockLine = 0; -#endif - -/* Turn on/off page flipping according to the flags in the sarea: - */ -void radeonUpdatePageFlipping(radeonContextPtr rmesa) -{ - int use_back; - __DRIdrawablePrivate *const drawable = rmesa->dri.drawable; - GLframebuffer *fb = drawable->driverPrivate; - - rmesa->doPageFlip = rmesa->sarea->pfState; - if (rmesa->glCtx->WinSysDrawBuffer) { - rmesa->vtbl.update_draw_buffer(rmesa->glCtx); - } - - use_back = rmesa->glCtx->DrawBuffer ? - (rmesa->glCtx->DrawBuffer->_ColorDrawBufferIndexes[0] == - BUFFER_BACK_LEFT) : 1; - use_back ^= (rmesa->sarea->pfCurrentPage == 1); - - if (use_back) - rmesa->state.color.rrb = (void *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; - else - rmesa->state.color.rrb = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; - - rmesa->state.depth.rrb = (void *)fb->Attachment[BUFFER_DEPTH].Renderbuffer; -} - /* Update the hardware state. This is called if another context has * grabbed the hardware lock, which includes the X server. This * function also updates the driver's window state after the X server @@ -112,13 +81,52 @@ void radeonGetLock(radeonContextPtr rmesa, GLuint flags) } if (rmesa->lastStamp != drawable->lastStamp) { - radeonUpdatePageFlipping(rmesa); - radeonSetCliprects(rmesa); - rmesa->vtbl.update_viewport_offset(rmesa->glCtx); - driUpdateFramebufferSize(rmesa->glCtx, drawable); + radeon_window_moved(rmesa); + rmesa->lastStamp = drawable->lastStamp; } rmesa->vtbl.get_lock(rmesa); rmesa->lost_context = GL_TRUE; } + +static INLINE struct radeon_renderbuffer * +radeon_get_renderbuffer(struct gl_framebuffer *fb, int attIndex) +{ + if (attIndex >= 0) + return (struct radeon_renderbuffer *)fb->Attachment[attIndex].Renderbuffer; + else + return NULL; +} + +void radeon_lock_hardware(radeonContextPtr radeon) +{ + __DRIdrawable *dPriv = radeon->dri.drawable; + char ret = 0; + struct radeon_framebuffer *rfb = NULL; + struct radeon_renderbuffer *rrb = NULL; + + if (radeon->dri.drawable) { + rfb = radeon->dri.drawable->driverPrivate; + + if (rfb) + rrb = radeon_get_renderbuffer(&rfb->base, + rfb->base._ColorDrawBufferIndexes[0]); + } + + if (!radeon->radeonScreen->driScreen->dri2.enabled) { + DRM_CAS(radeon->dri.hwLock, radeon->dri.hwContext, + (DRM_LOCK_HELD | radeon->dri.hwContext), ret ); + if (ret) + radeonGetLock(radeon, 0); + } +} + +void radeon_unlock_hardware(radeonContextPtr radeon) +{ + if (!radeon->radeonScreen->driScreen->dri2.enabled) { + DRM_UNLOCK( radeon->dri.fd, + radeon->dri.hwLock, + radeon->dri.hwContext ); + } +} diff --git a/src/mesa/drivers/dri/radeon/radeon_lock.h b/src/mesa/drivers/dri/radeon/radeon_lock.h index f5ebb8dd54..2817709eed 100644 --- a/src/mesa/drivers/dri/radeon/radeon_lock.h +++ b/src/mesa/drivers/dri/radeon/radeon_lock.h @@ -48,73 +48,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. extern void radeonGetLock(radeonContextPtr rmesa, GLuint flags); -/* Turn DEBUG_LOCKING on to find locking conflicts. - */ -#define DEBUG_LOCKING 0 - -#if DEBUG_LOCKING -extern char *prevLockFile; -extern int prevLockLine; - -#define DEBUG_LOCK() \ - do { \ - prevLockFile = (__FILE__); \ - prevLockLine = (__LINE__); \ - } while (0) - -#define DEBUG_RESET() \ - do { \ - prevLockFile = 0; \ - prevLockLine = 0; \ - } while (0) - -#define DEBUG_CHECK_LOCK() \ - do { \ - if ( prevLockFile ) { \ - fprintf( stderr, \ - "LOCK SET!\n\tPrevious %s:%d\n\tCurrent: %s:%d\n", \ - prevLockFile, prevLockLine, __FILE__, __LINE__ ); \ - exit( 1 ); \ - } \ - } while (0) - -#else - -#define DEBUG_LOCK() -#define DEBUG_RESET() -#define DEBUG_CHECK_LOCK() - -#endif - -/* - * !!! We may want to separate locks from locks with validation. This - * could be used to improve performance for those things commands that - * do not do any drawing !!! - */ +void radeon_lock_hardware(radeonContextPtr rmesa); +void radeon_unlock_hardware(radeonContextPtr rmesa); /* Lock the hardware and validate our state. */ -#define LOCK_HARDWARE( rmesa ) \ - do { \ - char __ret = 0; \ - DEBUG_CHECK_LOCK(); \ - if (!(rmesa)->radeonScreen->driScreen->dri2.enabled) { \ - DRM_CAS( (rmesa)->dri.hwLock, (rmesa)->dri.hwContext, \ - (DRM_LOCK_HELD | (rmesa)->dri.hwContext), __ret ); \ - if ( __ret ) \ - radeonGetLock( (rmesa), 0 ); \ - } \ - DEBUG_LOCK(); \ - } while (0) - -#define UNLOCK_HARDWARE( rmesa ) \ - do { \ - if (!(rmesa)->radeonScreen->driScreen->dri2.enabled) { \ - DRM_UNLOCK( (rmesa)->dri.fd, \ - (rmesa)->dri.hwLock, \ - (rmesa)->dri.hwContext ); \ - DEBUG_RESET(); \ - } \ - } while (0) +#define LOCK_HARDWARE( rmesa ) radeon_lock_hardware(rmesa) +#define UNLOCK_HARDWARE( rmesa ) radeon_unlock_hardware(rmesa) #endif diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 78f0bc2514..bf5f5c98bd 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -1262,7 +1262,7 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, const __GLcontextModes *mesaVis, GLboolean isPixmap ) { - radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->private; + radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->private; const GLboolean swDepth = GL_FALSE; const GLboolean swAlpha = GL_FALSE; @@ -1271,7 +1271,16 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, mesaVis->depthBits != 24; GLenum rgbFormat = (mesaVis->redBits == 5 ? GL_RGB5 : GL_RGBA8); GLenum depthFormat = GL_NONE; - struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis); + struct radeon_framebuffer *rfb; + + if (isPixmap) + return GL_FALSE; /* not implemented */ + + rfb = CALLOC_STRUCT(radeon_framebuffer); + if (!rfb) + return GL_FALSE; + + _mesa_initialize_framebuffer(&rfb->base, mesaVis); if (mesaVis->depthBits == 16) depthFormat = GL_DEPTH_COMPONENT16; @@ -1279,26 +1288,22 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, depthFormat = GL_DEPTH_COMPONENT24; /* front color renderbuffer */ - { - struct radeon_renderbuffer *front = - radeon_create_renderbuffer(rgbFormat, driDrawPriv); - _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &front->base); - front->has_surface = 1; - } + rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv); + _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base); + rfb->color_rb[0]->has_surface = 1; /* back color renderbuffer */ if (mesaVis->doubleBufferMode) { - struct radeon_renderbuffer *back = - radeon_create_renderbuffer(rgbFormat, driDrawPriv); - _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &back->base); - back->has_surface = 1; + rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv); + _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base); + rfb->color_rb[1]->has_surface = 1; } /* depth renderbuffer */ if (depthFormat != GL_NONE) { struct radeon_renderbuffer *depth = radeon_create_renderbuffer(depthFormat, driDrawPriv); - _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth->base); + _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base); depth->has_surface = screen->depthHasSurface; } @@ -1306,18 +1311,18 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, if (mesaVis->stencilBits > 0 && !swStencil) { struct radeon_renderbuffer *stencil = radeon_create_renderbuffer(GL_STENCIL_INDEX8_EXT, driDrawPriv); - _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &stencil->base); + _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &stencil->base); stencil->has_surface = screen->depthHasSurface; } - _mesa_add_soft_renderbuffers(fb, + _mesa_add_soft_renderbuffers(&rfb->base, GL_FALSE, /* color */ swDepth, swStencil, swAccum, swAlpha, GL_FALSE /* aux */); - driDrawPriv->driverPrivate = (void *) fb; + driDrawPriv->driverPrivate = (void *) rfb; return (driDrawPriv->driverPrivate != NULL); } @@ -1325,21 +1330,21 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, static void radeonDestroyBuffer(__DRIdrawablePrivate *driDrawPriv) { - struct radeon_renderbuffer *rb; - GLframebuffer *fb; + struct radeon_renderbuffer *rb; + struct radeon_framebuffer *rfb; - fb = (void*)driDrawPriv->driverPrivate; - rb = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rfb = (void*)driDrawPriv->driverPrivate; + rb = (void *)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rb = (void *)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void *)fb->Attachment[BUFFER_DEPTH].Renderbuffer; + rb = (void *)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; @@ -1541,21 +1546,21 @@ __DRIconfig **radeonInitScreen2(__DRIscreenPrivate *psp) static int getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo ) { - radeonContextPtr rmesa; + struct radeon_framebuffer *rfb; - if ( (dPriv == NULL) || (dPriv->driContextPriv == NULL) - || (dPriv->driContextPriv->driverPrivate == NULL) - || (sInfo == NULL) ) { - return -1; + if ( (dPriv == NULL) || (dPriv->driContextPriv == NULL) + || (dPriv->driContextPriv->driverPrivate == NULL) + || (sInfo == NULL) ) { + return -1; } - rmesa = dPriv->driContextPriv->driverPrivate; - sInfo->swap_count = rmesa->swap_count; - sInfo->swap_ust = rmesa->swap_ust; - sInfo->swap_missed_count = rmesa->swap_missed_count; + rfb = dPriv->driverPrivate; + sInfo->swap_count = rfb->swap_count; + sInfo->swap_ust = rfb->swap_ust; + sInfo->swap_missed_count = rfb->swap_missed_count; sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0) - ? driCalculateSwapUsage( dPriv, 0, rmesa->swap_missed_ust ) + ? driCalculateSwapUsage( dPriv, 0, rfb->swap_missed_ust ) : 0.0; return 0; diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 5fffa286fe..0c92a6ff08 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -1418,6 +1418,8 @@ static void radeonViewport( GLcontext *ctx, GLint x, GLint y, * values, or keep the originals hanging around. */ radeonUpdateWindow( ctx ); + + radeon_viewport(ctx, x, y, width, height); } static void radeonDepthRange( GLcontext *ctx, GLclampd nearval, @@ -1532,50 +1534,6 @@ static void radeonLogicOpCode( GLcontext *ctx, GLenum opcode ) rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = radeon_rop_tab[rop]; } - -/** - * Called via glDrawBuffer. - */ -static void radeonDrawBuffer( GLcontext *ctx, GLenum mode ) -{ - r100ContextPtr rmesa = R100_CONTEXT(ctx); - - if (RADEON_DEBUG & DEBUG_DRI) - fprintf(stderr, "%s %s\n", __FUNCTION__, - _mesa_lookup_enum_by_nr( mode )); - - radeon_firevertices(&rmesa->radeon); /* don't pipeline cliprect changes */ - - if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) { - /* 0 (GL_NONE) buffers or multiple color drawing buffers */ - FALLBACK( rmesa, RADEON_FALLBACK_DRAW_BUFFER, GL_TRUE ); - return; - } - - switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) { - case BUFFER_FRONT_LEFT: - case BUFFER_BACK_LEFT: - FALLBACK( rmesa, RADEON_FALLBACK_DRAW_BUFFER, GL_FALSE ); - break; - default: - FALLBACK( rmesa, RADEON_FALLBACK_DRAW_BUFFER, GL_TRUE ); - return; - } - - radeonSetCliprects( &rmesa->radeon ); - if (!rmesa->radeon.radeonScreen->driScreen->dri2.enabled) - radeonUpdatePageFlipping(&rmesa->radeon); - /* We'll set the drawing engine's offset/pitch parameters later - * when we update other state. - */ -} - -static void radeonReadBuffer( GLcontext *ctx, GLenum mode ) -{ - /* nothing, until we implement h/w glRead/CopyPixels or CopyTexImage */ -} - - /* ============================================================= * State enable/disable */ @@ -2066,42 +2024,16 @@ static void update_texturematrix( GLcontext *ctx ) } -/** - * Tell the card where to render (offset, pitch). - * Effected by glDrawBuffer, etc - */ -void -radeonUpdateDrawBuffer(GLcontext *ctx) -{ - r100ContextPtr rmesa = R100_CONTEXT(ctx); - struct gl_framebuffer *fb = ctx->DrawBuffer; - struct radeon_renderbuffer *rrb; - - if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) { - /* draw to front */ - rrb = (void *) fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; - } else if (fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) { - /* draw to back */ - rrb = (void *) fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; - } else { - /* drawing to multiple buffers, or none */ - return; - } - - assert(rrb); - assert(rrb->pitch); - - RADEON_STATECHANGE( rmesa, ctx ); -} - - void radeonValidateState( GLcontext *ctx ) { r100ContextPtr rmesa = R100_CONTEXT(ctx); GLuint new_state = rmesa->radeon.NewGLState; if (new_state & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) { - radeonUpdateDrawBuffer(ctx); + _mesa_update_framebuffer(ctx); + /* this updates the DrawBuffer's Width/Height if it's a FBO */ + _mesa_update_draw_buffer_bounds(ctx); + RADEON_STATECHANGE(rmesa, ctx); } if (new_state & _NEW_TEXTURE) { -- cgit v1.2.3 From bdaa0341caffc353fd26bbd91865c2d86eed11c1 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 19 Mar 2009 15:31:03 +1000 Subject: radeon/r200/r300: cleanup some of the renderbuffer code --- src/mesa/drivers/dri/r200/r200_texstate.c | 2 +- src/mesa/drivers/dri/r300/r300_texstate.c | 2 +- src/mesa/drivers/dri/radeon/radeon_common.h | 19 +++- .../drivers/dri/radeon/radeon_common_context.c | 114 +++++++++------------ .../drivers/dri/radeon/radeon_common_context.h | 2 + src/mesa/drivers/dri/radeon/radeon_lock.c | 9 -- src/mesa/drivers/dri/radeon/radeon_screen.c | 1 + src/mesa/drivers/dri/radeon/radeon_texstate.c | 2 +- 8 files changed, 71 insertions(+), 80 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c index 4937b0665d..058e0ee5be 100644 --- a/src/mesa/drivers/dri/r200/r200_texstate.c +++ b/src/mesa/drivers/dri/r200/r200_texstate.c @@ -806,7 +806,7 @@ void r200SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv) radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void*)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rb = rfb->color_rb[0]; if (rb->bo == NULL) { /* Failed to BO for the buffer */ return; diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c index 2d7f392e7c..14d470a11c 100644 --- a/src/mesa/drivers/dri/r300/r300_texstate.c +++ b/src/mesa/drivers/dri/r300/r300_texstate.c @@ -425,7 +425,7 @@ void r300SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv) radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void*)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rb = rfb->color_rb[0]; if (rb->bo == NULL) { /* Failed to BO for the buffer */ return; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index 95b718184b..814da1b4f5 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -30,6 +30,23 @@ void radeonDrawBuffer( GLcontext *ctx, GLenum mode ); void radeonReadBuffer( GLcontext *ctx, GLenum mode ); void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height); +static inline struct radeon_renderbuffer *radeon_renderbuffer(struct gl_renderbuffer *rb) +{ + struct radeon_renderbuffer *rrb = (struct radeon_renderbuffer *)rb; + if (rrb && rrb->base.ClassID == RADEON_RB_CLASS) + return rrb; + else + return NULL; +} + +static inline struct radeon_renderbuffer *radeon_get_renderbuffer(struct gl_framebuffer *fb, int att_index) +{ + if (att_index >= 0) + return radeon_renderbuffer(fb->Attachment[att_index].Renderbuffer); + else + return NULL; +} + static inline struct radeon_renderbuffer *radeon_get_depthbuffer(radeonContextPtr rmesa) { struct radeon_renderbuffer *rrb; @@ -47,7 +64,7 @@ static inline struct radeon_renderbuffer *radeon_get_colorbuffer(radeonContextPt rrb = rmesa->state.color.rrb; if (rmesa->radeonScreen->driScreen->dri2.enabled) { - rrb = (struct radeon_renderbuffer *)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rrb = radeon_get_renderbuffer(&rfb->base, BUFFER_BACK_LEFT); } if (!rrb) return NULL; diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index b63aba2f89..a818440faf 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -183,33 +183,33 @@ void radeonCleanupContext(radeonContextPtr radeon) _mesa_destroy_context(radeon->glCtx); rfb = (void*)radeon->dri.drawable->driverPrivate; - rb = (void *)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rb = rfb->color_rb[0]; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void *)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rb = rfb->color_rb[1]; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void *)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; + rb = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH); if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } rfb = (void*)radeon->dri.readable->driverPrivate; - rb = (void *)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rb = rfb->color_rb[0]; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void *)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rb = rfb->color_rb[1]; if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void *)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; + rb = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH); if (rb && rb->bo) { radeon_bo_unref(rb->bo); rb->bo = NULL; @@ -391,6 +391,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) int i, count; struct radeon_framebuffer *draw; radeonContextPtr radeon; + char *regname; if (RADEON_DEBUG & DEBUG_DRI) fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); @@ -399,15 +400,14 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) screen = context->driScreenPriv; radeon = (radeonContextPtr) context->driverPrivate; i = 0; - if ((rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) { + if (draw->color_rb[0]) attachments[i++] = __DRI_BUFFER_FRONT_LEFT; - } - if ((rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer)) { + if (draw->color_rb[1]) attachments[i++] = __DRI_BUFFER_BACK_LEFT; - } - if ((rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer)) { + if (radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH)) attachments[i++] = __DRI_BUFFER_DEPTH; - } + if (radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL)) + attachments[i++] = __DRI_BUFFER_STENCIL; buffers = (*screen->dri2.loader->getBuffers)(drawable, &drawable->w, @@ -436,64 +436,20 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) for (i = 0; i < count; i++) { switch (buffers[i].attachment) { case __DRI_BUFFER_FRONT_LEFT: - rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; - if (rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } - rb->cpp = buffers[i].cpp; - rb->pitch = buffers[i].pitch; - rb->width = drawable->w; - rb->height = drawable->h; - rb->has_surface = 0; - rb->bo = radeon_bo_open(radeon->radeonScreen->bom, - buffers[i].name, - 0, - 0, - RADEON_GEM_DOMAIN_VRAM, - buffers[i].flags); - if (rb->bo == NULL) { - fprintf(stderr, "failled to attach front %d\n", - buffers[i].name); - } + rb = draw->color_rb[0]; + regname = "dri2 front buffer"; break; case __DRI_BUFFER_BACK_LEFT: - rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; - if (rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } - rb->cpp = buffers[i].cpp; - rb->pitch = buffers[i].pitch; - rb->width = drawable->w; - rb->height = drawable->h; - rb->has_surface = 0; - rb->bo = radeon_bo_open(radeon->radeonScreen->bom, - buffers[i].name, - 0, - 0, - RADEON_GEM_DOMAIN_VRAM, - buffers[i].flags); + rb = draw->color_rb[1]; + regname = "dri2 back buffer"; break; case __DRI_BUFFER_DEPTH: - rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer; - if (rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } - rb->cpp = buffers[i].cpp; - rb->pitch = buffers[i].pitch; - rb->width = drawable->w; - rb->height = drawable->h; - rb->has_surface = 0; - rb->bo = radeon_bo_open(radeon->radeonScreen->bom, - buffers[i].name, - 0, - 0, - RADEON_GEM_DOMAIN_VRAM, - buffers[i].flags); + rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH); + regname = "dri2 depth buffer"; break; case __DRI_BUFFER_STENCIL: + rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH); + regname = "dri2 stencil buffer"; break; case __DRI_BUFFER_ACCUM: default: @@ -502,8 +458,32 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) buffers[i].attachment); return; } + + if (rb == NULL) + continue; + + if (rb->bo) { + radeon_bo_unref(rb->bo); + rb->bo = NULL; + } + rb->cpp = buffers[i].cpp; + rb->pitch = buffers[i].pitch; + rb->width = drawable->w; + rb->height = drawable->h; + rb->has_surface = 0; + rb->bo = radeon_bo_open(radeon->radeonScreen->bom, + buffers[i].name, + 0, + 0, + RADEON_GEM_DOMAIN_VRAM, + buffers[i].flags); + if (rb->bo == NULL) { + fprintf(stderr, "failed to attach %s %d\n", + regname, buffers[i].name); + + } } - radeon = (radeonContextPtr) context->driverPrivate; + driUpdateFramebufferSize(radeon->glCtx, drawable); } @@ -534,9 +514,9 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, if (driDrawPriv != driReadPriv) radeon_update_renderbuffers(driContextPriv, driReadPriv); radeon->state.color.rrb = - (void *)drfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; + radeon_get_renderbuffer(&drfb->base, BUFFER_BACK_LEFT); radeon->state.depth.rrb = - (void *)drfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; + radeon_get_renderbuffer(&drfb->base, BUFFER_DEPTH); } else { radeon_make_renderbuffer_current(radeon, drfb); } diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index 4aeb50fe68..e5ada622b0 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -70,6 +70,8 @@ typedef struct radeon_context *radeonContextPtr; #include "tnl_dd/t_dd_vertex.h" #undef TAG +#define RADEON_RB_CLASS 0xdeadbeef + struct radeon_renderbuffer { struct gl_renderbuffer base; diff --git a/src/mesa/drivers/dri/radeon/radeon_lock.c b/src/mesa/drivers/dri/radeon/radeon_lock.c index fb9e5e025e..e1bb2cd6e2 100644 --- a/src/mesa/drivers/dri/radeon/radeon_lock.c +++ b/src/mesa/drivers/dri/radeon/radeon_lock.c @@ -90,15 +90,6 @@ void radeonGetLock(radeonContextPtr rmesa, GLuint flags) rmesa->lost_context = GL_TRUE; } -static INLINE struct radeon_renderbuffer * -radeon_get_renderbuffer(struct gl_framebuffer *fb, int attIndex) -{ - if (attIndex >= 0) - return (struct radeon_renderbuffer *)fb->Attachment[attIndex].Renderbuffer; - else - return NULL; -} - void radeon_lock_hardware(radeonContextPtr radeon) { __DRIdrawable *dPriv = radeon->dri.drawable; diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index e90dffd766..02101978ac 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -1197,6 +1197,7 @@ radeon_create_renderbuffer(GLenum format, __DRIdrawablePrivate *driDrawPriv) return NULL; _mesa_init_renderbuffer(&ret->base, 0); + ret->base.ClassID = RADEON_RB_CLASS; /* XXX format junk */ switch (format) { diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c index 06771a359b..b9adab18d4 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texstate.c +++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c @@ -678,7 +678,7 @@ void radeonSetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPri radeon_bo_unref(rb->bo); rb->bo = NULL; } - rb = (void*)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rb = rfb->color_rb[0]; if (rb->bo == NULL) { /* Failed to BO for the buffer */ return; -- cgit v1.2.3 From fabce837f9740df2553b6cc0dd991b2cb8b8fc5b Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 20 Mar 2009 18:23:38 +1000 Subject: radeon: initial couch code copy from radeon --- src/mesa/drivers/dri/r300/Makefile | 6 +- src/mesa/drivers/dri/radeon/radeon_common.h | 2 + src/mesa/drivers/dri/radeon/radeon_fbo.c | 193 ++++++++++++++++++++++++++++ 3 files changed, 199 insertions(+), 2 deletions(-) create mode 100644 src/mesa/drivers/dri/radeon/radeon_fbo.c (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile index 497b1ec528..0dff9a1273 100644 --- a/src/mesa/drivers/dri/r300/Makefile +++ b/src/mesa/drivers/dri/r300/Makefile @@ -31,7 +31,8 @@ RADEON_COMMON_SOURCES = \ radeon_bo_legacy.c \ radeon_cs_legacy.c \ radeon_mipmap_tree.c \ - radeon_span.c + radeon_span.c \ + radeon_fbo.c DRIVER_SOURCES = \ radeon_screen.c \ @@ -96,7 +97,8 @@ COMMON_SYMLINKS = \ radeon_mipmap_tree.c \ radeon_mipmap_tree.h \ radeon_texture.c \ - radeon_texture.h + radeon_texture.h \ + radeon_fbo.c DRI_LIB_DEPS += $(RADEON_LDFLAGS) diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index 814da1b4f5..d3eee7d888 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -30,6 +30,8 @@ void radeonDrawBuffer( GLcontext *ctx, GLenum mode ); void radeonReadBuffer( GLcontext *ctx, GLenum mode ); void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height); +void radeon_fbo_init(struct radeon_context *radeon); + static inline struct radeon_renderbuffer *radeon_renderbuffer(struct gl_renderbuffer *rb) { struct radeon_renderbuffer *rrb = (struct radeon_renderbuffer *)rb; diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c new file mode 100644 index 0000000000..56e5cbcbc8 --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -0,0 +1,193 @@ +/************************************************************************** + * + * Copyright 2008 Red Hat Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +#include "main/imports.h" +#include "main/macros.h" +#include "main/mtypes.h" +#include "main/fbobject.h" +#include "main/framebuffer.h" +#include "main/renderbuffer.h" +#include "main/context.h" +#include "main/texformat.h" +#include "main/texrender.h" + +#include "radeon_common.h" + +static struct gl_framebuffer * +radeon_new_framebuffer(GLcontext *ctx, GLuint name) +{ + return _mesa_new_framebuffer(ctx, name); +} + +static void +radeon_delete_renderbuffer(struct gl_renderbuffer *rb) +{ + GET_CURRENT_CONTEXT(ctx); + struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb); + + ASSERT(rrb); + + if (rrb && rrb->bo) { + radeon_bo_unref(rrb->bo); + } + + + _mesa_free(rrb); +} + +static void +radeon_resize_buffers(GLcontext *ctx, struct gl_framebuffer *fb, + GLuint width, GLuint height) +{ + +} + +static void * +radeon_get_pointer(GLcontext *ctx, struct gl_renderbuffer *rb, + GLint x, GLint y) +{ + return NULL; +} + +/** + * Called via glRenderbufferStorageEXT() to set the format and allocate + * storage for a user-created renderbuffer. + */ +static GLboolean +radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, + GLenum internalFormat, + GLuint width, GLuint height) +{ + struct radeon_context *radeon = RADEON_CONTEXT(ctx); + struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb); + GLboolean software_buffer = GL_FALSE; + int cpp; + + ASSERT(rb->Name != 0); + + if (software_buffer) { + return _mesa_soft_renderbuffer_storage(ctx, rb, internalFormat, + width, height); + } + else { + /* TODO Alloc a BO */ + return GL_TRUE; + } + +} + +static struct gl_renderbuffer * +radeon_new_renderbuffer(GLcontext * ctx, GLuint name) +{ + struct radeon_renderbuffer *rrb; + + rrb = CALLOC_STRUCT(radeon_renderbuffer); + if (!rrb) + return NULL; + + _mesa_init_renderbuffer(&rrb->base, name); + rrb->base.ClassID = RADEON_RB_CLASS; + + rrb->base.Delete = radeon_delete_renderbuffer; + rrb->base.AllocStorage = radeon_alloc_renderbuffer_storage; + rrb->base.GetPointer = radeon_get_pointer; + + return &rrb->base; +} + +static void +radeon_bind_framebuffer(GLcontext * ctx, GLenum target, + struct gl_framebuffer *fb, struct gl_framebuffer *fbread) +{ + if (target == GL_FRAMEBUFFER_EXT || target == GL_DRAW_FRAMEBUFFER_EXT) { + radeon_draw_buffer(ctx, fb); + } + else { + /* don't need to do anything if target == GL_READ_FRAMEBUFFER_EXT */ + } +} + +static void +radeon_framebuffer_renderbuffer(GLcontext * ctx, + struct gl_framebuffer *fb, + GLenum attachment, struct gl_renderbuffer *rb) +{ + + radeonFlush(ctx); + + _mesa_framebuffer_renderbuffer(ctx, fb, attachment, rb); + radeon_draw_buffer(ctx, fb); +} + +static struct radeon_renderbuffer * +radeon_wrap_texture(GLcontext * ctx, struct gl_texture_image *texImage) +{ + +} +static void +radeon_render_texture(GLcontext * ctx, + struct gl_framebuffer *fb, + struct gl_renderbuffer_attachment *att) +{ + +} + +static void +radeon_finish_render_texture(GLcontext * ctx, + struct gl_renderbuffer_attachment *att) +{ + +} +static void +radeon_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb) +{ +} + +static void +radeon_blit_framebuffer(GLcontext *ctx, + GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, + GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, + GLbitfield mask, GLenum filter) +{ +} + +void radeon_fbo_init(struct radeon_context *radeon) +{ + radeon->glCtx->Driver.NewFramebuffer = radeon_new_framebuffer; + radeon->glCtx->Driver.NewRenderbuffer = radeon_new_renderbuffer; + radeon->glCtx->Driver.BindFramebuffer = radeon_bind_framebuffer; + radeon->glCtx->Driver.FramebufferRenderbuffer = radeon_framebuffer_renderbuffer; + radeon->glCtx->Driver.RenderTexture = radeon_render_texture; + radeon->glCtx->Driver.FinishRenderTexture = radeon_finish_render_texture; + radeon->glCtx->Driver.ResizeBuffers = radeon_resize_buffers; + radeon->glCtx->Driver.ValidateFramebuffer = radeon_validate_framebuffer; + radeon->glCtx->Driver.BlitFramebuffer = radeon_blit_framebuffer; +} + + + -- cgit v1.2.3 From 230abc06f817b5d9868f7e6a094f56bb3294b476 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 20 Mar 2009 22:07:05 +1000 Subject: radeon: some more fbo work --- src/mesa/drivers/dri/radeon/radeon_common.h | 3 +- src/mesa/drivers/dri/radeon/radeon_fbo.c | 302 +++++++++++++++++++++++++++- src/mesa/drivers/dri/radeon/radeon_screen.c | 95 +-------- 3 files changed, 303 insertions(+), 97 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index d3eee7d888..a3fea28a29 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -31,7 +31,8 @@ void radeonReadBuffer( GLcontext *ctx, GLenum mode ); void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height); void radeon_fbo_init(struct radeon_context *radeon); - +struct gl_renderbuffer * +radeon_create_renderbuffer(GLenum format, __DRIdrawablePrivate *driDrawPriv); static inline struct radeon_renderbuffer *radeon_renderbuffer(struct gl_renderbuffer *rb) { struct radeon_renderbuffer *rrb = (struct radeon_renderbuffer *)rb; diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index 56e5cbcbc8..649f88a061 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -38,6 +38,12 @@ #include "radeon_common.h" +#define FILE_DEBUG_FLAG DEBUG_TEXTURE +#define DBG(...) do { \ + if (RADEON_DEBUG & FILE_DEBUG_FLAG) \ + _mesa_printf(__VA_ARGS__); \ +} while(0) + static struct gl_framebuffer * radeon_new_framebuffer(GLcontext *ctx, GLuint name) { @@ -60,13 +66,6 @@ radeon_delete_renderbuffer(struct gl_renderbuffer *rb) _mesa_free(rrb); } -static void -radeon_resize_buffers(GLcontext *ctx, struct gl_framebuffer *fb, - GLuint width, GLuint height) -{ - -} - static void * radeon_get_pointer(GLcontext *ctx, struct gl_renderbuffer *rb, GLint x, GLint y) @@ -89,18 +88,236 @@ radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, int cpp; ASSERT(rb->Name != 0); + switch (internalFormat) { + case GL_R3_G3_B2: + case GL_RGB4: + case GL_RGB5: + rb->_ActualFormat = GL_RGB5; + rb->DataType = GL_UNSIGNED_BYTE; + rb->RedBits = 5; + rb->GreenBits = 6; + rb->BlueBits = 5; + cpp = 2; + break; + case GL_RGB: + case GL_RGB8: + case GL_RGB10: + case GL_RGB12: + case GL_RGB16: + rb->_ActualFormat = GL_RGB8; + rb->DataType = GL_UNSIGNED_BYTE; + rb->RedBits = 8; + rb->GreenBits = 8; + rb->BlueBits = 8; + rb->AlphaBits = 0; + cpp = 4; + break; + case GL_RGBA: + case GL_RGBA2: + case GL_RGBA4: + case GL_RGB5_A1: + case GL_RGBA8: + case GL_RGB10_A2: + case GL_RGBA12: + case GL_RGBA16: + rb->_ActualFormat = GL_RGBA8; + rb->DataType = GL_UNSIGNED_BYTE; + rb->RedBits = 8; + rb->GreenBits = 8; + rb->BlueBits = 8; + rb->AlphaBits = 8; + cpp = 4; + break; + case GL_STENCIL_INDEX: + case GL_STENCIL_INDEX1_EXT: + case GL_STENCIL_INDEX4_EXT: + case GL_STENCIL_INDEX8_EXT: + case GL_STENCIL_INDEX16_EXT: + /* alloc a depth+stencil buffer */ + rb->_ActualFormat = GL_DEPTH24_STENCIL8_EXT; + rb->DataType = GL_UNSIGNED_INT_24_8_EXT; + rb->StencilBits = 8; + cpp = 4; + break; + case GL_DEPTH_COMPONENT16: + rb->_ActualFormat = GL_DEPTH_COMPONENT16; + rb->DataType = GL_UNSIGNED_SHORT; + rb->DepthBits = 16; + cpp = 2; + break; + case GL_DEPTH_COMPONENT: + case GL_DEPTH_COMPONENT24: + case GL_DEPTH_COMPONENT32: + rb->_ActualFormat = GL_DEPTH24_STENCIL8_EXT; + rb->DataType = GL_UNSIGNED_INT_24_8_EXT; + rb->DepthBits = 24; + cpp = 4; + break; + case GL_DEPTH_STENCIL_EXT: + case GL_DEPTH24_STENCIL8_EXT: + rb->_ActualFormat = GL_DEPTH24_STENCIL8_EXT; + rb->DataType = GL_UNSIGNED_INT_24_8_EXT; + rb->DepthBits = 24; + rb->StencilBits = 8; + cpp = 4; + break; + default: + _mesa_problem(ctx, + "Unexpected format in intel_alloc_renderbuffer_storage"); + return GL_FALSE; + } + radeonFlush(ctx); + + if (rrb->bo) + radeon_bo_unref(rrb->bo); + + if (software_buffer) { return _mesa_soft_renderbuffer_storage(ctx, rb, internalFormat, width, height); } else { /* TODO Alloc a BO */ + + // rrb->bo = radeon_bo_open(); + rb->Width = width; + rb->Height = height; return GL_TRUE; } } + +/** + * Called for each hardware renderbuffer when a _window_ is resized. + * Just update fields. + * Not used for user-created renderbuffers! + */ +static GLboolean +radeon_alloc_window_storage(GLcontext * ctx, struct gl_renderbuffer *rb, + GLenum internalFormat, GLuint width, GLuint height) +{ + ASSERT(rb->Name == 0); + rb->Width = width; + rb->Height = height; + rb->_ActualFormat = internalFormat; + + return GL_TRUE; +} + + +static void +radeon_resize_buffers(GLcontext *ctx, struct gl_framebuffer *fb, + GLuint width, GLuint height) +{ + struct radeon_framebuffer *radeon_fb = (struct radeon_framebuffer*)fb; + int i; + + _mesa_resize_framebuffer(ctx, fb, width, height); + + fb->Initialized = GL_TRUE; /* XXX remove someday */ + + if (fb->Name != 0) { + return; + } + + /* Make sure all window system renderbuffers are up to date */ + for (i = 0; i < 2; i++) { + struct gl_renderbuffer *rb = &radeon_fb->color_rb[i]->base; + + /* only resize if size is changing */ + if (rb && (rb->Width != width || rb->Height != height)) { + rb->AllocStorage(ctx, rb, rb->InternalFormat, width, height); + } + } +} + + +/** Dummy function for gl_renderbuffer::AllocStorage() */ +static GLboolean +radeon_nop_alloc_storage(GLcontext * ctx, struct gl_renderbuffer *rb, + GLenum internalFormat, GLuint width, GLuint height) +{ + _mesa_problem(ctx, "radeon_op_alloc_storage should never be called."); + return GL_FALSE; +} + +struct gl_renderbuffer * +radeon_create_renderbuffer(GLenum format, __DRIdrawablePrivate *driDrawPriv) +{ + struct radeon_renderbuffer *rrb; + + rrb = CALLOC_STRUCT(radeon_renderbuffer); + if (!rrb) + return NULL; + + _mesa_init_renderbuffer(&rrb->base, 0); + rrb->base.ClassID = RADEON_RB_CLASS; + + /* XXX format junk */ + switch (format) { + case GL_RGB5: + rrb->base._ActualFormat = GL_RGB5; + rrb->base._BaseFormat = GL_RGBA; + rrb->base.RedBits = 5; + rrb->base.GreenBits = 6; + rrb->base.BlueBits = 5; + rrb->base.DataType = GL_UNSIGNED_BYTE; + break; + case GL_RGBA8: + rrb->base._ActualFormat = GL_RGBA8; + rrb->base._BaseFormat = GL_RGBA; + rrb->base.RedBits = 8; + rrb->base.GreenBits = 8; + rrb->base.BlueBits = 8; + rrb->base.AlphaBits = 8; + rrb->base.DataType = GL_UNSIGNED_BYTE; + break; + case GL_STENCIL_INDEX8_EXT: + rrb->base._ActualFormat = GL_STENCIL_INDEX8_EXT; + rrb->base._BaseFormat = GL_STENCIL_INDEX; + rrb->base.StencilBits = 8; + rrb->base.DataType = GL_UNSIGNED_BYTE; + break; + case GL_DEPTH_COMPONENT16: + rrb->base._ActualFormat = GL_DEPTH_COMPONENT16; + rrb->base._BaseFormat = GL_DEPTH_COMPONENT; + rrb->base.DepthBits = 16; + rrb->base.DataType = GL_UNSIGNED_SHORT; + break; + case GL_DEPTH_COMPONENT24: + rrb->base._ActualFormat = GL_DEPTH24_STENCIL8_EXT; + rrb->base._BaseFormat = GL_DEPTH_COMPONENT; + rrb->base.DepthBits = 24; + rrb->base.DataType = GL_UNSIGNED_INT; + break; + case GL_DEPTH24_STENCIL8_EXT: + rrb->base._ActualFormat = GL_DEPTH24_STENCIL8_EXT; + rrb->base._BaseFormat = GL_DEPTH_STENCIL_EXT; + rrb->base.DepthBits = 24; + rrb->base.StencilBits = 8; + rrb->base.DataType = GL_UNSIGNED_INT_24_8_EXT; + break; + default: + fprintf(stderr, "%s: Unknown format 0x%04x\n", __FUNCTION__, format); + _mesa_delete_renderbuffer(&rrb->base); + return NULL; + } + + rrb->dPriv = driDrawPriv; + rrb->base.InternalFormat = format; + + rrb->base.Delete = radeon_delete_renderbuffer; + rrb->base.AllocStorage = radeon_alloc_window_storage; + rrb->base.GetPointer = radeon_get_pointer; + + radeonSetSpanFunctions(rrb); + + rrb->bo = NULL; + return &rrb->base; +} + static struct gl_renderbuffer * radeon_new_renderbuffer(GLcontext * ctx, GLuint name) { @@ -120,6 +337,7 @@ radeon_new_renderbuffer(GLcontext * ctx, GLuint name) return &rrb->base; } + static void radeon_bind_framebuffer(GLcontext * ctx, GLenum target, struct gl_framebuffer *fb, struct gl_framebuffer *fbread) @@ -144,10 +362,80 @@ radeon_framebuffer_renderbuffer(GLcontext * ctx, radeon_draw_buffer(ctx, fb); } + +static GLboolean +radeon_update_wrapper(GLcontext *ctx, struct radeon_renderbuffer *rrb, + struct gl_texture_image *texImage) +{ + if (texImage->TexFormat == &_mesa_texformat_argb8888) { + rrb->base._ActualFormat = GL_RGBA8; + rrb->base._BaseFormat = GL_RGBA; + rrb->base.DataType = GL_UNSIGNED_BYTE; + DBG("Render to RGBA8 texture OK\n"); + } + else if (texImage->TexFormat == &_mesa_texformat_rgb565) { + rrb->base._ActualFormat = GL_RGB5; + rrb->base._BaseFormat = GL_RGB; + rrb->base.DataType = GL_UNSIGNED_SHORT; + DBG("Render to RGB5 texture OK\n"); + } + else if (texImage->TexFormat == &_mesa_texformat_z16) { + rrb->base._ActualFormat = GL_DEPTH_COMPONENT16; + rrb->base._BaseFormat = GL_DEPTH_COMPONENT; + rrb->base.DataType = GL_UNSIGNED_SHORT; + DBG("Render to DEPTH16 texture OK\n"); + } + else if (texImage->TexFormat == &_mesa_texformat_s8_z24) { + rrb->base._ActualFormat = GL_DEPTH24_STENCIL8_EXT; + rrb->base._BaseFormat = GL_DEPTH_STENCIL_EXT; + rrb->base.DataType = GL_UNSIGNED_INT_24_8_EXT; + DBG("Render to DEPTH_STENCIL texture OK\n"); + } + else { + DBG("Render to texture BAD FORMAT %d\n", + texImage->TexFormat->MesaFormat); + return GL_FALSE; + } + + rrb->base.InternalFormat = rrb->base._ActualFormat; + rrb->base.Width = texImage->Width; + rrb->base.Height = texImage->Height; + rrb->base.RedBits = texImage->TexFormat->RedBits; + rrb->base.GreenBits = texImage->TexFormat->GreenBits; + rrb->base.BlueBits = texImage->TexFormat->BlueBits; + rrb->base.AlphaBits = texImage->TexFormat->AlphaBits; + rrb->base.DepthBits = texImage->TexFormat->DepthBits; + + rrb->base.Delete = radeon_delete_renderbuffer; + rrb->base.AllocStorage = radeon_nop_alloc_storage; + + return GL_TRUE; +} + + static struct radeon_renderbuffer * radeon_wrap_texture(GLcontext * ctx, struct gl_texture_image *texImage) { + const GLuint name = ~0; /* not significant, but distinct for debugging */ + struct radeon_renderbuffer *rrb; + + /* make an radeon_renderbuffer to wrap the texture image */ + rrb = CALLOC_STRUCT(radeon_renderbuffer); + if (!rrb) { + _mesa_error(ctx, GL_OUT_OF_MEMORY, "glFramebufferTexture"); + return NULL; + } + _mesa_init_renderbuffer(&rrb->base, name); + rrb->base.ClassID = RADEON_RB_CLASS; + + if (!radeon_update_wrapper(ctx, rrb, texImage)) { + _mesa_free(rrb); + return NULL; + } + + return rrb; + } static void radeon_render_texture(GLcontext * ctx, diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 1d4f008cbc..a14a0c3cb2 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -1175,90 +1175,7 @@ radeonInitDriver( __DRIscreenPrivate *sPriv ) return GL_TRUE; } -static GLboolean -radeon_alloc_window_storage(GLcontext *ctx, struct gl_renderbuffer *rb, - GLenum intFormat, GLuint w, GLuint h) -{ - rb->Width = w; - rb->Height = h; - rb->_ActualFormat = intFormat; - - return GL_TRUE; -} - - -static struct radeon_renderbuffer * -radeon_create_renderbuffer(GLenum format, __DRIdrawablePrivate *driDrawPriv) -{ - struct radeon_renderbuffer *ret; - ret = CALLOC_STRUCT(radeon_renderbuffer); - if (!ret) - return NULL; - - _mesa_init_renderbuffer(&ret->base, 0); - ret->base.ClassID = RADEON_RB_CLASS; - - /* XXX format junk */ - switch (format) { - case GL_RGB5: - ret->base._ActualFormat = GL_RGB5; - ret->base._BaseFormat = GL_RGBA; - ret->base.RedBits = 5; - ret->base.GreenBits = 6; - ret->base.BlueBits = 5; - ret->base.DataType = GL_UNSIGNED_BYTE; - break; - case GL_RGBA8: - ret->base._ActualFormat = GL_RGBA8; - ret->base._BaseFormat = GL_RGBA; - ret->base.RedBits = 8; - ret->base.GreenBits = 8; - ret->base.BlueBits = 8; - ret->base.AlphaBits = 8; - ret->base.DataType = GL_UNSIGNED_BYTE; - break; - case GL_STENCIL_INDEX8_EXT: - ret->base._ActualFormat = GL_STENCIL_INDEX8_EXT; - ret->base._BaseFormat = GL_STENCIL_INDEX; - ret->base.StencilBits = 8; - ret->base.DataType = GL_UNSIGNED_BYTE; - break; - case GL_DEPTH_COMPONENT16: - ret->base._ActualFormat = GL_DEPTH_COMPONENT16; - ret->base._BaseFormat = GL_DEPTH_COMPONENT; - ret->base.DepthBits = 16; - ret->base.DataType = GL_UNSIGNED_SHORT; - break; - case GL_DEPTH_COMPONENT24: - ret->base._ActualFormat = GL_DEPTH24_STENCIL8_EXT; - ret->base._BaseFormat = GL_DEPTH_COMPONENT; - ret->base.DepthBits = 24; - ret->base.DataType = GL_UNSIGNED_INT; - break; - case GL_DEPTH24_STENCIL8_EXT: - ret->base._ActualFormat = GL_DEPTH24_STENCIL8_EXT; - ret->base._BaseFormat = GL_DEPTH_STENCIL_EXT; - ret->base.DepthBits = 24; - ret->base.StencilBits = 8; - ret->base.DataType = GL_UNSIGNED_INT_24_8_EXT; - break; - default: - fprintf(stderr, "%s: Unknown format 0x%04x\n", __FUNCTION__, format); - _mesa_delete_renderbuffer(&ret->base); - return NULL; - } - - ret->dPriv = driDrawPriv; - ret->base.InternalFormat = format; - - ret->base.AllocStorage = radeon_alloc_window_storage; - - radeonSetSpanFunctions(ret); - - ret->bo = NULL; - return ret; -} /** * Create the Mesa framebuffer and renderbuffers for a given window/drawable. @@ -1298,29 +1215,29 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, depthFormat = GL_DEPTH_COMPONENT24; /* front color renderbuffer */ - rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv); + rfb->color_rb[0] = radeon_renderbuffer(radeon_create_renderbuffer(rgbFormat, driDrawPriv)); _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base); rfb->color_rb[0]->has_surface = 1; /* back color renderbuffer */ if (mesaVis->doubleBufferMode) { - rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv); + rfb->color_rb[1] = radeon_renderbuffer(radeon_create_renderbuffer(rgbFormat, driDrawPriv)); _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base); rfb->color_rb[1]->has_surface = 1; } /* depth renderbuffer */ if (depthFormat != GL_NONE) { - struct radeon_renderbuffer *depth = - radeon_create_renderbuffer(depthFormat, driDrawPriv); + struct radeon_renderbuffer *depth = radeon_renderbuffer( + radeon_create_renderbuffer(depthFormat, driDrawPriv)); _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base); depth->has_surface = screen->depthHasSurface; } /* stencil renderbuffer */ if (mesaVis->stencilBits > 0 && !swStencil) { - struct radeon_renderbuffer *stencil = - radeon_create_renderbuffer(GL_STENCIL_INDEX8_EXT, driDrawPriv); + struct radeon_renderbuffer *stencil = radeon_renderbuffer( + radeon_create_renderbuffer(GL_STENCIL_INDEX8_EXT, driDrawPriv)); _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &stencil->base); stencil->has_surface = screen->depthHasSurface; } -- cgit v1.2.3 From 9368dcb426a97e8fb628b712ac74c7c808a79b9b Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sat, 21 Mar 2009 16:08:20 +1000 Subject: radeon: fixup span code for FBOs --- src/mesa/drivers/dri/radeon/radeon_common.c | 8 ++--- src/mesa/drivers/dri/radeon/radeon_common.h | 4 +++ src/mesa/drivers/dri/radeon/radeon_span.c | 47 ++++++++++++++++++++++------- 3 files changed, 44 insertions(+), 15 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 840233ff89..4d7f91e356 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -132,10 +132,10 @@ void radeonRecalcScissorRects(radeonContextPtr radeon) } } -static void radeon_get_cliprects(radeonContextPtr radeon, - struct drm_clip_rect **cliprects, - unsigned int *num_cliprects, - int *x_off, int *y_off) +void radeon_get_cliprects(radeonContextPtr radeon, + struct drm_clip_rect **cliprects, + unsigned int *num_cliprects, + int *x_off, int *y_off) { __DRIdrawablePrivate *dPriv = radeon->dri.drawable; struct radeon_framebuffer *rfb = dPriv->driverPrivate; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index a3fea28a29..528ea9dce4 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -29,6 +29,10 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb); void radeonDrawBuffer( GLcontext *ctx, GLenum mode ); void radeonReadBuffer( GLcontext *ctx, GLenum mode ); void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height); +void radeon_get_cliprects(radeonContextPtr radeon, + struct drm_clip_rect **cliprects, + unsigned int *num_cliprects, + int *x_off, int *y_off); void radeon_fbo_init(struct radeon_context *radeon); struct gl_renderbuffer * diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c index 503a1e0b86..7ad170a939 100644 --- a/src/mesa/drivers/dri/radeon/radeon_span.c +++ b/src/mesa/drivers/dri/radeon/radeon_span.c @@ -197,25 +197,48 @@ static GLubyte *radeon_ptr(const struct radeon_renderbuffer * rrb, * information. */ #define LOCAL_VARS \ + struct radeon_context *radeon = RADEON_CONTEXT(ctx); \ struct radeon_renderbuffer *rrb = (void *) rb; \ - const __DRIdrawablePrivate *dPriv = rrb->dPriv; \ - const GLuint bottom = dPriv->h - 1; \ + const GLint yScale = ctx->DrawBuffer->Name ? 1 : -1; \ + const GLint yBias = ctx->DrawBuffer->Name ? 0 : rrb->base.Height - 1;\ + unsigned int num_cliprects; \ + struct drm_clip_rect *cliprects; \ + int x_off, y_off; \ GLuint p; \ - (void)p; + (void)p; \ + radeon_get_cliprects(radeon, &cliprects, &num_cliprects, &x_off, &y_off); #define LOCAL_DEPTH_VARS \ + struct radeon_context *radeon = RADEON_CONTEXT(ctx); \ struct radeon_renderbuffer *rrb = (void *) rb; \ - const __DRIdrawablePrivate *dPriv = rrb->dPriv; \ - const GLuint bottom = dPriv->h - 1; + const GLint yScale = ctx->DrawBuffer->Name ? 1 : -1; \ + const GLint yBias = ctx->DrawBuffer->Name ? 0 : rrb->base.Height - 1;\ + unsigned int num_cliprects; \ + struct drm_clip_rect *cliprects; \ + int x_off, y_off; \ + radeon_get_cliprects(radeon, &cliprects, &num_cliprects, &x_off, &y_off); #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS -#define Y_FLIP(Y) (bottom - (Y)) +#define Y_FLIP(_y) ((_y) * yScale + yBias) #define HW_LOCK() #define HW_UNLOCK() +/* XXX FBO: this is identical to the macro in spantmp2.h except we get + * the cliprect info from the context, not the driDrawable. + * Move this into spantmp2.h someday. + */ +#define HW_CLIPLOOP() \ + do { \ + int _nc = num_cliprects; \ + while ( _nc-- ) { \ + int minx = cliprects[_nc].x1 - x_off; \ + int miny = cliprects[_nc].y1 - y_off; \ + int maxx = cliprects[_nc].x2 - x_off; \ + int maxy = cliprects[_nc].y2 - y_off; + /* ================================================================ * Color buffer */ @@ -454,15 +477,17 @@ void radeonInitSpanFuncs(GLcontext * ctx) */ static void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb) { - if (rrb->base.InternalFormat == GL_RGB5) { + if (rrb->base._ActualFormat == GL_RGB5) { radeonInitPointers_RGB565(&rrb->base); - } else if (rrb->base.InternalFormat == GL_RGBA8) { + } else if (rrb->base._ActualFormat == GL_RGB8) { + radeonInitPointers_ARGB8888(&rrb->base); + } else if (rrb->base._ActualFormat == GL_RGBA8) { radeonInitPointers_ARGB8888(&rrb->base); - } else if (rrb->base.InternalFormat == GL_DEPTH_COMPONENT16) { + } else if (rrb->base._ActualFormat == GL_DEPTH_COMPONENT16) { radeonInitDepthPointers_z16(&rrb->base); - } else if (rrb->base.InternalFormat == GL_DEPTH_COMPONENT24) { + } else if (rrb->base._ActualFormat == GL_DEPTH_COMPONENT24) { radeonInitDepthPointers_z24_s8(&rrb->base); - } else if (rrb->base.InternalFormat == GL_STENCIL_INDEX8_EXT) { + } else if (rrb->base._ActualFormat == GL_STENCIL_INDEX8_EXT) { radeonInitStencilPointers_z24_s8(&rrb->base); } } -- cgit v1.2.3 From 218083c542138dc2271b83450f556a6146144f75 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sat, 21 Mar 2009 22:38:28 +1100 Subject: radeon: dri2 is hooked up elsewhere now --- src/mesa/drivers/dri/radeon/radeon_common.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index 528ea9dce4..c97492d742 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -67,12 +67,8 @@ static inline struct radeon_renderbuffer *radeon_get_depthbuffer(radeonContextPt static inline struct radeon_renderbuffer *radeon_get_colorbuffer(radeonContextPtr rmesa) { struct radeon_renderbuffer *rrb; - struct radeon_framebuffer *rfb = rmesa->dri.drawable->driverPrivate; rrb = rmesa->state.color.rrb; - if (rmesa->radeonScreen->driScreen->dri2.enabled) { - rrb = radeon_get_renderbuffer(&rfb->base, BUFFER_BACK_LEFT); - } if (!rrb) return NULL; return rrb; -- cgit v1.2.3 From 8c7e30fb950c83f5e9e29e60735e999ac608145a Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 23 Mar 2009 18:27:49 +1000 Subject: raedon/r200/r300: mega-FBO commits. Re work depth issues. Do a lot more FBO abstactions fixup depth/stencil buffer interactions --- src/mesa/drivers/dri/r200/r200_context.c | 10 + src/mesa/drivers/dri/r200/r200_context.h | 15 -- src/mesa/drivers/dri/r200/r200_ioctl.c | 230 +--------------- src/mesa/drivers/dri/r200/r200_state.c | 31 ++- src/mesa/drivers/dri/r200/r200_state_init.c | 6 - src/mesa/drivers/dri/r300/r300_context.c | 9 +- src/mesa/drivers/dri/r300/r300_ioctl.c | 139 ++++++---- src/mesa/drivers/dri/r300/r300_state.c | 31 +-- src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h | 5 +- src/mesa/drivers/dri/radeon/radeon_common.c | 297 +++++++++++++++++++-- src/mesa/drivers/dri/radeon/radeon_common.h | 19 +- .../drivers/dri/radeon/radeon_common_context.c | 49 +++- .../drivers/dri/radeon/radeon_common_context.h | 22 +- src/mesa/drivers/dri/radeon/radeon_context.c | 9 + src/mesa/drivers/dri/radeon/radeon_context.h | 14 - src/mesa/drivers/dri/radeon/radeon_fbo.c | 27 +- src/mesa/drivers/dri/radeon/radeon_ioctl.c | 217 +-------------- src/mesa/drivers/dri/radeon/radeon_screen.c | 40 +-- src/mesa/drivers/dri/radeon/radeon_span.c | 83 +++--- src/mesa/drivers/dri/radeon/radeon_state.c | 31 ++- src/mesa/drivers/dri/radeon/radeon_state_init.c | 6 - 21 files changed, 605 insertions(+), 685 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c index bf06c419d1..6fd0575898 100644 --- a/src/mesa/drivers/dri/r200/r200_context.c +++ b/src/mesa/drivers/dri/r200/r200_context.c @@ -72,6 +72,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define need_GL_EXT_blend_func_separate #define need_GL_NV_vertex_program #define need_GL_ARB_point_parameters +#define need_GL_EXT_framebuffer_object #include "extension_helper.h" #define DRIVER_DATE "20060602" @@ -124,6 +125,7 @@ const struct dri_extension card_extensions[] = { "GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions }, { "GL_EXT_blend_subtract", NULL }, { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions }, + { "GL_EXT_packed_depth_stencil", NULL}, { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions }, { "GL_EXT_stencil_wrap", NULL }, { "GL_EXT_texture_edge_clamp", NULL }, @@ -165,6 +167,11 @@ const struct dri_extension point_extensions[] = { { NULL, NULL } }; +const struct dri_extension mm_extensions[] = { + { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, + { NULL, NULL } +}; + extern const struct tnl_pipeline_stage _r200_render_stage; extern const struct tnl_pipeline_stage _r200_tcl_stage; @@ -418,6 +425,9 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual, _math_matrix_set_identity( &rmesa->tmpmat ); driInitExtensions( ctx, card_extensions, GL_TRUE ); + + if (rmesa->radeon.radeonScreen->kernel_mm) + driInitExtensions(ctx, mm_extensions, GL_FALSE); if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) { /* yuv textures don't work with some chips - R200 / rv280 okay so far others get the bit ordering right but don't actually do YUV-RGB conversion */ diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h index f7bad2a241..fcbe725d6f 100644 --- a/src/mesa/drivers/dri/r200/r200_context.h +++ b/src/mesa/drivers/dri/r200/r200_context.h @@ -621,21 +621,6 @@ struct r200_context { GLboolean texmicrotile; struct ati_fragment_shader *afs_loaded; - - struct { - struct gl_fragment_program *bitmap_fp; - struct gl_vertex_program *passthrough_vp; - - struct gl_fragment_program *saved_fp; - GLboolean saved_fp_enable; - struct gl_vertex_program *saved_vp; - GLboolean saved_vp_enable; - - GLint saved_vp_x, saved_vp_y; - GLsizei saved_vp_width, saved_vp_height; - GLenum saved_matrix_mode; - } meta; - }; #define R200_CONTEXT(ctx) ((r200ContextPtr)(ctx->DriverCtx)) diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c index 96ed49665b..ccb56202f6 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.c +++ b/src/mesa/drivers/dri/r200/r200_ioctl.c @@ -41,19 +41,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "main/context.h" #include "swrast/swrast.h" -#include "main/blend.h" -#include "main/bufferobj.h" -#include "main/buffers.h" -#include "main/depth.h" -#include "main/shaders.h" -#include "main/texstate.h" -#include "main/varray.h" -#include "glapi/dispatch.h" -#include "swrast/swrast.h" -#include "main/stencil.h" -#include "main/matrix.h" -#include "main/attrib.h" -#include "main/enable.h" + #include "radeon_common.h" #include "radeon_lock.h" @@ -70,217 +58,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_TIMEOUT 512 #define R200_IDLE_RETRY 16 -static void -r200_meta_set_passthrough_transform(r200ContextPtr r200) -{ - GLcontext *ctx = r200->radeon.glCtx; - - r200->meta.saved_vp_x = ctx->Viewport.X; - r200->meta.saved_vp_y = ctx->Viewport.Y; - r200->meta.saved_vp_width = ctx->Viewport.Width; - r200->meta.saved_vp_height = ctx->Viewport.Height; - r200->meta.saved_matrix_mode = ctx->Transform.MatrixMode; - - _mesa_Viewport(0, 0, ctx->DrawBuffer->Width, ctx->DrawBuffer->Height); - - _mesa_MatrixMode(GL_PROJECTION); - _mesa_PushMatrix(); - _mesa_LoadIdentity(); - _mesa_Ortho(0, ctx->DrawBuffer->Width, 0, ctx->DrawBuffer->Height, 1, -1); - - _mesa_MatrixMode(GL_MODELVIEW); - _mesa_PushMatrix(); - _mesa_LoadIdentity(); -} - -static void -r200_meta_restore_transform(r200ContextPtr r200) -{ - _mesa_MatrixMode(GL_PROJECTION); - _mesa_PopMatrix(); - _mesa_MatrixMode(GL_MODELVIEW); - _mesa_PopMatrix(); - - _mesa_MatrixMode(r200->meta.saved_matrix_mode); - - _mesa_Viewport(r200->meta.saved_vp_x, r200->meta.saved_vp_y, - r200->meta.saved_vp_width, r200->meta.saved_vp_height); -} - -/** - * Perform glClear where mask contains only color, depth, and/or stencil. - * - * The implementation is based on calling into Mesa to set GL state and - * performing normal triangle rendering. The intent of this path is to - * have as generic a path as possible, so that any driver could make use of - * it. - */ -static void radeon_clear_tris(GLcontext *ctx, GLbitfield mask) -{ - r200ContextPtr rmesa = R200_CONTEXT(ctx); - GLfloat vertices[4][3]; - GLfloat color[4][4]; - GLfloat dst_z; - struct gl_framebuffer *fb = ctx->DrawBuffer; - int i; - GLboolean saved_fp_enable = GL_FALSE, saved_vp_enable = GL_FALSE; - GLboolean saved_shader_program = 0; - unsigned int saved_active_texture; - - assert((mask & ~(BUFFER_BIT_BACK_LEFT | BUFFER_BIT_FRONT_LEFT | - BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) == 0); - - _mesa_PushAttrib(GL_COLOR_BUFFER_BIT | - GL_CURRENT_BIT | - GL_DEPTH_BUFFER_BIT | - GL_ENABLE_BIT | - GL_STENCIL_BUFFER_BIT | - GL_TRANSFORM_BIT | - GL_CURRENT_BIT); - _mesa_PushClientAttrib(GL_CLIENT_VERTEX_ARRAY_BIT); - saved_active_texture = ctx->Texture.CurrentUnit; - - /* Disable existing GL state we don't want to apply to a clear. */ - _mesa_Disable(GL_ALPHA_TEST); - _mesa_Disable(GL_BLEND); - _mesa_Disable(GL_CULL_FACE); - _mesa_Disable(GL_FOG); - _mesa_Disable(GL_POLYGON_SMOOTH); - _mesa_Disable(GL_POLYGON_STIPPLE); - _mesa_Disable(GL_POLYGON_OFFSET_FILL); - _mesa_Disable(GL_LIGHTING); - _mesa_Disable(GL_CLIP_PLANE0); - _mesa_Disable(GL_CLIP_PLANE1); - _mesa_Disable(GL_CLIP_PLANE2); - _mesa_Disable(GL_CLIP_PLANE3); - _mesa_Disable(GL_CLIP_PLANE4); - _mesa_Disable(GL_CLIP_PLANE5); - if (ctx->Extensions.ARB_fragment_program && ctx->FragmentProgram.Enabled) { - saved_fp_enable = GL_TRUE; - _mesa_Disable(GL_FRAGMENT_PROGRAM_ARB); - } - if (ctx->Extensions.ARB_vertex_program && ctx->VertexProgram.Enabled) { - saved_vp_enable = GL_TRUE; - _mesa_Disable(GL_VERTEX_PROGRAM_ARB); - } - if (ctx->Extensions.ARB_shader_objects && ctx->Shader.CurrentProgram) { - saved_shader_program = ctx->Shader.CurrentProgram->Name; - _mesa_UseProgramObjectARB(0); - } - - if (ctx->Texture._EnabledUnits != 0) { - int i; - - for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { - _mesa_ActiveTextureARB(GL_TEXTURE0 + i); - _mesa_Disable(GL_TEXTURE_1D); - _mesa_Disable(GL_TEXTURE_2D); - _mesa_Disable(GL_TEXTURE_3D); - if (ctx->Extensions.ARB_texture_cube_map) - _mesa_Disable(GL_TEXTURE_CUBE_MAP_ARB); - if (ctx->Extensions.NV_texture_rectangle) - _mesa_Disable(GL_TEXTURE_RECTANGLE_NV); - if (ctx->Extensions.MESA_texture_array) { - _mesa_Disable(GL_TEXTURE_1D_ARRAY_EXT); - _mesa_Disable(GL_TEXTURE_2D_ARRAY_EXT); - } - } - } - - r200_meta_set_passthrough_transform(rmesa); - - for (i = 0; i < 4; i++) { - color[i][0] = ctx->Color.ClearColor[0]; - color[i][1] = ctx->Color.ClearColor[1]; - color[i][2] = ctx->Color.ClearColor[2]; - color[i][3] = ctx->Color.ClearColor[3]; - } - - /* convert clear Z from [0,1] to NDC coord in [-1,1] */ - dst_z = -1.0 + 2.0 * ctx->Depth.Clear; - - /* Prepare the vertices, which are the same regardless of which buffer we're - * drawing to. - */ - vertices[0][0] = fb->_Xmin; - vertices[0][1] = fb->_Ymin; - vertices[0][2] = dst_z; - vertices[1][0] = fb->_Xmax; - vertices[1][1] = fb->_Ymin; - vertices[1][2] = dst_z; - vertices[2][0] = fb->_Xmax; - vertices[2][1] = fb->_Ymax; - vertices[2][2] = dst_z; - vertices[3][0] = fb->_Xmin; - vertices[3][1] = fb->_Ymax; - vertices[3][2] = dst_z; - - _mesa_ColorPointer(4, GL_FLOAT, 4 * sizeof(GLfloat), &color); - _mesa_VertexPointer(3, GL_FLOAT, 3 * sizeof(GLfloat), &vertices); - _mesa_Enable(GL_COLOR_ARRAY); - _mesa_Enable(GL_VERTEX_ARRAY); - - while (mask != 0) { - GLuint this_mask = 0; - - if (mask & BUFFER_BIT_BACK_LEFT) - this_mask = BUFFER_BIT_BACK_LEFT; - else if (mask & BUFFER_BIT_FRONT_LEFT) - this_mask = BUFFER_BIT_FRONT_LEFT; - - /* Clear depth/stencil in the same pass as color. */ - this_mask |= (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)); - - /* Select the current color buffer and use the color write mask if - * we have one, otherwise don't write any color channels. - */ - if (this_mask & BUFFER_BIT_FRONT_LEFT) - _mesa_DrawBuffer(GL_FRONT_LEFT); - else if (this_mask & BUFFER_BIT_BACK_LEFT) - _mesa_DrawBuffer(GL_BACK_LEFT); - else - _mesa_ColorMask(GL_FALSE, GL_FALSE, GL_FALSE, GL_FALSE); - - /* Control writing of the depth clear value to depth. */ - if (this_mask & BUFFER_BIT_DEPTH) { - _mesa_DepthFunc(GL_ALWAYS); - _mesa_Enable(GL_DEPTH_TEST); - } else { - _mesa_Disable(GL_DEPTH_TEST); - _mesa_DepthMask(GL_FALSE); - } - - /* Control writing of the stencil clear value to stencil. */ - if (this_mask & BUFFER_BIT_STENCIL) { - _mesa_Enable(GL_STENCIL_TEST); - _mesa_StencilOp(GL_REPLACE, GL_REPLACE, GL_REPLACE); - _mesa_StencilFuncSeparate(GL_FRONT, GL_ALWAYS, ctx->Stencil.Clear, - ctx->Stencil.WriteMask[0]); - } else { - _mesa_Disable(GL_STENCIL_TEST); - } - - CALL_DrawArrays(ctx->Exec, (GL_TRIANGLE_FAN, 0, 4)); - - mask &= ~this_mask; - } - - r200_meta_restore_transform(rmesa); - - _mesa_ActiveTextureARB(GL_TEXTURE0 + saved_active_texture); - if (saved_fp_enable) - _mesa_Enable(GL_FRAGMENT_PROGRAM_ARB); - if (saved_vp_enable) - _mesa_Enable(GL_VERTEX_PROGRAM_ARB); - - if (saved_shader_program) - _mesa_UseProgramObjectARB(saved_shader_program); - - _mesa_PopClientAttrib(); - _mesa_PopAttrib(); -} - - static void r200UserClear(GLcontext *ctx, GLuint mask) { radeon_clear_tris(ctx, mask); @@ -449,7 +226,7 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask ) mask &= ~BUFFER_BIT_DEPTH; } - if ( (mask & BUFFER_BIT_STENCIL) && rmesa->radeon.state.stencil.hwBuffer ) { + if ( (mask & BUFFER_BIT_STENCIL) ) { flags |= RADEON_STENCIL; mask &= ~BUFFER_BIT_STENCIL; } @@ -467,8 +244,7 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask ) flags |= RADEON_USE_COMP_ZBUF; /* if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200) flags |= RADEON_USE_HIERZ; */ - if (!(rmesa->radeon.state.stencil.hwBuffer) || - ((flags & RADEON_DEPTH) && (flags & RADEON_STENCIL) && + if (!((flags & RADEON_DEPTH) && (flags & RADEON_STENCIL) && ((rmesa->radeon.state.stencil.clear & R200_STENCIL_WRITE_MASK) == R200_STENCIL_WRITE_MASK))) { flags |= RADEON_CLEAR_FASTZ; } diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 74824b8d24..ca4dee8a5b 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -740,7 +740,8 @@ static void r200PolygonOffset( GLcontext *ctx, GLfloat factor, GLfloat units ) { r200ContextPtr rmesa = R200_CONTEXT(ctx); - float_ui32_type constant = { units * rmesa->radeon.state.depth.scale }; + const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF; + float_ui32_type constant = { units * depthScale }; float_ui32_type factoru = { factor }; /* factor *= 2; */ @@ -1611,6 +1612,7 @@ void r200UpdateWindow( GLcontext *ctx ) GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0; const GLfloat *v = ctx->Viewport._WindowMap.m; const GLboolean render_to_fbo = (ctx->DrawBuffer ? (ctx->DrawBuffer->Name != 0) : 0); + const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF; GLfloat y_scale, y_bias; if (render_to_fbo) { @@ -1625,8 +1627,8 @@ void r200UpdateWindow( GLcontext *ctx ) float_ui32_type tx = { v[MAT_TX] + xoffset + SUBPIXEL_X }; float_ui32_type sy = { v[MAT_SY] * y_scale }; float_ui32_type ty = { (v[MAT_TY] * y_scale) + y_bias + SUBPIXEL_Y }; - float_ui32_type sz = { v[MAT_SZ] * rmesa->radeon.state.depth.scale }; - float_ui32_type tz = { v[MAT_TZ] * rmesa->radeon.state.depth.scale }; + float_ui32_type sz = { v[MAT_SZ] * depthScale }; + float_ui32_type tz = { v[MAT_TZ] * depthScale }; R200_STATECHANGE( rmesa, vpt ); @@ -2014,15 +2016,24 @@ static void r200Enable( GLcontext *ctx, GLenum cap, GLboolean state ) break; case GL_STENCIL_TEST: - if ( rmesa->radeon.state.stencil.hwBuffer ) { - R200_STATECHANGE( rmesa, ctx ); - if ( state ) { - rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_STENCIL_ENABLE; + { + GLboolean hw_stencil = GL_FALSE; + if (ctx->DrawBuffer) { + struct radeon_renderbuffer *rrbStencil + = radeon_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL); + hw_stencil = (rrbStencil && rrbStencil->bo); + } + + if (hw_stencil) { + R200_STATECHANGE( rmesa, ctx ); + if ( state ) { + rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= R200_STENCIL_ENABLE; + } else { + rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~R200_STENCIL_ENABLE; + } } else { - rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~R200_STENCIL_ENABLE; + FALLBACK( rmesa, R200_FALLBACK_STENCIL, state ); } - } else { - FALLBACK( rmesa, R200_FALLBACK_STENCIL, state ); } break; diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c index a71f33ca3b..30326c2960 100644 --- a/src/mesa/drivers/dri/r200/r200_state_init.c +++ b/src/mesa/drivers/dri/r200/r200_state_init.c @@ -674,21 +674,15 @@ void r200InitState( r200ContextPtr rmesa ) switch ( ctx->Visual.depthBits ) { case 16: rmesa->radeon.state.depth.clear = 0x0000ffff; - rmesa->radeon.state.depth.scale = 1.0 / (GLfloat)0xffff; rmesa->radeon.state.stencil.clear = 0x00000000; break; case 24: default: rmesa->radeon.state.depth.clear = 0x00ffffff; - rmesa->radeon.state.depth.scale = 1.0 / (GLfloat)0xffffff; rmesa->radeon.state.stencil.clear = 0xffff0000; break; } - /* Only have hw stencil when depth buffer is 24 bits deep */ - rmesa->radeon.state.stencil.hwBuffer = ( ctx->Visual.stencilBits > 0 && - ctx->Visual.depthBits == 24 ); - rmesa->radeon.Fallback = 0; rmesa->radeon.hw.max_state_size = 0; diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index cf0557d6a2..c6bd69ed14 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -113,7 +113,7 @@ const struct dri_extension card_extensions[] = { {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions}, {"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions}, {"GL_EXT_blend_subtract", NULL}, - { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, + {"GL_EXT_packed_depth_stencil", NULL}, {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions }, {"GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions}, {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions}, @@ -141,6 +141,11 @@ const struct dri_extension card_extensions[] = { }; +const struct dri_extension mm_extensions[] = { + { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, + { NULL, NULL } +}; + /** * The GL 2.0 functions are needed to make display lists work with * functions added by GL_ATI_separate_stencil. @@ -421,6 +426,8 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual, ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE; driInitExtensions(ctx, card_extensions, GL_TRUE); + if (r300->radeon.radeonScreen->kernel_mm) + driInitExtensions(ctx, mm_extensions, GL_FALSE); if (driQueryOptionb (&r300->radeon.optionCache, "disable_stencil_two_side")) diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.c b/src/mesa/drivers/dri/r300/r300_ioctl.c index d4acbd7e99..71661eef19 100644 --- a/src/mesa/drivers/dri/r300/r300_ioctl.c +++ b/src/mesa/drivers/dri/r300/r300_ioctl.c @@ -66,6 +66,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define CLEARBUFFER_DEPTH 0x2 #define CLEARBUFFER_STENCIL 0x4 +static void r300EmitClearState(GLcontext * ctx); + +static void r300UserClear(GLcontext *ctx, GLuint mask) +{ + radeon_clear_tris(ctx, mask); +} + static void r300ClearBuffer(r300ContextPtr r300, int flags, struct radeon_renderbuffer *rrb, struct radeon_renderbuffer *rrbd) @@ -534,6 +541,47 @@ static void r300EmitClearState(GLcontext * ctx) } } +static void r300KernelClear(GLcontext *ctx, GLuint flags) +{ + r300ContextPtr r300 = R300_CONTEXT(ctx); + __DRIdrawablePrivate *dPriv = r300->radeon.dri.drawable; + struct radeon_framebuffer *rfb = dPriv->driverPrivate; + struct radeon_renderbuffer *rrb; + struct radeon_renderbuffer *rrbd; + int bits = 0; + + /* Make sure it fits there. */ + rcommonEnsureCmdBufSpace(&r300->radeon, 421 * 3, __FUNCTION__); + if (flags || bits) + r300EmitClearState(ctx); + rrbd = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH); + if (rrbd && (flags & BUFFER_BIT_DEPTH)) + bits |= CLEARBUFFER_DEPTH; + + if (flags & BUFFER_BIT_COLOR0) { + rrb = radeon_get_renderbuffer(&rfb->base, BUFFER_COLOR0); + r300ClearBuffer(r300, CLEARBUFFER_COLOR, rrb, NULL); + bits = 0; + } + + if (flags & BUFFER_BIT_FRONT_LEFT) { + rrb = radeon_get_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT); + r300ClearBuffer(r300, bits | CLEARBUFFER_COLOR, rrb, rrbd); + bits = 0; + } + + if (flags & BUFFER_BIT_BACK_LEFT) { + rrb = radeon_get_renderbuffer(&rfb->base, BUFFER_BACK_LEFT); + r300ClearBuffer(r300, bits | CLEARBUFFER_COLOR, rrb, rrbd); + bits = 0; + } + + if (bits) + r300ClearBuffer(r300, bits, NULL, rrbd); + + COMMIT_BATCH(); +} + /** * Buffer clear */ @@ -541,16 +589,15 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask) { r300ContextPtr r300 = R300_CONTEXT(ctx); __DRIdrawablePrivate *dPriv = r300->radeon.dri.drawable; - struct radeon_framebuffer *rfb = dPriv->driverPrivate; - struct radeon_renderbuffer *rrb; - struct radeon_renderbuffer *rrbd; - int flags = 0; - int bits = 0; + const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask); + GLbitfield swrast_mask = 0, tri_mask = 0; + int i; + struct gl_framebuffer *fb = ctx->DrawBuffer; if (RADEON_DEBUG & DEBUG_IOCTL) fprintf(stderr, "r300Clear\n"); - { + if (!r300->radeon.radeonScreen->driScreen->dri2.enabled) { LOCK_HARDWARE(&r300->radeon); UNLOCK_HARDWARE(&r300->radeon); if (dPriv->numClipRects == 0) @@ -563,68 +610,52 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask) */ R300_NEWPRIM(r300); - if (mask & BUFFER_BIT_FRONT_LEFT) { - flags |= BUFFER_BIT_FRONT_LEFT; - mask &= ~BUFFER_BIT_FRONT_LEFT; - } + if (colorMask == ~0) + tri_mask |= (mask & BUFFER_BITS_COLOR); - if (mask & BUFFER_BIT_BACK_LEFT) { - flags |= BUFFER_BIT_BACK_LEFT; - mask &= ~BUFFER_BIT_BACK_LEFT; - } - if (mask & BUFFER_BIT_DEPTH) { - bits |= CLEARBUFFER_DEPTH; - mask &= ~BUFFER_BIT_DEPTH; + /* HW stencil */ + if (mask & BUFFER_BIT_STENCIL) { + tri_mask |= BUFFER_BIT_STENCIL; } - if ((mask & BUFFER_BIT_STENCIL) && r300->radeon.state.stencil.hwBuffer) { - bits |= CLEARBUFFER_STENCIL; - mask &= ~BUFFER_BIT_STENCIL; + /* HW depth */ + if (mask & BUFFER_BIT_DEPTH) { + tri_mask |= BUFFER_BIT_DEPTH; } - if (mask & BUFFER_BIT_COLOR0) { - flags |= BUFFER_BIT_COLOR0; - mask &= ~BUFFER_BIT_COLOR0; - } + /* If we're doing a tri pass for depth/stencil, include a likely color + * buffer with it. + */ - if (mask) { - if (RADEON_DEBUG & DEBUG_FALLBACKS) - fprintf(stderr, "%s: swrast clear, mask: %x\n", - __FUNCTION__, mask); - _swrast_Clear(ctx, mask); + for (i = 0; i < BUFFER_COUNT; i++) { + GLuint bufBit = 1 << i; + if ((tri_mask) & bufBit) { + if (!fb->Attachment[i].Renderbuffer->ClassID) { + tri_mask &= ~bufBit; + swrast_mask |= bufBit; + } + } } - /* Make sure it fits there. */ - rcommonEnsureCmdBufSpace(&r300->radeon, 421 * 3, __FUNCTION__); - if (flags || bits) - r300EmitClearState(ctx); - rrbd = (void *)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; + /* SW fallback clearing */ + swrast_mask = mask & ~tri_mask; - if (flags & BUFFER_BIT_COLOR0) { - rrb = (void *)rfb->base.Attachment[BUFFER_COLOR0].Renderbuffer; - r300ClearBuffer(r300, CLEARBUFFER_COLOR, rrb, NULL); - bits = 0; - } - - if (flags & BUFFER_BIT_FRONT_LEFT) { - rrb = (void *)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer; - r300ClearBuffer(r300, bits | CLEARBUFFER_COLOR, rrb, rrbd); - bits = 0; + if (tri_mask) { + if (r300->radeon.radeonScreen->kernel_mm) + r300UserClear(ctx, tri_mask); + else + r300KernelClear(ctx, tri_mask); } - - if (flags & BUFFER_BIT_BACK_LEFT) { - rrb = (void *)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; - r300ClearBuffer(r300, bits | CLEARBUFFER_COLOR, rrb, rrbd); - bits = 0; + if (swrast_mask) { + if (RADEON_DEBUG & DEBUG_FALLBACKS) + fprintf(stderr, "%s: swrast clear, mask: %x\n", + __FUNCTION__, swrast_mask); + _swrast_Clear(ctx, swrast_mask); } - - if (bits) - r300ClearBuffer(r300, bits, NULL, rrbd); - - COMMIT_BATCH(); } + void r300InitIoctlFuncs(struct dd_function_table *functions) { functions->Clear = r300Clear; diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 02f29a0a2f..f49b43c207 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -587,8 +587,14 @@ static void r300SetDepthState(GLcontext * ctx) static void r300SetStencilState(GLcontext * ctx, GLboolean state) { r300ContextPtr r300 = R300_CONTEXT(ctx); + GLboolean hw_stencil = GL_FALSE; + if (ctx->DrawBuffer) { + struct radeon_renderbuffer *rrbStencil + = radeon_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL); + hw_stencil = (rrbStencil && rrbStencil->bo); + } - if (r300->radeon.state.stencil.hwBuffer) { + if (hw_stencil) { R300_STATECHANGE(r300, zs); if (state) { r300->hw.zs.cmd[R300_ZS_CNTL_0] |= @@ -933,7 +939,8 @@ static void r300UpdateWindow(GLcontext * ctx) GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0; GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0; const GLfloat *v = ctx->Viewport._WindowMap.m; - const GLboolean render_to_fbo = (ctx->DrawBuffer ? (ctx->DrawBuffer->Name != 0) : 0); + const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF; + const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0); GLfloat y_scale, y_bias; if (render_to_fbo) { @@ -948,8 +955,8 @@ static void r300UpdateWindow(GLcontext * ctx) GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X; GLfloat sy = v[MAT_SY] * y_scale; GLfloat ty = (v[MAT_TY] * y_scale) + y_bias + SUBPIXEL_Y; - GLfloat sz = v[MAT_SZ] * rmesa->radeon.state.depth.scale; - GLfloat tz = v[MAT_TZ] * rmesa->radeon.state.depth.scale; + GLfloat sz = v[MAT_SZ] * depthScale; + GLfloat tz = v[MAT_TZ] * depthScale; R300_STATECHANGE(rmesa, vpt); @@ -2032,7 +2039,7 @@ static void r300ResetHwState(r300ContextPtr r300) fprintf(stderr, "%s\n", __FUNCTION__); radeon_firevertices(&r300->radeon); - r300UpdateWindow(ctx); + //r300UpdateWindow(ctx); r300ColorMask(ctx, ctx->Color.ColorMask[RCOMP], @@ -2207,16 +2214,6 @@ static void r300ResetHwState(r300ContextPtr r300) r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = 0x00000000; r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = 0xffffffff; - rrb = r300->radeon.state.depth.rrb; - if (rrb && rrb->bo && (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE)) { - /* XXX: Turn off when clearing buffers ? */ - r300->hw.zb.cmd[R300_ZB_PITCH] |= R300_DEPTHMACROTILE_ENABLE; - - if (ctx->Visual.depthBits == 24) - r300->hw.zb.cmd[R300_ZB_PITCH] |= - R300_DEPTHMICROTILE_TILED; - } - r300->hw.zb_depthclearvalue.cmd[1] = 0; r300->hw.zstencil_format.cmd[2] = R300_ZTOP_DISABLE; @@ -2530,10 +2527,6 @@ void r300InitState(r300ContextPtr r300) GLcontext *ctx = r300->radeon.glCtx; GLuint depth_fmt; - /* Only have hw stencil when depth buffer is 24 bits deep */ - r300->radeon.state.stencil.hwBuffer = (ctx->Visual.stencilBits > 0 && - ctx->Visual.depthBits == 24); - memset(&(r300->state.texture), 0, sizeof(r300->state.texture)); r300ResetHwState(r300); diff --git a/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h b/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h index f80f0f7b22..42607df967 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h +++ b/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h @@ -36,7 +36,10 @@ struct drm_radeon_gem_info { #endif - +uint32_t radeon_gem_bo_name(struct radeon_bo *dummy) +{ + return 0; +} static inline void *radeon_bo_manager_gem_ctor(int fd) { diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 4fd54c06c3..9f646c4386 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -58,6 +58,21 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "tnl/t_pipeline.h" #include "swrast_setup/swrast_setup.h" +#include "main/blend.h" +#include "main/bufferobj.h" +#include "main/buffers.h" +#include "main/depth.h" +#include "main/shaders.h" +#include "main/texstate.h" +#include "main/varray.h" +#include "glapi/dispatch.h" +#include "swrast/swrast.h" +#include "main/stencil.h" +#include "main/matrix.h" +#include "main/attrib.h" +#include "main/enable.h" +#include "main/viewport.h" + #include "dri_util.h" #include "vblank.h" @@ -658,18 +673,20 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) /* none */ if (fb->Name == 0) { if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) { - rrbColor = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer; + rrbColor = radeon_renderbuffer(fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer); radeon->front_cliprects = GL_TRUE; } else { - rrbColor = (void *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer; + rrbColor = radeon_renderbuffer(fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer); radeon->front_cliprects = GL_FALSE; } } else { /* user FBO in theory */ struct radeon_renderbuffer *rrb; - rrb = (void *)fb->_ColorDrawBuffers[0]; - offset = rrb->draw_offset; - rrbColor = rrb; + rrb = radeon_renderbuffer(fb->_ColorDrawBuffers[0]); + if (rrb) { + offset = rrb->draw_offset; + rrbColor = rrb; + } radeon->constant_cliprect = GL_TRUE; } @@ -679,9 +696,8 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DRAW_BUFFER, GL_FALSE); - if (fb->_DepthBuffer && fb->_DepthBuffer->Wrapped) { - rrbDepth = (struct radeon_renderbuffer *)fb->_DepthBuffer->Wrapped; + rrbDepth = radeon_renderbuffer(fb->_DepthBuffer->Wrapped); if (rrbDepth && rrbDepth->bo) { radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DEPTH_BUFFER, GL_FALSE); } else { @@ -692,16 +708,11 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) rrbDepth = NULL; } - /* TODO stencil things */ if (fb->_StencilBuffer && fb->_StencilBuffer->Wrapped) { - rrbStencil = (struct radeon_renderbuffer *)fb->_DepthBuffer->Wrapped; + rrbStencil = radeon_renderbuffer(fb->_DepthBuffer->Wrapped); if (rrbStencil && rrbStencil->bo) { radeon->vtbl.fallback(ctx, RADEON_FALLBACK_STENCIL_BUFFER, GL_FALSE); /* need to re-compute stencil hw state */ - if (ctx->Driver.Enable != NULL) - ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled); - else - ctx->NewState |= _NEW_STENCIL; if (!rrbDepth) rrbDepth = rrbStencil; } else { @@ -727,27 +738,28 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) * Update depth test state */ if (ctx->Driver.Enable) { - if (ctx->Depth.Test && fb->Visual.depthBits > 0) { - ctx->Driver.Enable(ctx, GL_DEPTH_TEST, GL_TRUE); - } else { - ctx->Driver.Enable(ctx, GL_DEPTH_TEST, GL_FALSE); - } + ctx->Driver.Enable(ctx, GL_DEPTH_TEST, + (ctx->Depth.Test && fb->Visual.depthBits > 0)); + ctx->Driver.Enable(ctx, GL_STENCIL_TEST, + (ctx->Stencil._Enabled && fb->Visual.stencilBits > 0)); } else { - ctx->NewState |= _NEW_DEPTH; + ctx->NewState |= (_NEW_DEPTH | _NEW_STENCIL); } radeon->state.depth.rrb = rrbDepth; - radeon->state.color.rrb = rrbColor; radeon->state.color.draw_offset = offset; +#if 0 /* update viewport since it depends on window size */ if (ctx->Driver.Viewport) { ctx->Driver.Viewport(ctx, ctx->Viewport.X, ctx->Viewport.Y, ctx->Viewport.Width, ctx->Viewport.Height); } else { - ctx->NewState |= _NEW_VIEWPORT; + } +#endif + ctx->NewState |= _NEW_VIEWPORT; /* Set state we know depends on drawable parameters: */ @@ -755,6 +767,19 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y, ctx->Scissor.Width, ctx->Scissor.Height); radeon->NewGLState |= _NEW_SCISSOR; + + if (ctx->Driver.DepthRange) + ctx->Driver.DepthRange(ctx, + ctx->Viewport.Near, + ctx->Viewport.Far); + + /* Update culling direction which changes depending on the + * orientation of the buffer: + */ + if (ctx->Driver.FrontFace) + ctx->Driver.FrontFace(ctx, ctx->Polygon.FrontFace); + else + ctx->NewState |= _NEW_POLYGON; } /** @@ -802,10 +827,6 @@ void radeonUpdatePageFlipping(radeonContextPtr radeon) void radeon_window_moved(radeonContextPtr radeon) { - GLcontext *ctx = radeon->glCtx; - __DRIdrawablePrivate *dPriv = radeon->dri.drawable; - struct radeon_framebuffer *rfb = dPriv->driverPrivate; - if (!radeon->radeonScreen->driScreen->dri2.enabled) { radeonUpdatePageFlipping(radeon); } @@ -949,8 +970,14 @@ void radeonFinish(GLcontext * ctx) if (radeon->radeonScreen->kernel_mm) { for (i = 0; i < fb->_NumColorDrawBuffers; i++) { struct radeon_renderbuffer *rrb; - rrb = (struct radeon_renderbuffer *)fb->_ColorDrawBuffers[i]; - if (rrb->bo) + rrb = radeon_renderbuffer(fb->_ColorDrawBuffers[i]); + if (rrb && rrb->bo) + radeon_bo_wait(rrb->bo); + } + { + struct radeon_renderbuffer *rrb; + rrb = radeon_get_depthbuffer(radeon); + if (rrb && rrb->bo) radeon_bo_wait(rrb->bo); } } else if (radeon->do_irqs) { @@ -1108,3 +1135,219 @@ void rcommonBeginBatch(radeonContextPtr rmesa, int n, +static void +radeon_meta_set_passthrough_transform(radeonContextPtr radeon) +{ + GLcontext *ctx = radeon->glCtx; + + radeon->meta.saved_vp_x = ctx->Viewport.X; + radeon->meta.saved_vp_y = ctx->Viewport.Y; + radeon->meta.saved_vp_width = ctx->Viewport.Width; + radeon->meta.saved_vp_height = ctx->Viewport.Height; + radeon->meta.saved_matrix_mode = ctx->Transform.MatrixMode; + + _mesa_Viewport(0, 0, ctx->DrawBuffer->Width, ctx->DrawBuffer->Height); + + _mesa_MatrixMode(GL_PROJECTION); + _mesa_PushMatrix(); + _mesa_LoadIdentity(); + _mesa_Ortho(0, ctx->DrawBuffer->Width, 0, ctx->DrawBuffer->Height, 1, -1); + + _mesa_MatrixMode(GL_MODELVIEW); + _mesa_PushMatrix(); + _mesa_LoadIdentity(); +} + +static void +radeon_meta_restore_transform(radeonContextPtr radeon) +{ + _mesa_MatrixMode(GL_PROJECTION); + _mesa_PopMatrix(); + _mesa_MatrixMode(GL_MODELVIEW); + _mesa_PopMatrix(); + + _mesa_MatrixMode(radeon->meta.saved_matrix_mode); + + _mesa_Viewport(radeon->meta.saved_vp_x, radeon->meta.saved_vp_y, + radeon->meta.saved_vp_width, radeon->meta.saved_vp_height); +} + + +/** + * Perform glClear where mask contains only color, depth, and/or stencil. + * + * The implementation is based on calling into Mesa to set GL state and + * performing normal triangle rendering. The intent of this path is to + * have as generic a path as possible, so that any driver could make use of + * it. + */ + + +void radeon_clear_tris(GLcontext *ctx, GLbitfield mask) +{ + radeonContextPtr rmesa = RADEON_CONTEXT(ctx); + GLfloat vertices[4][3]; + GLfloat color[4][4]; + GLfloat dst_z; + struct gl_framebuffer *fb = ctx->DrawBuffer; + int i; + GLboolean saved_fp_enable = GL_FALSE, saved_vp_enable = GL_FALSE; + GLboolean saved_shader_program = 0; + unsigned int saved_active_texture; + + assert((mask & ~(TRI_CLEAR_COLOR_BITS | BUFFER_BIT_DEPTH | + BUFFER_BIT_STENCIL)) == 0); + + _mesa_PushAttrib(GL_COLOR_BUFFER_BIT | + GL_CURRENT_BIT | + GL_DEPTH_BUFFER_BIT | + GL_ENABLE_BIT | + GL_STENCIL_BUFFER_BIT | + GL_TRANSFORM_BIT | + GL_CURRENT_BIT); + _mesa_PushClientAttrib(GL_CLIENT_VERTEX_ARRAY_BIT); + saved_active_texture = ctx->Texture.CurrentUnit; + + /* Disable existing GL state we don't want to apply to a clear. */ + _mesa_Disable(GL_ALPHA_TEST); + _mesa_Disable(GL_BLEND); + _mesa_Disable(GL_CULL_FACE); + _mesa_Disable(GL_FOG); + _mesa_Disable(GL_POLYGON_SMOOTH); + _mesa_Disable(GL_POLYGON_STIPPLE); + _mesa_Disable(GL_POLYGON_OFFSET_FILL); + _mesa_Disable(GL_LIGHTING); + _mesa_Disable(GL_CLIP_PLANE0); + _mesa_Disable(GL_CLIP_PLANE1); + _mesa_Disable(GL_CLIP_PLANE2); + _mesa_Disable(GL_CLIP_PLANE3); + _mesa_Disable(GL_CLIP_PLANE4); + _mesa_Disable(GL_CLIP_PLANE5); + if (ctx->Extensions.ARB_fragment_program && ctx->FragmentProgram.Enabled) { + saved_fp_enable = GL_TRUE; + _mesa_Disable(GL_FRAGMENT_PROGRAM_ARB); + } + if (ctx->Extensions.ARB_vertex_program && ctx->VertexProgram.Enabled) { + saved_vp_enable = GL_TRUE; + _mesa_Disable(GL_VERTEX_PROGRAM_ARB); + } + if (ctx->Extensions.ARB_shader_objects && ctx->Shader.CurrentProgram) { + saved_shader_program = ctx->Shader.CurrentProgram->Name; + _mesa_UseProgramObjectARB(0); + } + + if (ctx->Texture._EnabledUnits != 0) { + int i; + + for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { + _mesa_ActiveTextureARB(GL_TEXTURE0 + i); + _mesa_Disable(GL_TEXTURE_1D); + _mesa_Disable(GL_TEXTURE_2D); + _mesa_Disable(GL_TEXTURE_3D); + if (ctx->Extensions.ARB_texture_cube_map) + _mesa_Disable(GL_TEXTURE_CUBE_MAP_ARB); + if (ctx->Extensions.NV_texture_rectangle) + _mesa_Disable(GL_TEXTURE_RECTANGLE_NV); + if (ctx->Extensions.MESA_texture_array) { + _mesa_Disable(GL_TEXTURE_1D_ARRAY_EXT); + _mesa_Disable(GL_TEXTURE_2D_ARRAY_EXT); + } + } + } + + radeon_meta_set_passthrough_transform(rmesa); + + for (i = 0; i < 4; i++) { + color[i][0] = ctx->Color.ClearColor[0]; + color[i][1] = ctx->Color.ClearColor[1]; + color[i][2] = ctx->Color.ClearColor[2]; + color[i][3] = ctx->Color.ClearColor[3]; + } + + /* convert clear Z from [0,1] to NDC coord in [-1,1] */ + + dst_z = -1.0 + 2.0 * ctx->Depth.Clear; + /* Prepare the vertices, which are the same regardless of which buffer we're + * drawing to. + */ + vertices[0][0] = fb->_Xmin; + vertices[0][1] = fb->_Ymin; + vertices[0][2] = dst_z; + vertices[1][0] = fb->_Xmax; + vertices[1][1] = fb->_Ymin; + vertices[1][2] = dst_z; + vertices[2][0] = fb->_Xmax; + vertices[2][1] = fb->_Ymax; + vertices[2][2] = dst_z; + vertices[3][0] = fb->_Xmin; + vertices[3][1] = fb->_Ymax; + vertices[3][2] = dst_z; + + _mesa_ColorPointer(4, GL_FLOAT, 4 * sizeof(GLfloat), &color); + _mesa_VertexPointer(3, GL_FLOAT, 3 * sizeof(GLfloat), &vertices); + _mesa_Enable(GL_COLOR_ARRAY); + _mesa_Enable(GL_VERTEX_ARRAY); + + while (mask != 0) { + GLuint this_mask = 0; + GLuint color_bit; + + color_bit = _mesa_ffs(mask & TRI_CLEAR_COLOR_BITS); + if (color_bit != 0) + this_mask |= (1 << (color_bit - 1)); + + /* Clear depth/stencil in the same pass as color. */ + this_mask |= (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)); + + /* Select the current color buffer and use the color write mask if + * we have one, otherwise don't write any color channels. + */ + if (this_mask & BUFFER_BIT_FRONT_LEFT) + _mesa_DrawBuffer(GL_FRONT_LEFT); + else if (this_mask & BUFFER_BIT_BACK_LEFT) + _mesa_DrawBuffer(GL_BACK_LEFT); + else if (color_bit != 0) + _mesa_DrawBuffer(GL_COLOR_ATTACHMENT0 + + (color_bit - BUFFER_COLOR0 - 1)); + else + _mesa_ColorMask(GL_FALSE, GL_FALSE, GL_FALSE, GL_FALSE); + + /* Control writing of the depth clear value to depth. */ + if (this_mask & BUFFER_BIT_DEPTH) { + _mesa_DepthFunc(GL_ALWAYS); + _mesa_DepthMask(GL_TRUE); + _mesa_Enable(GL_DEPTH_TEST); + } else { + _mesa_Disable(GL_DEPTH_TEST); + _mesa_DepthMask(GL_FALSE); + } + + /* Control writing of the stencil clear value to stencil. */ + if (this_mask & BUFFER_BIT_STENCIL) { + _mesa_Enable(GL_STENCIL_TEST); + _mesa_StencilOp(GL_REPLACE, GL_REPLACE, GL_REPLACE); + _mesa_StencilFuncSeparate(GL_FRONT, GL_ALWAYS, ctx->Stencil.Clear, + ctx->Stencil.WriteMask[0]); + } else { + _mesa_Disable(GL_STENCIL_TEST); + } + + CALL_DrawArrays(ctx->Exec, (GL_TRIANGLE_FAN, 0, 4)); + + mask &= ~this_mask; + } + + radeon_meta_restore_transform(rmesa); + + _mesa_ActiveTextureARB(GL_TEXTURE0 + saved_active_texture); + if (saved_fp_enable) + _mesa_Enable(GL_FRAGMENT_PROGRAM_ARB); + if (saved_vp_enable) + _mesa_Enable(GL_VERTEX_PROGRAM_ARB); + + if (saved_shader_program) + _mesa_UseProgramObjectARB(saved_shader_program); + + _mesa_PopClientAttrib(); + _mesa_PopAttrib(); +} diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index c97492d742..f3e2290cab 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -5,6 +5,18 @@ #include "radeon_dma.h" #include "radeon_texture.h" + +#define TRI_CLEAR_COLOR_BITS (BUFFER_BIT_BACK_LEFT | \ + BUFFER_BIT_FRONT_LEFT | \ + BUFFER_BIT_COLOR0 | \ + BUFFER_BIT_COLOR1 | \ + BUFFER_BIT_COLOR2 | \ + BUFFER_BIT_COLOR3 | \ + BUFFER_BIT_COLOR4 | \ + BUFFER_BIT_COLOR5 | \ + BUFFER_BIT_COLOR6 | \ + BUFFER_BIT_COLOR7) + void radeonRecalcScissorRects(radeonContextPtr radeon); void radeonSetCliprects(radeonContextPtr radeon); void radeonUpdateScissor( GLcontext *ctx ); @@ -24,6 +36,8 @@ void radeonFlush(GLcontext *ctx); void radeonFinish(GLcontext * ctx); void radeonEmitState(radeonContextPtr radeon); +void radeon_clear_tris(GLcontext *ctx, GLbitfield mask); + void radeon_window_moved(radeonContextPtr radeon); void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb); void radeonDrawBuffer( GLcontext *ctx, GLenum mode ); @@ -35,7 +49,10 @@ void radeon_get_cliprects(radeonContextPtr radeon, int *x_off, int *y_off); void radeon_fbo_init(struct radeon_context *radeon); -struct gl_renderbuffer * +void +radeon_renderbuffer_set_bo(struct radeon_renderbuffer *rb, + struct radeon_bo *bo); +struct radeon_renderbuffer * radeon_create_renderbuffer(GLenum format, __DRIdrawablePrivate *driDrawPriv); static inline struct radeon_renderbuffer *radeon_renderbuffer(struct gl_renderbuffer *rb) { diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index a818440faf..f335eb0313 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -392,6 +392,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) struct radeon_framebuffer *draw; radeonContextPtr radeon; char *regname; + struct radeon_bo *depth_bo, *bo; if (RADEON_DEBUG & DEBUG_DRI) fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); @@ -448,7 +449,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) regname = "dri2 depth buffer"; break; case __DRI_BUFFER_STENCIL: - rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH); + rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL); regname = "dri2 stencil buffer"; break; case __DRI_BUFFER_ACCUM: @@ -463,25 +464,49 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) continue; if (rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; + uint32_t name = radeon_gem_name_bo(rb->bo); + if (name == buffers[i].name) + continue; } + + if (RADEON_DEBUG & DEBUG_DRI) + fprintf(stderr, + "attaching buffer %s, %d, at %d, cpp %d, pitch %d\n", + regname, buffers[i].name, buffers[i].attachment, + buffers[i].cpp, buffers[i].pitch); + rb->cpp = buffers[i].cpp; rb->pitch = buffers[i].pitch; rb->width = drawable->w; rb->height = drawable->h; rb->has_surface = 0; - rb->bo = radeon_bo_open(radeon->radeonScreen->bom, - buffers[i].name, - 0, - 0, - RADEON_GEM_DOMAIN_VRAM, - buffers[i].flags); - if (rb->bo == NULL) { - fprintf(stderr, "failed to attach %s %d\n", - regname, buffers[i].name); + if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_bo) { + if (RADEON_DEBUG & DEBUG_DRI) + fprintf(stderr, "(reusing depth buffer as stencil)\n"); + bo = depth_bo; + radeon_bo_ref(bo); + } else { + bo = radeon_bo_open(radeon->radeonScreen->bom, + buffers[i].name, + 0, + 0, + RADEON_GEM_DOMAIN_VRAM, + buffers[i].flags); + if (bo == NULL) { + + fprintf(stderr, "failed to attach %s %d\n", + regname, buffers[i].name); + + } } + + if (buffers[i].attachment == __DRI_BUFFER_DEPTH) + depth_bo = bo; + + radeon_renderbuffer_set_bo(rb, bo); + radeon_bo_unref(bo); + } driUpdateFramebufferSize(radeon->glCtx, drawable); diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index 612cc97f25..0ce72c9198 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -123,7 +123,6 @@ struct radeon_colorbuffer_state { struct radeon_depthbuffer_state { GLuint clear; - GLfloat scale; struct radeon_renderbuffer *rrb; }; @@ -137,7 +136,6 @@ struct radeon_scissor_state { }; struct radeon_stencilbuffer_state { - GLboolean hwBuffer; GLuint clear; /* rb3d_stencilrefmask value */ }; @@ -444,9 +442,23 @@ struct radeon_context { struct radeon_cmdbuf cmdbuf; - drm_clip_rect_t fboRect; - GLboolean constant_cliprect; /* use for FBO or DRI2 rendering */ - GLboolean front_cliprects; + drm_clip_rect_t fboRect; + GLboolean constant_cliprect; /* use for FBO or DRI2 rendering */ + GLboolean front_cliprects; + + struct { + struct gl_fragment_program *bitmap_fp; + struct gl_vertex_program *passthrough_vp; + + struct gl_fragment_program *saved_fp; + GLboolean saved_fp_enable; + struct gl_vertex_program *saved_vp; + GLboolean saved_vp_enable; + + GLint saved_vp_x, saved_vp_y; + GLsizei saved_vp_width, saved_vp_height; + GLenum saved_matrix_mode; + } meta; struct { void (*get_lock)(radeonContextPtr radeon); diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c index 3f69de8d27..ac945ecc4d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_context.c @@ -66,6 +66,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define need_GL_EXT_blend_minmax #define need_GL_EXT_fog_coord #define need_GL_EXT_secondary_color +#define need_GL_EXT_framebuffer_object #include "extension_helper.h" #define DRIVER_DATE "20061018" @@ -88,6 +89,7 @@ const struct dri_extension card_extensions[] = { "GL_EXT_blend_logic_op", NULL }, { "GL_EXT_blend_subtract", GL_EXT_blend_minmax_functions }, { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions }, + { "GL_EXT_packed_depth_stencil", NULL}, { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions }, { "GL_EXT_stencil_wrap", NULL }, { "GL_EXT_texture_edge_clamp", NULL }, @@ -104,6 +106,11 @@ const struct dri_extension card_extensions[] = { NULL, NULL } }; +const struct dri_extension mm_extensions[] = { + { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, + { NULL, NULL } +}; + extern const struct tnl_pipeline_stage _radeon_render_stage; extern const struct tnl_pipeline_stage _radeon_tcl_stage; @@ -338,6 +345,8 @@ radeonCreateContext( const __GLcontextModes *glVisual, } driInitExtensions( ctx, card_extensions, GL_TRUE ); + if (rmesa->radeon.radeonScreen->kernel_mm) + driInitExtensions(ctx, mm_extensions, GL_FALSE); if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR100) _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" ); if (rmesa->radeon.glCtx->Mesa_DXTn) { diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h index 2015e96a74..5235a6e374 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_context.h @@ -435,20 +435,6 @@ struct r100_context { GLuint c_textureBytes; GLuint c_vertexBuffers; - struct { - struct gl_fragment_program *bitmap_fp; - struct gl_vertex_program *passthrough_vp; - - struct gl_fragment_program *saved_fp; - GLboolean saved_fp_enable; - struct gl_vertex_program *saved_vp; - GLboolean saved_vp_enable; - - GLint saved_vp_x, saved_vp_y; - GLsizei saved_vp_width, saved_vp_height; - GLenum saved_matrix_mode; - } meta; - }; diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index 7342f2295e..f914c8c8d0 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -54,7 +54,6 @@ radeon_new_framebuffer(GLcontext *ctx, GLuint name) static void radeon_delete_renderbuffer(struct gl_renderbuffer *rb) { - GET_CURRENT_CONTEXT(ctx); struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb); ASSERT(rrb); @@ -62,8 +61,6 @@ radeon_delete_renderbuffer(struct gl_renderbuffer *rb) if (rrb && rrb->bo) { radeon_bo_unref(rrb->bo); } - - _mesa_free(rrb); } @@ -255,7 +252,7 @@ radeon_nop_alloc_storage(GLcontext * ctx, struct gl_renderbuffer *rb, return GL_FALSE; } -struct gl_renderbuffer * +struct radeon_renderbuffer * radeon_create_renderbuffer(GLenum format, __DRIdrawablePrivate *driDrawPriv) { struct radeon_renderbuffer *rrb; @@ -325,7 +322,7 @@ radeon_create_renderbuffer(GLenum format, __DRIdrawablePrivate *driDrawPriv) rrb->base.GetPointer = radeon_get_pointer; rrb->bo = NULL; - return &rrb->base; + return rrb; } static struct gl_renderbuffer * @@ -383,6 +380,13 @@ radeon_update_wrapper(GLcontext *ctx, struct radeon_renderbuffer *rrb, rrb->base.DataType = GL_UNSIGNED_BYTE; DBG("Render to RGBA8 texture OK\n"); } + else if (texImage->TexFormat == &_mesa_texformat_argb4444) { + rrb->cpp = 2; + rrb->base._ActualFormat = GL_RGBA4; + rrb->base._BaseFormat = GL_RGBA; + rrb->base.DataType = GL_UNSIGNED_BYTE; + DBG("Render to RGBA4 texture OK\n"); + } else if (texImage->TexFormat == &_mesa_texformat_rgb565) { rrb->cpp = 2; rrb->base._ActualFormat = GL_RGB5; @@ -493,7 +497,7 @@ radeon_render_texture(GLcontext * ctx, return; } - fprintf(stderr,"Begin render texture tid %x tex=%u w=%d h=%d refcount=%d\n", + DBG("Begin render texture tid %x tex=%u w=%d h=%d refcount=%d\n", _glthread_GetID(), att->Texture->Name, newImage->Width, newImage->Height, rrb->base.RefCount); @@ -558,4 +562,13 @@ void radeon_fbo_init(struct radeon_context *radeon) } - +void radeon_renderbuffer_set_bo(struct radeon_renderbuffer *rb, + struct radeon_bo *bo) +{ + struct radeon_bo *old; + old = rb->bo; + rb->bo = bo; + radeon_bo_ref(bo); + if (old) + radeon_bo_unref(old); +} diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c index 22584f4817..f18aa1a4da 100644 --- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c +++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c @@ -419,218 +419,6 @@ void radeonEmitAOS( r100ContextPtr rmesa, */ #define RADEON_MAX_CLEARS 256 - - -static void -r100_meta_set_passthrough_transform(r100ContextPtr r100) -{ - GLcontext *ctx = r100->radeon.glCtx; - - r100->meta.saved_vp_x = ctx->Viewport.X; - r100->meta.saved_vp_y = ctx->Viewport.Y; - r100->meta.saved_vp_width = ctx->Viewport.Width; - r100->meta.saved_vp_height = ctx->Viewport.Height; - r100->meta.saved_matrix_mode = ctx->Transform.MatrixMode; - - _mesa_Viewport(0, 0, ctx->DrawBuffer->Width, ctx->DrawBuffer->Height); - - _mesa_MatrixMode(GL_PROJECTION); - _mesa_PushMatrix(); - _mesa_LoadIdentity(); - _mesa_Ortho(0, ctx->DrawBuffer->Width, 0, ctx->DrawBuffer->Height, 1, -1); - - _mesa_MatrixMode(GL_MODELVIEW); - _mesa_PushMatrix(); - _mesa_LoadIdentity(); -} - -static void -r100_meta_restore_transform(r100ContextPtr r100) -{ - _mesa_MatrixMode(GL_PROJECTION); - _mesa_PopMatrix(); - _mesa_MatrixMode(GL_MODELVIEW); - _mesa_PopMatrix(); - - _mesa_MatrixMode(r100->meta.saved_matrix_mode); - - _mesa_Viewport(r100->meta.saved_vp_x, r100->meta.saved_vp_y, - r100->meta.saved_vp_width, r100->meta.saved_vp_height); -} - -/** - * Perform glClear where mask contains only color, depth, and/or stencil. - * - * The implementation is based on calling into Mesa to set GL state and - * performing normal triangle rendering. The intent of this path is to - * have as generic a path as possible, so that any driver could make use of - * it. - */ -static void radeon_clear_tris(GLcontext *ctx, GLbitfield mask) -{ - r100ContextPtr rmesa = R100_CONTEXT(ctx); - GLfloat vertices[4][3]; - GLfloat color[4][4]; - GLfloat dst_z; - struct gl_framebuffer *fb = ctx->DrawBuffer; - int i; - GLboolean saved_fp_enable = GL_FALSE, saved_vp_enable = GL_FALSE; - GLboolean saved_shader_program = 0; - unsigned int saved_active_texture; - - assert((mask & ~(BUFFER_BIT_BACK_LEFT | BUFFER_BIT_FRONT_LEFT | - BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) == 0); - - _mesa_PushAttrib(GL_COLOR_BUFFER_BIT | - GL_CURRENT_BIT | - GL_DEPTH_BUFFER_BIT | - GL_ENABLE_BIT | - GL_STENCIL_BUFFER_BIT | - GL_TRANSFORM_BIT | - GL_CURRENT_BIT); - _mesa_PushClientAttrib(GL_CLIENT_VERTEX_ARRAY_BIT); - saved_active_texture = ctx->Texture.CurrentUnit; - - /* Disable existing GL state we don't want to apply to a clear. */ - _mesa_Disable(GL_ALPHA_TEST); - _mesa_Disable(GL_BLEND); - _mesa_Disable(GL_CULL_FACE); - _mesa_Disable(GL_FOG); - _mesa_Disable(GL_POLYGON_SMOOTH); - _mesa_Disable(GL_POLYGON_STIPPLE); - _mesa_Disable(GL_POLYGON_OFFSET_FILL); - _mesa_Disable(GL_LIGHTING); - _mesa_Disable(GL_CLIP_PLANE0); - _mesa_Disable(GL_CLIP_PLANE1); - _mesa_Disable(GL_CLIP_PLANE2); - _mesa_Disable(GL_CLIP_PLANE3); - _mesa_Disable(GL_CLIP_PLANE4); - _mesa_Disable(GL_CLIP_PLANE5); - if (ctx->Extensions.ARB_fragment_program && ctx->FragmentProgram.Enabled) { - saved_fp_enable = GL_TRUE; - _mesa_Disable(GL_FRAGMENT_PROGRAM_ARB); - } - if (ctx->Extensions.ARB_vertex_program && ctx->VertexProgram.Enabled) { - saved_vp_enable = GL_TRUE; - _mesa_Disable(GL_VERTEX_PROGRAM_ARB); - } - if (ctx->Extensions.ARB_shader_objects && ctx->Shader.CurrentProgram) { - saved_shader_program = ctx->Shader.CurrentProgram->Name; - _mesa_UseProgramObjectARB(0); - } - - if (ctx->Texture._EnabledUnits != 0) { - int i; - - for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { - _mesa_ActiveTextureARB(GL_TEXTURE0 + i); - _mesa_Disable(GL_TEXTURE_1D); - _mesa_Disable(GL_TEXTURE_2D); - _mesa_Disable(GL_TEXTURE_3D); - if (ctx->Extensions.ARB_texture_cube_map) - _mesa_Disable(GL_TEXTURE_CUBE_MAP_ARB); - if (ctx->Extensions.NV_texture_rectangle) - _mesa_Disable(GL_TEXTURE_RECTANGLE_NV); - if (ctx->Extensions.MESA_texture_array) { - _mesa_Disable(GL_TEXTURE_1D_ARRAY_EXT); - _mesa_Disable(GL_TEXTURE_2D_ARRAY_EXT); - } - } - } - - r100_meta_set_passthrough_transform(rmesa); - - for (i = 0; i < 4; i++) { - color[i][0] = ctx->Color.ClearColor[0]; - color[i][1] = ctx->Color.ClearColor[1]; - color[i][2] = ctx->Color.ClearColor[2]; - color[i][3] = ctx->Color.ClearColor[3]; - } - - /* convert clear Z from [0,1] to NDC coord in [-1,1] */ - dst_z = -1.0 + 2.0 * ctx->Depth.Clear; - - /* Prepare the vertices, which are the same regardless of which buffer we're - * drawing to. - */ - vertices[0][0] = fb->_Xmin; - vertices[0][1] = fb->_Ymin; - vertices[0][2] = dst_z; - vertices[1][0] = fb->_Xmax; - vertices[1][1] = fb->_Ymin; - vertices[1][2] = dst_z; - vertices[2][0] = fb->_Xmax; - vertices[2][1] = fb->_Ymax; - vertices[2][2] = dst_z; - vertices[3][0] = fb->_Xmin; - vertices[3][1] = fb->_Ymax; - vertices[3][2] = dst_z; - - _mesa_ColorPointer(4, GL_FLOAT, 4 * sizeof(GLfloat), &color); - _mesa_VertexPointer(3, GL_FLOAT, 3 * sizeof(GLfloat), &vertices); - _mesa_Enable(GL_COLOR_ARRAY); - _mesa_Enable(GL_VERTEX_ARRAY); - - while (mask != 0) { - GLuint this_mask = 0; - - if (mask & BUFFER_BIT_BACK_LEFT) - this_mask = BUFFER_BIT_BACK_LEFT; - else if (mask & BUFFER_BIT_FRONT_LEFT) - this_mask = BUFFER_BIT_FRONT_LEFT; - - /* Clear depth/stencil in the same pass as color. */ - this_mask |= (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)); - - /* Select the current color buffer and use the color write mask if - * we have one, otherwise don't write any color channels. - */ - if (this_mask & BUFFER_BIT_FRONT_LEFT) - _mesa_DrawBuffer(GL_FRONT_LEFT); - else if (this_mask & BUFFER_BIT_BACK_LEFT) - _mesa_DrawBuffer(GL_BACK_LEFT); - else - _mesa_ColorMask(GL_FALSE, GL_FALSE, GL_FALSE, GL_FALSE); - - /* Control writing of the depth clear value to depth. */ - if (this_mask & BUFFER_BIT_DEPTH) { - _mesa_DepthFunc(GL_ALWAYS); - _mesa_Enable(GL_DEPTH_TEST); - } else { - _mesa_Disable(GL_DEPTH_TEST); - _mesa_DepthMask(GL_FALSE); - } - - /* Control writing of the stencil clear value to stencil. */ - if (this_mask & BUFFER_BIT_STENCIL) { - _mesa_Enable(GL_STENCIL_TEST); - _mesa_StencilOp(GL_REPLACE, GL_REPLACE, GL_REPLACE); - _mesa_StencilFuncSeparate(GL_FRONT, GL_ALWAYS, ctx->Stencil.Clear, - ctx->Stencil.WriteMask[0]); - } else { - _mesa_Disable(GL_STENCIL_TEST); - } - - CALL_DrawArrays(ctx->Exec, (GL_TRIANGLE_FAN, 0, 4)); - - mask &= ~this_mask; - } - - r100_meta_restore_transform(rmesa); - - _mesa_ActiveTextureARB(GL_TEXTURE0 + saved_active_texture); - if (saved_fp_enable) - _mesa_Enable(GL_FRAGMENT_PROGRAM_ARB); - if (saved_vp_enable) - _mesa_Enable(GL_VERTEX_PROGRAM_ARB); - - if (saved_shader_program) - _mesa_UseProgramObjectARB(saved_shader_program); - - _mesa_PopClientAttrib(); - _mesa_PopAttrib(); -} - static void radeonUserClear(GLcontext *ctx, GLuint mask) { radeon_clear_tris(ctx, mask); @@ -795,7 +583,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask ) mask &= ~BUFFER_BIT_DEPTH; } - if ( (mask & BUFFER_BIT_STENCIL) && rmesa->radeon.state.stencil.hwBuffer ) { + if ( (mask & BUFFER_BIT_STENCIL) ) { flags |= RADEON_STENCIL; mask &= ~BUFFER_BIT_STENCIL; } @@ -813,8 +601,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask ) flags |= RADEON_USE_COMP_ZBUF; /* if (rmesa->radeon.radeonScreen->chipset & RADEON_CHIPSET_TCL) flags |= RADEON_USE_HIERZ; */ - if (!(rmesa->radeon.state.stencil.hwBuffer) || - ((flags & RADEON_DEPTH) && (flags & RADEON_STENCIL) && + if (((flags & RADEON_DEPTH) && (flags & RADEON_STENCIL) && ((rmesa->radeon.state.stencil.clear & RADEON_STENCIL_WRITE_MASK) == RADEON_STENCIL_WRITE_MASK))) { flags |= RADEON_CLEAR_FASTZ; } diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index a14a0c3cb2..4725f38ae8 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -1086,6 +1086,9 @@ radeonCreateScreen2(__DRIscreenPrivate *sPriv) else screen->chip_flags |= RADEON_CLASS_R300; + if (getenv("R300_NO_TCL")) + screen->chip_flags &= ~RADEON_CHIPSET_TCL; + i = 0; screen->extensions[i++] = &driCopySubBufferExtension.base; screen->extensions[i++] = &driFrameTrackingExtension.base; @@ -1197,7 +1200,6 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, const GLboolean swStencil = mesaVis->stencilBits > 0 && mesaVis->depthBits != 24; GLenum rgbFormat = (mesaVis->redBits == 5 ? GL_RGB5 : GL_RGBA8); - GLenum depthFormat = GL_NONE; struct radeon_framebuffer *rfb; if (isPixmap) @@ -1209,37 +1211,35 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, _mesa_initialize_framebuffer(&rfb->base, mesaVis); - if (mesaVis->depthBits == 16) - depthFormat = GL_DEPTH_COMPONENT16; - else if (mesaVis->depthBits == 24) - depthFormat = GL_DEPTH_COMPONENT24; - /* front color renderbuffer */ - rfb->color_rb[0] = radeon_renderbuffer(radeon_create_renderbuffer(rgbFormat, driDrawPriv)); + rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv); _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base); rfb->color_rb[0]->has_surface = 1; /* back color renderbuffer */ if (mesaVis->doubleBufferMode) { - rfb->color_rb[1] = radeon_renderbuffer(radeon_create_renderbuffer(rgbFormat, driDrawPriv)); + rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv); _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base); rfb->color_rb[1]->has_surface = 1; } - /* depth renderbuffer */ - if (depthFormat != GL_NONE) { - struct radeon_renderbuffer *depth = radeon_renderbuffer( - radeon_create_renderbuffer(depthFormat, driDrawPriv)); + if (mesaVis->depthBits == 24) { + if (mesaVis->stencilBits == 8) { + struct radeon_renderbuffer *depthStencilRb = radeon_create_renderbuffer(GL_DEPTH24_STENCIL8_EXT, driDrawPriv); + _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base); + _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base); + depthStencilRb->has_surface = screen->depthHasSurface; + } else { + /* depth renderbuffer */ + struct radeon_renderbuffer *depth = radeon_create_renderbuffer(GL_DEPTH_COMPONENT24, driDrawPriv); + _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base); + depth->has_surface = screen->depthHasSurface; + } + } else if (mesaVis->depthBits == 16) { + /* just 16-bit depth buffer, no hw stencil */ + struct radeon_renderbuffer *depth = radeon_create_renderbuffer(GL_DEPTH_COMPONENT16, driDrawPriv); _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base); depth->has_surface = screen->depthHasSurface; - } - - /* stencil renderbuffer */ - if (mesaVis->stencilBits > 0 && !swStencil) { - struct radeon_renderbuffer *stencil = radeon_renderbuffer( - radeon_create_renderbuffer(GL_STENCIL_INDEX8_EXT, driDrawPriv)); - _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &stencil->base); - stencil->has_surface = screen->depthHasSurface; } _mesa_add_soft_renderbuffers(&rfb->base, diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c index 768a51b51d..3d2c5da4c0 100644 --- a/src/mesa/drivers/dri/radeon/radeon_span.c +++ b/src/mesa/drivers/dri/radeon/radeon_span.c @@ -377,33 +377,64 @@ do { \ #include "stenciltmp.h" -static void map_buffer(struct gl_renderbuffer *rb, GLboolean write) +void map_unmap_rb(struct gl_renderbuffer *rb, int flag) { - struct radeon_renderbuffer *rrb = (void*)rb; + struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb); int r; - if (rrb->bo) { - r = radeon_bo_map(rrb->bo, write); + if (rrb == NULL || !rrb->bo) + return; + + if (flag) { + r = radeon_bo_map(rrb->bo, 1); if (r) { fprintf(stderr, "(%s) error(%d) mapping buffer.\n", __FUNCTION__, r); } - } - radeonSetSpanFunctions(rrb); + radeonSetSpanFunctions(rrb); + } else { + radeon_bo_unmap(rrb->bo); + rb->GetRow = NULL; + rb->PutRow = NULL; + } } -static void unmap_buffer(struct gl_renderbuffer *rb) +static void +radeon_map_unmap_buffers(GLcontext *ctx, GLboolean map) { - struct radeon_renderbuffer *rrb = (void*)rb; + radeonContextPtr rmesa = RADEON_CONTEXT(ctx); + GLuint i, j; - if (rrb->bo) { - radeon_bo_unmap(rrb->bo); + /* color draw buffers */ + for (j = 0; j < ctx->DrawBuffer->_NumColorDrawBuffers; j++) + map_unmap_rb(ctx->DrawBuffer->_ColorDrawBuffers[j], map); + + /* check for render to textures */ + for (i = 0; i < BUFFER_COUNT; i++) { + struct gl_renderbuffer_attachment *att = + ctx->DrawBuffer->Attachment + i; + struct gl_texture_object *tex = att->Texture; + if (tex) { + /* render to texture */ + ASSERT(att->Renderbuffer); + if (map) + ctx->Driver.MapTexture(ctx, tex); + else + ctx->Driver.UnmapTexture(ctx, tex); + } } - rb->GetRow = NULL; - rb->PutRow = NULL; -} + + map_unmap_rb(ctx->ReadBuffer->_ColorReadBuffer, map); + + /* depth buffer (Note wrapper!) */ + if (ctx->DrawBuffer->_DepthBuffer) + map_unmap_rb(ctx->DrawBuffer->_DepthBuffer->Wrapped, map); + + if (ctx->DrawBuffer->_StencilBuffer) + map_unmap_rb(ctx->DrawBuffer->_StencilBuffer->Wrapped, map); +} static void radeonSpanRenderStart(GLcontext * ctx) { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); @@ -416,18 +447,7 @@ static void radeonSpanRenderStart(GLcontext * ctx) ctx->Driver.MapTexture(ctx, ctx->Texture.Unit[i]._Current); } - /* color draw buffers */ - for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) { - map_buffer(ctx->DrawBuffer->_ColorDrawBuffers[i], GL_TRUE); - } - - map_buffer(ctx->ReadBuffer->_ColorReadBuffer, GL_FALSE); - - if (ctx->DrawBuffer->_DepthBuffer) { - map_buffer(ctx->DrawBuffer->_DepthBuffer->Wrapped, GL_TRUE); - } - if (ctx->DrawBuffer->_StencilBuffer) - map_buffer(ctx->DrawBuffer->_StencilBuffer->Wrapped, GL_TRUE); + radeon_map_unmap_buffers(ctx, 1); /* The locking and wait for idle should really only be needed in classic mode. * In a future memory manager based implementation, this should become @@ -450,16 +470,7 @@ static void radeonSpanRenderFinish(GLcontext * ctx) ctx->Driver.UnmapTexture(ctx, ctx->Texture.Unit[i]._Current); } - /* color draw buffers */ - for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) - unmap_buffer(ctx->DrawBuffer->_ColorDrawBuffers[i]); - - unmap_buffer(ctx->ReadBuffer->_ColorReadBuffer); - - if (ctx->DrawBuffer->_DepthBuffer) - unmap_buffer(ctx->DrawBuffer->_DepthBuffer->Wrapped); - if (ctx->DrawBuffer->_StencilBuffer) - unmap_buffer(ctx->DrawBuffer->_StencilBuffer->Wrapped); + radeon_map_unmap_buffers(ctx, 0); } void radeonInitSpanFuncs(GLcontext * ctx) @@ -485,6 +496,8 @@ static void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb) radeonInitDepthPointers_z16(&rrb->base); } else if (rrb->base._ActualFormat == GL_DEPTH_COMPONENT24) { radeonInitDepthPointers_z24_s8(&rrb->base); + } else if (rrb->base._ActualFormat == GL_DEPTH24_STENCIL8_EXT) { + radeonInitStencilPointers_z24_s8(&rrb->base); } else if (rrb->base._ActualFormat == GL_STENCIL_INDEX8_EXT) { radeonInitStencilPointers_z24_s8(&rrb->base); } diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 635fe43ce4..19ff2688e6 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -528,7 +528,8 @@ static void radeonPolygonOffset( GLcontext *ctx, GLfloat factor, GLfloat units ) { r100ContextPtr rmesa = R100_CONTEXT(ctx); - float_ui32_type constant = { units * rmesa->radeon.state.depth.scale }; + const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF; + float_ui32_type constant = { units * depthScale }; float_ui32_type factoru = { factor }; RADEON_STATECHANGE( rmesa, zbs ); @@ -1391,6 +1392,7 @@ void radeonUpdateWindow( GLcontext *ctx ) GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0; const GLfloat *v = ctx->Viewport._WindowMap.m; const GLboolean render_to_fbo = (ctx->DrawBuffer ? (ctx->DrawBuffer->Name != 0) : 0); + const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF; GLfloat y_scale, y_bias; if (render_to_fbo) { @@ -1405,8 +1407,8 @@ void radeonUpdateWindow( GLcontext *ctx ) float_ui32_type tx = { v[MAT_TX] + xoffset + SUBPIXEL_X }; float_ui32_type sy = { v[MAT_SY] * y_scale }; float_ui32_type ty = { (v[MAT_TY] * y_scale) + y_bias + SUBPIXEL_Y }; - float_ui32_type sz = { v[MAT_SZ] * rmesa->radeon.state.depth.scale }; - float_ui32_type tz = { v[MAT_TZ] * rmesa->radeon.state.depth.scale }; + float_ui32_type sz = { v[MAT_SZ] * depthScale }; + float_ui32_type tz = { v[MAT_TZ] * depthScale }; RADEON_STATECHANGE( rmesa, vpt ); @@ -1800,15 +1802,24 @@ static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state ) break; case GL_STENCIL_TEST: - if ( rmesa->radeon.state.stencil.hwBuffer ) { - RADEON_STATECHANGE( rmesa, ctx ); - if ( state ) { - rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_STENCIL_ENABLE; + { + GLboolean hw_stencil = GL_FALSE; + if (ctx->DrawBuffer) { + struct radeon_renderbuffer *rrbStencil + = radeon_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL); + hw_stencil = (rrbStencil && rrbStencil->bo); + } + + if (hw_stencil) { + RADEON_STATECHANGE( rmesa, ctx ); + if ( state ) { + rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_STENCIL_ENABLE; + } else { + rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_STENCIL_ENABLE; + } } else { - rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_STENCIL_ENABLE; + FALLBACK( rmesa, RADEON_FALLBACK_STENCIL, state ); } - } else { - FALLBACK( rmesa, RADEON_FALLBACK_STENCIL, state ); } break; diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c index 8b6caf19d3..3d0cd8d3f8 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state_init.c +++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c @@ -592,22 +592,16 @@ void radeonInitState( r100ContextPtr rmesa ) switch ( ctx->Visual.depthBits ) { case 16: rmesa->radeon.state.depth.clear = 0x0000ffff; - rmesa->radeon.state.depth.scale = 1.0 / (GLfloat)0xffff; rmesa->radeon.state.stencil.clear = 0x00000000; break; case 24: rmesa->radeon.state.depth.clear = 0x00ffffff; - rmesa->radeon.state.depth.scale = 1.0 / (GLfloat)0xffffff; rmesa->radeon.state.stencil.clear = 0xffff0000; break; default: break; } - /* Only have hw stencil when depth buffer is 24 bits deep */ - rmesa->radeon.state.stencil.hwBuffer = ( ctx->Visual.stencilBits > 0 && - ctx->Visual.depthBits == 24 ); - rmesa->radeon.Fallback = 0; -- cgit v1.2.3 From 05304d41f2d9ab7a66a8b976580c156b7b93a9d3 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 2 Apr 2009 18:58:49 +1000 Subject: radeon/r200/r300: fix up the whole buffer space checking. This fixes up the buffer validation scheme, so that we keep a list of buffers to validate so cmdbuf flushes during a pipeline get all the buffers revalidated on the next emit. This also fixes radeonFlush to not flush unless we have something useful to send to the GPU, like a DMA buffer or something not state --- src/mesa/drivers/dri/r200/r200_state.c | 48 ++++++------------- src/mesa/drivers/dri/r300/r300_emit.c | 2 +- src/mesa/drivers/dri/r300/r300_texstate.c | 46 +++++------------- src/mesa/drivers/dri/radeon/radeon_common.c | 56 ++++++++++++++++++++++ src/mesa/drivers/dri/radeon/radeon_common.h | 3 ++ .../drivers/dri/radeon/radeon_common_context.c | 1 - .../drivers/dri/radeon/radeon_common_context.h | 8 ++++ src/mesa/drivers/dri/radeon/radeon_dma.c | 25 ++-------- src/mesa/drivers/dri/radeon/radeon_state.c | 50 ++++++++++++++++++- src/mesa/drivers/dri/radeon/radeon_state.h | 2 +- 10 files changed, 149 insertions(+), 92 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index ca4dee8a5b..f040713980 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -2273,33 +2273,24 @@ static void update_texturematrix( GLcontext *ctx ) static GLboolean r200ValidateBuffers(GLcontext *ctx) { r200ContextPtr rmesa = R200_CONTEXT(ctx); - struct radeon_cs_space_check bos[8]; struct radeon_renderbuffer *rrb; - int num_bo = 0; int i; - int flushed = 0, ret; -again: - num_bo = 0; + + radeon_validate_reset_bos(&rmesa->radeon); rrb = radeon_get_colorbuffer(&rmesa->radeon); /* color buffer */ if (rrb && rrb->bo) { - bos[num_bo].bo = rrb->bo; - bos[num_bo].read_domains = 0; - bos[num_bo].write_domain = RADEON_GEM_DOMAIN_VRAM; - bos[num_bo].new_accounted = 0; - num_bo++; + radeon_validate_bo(&rmesa->radeon, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); } /* depth buffer */ rrb = radeon_get_depthbuffer(&rmesa->radeon); /* color buffer */ if (rrb && rrb->bo) { - bos[num_bo].bo = rrb->bo; - bos[num_bo].read_domains = 0; - bos[num_bo].write_domain = RADEON_GEM_DOMAIN_VRAM; - bos[num_bo].new_accounted = 0; - num_bo++; + radeon_validate_bo(&rmesa->radeon, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); } for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) { @@ -2307,26 +2298,17 @@ again: if (!ctx->Texture.Unit[i]._ReallyEnabled) continue; - + t = radeon_tex_obj(ctx->Texture.Unit[i]._Current); - bos[num_bo].bo = t->mt->bo; - bos[num_bo].read_domains = RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM; - bos[num_bo].write_domain = 0; - bos[num_bo].new_accounted = 0; - num_bo++; + if (t->image_override && t->bo) + radeon_validate_bo(&rmesa->radeon, t->bo, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + else if (t->mt->bo) + radeon_validate_bo(&rmesa->radeon, t->mt->bo, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); } - - ret = radeon_cs_space_check(rmesa->radeon.cmdbuf.cs, bos, num_bo); - if (ret == RADEON_CS_SPACE_OP_TO_BIG) - return GL_FALSE; - if (ret == RADEON_CS_SPACE_FLUSH) { - radeonFlush(ctx); - if (flushed) - return GL_FALSE; - flushed = 1; - goto again; - } - return GL_TRUE; + + return radeon_revalidate_bos(ctx); } GLboolean r200ValidateState( GLcontext *ctx ) diff --git a/src/mesa/drivers/dri/r300/r300_emit.c b/src/mesa/drivers/dri/r300/r300_emit.c index 3ce0ba68c9..bcf8803875 100644 --- a/src/mesa/drivers/dri/r300/r300_emit.c +++ b/src/mesa/drivers/dri/r300/r300_emit.c @@ -352,7 +352,7 @@ void r300EmitCacheFlush(r300ContextPtr rmesa) { BATCH_LOCALS(&rmesa->radeon); - BEGIN_BATCH(4); + BEGIN_BATCH_NO_AUTOSTATE(4); OUT_BATCH_REGVAL(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS | R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D); diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c index baaca5f1e5..5a87b5da43 100644 --- a/src/mesa/drivers/dri/r300/r300_texstate.c +++ b/src/mesa/drivers/dri/r300/r300_texstate.c @@ -268,40 +268,29 @@ static GLboolean r300_validate_texture(GLcontext * ctx, struct gl_texture_object return GL_TRUE; } - /** * Ensure all enabled and complete textures are uploaded along with any buffers being used. */ GLboolean r300ValidateBuffers(GLcontext * ctx) { r300ContextPtr rmesa = R300_CONTEXT(ctx); - struct radeon_cs_space_check bos[16]; struct radeon_renderbuffer *rrb; - int num_bo = 0; int i; - int flushed = 0, ret; -again: - num_bo = 0; + + radeon_validate_reset_bos(&rmesa->radeon); rrb = radeon_get_colorbuffer(&rmesa->radeon); /* color buffer */ if (rrb && rrb->bo) { - bos[num_bo].bo = rrb->bo; - bos[num_bo].read_domains = 0; - bos[num_bo].write_domain = RADEON_GEM_DOMAIN_VRAM; - bos[num_bo].new_accounted = 0; - num_bo++; + radeon_validate_bo(&rmesa->radeon, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); } /* depth buffer */ rrb = radeon_get_depthbuffer(&rmesa->radeon); - /* color buffer */ if (rrb && rrb->bo) { - bos[num_bo].bo = rrb->bo; - bos[num_bo].read_domains = 0; - bos[num_bo].write_domain = RADEON_GEM_DOMAIN_VRAM; - bos[num_bo].new_accounted = 0; - num_bo++; + radeon_validate_bo(&rmesa->radeon, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); } for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) { @@ -317,26 +306,15 @@ again: } t = radeon_tex_obj(ctx->Texture.Unit[i]._Current); if (t->image_override && t->bo) - bos[num_bo].bo = t->bo; + radeon_validate_bo(&rmesa->radeon, t->bo, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + else if (t->mt->bo) - bos[num_bo].bo = t->mt->bo; - bos[num_bo].read_domains = RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM; - bos[num_bo].write_domain = 0; - bos[num_bo].new_accounted = 0; - num_bo++; + radeon_validate_bo(&rmesa->radeon, t->mt->bo, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); } - ret = radeon_cs_space_check(rmesa->radeon.cmdbuf.cs, bos, num_bo); - if (ret == RADEON_CS_SPACE_OP_TO_BIG) - return GL_FALSE; - if (ret == RADEON_CS_SPACE_FLUSH) { - radeonFlush(ctx); - if (flushed) - return GL_FALSE; - flushed = 1; - goto again; - } - return GL_TRUE; + return radeon_revalidate_bos(ctx); } void r300SetTexOffset(__DRIcontext * pDRICtx, GLint texname, diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 3ce868d2cf..4f7bfebf04 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -906,6 +906,49 @@ static INLINE void radeonEmitAtoms(radeonContextPtr radeon, GLboolean dirty) COMMIT_BATCH(); } +GLboolean radeon_revalidate_bos(GLcontext *ctx) +{ + radeonContextPtr radeon = RADEON_CONTEXT(ctx); + int flushed = 0; + int ret; +again: + ret = radeon_cs_space_check(radeon->cmdbuf.cs, radeon->state.bos, radeon->state.validated_bo_count); + if (ret == RADEON_CS_SPACE_OP_TO_BIG) + return GL_FALSE; + if (ret == RADEON_CS_SPACE_FLUSH) { + radeonFlush(ctx); + if (flushed) + return GL_FALSE; + flushed = 1; + goto again; + } + return GL_TRUE; +} + +void radeon_validate_reset_bos(radeonContextPtr radeon) +{ + int i; + + for (i = 0; i < radeon->state.validated_bo_count; i++) { + radeon->state.bos[i].bo = NULL; + radeon->state.bos[i].read_domains = 0; + radeon->state.bos[i].write_domain = 0; + radeon->state.bos[i].new_accounted = 0; + } + radeon->state.validated_bo_count = 0; +} + +void radeon_validate_bo(radeonContextPtr radeon, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) +{ + radeon->state.bos[radeon->state.validated_bo_count].bo = bo; + radeon->state.bos[radeon->state.validated_bo_count].read_domains = read_domains; + radeon->state.bos[radeon->state.validated_bo_count].write_domain = write_domain; + radeon->state.bos[radeon->state.validated_bo_count].new_accounted = 0; + radeon->state.validated_bo_count++; + + assert(radeon->state.validated_bo_count < RADEON_MAX_BOS); +} + void radeonEmitState(radeonContextPtr radeon) { if (RADEON_DEBUG & (DEBUG_STATE|DEBUG_PRIMS)) @@ -947,6 +990,14 @@ void radeonFlush(GLcontext *ctx) if (RADEON_DEBUG & DEBUG_IOCTL) fprintf(stderr, "%s %d\n", __FUNCTION__, radeon->cmdbuf.cs->cdw); + /* okay if we have no cmds in the buffer && + we have no DMA flush && + we have no DMA buffer allocated. + then no point flushing anything at all. + */ + if (!radeon->dma.flush && !radeon->cmdbuf.cs->cdw && !radeon->dma.current) + return; + if (radeon->dma.flush) radeon->dma.flush( ctx ); @@ -1015,6 +1066,11 @@ int rcommonFlushCmdBufLocked(radeonContextPtr rmesa, const char *caller) } radeon_cs_erase(rmesa->cmdbuf.cs); rmesa->cmdbuf.flushing = 0; + + if (radeon_revalidate_bos(rmesa->glCtx) == GL_FALSE) { + fprintf(stderr,"failed to revalidate buffers\n"); + } + return ret; } diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index f3e2290cab..c2fbb0950d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -47,6 +47,9 @@ void radeon_get_cliprects(radeonContextPtr radeon, struct drm_clip_rect **cliprects, unsigned int *num_cliprects, int *x_off, int *y_off); +GLboolean radeon_revalidate_bos(GLcontext *ctx); +void radeon_validate_bo(radeonContextPtr radeon, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain); +void radeon_validate_reset_bos(radeonContextPtr radeon); void radeon_fbo_init(struct radeon_context *radeon); void diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index ef67c86f0b..ba74c97f2c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -219,7 +219,6 @@ void radeonDestroyContext(__DRIcontextPrivate *driContextPriv ) if (radeon) { if (radeon->dma.current) { - radeonReleaseDmaRegion( radeon ); rcommonFlushCmdBuf( radeon, __FUNCTION__ ); } diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index c6e6be7484..d32e5af544 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -13,6 +13,10 @@ #include "dri_util.h" #include "tnl/t_vertex.h" +struct radeon_context; + +#include "radeon_bocs_wrapper.h" + /* This union is used to avoid warnings/miscompilation with float to uint32_t casts due to strict-aliasing */ typedef union { GLfloat f; uint32_t ui32; } float_ui32_type; @@ -384,11 +388,15 @@ typedef void (*radeon_line_func) (radeonContextPtr, typedef void (*radeon_point_func) (radeonContextPtr, radeonVertex *); +#define RADEON_MAX_BOS 24 struct radeon_state { struct radeon_colorbuffer_state color; struct radeon_depthbuffer_state depth; struct radeon_scissor_state scissor; struct radeon_stencilbuffer_state stencil; + + struct radeon_cs_space_check bos[RADEON_MAX_BOS]; + int validated_bo_count; }; /** diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c index 47f789e9cd..5ffee86e5a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_dma.c +++ b/src/mesa/drivers/dri/radeon/radeon_dma.c @@ -163,8 +163,6 @@ void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos, void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size) { - struct radeon_cs_space_check bos[1]; - int flushed = 0, ret; size = MAX2(size, MAX_DMA_BUF_SZ * 16); @@ -200,24 +198,11 @@ again_alloc: rmesa->dma.current_used = 0; rmesa->dma.current_vertexptr = 0; - bos[0].bo = rmesa->dma.current; - bos[0].read_domains = RADEON_GEM_DOMAIN_GTT; - bos[0].write_domain =0 ; - bos[0].new_accounted = 0; - - ret = radeon_cs_space_check(rmesa->cmdbuf.cs, bos, 1); - if (ret == RADEON_CS_SPACE_OP_TO_BIG) { - fprintf(stderr,"Got OPEARTION TO BIG ILLEGAL - this cannot happen"); - assert(0); - } else if (ret == RADEON_CS_SPACE_FLUSH) { - rcommonFlushCmdBuf(rmesa, __FUNCTION__); - if (flushed) { - fprintf(stderr,"flushed but still no space\n"); - assert(0); - } - flushed = 1; - goto again_alloc; - } + radeon_validate_bo(rmesa, rmesa->dma.current, RADEON_GEM_DOMAIN_GTT, 0); + + if (radeon_revalidate_bos(rmesa->glCtx) == GL_FALSE) + fprintf(stderr,"failure to revalidate BOs - badness\n"); + radeon_bo_map(rmesa->dma.current, 1); } diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 19ff2688e6..dcca326c66 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -47,6 +47,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "swrast_setup/swrast_setup.h" #include "radeon_context.h" +#include "radeon_mipmap_tree.h" #include "radeon_ioctl.h" #include "radeon_state.h" #include "radeon_tcl.h" @@ -2043,8 +2044,48 @@ static void update_texturematrix( GLcontext *ctx ) } } +static GLboolean r100ValidateBuffers(GLcontext *ctx) +{ + r100ContextPtr rmesa = R100_CONTEXT(ctx); + struct radeon_renderbuffer *rrb; + int i; + + radeon_validate_reset_bos(&rmesa->radeon); + + rrb = radeon_get_colorbuffer(&rmesa->radeon); + /* color buffer */ + if (rrb && rrb->bo) { + radeon_validate_bo(&rmesa->radeon, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); + } + + /* depth buffer */ + rrb = radeon_get_depthbuffer(&rmesa->radeon); + /* color buffer */ + if (rrb && rrb->bo) { + radeon_validate_bo(&rmesa->radeon, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); + } -void radeonValidateState( GLcontext *ctx ) + for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) { + radeonTexObj *t; + + if (!ctx->Texture.Unit[i]._ReallyEnabled) + continue; + + t = radeon_tex_obj(ctx->Texture.Unit[i]._Current); + if (t->image_override && t->bo) + radeon_validate_bo(&rmesa->radeon, t->bo, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + else if (t->mt->bo) + radeon_validate_bo(&rmesa->radeon, t->mt->bo, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + } + + return radeon_revalidate_bos(ctx); +} + +GLboolean radeonValidateState( GLcontext *ctx ) { r100ContextPtr rmesa = R100_CONTEXT(ctx); GLuint new_state = rmesa->radeon.NewGLState; @@ -2061,6 +2102,10 @@ void radeonValidateState( GLcontext *ctx ) new_state |= rmesa->radeon.NewGLState; /* may add TEXTURE_MATRIX */ } + /* we need to do a space check here */ + if (!r100ValidateBuffers(ctx)) + return GL_FALSE; + /* Need an event driven matrix update? */ if (new_state & (_NEW_MODELVIEW|_NEW_PROJECTION)) @@ -2136,7 +2181,8 @@ static void radeonWrapRunPipeline( GLcontext *ctx ) /* Validate state: */ if (rmesa->radeon.NewGLState) - radeonValidateState( ctx ); + if (!radeonValidateState( ctx )) + FALLBACK(rmesa, RADEON_FALLBACK_TEXTURE, GL_TRUE); has_material = (ctx->Light.Enabled && check_material( ctx )); diff --git a/src/mesa/drivers/dri/radeon/radeon_state.h b/src/mesa/drivers/dri/radeon/radeon_state.h index f05fa827d7..a7c8eef32a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.h +++ b/src/mesa/drivers/dri/radeon/radeon_state.h @@ -50,7 +50,7 @@ extern void radeonUpdateDrawBuffer( GLcontext *ctx ); extern void radeonUploadTexMatrix( r100ContextPtr rmesa, int unit, GLboolean swapcols ); -extern void radeonValidateState( GLcontext *ctx ); +extern GLboolean radeonValidateState( GLcontext *ctx ); extern void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode ); -- cgit v1.2.3 From 01daeadf8cd8c56820585c3da88cc626dcdc33d0 Mon Sep 17 00:00:00 2001 From: Michel Dänzer Date: Wed, 20 May 2009 16:39:33 +0200 Subject: radeon: Increase reference count of current renderbuffers. Fixes glxinfo: main/renderbuffer.c:2159: _mesa_reference_renderbuffer: Assertion `oldRb->Magic == 0xaabbccdd' failed. --- src/mesa/drivers/dri/radeon/radeon_common.c | 4 ++-- src/mesa/drivers/dri/radeon/radeon_common.h | 4 ++-- src/mesa/drivers/dri/radeon/radeon_common_context.c | 9 +++++---- src/mesa/drivers/dri/radeon/radeon_common_context.h | 4 ++-- 4 files changed, 11 insertions(+), 10 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 2f55dadcb9..76e884d705 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -752,8 +752,8 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb) ctx->NewState |= (_NEW_DEPTH | _NEW_STENCIL); } - radeon->state.depth.rrb = rrbDepth; - radeon->state.color.rrb = rrbColor; + _mesa_reference_renderbuffer(&radeon->state.depth.rb, &rrbDepth->base); + _mesa_reference_renderbuffer(&radeon->state.color.rb, &rrbColor->base); radeon->state.color.draw_offset = offset; #if 0 diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index c2fbb0950d..b60792df0b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -77,7 +77,7 @@ static inline struct radeon_renderbuffer *radeon_get_renderbuffer(struct gl_fram static inline struct radeon_renderbuffer *radeon_get_depthbuffer(radeonContextPtr rmesa) { struct radeon_renderbuffer *rrb; - rrb = rmesa->state.depth.rrb; + rrb = radeon_renderbuffer(rmesa->state.depth.rb); if (!rrb) return NULL; @@ -88,7 +88,7 @@ static inline struct radeon_renderbuffer *radeon_get_colorbuffer(radeonContextPt { struct radeon_renderbuffer *rrb; - rrb = rmesa->state.color.rrb; + rrb = radeon_renderbuffer(rmesa->state.color.rb); if (!rrb) return NULL; return rrb; diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 6fb6f92cb9..622bb98f3e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -39,6 +39,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "drirenderbuffer.h" #include "main/context.h" #include "main/framebuffer.h" +#include "main/renderbuffer.h" #include "main/state.h" #include "main/simple_list.h" #include "swrast/swrast.h" @@ -651,10 +652,10 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, radeon_update_renderbuffers(driContextPriv, driDrawPriv); if (driDrawPriv != driReadPriv) radeon_update_renderbuffers(driContextPriv, driReadPriv); - radeon->state.color.rrb = - radeon_get_renderbuffer(&drfb->base, BUFFER_BACK_LEFT); - radeon->state.depth.rrb = - radeon_get_renderbuffer(&drfb->base, BUFFER_DEPTH); + _mesa_reference_renderbuffer(&radeon->state.color.rb, + &(radeon_get_renderbuffer(&drfb->base, BUFFER_BACK_LEFT)->base)); + _mesa_reference_renderbuffer(&radeon->state.depth.rb, + &(radeon_get_renderbuffer(&drfb->base, BUFFER_DEPTH)->base)); } else { radeon_make_renderbuffer_current(radeon, drfb); } diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index 446c2f6269..af05f4ae32 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -121,13 +121,13 @@ struct radeon_framebuffer struct radeon_colorbuffer_state { GLuint clear; int roundEnable; - struct radeon_renderbuffer *rrb; + struct gl_renderbuffer *rb; uint32_t draw_offset; /* offset into color renderbuffer - FBOs */ }; struct radeon_depthbuffer_state { GLuint clear; - struct radeon_renderbuffer *rrb; + struct gl_renderbuffer *rb; }; struct radeon_scissor_state { -- cgit v1.2.3 From c27f21f92d2cf9d23a9edb15d144eceb9ff383bc Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 6 Jul 2009 14:15:00 +1000 Subject: radeon/r200/r300: port to new space checking code in libdrm This moves a big chunk of the space checking code into libdrm so it can be shared by the DDX. --- src/mesa/drivers/dri/r200/Makefile | 8 +- src/mesa/drivers/dri/r200/r200_cmdbuf.c | 8 +- src/mesa/drivers/dri/r200/r200_state.c | 24 +-- src/mesa/drivers/dri/r300/Makefile | 10 +- src/mesa/drivers/dri/r300/r300_ioctl.c | 48 ++++- src/mesa/drivers/dri/r300/r300_texstate.c | 31 +-- src/mesa/drivers/dri/radeon/Makefile | 7 +- src/mesa/drivers/dri/radeon/radeon_bo_drm.h | 8 + src/mesa/drivers/dri/radeon/radeon_bo_legacy.c | 17 +- src/mesa/drivers/dri/radeon/radeon_common.c | 52 +---- src/mesa/drivers/dri/radeon/radeon_common.h | 4 - src/mesa/drivers/dri/radeon/radeon_cs_drm.h | 56 ++++-- src/mesa/drivers/dri/radeon/radeon_cs_legacy.c | 100 --------- src/mesa/drivers/dri/radeon/radeon_cs_space_drm.c | 234 ++++++++++++++++++++++ src/mesa/drivers/dri/radeon/radeon_dma.c | 8 +- src/mesa/drivers/dri/radeon/radeon_state.c | 25 ++- 16 files changed, 417 insertions(+), 223 deletions(-) create mode 100644 src/mesa/drivers/dri/radeon/radeon_cs_space_drm.c (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile index 6a246edf7c..4605f72a61 100644 --- a/src/mesa/drivers/dri/r200/Makefile +++ b/src/mesa/drivers/dri/r200/Makefile @@ -13,6 +13,10 @@ ifeq ($(USING_EGL), 1) EGL_SOURCES = server/radeon_egl.c endif +ifeq ($(RADEON_LDFLAGS),) +CS_SOURCES = radeon_cs_space_drm.c +endif + RADEON_COMMON_SOURCES = \ radeon_texture.c \ radeon_common_context.c \ @@ -43,6 +47,7 @@ DRIVER_SOURCES = r200_context.c \ radeon_screen.c \ $(EGL_SOURCES) \ $(RADEON_COMMON_SOURCES) + $(CS_SOURCES) C_SOURCES = $(COMMON_SOURCES) $(DRIVER_SOURCES) @@ -82,7 +87,8 @@ COMMON_SYMLINKS = \ radeon_texture.h \ radeon_dma.c \ radeon_dma.h \ - radeon_fbo.c + radeon_fbo.c \ + $(CS_SOURCES) DRI_LIB_DEPS += $(RADEON_LDFLAGS) diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c index df9dd83344..25e30eda52 100644 --- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c +++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c @@ -225,6 +225,7 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa, GLuint min_nr ) { GLushort *retval; + int ret; if (R200_DEBUG & DEBUG_IOCTL) fprintf(stderr, "%s %d prim %x\n", __FUNCTION__, min_nr, primitive); @@ -239,10 +240,11 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa, rmesa->radeon.tcl.elt_dma_offset = 0; rmesa->tcl.elt_used = min_nr * 2; - radeon_validate_bo(&rmesa->radeon, rmesa->radeon.tcl.elt_dma_bo, - RADEON_GEM_DOMAIN_GTT, 0); - if (radeon_revalidate_bos(rmesa->radeon.glCtx) == GL_FALSE) + ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, rmesa->radeon.tcl.elt_dma_bo, + RADEON_GEM_DOMAIN_GTT, 0); + if (ret) { fprintf(stderr,"failure to revalidate BOs - badness\n"); + } radeon_bo_map(rmesa->radeon.tcl.elt_dma_bo, 1); retval = rmesa->radeon.tcl.elt_dma_bo->ptr + rmesa->radeon.tcl.elt_dma_offset; diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index f8ebe0df57..4426f3c3ec 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -2274,23 +2274,23 @@ static GLboolean r200ValidateBuffers(GLcontext *ctx) { r200ContextPtr rmesa = R200_CONTEXT(ctx); struct radeon_renderbuffer *rrb; - int i; + int i, ret; - radeon_validate_reset_bos(&rmesa->radeon); + radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs); rrb = radeon_get_colorbuffer(&rmesa->radeon); /* color buffer */ if (rrb && rrb->bo) { - radeon_validate_bo(&rmesa->radeon, rrb->bo, - 0, RADEON_GEM_DOMAIN_VRAM); + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); } /* depth buffer */ rrb = radeon_get_depthbuffer(&rmesa->radeon); /* color buffer */ if (rrb && rrb->bo) { - radeon_validate_bo(&rmesa->radeon, rrb->bo, - 0, RADEON_GEM_DOMAIN_VRAM); + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); } for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) { @@ -2301,17 +2301,17 @@ static GLboolean r200ValidateBuffers(GLcontext *ctx) t = radeon_tex_obj(ctx->Texture.Unit[i]._Current); if (t->image_override && t->bo) - radeon_validate_bo(&rmesa->radeon, t->bo, + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, t->bo, RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); else if (t->mt->bo) - radeon_validate_bo(&rmesa->radeon, t->mt->bo, + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, t->mt->bo, RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); } - if (rmesa->radeon.dma.current) - radeon_validate_bo(&rmesa->radeon, rmesa->radeon.dma.current, RADEON_GEM_DOMAIN_GTT, 0); - - return radeon_revalidate_bos(ctx); + ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, rmesa->radeon.dma.current, RADEON_GEM_DOMAIN_GTT, 0); + if (ret) + return GL_FALSE; + return GL_TRUE; } GLboolean r200ValidateState( GLcontext *ctx ) diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile index bdb09624be..a77209074a 100644 --- a/src/mesa/drivers/dri/r300/Makefile +++ b/src/mesa/drivers/dri/r300/Makefile @@ -13,6 +13,10 @@ ifeq ($(USING_EGL), 1) EGL_SOURCES = server/radeon_egl.c endif +ifeq ($(RADEON_LDFLAGS),) +CS_SOURCES = radeon_cs_space_drm.c +endif + COMMON_SOURCES = \ ../../common/driverfuncs.c \ ../common/mm.c \ @@ -59,7 +63,8 @@ DRIVER_SOURCES = \ r300_emit.c \ r300_swtcl.c \ $(RADEON_COMMON_SOURCES) \ - $(EGL_SOURCES) + $(EGL_SOURCES) \ + $(CS_SOURCES) C_SOURCES = $(COMMON_SOURCES) $(DRIVER_SOURCES) @@ -100,7 +105,8 @@ COMMON_SYMLINKS = \ radeon_mipmap_tree.h \ radeon_texture.c \ radeon_texture.h \ - radeon_fbo.c + radeon_fbo.c \ + $(CS_SOURCES) DRI_LIB_DEPS += $(RADEON_LDFLAGS) diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.c b/src/mesa/drivers/dri/r300/r300_ioctl.c index 104079b4db..4ae0b4504c 100644 --- a/src/mesa/drivers/dri/r300/r300_ioctl.c +++ b/src/mesa/drivers/dri/r300/r300_ioctl.c @@ -540,19 +540,50 @@ static void r300EmitClearState(GLcontext * ctx) } } -static void r300KernelClear(GLcontext *ctx, GLuint flags) +static int r300KernelClear(GLcontext *ctx, GLuint flags) { r300ContextPtr r300 = R300_CONTEXT(ctx); __DRIdrawablePrivate *dPriv = radeon_get_drawable(&r300->radeon); struct radeon_framebuffer *rfb = dPriv->driverPrivate; struct radeon_renderbuffer *rrb; struct radeon_renderbuffer *rrbd; - int bits = 0; + int bits = 0, ret; /* Make sure it fits there. */ + radeon_cs_space_reset_bos(r300->radeon.cmdbuf.cs); + + if (flags & BUFFER_BIT_COLOR0) { + rrb = radeon_get_renderbuffer(&rfb->base, BUFFER_COLOR0); + radeon_cs_space_add_persistent_bo(r300->radeon.cmdbuf.cs, + rrb->bo, 0, RADEON_GEM_DOMAIN_VRAM); + } + + if (flags & BUFFER_BIT_FRONT_LEFT) { + rrb = radeon_get_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT); + radeon_cs_space_add_persistent_bo(r300->radeon.cmdbuf.cs, + rrb->bo, 0, RADEON_GEM_DOMAIN_VRAM); + } + + if (flags & BUFFER_BIT_BACK_LEFT) { + rrb = radeon_get_renderbuffer(&rfb->base, BUFFER_BACK_LEFT); + radeon_cs_space_add_persistent_bo(r300->radeon.cmdbuf.cs, + rrb->bo, 0, RADEON_GEM_DOMAIN_VRAM); + } + + rrbd = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH); + if (rrbd) { + radeon_cs_space_add_persistent_bo(r300->radeon.cmdbuf.cs, + rrbd->bo, 0, RADEON_GEM_DOMAIN_VRAM); + } + + ret = radeon_cs_space_check(r300->radeon.cmdbuf.cs); + if (ret) + return -1; + rcommonEnsureCmdBufSpace(&r300->radeon, 421 * 3, __FUNCTION__); if (flags || bits) r300EmitClearState(ctx); + rrbd = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH); if (rrbd && (flags & BUFFER_BIT_DEPTH)) bits |= CLEARBUFFER_DEPTH; @@ -582,6 +613,7 @@ static void r300KernelClear(GLcontext *ctx, GLuint flags) r300ClearBuffer(r300, bits, NULL, rrbd); COMMIT_BATCH(); + return 0; } /** @@ -593,7 +625,7 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask) __DRIdrawablePrivate *dPriv = radeon_get_drawable(&r300->radeon); const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask); GLbitfield swrast_mask = 0, tri_mask = 0; - int i; + int i, ret; struct gl_framebuffer *fb = ctx->DrawBuffer; if (RADEON_DEBUG & DEBUG_IOCTL) @@ -643,12 +675,18 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask) /* SW fallback clearing */ swrast_mask = mask & ~tri_mask; + ret = 0; if (tri_mask) { if (r300->radeon.radeonScreen->kernel_mm) r300UserClear(ctx, tri_mask); - else - r300KernelClear(ctx, tri_mask); + else { + /* if kernel clear fails due to size restraints fallback */ + ret = r300KernelClear(ctx, tri_mask); + if (ret < 0) + swrast_mask |= tri_mask; + } } + if (swrast_mask) { if (RADEON_DEBUG & DEBUG_FALLBACKS) fprintf(stderr, "%s: swrast clear, mask: %x\n", diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c index c380840a00..6f489ace7b 100644 --- a/src/mesa/drivers/dri/r300/r300_texstate.c +++ b/src/mesa/drivers/dri/r300/r300_texstate.c @@ -281,21 +281,24 @@ GLboolean r300ValidateBuffers(GLcontext * ctx) r300ContextPtr rmesa = R300_CONTEXT(ctx); struct radeon_renderbuffer *rrb; int i; + int ret; - radeon_validate_reset_bos(&rmesa->radeon); + radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs); rrb = radeon_get_colorbuffer(&rmesa->radeon); /* color buffer */ if (rrb && rrb->bo) { - radeon_validate_bo(&rmesa->radeon, rrb->bo, - 0, RADEON_GEM_DOMAIN_VRAM); + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, + rrb->bo, 0, + RADEON_GEM_DOMAIN_VRAM); } /* depth buffer */ rrb = radeon_get_depthbuffer(&rmesa->radeon); if (rrb && rrb->bo) { - radeon_validate_bo(&rmesa->radeon, rrb->bo, - 0, RADEON_GEM_DOMAIN_VRAM); + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, + rrb->bo, 0, + RADEON_GEM_DOMAIN_VRAM); } for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) { @@ -311,17 +314,19 @@ GLboolean r300ValidateBuffers(GLcontext * ctx) } t = radeon_tex_obj(ctx->Texture.Unit[i]._Current); if (t->image_override && t->bo) - radeon_validate_bo(&rmesa->radeon, t->bo, - RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); - + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, + t->bo, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); else if (t->mt->bo) - radeon_validate_bo(&rmesa->radeon, t->mt->bo, - RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, + t->mt->bo, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); } - if (rmesa->radeon.dma.current) - radeon_validate_bo(&rmesa->radeon, rmesa->radeon.dma.current, RADEON_GEM_DOMAIN_GTT, 0); - return radeon_revalidate_bos(ctx); + ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, rmesa->radeon.dma.current, RADEON_GEM_DOMAIN_GTT, 0); + if (ret) + return GL_FALSE; + return GL_TRUE; } void r300SetTexOffset(__DRIcontext * pDRICtx, GLint texname, diff --git a/src/mesa/drivers/dri/radeon/Makefile b/src/mesa/drivers/dri/radeon/Makefile index ba409ba813..b59ad68f44 100644 --- a/src/mesa/drivers/dri/radeon/Makefile +++ b/src/mesa/drivers/dri/radeon/Makefile @@ -10,6 +10,10 @@ LIBNAME = radeon_dri.so MINIGLX_SOURCES = server/radeon_dri.c +ifeq ($(RADEON_LDFLAGS),) +CS_SOURCES = radeon_cs_space_drm.c +endif + RADEON_COMMON_SOURCES = \ radeon_texture.c \ radeon_common_context.c \ @@ -38,7 +42,8 @@ DRIVER_SOURCES = \ C_SOURCES = \ $(COMMON_SOURCES) \ - $(DRIVER_SOURCES) + $(DRIVER_SOURCES) \ + $(CS_SOURCES) DRIVER_DEFINES = -DRADEON_COMMON=0 diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_drm.h b/src/mesa/drivers/dri/radeon/radeon_bo_drm.h index 1ed13f1795..c5c28ed066 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bo_drm.h +++ b/src/mesa/drivers/dri/radeon/radeon_bo_drm.h @@ -68,6 +68,7 @@ struct radeon_bo_funcs { int (*bo_map)(struct radeon_bo *bo, int write); int (*bo_unmap)(struct radeon_bo *bo); int (*bo_wait)(struct radeon_bo *bo); + int (*bo_is_static)(struct radeon_bo *bo); }; struct radeon_bo_manager { @@ -164,6 +165,13 @@ static inline int _radeon_bo_wait(struct radeon_bo *bo, return bo->bom->funcs->bo_wait(bo); } +static inline int radeon_bo_is_static(struct radeon_bo *bo) +{ + if (bo->bom->funcs->bo_is_static) + return bo->bom->funcs->bo_is_static(bo); + return 0; +} + #define radeon_bo_open(bom, h, s, a, d, f)\ _radeon_bo_open(bom, h, s, a, d, f, __FILE__, __FUNCTION__, __LINE__) #define radeon_bo_ref(bo)\ diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c index 6a8da402b1..1fec7444cd 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c +++ b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c @@ -528,12 +528,21 @@ static int bo_unmap(struct radeon_bo *bo) return 0; } + +static int bo_is_static(struct radeon_bo *bo) +{ + struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; + return bo_legacy->static_bo; +} + static struct radeon_bo_funcs bo_legacy_funcs = { bo_open, bo_ref, bo_unref, bo_map, - bo_unmap + bo_unmap, + NULL, + bo_is_static, }; static int bo_vram_validate(struct radeon_bo *bo, @@ -822,9 +831,3 @@ unsigned radeon_bo_legacy_relocs_size(struct radeon_bo *bo) return bo->size; } -int radeon_legacy_bo_is_static(struct radeon_bo *bo) -{ - struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; - return bo_legacy->static_bo; -} - diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 7bd4a6f14f..bac72fbdfa 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -964,58 +964,17 @@ static INLINE void radeonEmitAtoms(radeonContextPtr radeon, GLboolean dirty) COMMIT_BATCH(); } -GLboolean radeon_revalidate_bos(GLcontext *ctx) +static GLboolean radeon_revalidate_bos(GLcontext *ctx) { radeonContextPtr radeon = RADEON_CONTEXT(ctx); - int flushed = 0; int ret; -again: - ret = radeon_cs_space_check(radeon->cmdbuf.cs, radeon->state.bos, radeon->state.validated_bo_count); - if (ret == RADEON_CS_SPACE_OP_TO_BIG) + + ret = radeon_cs_space_check(radeon->cmdbuf.cs); + if (ret == RADEON_CS_SPACE_FLUSH) return GL_FALSE; - if (ret == RADEON_CS_SPACE_FLUSH) { - radeonFlush(ctx); - if (flushed) - return GL_FALSE; - flushed = 1; - goto again; - } return GL_TRUE; } -void radeon_validate_reset_bos(radeonContextPtr radeon) -{ - int i; - - for (i = 0; i < radeon->state.validated_bo_count; i++) { - radeon_bo_unref(radeon->state.bos[i].bo); - radeon->state.bos[i].bo = NULL; - radeon->state.bos[i].read_domains = 0; - radeon->state.bos[i].write_domain = 0; - radeon->state.bos[i].new_accounted = 0; - } - radeon->state.validated_bo_count = 0; -} - -void radeon_validate_bo(radeonContextPtr radeon, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) -{ - int i; - for (i = 0; i < radeon->state.validated_bo_count; i++) { - if (radeon->state.bos[i].bo == bo && - radeon->state.bos[i].read_domains == read_domains && - radeon->state.bos[i].write_domain == write_domain) - return; - } - radeon_bo_ref(bo); - radeon->state.bos[radeon->state.validated_bo_count].bo = bo; - radeon->state.bos[radeon->state.validated_bo_count].read_domains = read_domains; - radeon->state.bos[radeon->state.validated_bo_count].write_domain = write_domain; - radeon->state.bos[radeon->state.validated_bo_count].new_accounted = 0; - radeon->state.validated_bo_count++; - - assert(radeon->state.validated_bo_count < RADEON_MAX_BOS); -} - void radeonEmitState(radeonContextPtr radeon) { if (RADEON_DEBUG & (DEBUG_STATE|DEBUG_PRIMS)) @@ -1229,6 +1188,9 @@ void rcommonInitCmdBuf(radeonContextPtr rmesa) assert(rmesa->cmdbuf.cs != NULL); rmesa->cmdbuf.size = size; + radeon_cs_space_set_flush(rmesa->cmdbuf.cs, + (void (*)(void *))radeonFlush, rmesa->glCtx); + if (!rmesa->radeonScreen->kernel_mm) { radeon_cs_set_limit(rmesa->cmdbuf.cs, RADEON_GEM_DOMAIN_VRAM, rmesa->radeonScreen->texSize[0]); radeon_cs_set_limit(rmesa->cmdbuf.cs, RADEON_GEM_DOMAIN_GTT, rmesa->radeonScreen->gartTextures.size); diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index b60792df0b..ba6c7c5773 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -47,10 +47,6 @@ void radeon_get_cliprects(radeonContextPtr radeon, struct drm_clip_rect **cliprects, unsigned int *num_cliprects, int *x_off, int *y_off); -GLboolean radeon_revalidate_bos(GLcontext *ctx); -void radeon_validate_bo(radeonContextPtr radeon, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain); -void radeon_validate_reset_bos(radeonContextPtr radeon); - void radeon_fbo_init(struct radeon_context *radeon); void radeon_renderbuffer_set_bo(struct radeon_renderbuffer *rb, diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_drm.h b/src/mesa/drivers/dri/radeon/radeon_cs_drm.h index 984725a6c9..ee403d173c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cs_drm.h +++ b/src/mesa/drivers/dri/radeon/radeon_cs_drm.h @@ -56,6 +56,8 @@ struct radeon_cs_space_check { uint32_t new_accounted; }; +#define MAX_SPACE_BOS (32) + struct radeon_cs_manager; struct radeon_cs { @@ -72,7 +74,10 @@ struct radeon_cs { const char *section_file; const char *section_func; int section_line; - + struct radeon_cs_space_check bos[MAX_SPACE_BOS]; + int bo_count; + void (*space_flush_fn)(void *); + void *space_flush_data; }; /* cs functions */ @@ -98,16 +103,14 @@ struct radeon_cs_funcs { int (*cs_erase)(struct radeon_cs *cs); int (*cs_need_flush)(struct radeon_cs *cs); void (*cs_print)(struct radeon_cs *cs, FILE *file); - int (*cs_space_check)(struct radeon_cs *cs, struct radeon_cs_space_check *bos, - int num_bo); }; struct radeon_cs_manager { struct radeon_cs_funcs *funcs; int fd; - uint32_t vram_limit, gart_limit; - uint32_t vram_write_used, gart_write_used; - uint32_t read_used; + int32_t vram_limit, gart_limit; + int32_t vram_write_used, gart_write_used; + int32_t read_used; }; static inline struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm, @@ -171,13 +174,6 @@ static inline void radeon_cs_print(struct radeon_cs *cs, FILE *file) cs->csm->funcs->cs_print(cs, file); } -static inline int radeon_cs_space_check(struct radeon_cs *cs, - struct radeon_cs_space_check *bos, - int num_bo) -{ - return cs->csm->funcs->cs_space_check(cs, bos, num_bo); -} - static inline void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit) { @@ -204,4 +200,38 @@ static inline void radeon_cs_write_qword(struct radeon_cs *cs, uint64_t qword) cs->section_cdw+=2; } } + +static inline void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data) +{ + cs->space_flush_fn = fn; + cs->space_flush_data = data; +} + + +/* + * add a persistent BO to the list + * a persistent BO is one that will be referenced across flushes, + * i.e. colorbuffer, textures etc. + * They get reset when a new "operation" happens, where an operation + * is a state emission with a color/textures etc followed by a bunch of vertices. + */ +void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, + struct radeon_bo *bo, + uint32_t read_domains, + uint32_t write_domain); + +/* reset the persistent BO list */ +void radeon_cs_space_reset_bos(struct radeon_cs *cs); + +/* do a space check with the current persistent BO list */ +int radeon_cs_space_check(struct radeon_cs *cs); + +/* do a space check with the current persistent BO list and a temporary BO + * a temporary BO is like a DMA buffer, which gets flushed with the + * command buffer */ +int radeon_cs_space_check_with_bo(struct radeon_cs *cs, + struct radeon_bo *bo, + uint32_t read_domains, + uint32_t write_domain); + #endif diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c index ac94789417..f77e22c437 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c +++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c @@ -365,105 +365,6 @@ static void cs_print(struct radeon_cs *cs, FILE *file) { } -static int cs_check_space(struct radeon_cs *cs, struct radeon_cs_space_check *bos, int num_bo) -{ - struct radeon_cs_manager *csm = cs->csm; - int this_op_read = 0, this_op_gart_write = 0, this_op_vram_write = 0; - uint32_t read_domains, write_domain; - int i; - struct radeon_bo *bo; - - /* check the totals for this operation */ - - if (num_bo == 0) - return 0; - - /* prepare */ - for (i = 0; i < num_bo; i++) { - bo = bos[i].bo; - - bos[i].new_accounted = 0; - read_domains = bos[i].read_domains; - write_domain = bos[i].write_domain; - - /* pinned bos don't count */ - if (radeon_legacy_bo_is_static(bo)) - continue; - - /* already accounted this bo */ - if (write_domain && (write_domain == bo->space_accounted)) { - bos[i].new_accounted = bo->space_accounted; - continue; - } - - if (read_domains && ((read_domains << 16) == bo->space_accounted)) { - bos[i].new_accounted = bo->space_accounted; - continue; - } - - if (bo->space_accounted == 0) { - if (write_domain == RADEON_GEM_DOMAIN_VRAM) - this_op_vram_write += bo->size; - else if (write_domain == RADEON_GEM_DOMAIN_GTT) - this_op_gart_write += bo->size; - else - this_op_read += bo->size; - bos[i].new_accounted = (read_domains << 16) | write_domain; - } else { - uint16_t old_read, old_write; - - old_read = bo->space_accounted >> 16; - old_write = bo->space_accounted & 0xffff; - - if (write_domain && (old_read & write_domain)) { - bos[i].new_accounted = write_domain; - /* moving from read to a write domain */ - if (write_domain == RADEON_GEM_DOMAIN_VRAM) { - this_op_read -= bo->size; - this_op_vram_write += bo->size; - } else if (write_domain == RADEON_GEM_DOMAIN_VRAM) { - this_op_read -= bo->size; - this_op_gart_write += bo->size; - } - } else if (read_domains & old_write) { - bos[i].new_accounted = bo->space_accounted & 0xffff; - } else { - /* rewrite the domains */ - if (write_domain != old_write) - fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write); - if (read_domains != old_read) - fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read); - return RADEON_CS_SPACE_FLUSH; - } - } - } - - if (this_op_read < 0) - this_op_read = 0; - - /* check sizes - operation first */ - if ((this_op_read + this_op_gart_write > csm->gart_limit) || - (this_op_vram_write > csm->vram_limit)) { - return RADEON_CS_SPACE_OP_TO_BIG; - } - - if (((csm->vram_write_used + this_op_vram_write) > csm->vram_limit) || - ((csm->read_used + csm->gart_write_used + this_op_gart_write + this_op_read) > csm->gart_limit)) { - return RADEON_CS_SPACE_FLUSH; - } - - csm->gart_write_used += this_op_gart_write; - csm->vram_write_used += this_op_vram_write; - csm->read_used += this_op_read; - /* commit */ - for (i = 0; i < num_bo; i++) { - bo = bos[i].bo; - bo->space_accounted = bos[i].new_accounted; - } - - return RADEON_CS_SPACE_OK; -} - static struct radeon_cs_funcs radeon_cs_legacy_funcs = { cs_create, cs_write_reloc, @@ -474,7 +375,6 @@ static struct radeon_cs_funcs radeon_cs_legacy_funcs = { cs_erase, cs_need_flush, cs_print, - cs_check_space }; struct radeon_cs_manager *radeon_cs_manager_legacy_ctor(struct radeon_context *ctx) diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_space_drm.c b/src/mesa/drivers/dri/radeon/radeon_cs_space_drm.c new file mode 100644 index 0000000000..5a8df7bb8c --- /dev/null +++ b/src/mesa/drivers/dri/radeon/radeon_cs_space_drm.c @@ -0,0 +1,234 @@ +/* + * Copyright © 2009 Red Hat Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ +/* + */ +#include +#include +#include +#include "radeon_bocs_wrapper.h" + +struct rad_sizes { + int32_t op_read; + int32_t op_gart_write; + int32_t op_vram_write; +}; + +static inline int radeon_cs_setup_bo(struct radeon_cs_space_check *sc, struct rad_sizes *sizes) +{ + uint32_t read_domains, write_domain; + struct radeon_bo *bo; + + bo = sc->bo; + sc->new_accounted = 0; + read_domains = sc->read_domains; + write_domain = sc->write_domain; + + /* legacy needs a static check */ + if (radeon_bo_is_static(bo)) { + bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain; + return 0; + } + + /* already accounted this bo */ + if (write_domain && (write_domain == bo->space_accounted)) { + sc->new_accounted = bo->space_accounted; + return 0; + } + if (read_domains && ((read_domains << 16) == bo->space_accounted)) { + sc->new_accounted = bo->space_accounted; + return 0; + } + + if (bo->space_accounted == 0) { + if (write_domain == RADEON_GEM_DOMAIN_VRAM) + sizes->op_vram_write += bo->size; + else if (write_domain == RADEON_GEM_DOMAIN_GTT) + sizes->op_gart_write += bo->size; + else + sizes->op_read += bo->size; + sc->new_accounted = (read_domains << 16) | write_domain; + } else { + uint16_t old_read, old_write; + + old_read = bo->space_accounted >> 16; + old_write = bo->space_accounted & 0xffff; + + if (write_domain && (old_read & write_domain)) { + sc->new_accounted = write_domain; + /* moving from read to a write domain */ + if (write_domain == RADEON_GEM_DOMAIN_VRAM) { + sizes->op_read -= bo->size; + sizes->op_vram_write += bo->size; + } else if (write_domain == RADEON_GEM_DOMAIN_VRAM) { + sizes->op_read -= bo->size; + sizes->op_gart_write += bo->size; + } + } else if (read_domains & old_write) { + sc->new_accounted = bo->space_accounted & 0xffff; + } else { + /* rewrite the domains */ + if (write_domain != old_write) + fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write); + if (read_domains != old_read) + fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read); + return RADEON_CS_SPACE_FLUSH; + } + } + return 0; +} + +static int radeon_cs_do_space_check(struct radeon_cs *cs, struct radeon_cs_space_check *new_tmp) +{ + struct radeon_cs_manager *csm = cs->csm; + int i; + struct radeon_bo *bo; + struct rad_sizes sizes; + int ret; + + /* check the totals for this operation */ + + if (cs->bo_count == 0 && !new_tmp) + return 0; + + memset(&sizes, 0, sizeof(struct rad_sizes)); + + /* prepare */ + for (i = 0; i < cs->bo_count; i++) { + ret = radeon_cs_setup_bo(&cs->bos[i], &sizes); + if (ret) + return ret; + } + + if (new_tmp) { + ret = radeon_cs_setup_bo(new_tmp, &sizes); + if (ret) + return ret; + } + + if (sizes.op_read < 0) + sizes.op_read = 0; + + /* check sizes - operation first */ + if ((sizes.op_read + sizes.op_gart_write > csm->gart_limit) || + (sizes.op_vram_write > csm->vram_limit)) { + return RADEON_CS_SPACE_OP_TO_BIG; + } + + if (((csm->vram_write_used + sizes.op_vram_write) > csm->vram_limit) || + ((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) { + return RADEON_CS_SPACE_FLUSH; + } + + csm->gart_write_used += sizes.op_gart_write; + csm->vram_write_used += sizes.op_vram_write; + csm->read_used += sizes.op_read; + /* commit */ + for (i = 0; i < cs->bo_count; i++) { + bo = cs->bos[i].bo; + bo->space_accounted = cs->bos[i].new_accounted; + } + if (new_tmp) + new_tmp->bo->space_accounted = new_tmp->new_accounted; + + return RADEON_CS_SPACE_OK; +} + +void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) +{ + int i; + for (i = 0; i < cs->bo_count; i++) { + if (cs->bos[i].bo == bo && + cs->bos[i].read_domains == read_domains && + cs->bos[i].write_domain == write_domain) + return; + } + radeon_bo_ref(bo); + i = cs->bo_count; + cs->bos[i].bo = bo; + cs->bos[i].read_domains = read_domains; + cs->bos[i].write_domain = write_domain; + cs->bos[i].new_accounted = 0; + cs->bo_count++; + + assert(cs->bo_count < MAX_SPACE_BOS); +} + +static int radeon_cs_check_space_internal(struct radeon_cs *cs, struct radeon_cs_space_check *tmp_bo) +{ + int ret; + int flushed = 0; + +again: + ret = radeon_cs_do_space_check(cs, tmp_bo); + if (ret == RADEON_CS_SPACE_OP_TO_BIG) + return -1; + if (ret == RADEON_CS_SPACE_FLUSH) { + (*cs->space_flush_fn)(cs->space_flush_data); + if (flushed) + return -1; + flushed = 1; + goto again; + } + return 0; +} + +int radeon_cs_space_check_with_bo(struct radeon_cs *cs, + struct radeon_bo *bo, + uint32_t read_domains, uint32_t write_domain) +{ + struct radeon_cs_space_check temp_bo; + int ret = 0; + + if (bo) { + temp_bo.bo = bo; + temp_bo.read_domains = read_domains; + temp_bo.write_domain = write_domain; + temp_bo.new_accounted = 0; + } + + ret = radeon_cs_check_space_internal(cs, bo ? &temp_bo : NULL); + return ret; +} + +int radeon_cs_space_check(struct radeon_cs *cs) +{ + return radeon_cs_check_space_internal(cs, NULL); +} + +void radeon_cs_space_reset_bos(struct radeon_cs *cs) +{ + int i; + for (i = 0; i < cs->bo_count; i++) { + radeon_bo_unref(cs->bos[i].bo); + cs->bos[i].bo = NULL; + cs->bos[i].read_domains = 0; + cs->bos[i].write_domain = 0; + cs->bos[i].new_accounted = 0; + } + cs->bo_count = 0; +} + + diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c index 48b0d63818..dc9a0157f7 100644 --- a/src/mesa/drivers/dri/radeon/radeon_dma.c +++ b/src/mesa/drivers/dri/radeon/radeon_dma.c @@ -198,10 +198,10 @@ again_alloc: rmesa->dma.current_used = 0; rmesa->dma.current_vertexptr = 0; - radeon_validate_bo(rmesa, rmesa->dma.current, RADEON_GEM_DOMAIN_GTT, 0); - - if (radeon_revalidate_bos(rmesa->glCtx) == GL_FALSE) - fprintf(stderr,"failure to revalidate BOs - badness\n"); + if (radeon_cs_space_check_with_bo(rmesa->cmdbuf.cs, + rmesa->dma.current, + RADEON_GEM_DOMAIN_GTT, 0)) + fprintf(stderr,"failure to revalidate BOs - badness\n"); if (!rmesa->dma.current) { /* Cmd buff have been flushed in radeon_revalidate_bos */ diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 06b8c29936..528348a300 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -2048,23 +2048,23 @@ static GLboolean r100ValidateBuffers(GLcontext *ctx) { r100ContextPtr rmesa = R100_CONTEXT(ctx); struct radeon_renderbuffer *rrb; - int i; + int i, ret; - radeon_validate_reset_bos(&rmesa->radeon); + radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs); rrb = radeon_get_colorbuffer(&rmesa->radeon); /* color buffer */ if (rrb && rrb->bo) { - radeon_validate_bo(&rmesa->radeon, rrb->bo, - 0, RADEON_GEM_DOMAIN_VRAM); + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); } /* depth buffer */ rrb = radeon_get_depthbuffer(&rmesa->radeon); /* color buffer */ if (rrb && rrb->bo) { - radeon_validate_bo(&rmesa->radeon, rrb->bo, - 0, RADEON_GEM_DOMAIN_VRAM); + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, rrb->bo, + 0, RADEON_GEM_DOMAIN_VRAM); } for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) { @@ -2075,18 +2075,17 @@ static GLboolean r100ValidateBuffers(GLcontext *ctx) t = radeon_tex_obj(ctx->Texture.Unit[i]._Current); if (t->image_override && t->bo) - radeon_validate_bo(&rmesa->radeon, t->bo, + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, t->bo, RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); else if (t->mt->bo) - radeon_validate_bo(&rmesa->radeon, t->mt->bo, + radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, t->mt->bo, RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); } - if (rmesa->radeon.dma.current) - radeon_validate_bo(&rmesa->radeon, rmesa->radeon.dma.current, - RADEON_GEM_DOMAIN_GTT, 0); - - return radeon_revalidate_bos(ctx); + ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, rmesa->radeon.dma.current, RADEON_GEM_DOMAIN_GTT, 0); + if (ret) + return GL_FALSE; + return GL_TRUE; } GLboolean radeonValidateState( GLcontext *ctx ) -- cgit v1.2.3 From f6f0e117a45a64464e49290ebc9f75b9a976070a Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 15 Jul 2009 09:35:09 +1000 Subject: intel/radeon: add common metaops code. Move all the metaops to a dri_metaops file and port radeon/intel to use the new common meta ops code. --- src/mesa/drivers/dri/Makefile.template | 3 +- src/mesa/drivers/dri/common/dri_metaops.c | 541 +++++++++++++++++++++ src/mesa/drivers/dri/common/dri_metaops.h | 99 ++++ src/mesa/drivers/dri/intel/intel_clear.c | 247 +--------- src/mesa/drivers/dri/intel/intel_context.c | 6 +- src/mesa/drivers/dri/intel/intel_context.h | 33 +- src/mesa/drivers/dri/intel/intel_generatemipmap.c | 18 +- src/mesa/drivers/dri/intel/intel_pixel.c | 251 ---------- src/mesa/drivers/dri/intel/intel_pixel.h | 15 - src/mesa/drivers/dri/intel/intel_pixel_bitmap.c | 16 +- src/mesa/drivers/dri/intel/intel_pixel_draw.c | 16 +- src/mesa/drivers/dri/r200/r200_ioctl.c | 7 +- src/mesa/drivers/dri/r300/r300_ioctl.c | 7 +- src/mesa/drivers/dri/radeon/radeon_common.c | 252 +--------- src/mesa/drivers/dri/radeon/radeon_common.h | 13 +- .../drivers/dri/radeon/radeon_common_context.c | 3 +- .../drivers/dri/radeon/radeon_common_context.h | 23 +- src/mesa/drivers/dri/radeon/radeon_ioctl.c | 5 - 18 files changed, 684 insertions(+), 871 deletions(-) create mode 100644 src/mesa/drivers/dri/common/dri_metaops.c create mode 100644 src/mesa/drivers/dri/common/dri_metaops.h (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/Makefile.template b/src/mesa/drivers/dri/Makefile.template index bd38e3be47..18dbeba24a 100644 --- a/src/mesa/drivers/dri/Makefile.template +++ b/src/mesa/drivers/dri/Makefile.template @@ -11,7 +11,8 @@ COMMON_GALLIUM_SOURCES = \ COMMON_SOURCES = $(COMMON_GALLIUM_SOURCES) \ ../../common/driverfuncs.c \ ../common/texmem.c \ - ../common/drirenderbuffer.c + ../common/drirenderbuffer.c \ + ../common/dri_metaops.c ifeq ($(WINDOW_SYSTEM),dri) WINOBJ= diff --git a/src/mesa/drivers/dri/common/dri_metaops.c b/src/mesa/drivers/dri/common/dri_metaops.c new file mode 100644 index 0000000000..fe183c2e87 --- /dev/null +++ b/src/mesa/drivers/dri/common/dri_metaops.c @@ -0,0 +1,541 @@ +/************************************************************************** + * + * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. + * Copyright 2009 Intel Corporation. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#include "main/arrayobj.h" +#include "main/attrib.h" +#include "main/blend.h" +#include "main/bufferobj.h" +#include "main/buffers.h" +#include "main/depth.h" +#include "main/enable.h" +#include "main/matrix.h" +#include "main/macros.h" +#include "main/polygon.h" +#include "main/shaders.h" +#include "main/stencil.h" +#include "main/texstate.h" +#include "main/varray.h" +#include "main/viewport.h" +#include "shader/arbprogram.h" +#include "shader/program.h" +#include "dri_metaops.h" + +void +meta_set_passthrough_transform(struct dri_metaops *meta) +{ + GLcontext *ctx = meta->ctx; + + meta->saved_vp_x = ctx->Viewport.X; + meta->saved_vp_y = ctx->Viewport.Y; + meta->saved_vp_width = ctx->Viewport.Width; + meta->saved_vp_height = ctx->Viewport.Height; + meta->saved_matrix_mode = ctx->Transform.MatrixMode; + + meta->internal_viewport_call = GL_TRUE; + _mesa_Viewport(0, 0, ctx->DrawBuffer->Width, ctx->DrawBuffer->Height); + meta->internal_viewport_call = GL_FALSE; + + _mesa_MatrixMode(GL_PROJECTION); + _mesa_PushMatrix(); + _mesa_LoadIdentity(); + _mesa_Ortho(0, ctx->DrawBuffer->Width, 0, ctx->DrawBuffer->Height, 1, -1); + + _mesa_MatrixMode(GL_MODELVIEW); + _mesa_PushMatrix(); + _mesa_LoadIdentity(); +} + +void +meta_restore_transform(struct dri_metaops *meta) +{ + _mesa_MatrixMode(GL_PROJECTION); + _mesa_PopMatrix(); + _mesa_MatrixMode(GL_MODELVIEW); + _mesa_PopMatrix(); + + _mesa_MatrixMode(meta->saved_matrix_mode); + + meta->internal_viewport_call = GL_TRUE; + _mesa_Viewport(meta->saved_vp_x, meta->saved_vp_y, + meta->saved_vp_width, meta->saved_vp_height); + meta->internal_viewport_call = GL_FALSE; +} + + +/** + * Set up a vertex program to pass through the position and first texcoord + * for pixel path. + */ +void +meta_set_passthrough_vertex_program(struct dri_metaops *meta) +{ + GLcontext *ctx = meta->ctx; + static const char *vp = + "!!ARBvp1.0\n" + "TEMP vertexClip;\n" + "DP4 vertexClip.x, state.matrix.mvp.row[0], vertex.position;\n" + "DP4 vertexClip.y, state.matrix.mvp.row[1], vertex.position;\n" + "DP4 vertexClip.z, state.matrix.mvp.row[2], vertex.position;\n" + "DP4 vertexClip.w, state.matrix.mvp.row[3], vertex.position;\n" + "MOV result.position, vertexClip;\n" + "MOV result.texcoord[0], vertex.texcoord[0];\n" + "MOV result.color, vertex.color;\n" + "END\n"; + + assert(meta->saved_vp == NULL); + + _mesa_reference_vertprog(ctx, &meta->saved_vp, + ctx->VertexProgram.Current); + if (meta->passthrough_vp == NULL) { + GLuint prog_name; + _mesa_GenPrograms(1, &prog_name); + _mesa_BindProgram(GL_VERTEX_PROGRAM_ARB, prog_name); + _mesa_ProgramStringARB(GL_VERTEX_PROGRAM_ARB, + GL_PROGRAM_FORMAT_ASCII_ARB, + strlen(vp), (const GLubyte *)vp); + _mesa_reference_vertprog(ctx, &meta->passthrough_vp, + ctx->VertexProgram.Current); + _mesa_DeletePrograms(1, &prog_name); + } + + FLUSH_VERTICES(ctx, _NEW_PROGRAM); + _mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current, + meta->passthrough_vp); + ctx->Driver.BindProgram(ctx, GL_VERTEX_PROGRAM_ARB, + &meta->passthrough_vp->Base); + + meta->saved_vp_enable = ctx->VertexProgram.Enabled; + _mesa_Enable(GL_VERTEX_PROGRAM_ARB); +} + +/** + * Restores the previous vertex program after + * meta_set_passthrough_vertex_program() + */ +void +meta_restore_vertex_program(struct dri_metaops *meta) +{ + GLcontext *ctx = meta->ctx; + + FLUSH_VERTICES(ctx, _NEW_PROGRAM); + _mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current, + meta->saved_vp); + _mesa_reference_vertprog(ctx, &meta->saved_vp, NULL); + ctx->Driver.BindProgram(ctx, GL_VERTEX_PROGRAM_ARB, + &ctx->VertexProgram.Current->Base); + + if (!meta->saved_vp_enable) + _mesa_Disable(GL_VERTEX_PROGRAM_ARB); +} + +/** + * Binds the given program string to GL_FRAGMENT_PROGRAM_ARB, caching the + * program object. + */ +void +meta_set_fragment_program(struct dri_metaops *meta, + struct gl_fragment_program **prog, + const char *prog_string) +{ + GLcontext *ctx = meta->ctx; + assert(meta->saved_fp == NULL); + + _mesa_reference_fragprog(ctx, &meta->saved_fp, + ctx->FragmentProgram.Current); + if (*prog == NULL) { + GLuint prog_name; + _mesa_GenPrograms(1, &prog_name); + _mesa_BindProgram(GL_FRAGMENT_PROGRAM_ARB, prog_name); + _mesa_ProgramStringARB(GL_FRAGMENT_PROGRAM_ARB, + GL_PROGRAM_FORMAT_ASCII_ARB, + strlen(prog_string), (const GLubyte *)prog_string); + _mesa_reference_fragprog(ctx, prog, ctx->FragmentProgram.Current); + /* Note that DeletePrograms unbinds the program on us */ + _mesa_DeletePrograms(1, &prog_name); + } + + FLUSH_VERTICES(ctx, _NEW_PROGRAM); + _mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, *prog); + ctx->Driver.BindProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, &((*prog)->Base)); + + meta->saved_fp_enable = ctx->FragmentProgram.Enabled; + _mesa_Enable(GL_FRAGMENT_PROGRAM_ARB); +} + +/** + * Restores the previous fragment program after + * meta_set_fragment_program() + */ +void +meta_restore_fragment_program(struct dri_metaops *meta) +{ + GLcontext *ctx = meta->ctx; + + FLUSH_VERTICES(ctx, _NEW_PROGRAM); + _mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, + meta->saved_fp); + _mesa_reference_fragprog(ctx, &meta->saved_fp, NULL); + ctx->Driver.BindProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, + &ctx->FragmentProgram.Current->Base); + + if (!meta->saved_fp_enable) + _mesa_Disable(GL_FRAGMENT_PROGRAM_ARB); +} + +static const float default_texcoords[4][2] = { { 0.0, 0.0 }, + { 1.0, 0.0 }, + { 1.0, 1.0 }, + { 0.0, 1.0 } }; + +void +meta_set_default_texrect(struct dri_metaops *meta) +{ + GLcontext *ctx = meta->ctx; + struct gl_client_array *old_texcoord_array; + + meta->saved_active_texture = ctx->Texture.CurrentUnit; + if (meta->saved_array_vbo == NULL) { + _mesa_reference_buffer_object(ctx, &meta->saved_array_vbo, + ctx->Array.ArrayBufferObj); + } + + old_texcoord_array = &ctx->Array.ArrayObj->TexCoord[0]; + meta->saved_texcoord_type = old_texcoord_array->Type; + meta->saved_texcoord_size = old_texcoord_array->Size; + meta->saved_texcoord_stride = old_texcoord_array->Stride; + meta->saved_texcoord_enable = old_texcoord_array->Enabled; + meta->saved_texcoord_ptr = old_texcoord_array->Ptr; + _mesa_reference_buffer_object(ctx, &meta->saved_texcoord_vbo, + old_texcoord_array->BufferObj); + + _mesa_ClientActiveTextureARB(GL_TEXTURE0); + + if (meta->texcoord_vbo == NULL) { + GLuint vbo_name; + + _mesa_GenBuffersARB(1, &vbo_name); + _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, vbo_name); + _mesa_BufferDataARB(GL_ARRAY_BUFFER_ARB, sizeof(default_texcoords), + default_texcoords, GL_STATIC_DRAW_ARB); + _mesa_reference_buffer_object(ctx, &meta->texcoord_vbo, + ctx->Array.ArrayBufferObj); + } else { + _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, + meta->texcoord_vbo->Name); + } + _mesa_TexCoordPointer(2, GL_FLOAT, 2 * sizeof(GLfloat), NULL); + + _mesa_Enable(GL_TEXTURE_COORD_ARRAY); +} + +void +meta_restore_texcoords(struct dri_metaops *meta) +{ + GLcontext *ctx = meta->ctx; + + /* Restore the old TexCoordPointer */ + if (meta->saved_texcoord_vbo) { + _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, + meta->saved_texcoord_vbo->Name); + _mesa_reference_buffer_object(ctx, &meta->saved_texcoord_vbo, NULL); + } else { + _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, 0); + } + + _mesa_TexCoordPointer(meta->saved_texcoord_size, + meta->saved_texcoord_type, + meta->saved_texcoord_stride, + meta->saved_texcoord_ptr); + if (!meta->saved_texcoord_enable) + _mesa_Disable(GL_TEXTURE_COORD_ARRAY); + + _mesa_ClientActiveTextureARB(GL_TEXTURE0 + + meta->saved_active_texture); + + if (meta->saved_array_vbo) { + _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, + meta->saved_array_vbo->Name); + _mesa_reference_buffer_object(ctx, &meta->saved_array_vbo, NULL); + } else { + _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, 0); + } +} + + +/** + * Perform glClear where mask contains only color, depth, and/or stencil. + * + * The implementation is based on calling into Mesa to set GL state and + * performing normal triangle rendering. The intent of this path is to + * have as generic a path as possible, so that any driver could make use of + * it. + */ + +/** + * Per-context one-time init of things for intl_clear_tris(). + * Basically set up a private array object for vertex/color arrays. + */ +static void +meta_init_clear(struct dri_metaops *meta) +{ + GLcontext *ctx = meta->ctx; + struct gl_array_object *arraySave = NULL; + const GLuint arrayBuffer = ctx->Array.ArrayBufferObj->Name; + const GLuint elementBuffer = ctx->Array.ElementArrayBufferObj->Name; + + /* create new array object */ + meta->clear.arrayObj = _mesa_new_array_object(ctx, ~0); + + /* save current array object, bind new one */ + _mesa_reference_array_object(ctx, &arraySave, ctx->Array.ArrayObj); + ctx->NewState |= _NEW_ARRAY; + ctx->Array.NewState |= _NEW_ARRAY_ALL; + _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, meta->clear.arrayObj); + + /* one-time setup of vertex arrays (pos, color) */ + _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, 0); + _mesa_BindBufferARB(GL_ELEMENT_ARRAY_BUFFER_ARB, 0); + _mesa_ColorPointer(4, GL_FLOAT, 4 * sizeof(GLfloat), meta->clear.color); + _mesa_VertexPointer(3, GL_FLOAT, 3 * sizeof(GLfloat), meta->clear.vertices); + _mesa_Enable(GL_COLOR_ARRAY); + _mesa_Enable(GL_VERTEX_ARRAY); + + /* restore original array object */ + ctx->NewState |= _NEW_ARRAY; + ctx->Array.NewState |= _NEW_ARRAY_ALL; + _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, arraySave); + _mesa_reference_array_object(ctx, &arraySave, NULL); + + /* restore original buffer objects */ + _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, arrayBuffer); + _mesa_BindBufferARB(GL_ELEMENT_ARRAY_BUFFER_ARB, elementBuffer); +} + + + +/** + * Perform glClear where mask contains only color, depth, and/or stencil. + * + * The implementation is based on calling into Mesa to set GL state and + * performing normal triangle rendering. The intent of this path is to + * have as generic a path as possible, so that any driver could make use of + * it. + */ +void +meta_clear_tris(struct dri_metaops *meta, GLbitfield mask) +{ + GLcontext *ctx = meta->ctx; + GLfloat dst_z; + struct gl_framebuffer *fb = ctx->DrawBuffer; + int i; + GLboolean saved_fp_enable = GL_FALSE, saved_vp_enable = GL_FALSE; + GLuint saved_shader_program = 0; + unsigned int saved_active_texture; + struct gl_array_object *arraySave = NULL; + + if (!meta->clear.arrayObj) + meta_init_clear(meta); + + assert((mask & ~(TRI_CLEAR_COLOR_BITS | BUFFER_BIT_DEPTH | + BUFFER_BIT_STENCIL)) == 0); + + _mesa_PushAttrib(GL_COLOR_BUFFER_BIT | + GL_DEPTH_BUFFER_BIT | + GL_ENABLE_BIT | + GL_POLYGON_BIT | + GL_STENCIL_BUFFER_BIT | + GL_TRANSFORM_BIT | + GL_CURRENT_BIT | + GL_VIEWPORT_BIT); + saved_active_texture = ctx->Texture.CurrentUnit; + + /* Disable existing GL state we don't want to apply to a clear. */ + _mesa_Disable(GL_ALPHA_TEST); + _mesa_Disable(GL_BLEND); + _mesa_Disable(GL_CULL_FACE); + _mesa_Disable(GL_FOG); + _mesa_Disable(GL_POLYGON_SMOOTH); + _mesa_Disable(GL_POLYGON_STIPPLE); + _mesa_Disable(GL_POLYGON_OFFSET_FILL); + _mesa_Disable(GL_LIGHTING); + _mesa_Disable(GL_CLIP_PLANE0); + _mesa_Disable(GL_CLIP_PLANE1); + _mesa_Disable(GL_CLIP_PLANE2); + _mesa_Disable(GL_CLIP_PLANE3); + _mesa_Disable(GL_CLIP_PLANE4); + _mesa_Disable(GL_CLIP_PLANE5); + _mesa_PolygonMode(GL_FRONT_AND_BACK, GL_FILL); + if (ctx->Extensions.ARB_fragment_program && ctx->FragmentProgram.Enabled) { + saved_fp_enable = GL_TRUE; + _mesa_Disable(GL_FRAGMENT_PROGRAM_ARB); + } + if (ctx->Extensions.ARB_vertex_program && ctx->VertexProgram.Enabled) { + saved_vp_enable = GL_TRUE; + _mesa_Disable(GL_VERTEX_PROGRAM_ARB); + } + if (ctx->Extensions.ARB_shader_objects && ctx->Shader.CurrentProgram) { + saved_shader_program = ctx->Shader.CurrentProgram->Name; + _mesa_UseProgramObjectARB(0); + } + + if (ctx->Texture._EnabledUnits != 0) { + int i; + + for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { + _mesa_ActiveTextureARB(GL_TEXTURE0 + i); + _mesa_Disable(GL_TEXTURE_1D); + _mesa_Disable(GL_TEXTURE_2D); + _mesa_Disable(GL_TEXTURE_3D); + if (ctx->Extensions.ARB_texture_cube_map) + _mesa_Disable(GL_TEXTURE_CUBE_MAP_ARB); + if (ctx->Extensions.NV_texture_rectangle) + _mesa_Disable(GL_TEXTURE_RECTANGLE_NV); + if (ctx->Extensions.MESA_texture_array) { + _mesa_Disable(GL_TEXTURE_1D_ARRAY_EXT); + _mesa_Disable(GL_TEXTURE_2D_ARRAY_EXT); + } + } + } + + /* save current array object, bind our private one */ + _mesa_reference_array_object(ctx, &arraySave, ctx->Array.ArrayObj); + ctx->NewState |= _NEW_ARRAY; + ctx->Array.NewState |= _NEW_ARRAY_ALL; + _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, meta->clear.arrayObj); + + meta_set_passthrough_transform(meta); + + for (i = 0; i < 4; i++) { + COPY_4FV(meta->clear.color[i], ctx->Color.ClearColor); + } + + /* convert clear Z from [0,1] to NDC coord in [-1,1] */ + dst_z = -1.0 + 2.0 * ctx->Depth.Clear; + + /* The ClearDepth value is unaffected by DepthRange, so do a default + * mapping. + */ + _mesa_DepthRange(0.0, 1.0); + + /* Prepare the vertices, which are the same regardless of which buffer we're + * drawing to. + */ + meta->clear.vertices[0][0] = fb->_Xmin; + meta->clear.vertices[0][1] = fb->_Ymin; + meta->clear.vertices[0][2] = dst_z; + meta->clear.vertices[1][0] = fb->_Xmax; + meta->clear.vertices[1][1] = fb->_Ymin; + meta->clear.vertices[1][2] = dst_z; + meta->clear.vertices[2][0] = fb->_Xmax; + meta->clear.vertices[2][1] = fb->_Ymax; + meta->clear.vertices[2][2] = dst_z; + meta->clear.vertices[3][0] = fb->_Xmin; + meta->clear.vertices[3][1] = fb->_Ymax; + meta->clear.vertices[3][2] = dst_z; + + while (mask != 0) { + GLuint this_mask = 0; + GLuint color_bit; + + color_bit = _mesa_ffs(mask & TRI_CLEAR_COLOR_BITS); + if (color_bit != 0) + this_mask |= (1 << (color_bit - 1)); + + /* Clear depth/stencil in the same pass as color. */ + this_mask |= (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)); + + /* Select the current color buffer and use the color write mask if + * we have one, otherwise don't write any color channels. + */ + if (this_mask & BUFFER_BIT_FRONT_LEFT) + _mesa_DrawBuffer(GL_FRONT_LEFT); + else if (this_mask & BUFFER_BIT_BACK_LEFT) + _mesa_DrawBuffer(GL_BACK_LEFT); + else if (color_bit != 0) + _mesa_DrawBuffer(GL_COLOR_ATTACHMENT0 + + (color_bit - BUFFER_COLOR0 - 1)); + else + _mesa_ColorMask(GL_FALSE, GL_FALSE, GL_FALSE, GL_FALSE); + + /* Control writing of the depth clear value to depth. */ + if (this_mask & BUFFER_BIT_DEPTH) { + _mesa_DepthFunc(GL_ALWAYS); + _mesa_Enable(GL_DEPTH_TEST); + } else { + _mesa_Disable(GL_DEPTH_TEST); + _mesa_DepthMask(GL_FALSE); + } + + /* Control writing of the stencil clear value to stencil. */ + if (this_mask & BUFFER_BIT_STENCIL) { + _mesa_Enable(GL_STENCIL_TEST); + _mesa_StencilOpSeparate(GL_FRONT_AND_BACK, + GL_REPLACE, GL_REPLACE, GL_REPLACE); + _mesa_StencilFuncSeparate(GL_FRONT_AND_BACK, GL_ALWAYS, + ctx->Stencil.Clear & 0x7fffffff, + ctx->Stencil.WriteMask[0]); + } else { + _mesa_Disable(GL_STENCIL_TEST); + } + + _mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4); + + mask &= ~this_mask; + } + + meta_restore_transform(meta); + + _mesa_ActiveTextureARB(GL_TEXTURE0 + saved_active_texture); + if (saved_fp_enable) + _mesa_Enable(GL_FRAGMENT_PROGRAM_ARB); + if (saved_vp_enable) + _mesa_Enable(GL_VERTEX_PROGRAM_ARB); + + if (saved_shader_program) + _mesa_UseProgramObjectARB(saved_shader_program); + + _mesa_PopAttrib(); + + /* restore current array object */ + ctx->NewState |= _NEW_ARRAY; + ctx->Array.NewState |= _NEW_ARRAY_ALL; + _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, arraySave); + _mesa_reference_array_object(ctx, &arraySave, NULL); +} + +void meta_init_metaops(GLcontext *ctx, struct dri_metaops *meta) +{ + meta->ctx = ctx; +} + +void meta_destroy_metaops(struct dri_metaops *meta) +{ + if (meta->clear.arrayObj) + _mesa_delete_array_object(meta->ctx, meta->clear.arrayObj); + +} diff --git a/src/mesa/drivers/dri/common/dri_metaops.h b/src/mesa/drivers/dri/common/dri_metaops.h new file mode 100644 index 0000000000..bb4079d535 --- /dev/null +++ b/src/mesa/drivers/dri/common/dri_metaops.h @@ -0,0 +1,99 @@ +/************************************************************************** + * + * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. + * Copyright 2009 Intel Corporation. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ +#ifndef DRI_METAOPS_H +#define DRI_METAOPS_H + +#define TRI_CLEAR_COLOR_BITS (BUFFER_BIT_BACK_LEFT | \ + BUFFER_BIT_FRONT_LEFT | \ + BUFFER_BIT_COLOR0 | \ + BUFFER_BIT_COLOR1 | \ + BUFFER_BIT_COLOR2 | \ + BUFFER_BIT_COLOR3 | \ + BUFFER_BIT_COLOR4 | \ + BUFFER_BIT_COLOR5 | \ + BUFFER_BIT_COLOR6 | \ + BUFFER_BIT_COLOR7) + +struct dri_meta_clear { + struct gl_array_object *arrayObj; + GLfloat vertices[4][3]; + GLfloat color[4][4]; +}; + +struct dri_metaops { + GLcontext *ctx; + GLboolean internal_viewport_call; + struct gl_fragment_program *bitmap_fp; + struct gl_vertex_program *passthrough_vp; + struct gl_buffer_object *texcoord_vbo; + + struct gl_fragment_program *saved_fp; + GLboolean saved_fp_enable; + struct gl_vertex_program *saved_vp; + GLboolean saved_vp_enable; + + struct gl_fragment_program *tex2d_fp; + + GLboolean saved_texcoord_enable; + struct gl_buffer_object *saved_array_vbo, *saved_texcoord_vbo; + GLenum saved_texcoord_type; + GLsizei saved_texcoord_size, saved_texcoord_stride; + const void *saved_texcoord_ptr; + int saved_active_texture; + + GLint saved_vp_x, saved_vp_y; + GLsizei saved_vp_width, saved_vp_height; + GLenum saved_matrix_mode; + + struct dri_meta_clear clear; +}; + + +void meta_set_passthrough_transform(struct dri_metaops *meta); + +void meta_restore_transform(struct dri_metaops *meta); + +void meta_set_passthrough_vertex_program(struct dri_metaops *meta); + +void meta_restore_vertex_program(struct dri_metaops *meta); + +void meta_set_fragment_program(struct dri_metaops *meta, + struct gl_fragment_program **prog, + const char *prog_string); + +void meta_restore_fragment_program(struct dri_metaops *meta); + +void meta_set_default_texrect(struct dri_metaops *meta); + +void meta_restore_texcoords(struct dri_metaops *meta); +void meta_clear_tris(struct dri_metaops *meta, GLbitfield mask); + +void meta_init_metaops(GLcontext *ctx, struct dri_metaops *meta); +void meta_destroy_metaops(struct dri_metaops *meta); +#endif + diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c index 13b433dd17..cfddabd318 100644 --- a/src/mesa/drivers/dri/intel/intel_clear.c +++ b/src/mesa/drivers/dri/intel/intel_clear.c @@ -57,250 +57,6 @@ #define FILE_DEBUG_FLAG DEBUG_BLIT -#define TRI_CLEAR_COLOR_BITS (BUFFER_BIT_BACK_LEFT | \ - BUFFER_BIT_FRONT_LEFT | \ - BUFFER_BIT_COLOR0 | \ - BUFFER_BIT_COLOR1 | \ - BUFFER_BIT_COLOR2 | \ - BUFFER_BIT_COLOR3 | \ - BUFFER_BIT_COLOR4 | \ - BUFFER_BIT_COLOR5 | \ - BUFFER_BIT_COLOR6 | \ - BUFFER_BIT_COLOR7) - - -/** - * Per-context one-time init of things for intl_clear_tris(). - * Basically set up a private array object for vertex/color arrays. - */ -static void -init_clear(GLcontext *ctx) -{ - struct intel_context *intel = intel_context(ctx); - struct gl_array_object *arraySave = NULL; - const GLuint arrayBuffer = ctx->Array.ArrayBufferObj->Name; - const GLuint elementBuffer = ctx->Array.ElementArrayBufferObj->Name; - - /* create new array object */ - intel->clear.arrayObj = _mesa_new_array_object(ctx, ~0); - - /* save current array object, bind new one */ - _mesa_reference_array_object(ctx, &arraySave, ctx->Array.ArrayObj); - ctx->NewState |= _NEW_ARRAY; - ctx->Array.NewState |= _NEW_ARRAY_ALL; - _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, intel->clear.arrayObj); - - /* one-time setup of vertex arrays (pos, color) */ - _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, 0); - _mesa_BindBufferARB(GL_ELEMENT_ARRAY_BUFFER_ARB, 0); - _mesa_ColorPointer(4, GL_FLOAT, 4 * sizeof(GLfloat), intel->clear.color); - _mesa_VertexPointer(3, GL_FLOAT, 3 * sizeof(GLfloat), intel->clear.vertices); - _mesa_Enable(GL_COLOR_ARRAY); - _mesa_Enable(GL_VERTEX_ARRAY); - - /* restore original array object */ - ctx->NewState |= _NEW_ARRAY; - ctx->Array.NewState |= _NEW_ARRAY_ALL; - _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, arraySave); - _mesa_reference_array_object(ctx, &arraySave, NULL); - - /* restore original buffer objects */ - _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, arrayBuffer); - _mesa_BindBufferARB(GL_ELEMENT_ARRAY_BUFFER_ARB, elementBuffer); -} - - - -/** - * Perform glClear where mask contains only color, depth, and/or stencil. - * - * The implementation is based on calling into Mesa to set GL state and - * performing normal triangle rendering. The intent of this path is to - * have as generic a path as possible, so that any driver could make use of - * it. - */ -void -intel_clear_tris(GLcontext *ctx, GLbitfield mask) -{ - struct intel_context *intel = intel_context(ctx); - GLfloat dst_z; - struct gl_framebuffer *fb = ctx->DrawBuffer; - int i; - GLboolean saved_fp_enable = GL_FALSE, saved_vp_enable = GL_FALSE; - GLuint saved_shader_program = 0; - unsigned int saved_active_texture; - struct gl_array_object *arraySave = NULL; - - if (!intel->clear.arrayObj) - init_clear(ctx); - - assert((mask & ~(TRI_CLEAR_COLOR_BITS | BUFFER_BIT_DEPTH | - BUFFER_BIT_STENCIL)) == 0); - - _mesa_PushAttrib(GL_COLOR_BUFFER_BIT | - GL_DEPTH_BUFFER_BIT | - GL_ENABLE_BIT | - GL_POLYGON_BIT | - GL_STENCIL_BUFFER_BIT | - GL_TRANSFORM_BIT | - GL_CURRENT_BIT | - GL_VIEWPORT_BIT); - saved_active_texture = ctx->Texture.CurrentUnit; - - /* Disable existing GL state we don't want to apply to a clear. */ - _mesa_Disable(GL_ALPHA_TEST); - _mesa_Disable(GL_BLEND); - _mesa_Disable(GL_CULL_FACE); - _mesa_Disable(GL_FOG); - _mesa_Disable(GL_POLYGON_SMOOTH); - _mesa_Disable(GL_POLYGON_STIPPLE); - _mesa_Disable(GL_POLYGON_OFFSET_FILL); - _mesa_Disable(GL_LIGHTING); - _mesa_Disable(GL_CLIP_PLANE0); - _mesa_Disable(GL_CLIP_PLANE1); - _mesa_Disable(GL_CLIP_PLANE2); - _mesa_Disable(GL_CLIP_PLANE3); - _mesa_Disable(GL_CLIP_PLANE4); - _mesa_Disable(GL_CLIP_PLANE5); - _mesa_PolygonMode(GL_FRONT_AND_BACK, GL_FILL); - if (ctx->Extensions.ARB_fragment_program && ctx->FragmentProgram.Enabled) { - saved_fp_enable = GL_TRUE; - _mesa_Disable(GL_FRAGMENT_PROGRAM_ARB); - } - if (ctx->Extensions.ARB_vertex_program && ctx->VertexProgram.Enabled) { - saved_vp_enable = GL_TRUE; - _mesa_Disable(GL_VERTEX_PROGRAM_ARB); - } - if (ctx->Extensions.ARB_shader_objects && ctx->Shader.CurrentProgram) { - saved_shader_program = ctx->Shader.CurrentProgram->Name; - _mesa_UseProgramObjectARB(0); - } - - if (ctx->Texture._EnabledUnits != 0) { - int i; - - for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { - _mesa_ActiveTextureARB(GL_TEXTURE0 + i); - _mesa_Disable(GL_TEXTURE_1D); - _mesa_Disable(GL_TEXTURE_2D); - _mesa_Disable(GL_TEXTURE_3D); - if (ctx->Extensions.ARB_texture_cube_map) - _mesa_Disable(GL_TEXTURE_CUBE_MAP_ARB); - if (ctx->Extensions.NV_texture_rectangle) - _mesa_Disable(GL_TEXTURE_RECTANGLE_NV); - if (ctx->Extensions.MESA_texture_array) { - _mesa_Disable(GL_TEXTURE_1D_ARRAY_EXT); - _mesa_Disable(GL_TEXTURE_2D_ARRAY_EXT); - } - } - } - - /* save current array object, bind our private one */ - _mesa_reference_array_object(ctx, &arraySave, ctx->Array.ArrayObj); - ctx->NewState |= _NEW_ARRAY; - ctx->Array.NewState |= _NEW_ARRAY_ALL; - _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, intel->clear.arrayObj); - - intel_meta_set_passthrough_transform(intel); - - for (i = 0; i < 4; i++) { - COPY_4FV(intel->clear.color[i], ctx->Color.ClearColor); - } - - /* convert clear Z from [0,1] to NDC coord in [-1,1] */ - dst_z = -1.0 + 2.0 * ctx->Depth.Clear; - - /* The ClearDepth value is unaffected by DepthRange, so do a default - * mapping. - */ - _mesa_DepthRange(0.0, 1.0); - - /* Prepare the vertices, which are the same regardless of which buffer we're - * drawing to. - */ - intel->clear.vertices[0][0] = fb->_Xmin; - intel->clear.vertices[0][1] = fb->_Ymin; - intel->clear.vertices[0][2] = dst_z; - intel->clear.vertices[1][0] = fb->_Xmax; - intel->clear.vertices[1][1] = fb->_Ymin; - intel->clear.vertices[1][2] = dst_z; - intel->clear.vertices[2][0] = fb->_Xmax; - intel->clear.vertices[2][1] = fb->_Ymax; - intel->clear.vertices[2][2] = dst_z; - intel->clear.vertices[3][0] = fb->_Xmin; - intel->clear.vertices[3][1] = fb->_Ymax; - intel->clear.vertices[3][2] = dst_z; - - while (mask != 0) { - GLuint this_mask = 0; - GLuint color_bit; - - color_bit = _mesa_ffs(mask & TRI_CLEAR_COLOR_BITS); - if (color_bit != 0) - this_mask |= (1 << (color_bit - 1)); - - /* Clear depth/stencil in the same pass as color. */ - this_mask |= (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)); - - /* Select the current color buffer and use the color write mask if - * we have one, otherwise don't write any color channels. - */ - if (this_mask & BUFFER_BIT_FRONT_LEFT) - _mesa_DrawBuffer(GL_FRONT_LEFT); - else if (this_mask & BUFFER_BIT_BACK_LEFT) - _mesa_DrawBuffer(GL_BACK_LEFT); - else if (color_bit != 0) - _mesa_DrawBuffer(GL_COLOR_ATTACHMENT0 + - (color_bit - BUFFER_COLOR0 - 1)); - else - _mesa_ColorMask(GL_FALSE, GL_FALSE, GL_FALSE, GL_FALSE); - - /* Control writing of the depth clear value to depth. */ - if (this_mask & BUFFER_BIT_DEPTH) { - _mesa_DepthFunc(GL_ALWAYS); - _mesa_Enable(GL_DEPTH_TEST); - } else { - _mesa_Disable(GL_DEPTH_TEST); - _mesa_DepthMask(GL_FALSE); - } - - /* Control writing of the stencil clear value to stencil. */ - if (this_mask & BUFFER_BIT_STENCIL) { - _mesa_Enable(GL_STENCIL_TEST); - _mesa_StencilOpSeparate(GL_FRONT_AND_BACK, - GL_REPLACE, GL_REPLACE, GL_REPLACE); - _mesa_StencilFuncSeparate(GL_FRONT_AND_BACK, GL_ALWAYS, - ctx->Stencil.Clear, - ctx->Stencil.WriteMask[0]); - } else { - _mesa_Disable(GL_STENCIL_TEST); - } - - _mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4); - - mask &= ~this_mask; - } - - intel_meta_restore_transform(intel); - - _mesa_ActiveTextureARB(GL_TEXTURE0 + saved_active_texture); - if (saved_fp_enable) - _mesa_Enable(GL_FRAGMENT_PROGRAM_ARB); - if (saved_vp_enable) - _mesa_Enable(GL_VERTEX_PROGRAM_ARB); - - if (saved_shader_program) - _mesa_UseProgramObjectARB(saved_shader_program); - - _mesa_PopAttrib(); - - /* restore current array object */ - ctx->NewState |= _NEW_ARRAY; - ctx->Array.NewState |= _NEW_ARRAY_ALL; - _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, arraySave); - _mesa_reference_array_object(ctx, &arraySave, NULL); -} - static const char *buffer_names[] = { [BUFFER_FRONT_LEFT] = "front", [BUFFER_BACK_LEFT] = "back", @@ -326,6 +82,7 @@ static const char *buffer_names[] = { static void intelClear(GLcontext *ctx, GLbitfield mask) { + struct intel_context *intel = intel_context(ctx); const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask); GLbitfield tri_mask = 0; GLbitfield blit_mask = 0; @@ -425,7 +182,7 @@ intelClear(GLcontext *ctx, GLbitfield mask) } DBG("\n"); } - intel_clear_tris(ctx, tri_mask); + meta_clear_tris(&intel->meta, tri_mask); } if (swrast_mask) { diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index edf422c1bd..4abb525f78 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -404,7 +404,7 @@ intel_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h) if (!driContext->driScreenPriv->dri2.enabled) return; - if (!intel->internal_viewport_call && ctx->DrawBuffer->Name == 0) { + if (!intel->meta.internal_viewport_call && ctx->DrawBuffer->Name == 0) { /* If we're rendering to the fake front buffer, make sure all the pending * drawing has landed on the real front buffer. Otherwise when we * eventually get to DRI2GetBuffersWithFormat the stale real front @@ -672,6 +672,7 @@ intelInitContext(struct intel_context *intel, */ _mesa_init_point(ctx); + meta_init_metaops(ctx, &intel->meta); ctx->Const.MaxColorAttachments = 4; /* XXX FBO: review this */ if (IS_965(intelScreen->deviceID)) { if (MAX_WIDTH > 8192) @@ -794,8 +795,7 @@ intelDestroyContext(__DRIcontextPrivate * driContextPriv) INTEL_FIREVERTICES(intel); - if (intel->clear.arrayObj) - _mesa_delete_array_object(&intel->ctx, intel->clear.arrayObj); + meta_destroy_metaops(&intel->meta); intel->vtbl.destroy(intel); diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index 6761193f8c..08bea88c95 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -33,6 +33,7 @@ #include "main/mtypes.h" #include "main/mm.h" #include "texmem.h" +#include "dri_metaops.h" #include "drm.h" #include "intel_bufmgr.h" @@ -157,29 +158,7 @@ struct intel_context void (*debug_batch)(struct intel_context *intel); } vtbl; - struct { - struct gl_fragment_program *bitmap_fp; - struct gl_vertex_program *passthrough_vp; - struct gl_buffer_object *texcoord_vbo; - - struct gl_fragment_program *saved_fp; - GLboolean saved_fp_enable; - struct gl_vertex_program *saved_vp; - GLboolean saved_vp_enable; - - struct gl_fragment_program *tex2d_fp; - - GLboolean saved_texcoord_enable; - struct gl_buffer_object *saved_array_vbo, *saved_texcoord_vbo; - GLenum saved_texcoord_type; - GLsizei saved_texcoord_size, saved_texcoord_stride; - const void *saved_texcoord_ptr; - int saved_active_texture; - - GLint saved_vp_x, saved_vp_y; - GLsizei saved_vp_width, saved_vp_height; - GLenum saved_matrix_mode; - } meta; + struct dri_metaops meta; GLint refcount; GLuint Fallback; @@ -191,7 +170,6 @@ struct intel_context struct intel_region *front_region; struct intel_region *back_region; struct intel_region *depth_region; - GLboolean internal_viewport_call; /** * This value indicates that the kernel memory manager is being used @@ -224,13 +202,6 @@ struct intel_context GLuint ClearColor565; GLuint ClearColor8888; - /* info for intel_clear_tris() */ - struct - { - struct gl_array_object *arrayObj; - GLfloat vertices[4][3]; - GLfloat color[4][4]; - } clear; /* Offsets of fields within the current vertex: */ diff --git a/src/mesa/drivers/dri/intel/intel_generatemipmap.c b/src/mesa/drivers/dri/intel/intel_generatemipmap.c index b00f8019dd..fe986092db 100644 --- a/src/mesa/drivers/dri/intel/intel_generatemipmap.c +++ b/src/mesa/drivers/dri/intel/intel_generatemipmap.c @@ -88,7 +88,7 @@ intel_generate_mipmap_level(GLcontext *ctx, GLuint tex_name, if (status != GL_FRAMEBUFFER_COMPLETE_EXT) return GL_FALSE; - intel_meta_set_passthrough_transform(intel); + meta_set_passthrough_transform(&intel->meta); /* XXX: Doing it right would involve setting up the transformation to do * 0-1 mapping or something, and not changing the vertex data. @@ -104,12 +104,12 @@ intel_generate_mipmap_level(GLcontext *ctx, GLuint tex_name, _mesa_VertexPointer(2, GL_FLOAT, 2 * sizeof(GLfloat), &vertices); _mesa_Enable(GL_VERTEX_ARRAY); - intel_meta_set_default_texrect(intel); + meta_set_default_texrect(&intel->meta); _mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4); - intel_meta_restore_texcoords(intel); - intel_meta_restore_transform(intel); + meta_restore_texcoords(&intel->meta); + meta_restore_transform(&intel->meta); return GL_TRUE; } @@ -153,9 +153,9 @@ intel_generate_mipmap_2d(GLcontext *ctx, _mesa_GenFramebuffersEXT(1, &fb_name); _mesa_BindFramebufferEXT(GL_FRAMEBUFFER_EXT, fb_name); - intel_meta_set_fragment_program(intel, &intel->meta.tex2d_fp, - intel_fp_tex2d); - intel_meta_set_passthrough_vertex_program(intel); + meta_set_fragment_program(&intel->meta, &intel->meta.tex2d_fp, + intel_fp_tex2d); + meta_set_passthrough_vertex_program(&intel->meta); max_levels = _mesa_max_texture_levels(ctx, texObj->Target); start_level = texObj->BaseLevel; @@ -202,8 +202,8 @@ intel_generate_mipmap_2d(GLcontext *ctx, success = GL_TRUE; fail: - intel_meta_restore_fragment_program(intel); - intel_meta_restore_vertex_program(intel); + meta_restore_fragment_program(&intel->meta); + meta_restore_vertex_program(&intel->meta); _mesa_DeleteFramebuffersEXT(1, &fb_name); _mesa_ActiveTextureARB(GL_TEXTURE0_ARB + old_active_texture); diff --git a/src/mesa/drivers/dri/intel/intel_pixel.c b/src/mesa/drivers/dri/intel/intel_pixel.c index da9ccb23f1..a300141655 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel.c +++ b/src/mesa/drivers/dri/intel/intel_pixel.c @@ -176,246 +176,6 @@ intel_check_blit_format(struct intel_region * region, return GL_FALSE; } -void -intel_meta_set_passthrough_transform(struct intel_context *intel) -{ - GLcontext *ctx = &intel->ctx; - - intel->meta.saved_vp_x = ctx->Viewport.X; - intel->meta.saved_vp_y = ctx->Viewport.Y; - intel->meta.saved_vp_width = ctx->Viewport.Width; - intel->meta.saved_vp_height = ctx->Viewport.Height; - intel->meta.saved_matrix_mode = ctx->Transform.MatrixMode; - - intel->internal_viewport_call = GL_TRUE; - _mesa_Viewport(0, 0, ctx->DrawBuffer->Width, ctx->DrawBuffer->Height); - intel->internal_viewport_call = GL_FALSE; - - _mesa_MatrixMode(GL_PROJECTION); - _mesa_PushMatrix(); - _mesa_LoadIdentity(); - _mesa_Ortho(0, ctx->DrawBuffer->Width, 0, ctx->DrawBuffer->Height, 1, -1); - - _mesa_MatrixMode(GL_MODELVIEW); - _mesa_PushMatrix(); - _mesa_LoadIdentity(); -} - -void -intel_meta_restore_transform(struct intel_context *intel) -{ - _mesa_MatrixMode(GL_PROJECTION); - _mesa_PopMatrix(); - _mesa_MatrixMode(GL_MODELVIEW); - _mesa_PopMatrix(); - - _mesa_MatrixMode(intel->meta.saved_matrix_mode); - - intel->internal_viewport_call = GL_TRUE; - _mesa_Viewport(intel->meta.saved_vp_x, intel->meta.saved_vp_y, - intel->meta.saved_vp_width, intel->meta.saved_vp_height); - intel->internal_viewport_call = GL_FALSE; -} - -/** - * Set up a vertex program to pass through the position and first texcoord - * for pixel path. - */ -void -intel_meta_set_passthrough_vertex_program(struct intel_context *intel) -{ - GLcontext *ctx = &intel->ctx; - static const char *vp = - "!!ARBvp1.0\n" - "TEMP vertexClip;\n" - "DP4 vertexClip.x, state.matrix.mvp.row[0], vertex.position;\n" - "DP4 vertexClip.y, state.matrix.mvp.row[1], vertex.position;\n" - "DP4 vertexClip.z, state.matrix.mvp.row[2], vertex.position;\n" - "DP4 vertexClip.w, state.matrix.mvp.row[3], vertex.position;\n" - "MOV result.position, vertexClip;\n" - "MOV result.texcoord[0], vertex.texcoord[0];\n" - "MOV result.color, vertex.color;\n" - "END\n"; - - assert(intel->meta.saved_vp == NULL); - - _mesa_reference_vertprog(ctx, &intel->meta.saved_vp, - ctx->VertexProgram.Current); - if (intel->meta.passthrough_vp == NULL) { - GLuint prog_name; - _mesa_GenPrograms(1, &prog_name); - _mesa_BindProgram(GL_VERTEX_PROGRAM_ARB, prog_name); - _mesa_ProgramStringARB(GL_VERTEX_PROGRAM_ARB, - GL_PROGRAM_FORMAT_ASCII_ARB, - strlen(vp), (const GLubyte *)vp); - _mesa_reference_vertprog(ctx, &intel->meta.passthrough_vp, - ctx->VertexProgram.Current); - _mesa_DeletePrograms(1, &prog_name); - } - - FLUSH_VERTICES(ctx, _NEW_PROGRAM); - _mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current, - intel->meta.passthrough_vp); - ctx->Driver.BindProgram(ctx, GL_VERTEX_PROGRAM_ARB, - &intel->meta.passthrough_vp->Base); - - intel->meta.saved_vp_enable = ctx->VertexProgram.Enabled; - _mesa_Enable(GL_VERTEX_PROGRAM_ARB); -} - -/** - * Restores the previous vertex program after - * intel_meta_set_passthrough_vertex_program() - */ -void -intel_meta_restore_vertex_program(struct intel_context *intel) -{ - GLcontext *ctx = &intel->ctx; - - FLUSH_VERTICES(ctx, _NEW_PROGRAM); - _mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current, - intel->meta.saved_vp); - _mesa_reference_vertprog(ctx, &intel->meta.saved_vp, NULL); - ctx->Driver.BindProgram(ctx, GL_VERTEX_PROGRAM_ARB, - &ctx->VertexProgram.Current->Base); - - if (!intel->meta.saved_vp_enable) - _mesa_Disable(GL_VERTEX_PROGRAM_ARB); -} - -/** - * Binds the given program string to GL_FRAGMENT_PROGRAM_ARB, caching the - * program object. - */ -void -intel_meta_set_fragment_program(struct intel_context *intel, - struct gl_fragment_program **prog, - const char *prog_string) -{ - GLcontext *ctx = &intel->ctx; - assert(intel->meta.saved_fp == NULL); - - _mesa_reference_fragprog(ctx, &intel->meta.saved_fp, - ctx->FragmentProgram.Current); - if (*prog == NULL) { - GLuint prog_name; - _mesa_GenPrograms(1, &prog_name); - _mesa_BindProgram(GL_FRAGMENT_PROGRAM_ARB, prog_name); - _mesa_ProgramStringARB(GL_FRAGMENT_PROGRAM_ARB, - GL_PROGRAM_FORMAT_ASCII_ARB, - strlen(prog_string), (const GLubyte *)prog_string); - _mesa_reference_fragprog(ctx, prog, ctx->FragmentProgram.Current); - /* Note that DeletePrograms unbinds the program on us */ - _mesa_DeletePrograms(1, &prog_name); - } - - FLUSH_VERTICES(ctx, _NEW_PROGRAM); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, *prog); - ctx->Driver.BindProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, &((*prog)->Base)); - - intel->meta.saved_fp_enable = ctx->FragmentProgram.Enabled; - _mesa_Enable(GL_FRAGMENT_PROGRAM_ARB); -} - -/** - * Restores the previous fragment program after - * intel_meta_set_fragment_program() - */ -void -intel_meta_restore_fragment_program(struct intel_context *intel) -{ - GLcontext *ctx = &intel->ctx; - - FLUSH_VERTICES(ctx, _NEW_PROGRAM); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, - intel->meta.saved_fp); - _mesa_reference_fragprog(ctx, &intel->meta.saved_fp, NULL); - ctx->Driver.BindProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, - &ctx->FragmentProgram.Current->Base); - - if (!intel->meta.saved_fp_enable) - _mesa_Disable(GL_FRAGMENT_PROGRAM_ARB); -} - -static const float default_texcoords[4][2] = { { 0.0, 0.0 }, - { 1.0, 0.0 }, - { 1.0, 1.0 }, - { 0.0, 1.0 } }; - -void -intel_meta_set_default_texrect(struct intel_context *intel) -{ - GLcontext *ctx = &intel->ctx; - struct gl_client_array *old_texcoord_array; - - intel->meta.saved_active_texture = ctx->Texture.CurrentUnit; - if (intel->meta.saved_array_vbo == NULL) { - _mesa_reference_buffer_object(ctx, &intel->meta.saved_array_vbo, - ctx->Array.ArrayBufferObj); - } - - old_texcoord_array = &ctx->Array.ArrayObj->TexCoord[0]; - intel->meta.saved_texcoord_type = old_texcoord_array->Type; - intel->meta.saved_texcoord_size = old_texcoord_array->Size; - intel->meta.saved_texcoord_stride = old_texcoord_array->Stride; - intel->meta.saved_texcoord_enable = old_texcoord_array->Enabled; - intel->meta.saved_texcoord_ptr = old_texcoord_array->Ptr; - _mesa_reference_buffer_object(ctx, &intel->meta.saved_texcoord_vbo, - old_texcoord_array->BufferObj); - - _mesa_ClientActiveTextureARB(GL_TEXTURE0); - - if (intel->meta.texcoord_vbo == NULL) { - GLuint vbo_name; - - _mesa_GenBuffersARB(1, &vbo_name); - _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, vbo_name); - _mesa_BufferDataARB(GL_ARRAY_BUFFER_ARB, sizeof(default_texcoords), - default_texcoords, GL_STATIC_DRAW_ARB); - _mesa_reference_buffer_object(ctx, &intel->meta.texcoord_vbo, - ctx->Array.ArrayBufferObj); - } else { - _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, - intel->meta.texcoord_vbo->Name); - } - _mesa_TexCoordPointer(2, GL_FLOAT, 2 * sizeof(GLfloat), NULL); - - _mesa_Enable(GL_TEXTURE_COORD_ARRAY); -} - -void -intel_meta_restore_texcoords(struct intel_context *intel) -{ - GLcontext *ctx = &intel->ctx; - - /* Restore the old TexCoordPointer */ - if (intel->meta.saved_texcoord_vbo) { - _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, - intel->meta.saved_texcoord_vbo->Name); - _mesa_reference_buffer_object(ctx, &intel->meta.saved_texcoord_vbo, NULL); - } else { - _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, 0); - } - - _mesa_TexCoordPointer(intel->meta.saved_texcoord_size, - intel->meta.saved_texcoord_type, - intel->meta.saved_texcoord_stride, - intel->meta.saved_texcoord_ptr); - if (!intel->meta.saved_texcoord_enable) - _mesa_Disable(GL_TEXTURE_COORD_ARRAY); - - _mesa_ClientActiveTextureARB(GL_TEXTURE0 + - intel->meta.saved_active_texture); - - if (intel->meta.saved_array_vbo) { - _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, - intel->meta.saved_array_vbo->Name); - _mesa_reference_buffer_object(ctx, &intel->meta.saved_array_vbo, NULL); - } else { - _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, 0); - } -} - void intelInitPixelFuncs(struct dd_function_table *functions) { @@ -428,14 +188,3 @@ intelInitPixelFuncs(struct dd_function_table *functions) functions->ReadPixels = intelReadPixels; } -void -intel_free_pixel_state(struct intel_context *intel) -{ - GLcontext *ctx = &intel->ctx; - - _mesa_reference_vertprog(ctx, &intel->meta.passthrough_vp, NULL); - _mesa_reference_fragprog(ctx, &intel->meta.bitmap_fp, NULL); - _mesa_reference_fragprog(ctx, &intel->meta.tex2d_fp, NULL); - _mesa_reference_buffer_object(ctx, &intel->meta.texcoord_vbo, NULL); -} - diff --git a/src/mesa/drivers/dri/intel/intel_pixel.h b/src/mesa/drivers/dri/intel/intel_pixel.h index 6acf0813c8..96a6dd17b2 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel.h +++ b/src/mesa/drivers/dri/intel/intel_pixel.h @@ -31,19 +31,6 @@ #include "main/mtypes.h" void intelInitPixelFuncs(struct dd_function_table *functions); -void intel_meta_set_passthrough_transform(struct intel_context *intel); -void intel_meta_restore_transform(struct intel_context *intel); -void intel_meta_set_passthrough_vertex_program(struct intel_context *intel); -void intel_meta_restore_vertex_program(struct intel_context *intel); -void intel_meta_set_fragment_program(struct intel_context *intel, - struct gl_fragment_program **prog, - const char *prog_string); -void intel_meta_restore_fragment_program(struct intel_context *intel); -void intel_free_pixel_state(struct intel_context *intel); -void intel_meta_set_default_texrect(struct intel_context *intel); -void intel_meta_set_default_texrect(struct intel_context *intel); -void intel_meta_restore_texcoords(struct intel_context *intel); - GLboolean intel_check_blit_fragment_ops(GLcontext * ctx, GLboolean src_alpha_is_one); @@ -79,6 +66,4 @@ void intelBitmap(GLcontext * ctx, const struct gl_pixelstore_attrib *unpack, const GLubyte * pixels); -void intel_clear_tris(GLcontext *ctx, GLbitfield mask); - #endif diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c index ebba6aafad..540e7620a9 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c @@ -476,11 +476,11 @@ intel_texture_bitmap(GLcontext * ctx, GL_ALPHA, GL_UNSIGNED_BYTE, a8_bitmap); _mesa_free(a8_bitmap); - intel_meta_set_fragment_program(intel, &intel->meta.bitmap_fp, fp); + meta_set_fragment_program(&intel->meta, &intel->meta.bitmap_fp, fp); _mesa_ProgramLocalParameter4fvARB(GL_FRAGMENT_PROGRAM_ARB, 0, ctx->Current.RasterColor); - intel_meta_set_passthrough_vertex_program(intel); - intel_meta_set_passthrough_transform(intel); + meta_set_passthrough_vertex_program(&intel->meta); + meta_set_passthrough_transform(&intel->meta); /* convert rasterpos Z from [0,1] to NDC coord in [-1,1] */ dst_z = -1.0 + 2.0 * ctx->Current.RasterPos[2]; @@ -507,13 +507,13 @@ intel_texture_bitmap(GLcontext * ctx, _mesa_VertexPointer(4, GL_FLOAT, 4 * sizeof(GLfloat), &vertices); _mesa_Enable(GL_VERTEX_ARRAY); - intel_meta_set_default_texrect(intel); + meta_set_default_texrect(&intel->meta); _mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4); - intel_meta_restore_texcoords(intel); - intel_meta_restore_transform(intel); - intel_meta_restore_fragment_program(intel); - intel_meta_restore_vertex_program(intel); + meta_restore_texcoords(&intel->meta); + meta_restore_transform(&intel->meta); + meta_restore_fragment_program(&intel->meta); + meta_restore_vertex_program(&intel->meta); _mesa_PopClientAttrib(); _mesa_Disable(GL_TEXTURE_2D); /* asserted that it was disabled at entry */ diff --git a/src/mesa/drivers/dri/intel/intel_pixel_draw.c b/src/mesa/drivers/dri/intel/intel_pixel_draw.c index dfc9e1539f..a6b6824164 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_draw.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_draw.c @@ -150,7 +150,7 @@ intel_texture_drawpixels(GLcontext * ctx, _mesa_TexImage2D(GL_TEXTURE_2D, 0, internalFormat, width, height, 0, format, type, pixels); - intel_meta_set_passthrough_transform(intel); + meta_set_passthrough_transform(&intel->meta); /* convert rasterpos Z from [0,1] to NDC coord in [-1,1] */ z = -1.0 + 2.0 * ctx->Current.RasterPos[2]; @@ -182,12 +182,12 @@ intel_texture_drawpixels(GLcontext * ctx, _mesa_VertexPointer(4, GL_FLOAT, 4 * sizeof(GLfloat), &vertices); _mesa_Enable(GL_VERTEX_ARRAY); - intel_meta_set_default_texrect(intel); + meta_set_default_texrect(&intel->meta); _mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4); - intel_meta_restore_texcoords(intel); - intel_meta_restore_transform(intel); + meta_restore_texcoords(&intel->meta); + meta_restore_transform(&intel->meta); _mesa_ActiveTextureARB(GL_TEXTURE0_ARB + old_active_texture); _mesa_PopClientAttrib(); @@ -352,7 +352,7 @@ intel_stencil_drawpixels(GLcontext * ctx, ctx->Unpack = old_unpack; _mesa_free(stencil_pixels); - intel_meta_set_passthrough_transform(intel); + meta_set_passthrough_transform(&intel->meta); /* Since we're rendering to the framebuffer as if it was an FBO, * if it's the window system we have to flip the coordinates. @@ -375,12 +375,12 @@ intel_stencil_drawpixels(GLcontext * ctx, _mesa_VertexPointer(2, GL_FLOAT, 2 * sizeof(GLfloat), &vertices); _mesa_Enable(GL_VERTEX_ARRAY); - intel_meta_set_default_texrect(intel); + meta_set_default_texrect(&intel->meta); _mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4); - intel_meta_restore_texcoords(intel); - intel_meta_restore_transform(intel); + meta_restore_texcoords(&intel->meta); + meta_restore_transform(&intel->meta); _mesa_ActiveTextureARB(GL_TEXTURE0_ARB + old_active_texture); _mesa_BindFramebufferEXT(GL_FRAMEBUFFER_EXT, old_fb_name); diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c index 6560efdca3..4dbda39eb9 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.c +++ b/src/mesa/drivers/dri/r200/r200_ioctl.c @@ -58,11 +58,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_TIMEOUT 512 #define R200_IDLE_RETRY 16 -static void r200UserClear(GLcontext *ctx, GLuint mask) -{ - radeon_clear_tris(ctx, mask); -} - static void r200KernelClear(GLcontext *ctx, GLuint flags) { r200ContextPtr rmesa = R200_CONTEXT(ctx); @@ -253,7 +248,7 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask ) } if (rmesa->radeon.radeonScreen->kernel_mm) - r200UserClear(ctx, orig_mask); + radeonUserClear(ctx, orig_mask); else { r200KernelClear(ctx, flags); rmesa->radeon.hw.all_dirty = GL_TRUE; diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.c b/src/mesa/drivers/dri/r300/r300_ioctl.c index 4e913dba29..ddabd53992 100644 --- a/src/mesa/drivers/dri/r300/r300_ioctl.c +++ b/src/mesa/drivers/dri/r300/r300_ioctl.c @@ -68,11 +68,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. static void r300EmitClearState(GLcontext * ctx); -static void r300UserClear(GLcontext *ctx, GLuint mask) -{ - radeon_clear_tris(ctx, mask); -} - static void r300ClearBuffer(r300ContextPtr r300, int flags, struct radeon_renderbuffer *rrb, struct radeon_renderbuffer *rrbd) @@ -680,7 +675,7 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask) ret = 0; if (tri_mask) { if (r300->radeon.radeonScreen->kernel_mm) - r300UserClear(ctx, tri_mask); + radeonUserClear(ctx, tri_mask); else { /* if kernel clear fails due to size restraints fallback */ ret = r300KernelClear(ctx, tri_mask); diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 0a8d8b03e8..3bf42e9bb0 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -877,7 +877,7 @@ void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei he if (!driContext->driScreenPriv->dri2.enabled) return; - if (!radeon->internal_viewport_call && ctx->DrawBuffer->Name == 0) { + if (!radeon->meta.internal_viewport_call && ctx->DrawBuffer->Name == 0) { if (radeon->is_front_buffer_rendering) { radeonFlush(ctx); } @@ -1258,254 +1258,8 @@ void rcommonBeginBatch(radeonContextPtr rmesa, int n, } - - -static void -radeon_meta_set_passthrough_transform(radeonContextPtr radeon) -{ - GLcontext *ctx = radeon->glCtx; - - radeon->meta.saved_vp_x = ctx->Viewport.X; - radeon->meta.saved_vp_y = ctx->Viewport.Y; - radeon->meta.saved_vp_width = ctx->Viewport.Width; - radeon->meta.saved_vp_height = ctx->Viewport.Height; - radeon->meta.saved_matrix_mode = ctx->Transform.MatrixMode; - - radeon->internal_viewport_call = GL_TRUE; - _mesa_Viewport(0, 0, ctx->DrawBuffer->Width, ctx->DrawBuffer->Height); - radeon->internal_viewport_call = GL_FALSE; - - _mesa_MatrixMode(GL_PROJECTION); - _mesa_PushMatrix(); - _mesa_LoadIdentity(); - _mesa_Ortho(0, ctx->DrawBuffer->Width, 0, ctx->DrawBuffer->Height, 1, -1); - - _mesa_MatrixMode(GL_MODELVIEW); - _mesa_PushMatrix(); - _mesa_LoadIdentity(); -} - -static void -radeon_meta_restore_transform(radeonContextPtr radeon) -{ - _mesa_MatrixMode(GL_PROJECTION); - _mesa_PopMatrix(); - _mesa_MatrixMode(GL_MODELVIEW); - _mesa_PopMatrix(); - - _mesa_MatrixMode(radeon->meta.saved_matrix_mode); - - radeon->internal_viewport_call = GL_TRUE; - _mesa_Viewport(radeon->meta.saved_vp_x, radeon->meta.saved_vp_y, - radeon->meta.saved_vp_width, radeon->meta.saved_vp_height); - radeon->internal_viewport_call = GL_FALSE; -} - - -/** - * Perform glClear where mask contains only color, depth, and/or stencil. - * - * The implementation is based on calling into Mesa to set GL state and - * performing normal triangle rendering. The intent of this path is to - * have as generic a path as possible, so that any driver could make use of - * it. - */ - -static void radeon_clear_init(GLcontext *ctx) -{ - radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - struct gl_array_object *arraySave = NULL; - const GLuint arrayBuffer = ctx->Array.ArrayBufferObj->Name; - const GLuint elementBuffer = ctx->Array.ElementArrayBufferObj->Name; - - /* create new array object */ - rmesa->clear.arrayObj = _mesa_new_array_object(ctx, ~0); - _mesa_reference_array_object(ctx, &arraySave, ctx->Array.ArrayObj); - _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, rmesa->clear.arrayObj); - - /* one time setup of vertex arrays (pos, color) */ - _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, 0); - _mesa_BindBufferARB(GL_ELEMENT_ARRAY_BUFFER_ARB, 0); - _mesa_ColorPointer(4, GL_FLOAT, 4 * sizeof(GLfloat), rmesa->clear.color); - _mesa_VertexPointer(3, GL_FLOAT, 3 * sizeof(GLfloat), rmesa->clear.vertices); - _mesa_Enable(GL_COLOR_ARRAY); - _mesa_Enable(GL_VERTEX_ARRAY); - - /* restore original array object */ - _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, arraySave); - _mesa_reference_array_object(ctx, &arraySave, NULL); - - /* restore original buffer objects */ - _mesa_BindBufferARB(GL_ARRAY_BUFFER_ARB, arrayBuffer); - _mesa_BindBufferARB(GL_ELEMENT_ARRAY_BUFFER_ARB, elementBuffer); -} - - -void radeon_clear_tris(GLcontext *ctx, GLbitfield mask) +void radeonUserClear(GLcontext *ctx, GLuint mask) { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat dst_z; - struct gl_framebuffer *fb = ctx->DrawBuffer; - int i; - GLboolean saved_fp_enable = GL_FALSE, saved_vp_enable = GL_FALSE; - GLboolean saved_shader_program = 0; - unsigned int saved_active_texture; - struct gl_array_object *arraySave = NULL; - - if (!rmesa->clear.arrayObj) - radeon_clear_init(ctx); - - assert((mask & ~(TRI_CLEAR_COLOR_BITS | BUFFER_BIT_DEPTH | - BUFFER_BIT_STENCIL)) == 0); - - _mesa_PushAttrib(GL_COLOR_BUFFER_BIT | - GL_DEPTH_BUFFER_BIT | - GL_ENABLE_BIT | - GL_POLYGON_BIT | - GL_STENCIL_BUFFER_BIT | - GL_TRANSFORM_BIT | - GL_CURRENT_BIT); - saved_active_texture = ctx->Texture.CurrentUnit; - - /* Disable existing GL state we don't want to apply to a clear. */ - _mesa_Disable(GL_ALPHA_TEST); - _mesa_Disable(GL_BLEND); - _mesa_Disable(GL_CULL_FACE); - _mesa_Disable(GL_FOG); - _mesa_Disable(GL_POLYGON_SMOOTH); - _mesa_Disable(GL_POLYGON_STIPPLE); - _mesa_Disable(GL_POLYGON_OFFSET_FILL); - _mesa_Disable(GL_LIGHTING); - _mesa_Disable(GL_CLIP_PLANE0); - _mesa_Disable(GL_CLIP_PLANE1); - _mesa_Disable(GL_CLIP_PLANE2); - _mesa_Disable(GL_CLIP_PLANE3); - _mesa_Disable(GL_CLIP_PLANE4); - _mesa_Disable(GL_CLIP_PLANE5); - _mesa_PolygonMode(GL_FRONT_AND_BACK, GL_FILL); - if (ctx->Extensions.ARB_fragment_program && ctx->FragmentProgram.Enabled) { - saved_fp_enable = GL_TRUE; - _mesa_Disable(GL_FRAGMENT_PROGRAM_ARB); - } - if (ctx->Extensions.ARB_vertex_program && ctx->VertexProgram.Enabled) { - saved_vp_enable = GL_TRUE; - _mesa_Disable(GL_VERTEX_PROGRAM_ARB); - } - if (ctx->Extensions.ARB_shader_objects && ctx->Shader.CurrentProgram) { - saved_shader_program = ctx->Shader.CurrentProgram->Name; - _mesa_UseProgramObjectARB(0); - } - - if (ctx->Texture._EnabledUnits != 0) { - int i; - - for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { - _mesa_ActiveTextureARB(GL_TEXTURE0 + i); - _mesa_Disable(GL_TEXTURE_1D); - _mesa_Disable(GL_TEXTURE_2D); - _mesa_Disable(GL_TEXTURE_3D); - if (ctx->Extensions.ARB_texture_cube_map) - _mesa_Disable(GL_TEXTURE_CUBE_MAP_ARB); - if (ctx->Extensions.NV_texture_rectangle) - _mesa_Disable(GL_TEXTURE_RECTANGLE_NV); - if (ctx->Extensions.MESA_texture_array) { - _mesa_Disable(GL_TEXTURE_1D_ARRAY_EXT); - _mesa_Disable(GL_TEXTURE_2D_ARRAY_EXT); - } - } - } - - /* save current array object, bind our private one */ - _mesa_reference_array_object(ctx, &arraySave, ctx->Array.ArrayObj); - _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, rmesa->clear.arrayObj); - - radeon_meta_set_passthrough_transform(rmesa); - - for (i = 0; i < 4; i++) { - COPY_4FV(rmesa->clear.color[i], ctx->Color.ClearColor); - } - - /* convert clear Z from [0,1] to NDC coord in [-1,1] */ - - dst_z = -1.0 + 2.0 * ctx->Depth.Clear; - /* Prepare the vertices, which are the same regardless of which buffer we're - * drawing to. - */ - rmesa->clear.vertices[0][0] = fb->_Xmin; - rmesa->clear.vertices[0][1] = fb->_Ymin; - rmesa->clear.vertices[0][2] = dst_z; - rmesa->clear.vertices[1][0] = fb->_Xmax; - rmesa->clear.vertices[1][1] = fb->_Ymin; - rmesa->clear.vertices[1][2] = dst_z; - rmesa->clear.vertices[2][0] = fb->_Xmax; - rmesa->clear.vertices[2][1] = fb->_Ymax; - rmesa->clear.vertices[2][2] = dst_z; - rmesa->clear.vertices[3][0] = fb->_Xmin; - rmesa->clear.vertices[3][1] = fb->_Ymax; - rmesa->clear.vertices[3][2] = dst_z; - - while (mask != 0) { - GLuint this_mask = 0; - GLuint color_bit; - - color_bit = _mesa_ffs(mask & TRI_CLEAR_COLOR_BITS); - if (color_bit != 0) - this_mask |= (1 << (color_bit - 1)); - - /* Clear depth/stencil in the same pass as color. */ - this_mask |= (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)); - - /* Select the current color buffer and use the color write mask if - * we have one, otherwise don't write any color channels. - */ - if (this_mask & BUFFER_BIT_FRONT_LEFT) - _mesa_DrawBuffer(GL_FRONT_LEFT); - else if (this_mask & BUFFER_BIT_BACK_LEFT) - _mesa_DrawBuffer(GL_BACK_LEFT); - else if (color_bit != 0) - _mesa_DrawBuffer(GL_COLOR_ATTACHMENT0 + - (color_bit - BUFFER_COLOR0 - 1)); - else - _mesa_ColorMask(GL_FALSE, GL_FALSE, GL_FALSE, GL_FALSE); - - /* Control writing of the depth clear value to depth. */ - if (this_mask & BUFFER_BIT_DEPTH) { - _mesa_DepthFunc(GL_ALWAYS); - _mesa_DepthMask(GL_TRUE); - _mesa_Enable(GL_DEPTH_TEST); - } else { - _mesa_Disable(GL_DEPTH_TEST); - _mesa_DepthMask(GL_FALSE); - } - - /* Control writing of the stencil clear value to stencil. */ - if (this_mask & BUFFER_BIT_STENCIL) { - _mesa_Enable(GL_STENCIL_TEST); - _mesa_StencilOp(GL_REPLACE, GL_REPLACE, GL_REPLACE); - _mesa_StencilFuncSeparate(GL_FRONT_AND_BACK, GL_ALWAYS, (GLint)ctx->Stencil.Clear, - ctx->Stencil.WriteMask[0]); - } else { - _mesa_Disable(GL_STENCIL_TEST); - } - - _mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4); - - mask &= ~this_mask; - } - - radeon_meta_restore_transform(rmesa); - - _mesa_ActiveTextureARB(GL_TEXTURE0 + saved_active_texture); - if (saved_fp_enable) - _mesa_Enable(GL_FRAGMENT_PROGRAM_ARB); - if (saved_vp_enable) - _mesa_Enable(GL_VERTEX_PROGRAM_ARB); - - if (saved_shader_program) - _mesa_UseProgramObjectARB(saved_shader_program); - - _mesa_PopAttrib(); - /* restore current array object */ - _mesa_reference_array_object(ctx, &ctx->Array.ArrayObj, arraySave); - _mesa_reference_array_object(ctx, &arraySave, NULL); + meta_clear_tris(&rmesa->meta, mask); } diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index ba6c7c5773..cebae18b2d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -5,18 +5,7 @@ #include "radeon_dma.h" #include "radeon_texture.h" - -#define TRI_CLEAR_COLOR_BITS (BUFFER_BIT_BACK_LEFT | \ - BUFFER_BIT_FRONT_LEFT | \ - BUFFER_BIT_COLOR0 | \ - BUFFER_BIT_COLOR1 | \ - BUFFER_BIT_COLOR2 | \ - BUFFER_BIT_COLOR3 | \ - BUFFER_BIT_COLOR4 | \ - BUFFER_BIT_COLOR5 | \ - BUFFER_BIT_COLOR6 | \ - BUFFER_BIT_COLOR7) - +void radeonUserClear(GLcontext *ctx, GLuint mask); void radeonRecalcScissorRects(radeonContextPtr radeon); void radeonSetCliprects(radeonContextPtr radeon); void radeonUpdateScissor( GLcontext *ctx ); diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 828d6477f0..9add50b4cc 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -184,6 +184,7 @@ GLboolean radeonInitContext(radeonContextPtr radeon, ctx = radeon->glCtx; driContextPriv->driverPrivate = radeon; + meta_init_metaops(ctx, &radeon->meta); /* DRI fields */ radeon->dri.context = driContextPriv; radeon->dri.screen = sPriv; @@ -264,7 +265,7 @@ void radeonDestroyContext(__DRIcontextPrivate *driContextPriv ) } radeonReleaseArrays(radeon->glCtx, ~0); - + meta_destroy_metaops(&radeon->meta); if (radeon->vtbl.free_context) radeon->vtbl.free_context(radeon->glCtx); _swsetup_DestroyContext( radeon->glCtx ); diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index 036d2658d9..07ac85fb52 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -13,6 +13,7 @@ #include "dri_util.h" #include "tnl/t_vertex.h" +#include "dri_metaops.h" struct radeon_context; #include "radeon_bocs_wrapper.h" @@ -476,27 +477,7 @@ struct radeon_context { */ GLboolean is_front_buffer_reading; - /* info for radeon_clear_tris() */ - struct { - struct gl_array_object *arrayObj; - GLfloat vertices[4][3]; - GLfloat color[4][4]; - } clear; - GLboolean internal_viewport_call; - - struct { - struct gl_fragment_program *bitmap_fp; - struct gl_vertex_program *passthrough_vp; - - struct gl_fragment_program *saved_fp; - GLboolean saved_fp_enable; - struct gl_vertex_program *saved_vp; - GLboolean saved_vp_enable; - - GLint saved_vp_x, saved_vp_y; - GLsizei saved_vp_width, saved_vp_height; - GLenum saved_matrix_mode; - } meta; + struct dri_metaops meta; struct { void (*get_lock)(radeonContextPtr radeon); diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c index 01c45df2df..a5e4df7941 100644 --- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c +++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c @@ -445,11 +445,6 @@ void radeonEmitAOS( r100ContextPtr rmesa, */ #define RADEON_MAX_CLEARS 256 -static void radeonUserClear(GLcontext *ctx, GLuint mask) -{ - radeon_clear_tris(ctx, mask); -} - static void radeonKernelClear(GLcontext *ctx, GLuint flags) { r100ContextPtr rmesa = R100_CONTEXT(ctx); -- cgit v1.2.3 From fb1d0bfd47fb8790e0b350a0fad7bc0af39e70f4 Mon Sep 17 00:00:00 2001 From: Pauli Nieminen Date: Tue, 11 Aug 2009 23:43:35 +0300 Subject: r200: Prevent flush in middle of rendering. Patch adds prediction functionthat tries to predict emit size to the smallest possible values that is quarenteed to be higher than worst case scenario in rendering pipeline. State emit size prediction code is in place but fix for emit sizes is included in next patch. Signed-off-by: Pauli Nieminen --- src/mesa/drivers/dri/r200/r200_ioctl.h | 8 +++-- src/mesa/drivers/dri/r200/r200_tcl.c | 54 +++++++++++++++++++++++++++++ src/mesa/drivers/dri/radeon/radeon_common.c | 23 ++++++++++++ src/mesa/drivers/dri/radeon/radeon_common.h | 1 + 4 files changed, 83 insertions(+), 3 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.h b/src/mesa/drivers/dri/r200/r200_ioctl.h index 2a4b8a11f4..f6419f5a2c 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.h +++ b/src/mesa/drivers/dri/r200/r200_ioctl.h @@ -125,10 +125,12 @@ static INLINE int R200_DB_STATECHANGE( * are available, you will also be adding an rmesa->state.max_state_size because * r200EmitState is called from within r200EmitVbufPrim and r200FlushElts. */ -#define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2)) * sizeof(int)) -#define VERT_AOS_BUFSZ (5 * sizeof(int)) +#define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2) + nr*2)) +#define VERT_AOS_BUFSZ (5) #define ELTS_BUFSZ(nr) (12 + nr * 2) -#define VBUF_BUFSZ (3 * sizeof(int)) +#define VBUF_BUFSZ (3) +#define SCISSOR_BUFSZ (8) +#define INDEX_BUFSZ (8+2) static inline uint32_t cmdpacket3(int cmd_type) { diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c index ca9a8dbf8c..455a4bbd6b 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.c +++ b/src/mesa/drivers/dri/r200/r200_tcl.c @@ -206,6 +206,7 @@ static void r200EmitPrim( GLcontext *ctx, r200EmitPrim( ctx, prim, hwprim, start, count ); \ (void) rmesa; } while (0) +#define MAX_CONVERSION_SIZE 40 /* Try & join small primitives */ #if 0 @@ -368,6 +369,58 @@ r200ComputeFogBlendFactor( GLcontext *ctx, GLfloat fogcoord ) } } +/** + * Predict total emit size for next rendering operation so there is no flush in middle of rendering + * Prediction has to aim towards the best possible value that is worse than worst case scenario + */ +static void r200EnsureEmitSize( GLcontext * ctx , GLubyte* vimap_rev ) +{ + r200ContextPtr rmesa = R200_CONTEXT(ctx); + TNLcontext *tnl = TNL_CONTEXT(ctx); + struct vertex_buffer *VB = &tnl->vb; + GLuint space_required; + GLuint nr_aos = 0; + int i; + /* predict number of aos to emit */ + for (i = 0; i < 15; ++i) + { + if (vimap_rev[i] != 255) + { + ++nr_aos; + } + } + + { + /* count the prediction for state size */ + space_required = radeonCountEmitSize( &rmesa->radeon ); + /* vtx may be changed in r200EmitArrays so account for it if not dirty */ + if (!rmesa->hw.vtx.dirty) + space_required += rmesa->hw.vtx.check(rmesa->radeon.glCtx, &rmesa->hw.vtx); + /* predict size for elements */ + for (i = 0; i < VB->PrimitiveCount; ++i) + { + if (!VB->Primitive[i].count) + continue; + /* If primitive.count is less than MAX_CONVERSION_SIZE + rendering code may decide convert to elts. + In that case we have to make pessimistic prediction. + and use larger of 2 paths. */ + const GLuint elts = ELTS_BUFSZ(nr_aos); + const GLuint index = INDEX_BUFSZ; + const GLuint vbuf = VBUF_BUFSZ; + if ( (!VB->Elts && VB->Primitive[i].count >= MAX_CONVERSION_SIZE) + || vbuf > index + elts) + space_required += vbuf; + else + space_required += index + elts; + space_required += AOS_BUFSZ(nr_aos); + } + space_required += SCISSOR_BUFSZ; + } + /* flush the buffer in case we need more than is left. */ + rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required, __FUNCTION__); +} + /**********************************************************************/ /* Render pipeline stage */ @@ -482,6 +535,7 @@ static GLboolean r200_run_tcl_render( GLcontext *ctx, /* Do the actual work: */ radeonReleaseArrays( ctx, ~0 /* stage->changed_inputs */ ); + r200EnsureEmitSize( ctx, vimap_rev ); r200EmitArrays( ctx, vimap_rev ); rmesa->tcl.Elts = VB->Elts; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index b5b4fed8fa..20cf1f9a56 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -946,6 +946,29 @@ static void radeon_print_state_atom_kmm(radeonContextPtr radeon, struct radeon_s } } +/** + * Count total size for next state emit. + **/ +GLuint radeonCountEmitSize(radeonContextPtr radeon) +{ + struct radeon_state_atom *atom; + int dwords = 0; + /* check if we are going to emit full state */ + if (radeon->cmdbuf.cs->cdw && !radeon->hw.all_dirty) { + if (!radeon->hw.is_dirty) + return dwords; + foreach(atom, &radeon->hw.atomlist) { + if (atom->dirty) + dwords += atom->check(radeon->glCtx, atom); + } + } else { + foreach(atom, &radeon->hw.atomlist) { + dwords += atom->check(radeon->glCtx, atom); + } + } + return dwords; +} + static INLINE void radeonEmitAtoms(radeonContextPtr radeon, GLboolean dirty) { BATCH_LOCALS(radeon); diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index cebae18b2d..6e81100d66 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -24,6 +24,7 @@ void radeonUpdatePageFlipping(radeonContextPtr rmesa); void radeonFlush(GLcontext *ctx); void radeonFinish(GLcontext * ctx); void radeonEmitState(radeonContextPtr radeon); +GLuint radeonCountEmitSize(radeonContextPtr radeon); void radeon_clear_tris(GLcontext *ctx, GLbitfield mask); -- cgit v1.2.3 From b7ec2ebe33608f9107ff7cae6b974edc8097cecd Mon Sep 17 00:00:00 2001 From: Pauli Nieminen Date: Fri, 21 Aug 2009 20:44:54 +0300 Subject: radeon: Improve state emit code. Trying to make understanding code easier with small refactoring and renaming. --- src/mesa/drivers/dri/r200/r200_swtcl.c | 2 +- src/mesa/drivers/dri/r200/r200_tcl.c | 2 +- src/mesa/drivers/dri/r300/r300_draw.c | 4 +- src/mesa/drivers/dri/radeon/radeon_common.c | 122 ++++++++++++++++------------ src/mesa/drivers/dri/radeon/radeon_common.h | 2 +- src/mesa/drivers/dri/radeon/radeon_dma.c | 2 +- src/mesa/drivers/dri/radeon/radeon_swtcl.c | 2 +- src/mesa/drivers/dri/radeon/radeon_tcl.c | 2 +- 8 files changed, 78 insertions(+), 60 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c index 8dd2e69d33..56930c7863 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.c +++ b/src/mesa/drivers/dri/r200/r200_swtcl.c @@ -269,7 +269,7 @@ void r200_swtcl_flush(GLcontext *ctx, uint32_t current_offset) { r200ContextPtr rmesa = R200_CONTEXT(ctx); rcommonEnsureCmdBufSpace(&rmesa->radeon, - radeonCountEmitSize(&rmesa->radeon) + (12*sizeof(int)), + radeonCountStateEmitSize(&rmesa->radeon) + (12*sizeof(int)), __FUNCTION__); diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c index d8020df97c..0f5e501c1a 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.c +++ b/src/mesa/drivers/dri/r200/r200_tcl.c @@ -387,7 +387,7 @@ static void r200EnsureEmitSize( GLcontext * ctx , GLubyte* vimap_rev ) { /* count the prediction for state size */ - space_required = radeonCountEmitSize( &rmesa->radeon ); + space_required = radeonCountStateEmitSize( &rmesa->radeon ); /* vtx may be changed in r200EmitArrays so account for it if not dirty */ if (!rmesa->hw.vtx.dirty) space_required += rmesa->hw.vtx.check(rmesa->radeon.glCtx, &rmesa->hw.vtx); diff --git a/src/mesa/drivers/dri/r300/r300_draw.c b/src/mesa/drivers/dri/r300/r300_draw.c index 1437535760..c8d2f44fa1 100644 --- a/src/mesa/drivers/dri/r300/r300_draw.c +++ b/src/mesa/drivers/dri/r300/r300_draw.c @@ -582,12 +582,12 @@ static GLuint r300PredictTryDrawPrimsSize(GLcontext *ctx, GLuint nr_prims) + SCISSORS_BUFSZ + FIREAOS_BUFSZ )*nr_prims; - state_size= radeonCountEmitSize(&r300->radeon); + state_size = radeonCountStateEmitSize(&r300->radeon); flushed = rcommonEnsureCmdBufSpace(&r300->radeon, dwords + state_size, __FUNCTION__); if (flushed) - dwords += radeonCountEmitSize(&r300->radeon); + dwords += radeonCountStateEmitSize(&r300->radeon); else dwords += state_size; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 6c3f7a57e5..4088ef303c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -895,7 +895,7 @@ void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei he ctx->Driver.Viewport = old_viewport; } -static void radeon_print_state_atom(radeonContextPtr radeon, struct radeon_state_atom *state) +static void radeon_print_state_atom_prekmm(radeonContextPtr radeon, struct radeon_state_atom *state) { int i, j, reg; int dwords = (*state->check) (radeon->glCtx, state); @@ -920,13 +920,22 @@ static void radeon_print_state_atom(radeonContextPtr radeon, struct radeon_state } } -static void radeon_print_state_atom_kmm(radeonContextPtr radeon, struct radeon_state_atom *state) +static void radeon_print_state_atom(radeonContextPtr radeon, struct radeon_state_atom *state) { int i, j, reg, count; - int dwords = (*state->check) (radeon->glCtx, state); + int dwords; uint32_t packet0; + if (! (DEBUG_CMDBUF || RADEON_DEBUG & DEBUG_STATE)) + return; - fprintf(stderr, " emit %s %d/%d\n", state->name, state->cmd_size, dwords); + if (!radeon->radeonScreen->kernel_mm) { + radeon_print_state_atom_prekmm(radeon, state); + return; + } + + dwords = (*state->check) (radeon->glCtx, state); + + fprintf(stderr, " emit %s %d/%d\n", state->name, dwords, state->cmd_size); if (RADEON_DEBUG & DEBUG_VERBOSE) { for (i = 0; i < state->cmd_size;) { @@ -949,60 +958,68 @@ static void radeon_print_state_atom_kmm(radeonContextPtr radeon, struct radeon_s /** * Count total size for next state emit. **/ -GLuint radeonCountEmitSize(radeonContextPtr radeon) +GLuint radeonCountStateEmitSize(radeonContextPtr radeon) { - struct radeon_state_atom *atom; - int dwords = 0; - /* check if we are going to emit full state */ - if (radeon->cmdbuf.cs->cdw && !radeon->hw.all_dirty) { - if (!radeon->hw.is_dirty) - return dwords; - foreach(atom, &radeon->hw.atomlist) { - if (atom->dirty) - dwords += atom->check(radeon->glCtx, atom); - } - } else { - foreach(atom, &radeon->hw.atomlist) { - dwords += atom->check(radeon->glCtx, atom); - } - } - return dwords; + struct radeon_state_atom *atom; + int dwords = 0; + /* check if we are going to emit full state */ + if (radeon->cmdbuf.cs->cdw && !radeon->hw.all_dirty) { + if (!radeon->hw.is_dirty) + return dwords; + foreach(atom, &radeon->hw.atomlist) { + if (atom->dirty) + dwords += atom->check(radeon->glCtx, atom); + } + } else { + foreach(atom, &radeon->hw.atomlist) { + dwords += atom->check(radeon->glCtx, atom); + } + } + return dwords; } -static INLINE void radeonEmitAtoms(radeonContextPtr radeon, GLboolean dirty) +static INLINE void radeon_emit_atom(radeonContextPtr radeon, struct radeon_state_atom *atom) { BATCH_LOCALS(radeon); - struct radeon_state_atom *atom; int dwords; + dwords = (*atom->check) (radeon->glCtx, atom); + if (dwords) { + + radeon_print_state_atom(radeon, atom); + + if (atom->emit) { + (*atom->emit)(radeon->glCtx, atom); + } else { + BEGIN_BATCH_NO_AUTOSTATE(dwords); + OUT_BATCH_TABLE(atom->cmd, dwords); + END_BATCH(); + } + } else { + if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_STATE) { + fprintf(stderr, " skip state %s\n", + atom->name); + } + } + atom->dirty = GL_FALSE; + +} + +static INLINE void radeonEmitAtoms(radeonContextPtr radeon, GLboolean emitAll) +{ + struct radeon_state_atom *atom; + if (radeon->vtbl.pre_emit_atoms) radeon->vtbl.pre_emit_atoms(radeon); /* Emit actual atoms */ - foreach(atom, &radeon->hw.atomlist) { - if ((atom->dirty || radeon->hw.all_dirty) == dirty) { - dwords = (*atom->check) (radeon->glCtx, atom); - if (dwords) { - if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_STATE) { - if (radeon->radeonScreen->kernel_mm) - radeon_print_state_atom_kmm(radeon, atom); - else - radeon_print_state_atom(radeon, atom); - } - if (atom->emit) { - (*atom->emit)(radeon->glCtx, atom); - } else { - BEGIN_BATCH_NO_AUTOSTATE(dwords); - OUT_BATCH_TABLE(atom->cmd, dwords); - END_BATCH(); - } - atom->dirty = GL_FALSE; - } else { - if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_STATE) { - fprintf(stderr, " skip state %s\n", - atom->name); - } - } + if (radeon->hw.all_dirty || emitAll) { + foreach(atom, &radeon->hw.atomlist) + radeon_emit_atom( radeon, atom ); + } else { + foreach(atom, &radeon->hw.atomlist) { + if ( atom->dirty ) + radeon_emit_atom( radeon, atom ); } } @@ -1036,16 +1053,17 @@ void radeonEmitState(radeonContextPtr radeon) if (RADEON_DEBUG & DEBUG_STATE) fprintf(stderr, "Begin reemit state\n"); + radeonEmitAtoms(radeon, GL_TRUE); + } else { + + if (RADEON_DEBUG & DEBUG_STATE) + fprintf(stderr, "Begin dirty state\n"); + radeonEmitAtoms(radeon, GL_FALSE); } - if (RADEON_DEBUG & DEBUG_STATE) - fprintf(stderr, "Begin dirty state\n"); - - radeonEmitAtoms(radeon, GL_TRUE); radeon->hw.is_dirty = GL_FALSE; radeon->hw.all_dirty = GL_FALSE; - } diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index 6e81100d66..a9e1ca49eb 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -24,7 +24,7 @@ void radeonUpdatePageFlipping(radeonContextPtr rmesa); void radeonFlush(GLcontext *ctx); void radeonFinish(GLcontext * ctx); void radeonEmitState(radeonContextPtr radeon); -GLuint radeonCountEmitSize(radeonContextPtr radeon); +GLuint radeonCountStateEmitSize(radeonContextPtr radeon); void radeon_clear_tris(GLcontext *ctx, GLbitfield mask); diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c index 79b2b77d30..7e8f50e3df 100644 --- a/src/mesa/drivers/dri/radeon/radeon_dma.c +++ b/src/mesa/drivers/dri/radeon/radeon_dma.c @@ -431,7 +431,7 @@ restart: if (!rmesa->dma.flush) { /* make sure we have enough space to use this in cmdbuf */ rcommonEnsureCmdBufSpace(rmesa, - radeonCountEmitSize( rmesa ) + (20*sizeof(int)), + radeonCountStateEmitSize( rmesa ) + (20*sizeof(int)), __FUNCTION__); /* if cmdbuf flushed DMA restart */ if (is_empty_list(&rmesa->dma.reserved)) diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c index a1b398e560..20ce6c470b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c @@ -285,7 +285,7 @@ void r100_swtcl_flush(GLcontext *ctx, uint32_t current_offset) r100ContextPtr rmesa = R100_CONTEXT(ctx); rcommonEnsureCmdBufSpace(&rmesa->radeon, - radeonCountEmitSize( &rmesa->radeon ) + (12*sizeof(int)), + radeonCountStateEmitSize( &rmesa->radeon ) + (12*sizeof(int)), __FUNCTION__); diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.c b/src/mesa/drivers/dri/radeon/radeon_tcl.c index c5a73a2818..908b3c9f06 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_tcl.c @@ -388,7 +388,7 @@ static void radeonEnsureEmitSize( GLcontext * ctx , GLuint inputs ) { /* count the prediction for state size */ - space_required = radeonCountEmitSize( &rmesa->radeon ); + space_required = radeonCountStateEmitSize( &rmesa->radeon ); /* tcl may be changed in radeonEmitArrays so account for it if not dirty */ if (!rmesa->hw.tcl.dirty) space_required += rmesa->hw.tcl.check( rmesa->radeon.glCtx, &rmesa->hw.tcl ); -- cgit v1.2.3 From bfbad4fbb7420d3b5e8761c08d197574bfcd44b2 Mon Sep 17 00:00:00 2001 From: Pauli Nieminen Date: Fri, 28 Aug 2009 04:58:50 +0300 Subject: r100/r200: Share PolygonStripple code. --- src/mesa/drivers/dri/r200/r200_state.c | 32 +------------------------ src/mesa/drivers/dri/radeon/radeon_common.c | 25 +++++++++++++++++++ src/mesa/drivers/dri/radeon/radeon_common.h | 1 + src/mesa/drivers/dri/radeon/radeon_state.c | 25 ------------------- src/mesa/drivers/dri/radeon/server/radeon_reg.h | 3 +++ 5 files changed, 30 insertions(+), 56 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 4d052e246e..af60861bbb 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -764,36 +764,6 @@ static void r200PolygonOffset( GLcontext *ctx, rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_CONSTANT] = constant.ui32; } -static void r200PolygonStipple( GLcontext *ctx, const GLubyte *mask ) -{ - r200ContextPtr rmesa = R200_CONTEXT(ctx); - GLint i; - BATCH_LOCALS(&rmesa->radeon); - drm_radeon_stipple_t stipple; - - radeon_firevertices(&rmesa->radeon); - - BEGIN_BATCH_NO_AUTOSTATE(35); - - OUT_BATCH(CP_PACKET0(R200_RE_STIPPLE_ADDR, 0)); - OUT_BATCH(0x00000000); - - OUT_BATCH(CP_PACKET0_ONE(R200_RE_STIPPLE_DATA, 31)); - - /* Must flip pattern upside down. - */ - for ( i = 31 ; i >= 0; i--) { - OUT_BATCH(((GLuint *) mask)[i]); - } - - END_BATCH(); - - - /* FIXME: Use window x,y offsets into stipple RAM. - */ - stipple.mask = rmesa->state.stipple.mask; -} - static void r200PolygonMode( GLcontext *ctx, GLenum face, GLenum mode ) { r200ContextPtr rmesa = R200_CONTEXT(ctx); @@ -2532,7 +2502,7 @@ void r200InitStateFuncs( struct dd_function_table *functions ) functions->LogicOpcode = r200LogicOpCode; functions->PolygonMode = r200PolygonMode; functions->PolygonOffset = r200PolygonOffset; - functions->PolygonStipple = r200PolygonStipple; + functions->PolygonStipple = radeonPolygonStipple; functions->PointParameterfv = r200PointParameter; functions->PointSize = r200PointSize; functions->RenderMode = r200RenderMode; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index bed75f3d73..e760279d4a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -273,6 +273,31 @@ void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h) } } +void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ) +{ + radeonContextPtr radeon = RADEON_CONTEXT(ctx); + GLint i; + BATCH_LOCALS(radeon); + + radeon_firevertices(radeon); + + BEGIN_BATCH_NO_AUTOSTATE(35); + + OUT_BATCH(CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0)); + OUT_BATCH(0x00000000); + + OUT_BATCH(CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31)); + + /* Must flip pattern upside down. + */ + for ( i = 31 ; i >= 0; i--) { + OUT_BATCH(((GLuint *) mask)[i]); + } + + END_BATCH(); +} + + /* ================================================================ * SwapBuffers with client-side throttling diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index a9e1ca49eb..e2a65f46f6 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -10,6 +10,7 @@ void radeonRecalcScissorRects(radeonContextPtr radeon); void radeonSetCliprects(radeonContextPtr radeon); void radeonUpdateScissor( GLcontext *ctx ); void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h); +void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ); void radeonWaitForIdleLocked(radeonContextPtr radeon); extern uint32_t radeonGetAge(radeonContextPtr radeon); diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 56f82bdb0b..9d877cb751 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -550,31 +550,6 @@ static void radeonPolygonOffset( GLcontext *ctx, rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_CONSTANT] = constant.ui32; } -static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ) -{ - r100ContextPtr rmesa = R100_CONTEXT(ctx); - GLuint i; - drm_radeon_stipple_t stipple; - - /* Must flip pattern upside down. - */ - for ( i = 0 ; i < 32 ; i++ ) { - rmesa->state.stipple.mask[31 - i] = ((GLuint *) mask)[i]; - } - - /* TODO: push this into cmd mechanism - */ - radeon_firevertices(&rmesa->radeon); - LOCK_HARDWARE( &rmesa->radeon ); - - /* FIXME: Use window x,y offsets into stipple RAM. - */ - stipple.mask = rmesa->state.stipple.mask; - drmCommandWrite( rmesa->radeon.dri.fd, DRM_RADEON_STIPPLE, - &stipple, sizeof(drm_radeon_stipple_t) ); - UNLOCK_HARDWARE( &rmesa->radeon ); -} - static void radeonPolygonMode( GLcontext *ctx, GLenum face, GLenum mode ) { r100ContextPtr rmesa = R100_CONTEXT(ctx); diff --git a/src/mesa/drivers/dri/radeon/server/radeon_reg.h b/src/mesa/drivers/dri/radeon/server/radeon_reg.h index c9054606eb..e81d7fdcd0 100644 --- a/src/mesa/drivers/dri/radeon/server/radeon_reg.h +++ b/src/mesa/drivers/dri/radeon/server/radeon_reg.h @@ -1663,6 +1663,9 @@ # define RADEON_FORCE_Z_DIRTY (1 << 29) # define RADEON_Z_WRITE_ENABLE (1 << 30) # define RADEON_Z_DECOMPRESSION_ENABLE (1 << 31) + +#define RADEON_RE_STIPPLE_ADDR 0x1cc8 +#define RADEON_RE_STIPPLE_DATA 0x1ccc #define RADEON_RE_LINE_PATTERN 0x1cd0 # define RADEON_LINE_PATTERN_MASK 0x0000ffff # define RADEON_LINE_REPEAT_COUNT_SHIFT 16 -- cgit v1.2.3 From 4322181e6a07ecb8891c2d1ada74fd48c996a8fc Mon Sep 17 00:00:00 2001 From: Pauli Nieminen Date: Fri, 28 Aug 2009 05:42:41 +0300 Subject: r100/r200: Bring back old PolygonStripple for DRI1. DRI1 didn't have support for command buffer emit for stripple. --- src/mesa/drivers/dri/r200/r200_context.c | 2 +- src/mesa/drivers/dri/r200/r200_context.h | 1 - src/mesa/drivers/dri/r200/r200_state.c | 7 +++++-- src/mesa/drivers/dri/r200/r200_state.h | 2 +- src/mesa/drivers/dri/radeon/radeon_common.c | 22 ++++++++++++++++++++++ src/mesa/drivers/dri/radeon/radeon_common.h | 1 + .../drivers/dri/radeon/radeon_common_context.h | 4 ---- src/mesa/drivers/dri/radeon/radeon_context.c | 2 +- src/mesa/drivers/dri/radeon/radeon_context.h | 1 - src/mesa/drivers/dri/radeon/radeon_state.c | 7 +++++-- src/mesa/drivers/dri/radeon/radeon_state.h | 2 +- 11 files changed, 37 insertions(+), 14 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c index e8e7a42099..0898617a3d 100644 --- a/src/mesa/drivers/dri/r200/r200_context.c +++ b/src/mesa/drivers/dri/r200/r200_context.c @@ -345,7 +345,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual, _mesa_init_driver_functions(&functions); r200InitDriverFuncs(&functions); r200InitIoctlFuncs(&functions); - r200InitStateFuncs(&functions); + r200InitStateFuncs(&functions, screen->kernel_mm); r200InitTextureFuncs(&functions); r200InitShaderFuncs(&functions); radeonInitQueryObjFunctions(&functions); diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h index e26514b27a..c5dccf0a75 100644 --- a/src/mesa/drivers/dri/r200/r200_context.h +++ b/src/mesa/drivers/dri/r200/r200_context.h @@ -526,7 +526,6 @@ struct r200_hw_state { struct r200_state { /* Derived state for internal purposes: */ - struct radeon_stipple_state stipple; struct r200_texture_state texture; GLuint envneeded; }; diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index af60861bbb..ab1ba1f283 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -2468,7 +2468,7 @@ static void r200WrapRunPipeline( GLcontext *ctx ) /* Initialize the driver's state functions. */ -void r200InitStateFuncs( struct dd_function_table *functions ) +void r200InitStateFuncs( struct dd_function_table *functions, GLboolean dri2 ) { functions->UpdateState = r200InvalidateState; functions->LightingSpaceChange = r200LightingSpaceChange; @@ -2502,7 +2502,10 @@ void r200InitStateFuncs( struct dd_function_table *functions ) functions->LogicOpcode = r200LogicOpCode; functions->PolygonMode = r200PolygonMode; functions->PolygonOffset = r200PolygonOffset; - functions->PolygonStipple = radeonPolygonStipple; + if (dri2) + functions->PolygonStipple = radeonPolygonStipple; + else + functions->PolygonStipple = radeonPolygonStipplePreKMS; functions->PointParameterfv = r200PointParameter; functions->PointSize = r200PointSize; functions->RenderMode = r200RenderMode; diff --git a/src/mesa/drivers/dri/r200/r200_state.h b/src/mesa/drivers/dri/r200/r200_state.h index 7b9b0c106a..9c62f0a644 100644 --- a/src/mesa/drivers/dri/r200/r200_state.h +++ b/src/mesa/drivers/dri/r200/r200_state.h @@ -38,7 +38,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r200_context.h" extern void r200InitState( r200ContextPtr rmesa ); -extern void r200InitStateFuncs( struct dd_function_table *functions ); +extern void r200InitStateFuncs( struct dd_function_table *functions, GLboolean dri2 ); extern void r200InitTnlFuncs( GLcontext *ctx ); extern void r200UpdateMaterial( GLcontext *ctx ); diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index e760279d4a..e14a419045 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -273,6 +273,28 @@ void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h) } } +void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask ) +{ + radeonContextPtr radeon = RADEON_CONTEXT(ctx); + GLuint i; + drm_radeon_stipple_t stipple; + + /* Must flip pattern upside down. + */ + for ( i = 0 ; i < 32 ; i++ ) { + stipple.mask[31 - i] = ((GLuint *) mask)[i]; + } + + /* TODO: push this into cmd mechanism + */ + radeon_firevertices(radeon); + LOCK_HARDWARE( radeon ); + + drmCommandWrite( radeon->dri.fd, DRM_RADEON_STIPPLE, + &stipple, sizeof(stipple) ); + UNLOCK_HARDWARE( radeon ); +} + void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ) { radeonContextPtr radeon = RADEON_CONTEXT(ctx); diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index e2a65f46f6..ba983e5ab6 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -11,6 +11,7 @@ void radeonSetCliprects(radeonContextPtr radeon); void radeonUpdateScissor( GLcontext *ctx ); void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h); void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ); +void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask ); void radeonWaitForIdleLocked(radeonContextPtr radeon); extern uint32_t radeonGetAge(radeonContextPtr radeon); diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index 427eb946ff..3463b4d264 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -158,10 +158,6 @@ struct radeon_stencilbuffer_state { GLuint clear; /* rb3d_stencilrefmask value */ }; -struct radeon_stipple_state { - GLuint mask[32]; -}; - struct radeon_state_atom { struct radeon_state_atom *next, *prev; const char *name; /* for debug */ diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c index cbe3416726..32485a7270 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_context.c @@ -395,7 +395,7 @@ r100CreateContext( const __GLcontextModes *glVisual, radeon_fbo_init(&rmesa->radeon); radeonInitSpanFuncs( ctx ); radeonInitIoctlFuncs( ctx ); - radeonInitStateFuncs( ctx ); + radeonInitStateFuncs( ctx , rmesa->radeon.radeonScreen->kernel_mm ); radeonInitState( rmesa ); radeonInitSwtcl( ctx ); diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h index 0845cad519..572acbb006 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_context.h @@ -328,7 +328,6 @@ struct r100_hw_state { struct r100_state { - struct radeon_stipple_state stipple; struct radeon_texture_state texture; }; diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 9d877cb751..e03551d666 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -2202,7 +2202,7 @@ static void radeonWrapRunPipeline( GLcontext *ctx ) * Many of the ctx->Driver functions might have been initialized to * software defaults in the earlier _mesa_init_driver_functions() call. */ -void radeonInitStateFuncs( GLcontext *ctx ) +void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 ) { ctx->Driver.UpdateState = radeonInvalidateState; ctx->Driver.LightingSpaceChange = radeonLightingSpaceChange; @@ -2235,7 +2235,10 @@ void radeonInitStateFuncs( GLcontext *ctx ) ctx->Driver.LogicOpcode = radeonLogicOpCode; ctx->Driver.PolygonMode = radeonPolygonMode; ctx->Driver.PolygonOffset = radeonPolygonOffset; - ctx->Driver.PolygonStipple = radeonPolygonStipple; + if (dri2) + ctx->Driver.PolygonStipple = radeonPolygonStipple; + else + ctx->Driver.PolygonStipple = radeonPolygonStipplePreKMS; ctx->Driver.RenderMode = radeonRenderMode; ctx->Driver.Scissor = radeonScissor; ctx->Driver.ShadeModel = radeonShadeModel; diff --git a/src/mesa/drivers/dri/radeon/radeon_state.h b/src/mesa/drivers/dri/radeon/radeon_state.h index a7c8eef32a..c780cff0cf 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.h +++ b/src/mesa/drivers/dri/radeon/radeon_state.h @@ -40,7 +40,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "radeon_context.h" extern void radeonInitState( r100ContextPtr rmesa ); -extern void radeonInitStateFuncs( GLcontext *ctx ); +extern void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2); extern void radeonUpdateMaterial( GLcontext *ctx ); -- cgit v1.2.3 From 7d361537661b93a501c9533271458a41b965ea79 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 1 Sep 2009 16:04:39 +1000 Subject: radeon: fix r100/r200 polygon stipple under kms There really need to use state emits under kms, otherwise we end up with some dwords in the command buffer before we've ever emitted any useful state. Signed-off-by: Dave Airlie --- src/mesa/drivers/dri/r200/r200_context.h | 6 ++++++ src/mesa/drivers/dri/r200/r200_state.c | 17 ++++++++++++++++- src/mesa/drivers/dri/r200/r200_state_init.c | 9 +++++++++ src/mesa/drivers/dri/radeon/radeon_common.c | 25 ------------------------- src/mesa/drivers/dri/radeon/radeon_common.h | 1 - src/mesa/drivers/dri/radeon/radeon_context.h | 7 ++++++- src/mesa/drivers/dri/radeon/radeon_state.c | 16 ++++++++++++++++ src/mesa/drivers/dri/radeon/radeon_state_init.c | 10 +++++++++- 8 files changed, 62 insertions(+), 29 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_common.h') diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h index c5dccf0a75..246f98c6dc 100644 --- a/src/mesa/drivers/dri/r200/r200_context.h +++ b/src/mesa/drivers/dri/r200/r200_context.h @@ -479,6 +479,11 @@ struct r200_texture_state { #define R200_QUERYOBJ_DATA_0 1 #define R200_QUERYOBJ_CMDSIZE 2 +#define STP_CMD_0 0 +#define STP_DATA_0 1 +#define STP_CMD_1 2 +#define STP_STATE_SIZE 35 + struct r200_hw_state { /* Hardware state, stored as cmdbuf commands: * -- Need to doublebuffer for @@ -521,6 +526,7 @@ struct r200_hw_state { struct radeon_state_atom atf; struct radeon_state_atom spr; struct radeon_state_atom ptp; + struct radeon_state_atom stp; }; struct r200_state { diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index fea7681c8a..76852e315c 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -2466,6 +2466,21 @@ static void r200WrapRunPipeline( GLcontext *ctx ) } +static void r200PolygonStipple( GLcontext *ctx, const GLubyte *mask ) +{ + r200ContextPtr r200 = R200_CONTEXT(ctx); + GLint i; + + radeon_firevertices(&r200->radeon); + + R200_STATECHANGE(r200, stp); + + /* Must flip pattern upside down. + */ + for ( i = 31 ; i >= 0; i--) { + r200->hw.stp.cmd[3 + i] = ((GLuint *) mask)[i]; + } +} /* Initialize the driver's state functions. */ void r200InitStateFuncs( struct dd_function_table *functions, GLboolean dri2 ) @@ -2503,7 +2518,7 @@ void r200InitStateFuncs( struct dd_function_table *functions, GLboolean dri2 ) functions->PolygonMode = r200PolygonMode; functions->PolygonOffset = r200PolygonOffset; if (dri2) - functions->PolygonStipple = radeonPolygonStipple; + functions->PolygonStipple = r200PolygonStipple; else functions->PolygonStipple = radeonPolygonStipplePreKMS; functions->PointParameterfv = r200PointParameter; diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c index 3e0cebaa07..7697306d88 100644 --- a/src/mesa/drivers/dri/r200/r200_state_init.c +++ b/src/mesa/drivers/dri/r200/r200_state_init.c @@ -885,6 +885,10 @@ void r200InitState( r200ContextPtr rmesa ) } } } + /* polygon stipple is done with irq for non-kms */ + if (rmesa->radeon.radeonScreen->kernel_mm) { + ALLOC_STATE( stp, always, STP_STATE_SIZE, "STP/stp", 0 ); + } for (i = 0; i < 6; i++) if (rmesa->radeon.radeonScreen->kernel_mm) @@ -1117,6 +1121,11 @@ void r200InitState( r200ContextPtr rmesa ) rmesa->hw.sci.cmd[SCI_CMD_2] = CP_PACKET0(R200_RE_WIDTH_HEIGHT, 0); if (rmesa->radeon.radeonScreen->kernel_mm) { + + rmesa->hw.stp.cmd[STP_CMD_0] = CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0); + rmesa->hw.stp.cmd[STP_DATA_0] = 0; + rmesa->hw.stp.cmd[STP_CMD_1] = CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31); + rmesa->hw.mtl[0].emit = mtl_emit; rmesa->hw.mtl[1].emit = mtl_emit; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index aaa5165bc8..1836dbc79a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -312,31 +312,6 @@ void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask ) UNLOCK_HARDWARE( radeon ); } -void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ) -{ - radeonContextPtr radeon = RADEON_CONTEXT(ctx); - GLint i; - BATCH_LOCALS(radeon); - - radeon_firevertices(radeon); - - BEGIN_BATCH_NO_AUTOSTATE(35); - - OUT_BATCH(CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0)); - OUT_BATCH(0x00000000); - - OUT_BATCH(CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31)); - - /* Must flip pattern upside down. - */ - for ( i = 31 ; i >= 0; i--) { - OUT_BATCH(((GLuint *) mask)[i]); - } - - END_BATCH(); -} - - /* ================================================================ * SwapBuffers with client-side throttling diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index ba983e5ab6..f3201911ac 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -10,7 +10,6 @@ void radeonRecalcScissorRects(radeonContextPtr radeon); void radeonSetCliprects(radeonContextPtr radeon); void radeonUpdateScissor( GLcontext *ctx ); void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h); -void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ); void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask ); void radeonWaitForIdleLocked(radeonContextPtr radeon); diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h index 572acbb006..4e2c52c835 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_context.h @@ -299,6 +299,11 @@ struct radeon_texture_state { #define R100_QUERYOBJ_DATA_0 1 #define R100_QUERYOBJ_CMDSIZE 2 +#define STP_CMD_0 0 +#define STP_DATA_0 1 +#define STP_CMD_1 2 +#define STP_STATE_SIZE 35 + struct r100_hw_state { /* Hardware state, stored as cmdbuf commands: * -- Need to doublebuffer for @@ -323,7 +328,7 @@ struct r100_hw_state { struct radeon_state_atom fog; struct radeon_state_atom glt; struct radeon_state_atom txr[3]; /* for NPOT */ - + struct radeon_state_atom stp; }; diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index c8cc7f9bcf..4d0d35ee0c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -2197,6 +2197,22 @@ static void radeonWrapRunPipeline( GLcontext *ctx ) } } +static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask ) +{ + r100ContextPtr r100 = R100_CONTEXT(ctx); + GLint i; + + radeon_firevertices(&r100->radeon); + + RADEON_STATECHANGE(r100, stp); + + /* Must flip pattern upside down. + */ + for ( i = 31 ; i >= 0; i--) { + r100->hw.stp.cmd[3 + i] = ((GLuint *) mask)[i]; + } +} + /* Initialize the driver's state functions. * Many of the ctx->Driver functions might have been initialized to diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c index 8236199b9b..f3ad0dd17a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state_init.c +++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c @@ -781,6 +781,10 @@ void radeonInitState( r100ContextPtr rmesa ) ALLOC_STATE( ucp[5], tcl_ucp5, UCP_STATE_SIZE, "UCP/userclip-5", 1 ); } + if (rmesa->radeon.radeonScreen->kernel_mm) { + ALLOC_STATE( stp, always, STP_STATE_SIZE, "STP/stp", 0 ); + } + for (i = 0; i < 3; i++) { if (rmesa->radeon.radeonScreen->kernel_mm) rmesa->hw.tex[i].emit = tex_emit_cs; @@ -873,6 +877,10 @@ void radeonInitState( r100ContextPtr rmesa ) } if (rmesa->radeon.radeonScreen->kernel_mm) { + rmesa->hw.stp.cmd[STP_CMD_0] = CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0); + rmesa->hw.stp.cmd[STP_DATA_0] = 0; + rmesa->hw.stp.cmd[STP_CMD_1] = CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31); + rmesa->hw.grd.emit = scl_emit; rmesa->hw.fog.emit = vec_emit; rmesa->hw.glt.emit = vec_emit; @@ -1143,7 +1151,7 @@ void radeonInitState( r100ContextPtr rmesa ) rmesa->hw.eye.cmd[EYE_Y] = 0; rmesa->hw.eye.cmd[EYE_Z] = IEEE_ONE; rmesa->hw.eye.cmd[EYE_RESCALE_FACTOR] = IEEE_ONE; - + if (rmesa->radeon.radeonScreen->kernel_mm) { radeon_init_query_stateobj(&rmesa->radeon, R100_QUERYOBJ_CMDSIZE); rmesa->radeon.query.queryobj.cmd[R100_QUERYOBJ_CMD_0] = CP_PACKET0(RADEON_RB3D_ZPASS_DATA, 0); -- cgit v1.2.3