From b75d40736997911e00cab339a7f15ec9bc86e535 Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Wed, 24 Feb 2010 17:19:09 +1000
Subject: radeon: fix bad state emission causes kernel to do bad depth clear

The kernel lets you clear depth without getting a depth offset
from userspace, mesa used to emit state before clear, but that got
lost in the refactoring, which made the kernel bug show up. Fix
mesa driver to emit the state properly now.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 src/mesa/drivers/dri/radeon/radeon_ioctl.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index c7ea452156..d429f15fa5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -481,6 +481,7 @@ static void radeonKernelClear(GLcontext *ctx, GLuint flags)
       }
    }
 
+   radeonEmitState(&rmesa->radeon);
    /* Send current state to the hardware */
    rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
 
-- 
cgit v1.2.3


From 3f5bac8960a5c6d1f08f0dc849676139b9d6ce5c Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Wed, 24 Feb 2010 19:13:07 +1000
Subject: radeon/r200: fix the state emission before kernel clear

this moves the emission outside the lock and adds r200 support.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 src/mesa/drivers/dri/r200/r200_ioctl.c     | 2 ++
 src/mesa/drivers/dri/radeon/radeon_ioctl.c | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c
index a1b505707e..b72f69b7f4 100644
--- a/src/mesa/drivers/dri/r200/r200_ioctl.c
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.c
@@ -61,6 +61,8 @@ static void r200KernelClear(GLcontext *ctx, GLuint flags)
    GLint cx, cy, cw, ch, ret;
    GLuint i;
 
+   radeonEmitState(&rmesa->radeon);
+
    LOCK_HARDWARE( &rmesa->radeon );
 
    /* Throttle the number of clear ioctls we do.
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index d429f15fa5..5ac526c6de 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -442,6 +442,8 @@ static void radeonKernelClear(GLcontext *ctx, GLuint flags)
    GLint ret, i;
    GLint cx, cy, cw, ch;
 
+   radeonEmitState(&rmesa->radeon);
+
    LOCK_HARDWARE( &rmesa->radeon );
 
    /* compute region after locking: */
@@ -481,7 +483,6 @@ static void radeonKernelClear(GLcontext *ctx, GLuint flags)
       }
    }
 
-   radeonEmitState(&rmesa->radeon);
    /* Send current state to the hardware */
    rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
 
-- 
cgit v1.2.3


From d3004d9156e261d81adcae31d55a4b782433cd6b Mon Sep 17 00:00:00 2001
From: Vinson Lee <vlee@vmware.com>
Date: Sat, 27 Feb 2010 02:28:00 -0800
Subject: radeon: Assert pointer is not null before dereferencing.

Add back an assert that was removed in commit
cd5f167353f16fb4f5b349002625b704f3e23778.
---
 src/mesa/drivers/dri/radeon/radeon_tex_copy.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index d6aeb7049f..18cf182e54 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -58,6 +58,7 @@ do_copy_texsubimage(GLcontext *ctx,
     }
 
     assert(rrb && rrb->bo);
+    assert(timg->mt);
     assert(timg->mt->bo);
     assert(timg->base.Width >= dstx + width);
     assert(timg->base.Height >= dsty + height);
-- 
cgit v1.2.3


From 9a7776696b786180f1d384eb22b928707e74dfca Mon Sep 17 00:00:00 2001
From: Pauli Nieminen <suokkos@gmail.com>
Date: Mon, 1 Mar 2010 23:47:35 +0200
Subject: radeon: Reduce number of radeon_bo_map calls that require kernel
 entry.

DMA buffers are often remapped many times for singel cs. To reduce number of
mapping calls ending to kernel dma buffers are mapped when allocated and unmapped
when full or in cs flush. This makes indifual mapping calls in other parts of
code simple increment/decrement reference count which is faster than entering
kernel.

This improves Anholt's openarena benchmark from 36 fps to 44 fps.
---
 src/mesa/drivers/dri/radeon/radeon_dma.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c
index d31e4e47dd..22499bc38d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.c
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.c
@@ -184,6 +184,8 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size)
 	radeon_print(RADEON_DMA, RADEON_NORMAL, "%s size %d minimum_size %d\n",
 			__FUNCTION__, size, rmesa->dma.minimum_size);
 
+	if (!is_empty_list(&rmesa->dma.reserved))
+		radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo);
 
 	if (is_empty_list(&rmesa->dma.free)
 	      || last_elem(&rmesa->dma.free)->bo->size < size) {
@@ -211,7 +213,7 @@ again_alloc:
 
 	rmesa->dma.current_used = 0;
 	rmesa->dma.current_vertexptr = 0;
-	
+
 	if (radeon_cs_space_check_with_bo(rmesa->cmdbuf.cs,
 					  first_elem(&rmesa->dma.reserved)->bo,
 					  RADEON_GEM_DOMAIN_GTT, 0))
@@ -221,6 +223,7 @@ again_alloc:
         /* Cmd buff have been flushed in radeon_revalidate_bos */
 		goto again_alloc;
 	}
+	radeon_bo_map(first_elem(&rmesa->dma.reserved)->bo, 1);
 }
 
 /* Allocates a region from rmesa->dma.current.  If there isn't enough
@@ -332,6 +335,10 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
 		/* request updated cs processing information from kernel */
 		legacy_track_pending(rmesa->radeonScreen->bom, 0);
 	}
+
+	if (!is_empty_list(&rmesa->dma.reserved))
+		radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo);
+
 	/* move waiting bos to free list.
 	   wait list provides gpu time to handle data before reuse */
 	foreach_s(dma_bo, temp, &rmesa->dma.wait) {
@@ -349,8 +356,11 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
 		   FREE(dma_bo);
 		   continue;
 		}
-		if (!radeon_bo_is_idle(dma_bo->bo))
+		if (!radeon_bo_is_idle(dma_bo->bo)) {
+			if (rmesa->radeonScreen->driScreen->dri2.enabled)
+				break;
 			continue;
+		}
 		remove_from_list(dma_bo);
 		dma_bo->expire_counter = expire_at;
 		insert_at_tail(&rmesa->dma.free, dma_bo);
@@ -388,7 +398,7 @@ void rcommon_flush_last_swtcl_prim( GLcontext *ctx  )
 {
 	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 	struct radeon_dma *dma = &rmesa->dma;
-		
+
 	if (RADEON_DEBUG & RADEON_IOCTL)
 		fprintf(stderr, "%s\n", __FUNCTION__);
 	dma->flush = NULL;
-- 
cgit v1.2.3


From daf85c460875c944d6918fdf4041467d97cba41e Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Wed, 3 Mar 2010 16:27:21 +1000
Subject: radeon/r200/r300/r600: fix blit BO buffer validation

there is no need for these to be persistent since we flush the CS
at the end of the blit, and we don't reuse these buffers at all.

on my r600 the Wine DX9 test suite doesn't crash at least anymore.

Signed-off-by: Dave Airlie <airlied@redhat.com>
---
 src/mesa/drivers/dri/r200/r200_blit.c     | 12 ++++++++----
 src/mesa/drivers/dri/r300/r300_blit.c     | 12 ++++++++----
 src/mesa/drivers/dri/r600/r600_blit.c     | 14 ++++++++------
 src/mesa/drivers/dri/radeon/radeon_blit.c | 12 ++++++++----
 4 files changed, 32 insertions(+), 18 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c
index e446d532cf..56b08a21bd 100644
--- a/src/mesa/drivers/dri/r200/r200_blit.c
+++ b/src/mesa/drivers/dri/r200/r200_blit.c
@@ -211,11 +211,15 @@ static GLboolean validate_buffers(struct r200_context *r200,
                                   struct radeon_bo *dst_bo)
 {
     int ret;
-    radeon_cs_space_add_persistent_bo(r200->radeon.cmdbuf.cs,
-                                      src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+    ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
+                                        src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+    if (ret)
+        return GL_FALSE;
 
-    radeon_cs_space_add_persistent_bo(r200->radeon.cmdbuf.cs,
-                                      dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+    ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+    if (ret)
+        return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
                                         first_elem(&r200->radeon.dma.reserved)->bo,
diff --git a/src/mesa/drivers/dri/r300/r300_blit.c b/src/mesa/drivers/dri/r300/r300_blit.c
index 54ac2510e7..35fd06734f 100644
--- a/src/mesa/drivers/dri/r300/r300_blit.c
+++ b/src/mesa/drivers/dri/r300/r300_blit.c
@@ -373,11 +373,15 @@ static GLboolean validate_buffers(struct r300_context *r300,
                                   struct radeon_bo *dst_bo)
 {
     int ret;
-    radeon_cs_space_add_persistent_bo(r300->radeon.cmdbuf.cs,
-                                      src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+    ret = radeon_cs_space_check_with_bo(r300->radeon.cmdbuf.cs,
+                                        src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+    if (ret)
+        return GL_FALSE;
 
-    radeon_cs_space_add_persistent_bo(r300->radeon.cmdbuf.cs,
-                                      dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+    ret = radeon_cs_space_check_with_bo(r300->radeon.cmdbuf.cs,
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+    if (ret)
+        return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(r300->radeon.cmdbuf.cs,
                                         first_elem(&r300->radeon.dma.reserved)->bo,
diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c
index 4bb77a398f..8eafd42e8f 100644
--- a/src/mesa/drivers/dri/r600/r600_blit.c
+++ b/src/mesa/drivers/dri/r600/r600_blit.c
@@ -1532,14 +1532,16 @@ static GLboolean validate_buffers(context_t *rmesa,
                                   struct radeon_bo *dst_bo)
 {
     int ret;
-    radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
-                                      src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
 
-    radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
-                                      dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+    ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
+					src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+    if (ret)
+        return GL_FALSE;
 
-    radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
-                                      rmesa->blit_bo, RADEON_GEM_DOMAIN_GTT, 0);
+    ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+    if (ret)
+        return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
 					rmesa->blit_bo,
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index 0df4fbb33c..34b9af4063 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -204,11 +204,15 @@ static GLboolean validate_buffers(struct r100_context *r100,
                                   struct radeon_bo *dst_bo)
 {
     int ret;
-    radeon_cs_space_add_persistent_bo(r100->radeon.cmdbuf.cs,
-                                      src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+    ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
+                                        src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+    if (ret)
+        return GL_FALSE;
 
-    radeon_cs_space_add_persistent_bo(r100->radeon.cmdbuf.cs,
-                                      dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+    ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+    if (ret)
+        return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
                                         first_elem(&r100->radeon.dma.reserved)->bo,
-- 
cgit v1.2.3


From bdbf199a8c5bef12186e022babbb03f5cd763db6 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Wed, 3 Mar 2010 14:09:53 -0500
Subject: r600: add new rs880 pci id

---
 src/mesa/drivers/dri/radeon/radeon_chipset.h | 1 +
 src/mesa/drivers/dri/radeon/radeon_screen.c  | 1 +
 2 files changed, 2 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_chipset.h b/src/mesa/drivers/dri/radeon/radeon_chipset.h
index 46a9cd5ff8..f17a305bce 100644
--- a/src/mesa/drivers/dri/radeon/radeon_chipset.h
+++ b/src/mesa/drivers/dri/radeon/radeon_chipset.h
@@ -340,6 +340,7 @@
 #define PCI_CHIP_RS880_9712             0x9712
 #define PCI_CHIP_RS880_9713             0x9713
 #define PCI_CHIP_RS880_9714             0x9714
+#define PCI_CHIP_RS880_9715             0x9715
 
 #define PCI_CHIP_RV770_9440             0x9440
 #define PCI_CHIP_RV770_9441             0x9441
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 631f729048..6415ec1239 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -826,6 +826,7 @@ static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
    case PCI_CHIP_RS880_9712:
    case PCI_CHIP_RS880_9713:
    case PCI_CHIP_RS880_9714:
+   case PCI_CHIP_RS880_9715:
       screen->chip_family = CHIP_FAMILY_RS880;
       screen->chip_flags = RADEON_CHIPSET_TCL;
       break;
-- 
cgit v1.2.3


From bb8c3b1bcc81fd5addc5e214f3efcfdca50c6806 Mon Sep 17 00:00:00 2001
From: Ian Romanick <ian.d.romanick@intel.com>
Date: Wed, 24 Feb 2010 19:12:30 -0800
Subject: mesa: Remove ClearIndex and IndexMask from device-driver interface

These are used to inform the driver of the clear value for color-index
buffers and to control write-masking of bits in color-index buffers.
No driver use or need (not even Nouveau) these interfaces.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
---
 src/mesa/drivers/common/driverfuncs.c              |  2 --
 src/mesa/drivers/dri/mach64/mach64_state.c         |  2 --
 src/mesa/drivers/dri/mga/mgastate.c                |  3 --
 src/mesa/drivers/dri/nouveau/nouveau_state.c       |  7 -----
 src/mesa/drivers/dri/r128/r128_state.c             |  2 --
 src/mesa/drivers/dri/r200/r200_state.c             |  2 --
 src/mesa/drivers/dri/radeon/radeon_state.c         |  2 --
 .../windows/gldirect/mesasw/gld_wgl_mesasw.c       | 16 ----------
 src/mesa/drivers/x11/xm_dd.c                       | 34 ----------------------
 src/mesa/main/blend.c                              |  3 --
 src/mesa/main/dd.h                                 |  4 ---
 11 files changed, 77 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/common/driverfuncs.c b/src/mesa/drivers/common/driverfuncs.c
index 87163e6505..ebfaa2f07b 100644
--- a/src/mesa/drivers/common/driverfuncs.c
+++ b/src/mesa/drivers/common/driverfuncs.c
@@ -142,7 +142,6 @@ _mesa_init_driver_functions(struct dd_function_table *driver)
    driver->BlendFuncSeparate = NULL;
    driver->ClearColor = NULL;
    driver->ClearDepth = NULL;
-   driver->ClearIndex = NULL;
    driver->ClearStencil = NULL;
    driver->ClipPlane = NULL;
    driver->ColorMask = NULL;
@@ -157,7 +156,6 @@ _mesa_init_driver_functions(struct dd_function_table *driver)
    driver->Enable = NULL;
    driver->Fogfv = NULL;
    driver->Hint = NULL;
-   driver->IndexMask = NULL;
    driver->Lightfv = NULL;
    driver->LightModelfv = NULL;
    driver->LineStipple = NULL;
diff --git a/src/mesa/drivers/dri/mach64/mach64_state.c b/src/mesa/drivers/dri/mach64/mach64_state.c
index b9093b5a13..69a5aea02c 100644
--- a/src/mesa/drivers/dri/mach64/mach64_state.c
+++ b/src/mesa/drivers/dri/mach64/mach64_state.c
@@ -1156,12 +1156,10 @@ void mach64DDInitStateFuncs( GLcontext *ctx )
 {
    ctx->Driver.UpdateState		= mach64DDInvalidateState;
 
-   ctx->Driver.ClearIndex		= NULL;
    ctx->Driver.ClearColor		= mach64DDClearColor;
    ctx->Driver.DrawBuffer		= mach64DDDrawBuffer;
    ctx->Driver.ReadBuffer		= mach64DDReadBuffer;
 
-   ctx->Driver.IndexMask		= NULL;
    ctx->Driver.ColorMask		= mach64DDColorMask;
    ctx->Driver.AlphaFunc		= mach64DDAlphaFunc;
    ctx->Driver.BlendEquationSeparate	= mach64DDBlendEquationSeparate;
diff --git a/src/mesa/drivers/dri/mga/mgastate.c b/src/mesa/drivers/dri/mga/mgastate.c
index 0253044761..745d5e9852 100644
--- a/src/mesa/drivers/dri/mga/mgastate.c
+++ b/src/mesa/drivers/dri/mga/mgastate.c
@@ -1193,8 +1193,5 @@ void mgaDDInitStateFuncs( GLcontext *ctx )
    ctx->Driver.Viewport = mgaViewport;
    ctx->Driver.RenderMode = mgaRenderMode;
 
-   ctx->Driver.ClearIndex = 0;
-   ctx->Driver.IndexMask = 0;
-
    TNL_CONTEXT(ctx)->Driver.RunPipeline = mgaRunPipeline;
 }
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_state.c b/src/mesa/drivers/dri/nouveau/nouveau_state.c
index 5d593ed4dd..e1871db0eb 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_state.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_state.c
@@ -242,12 +242,6 @@ nouveau_fog(GLcontext *ctx, GLenum pname, const GLfloat *params)
 	context_dirty(ctx, FOG);
 }
 
-static void
-nouveau_index_mask(GLcontext *ctx, GLuint mask)
-{
-	context_dirty(ctx, INDEX_MASK);
-}
-
 static void
 nouveau_light(GLcontext *ctx, GLenum light, GLenum pname, const GLfloat *params)
 {
@@ -504,7 +498,6 @@ nouveau_state_init(GLcontext *ctx)
 	ctx->Driver.DrawBuffers = nouveau_draw_buffers;
 	ctx->Driver.Enable = nouveau_enable;
 	ctx->Driver.Fogfv = nouveau_fog;
-	ctx->Driver.IndexMask = nouveau_index_mask;
 	ctx->Driver.Lightfv = nouveau_light;
 	ctx->Driver.LightModelfv = nouveau_light_model;
 	ctx->Driver.LineStipple = nouveau_line_stipple;
diff --git a/src/mesa/drivers/dri/r128/r128_state.c b/src/mesa/drivers/dri/r128/r128_state.c
index 42f6dd7388..4d773feaaa 100644
--- a/src/mesa/drivers/dri/r128/r128_state.c
+++ b/src/mesa/drivers/dri/r128/r128_state.c
@@ -1407,13 +1407,11 @@ void r128DDInitStateFuncs( GLcontext *ctx )
 {
    ctx->Driver.UpdateState		= r128DDInvalidateState;
 
-   ctx->Driver.ClearIndex		= NULL;
    ctx->Driver.ClearColor		= r128DDClearColor;
    ctx->Driver.ClearStencil		= r128DDClearStencil;
    ctx->Driver.DrawBuffer		= r128DDDrawBuffer;
    ctx->Driver.ReadBuffer		= r128DDReadBuffer;
 
-   ctx->Driver.IndexMask		= NULL;
    ctx->Driver.ColorMask		= r128DDColorMask;
    ctx->Driver.AlphaFunc		= r128DDAlphaFunc;
    ctx->Driver.BlendEquationSeparate	= r128DDBlendEquationSeparate;
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index b9ec6f428f..050e5aa877 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -2501,7 +2501,6 @@ void r200InitStateFuncs( struct dd_function_table *functions )
    functions->BlendFuncSeparate		= r200BlendFuncSeparate;
    functions->ClearColor		= r200ClearColor;
    functions->ClearDepth		= r200ClearDepth;
-   functions->ClearIndex		= NULL;
    functions->ClearStencil		= r200ClearStencil;
    functions->ClipPlane			= r200ClipPlane;
    functions->ColorMask			= r200ColorMask;
@@ -2513,7 +2512,6 @@ void r200InitStateFuncs( struct dd_function_table *functions )
    functions->Fogfv			= r200Fogfv;
    functions->FrontFace			= r200FrontFace;
    functions->Hint			= NULL;
-   functions->IndexMask			= NULL;
    functions->LightModelfv		= r200LightModelfv;
    functions->Lightfv			= r200Lightfv;
    functions->LineStipple		= r200LineStipple;
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 7db745a180..0ce97e8697 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -2254,7 +2254,6 @@ void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 )
    ctx->Driver.BlendFuncSeparate	= radeonBlendFuncSeparate;
    ctx->Driver.ClearColor		= radeonClearColor;
    ctx->Driver.ClearDepth		= radeonClearDepth;
-   ctx->Driver.ClearIndex		= NULL;
    ctx->Driver.ClearStencil		= radeonClearStencil;
    ctx->Driver.ClipPlane		= radeonClipPlane;
    ctx->Driver.ColorMask		= radeonColorMask;
@@ -2266,7 +2265,6 @@ void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 )
    ctx->Driver.Fogfv			= radeonFogfv;
    ctx->Driver.FrontFace		= radeonFrontFace;
    ctx->Driver.Hint			= NULL;
-   ctx->Driver.IndexMask		= NULL;
    ctx->Driver.LightModelfv		= radeonLightModelfv;
    ctx->Driver.Lightfv			= radeonLightfv;
    ctx->Driver.LineStipple              = radeonLineStipple;
diff --git a/src/mesa/drivers/windows/gldirect/mesasw/gld_wgl_mesasw.c b/src/mesa/drivers/windows/gldirect/mesasw/gld_wgl_mesasw.c
index 7ac425a109..f927abfa11 100644
--- a/src/mesa/drivers/windows/gldirect/mesasw/gld_wgl_mesasw.c
+++ b/src/mesa/drivers/windows/gldirect/mesasw/gld_wgl_mesasw.c
@@ -629,21 +629,6 @@ static void flush(GLcontext* ctx)
 }
 
 
-//---------------------------------------------------------------------------
-
-
-/*
- * Set the color index used to clear the color buffer.
- */
-static void clear_index(GLcontext* ctx, GLuint index)
-{
-	GLD_context *gldCtx = GLD_GET_CONTEXT(ctx);
-	WMesaContext *Current = GLD_GET_WMESA_DRIVER(gldCtx);
-  Current->clearpixel = index;
-}
-
-
-
 //---------------------------------------------------------------------------
 
 /*
@@ -1367,7 +1352,6 @@ static void wmesa_update_state_first_time(
 	ctx->Driver.Clear					= clear;
 	
 	ctx->Driver.Flush					= flush;
-	ctx->Driver.ClearIndex				= clear_index;
 	ctx->Driver.ClearColor				= clear_color;
 	ctx->Driver.Enable					= enable;
 	
diff --git a/src/mesa/drivers/x11/xm_dd.c b/src/mesa/drivers/x11/xm_dd.c
index d304192f4c..5edafb890b 100644
--- a/src/mesa/drivers/x11/xm_dd.c
+++ b/src/mesa/drivers/x11/xm_dd.c
@@ -106,18 +106,6 @@ finish_or_flush( GLcontext *ctx )
 }
 
 
-static void
-clear_index( GLcontext *ctx, GLuint index )
-{
-   if (ctx->DrawBuffer->Name == 0) {
-      const XMesaContext xmesa = XMESA_CONTEXT(ctx);
-      XMesaBuffer xmbuf = XMESA_BUFFER(ctx->DrawBuffer);
-      xmesa->clearpixel = (unsigned long) index;
-      XMesaSetForeground( xmesa->display, xmbuf->cleargc, (unsigned long) index );
-   }
-}
-
-
 static void
 clear_color( GLcontext *ctx, const GLfloat color[4] )
 {
@@ -144,26 +132,6 @@ clear_color( GLcontext *ctx, const GLfloat color[4] )
 
 
 
-/* Set index mask ala glIndexMask */
-static void
-index_mask( GLcontext *ctx, GLuint mask )
-{
-   const XMesaContext xmesa = XMESA_CONTEXT(ctx);
-   XMesaBuffer xmbuf = XMESA_BUFFER(ctx->DrawBuffer);
-   /* not sure this conditional is really needed */
-   if (xmbuf->backxrb && xmbuf->backxrb->pixmap) {
-      unsigned long m;
-      if (mask==0xffffffff) {
-	 m = ((unsigned long)~0L);
-      }
-      else {
-         m = (unsigned long) mask;
-      }
-      XMesaSetPlaneMask( xmesa->display, xmbuf->cleargc, m );
-   }
-}
-
-
 /* Implements glColorMask() */
 static void
 color_mask(GLcontext *ctx,
@@ -1143,9 +1111,7 @@ xmesa_init_driver_functions( XMesaVisual xmvisual,
    driver->GetBufferSize = NULL; /* OBSOLETE */
    driver->Flush = finish_or_flush;
    driver->Finish = finish_or_flush;
-   driver->ClearIndex = clear_index;
    driver->ClearColor = clear_color;
-   driver->IndexMask = index_mask;
    driver->ColorMask = color_mask;
    driver->Enable = enable;
    driver->Viewport = xmesa_viewport;
diff --git a/src/mesa/main/blend.c b/src/mesa/main/blend.c
index de60031cc8..d022770f24 100644
--- a/src/mesa/main/blend.c
+++ b/src/mesa/main/blend.c
@@ -456,9 +456,6 @@ _mesa_IndexMask( GLuint mask )
 
    FLUSH_VERTICES(ctx, _NEW_COLOR);
    ctx->Color.IndexMask = mask;
-
-   if (ctx->Driver.IndexMask)
-      ctx->Driver.IndexMask( ctx, mask );
 }
 #endif
 
diff --git a/src/mesa/main/dd.h b/src/mesa/main/dd.h
index 079e44bb95..84b83fe273 100644
--- a/src/mesa/main/dd.h
+++ b/src/mesa/main/dd.h
@@ -620,8 +620,6 @@ struct dd_function_table {
    void (*ClearColor)(GLcontext *ctx, const GLfloat color[4]);
    /** Specify the clear value for the depth buffer */
    void (*ClearDepth)(GLcontext *ctx, GLclampd d);
-   /** Specify the clear value for the color index buffers */
-   void (*ClearIndex)(GLcontext *ctx, GLuint index);
    /** Specify the clear value for the stencil buffer */
    void (*ClearStencil)(GLcontext *ctx, GLint s);
    /** Specify a plane against which all geometry is clipped */
@@ -653,8 +651,6 @@ struct dd_function_table {
    void (*Fogfv)(GLcontext *ctx, GLenum pname, const GLfloat *params);
    /** Specify implementation-specific hints */
    void (*Hint)(GLcontext *ctx, GLenum target, GLenum mode);
-   /** Control the writing of individual bits in the color index buffers */
-   void (*IndexMask)(GLcontext *ctx, GLuint mask);
    /** Set light source parameters.
     * Note: for GL_POSITION and GL_SPOT_DIRECTION, params will have already
     * been transformed to eye-space.
-- 
cgit v1.2.3


From 0384214923216b4bb7340070d08fcda2cbb79a93 Mon Sep 17 00:00:00 2001
From: Ian Romanick <ian.d.romanick@intel.com>
Date: Fri, 26 Feb 2010 17:58:53 -0800
Subject: Remove stray defines of HAVE_RGBA

Now that color-index support is removed from t_dd_tritmp.h and
t_dd_unfilled.h, drivers no longer need define HAVE_RGBA.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
---
 src/mesa/drivers/dri/i810/i810tris.c       | 1 -
 src/mesa/drivers/dri/i915/intel_tris.c     | 1 -
 src/mesa/drivers/dri/mach64/mach64_tris.c  | 1 -
 src/mesa/drivers/dri/mga/mgatris.c         | 1 -
 src/mesa/drivers/dri/r128/r128_tris.c      | 1 -
 src/mesa/drivers/dri/r200/r200_swtcl.c     | 1 -
 src/mesa/drivers/dri/r300/r300_swtcl.c     | 1 -
 src/mesa/drivers/dri/radeon/radeon_swtcl.c | 1 -
 src/mesa/drivers/dri/savage/savagetris.c   | 1 -
 src/mesa/drivers/dri/sis/sis_tris.c        | 1 -
 src/mesa/drivers/dri/tdfx/tdfx_tris.c      | 1 -
 src/mesa/drivers/dri/unichrome/via_tris.c  | 1 -
 12 files changed, 12 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/i810/i810tris.c b/src/mesa/drivers/dri/i810/i810tris.c
index 213ba541ce..1492f711c9 100644
--- a/src/mesa/drivers/dri/i810/i810tris.c
+++ b/src/mesa/drivers/dri/i810/i810tris.c
@@ -218,7 +218,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA         1
 #define HAVE_SPEC         1
 #define HAVE_BACK_COLORS  0
 #define HAVE_HW_FLATSHADE 1
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index e63cd97db6..fb191fe346 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -603,7 +603,6 @@ static struct
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA         1
 #define HAVE_SPEC         1
 #define HAVE_BACK_COLORS  0
 #define HAVE_HW_FLATSHADE 1
diff --git a/src/mesa/drivers/dri/mach64/mach64_tris.c b/src/mesa/drivers/dri/mach64/mach64_tris.c
index c2a0adfef0..a81d21afff 100644
--- a/src/mesa/drivers/dri/mach64/mach64_tris.c
+++ b/src/mesa/drivers/dri/mach64/mach64_tris.c
@@ -1248,7 +1248,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA   1
 #define HAVE_SPEC   1
 #define HAVE_BACK_COLORS  0
 #define HAVE_HW_FLATSHADE 1
diff --git a/src/mesa/drivers/dri/mga/mgatris.c b/src/mesa/drivers/dri/mga/mgatris.c
index 4c58c3bdb0..07cf682f6e 100644
--- a/src/mesa/drivers/dri/mga/mgatris.c
+++ b/src/mesa/drivers/dri/mga/mgatris.c
@@ -347,7 +347,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA         1
 #define HAVE_BACK_COLORS  0
 #define HAVE_SPEC         1
 #define HAVE_HW_FLATSHADE 0
diff --git a/src/mesa/drivers/dri/r128/r128_tris.c b/src/mesa/drivers/dri/r128/r128_tris.c
index 86d4717b05..9ea2a9d162 100644
--- a/src/mesa/drivers/dri/r128/r128_tris.c
+++ b/src/mesa/drivers/dri/r128/r128_tris.c
@@ -158,7 +158,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA   1
 #define HAVE_SPEC   1
 #define HAVE_BACK_COLORS  0
 #define HAVE_HW_FLATSHADE 1
diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c
index e220e40b01..262fe3cdde 100644
--- a/src/mesa/drivers/dri/r200/r200_swtcl.c
+++ b/src/mesa/drivers/dri/r200/r200_swtcl.c
@@ -420,7 +420,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA   1
 #define HAVE_SPEC   1
 #define HAVE_BACK_COLORS  0
 #define HAVE_HW_FLATSHADE 1
diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.c b/src/mesa/drivers/dri/r300/r300_swtcl.c
index 93983cee20..4dcc7cb022 100644
--- a/src/mesa/drivers/dri/r300/r300_swtcl.c
+++ b/src/mesa/drivers/dri/r300/r300_swtcl.c
@@ -364,7 +364,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA   1
 #define HAVE_SPEC   1
 #define HAVE_BACK_COLORS  0
 #define HAVE_HW_FLATSHADE 1
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index 5a71b510fa..f2fcb46688 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -524,7 +524,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA   1
 #define HAVE_SPEC   1
 #define HAVE_BACK_COLORS  0
 #define HAVE_HW_FLATSHADE 1
diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c
index a177a7d2b6..0050485e31 100644
--- a/src/mesa/drivers/dri/savage/savagetris.c
+++ b/src/mesa/drivers/dri/savage/savagetris.c
@@ -387,7 +387,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA   1
 #define HAVE_SPEC   1
 #define HAVE_BACK_COLORS  0
 #define HAVE_HW_FLATSHADE 1
diff --git a/src/mesa/drivers/dri/sis/sis_tris.c b/src/mesa/drivers/dri/sis/sis_tris.c
index e7471f9789..d109a8c41e 100644
--- a/src/mesa/drivers/dri/sis/sis_tris.c
+++ b/src/mesa/drivers/dri/sis/sis_tris.c
@@ -375,7 +375,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA   1
 #define HAVE_SPEC   1
 #define HAVE_BACK_COLORS  0
 #define HAVE_HW_FLATSHADE 1
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_tris.c b/src/mesa/drivers/dri/tdfx/tdfx_tris.c
index 8824988895..d65833c20b 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_tris.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_tris.c
@@ -320,7 +320,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA   1
 #define HAVE_SPEC   0
 #define HAVE_HW_FLATSHADE 0
 #define HAVE_BACK_COLORS  0
diff --git a/src/mesa/drivers/dri/unichrome/via_tris.c b/src/mesa/drivers/dri/unichrome/via_tris.c
index 01359d51ea..be3c9a770f 100644
--- a/src/mesa/drivers/dri/unichrome/via_tris.c
+++ b/src/mesa/drivers/dri/unichrome/via_tris.c
@@ -257,7 +257,6 @@ static struct {
 #define DO_POINTS    1
 #define DO_FULL_QUAD 1
 
-#define HAVE_RGBA         1
 #define HAVE_SPEC         1
 #define HAVE_BACK_COLORS  0
 #define HAVE_HW_FLATSHADE 1
-- 
cgit v1.2.3


From 3594bf233d16ceb21e97fcdfb57ea45cb0c5e41b Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Wed, 3 Mar 2010 16:12:22 -0500
Subject: radeon/r200/r300/r600: add check_blit vtbl function

Check if the native blit formats are supported, if not,
attempt to use an alternate format.

Skip 3, >4 bpp as per comments from mcencora on irc.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
---
 src/mesa/drivers/dri/r200/r200_blit.c              |  4 +-
 src/mesa/drivers/dri/r200/r200_blit.h              |  2 +
 src/mesa/drivers/dri/r200/r200_context.c           |  1 +
 src/mesa/drivers/dri/r300/r300_blit.c              |  4 +-
 src/mesa/drivers/dri/r300/r300_blit.h              |  4 +-
 src/mesa/drivers/dri/r300/r300_context.c           |  3 +-
 src/mesa/drivers/dri/r600/r600_blit.c              |  4 +-
 src/mesa/drivers/dri/r600/r600_blit.h              | 33 ++++++++++++++++
 src/mesa/drivers/dri/r600/r600_context.c           |  1 +
 src/mesa/drivers/dri/radeon/radeon_blit.c          |  4 +-
 src/mesa/drivers/dri/radeon/radeon_blit.h          |  2 +
 .../drivers/dri/radeon/radeon_common_context.h     |  1 +
 src/mesa/drivers/dri/radeon/radeon_context.c       |  1 +
 src/mesa/drivers/dri/radeon/radeon_tex_copy.c      | 44 +++++++++++++++++++---
 14 files changed, 93 insertions(+), 15 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c
index 56b08a21bd..b56327dad5 100644
--- a/src/mesa/drivers/dri/r200/r200_blit.c
+++ b/src/mesa/drivers/dri/r200/r200_blit.c
@@ -38,7 +38,7 @@ static inline uint32_t cmdpacket0(struct radeon_screen *rscrn,
 }
 
 /* common formats supported as both textures and render targets */
-static unsigned is_blit_supported(gl_format mesa_format)
+unsigned r200_check_blit(gl_format mesa_format)
 {
     /* XXX others?  BE/LE? */
     switch (mesa_format) {
@@ -337,7 +337,7 @@ unsigned r200_blit(GLcontext *ctx,
 {
     struct r200_context *r200 = R200_CONTEXT(ctx);
 
-    if (!is_blit_supported(dst_mesaformat))
+    if (!r200_check_blit(dst_mesaformat))
         return GL_FALSE;
 
     /* Make sure that colorbuffer has even width - hw limitation */
diff --git a/src/mesa/drivers/dri/r200/r200_blit.h b/src/mesa/drivers/dri/r200/r200_blit.h
index 38487266ae..53206f0b47 100644
--- a/src/mesa/drivers/dri/r200/r200_blit.h
+++ b/src/mesa/drivers/dri/r200/r200_blit.h
@@ -30,6 +30,8 @@
 
 void r200_blit_init(struct r200_context *r200);
 
+unsigned r200_check_blit(gl_format mesa_format);
+
 unsigned r200_blit(GLcontext *ctx,
                    struct radeon_bo *src_bo,
                    intptr_t src_offset,
diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index 6ecd46ecd9..dad2580e08 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -264,6 +264,7 @@ static void r200_init_vtbl(radeonContextPtr radeon)
    radeon->vtbl.fallback = r200Fallback;
    radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
    radeon->vtbl.emit_query_finish = r200_emit_query_finish;
+   radeon->vtbl.check_blit = r200_check_blit;
    radeon->vtbl.blit = r200_blit;
 }
 
diff --git a/src/mesa/drivers/dri/r300/r300_blit.c b/src/mesa/drivers/dri/r300/r300_blit.c
index 35fd06734f..9637a9b7ad 100644
--- a/src/mesa/drivers/dri/r300/r300_blit.c
+++ b/src/mesa/drivers/dri/r300/r300_blit.c
@@ -498,7 +498,7 @@ static void emit_cb_setup(struct r300_context *r300,
     END_BATCH();
 }
 
-static unsigned is_blit_supported(gl_format dst_format)
+unsigned r300_check_blit(gl_format dst_format)
 {
     switch (dst_format) {
         case MESA_FORMAT_RGB565:
@@ -566,7 +566,7 @@ unsigned r300_blit(GLcontext *ctx,
 {
     r300ContextPtr r300 = R300_CONTEXT(ctx);
 
-    if (!is_blit_supported(dst_mesaformat))
+    if (!r300_check_blit(dst_mesaformat))
         return 0;
 
     /* Make sure that colorbuffer has even width - hw limitation */
diff --git a/src/mesa/drivers/dri/r300/r300_blit.h b/src/mesa/drivers/dri/r300/r300_blit.h
index 735acaddd7..39b157a57b 100644
--- a/src/mesa/drivers/dri/r300/r300_blit.h
+++ b/src/mesa/drivers/dri/r300/r300_blit.h
@@ -30,6 +30,8 @@
 
 void r300_blit_init(struct r300_context *r300);
 
+unsigned r300_check_blit(gl_format mesa_format);
+
 unsigned r300_blit(GLcontext *ctx,
                    struct radeon_bo *src_bo,
                    intptr_t src_offset,
@@ -51,4 +53,4 @@ unsigned r300_blit(GLcontext *ctx,
                    unsigned reg_height,
                    unsigned flip_y);
 
-#endif // R300_BLIT_H
\ No newline at end of file
+#endif // R300_BLIT_H
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index fe2ed22dc2..df4cc11da4 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -320,7 +320,8 @@ static void r300_init_vtbl(radeonContextPtr radeon)
 	} else
 		radeon->vtbl.emit_query_finish = r300_emit_query_finish;
 
-    radeon->vtbl.blit = r300_blit;
+	radeon->vtbl.check_blit = r300_check_blit;
+	radeon->vtbl.blit = r300_blit;
 }
 
 static void r300InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c
index 8eafd42e8f..9d17463cae 100644
--- a/src/mesa/drivers/dri/r600/r600_blit.c
+++ b/src/mesa/drivers/dri/r600/r600_blit.c
@@ -33,7 +33,7 @@
 #include "r600_cmdbuf.h"
 
 /* common formats supported as both textures and render targets */
-static unsigned is_blit_supported(gl_format mesa_format)
+unsigned r600_check_blit(gl_format mesa_format)
 {
     switch (mesa_format) {
     case MESA_FORMAT_RGBA8888:
@@ -1582,7 +1582,7 @@ unsigned r600_blit(GLcontext *ctx,
     context_t *context = R700_CONTEXT(ctx);
     int id = 0;
 
-    if (!is_blit_supported(dst_mesaformat))
+    if (!r600_check_blit(dst_mesaformat))
         return GL_FALSE;
 
     if (src_bo == dst_bo) {
diff --git a/src/mesa/drivers/dri/r600/r600_blit.h b/src/mesa/drivers/dri/r600/r600_blit.h
index f280e23489..d56b21ba9b 100644
--- a/src/mesa/drivers/dri/r600/r600_blit.h
+++ b/src/mesa/drivers/dri/r600/r600_blit.h
@@ -1,3 +1,35 @@
+/*
+ * Copyright (C) 2009 Advanced Micro Devices, Inc.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef R600_BLIT_H
+#define R600_BLIT_H
+
+unsigned r600_check_blit(gl_format mesa_format);
+
 unsigned r600_blit(GLcontext *ctx,
                    struct radeon_bo *src_bo,
                    intptr_t src_offset,
@@ -19,3 +51,4 @@ unsigned r600_blit(GLcontext *ctx,
                    unsigned h,
                    unsigned flip_y);
 
+#endif // R600_BLIT_H
diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c
index 1a4b014d9f..3d6802e735 100644
--- a/src/mesa/drivers/dri/r600/r600_context.c
+++ b/src/mesa/drivers/dri/r600/r600_context.c
@@ -236,6 +236,7 @@ static void r600_init_vtbl(radeonContextPtr radeon)
 	radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
 	radeon->vtbl.fallback = r600_fallback;
 	radeon->vtbl.emit_query_finish = r600_emit_query_finish;
+	radeon->vtbl.check_blit = r600_check_blit;
 	radeon->vtbl.blit = r600_blit;
 }
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index 34b9af4063..e188a122d5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -38,7 +38,7 @@ static inline uint32_t cmdpacket0(struct radeon_screen *rscrn,
 }
 
 /* common formats supported as both textures and render targets */
-static unsigned is_blit_supported(gl_format mesa_format)
+unsigned r100_check_blit(gl_format mesa_format)
 {
     /* XXX others?  BE/LE? */
     switch (mesa_format) {
@@ -333,7 +333,7 @@ unsigned r100_blit(GLcontext *ctx,
 {
     struct r100_context *r100 = R100_CONTEXT(ctx);
 
-    if (!is_blit_supported(dst_mesaformat))
+    if (!r100_check_blit(dst_mesaformat))
         return GL_FALSE;
 
     /* Make sure that colorbuffer has even width - hw limitation */
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.h b/src/mesa/drivers/dri/radeon/radeon_blit.h
index d36366ff79..d7d0b5554a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.h
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.h
@@ -30,6 +30,8 @@
 
 void r100_blit_init(struct r100_context *r100);
 
+unsigned r100_check_blit(gl_format mesa_format);
+
 unsigned r100_blit(GLcontext *ctx,
                    struct radeon_bo *src_bo,
                    intptr_t src_offset,
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index e397ee8c22..d1a24e265f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -518,6 +518,7 @@ struct radeon_context {
 	   void (*free_context)(GLcontext *ctx);
 	   void (*emit_query_finish)(radeonContextPtr radeon);
 	   void (*update_scissor)(GLcontext *ctx);
+	   unsigned (*check_blit)(gl_format mesa_format);
 	   unsigned (*blit)(GLcontext *ctx,
                         struct radeon_bo *src_bo,
                         intptr_t src_offset,
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c
index 4625af14ad..878a453bd5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -198,6 +198,7 @@ static void r100_init_vtbl(radeonContextPtr radeon)
    radeon->vtbl.fallback = radeonFallback;
    radeon->vtbl.free_context = r100_vtbl_free_context;
    radeon->vtbl.emit_query_finish = r100_emit_query_finish;
+   radeon->vtbl.check_blit = r100_check_blit;
    radeon->vtbl.blit = r100_blit;
 }
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index 18cf182e54..89fe9915a7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -46,6 +46,12 @@ do_copy_texsubimage(GLcontext *ctx,
 {
     radeonContextPtr radeon = RADEON_CONTEXT(ctx);
     struct radeon_renderbuffer *rrb;
+    unsigned src_bpp;
+    unsigned dst_bpp;
+    gl_format src_mesaformat;
+    gl_format dst_mesaformat;
+    unsigned src_width;
+    unsigned dst_width;
 
     if (_mesa_get_format_bits(timg->base.TexFormat, GL_DEPTH_BITS) > 0) {
         rrb = radeon_get_depthbuffer(radeon);
@@ -76,12 +82,40 @@ do_copy_texsubimage(GLcontext *ctx,
 
     }
 
+    src_mesaformat = rrb->base.Format;
+    dst_mesaformat = timg->base.TexFormat;
+    src_width = rrb->base.Width;
+    dst_width = timg->base.Width;
+    src_bpp = _mesa_get_format_bytes(src_mesaformat);
+    dst_bpp = _mesa_get_format_bytes(dst_mesaformat);
+    if (!radeon->vtbl.check_blit(dst_mesaformat)) {
+	    if (src_bpp != dst_bpp)
+		    return GL_FALSE;
+
+	    switch (dst_bpp) {
+	    case 2:
+		    src_mesaformat = MESA_FORMAT_RGB565;
+		    dst_mesaformat = MESA_FORMAT_RGB565;
+		    break;
+	    case 4:
+		    src_mesaformat = MESA_FORMAT_ARGB8888;
+		    dst_mesaformat = MESA_FORMAT_ARGB8888;
+		    break;
+	    case 1:
+		    src_mesaformat = MESA_FORMAT_A8;
+		    dst_mesaformat = MESA_FORMAT_A8;
+		    break;
+	    default:
+		    return GL_FALSE;
+	    }
+    }
+
     /* blit from src buffer to texture */
-    return radeon->vtbl.blit(ctx, rrb->bo, src_offset, rrb->base.Format, rrb->pitch/rrb->cpp,
-                             rrb->base.Width, rrb->base.Height, x, y,
-                             timg->mt->bo, dst_offset, timg->base.TexFormat,
-                             timg->mt->levels[level].rowstride / _mesa_get_format_bytes(timg->base.TexFormat),
-                             timg->base.Width, timg->base.Height,
+    return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp,
+                             src_width, rrb->base.Height, x, y,
+                             timg->mt->bo, dst_offset, dst_mesaformat,
+                             timg->mt->levels[level].rowstride / dst_bpp,
+                             dst_width, timg->base.Height,
                              dstx, dsty, width, height, 1);
 }
 
-- 
cgit v1.2.3


From 8953bfce0eb7e56f13d4527ef86cdf4cf2db037f Mon Sep 17 00:00:00 2001
From: George Sapountzis <gsapountzis@gmail.com>
Date: Sat, 6 Mar 2010 06:33:20 +0200
Subject: dri: drop MINIGLX_SOURCES

---
 src/mesa/drivers/dri/i810/Makefile      | 3 ---
 src/mesa/drivers/dri/i915/Makefile      | 2 --
 src/mesa/drivers/dri/i965/Makefile      | 1 -
 src/mesa/drivers/dri/mach64/Makefile    | 3 ---
 src/mesa/drivers/dri/mga/Makefile       | 2 --
 src/mesa/drivers/dri/nouveau/Makefile   | 2 --
 src/mesa/drivers/dri/r128/Makefile      | 2 --
 src/mesa/drivers/dri/r200/Makefile      | 2 --
 src/mesa/drivers/dri/r300/Makefile      | 2 --
 src/mesa/drivers/dri/r600/Makefile      | 2 --
 src/mesa/drivers/dri/radeon/Makefile    | 2 --
 src/mesa/drivers/dri/savage/Makefile    | 3 ---
 src/mesa/drivers/dri/sis/Makefile       | 4 ----
 src/mesa/drivers/dri/tdfx/Makefile      | 3 ---
 src/mesa/drivers/dri/unichrome/Makefile | 2 --
 15 files changed, 35 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/i810/Makefile b/src/mesa/drivers/dri/i810/Makefile
index 3874faee51..54a837d5ea 100644
--- a/src/mesa/drivers/dri/i810/Makefile
+++ b/src/mesa/drivers/dri/i810/Makefile
@@ -5,9 +5,6 @@ include $(TOP)/configs/current
 
 LIBNAME = i810_dri.so
 
-# Not yet
-# MINIGLX_SOURCES = server/i810_dri.c 
-
 DRIVER_SOURCES = \
 	i810context.c \
 	i810ioctl.c \
diff --git a/src/mesa/drivers/dri/i915/Makefile b/src/mesa/drivers/dri/i915/Makefile
index dc15ae425c..5b49d0c77c 100644
--- a/src/mesa/drivers/dri/i915/Makefile
+++ b/src/mesa/drivers/dri/i915/Makefile
@@ -4,8 +4,6 @@ include $(TOP)/configs/current
 
 LIBNAME = i915_dri.so
 
-MINIGLX_SOURCES = server/intel_dri.c
-
 DRIVER_SOURCES = \
 	i830_context.c \
 	i830_state.c \
diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile
index f98a1a27db..a242580273 100644
--- a/src/mesa/drivers/dri/i965/Makefile
+++ b/src/mesa/drivers/dri/i965/Makefile
@@ -99,7 +99,6 @@ DRIVER_SOURCES = \
 
 C_SOURCES = \
 	$(COMMON_SOURCES) \
-	$(MINIGLX_SOURCES) \
 	$(DRIVER_SOURCES)
 
 ASM_SOURCES = 
diff --git a/src/mesa/drivers/dri/mach64/Makefile b/src/mesa/drivers/dri/mach64/Makefile
index a8f463e9fd..c20fdece29 100644
--- a/src/mesa/drivers/dri/mach64/Makefile
+++ b/src/mesa/drivers/dri/mach64/Makefile
@@ -5,9 +5,6 @@ include $(TOP)/configs/current
 
 LIBNAME = mach64_dri.so
 
-# Not yet
-# MINIGLX_SOURCES = server/mach64_dri.c 
-
 DRIVER_SOURCES = \
 	mach64_context.c \
 	mach64_ioctl.c \
diff --git a/src/mesa/drivers/dri/mga/Makefile b/src/mesa/drivers/dri/mga/Makefile
index 0cc329fb22..92533bccc2 100644
--- a/src/mesa/drivers/dri/mga/Makefile
+++ b/src/mesa/drivers/dri/mga/Makefile
@@ -5,8 +5,6 @@ include $(TOP)/configs/current
 
 LIBNAME = mga_dri.so
 
-MINIGLX_SOURCES = server/mga_dri.c 
-
 DRIVER_SOURCES = \
 	mgadd.c \
 	mgaioctl.c \
diff --git a/src/mesa/drivers/dri/nouveau/Makefile b/src/mesa/drivers/dri/nouveau/Makefile
index 49e8933561..7be19b26fd 100644
--- a/src/mesa/drivers/dri/nouveau/Makefile
+++ b/src/mesa/drivers/dri/nouveau/Makefile
@@ -8,8 +8,6 @@ DRI_LIB_DEPS += $(shell pkg-config libdrm_nouveau --libs)
 
 LIBNAME = nouveau_vieux_dri.so
 
-MINIGLX_SOURCES =
-
 DRIVER_SOURCES = \
 	nouveau_screen.c \
 	nouveau_context.c \
diff --git a/src/mesa/drivers/dri/r128/Makefile b/src/mesa/drivers/dri/r128/Makefile
index 52c5a38a70..8144c9b43f 100644
--- a/src/mesa/drivers/dri/r128/Makefile
+++ b/src/mesa/drivers/dri/r128/Makefile
@@ -5,8 +5,6 @@ include $(TOP)/configs/current
 
 LIBNAME = r128_dri.so
 
-MINIGLX_SOURCES = server/r128_dri.c 
-
 DRIVER_SOURCES = \
 	r128_context.c \
 	r128_lock.c \
diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile
index 14eb96c1ba..2e86e8b941 100644
--- a/src/mesa/drivers/dri/r200/Makefile
+++ b/src/mesa/drivers/dri/r200/Makefile
@@ -7,8 +7,6 @@ CFLAGS += $(RADEON_CFLAGS)
 
 LIBNAME = r200_dri.so
 
-MINIGLX_SOURCES = server/radeon_dri.c 
-
 ifeq ($(RADEON_LDFLAGS),)
 CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c
 endif
diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile
index 04459c2ddf..08934fc996 100644
--- a/src/mesa/drivers/dri/r300/Makefile
+++ b/src/mesa/drivers/dri/r300/Makefile
@@ -7,8 +7,6 @@ CFLAGS += $(RADEON_CFLAGS)
 
 LIBNAME = r300_dri.so
 
-MINIGLX_SOURCES = server/radeon_dri.c
-
 ifeq ($(RADEON_LDFLAGS),)
 CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c
 endif
diff --git a/src/mesa/drivers/dri/r600/Makefile b/src/mesa/drivers/dri/r600/Makefile
index 5d50941539..2478b12658 100644
--- a/src/mesa/drivers/dri/r600/Makefile
+++ b/src/mesa/drivers/dri/r600/Makefile
@@ -7,8 +7,6 @@ CFLAGS += $(RADEON_CFLAGS)
 
 LIBNAME = r600_dri.so
 
-MINIGLX_SOURCES = server/radeon_dri.c
-
 ifeq ($(RADEON_LDFLAGS),)
 CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c
 endif
diff --git a/src/mesa/drivers/dri/radeon/Makefile b/src/mesa/drivers/dri/radeon/Makefile
index a54ea16ec6..fc6d1c8e89 100644
--- a/src/mesa/drivers/dri/radeon/Makefile
+++ b/src/mesa/drivers/dri/radeon/Makefile
@@ -8,8 +8,6 @@ CFLAGS += $(RADEON_CFLAGS)
 
 LIBNAME = radeon_dri.so
 
-MINIGLX_SOURCES = server/radeon_dri.c 
-
 ifeq ($(RADEON_LDFLAGS),)
 CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c
 endif
diff --git a/src/mesa/drivers/dri/savage/Makefile b/src/mesa/drivers/dri/savage/Makefile
index 2e5c40802c..53511552c6 100644
--- a/src/mesa/drivers/dri/savage/Makefile
+++ b/src/mesa/drivers/dri/savage/Makefile
@@ -5,9 +5,6 @@ include $(TOP)/configs/current
 
 LIBNAME = savage_dri.so
 
-# Doesn't exist yet.
-#MINIGLX_SOURCES = server/savage_dri.c 
-
 DRIVER_SOURCES = \
 	savage_xmesa.c \
 	savagedd.c \
diff --git a/src/mesa/drivers/dri/sis/Makefile b/src/mesa/drivers/dri/sis/Makefile
index ad009fc239..6b4f938bab 100644
--- a/src/mesa/drivers/dri/sis/Makefile
+++ b/src/mesa/drivers/dri/sis/Makefile
@@ -5,10 +5,6 @@ include $(TOP)/configs/current
 
 LIBNAME = sis_dri.so
 
-
-# Not yet
-# MINIGLX_SOURCES = server/sis_dri.c 
-
 DRIVER_SOURCES = \
 	sis6326_state.c \
 	sis6326_clear.c \
diff --git a/src/mesa/drivers/dri/tdfx/Makefile b/src/mesa/drivers/dri/tdfx/Makefile
index b9f25db4fe..96bd8f8202 100644
--- a/src/mesa/drivers/dri/tdfx/Makefile
+++ b/src/mesa/drivers/dri/tdfx/Makefile
@@ -5,9 +5,6 @@ include $(TOP)/configs/current
 
 LIBNAME = tdfx_dri.so
 
-# not yet
-# MINIGLX_SOURCES = server/tdfx_dri.c 
-
 DRIVER_SOURCES = \
 	tdfx_context.c \
 	tdfx_dd.c \
diff --git a/src/mesa/drivers/dri/unichrome/Makefile b/src/mesa/drivers/dri/unichrome/Makefile
index 344d34fce3..14cf9f3038 100644
--- a/src/mesa/drivers/dri/unichrome/Makefile
+++ b/src/mesa/drivers/dri/unichrome/Makefile
@@ -5,8 +5,6 @@ include $(TOP)/configs/current
 
 LIBNAME = unichrome_dri.so
 
-MINIGLX_SOURCES = server/via_dri.c 
-
 DRIVER_SOURCES = \
 	via_context.c \
 	via_fb.c \
-- 
cgit v1.2.3


From 419f0f9d0426bc1eb40ceb60e7764af4013947a0 Mon Sep 17 00:00:00 2001
From: George Sapountzis <gsapountzis@gmail.com>
Date: Sat, 6 Mar 2010 06:33:21 +0200
Subject: dri: drop MINIGLX_SOURCES (2)

---
 src/mesa/drivers/dri/i810/server/i810_dri.c     |  975 -----------------
 src/mesa/drivers/dri/i915/server/intel_dri.c    |    1 -
 src/mesa/drivers/dri/i965/server/intel_dri.c    |    1 -
 src/mesa/drivers/dri/intel/server/intel_dri.c   | 1306 ----------------------
 src/mesa/drivers/dri/mga/server/mga_dri.c       | 1088 ------------------
 src/mesa/drivers/dri/r128/server/r128_dri.c     | 1112 -------------------
 src/mesa/drivers/dri/r200/server/radeon_dri.c   |    1 -
 src/mesa/drivers/dri/r300/server/radeon_dri.c   |    1 -
 src/mesa/drivers/dri/r600/server/radeon_dri.c   |    1 -
 src/mesa/drivers/dri/radeon/server/radeon_dri.c | 1337 -----------------------
 src/mesa/drivers/dri/tdfx/server/tdfx_dri.c     |  471 --------
 src/mesa/drivers/dri/unichrome/server/via_dri.c | 1251 ---------------------
 12 files changed, 7545 deletions(-)
 delete mode 100644 src/mesa/drivers/dri/i810/server/i810_dri.c
 delete mode 120000 src/mesa/drivers/dri/i915/server/intel_dri.c
 delete mode 120000 src/mesa/drivers/dri/i965/server/intel_dri.c
 delete mode 100644 src/mesa/drivers/dri/intel/server/intel_dri.c
 delete mode 100644 src/mesa/drivers/dri/mga/server/mga_dri.c
 delete mode 100644 src/mesa/drivers/dri/r128/server/r128_dri.c
 delete mode 120000 src/mesa/drivers/dri/r200/server/radeon_dri.c
 delete mode 120000 src/mesa/drivers/dri/r300/server/radeon_dri.c
 delete mode 120000 src/mesa/drivers/dri/r600/server/radeon_dri.c
 delete mode 100644 src/mesa/drivers/dri/radeon/server/radeon_dri.c
 delete mode 100644 src/mesa/drivers/dri/tdfx/server/tdfx_dri.c
 delete mode 100644 src/mesa/drivers/dri/unichrome/server/via_dri.c

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/i810/server/i810_dri.c b/src/mesa/drivers/dri/i810/server/i810_dri.c
deleted file mode 100644
index f52797c5ed..0000000000
--- a/src/mesa/drivers/dri/i810/server/i810_dri.c
+++ /dev/null
@@ -1,975 +0,0 @@
-/**
- * \file server/i810_dri.c
- * \brief File to perform the device-specific initialization tasks typically
- * done in the X server.
- *
- * Here they are converted to run in the client (or perhaps a standalone
- * process), and to work with the frame buffer device rather than the X
- * server infrastructure.
- * 
- * Copyright (C) 2004 Dave Airlie (airlied@linux.ie)
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
-
-#include "driver.h"
-#include "drm.h"
-
-#include "i810.h"
-#include "i810_dri.h"
-#include "i810_reg.h"
-
-
-static int i810_pitches[] = {
-   512,
-   1024,
-   2048,
-   4096,
-   0
-};
-
-static int i810_pitch_flags[] = {
-   0x0,
-   0x1,
-   0x2,
-   0x3,
-   0
-};
-
-static unsigned int i810_drm_version = 0;
-
-static int
-I810AllocLow(I810MemRange * result, I810MemRange * pool, int size)
-{
-   if (size > pool->Size)
-      return 0;
-
-   pool->Size -= size;
-   result->Size = size;
-   result->Start = pool->Start;
-   result->End = pool->Start += size;
-
-   return 1;
-}
-
-static int
-I810AllocHigh(I810MemRange * result, I810MemRange * pool, int size)
-{
-   if (size > pool->Size)
-      return 0;
-
-   pool->Size -= size;
-   result->Size = size;
-   result->End = pool->End;
-   result->Start = pool->End -= size;
-
-   return 1;
-}
-
-
-/**
- * \brief Wait for free FIFO entries.
- *
- * \param ctx display handle.
- * \param entries number of free entries to wait.
- *
- * It polls the free entries from the chip until it reaches the requested value
- * or a timeout (3000 tries) occurs. Aborts the program if the FIFO times out.
- */
-static void I810WaitForFifo( const DRIDriverContext *ctx,
-			       int entries )
-{
-}
-
-/**
- * \brief Reset graphics card to known state.
- *
- * \param ctx display handle.
- *
- * Resets the values of several I810 registers.
- */
-static void I810EngineReset( const DRIDriverContext *ctx )
-{
-   unsigned char *I810MMIO = ctx->MMIOAddress;
-}
-
-/**
- * \brief Restore the drawing engine.
- *
- * \param ctx display handle
- *
- * Resets the graphics card and sets initial values for several registers of
- * the card's drawing engine.
- *
- * Turns on the i810 command processor engine (i.e., the ringbuffer).
- */
-static int I810EngineRestore( const DRIDriverContext *ctx )
-{
-   I810Ptr info = ctx->driverPrivate;
-   unsigned char *I810MMIO = ctx->MMIOAddress;
-
-   fprintf(stderr, "%s\n", __FUNCTION__);
-
-   return 1;
-}
-
-
-/**
- * \brief Shutdown the drawing engine.
- *
- * \param ctx display handle
- *
- * Turns off the command processor engine & restores the graphics card
- * to a state that fbdev understands.
- */
-static int I810EngineShutdown( const DRIDriverContext *ctx )
-{
-  drmI810Init info;
-  int ret;
-
-  memset(&info, 0, sizeof(drmI810Init));
-  info.func = I810_CLEANUP_DMA;
-  
-  ret = drmCommandWrite(ctx->drmFD, DRM_I810_INIT, &info, sizeof(drmI810Init));
-  if (ret>0)
-  {
-    fprintf(stderr,"[dri] I810 DMA Cleanup failed\n");
-    return -errno;
-  }
-  return 0;
-}
-
-/**
- * \brief Compute base 2 logarithm.
- *
- * \param val value.
- * 
- * \return base 2 logarithm of \p val.
- */
-static int I810MinBits(int val)
-{
-   int  bits;
-
-   if (!val) return 1;
-   for (bits = 0; val; val >>= 1, ++bits);
-   return bits;
-}
-
-static int I810DRIAgpPreInit( const DRIDriverContext *ctx, I810Ptr info)
-{
-
-  if (drmAgpAcquire(ctx->drmFD) < 0) {
-    fprintf(stderr, "[gart] AGP not available\n");
-    return 0;
-  }
-  
-  
-  if (drmAgpEnable(ctx->drmFD, 0) < 0) {
-    fprintf(stderr, "[gart] AGP not enabled\n");
-    drmAgpRelease(ctx->drmFD);
-    return 0;
-  }
-}
-
-/**
- * \brief Initialize the AGP state
- *
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return one on success, or zero on failure.
- * 
- * Acquires and enables the AGP device. Reserves memory in the AGP space for
- * the ring buffer, vertex buffers and textures. Initialize the I810
- * registers to point to that memory and add client mappings.
- */
-static int I810DRIAgpInit( const DRIDriverContext *ctx, I810Ptr info)
-{
-   unsigned char *I810MMIO = ctx->MMIOAddress;
-   int            ret;
-   int            s, l;
-   unsigned long dcacheHandle;
-   unsigned long agpHandle;
-   int pitch_idx = 0;
-   int back_size = 0;
-   int sysmem_size = 0;
-   int width = ctx->shared.virtualWidth * ctx->cpp;
-
-
-   info->backHandle = DRM_AGP_NO_HANDLE;
-   info->zHandle = DRM_AGP_NO_HANDLE;
-   info->sysmemHandle = DRM_AGP_NO_HANDLE;
-   info->dcacheHandle = DRM_AGP_NO_HANDLE;
-
-   memset(&info->DcacheMem, 0, sizeof(I810MemRange));
-   memset(&info->BackBuffer, 0, sizeof(I810MemRange));
-   memset(&info->DepthBuffer, 0, sizeof(I810MemRange));
-   
-   drmAgpAlloc(ctx->drmFD, 4096 * 1024, 1, NULL, &dcacheHandle);
-   info->dcacheHandle = dcacheHandle;
-   
-   fprintf(stderr, "[agp] dcacheHandle : 0x%x\n", dcacheHandle);
-
-#define Elements(x) sizeof(x)/sizeof(*x)
-   for (pitch_idx = 0; pitch_idx < Elements(i810_pitches); pitch_idx++)
-     if (width <= i810_pitches[pitch_idx])
-       break;
-   
-   if (pitch_idx == Elements(i810_pitches)) {
-     fprintf(stderr,"[dri] Couldn't find depth/back buffer pitch\n");
-     exit(-1);
-   }
-   else
-   {
-     int lines = (ctx->shared.virtualWidth + 15) / 16 * 16;
-     back_size = i810_pitches[pitch_idx] * lines;
-     back_size = ((back_size + 4096 - 1) / 4096) * 4096;
-   }
-
-   sysmem_size = ctx->shared.fbSize;
-   fprintf(stderr,"sysmem_size is %lu back_size is %lu\n", sysmem_size, back_size);
-   if (dcacheHandle != DRM_AGP_NO_HANDLE) {
-     if (back_size > 4 * 1024 * 1024) {
-       fprintf(stderr,"[dri] Backsize is larger then 4 meg\n");
-       sysmem_size = sysmem_size - 2 * back_size;
-       drmAgpFree(ctx->drmFD, dcacheHandle);
-       info->dcacheHandle = dcacheHandle = DRM_AGP_NO_HANDLE;
-     } else {
-       sysmem_size = sysmem_size - back_size;
-     }
-   } else {
-     sysmem_size = sysmem_size - 2 * back_size;
-   }
-   
-   info->SysMem.Start=0;
-   info->SysMem.Size = sysmem_size;
-   info->SysMem.End = sysmem_size;
-   
-   if (dcacheHandle != DRM_AGP_NO_HANDLE) {
-      if (drmAgpBind(ctx->drmFD, dcacheHandle, info->DepthOffset) == 0) {
-	memset(&info->DcacheMem, 0, sizeof(I810MemRange));
-	fprintf(stderr,"[agp] GART: Found 4096K Z buffer memory\n");
-	info->DcacheMem.Start = info->DepthOffset;
-	 info->DcacheMem.Size = 1024 * 4096;
-	 info->DcacheMem.End =  info->DcacheMem.Start + info->DcacheMem.Size;
-      } else {
-	fprintf(stderr, "[agp] GART: dcache bind failed\n");
-	drmAgpFree(ctx->drmFD, dcacheHandle);
-	info->dcacheHandle = dcacheHandle = DRM_AGP_NO_HANDLE;
-      }
-   } else {
-     fprintf(stderr, "[agp] GART: no dcache memory found\n");
-   }
-   
-   drmAgpAlloc(ctx->drmFD, back_size, 0, NULL, &agpHandle);
-   info->backHandle = agpHandle;
-
-   if (agpHandle != DRM_AGP_NO_HANDLE) {
-      if (drmAgpBind(ctx->drmFD, agpHandle, info->BackOffset) == 0) {
-	fprintf(stderr, "[agp] Bound backbuffer memory\n");
-
-	info->BackBuffer.Start = info->BackOffset;
-	info->BackBuffer.Size = back_size;
-	info->BackBuffer.End = (info->BackBuffer.Start +
-				 info->BackBuffer.Size);
-      } else {
-	fprintf(stderr,"[agp] Unable to bind backbuffer.  Disabling DRI.\n");
-	return 0;
-      }
-   } else {
-     fprintf(stderr, "[dri] Unable to allocate backbuffer memory.  Disabling DRI.\n");
-     return 0;
-   }
-
-   if (dcacheHandle == DRM_AGP_NO_HANDLE) {
-     drmAgpAlloc(ctx->drmFD, back_size, 0, NULL, &agpHandle);
-
-     info->zHandle = agpHandle;
-
-     if (agpHandle != DRM_AGP_NO_HANDLE) {
-       if (drmAgpBind(ctx->drmFD, agpHandle, info->DepthOffset) == 0) {
-	 fprintf(stderr,"[agp] Bound depthbuffer memory\n");
-	 info->DepthBuffer.Start = info->DepthOffset;
-	 info->DepthBuffer.Size = back_size;
-	 info->DepthBuffer.End = (info->DepthBuffer.Start +
-				   info->DepthBuffer.Size);
-       } else {
-	 fprintf(stderr,"[agp] Unable to bind depthbuffer.  Disabling DRI.\n");
-	 return 0;
-       }
-     } else {
-       fprintf(stderr,"[agp] Unable to allocate depthbuffer memory.  Disabling DRI.\n");
-       return 0;
-     }
-   }
-
-   /* Now allocate and bind the agp space.  This memory will include the
-    * regular framebuffer as well as texture memory.
-    */
-   drmAgpAlloc(ctx->drmFD, sysmem_size, 0, NULL, &agpHandle);
-   info->sysmemHandle = agpHandle;
-   
-   if (agpHandle != DRM_AGP_NO_HANDLE) {
-     if (drmAgpBind(ctx->drmFD, agpHandle, 0) == 0) {
-       fprintf(stderr, "[agp] Bound System Texture Memory\n");
-     } else {
-       fprintf(stderr, "[agp] Unable to bind system texture memory. Disabling DRI.\n");
-       return 0;
-     }
-   } else {
-     fprintf(stderr, "[agp] Unable to allocate system texture memory. Disabling DRI.\n");
-     return 0;
-   }
-   
-   info->auxPitch = i810_pitches[pitch_idx];
-   info->auxPitchBits = i810_pitch_flags[pitch_idx];
-   
-   return 1;
-}
-
-
-/**
- * \brief Initialize the kernel data structures and enable the CP engine.
- *
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return non-zero on success, or zero on failure.
- *
- * This function is a wrapper around the DRM_I810_CP_INIT command, passing
- * all the parameters in a drmI810Init structure.
- */
-static int I810DRIKernelInit( const DRIDriverContext *ctx,
-			       I810Ptr info)
-{
-   int cpp = ctx->bpp / 8;
-   drmI810Init  drmInfo;
-   int ret;
-   I810RingBuffer *ring = &(info->LpRing);
-
-   /* This is the struct passed to the kernel module for its initialization */
-   memset(&drmInfo, 0, sizeof(drmI810Init));
-   
-   /* make sure we have at least 1.4 */
-   drmInfo.func             = I810_INIT_DMA_1_4;
-
-   drmInfo.ring_start = ring->mem.Start;
-   drmInfo.ring_end = ring->mem.End;
-   drmInfo.ring_size = ring->mem.Size;
-
-   drmInfo.mmio_offset         = (unsigned int)info->regs;
-   drmInfo.buffers_offset      = (unsigned int)info->buffer_map;
-   drmInfo.sarea_priv_offset   = sizeof(drm_sarea_t);
-
-   drmInfo.front_offset        = 0;
-   drmInfo.back_offset         = info->BackBuffer.Start;
-   drmInfo.depth_offset        = info->DepthBuffer.Start;
-
-   drmInfo.w                   = ctx->shared.virtualWidth;
-   drmInfo.h                   = ctx->shared.virtualHeight;
-   drmInfo.pitch               = info->auxPitch;
-   drmInfo.pitch_bits          = info->auxPitchBits;
-   
-
-   ret = drmCommandWrite(ctx->drmFD, DRM_I810_INIT, &drmInfo, 
-			 sizeof(drmI810Init));
-
-   return ret >= 0;
-}
-
-
-/**
- * \brief Add a map for the vertex buffers that will be accessed by any
- * DRI-based clients.
- * 
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return one on success, or zero on failure.
- *
- * Calls drmAddBufs() with the previously allocated vertex buffers.
- */
-static int I810DRIBufInit( const DRIDriverContext *ctx, I810Ptr info )
-{
-   /* Initialize vertex buffers */
-   info->bufNumBufs = drmAddBufs(ctx->drmFD,
-				 I810_DMA_BUF_NR,
-				 I810_DMA_BUF_SZ,
-				 DRM_AGP_BUFFER,
-				 info->BufferMem.Start);
-
-   if (info->bufNumBufs <= 0) {
-      fprintf(stderr,
-	      "[drm] Could not create vertex/indirect buffers list\n");
-      return 0;
-   }
-   fprintf(stderr,
-	   "[drm] Added %d %d byte vertex/indirect buffers\n",
-	   info->bufNumBufs, I810_DMA_BUF_SZ);
-   
-   return 1;
-}
-
-/**
- * \brief Install an IRQ handler.
- * 
- * \param ctx display handle.
- * \param info driver private data.
- *
- * Attempts to install an IRQ handler via drmCtlInstHandler(), falling back to
- * IRQ-free operation on failure.
- */
-static void I810DRIIrqInit(const DRIDriverContext *ctx,
-			     I810Ptr info)
-{
-   if (!info->irq) {
-      info->irq = drmGetInterruptFromBusID(ctx->drmFD,
-					   ctx->pciBus,
-					   ctx->pciDevice,
-					   ctx->pciFunc);
-
-      if ((drmCtlInstHandler(ctx->drmFD, info->irq)) != 0) {
-	 fprintf(stderr,
-		 "[drm] failure adding irq handler, "
-		 "there is a device already using that irq\n"
-		 "[drm] falling back to irq-free operation\n");
-	 info->irq = 0;
-      }
-   }
-
-   if (info->irq)
-      fprintf(stderr,
-	      "[drm] dma control initialized, using IRQ %d\n",
-	      info->irq);
-}
-
-static int I810CheckDRMVersion( const DRIDriverContext *ctx,
-				  I810Ptr info )
-{
-   drmVersionPtr  version;
-
-   version = drmGetVersion(ctx->drmFD);
-   if (version) {
-      int req_minor, req_patch;
-
-      req_minor = 4;
-      req_patch = 0;	
-
-      i810_drm_version = (version->version_major<<16) | version->version_minor;
-      if (version->version_major != 1 ||
-	  version->version_minor < req_minor ||
-	  (version->version_minor == req_minor && 
-	   version->version_patchlevel < req_patch)) {
-	 /* Incompatible drm version */
-	 fprintf(stderr,
-		 "[dri] I810DRIScreenInit failed because of a version "
-		 "mismatch.\n"
-		 "[dri] i810.o kernel module version is %d.%d.%d "
-		 "but version 1.%d.%d or newer is needed.\n"
-		 "[dri] Disabling DRI.\n",
-		 version->version_major,
-		 version->version_minor,
-		 version->version_patchlevel,
-		 req_minor,
-		 req_patch);
-	 drmFreeVersion(version);
-	 return 0;
-      }
-
-      info->drmMinor = version->version_minor;
-      drmFreeVersion(version);
-   }
-
-   return 1;
-}
-
-static int I810MemoryInit( const DRIDriverContext *ctx, I810Ptr info )
-{
-   int        width_bytes = ctx->shared.virtualWidth * ctx->cpp;
-   int        cpp         = ctx->cpp;
-   int        bufferSize  = (ctx->shared.virtualHeight * width_bytes);
-   int        depthSize   = (((ctx->shared.virtualHeight+15) & ~15) * width_bytes);
-   int        l;
-
-   if (drmAddMap(ctx->drmFD, (drm_handle_t) info->BackBuffer.Start,
-		 info->BackBuffer.Size, DRM_AGP, 0,
-		 &info->backbuffer) < 0) {
-     fprintf(stderr, "[drm] drmAddMap(backbuffer) failed.  Disabling DRI\n");
-     return 0;
-   }
-   
-   if (drmAddMap(ctx->drmFD, (drm_handle_t) info->DepthBuffer.Start,
-		 info->DepthBuffer.Size, DRM_AGP, 0,
-		 &info->depthbuffer) < 0) {
-     fprintf(stderr, "[drm] drmAddMap(depthbuffer) failed.  Disabling DRI.\n");
-      return 0;
-   }
-
-   if (!I810AllocLow(&(info->FrontBuffer), &(info->SysMem), (((ctx->shared.virtualHeight * width_bytes) + 4095) & ~4095)))
-   {
-     fprintf(stderr,"Framebuffer allocation failed\n");
-     return 0;
-   }
-   else
-     fprintf(stderr,"Frame buffer at 0x%.8x (%luk, %lu bytes)\n",
-	     info->FrontBuffer.Start,
-	     info->FrontBuffer.Size / 1024, info->FrontBuffer.Size);
-   
-   memset(&(info->LpRing), 0, sizeof(I810RingBuffer));
-   if (I810AllocLow(&(info->LpRing.mem), &(info->SysMem), 16 * 4096)) {
-     fprintf(stderr,
-	    "Ring buffer at 0x%.8x (%luk, %lu bytes)\n",
-	     info->LpRing.mem.Start,
-	     info->LpRing.mem.Size / 1024, info->LpRing.mem.Size);
-     
-     info->LpRing.tail_mask = info->LpRing.mem.Size - 1;
-     info->LpRing.virtual_start = info->LpRing.mem.Start;
-     info->LpRing.head = 0;
-     info->LpRing.tail = 0;
-     info->LpRing.space = 0;
-   } else {
-     fprintf(stderr, "Ring buffer allocation failed\n");
-     return (0);
-   }
-
-   /* Allocate buffer memory */
-   I810AllocHigh(&(info->BufferMem), &(info->SysMem),
-		 I810_DMA_BUF_NR * I810_DMA_BUF_SZ);
-   
-
-   fprintf(stderr, "[dri] Buffer map : %lx\n",
-	      info->BufferMem.Start);
-
-   if (info->BufferMem.Start == 0 ||
-       info->BufferMem.End - info->BufferMem.Start >
-       I810_DMA_BUF_NR * I810_DMA_BUF_SZ) {
-     fprintf(stderr,"[dri] Not enough memory for dma buffers.  Disabling DRI.\n");
-     return 0;
-   }
-
-   if (drmAddMap(ctx->drmFD, (drm_handle_t) info->BufferMem.Start,
-		 info->BufferMem.Size, DRM_AGP, 0, &info->buffer_map) < 0) {
-     fprintf(stderr, "[drm] drmAddMap(buffer_map) failed.  Disabling DRI.\n");
-     return 0;
-   }
-
-   if (drmAddMap(ctx->drmFD, (drm_handle_t) info->LpRing.mem.Start,
-		 info->LpRing.mem.Size, DRM_AGP, 0, &info->ring_map) < 0) {
-     fprintf(stderr, "[drm] drmAddMap(ring_map) failed.  Disabling DRI. \n");
-     return 0;
-   }
-
-   /* Front, back and depth buffers - everything else texture??
-    */
-   info->textureSize = info->SysMem.Size;
-
-   if (info->textureSize < 0) 
-      return 0;
-
-   
-   l = I810MinBits((info->textureSize-1) / I810_NR_TEX_REGIONS);
-   if (l < I810_LOG_MIN_TEX_REGION_SIZE) l = I810_LOG_MIN_TEX_REGION_SIZE;
-
-   /* Round the texture size up to the nearest whole number of
-    * texture regions.  Again, be greedy about this, don't
-    * round down.
-    */
-   info->logTextureGranularity = l;
-   info->textureSize = (info->textureSize >> l) << l;
-
-   /* Set a minimum usable local texture heap size.  This will fit
-    * two 256x256x32bpp textures.
-    */
-   if (info->textureSize < 512 * 1024) {
-      info->textureOffset = 0;
-      info->textureSize = 0;
-   }
-
-   I810AllocLow(&(info->TexMem), &(info->SysMem), info->textureSize);
-
-   if (drmAddMap(ctx->drmFD, (drm_handle_t) info->TexMem.Start,
-		 info->TexMem.Size, DRM_AGP, 0, &info->textures) < 0) {
-     fprintf(stderr,
-		 "[drm] drmAddMap(textures) failed.  Disabling DRI.\n");
-      return 0;
-   }
-
-   /* Reserve space for textures */
-   fprintf(stderr, 
-	   "Will use back buffer at offset 0x%x\n",
-	   info->BackOffset);
-   fprintf(stderr, 
-	   "Will use depth buffer at offset 0x%x\n",
-	   info->DepthOffset);
-   fprintf(stderr, 
-	   "Will use %d kb for textures at offset 0x%x\n",
-	   info->TexMem.Size/1024, info->TexMem.Start);
-
-   return 1;
-} 
-
-
-
-/**
- * Called at the start of each server generation.
- *
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return non-zero on success, or zero on failure.
- *
- * Performs static frame buffer allocation. Opens the DRM device and add maps
- * to the SAREA, framebuffer and MMIO regions. Fills in \p info with more
- * information. Creates a \e server context to grab the lock for the
- * initialization ioctls and calls the other initilization functions in this
- * file. Starts the CP engine via the DRM_I810_CP_START command.
- *
- * Setups a I810DRIRec structure to be passed to i810_dri.so for its
- * initialization.
- */
-static int I810ScreenInit( DRIDriverContext *ctx, I810Ptr info )
-{
-   I810DRIPtr   pI810DRI;
-   int err;
-
-   usleep(100);
-   /*assert(!ctx->IsClient);*/
-
-   /* from XFree86 driver */
-   info->DepthOffset = 0x3000000;
-   info->BackOffset = 0x3800000;
-   {
-      int  width_bytes = (ctx->shared.virtualWidth * ctx->cpp);
-      int  maxy        = ctx->shared.fbSize / width_bytes;
-
-
-      if (maxy <= ctx->shared.virtualHeight * 3) {
-	 fprintf(stderr, 
-		 "Static buffer allocation failed -- "
-		 "need at least %d kB video memory (have %d kB)\n",
-		 (ctx->shared.virtualWidth * ctx->shared.virtualHeight *
-		  ctx->cpp * 3 + 1023) / 1024,
-		 ctx->shared.fbSize / 1024);
-	 return 0;
-      } 
-   }
-
-
-   info->regsSize = ctx->MMIOSize;
-   ctx->shared.SAREASize = 0x2000;
-
-   /* Note that drmOpen will try to load the kernel module, if needed. */
-   ctx->drmFD = drmOpen("i810", NULL );
-   if (ctx->drmFD < 0) {
-      fprintf(stderr, "[drm] drmOpen failed\n");
-      return 0;
-   }
-
-   if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) {
-      fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
-	      ctx->drmFD, ctx->pciBusID, strerror(-err));
-      return 0;
-   }
-
-   if (drmAddMap( ctx->drmFD,
-		  0,
-		  ctx->shared.SAREASize,
-		  DRM_SHM,
-		  DRM_CONTAINS_LOCK,
-		  &ctx->shared.hSAREA) < 0)
-   {
-      fprintf(stderr, "[drm] drmAddMap failed\n");
-      return 0;
-   }
-   fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n",
-	   ctx->shared.SAREASize, ctx->shared.hSAREA);
-
-   if (drmMap( ctx->drmFD,
-	       ctx->shared.hSAREA,
-	       ctx->shared.SAREASize,
-	       (drmAddressPtr)(&ctx->pSAREA)) < 0)
-   {
-      fprintf(stderr, "[drm] drmMap failed\n");
-      return 0;
-   }
-   memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
-   fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n",
-	   ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
-
-   if (drmAddMap(ctx->drmFD, 
-		 ctx->MMIOStart,
-		 ctx->MMIOSize,
-		 DRM_REGISTERS, 
-		 DRM_READ_ONLY, 
-		 &info->regs) < 0) {
-      fprintf(stderr, "[drm] drmAddMap mmio failed\n");	
-      return 0;
-   }
-   fprintf(stderr,
-	   "[drm] register handle = 0x%08x\n", info->regs);
-
-   I810DRIAgpPreInit(ctx, info);
-   /* Need to AddMap the framebuffer and mmio regions here:
-    */
-   if (drmAddMap( ctx->drmFD,
-		  (drm_handle_t)ctx->FBStart,
-		  ctx->FBSize,
-		  DRM_FRAME_BUFFER,
-#ifndef _EMBEDDED
-		  0,
-#else
-		  DRM_READ_ONLY,
-#endif
-		  &ctx->shared.hFrameBuffer) < 0)
-   {
-      fprintf(stderr, "[drm] drmAddMap framebuffer failed\n");
-      return 0;
-   }
-
-   fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n",
-	   ctx->shared.hFrameBuffer);
-
-   /* Check the i810 DRM version */
-   if (!I810CheckDRMVersion(ctx, info)) {
-      return 0;
-   }
-
-   /* Initialize AGP */
-   if (!I810DRIAgpInit(ctx, info)) {
-      return 0;
-   }
-
-
-   /* Memory manager setup */
-   if (!I810MemoryInit(ctx, info)) {
-      return 0;
-   }
-
-   /* Initialize the SAREA private data structure */
-   {
-      I810SAREAPtr pSAREAPriv;
-      pSAREAPriv = (I810SAREAPtr)(((char*)ctx->pSAREA) + 
-					sizeof(drm_sarea_t));
-      memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-      //      pSAREAPriv->pf_enabled=1;
-   }
-
-
-   /* Create a 'server' context so we can grab the lock for
-    * initialization ioctls.
-    */
-   if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) {
-      fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); 
-
-   /* Initialize the vertex buffers list */
-   if (!I810DRIBufInit(ctx, info)) {
-      fprintf(stderr, "I810DRIBufInit failed\n");
-      DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext);
-      return 0;
-   }
-
-   /* Initialize the kernel data structures */
-   if (!I810DRIKernelInit(ctx, info)) {
-      fprintf(stderr, "I810DRIKernelInit failed\n");
-      DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext);
-      return 0;
-   }
-
-   /* Initialize IRQ */
-   I810DRIIrqInit(ctx, info);
-
-   /* Quick hack to clear the front & back buffers.  Could also use
-    * the clear ioctl to do this, but would need to setup hw state
-    * first.
-    */
-#if 0
-   memset((char *)ctx->FBAddress,
-	  0,
-	  info->auxPitch * ctx->cpp * ctx->shared.virtualHeight );
-
-   memset((char *)info->backbuffer,
-	  0,
-	  info->auxPitch * ctx->cpp * ctx->shared.virtualHeight );
-#endif
-
-   /* This is the struct passed to i810_dri.so for its initialization */
-   ctx->driverClientMsg = malloc(sizeof(I810DRIRec));
-   ctx->driverClientMsgSize = sizeof(I810DRIRec);
-   pI810DRI                    = (I810DRIPtr)ctx->driverClientMsg;
-
-   pI810DRI->regs              = info->regs;
-   pI810DRI->regsSize          = info->regsSize;
-   // regsMap is unused
-
-   pI810DRI->backbufferSize    = info->BackBuffer.Size;
-   pI810DRI->backbuffer        = info->backbuffer;
-
-   pI810DRI->depthbufferSize   = info->DepthBuffer.Size;
-   pI810DRI->depthbuffer       = info->depthbuffer;
-
-   pI810DRI->textures          = info->textures;
-   pI810DRI->textureSize       = info->textureSize;
-
-   pI810DRI->agp_buffers       = info->buffer_map;
-   pI810DRI->agp_buf_size      = info->BufferMem.Size;
-
-   pI810DRI->deviceID          = info->Chipset;
-   pI810DRI->width             = ctx->shared.virtualWidth;
-   pI810DRI->height            = ctx->shared.virtualHeight;
-   pI810DRI->mem               = ctx->shared.fbSize;
-   pI810DRI->cpp               = ctx->bpp / 8;
-   pI810DRI->bitsPerPixel      = ctx->bpp;
-   pI810DRI->fbOffset          = info->FrontBuffer.Start;
-   pI810DRI->fbStride          = info->auxPitch;
-   
-   pI810DRI->backOffset        = info->BackBuffer.Start;
-   pI810DRI->depthOffset       = info->DepthBuffer.Start;
-
-   pI810DRI->auxPitch          = info->auxPitch;
-   pI810DRI->auxPitchBits      = info->auxPitchBits;
-
-   pI810DRI->logTextureGranularity = info->logTextureGranularity;
-   pI810DRI->textureOffset     = info->TexMem.Start;
-  
-   pI810DRI->ringOffset        = info->LpRing.mem.Start;
-   pI810DRI->ringSize          = info->LpRing.mem.Size;
-
-   // drmBufs looks unused 
-   pI810DRI->irq               = info->irq;
-   pI810DRI->sarea_priv_offset = sizeof(drm_sarea_t);
-
-   /* Don't release the lock now - let the VT switch handler do it. */
-   return 1;
-}
-
-
-/**
- * \brief Validate the fbdev mode.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Saves some registers and returns 1.
- *
- * \sa i810ValidateMode().
- */
-static int i810ValidateMode( const DRIDriverContext *ctx )
-{
-   unsigned char *I810MMIO = ctx->MMIOAddress;
-   I810Ptr info = ctx->driverPrivate;
-
-   return 1;
-}
-
-
-/**
- * \brief Examine mode returned by fbdev.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Restores registers that fbdev has clobbered and returns 1.
- *
- * \sa i810ValidateMode().
- */
-static int i810PostValidateMode( const DRIDriverContext *ctx )
-{
-   unsigned char *I810MMIO = ctx->MMIOAddress;
-   I810Ptr info = ctx->driverPrivate;
-
-   return 1;
-}
-
-
-/**
- * \brief Initialize the framebuffer device mode
- *
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Fills in \p info with some default values and some information from \p ctx
- * and then calls I810ScreenInit() for the screen initialization.
- * 
- * Before exiting clears the framebuffer memory accessing it directly.
- */
-static int i810InitFBDev( DRIDriverContext *ctx )
-{
-  I810Ptr info = calloc(1, sizeof(*info));
-
-   {
-      int  dummy = ctx->shared.virtualWidth;
-
-      switch (ctx->bpp / 8) {
-      case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
-      case 2: dummy = (ctx->shared.virtualWidth +  31) &  ~31; break;
-      case 3:
-      case 4: dummy = (ctx->shared.virtualWidth +  15) &  ~15; break;
-      }
-
-      ctx->shared.virtualWidth = dummy;
-   }
-
-   ctx->driverPrivate = (void *)info;
-   
-   info->Chipset = ctx->chipset;
-
-   if (!I810ScreenInit( ctx, info ))
-      return 0;
-
-
-   return 1;
-}
-
-
-/**
- * \brief The screen is being closed, so clean up any state and free any
- * resources used by the DRI.
- *
- * \param ctx display handle.
- *
- * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver
- * private data.
- */
-static void i810HaltFBDev( DRIDriverContext *ctx )
-{
-    drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
-    drmClose(ctx->drmFD);
-
-    if (ctx->driverPrivate) {
-       free(ctx->driverPrivate);
-       ctx->driverPrivate = 0;
-    }
-}
-
-
-extern void i810NotifyFocus( int );
-
-/**
- * \brief Exported driver interface for Mini GLX.
- *
- * \sa DRIDriverRec.
- */
-const struct DRIDriverRec __driDriver = {
-   i810ValidateMode,
-   i810PostValidateMode,
-   i810InitFBDev,
-   i810HaltFBDev,
-   I810EngineShutdown,
-   I810EngineRestore,  
-#ifndef _EMBEDDED
-   0,
-#else
-   i810NotifyFocus, 
-#endif
-};
diff --git a/src/mesa/drivers/dri/i915/server/intel_dri.c b/src/mesa/drivers/dri/i915/server/intel_dri.c
deleted file mode 120000
index effdd26448..0000000000
--- a/src/mesa/drivers/dri/i915/server/intel_dri.c
+++ /dev/null
@@ -1 +0,0 @@
-../../intel/server/intel_dri.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/server/intel_dri.c b/src/mesa/drivers/dri/i965/server/intel_dri.c
deleted file mode 120000
index effdd26448..0000000000
--- a/src/mesa/drivers/dri/i965/server/intel_dri.c
+++ /dev/null
@@ -1 +0,0 @@
-../../intel/server/intel_dri.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/intel/server/intel_dri.c b/src/mesa/drivers/dri/intel/server/intel_dri.c
deleted file mode 100644
index e49c4214ad..0000000000
--- a/src/mesa/drivers/dri/intel/server/intel_dri.c
+++ /dev/null
@@ -1,1306 +0,0 @@
-/**
- * \file server/intel_dri.c
- * \brief File to perform the device-specific initialization tasks typically
- * done in the X server.
- *
- * Here they are converted to run in the client (or perhaps a standalone
- * process), and to work with the frame buffer device rather than the X
- * server infrastructure.
- * 
- * Copyright (C) 2006 Dave Airlie (airlied@linux.ie)
-
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sub license, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial portions
- of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR
- ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
-
-#include "driver.h"
-#include "drm.h"
-
-#include "intel.h"
-#include "i830_dri.h"
-
-#include "memops.h"
-#include "pciaccess.h"
-
-static size_t drm_page_size;
-static int nextTile = 0;
-#define xf86DrvMsg(...) do {} while(0)
-
-static const int pitches[] = {
-  128 * 8,
-  128 * 16,
-  128 * 32,
-  128 * 64,
-  0
-};
-
-static Bool I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea);
-
-static unsigned long
-GetBestTileAlignment(unsigned long size)
-{
-   unsigned long i;
-
-   for (i = KB(512); i < size; i <<= 1)
-      ;
-
-   if (i > MB(64))
-      i = MB(64);
-
-   return i;
-}
-
-static void SetFenceRegs(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  int i;
-  unsigned char *MMIO = ctx->MMIOAddress;
-
-  for (i = 0; i < 8; i++) {
-    OUTREG(FENCE + i * 4, pI830->Fence[i]);
-    //    if (I810_DEBUG & DEBUG_VERBOSE_VGA)
-    fprintf(stderr,"Fence Register : %x\n", pI830->Fence[i]);
-  }
-}
-
-/* Tiled memory is good... really, really good...
- *
- * Need to make it less likely that we miss out on this - probably
- * need to move the frontbuffer away from the 'guarenteed' alignment
- * of the first memory segment, or perhaps allocate a discontigous
- * framebuffer to get more alignment 'sweet spots'.
- */
-static void
-SetFence(const DRIDriverContext *ctx, I830Rec *pI830,
-	 int nr, unsigned int start, unsigned int pitch,
-         unsigned int size)
-{
-   unsigned int val;
-   unsigned int fence_mask = 0;
-   unsigned int fence_pitch;
-
-   if (nr < 0 || nr > 7) {
-      fprintf(stderr,
-		 "SetFence: fence %d out of range\n",nr);
-      return;
-   }
-
-   pI830->Fence[nr] = 0;
-
-   if (IS_I9XX(pI830))
-   	fence_mask = ~I915G_FENCE_START_MASK;
-   else
-   	fence_mask = ~I830_FENCE_START_MASK;
-
-   if (start & fence_mask) {
-      fprintf(stderr,
-		 "SetFence: %d: start (0x%08x) is not %s aligned\n",
-		 nr, start, (IS_I9XX(pI830)) ? "1MB" : "512k");
-      return;
-   }
-
-   if (start % size) {
-      fprintf(stderr,
-		 "SetFence: %d: start (0x%08x) is not size (%dk) aligned\n",
-		 nr, start, size / 1024);
-      return;
-   }
-
-   if (pitch & 127) {
-      fprintf(stderr,
-		 "SetFence: %d: pitch (%d) not a multiple of 128 bytes\n",
-		 nr, pitch);
-      return;
-   }
-
-   val = (start | FENCE_X_MAJOR | FENCE_VALID);
-
-   if (IS_I9XX(pI830)) {
-   	switch (size) {
-	   case MB(1):
-      		val |= I915G_FENCE_SIZE_1M;
-      		break;
-   	   case MB(2):
-      		val |= I915G_FENCE_SIZE_2M;
-      		break;
-   	   case MB(4):
-      		val |= I915G_FENCE_SIZE_4M;
-      		break;
-   	   case MB(8):
-      		val |= I915G_FENCE_SIZE_8M;
-      		break;
-   	   case MB(16):
-      		val |= I915G_FENCE_SIZE_16M;
-      		break;
-   	   case MB(32):
-      		val |= I915G_FENCE_SIZE_32M;
-      		break;
-   	   case MB(64):
-      		val |= I915G_FENCE_SIZE_64M;
-      		break;
-   	   default:
-      		fprintf(stderr,
-		 "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024);
-      		return;
-   	}
-    } else {
-   	switch (size) {
-	   case KB(512):
-      		val |= FENCE_SIZE_512K;
-      		break;
-	   case MB(1):
-      		val |= FENCE_SIZE_1M;
-      		break;
-   	   case MB(2):
-      		val |= FENCE_SIZE_2M;
-      		break;
-   	   case MB(4):
-      		val |= FENCE_SIZE_4M;
-      		break;
-   	   case MB(8):
-      		val |= FENCE_SIZE_8M;
-      		break;
-   	   case MB(16):
-      		val |= FENCE_SIZE_16M;
-      		break;
-   	   case MB(32):
-      		val |= FENCE_SIZE_32M;
-      		break;
-   	   case MB(64):
-      		val |= FENCE_SIZE_64M;
-      		break;
-   	   default:
-      		fprintf(stderr,
-		 "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024);
-      		return;
-   	}
-   }
-
-   if (IS_I9XX(pI830))
-	fence_pitch = pitch / 512;
-   else
-	fence_pitch = pitch / 128;
-
-   switch (fence_pitch) {
-   case 1:
-      val |= FENCE_PITCH_1;
-      break;
-   case 2:
-      val |= FENCE_PITCH_2;
-      break;
-   case 4:
-      val |= FENCE_PITCH_4;
-      break;
-   case 8:
-      val |= FENCE_PITCH_8;
-      break;
-   case 16:
-      val |= FENCE_PITCH_16;
-      break;
-   case 32:
-      val |= FENCE_PITCH_32;
-      break;
-   case 64:
-      val |= FENCE_PITCH_64;
-      break;
-   default:
-      fprintf(stderr,
-		 "SetFence: %d: illegal pitch (%d)\n", nr, pitch);
-      return;
-   }
-
-   pI830->Fence[nr] = val;
-}
-
-static Bool
-MakeTiles(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *pMem)
-{
-   int pitch, ntiles, i;
-
-   pitch = pMem->Pitch * ctx->cpp;
-   /*
-    * Simply try to break the region up into at most four pieces of size
-    * equal to the alignment.
-    */
-   ntiles = ROUND_TO(pMem->Size, pMem->Alignment) / pMem->Alignment;
-   if (ntiles >= 4) {
-      return FALSE;
-   }
-
-   for (i = 0; i < ntiles; i++, nextTile++) {
-     SetFence(ctx, pI830, nextTile, pMem->Start + i * pMem->Alignment,
-	       pitch, pMem->Alignment);
-   }
-   return TRUE;
-}
-
-static void I830SetupMemoryTiling(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  int i;
-
-  /* Clear out */
-  for (i = 0; i < 8; i++)
-    pI830->Fence[i] = 0;
-  
-  nextTile = 0;
-
-  if (pI830->BackBuffer.Alignment >= KB(512)) {
-    if (MakeTiles(ctx, pI830, &(pI830->BackBuffer))) {
-      fprintf(stderr,
-		 "Activating tiled memory for the back buffer.\n");
-    } else {
-      fprintf(stderr,
-		 "MakeTiles failed for the back buffer.\n");
-      pI830->allowPageFlip = FALSE;
-    }
-  }
-  
-  if (pI830->DepthBuffer.Alignment >= KB(512)) {
-    if (MakeTiles(ctx, pI830, &(pI830->DepthBuffer))) {
-      fprintf(stderr,
-		 "Activating tiled memory for the depth buffer.\n");
-    } else {
-      fprintf(stderr,
-		 "MakeTiles failed for the depth buffer.\n");
-    }
-  }
-
-  return;
-}
-
-static int I830DetectMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  struct pci_device host_bridge, ig_dev;
-  uint32_t gmch_ctrl;
-  int memsize = 0;
-  int range;
-  uint32_t aper_size;
-  uint32_t membase2 = 0;
-      
-  memset(&host_bridge, 0, sizeof(host_bridge));
-  memset(&ig_dev, 0, sizeof(ig_dev));
-
-  ig_dev.dev = 2;
-
-  pci_device_cfg_read_u32(&host_bridge, &gmch_ctrl, I830_GMCH_CTRL);
-
-  if (IS_I830(pI830) || IS_845G(pI830)) {
-    if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
-      aper_size = 0x80000000;
-    } else {
-      aper_size = 0x40000000;
-    }
-  } else {
-    if (IS_I9XX(pI830)) {
-      int ret;
-      ret = pci_device_cfg_read_u32(&ig_dev, &membase2, 0x18);
-      if (membase2 & 0x08000000)
-	aper_size = 0x8000000;
-      else
-	aper_size = 0x10000000;
-
-      fprintf(stderr,"aper size is %08X %08x %d\n", aper_size, membase2, ret);
-    } else
-      aper_size = 0x8000000;
-  }
-
-  pI830->aper_size = aper_size;
-
-
-  /* We need to reduce the stolen size, by the GTT and the popup.
-   * The GTT varying according the the FbMapSize and the popup is 4KB */
-  range = (ctx->shared.fbSize / (1024*1024)) + 4;
-
-   if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
-      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
-      case I855_GMCH_GMS_STOLEN_1M:
-	 memsize = MB(1) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_4M:
-	 memsize = MB(4) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_8M:
-	 memsize = MB(8) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_16M:
-	 memsize = MB(16) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_32M:
-	 memsize = MB(32) - KB(range);
-	 break;
-      case I915G_GMCH_GMS_STOLEN_48M:
-	 if (IS_I9XX(pI830))
-	    memsize = MB(48) - KB(range);
-	 break;
-      case I915G_GMCH_GMS_STOLEN_64M:
-	 if (IS_I9XX(pI830))
-	    memsize = MB(64) - KB(range);
-	 break;
-      }
-   } else {
-      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
-      case I830_GMCH_GMS_STOLEN_512:
-	 memsize = KB(512) - KB(range);
-	 break;
-      case I830_GMCH_GMS_STOLEN_1024:
-	 memsize = MB(1) - KB(range);
-	 break;
-      case I830_GMCH_GMS_STOLEN_8192:
-	 memsize = MB(8) - KB(range);
-	 break;
-      case I830_GMCH_GMS_LOCAL:
-	 memsize = 0;
-	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "Local memory found, but won't be used.\n");
-	 break;
-      }
-   }
-   if (memsize > 0) {
-     fprintf(stderr,
-		 "detected %d kB stolen memory.\n", memsize / 1024);
-   } else {
-     fprintf(stderr,
-		 "no video memory detected.\n");
-   }
-   return memsize;
-}
-
-static int AgpInit(const DRIDriverContext *ctx, I830Rec *info)
-{
-  unsigned long mode = 0x4;
-
-  if (drmAgpAcquire(ctx->drmFD) < 0) {
-    fprintf(stderr, "[gart] AGP not available\n");
-    return 0;
-  }
-  
-  if (drmAgpEnable(ctx->drmFD, mode) < 0) {
-    fprintf(stderr, "[gart] AGP not enabled\n");
-    drmAgpRelease(ctx->drmFD);
-    return 0;
-  }
-  else
-    fprintf(stderr, "[gart] AGP enabled at %dx\n", ctx->agpmode);
-
-  return 1;
-}
-
-/*
- * Allocate memory from the given pool.  Grow the pool if needed and if
- * possible.
- */
-static unsigned long
-AllocFromPool(const DRIDriverContext *ctx, I830Rec *pI830, 
-	      I830MemRange *result, I830MemPool *pool,
-	      long size, unsigned long alignment, int flags)
-{
-   long needed, start, end;
-
-   if (!result || !pool || !size)
-      return 0;
-
-   /* Calculate how much space is needed. */
-   if (alignment <= GTT_PAGE_SIZE)
-      needed = size;
-   else {
-	 start = ROUND_TO(pool->Free.Start, alignment);
-	 end = ROUND_TO(start + size, alignment);
-	 needed = end - pool->Free.Start;
-   }
-   if (needed > pool->Free.Size) {
-     return 0;
-   }
-
-   result->Start = ROUND_TO(pool->Free.Start, alignment);
-   pool->Free.Start += needed;
-   result->End = pool->Free.Start;
-
-   pool->Free.Size = pool->Free.End - pool->Free.Start;
-   result->Size = result->End - result->Start;
-   result->Pool = pool;
-   result->Alignment = alignment;
-   return needed;
-}
-
-static unsigned long AllocFromAGP(const DRIDriverContext *ctx, I830Rec *pI830, long size, unsigned long alignment, I830MemRange  *result)
-{
-   unsigned long start, end;
-   unsigned long newApStart, newApEnd;
-   int ret;
-   if (!result || !size)
-      return 0;
-   
-   if (!alignment)
-     alignment = 4;
-
-   start = ROUND_TO(pI830->MemoryAperture.Start, alignment);
-   end = ROUND_TO(start + size, alignment);
-   newApStart = end;
-   newApEnd = pI830->MemoryAperture.End;
-
-   ret=drmAgpAlloc(ctx->drmFD, size, 0, &(result->Physical), (drm_handle_t *)&(result->Key));
-   
-   if (ret)
-   {
-     fprintf(stderr,"drmAgpAlloc failed %d\n", ret);
-     return 0;
-   }
-   pI830->allocatedMemory += size;
-   pI830->MemoryAperture.Start = newApStart;
-   pI830->MemoryAperture.End = newApEnd;
-   pI830->MemoryAperture.Size = newApEnd - newApStart;
-   //   pI830->FreeMemory -= size;
-   result->Start = start;
-   result->End = start + size;
-   result->Size = size;
-   result->Offset = start;
-   result->Alignment = alignment;
-   result->Pool = NULL;
-  
-   return size;
-}
-
-unsigned long
-I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830,
-                I830MemRange *result, I830MemPool *pool, long size,
-                unsigned long alignment, int flags)
-{
-   unsigned long ret;
-
-   if (!result)
-      return 0;
-
-   /* Make sure these are initialised. */
-   result->Size = 0;
-   result->Key = -1;
-
-   if (!size) {
-      return 0;
-   }
-
-   if (pool->Free.Size < size) {
-      ret = AllocFromAGP(ctx, pI830, size, alignment, result);
-   }
-   else {
-      ret = AllocFromPool(ctx, pI830, result, pool, size, alignment, flags);
-      if (ret == 0)
-         ret = AllocFromAGP(ctx, pI830, size, alignment, result);
-   }
-   return ret;
-}
-
-static Bool BindAgpRange(const DRIDriverContext *ctx, I830MemRange *mem)
-{
-  if (!mem)
-    return FALSE;
-  
-  if (mem->Key == -1)
-    return TRUE;
-
-  return !drmAgpBind(ctx->drmFD, mem->Key, mem->Offset);
-}
-
-/* simple memory allocation routines needed */
-/* put ring buffer in low memory */
-/* need to allocate front, back, depth buffers aligned correctly,
-   allocate ring buffer, 
-*/
-
-/* */
-static Bool
-I830AllocateMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  unsigned long size, ret;
-  unsigned long lines, lineSize, align;
-
-  /* allocate ring buffer */
-  memset(pI830->LpRing, 0, sizeof(I830RingBuffer));
-  pI830->LpRing->mem.Key = -1;
-
-  size = PRIMARY_RINGBUFFER_SIZE;
-  
-  ret = I830AllocVidMem(ctx, pI830, &pI830->LpRing->mem, &pI830->StolenPool, size, 0x1000, 0);
-  
-  if (ret != size)
-  {
-    fprintf(stderr,"unable to allocate ring buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  pI830->LpRing->tail_mask = pI830->LpRing->mem.Size - 1;
-
-  
-  /* allocate front buffer */
-  memset(&(pI830->FrontBuffer), 0, sizeof(pI830->FrontBuffer));
-  pI830->FrontBuffer.Key = -1;
-  pI830->FrontBuffer.Pitch = ctx->shared.virtualWidth;
-
-  align = KB(512);  
-
-  lineSize = ctx->shared.virtualWidth * ctx->cpp;
-  lines = (ctx->shared.virtualHeight + 15) / 16 * 16;
-  size = lineSize * lines;
-  size = ROUND_TO_PAGE(size);
-
-  align = GetBestTileAlignment(size);
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->FrontBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate front buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  memset(&(pI830->BackBuffer), 0, sizeof(pI830->BackBuffer));
-  pI830->BackBuffer.Key = -1;
-  pI830->BackBuffer.Pitch = ctx->shared.virtualWidth;
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->BackBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate back buffer %ld\n", ret);
-    return FALSE;
-  }
-  
-  memset(&(pI830->DepthBuffer), 0, sizeof(pI830->DepthBuffer));
-  pI830->DepthBuffer.Key = -1;
-  pI830->DepthBuffer.Pitch = ctx->shared.virtualWidth;
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->DepthBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate depth buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  memset(&(pI830->ContextMem), 0, sizeof(pI830->ContextMem));
-  pI830->ContextMem.Key = -1;
-  size = KB(32);
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->ContextMem, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate context buffer %ld\n", ret);
-    return FALSE;
-  }
-
-#if 0  
-  memset(&(pI830->TexMem), 0, sizeof(pI830->TexMem));
-  pI830->TexMem.Key = -1;
-
-  size = 32768 * 1024;
-  ret = AllocFromAGP(ctx, pI830, size, align, &pI830->TexMem);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate texture memory %ld\n", ret);
-    return FALSE;
-  }
-#endif
-
-  return TRUE;
-}
-
-static Bool
-I830BindMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  if (!BindAgpRange(ctx, &pI830->LpRing->mem))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->FrontBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->BackBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->DepthBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->ContextMem))
-    return FALSE;
-#if 0
-  if (!BindAgpRange(ctx, &pI830->TexMem))
-    return FALSE;
-#endif
-  return TRUE;
-}
-
-static void SetupDRIMM(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  unsigned long aperEnd = ROUND_DOWN_TO(pI830->aper_size, GTT_PAGE_SIZE) / GTT_PAGE_SIZE;
-  unsigned long aperStart = ROUND_TO(pI830->aper_size - KB(32768), GTT_PAGE_SIZE) / GTT_PAGE_SIZE;
-
-  fprintf(stderr, "aper size is %08X\n", ctx->shared.fbSize);
-  if (drmMMInit(ctx->drmFD, aperStart, aperEnd - aperStart, DRM_BO_MEM_TT)) {
-      fprintf(stderr,
-	      "DRM MM Initialization Failed\n");
-  } else {
-    fprintf(stderr,
-	    "DRM MM Initialized at offset 0x%lx length %d page\n", aperStart, aperEnd-aperStart);
-  }
-
-}
-
-static Bool
-I830CleanupDma(const DRIDriverContext *ctx)
-{
-   drmI830Init info;
-
-   memset(&info, 0, sizeof(drmI830Init));
-   info.func = I830_CLEANUP_DMA;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT,
-		       &info, sizeof(drmI830Init))) {
-     fprintf(stderr, "I830 Dma Cleanup Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static Bool
-I830InitDma(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-   I830RingBuffer *ring = pI830->LpRing;
-   drmI830Init info;
-
-   memset(&info, 0, sizeof(drmI830Init));
-   info.func = I830_INIT_DMA;
-
-   info.ring_start = ring->mem.Start + pI830->LinearAddr;
-   info.ring_end = ring->mem.End + pI830->LinearAddr;
-   info.ring_size = ring->mem.Size;
-
-   info.mmio_offset = (unsigned int)ctx->MMIOStart;
-
-   info.sarea_priv_offset = sizeof(drm_sarea_t);
-
-   info.front_offset = pI830->FrontBuffer.Start;
-   info.back_offset = pI830->BackBuffer.Start;
-   info.depth_offset = pI830->DepthBuffer.Start;
-   info.w = ctx->shared.virtualWidth;
-   info.h = ctx->shared.virtualHeight;
-   info.pitch = ctx->shared.virtualWidth;
-   info.back_pitch = pI830->BackBuffer.Pitch;
-   info.depth_pitch = pI830->DepthBuffer.Pitch;
-   info.cpp = ctx->cpp;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT,
-		       &info, sizeof(drmI830Init))) {
-      fprintf(stderr,
-		 "I830 Dma Initialization Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static int I830CheckDRMVersion( const DRIDriverContext *ctx,
-				  I830Rec *pI830 )
-{
-   drmVersionPtr  version;
-
-   version = drmGetVersion(ctx->drmFD);
-
-   if (version) {
-     int req_minor, req_patch;
-
-     req_minor = 4;
-     req_patch = 0;	
-
-     if (version->version_major != 1 ||
-	 version->version_minor < req_minor ||
-	 (version->version_minor == req_minor && 
-	  version->version_patchlevel < req_patch)) {
-       /* Incompatible drm version */
-       fprintf(stderr,
-	       "[dri] I830DRIScreenInit failed because of a version "
-	       "mismatch.\n"
-	       "[dri] i915.o kernel module version is %d.%d.%d "
-	       "but version 1.%d.%d or newer is needed.\n"
-	       "[dri] Disabling DRI.\n",
-	       version->version_major,
-	       version->version_minor,
-	       version->version_patchlevel,
-	       req_minor,
-	       req_patch);
-       drmFreeVersion(version);
-       return 0;
-     }
-     
-     pI830->drmMinor = version->version_minor;
-     drmFreeVersion(version);
-   }
-   return 1;
-}
-
-static void
-I830SetRingRegs(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  unsigned int itemp;
-  unsigned char *MMIO = ctx->MMIOAddress;
-
-   OUTREG(LP_RING + RING_LEN, 0);
-   OUTREG(LP_RING + RING_TAIL, 0);
-   OUTREG(LP_RING + RING_HEAD, 0);
-
-   if ((long)(pI830->LpRing->mem.Start & I830_RING_START_MASK) !=
-       pI830->LpRing->mem.Start) {
-      fprintf(stderr,
-		 "I830SetRingRegs: Ring buffer start (%lx) violates its "
-		 "mask (%x)\n", pI830->LpRing->mem.Start, I830_RING_START_MASK);
-   }
-   /* Don't care about the old value.  Reserved bits must be zero anyway. */
-   itemp = pI830->LpRing->mem.Start & I830_RING_START_MASK;
-   OUTREG(LP_RING + RING_START, itemp);
-
-   if (((pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES) !=
-       pI830->LpRing->mem.Size - 4096) {
-      fprintf(stderr,
-		 "I830SetRingRegs: Ring buffer size - 4096 (%lx) violates its "
-		 "mask (%x)\n", pI830->LpRing->mem.Size - 4096,
-		 I830_RING_NR_PAGES);
-   }
-   /* Don't care about the old value.  Reserved bits must be zero anyway. */
-   itemp = (pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES;
-   itemp |= (RING_NO_REPORT | RING_VALID);
-   OUTREG(LP_RING + RING_LEN, itemp);
-
-   pI830->LpRing->head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
-   pI830->LpRing->tail = INREG(LP_RING + RING_TAIL);
-   pI830->LpRing->space = pI830->LpRing->head - (pI830->LpRing->tail + 8);
-   if (pI830->LpRing->space < 0)
-      pI830->LpRing->space += pI830->LpRing->mem.Size;
-
-   SetFenceRegs(ctx, pI830);
-   
-   /* RESET THE DISPLAY PIPE TO POINT TO THE FRONTBUFFER - hacky
-      hacky hacky */
-   OUTREG(DSPABASE, pI830->FrontBuffer.Start + pI830->LinearAddr);
-
-}
-
-static Bool
-I830SetParam(const DRIDriverContext *ctx, int param, int value)
-{
-   drmI830SetParam sp;
-
-   memset(&sp, 0, sizeof(sp));
-   sp.param = param;
-   sp.value = value;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_SETPARAM, &sp, sizeof(sp))) {
-      fprintf(stderr, "I830 SetParam Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static Bool
-I830DRIMapScreenRegions(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-   fprintf(stderr,
-              "[drm] Mapping front buffer\n");
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)(sarea->front_offset + pI830->LinearAddr),
-                 sarea->front_size,
-                 DRM_FRAME_BUFFER,  /*DRM_AGP,*/
-                 0,
-                 &sarea->front_handle) < 0) {
-     fprintf(stderr,
-	     "[drm] drmAddMap(front_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   ctx->shared.hFrameBuffer = sarea->front_handle;
-   ctx->shared.fbSize = sarea->front_size;
-   fprintf(stderr, "[drm] Front Buffer = 0x%08x\n",
-	   sarea->front_handle);
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)(sarea->back_offset),
-                 sarea->back_size, DRM_AGP, 0,
-                 &sarea->back_handle) < 0) {
-      fprintf(stderr,
-                 "[drm] drmAddMap(back_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] Back Buffer = 0x%08x\n",
-              sarea->back_handle);
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)sarea->depth_offset,
-                 sarea->depth_size, DRM_AGP, 0,
-                 &sarea->depth_handle) < 0) {
-      fprintf(stderr,
-                 "[drm] drmAddMap(depth_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] Depth Buffer = 0x%08x\n",
-              sarea->depth_handle);
-
-#if 0
-   if (drmAddMap(ctx->drmFD,
-		 (drm_handle_t)sarea->tex_offset,
-		 sarea->tex_size, DRM_AGP, 0,
-		 &sarea->tex_handle) < 0) {
-      fprintf(stderr,
-		 "[drm] drmAddMap(tex_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] textures = 0x%08x\n",
-	      sarea->tex_handle);
-#endif
-   return TRUE;
-}
-
-
-static void
-I830DRIUnmapScreenRegions(const DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-#if 1
-   if (sarea->front_handle) {
-      drmRmMap(ctx->drmFD, sarea->front_handle);
-      sarea->front_handle = 0;
-   }
-#endif
-   if (sarea->back_handle) {
-      drmRmMap(ctx->drmFD, sarea->back_handle);
-      sarea->back_handle = 0;
-   }
-   if (sarea->depth_handle) {
-      drmRmMap(ctx->drmFD, sarea->depth_handle);
-      sarea->depth_handle = 0;
-   }
-   if (sarea->tex_handle) {
-      drmRmMap(ctx->drmFD, sarea->tex_handle);
-      sarea->tex_handle = 0;
-   }
-}
-
-static Bool
-I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-  if (drmAddMap(ctx->drmFD,
-		(drm_handle_t)pI830->LpRing->mem.Start,
-		pI830->LpRing->mem.Size, DRM_AGP, 0,
-		&pI830->ring_map) < 0) {
-    fprintf(stderr,
-	    "[drm] drmAddMap(ring_map) failed. Disabling DRI\n");
-    return FALSE;
-  }
-  fprintf(stderr, "[drm] ring buffer = 0x%08x\n",
-	  pI830->ring_map);
-
-  if (I830InitDma(ctx, pI830) == FALSE) {
-    return FALSE;
-  }
-  
-   /* init to zero to be safe */
-
-  I830DRIMapScreenRegions(ctx, pI830, sarea);
-  SetupDRIMM(ctx, pI830);
-
-   if (ctx->pciDevice != PCI_CHIP_845_G &&
-       ctx->pciDevice != PCI_CHIP_I830_M) {
-      I830SetParam(ctx, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 );
-   }
-
-   /* Okay now initialize the dma engine */
-   {
-      pI830->irq = drmGetInterruptFromBusID(ctx->drmFD,
-					    ctx->pciBus,
-					    ctx->pciDevice,
-					    ctx->pciFunc);
-
-      if (drmCtlInstHandler(ctx->drmFD, pI830->irq)) {
-	 fprintf(stderr,
-		    "[drm] failure adding irq handler\n");
-	 pI830->irq = 0;
-	 return FALSE;
-      }
-      else
-	 fprintf(stderr,
-		    "[drm] dma control initialized, using IRQ %d\n",
-		    pI830->irq);
-   }
-
-   fprintf(stderr, "[dri] visual configs initialized\n");
-
-   return TRUE;
-}
-
-static Bool
-I830ClearScreen(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-  /* need to drmMap front and back buffers and zero them */
-  drmAddress map_addr;
-  int ret;
-
-  ret = drmMap(ctx->drmFD,
-	       sarea->front_handle,
-	       sarea->front_size,
-	       &map_addr);
-
-  if (ret)
-  {
-    fprintf(stderr, "Unable to map front buffer\n");
-    return FALSE;
-  }
-
-  drimemsetio((char *)map_addr,
-	      0,
-	      sarea->front_size);
-  drmUnmap(map_addr, sarea->front_size);
-
-
-  ret = drmMap(ctx->drmFD,
-	       sarea->back_handle,
-	       sarea->back_size,
-	       &map_addr);
-
-  if (ret)
-  {
-    fprintf(stderr, "Unable to map back buffer\n");
-    return FALSE;
-  }
-
-  drimemsetio((char *)map_addr,
-	      0,
-	      sarea->back_size);
-  drmUnmap(map_addr, sarea->back_size);
-
-  return TRUE;
-}
-
-static Bool
-I830ScreenInit(DRIDriverContext *ctx, I830Rec *pI830)
-		  
-{
-   I830DRIPtr pI830DRI;
-   drmI830Sarea *pSAREAPriv;
-   int err;
-      
-   drm_page_size = getpagesize();   
-
-   pI830->registerSize = ctx->MMIOSize;
-   /* This is a hack for now.  We have to have more than a 4k page here
-    * because of the size of the state.  However, the state should be
-    * in a per-context mapping.  This will be added in the Mesa 3.5 port
-    * of the I830 driver.
-    */
-   ctx->shared.SAREASize = SAREA_MAX;
-
-   /* Note that drmOpen will try to load the kernel module, if needed. */
-   ctx->drmFD = drmOpen("i915", NULL );
-   if (ctx->drmFD < 0) {
-      fprintf(stderr, "[drm] drmOpen failed\n");
-      return 0;
-   }
-
-   if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) {
-      fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
-	      ctx->drmFD, ctx->pciBusID, strerror(-err));
-      return 0;
-   }
-
-   if (drmAddMap( ctx->drmFD,
-		  0,
-		  ctx->shared.SAREASize,
-		  DRM_SHM,
-		  DRM_CONTAINS_LOCK,
-		  &ctx->shared.hSAREA) < 0)
-   {
-     fprintf(stderr, "[drm] drmAddMap failed\n");
-     return 0;
-   }
-
-   fprintf(stderr, "[drm] added %d byte SAREA at 0x%08x\n",
-	   ctx->shared.SAREASize, ctx->shared.hSAREA);
-   
-   if (drmMap( ctx->drmFD,
-	       ctx->shared.hSAREA,
-	       ctx->shared.SAREASize,
-	       (drmAddressPtr)(&ctx->pSAREA)) < 0)
-   {
-      fprintf(stderr, "[drm] drmMap failed\n");
-      return 0;
-   
-   }
-   
-   memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
-   fprintf(stderr, "[drm] mapped SAREA 0x%08x to %p, size %d\n",
-	   ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
-   
-
-   if (drmAddMap(ctx->drmFD, 
-		 ctx->MMIOStart,
-		 ctx->MMIOSize,
-		 DRM_REGISTERS, 
-		 DRM_READ_ONLY, 
-		 &pI830->registerHandle) < 0) {
-      fprintf(stderr, "[drm] drmAddMap mmio failed\n");	
-      return 0;
-   }
-   fprintf(stderr,
-	   "[drm] register handle = 0x%08x\n", pI830->registerHandle);
-
-
-   if (!I830CheckDRMVersion(ctx, pI830)) {
-     return FALSE;
-   }
-
-   /* Create a 'server' context so we can grab the lock for
-    * initialization ioctls.
-    */
-   if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) {
-      fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); 
-
-   /* Initialize the SAREA private data structure */
-   pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + 
-				 sizeof(drm_sarea_t));
-   memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-
-   pI830->StolenMemory.Size = I830DetectMemory(ctx, pI830);
-   pI830->StolenMemory.Start = 0;
-   pI830->StolenMemory.End = pI830->StolenMemory.Size;
-
-   pI830->MemoryAperture.Start = pI830->StolenMemory.End;
-   pI830->MemoryAperture.End = KB(40000);
-   pI830->MemoryAperture.Size = pI830->MemoryAperture.End - pI830->MemoryAperture.Start;
-
-   pI830->StolenPool.Fixed = pI830->StolenMemory;
-   pI830->StolenPool.Total = pI830->StolenMemory;
-   pI830->StolenPool.Free = pI830->StolenPool.Total;
-   pI830->FreeMemory = pI830->StolenPool.Total.Size;
-
-   if (!AgpInit(ctx, pI830))
-     return FALSE;
-
-   if (I830AllocateMemory(ctx, pI830) == FALSE)
-   {
-     return FALSE;
-   }
-
-   if (I830BindMemory(ctx, pI830) == FALSE)
-   {
-     return FALSE;
-   }
-
-   pSAREAPriv->rotated_offset = -1;
-   pSAREAPriv->rotated_size = 0;
-   pSAREAPriv->rotated_pitch = ctx->shared.virtualWidth;
-
-   pSAREAPriv->front_offset = pI830->FrontBuffer.Start;
-   pSAREAPriv->front_size = pI830->FrontBuffer.Size;
-   pSAREAPriv->width = ctx->shared.virtualWidth;
-   pSAREAPriv->height = ctx->shared.virtualHeight;
-   pSAREAPriv->pitch = ctx->shared.virtualWidth;
-   pSAREAPriv->virtualX = ctx->shared.virtualWidth;
-   pSAREAPriv->virtualY = ctx->shared.virtualHeight;
-   pSAREAPriv->back_offset = pI830->BackBuffer.Start;
-   pSAREAPriv->back_size = pI830->BackBuffer.Size;
-   pSAREAPriv->depth_offset = pI830->DepthBuffer.Start;
-   pSAREAPriv->depth_size = pI830->DepthBuffer.Size;
-#if 0
-   pSAREAPriv->tex_offset = pI830->TexMem.Start;
-   pSAREAPriv->tex_size = pI830->TexMem.Size;
-#endif
-   pSAREAPriv->log_tex_granularity = pI830->TexGranularity;
-
-   ctx->driverClientMsg = malloc(sizeof(I830DRIRec));
-   ctx->driverClientMsgSize = sizeof(I830DRIRec);
-   pI830DRI = (I830DRIPtr)ctx->driverClientMsg;
-   pI830DRI->deviceID = pI830->Chipset;
-   pI830DRI->regsSize = I830_REG_SIZE;
-   pI830DRI->width = ctx->shared.virtualWidth;
-   pI830DRI->height = ctx->shared.virtualHeight;
-   pI830DRI->mem = ctx->shared.fbSize;
-   pI830DRI->cpp = ctx->cpp;
-
-   pI830DRI->bitsPerPixel = ctx->bpp;
-   pI830DRI->sarea_priv_offset = sizeof(drm_sarea_t);
-   
-   err = I830DRIDoMappings(ctx, pI830, pSAREAPriv);
-   if (err == FALSE)
-       return FALSE;
-
-   I830SetupMemoryTiling(ctx, pI830);
-
-   /* Quick hack to clear the front & back buffers.  Could also use
-    * the clear ioctl to do this, but would need to setup hw state
-    * first.
-    */
-   I830ClearScreen(ctx, pI830, pSAREAPriv);
-
-   I830SetRingRegs(ctx, pI830);
-
-   return TRUE;
-}
-
-
-/**
- * \brief Validate the fbdev mode.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Saves some registers and returns 1.
- *
- * \sa radeonValidateMode().
- */
-static int i830ValidateMode( const DRIDriverContext *ctx )
-{
-  return 1;
-}
-
-/**
- * \brief Examine mode returned by fbdev.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Restores registers that fbdev has clobbered and returns 1.
- *
- * \sa i810ValidateMode().
- */
-static int i830PostValidateMode( const DRIDriverContext *ctx )
-{
-  I830Rec *pI830 = ctx->driverPrivate;
-
-  I830SetRingRegs(ctx, pI830);
-  return 1;
-}
-
-
-/**
- * \brief Initialize the framebuffer device mode
- *
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Fills in \p info with some default values and some information from \p ctx
- * and then calls I810ScreenInit() for the screen initialization.
- * 
- * Before exiting clears the framebuffer memory accessing it directly.
- */
-static int i830InitFBDev( DRIDriverContext *ctx )
-{
-  I830Rec *pI830 = calloc(1, sizeof(I830Rec));
-  int i;
-
-   {
-      int  dummy = ctx->shared.virtualWidth;
-
-      switch (ctx->bpp / 8) {
-      case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
-      case 2: dummy = (ctx->shared.virtualWidth +  31) &  ~31; break;
-      case 3:
-      case 4: dummy = (ctx->shared.virtualWidth +  15) &  ~15; break;
-      }
-
-      ctx->shared.virtualWidth = dummy;
-      ctx->shared.Width = ctx->shared.virtualWidth;
-   }
-
-
-   for (i = 0; pitches[i] != 0; i++) {
-     if (pitches[i] >= ctx->shared.virtualWidth) {
-       ctx->shared.virtualWidth = pitches[i];
-       break;
-     }
-   }
-
-   ctx->driverPrivate = (void *)pI830;
-   
-   pI830->LpRing = calloc(1, sizeof(I830RingBuffer));
-   pI830->Chipset = ctx->chipset;
-   pI830->LinearAddr = ctx->FBStart;
-
-   if (!I830ScreenInit( ctx, pI830 ))
-      return 0;
-
-   
-   return 1;
-}
-
-
-/**
- * \brief The screen is being closed, so clean up any state and free any
- * resources used by the DRI.
- *
- * \param ctx display handle.
- *
- * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver
- * private data.
- */
-static void i830HaltFBDev( DRIDriverContext *ctx )
-{
-  drmI830Sarea *pSAREAPriv;
-  I830Rec *pI830 = ctx->driverPrivate;
-
-   if (pI830->irq) {
-       drmCtlUninstHandler(ctx->drmFD);
-       pI830->irq = 0;   }
-
-   I830CleanupDma(ctx);
-
-  pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + 
-				sizeof(drm_sarea_t));
-
-  I830DRIUnmapScreenRegions(ctx, pI830, pSAREAPriv);
-  drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
-  drmClose(ctx->drmFD);
-  
-  if (ctx->driverPrivate) {
-    free(ctx->driverPrivate);
-    ctx->driverPrivate = 0;
-  }
-}
-
-
-extern void i810NotifyFocus( int );
-
-/**
- * \brief Exported driver interface for Mini GLX.
- *
- * \sa DRIDriverRec.
- */
-const struct DRIDriverRec __driDriver = {
-   i830ValidateMode,
-   i830PostValidateMode,
-   i830InitFBDev,
-   i830HaltFBDev,
-   NULL,//I830EngineShutdown,
-   NULL, //I830EngineRestore,  
-#ifndef _EMBEDDED
-   0,
-#else
-   i810NotifyFocus, 
-#endif
-};
diff --git a/src/mesa/drivers/dri/mga/server/mga_dri.c b/src/mesa/drivers/dri/mga/server/mga_dri.c
deleted file mode 100644
index bc575e62ee..0000000000
--- a/src/mesa/drivers/dri/mga/server/mga_dri.c
+++ /dev/null
@@ -1,1088 +0,0 @@
-
-/*
- * Copyright 2000 VA Linux Systems Inc., Fremont, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES
- * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *    Keith Whitwell <keith@tungstengraphics.com>
- *    Gareth Hughes <gareth@valinux.com>
- */
-
-#include <errno.h>
-#include <unistd.h>
-#include <string.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <inttypes.h>
-
-#include "driver.h"
-#include "drm.h"
-#include "memops.h"
-
-#include "mga_reg.h"
-#include "mga.h"
-#include "mga_macros.h"
-#include "mga_dri.h"
-
-
-/* Quiescence, locking
- */
-#define MGA_TIMEOUT		2048
-
-static void MGAWaitForIdleDMA( struct DRIDriverContextRec *ctx, MGAPtr pMga )
-{
-   drm_lock_t lock;
-   int ret;
-   int i = 0;
-
-   memset( &lock, 0, sizeof(lock) );
-
-   for (;;) {
-      do {
-         /* first ask for quiescent and flush */
-         lock.flags = DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH;
-         do {
-	    ret = drmCommandWrite( ctx->drmFD, DRM_MGA_FLUSH,
-                                   &lock, sizeof( lock ) );
-         } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY );
-
-         /* if it's still busy just try quiescent */
-         if ( ret == -EBUSY ) { 
-            lock.flags = DRM_LOCK_QUIESCENT;
-            do {
-	       ret = drmCommandWrite( ctx->drmFD, DRM_MGA_FLUSH,
-                                      &lock, sizeof( lock ) );
-            } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY );
-         }
-      } while ( ( ret == -EBUSY ) && ( i++ < MGA_TIMEOUT ) );
-
-      if ( ret == 0 )
-	 return;
-
-      fprintf( stderr,
-               "[dri] Idle timed out, resetting engine...\n" );
-
-      drmCommandNone( ctx->drmFD, DRM_MGA_RESET );
-   }
-}
-
-static unsigned int mylog2( unsigned int n )
-{
-   unsigned int log2 = 1;
-   while ( n > 1 ) n >>= 1, log2++;
-   return log2;
-}
-
-static int MGADRIAgpInit(struct DRIDriverContextRec *ctx, MGAPtr pMga)
-{
-   unsigned long mode;
-   unsigned int vendor, device;
-   int ret, count, i;
-
-   if(pMga->agpSize < 12)pMga->agpSize = 12;
-   if(pMga->agpSize > 64)pMga->agpSize = 64; /* cap */
-
-   /* FIXME: Make these configurable...
-    */
-   pMga->agp.size = pMga->agpSize * 1024 * 1024;
-
-   pMga->warp.offset = 0;
-   pMga->warp.size = MGA_WARP_UCODE_SIZE;
-
-   pMga->primary.offset = (pMga->warp.offset +
-				    pMga->warp.size);
-   pMga->primary.size = 1024 * 1024;
-
-   pMga->buffers.offset = (pMga->primary.offset +
-				    pMga->primary.size);
-   pMga->buffers.size = MGA_NUM_BUFFERS * MGA_BUFFER_SIZE;
-
-
-   pMga->agpTextures.offset = (pMga->buffers.offset +
-                                    pMga->buffers.size);
-
-   pMga->agpTextures.size = pMga->agp.size -
-                                     pMga->agpTextures.offset;
-
-   if ( drmAgpAcquire( ctx->drmFD ) < 0 ) {
-     fprintf( stderr, "[agp] AGP not available\n" );
-      return 0;
-   }
-
-   mode   = drmAgpGetMode( ctx->drmFD );        /* Default mode */
-   vendor = drmAgpVendorId( ctx->drmFD );
-   device = drmAgpDeviceId( ctx->drmFD );
-
-   mode &= ~MGA_AGP_MODE_MASK;
-   switch ( pMga->agpMode ) {
-   case 4:
-      mode |= MGA_AGP_4X_MODE;
-   case 2:
-      mode |= MGA_AGP_2X_MODE;
-   case 1:
-   default:
-      mode |= MGA_AGP_1X_MODE;
-   }
-
-#if 0
-   fprintf( stderr,
-            "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n",
-            mode, vendor, device,
-            ctx->pciVendor,
-            ctx->pciChipType );
-#endif
-
-   if ( drmAgpEnable( ctx->drmFD, mode ) < 0 ) {
-     fprintf( stderr, "[agp] AGP not enabled\n" );
-      drmAgpRelease( ctx->drmFD );
-      return 0;
-   }
-
-   if ( pMga->Chipset == PCI_CHIP_MGAG200 ) {
-      switch ( pMga->agpMode ) {
-      case 2:
-	 fprintf( stderr,
-		     "[drm] Enabling AGP 2x PLL encoding\n" );
-	 OUTREG( MGAREG_AGP_PLL, MGA_AGP2XPLL_ENABLE );
-	 break;
-
-      case 1:
-      default:
-	 fprintf( stderr,
-		     "[drm] Disabling AGP 2x PLL encoding\n" );
-	 OUTREG( MGAREG_AGP_PLL, MGA_AGP2XPLL_DISABLE );
-	 pMga->agpMode = 1;
-	 break;
-      }
-   }
-
-   ret = drmAgpAlloc( ctx->drmFD, pMga->agp.size,
-		      0, NULL, &pMga->agp.handle );
-   if ( ret < 0 ) {
-      fprintf( stderr, "[agp] Out of memory (%d)\n", ret );
-      drmAgpRelease( ctx->drmFD );
-      return 0;
-   }
-   fprintf( stderr,
-	       "[agp] %d kB allocated with handle 0x%08x\n",
-	       pMga->agp.size/1024, (unsigned int)pMga->agp.handle );
-
-   if ( drmAgpBind( ctx->drmFD, pMga->agp.handle, 0 ) < 0 ) {
-      fprintf( stderr, "[agp] Could not bind memory\n" );
-      drmAgpFree( ctx->drmFD, pMga->agp.handle );
-      drmAgpRelease( ctx->drmFD );
-      return 0;
-   }
-
-   /* WARP microcode space
-    */
-   if ( drmAddMap( ctx->drmFD,
-		   pMga->warp.offset,
-		   pMga->warp.size,
-		   DRM_AGP, DRM_READ_ONLY,
-		   &pMga->warp.handle ) < 0 ) {
-      fprintf( stderr,
-		  "[agp] Could not add WARP microcode mapping\n" );
-      return 0;
-   }
-   fprintf( stderr,
- 	       "[agp] WARP microcode handle = 0x%08x\n",
-	       pMga->warp.handle );
-
-   if ( drmMap( ctx->drmFD,
-		pMga->warp.handle,
-		pMga->warp.size,
-		&pMga->warp.map ) < 0 ) {
-      fprintf( stderr,
-		  "[agp] Could not map WARP microcode\n" );
-      return 0;
-   }
-   fprintf( stderr,
-	       "[agp] WARP microcode mapped at 0x%08lx\n",
-	       (unsigned long)pMga->warp.map );
-
-   /* Primary DMA space
-    */
-   if ( drmAddMap( ctx->drmFD,
-		   pMga->primary.offset,
-		   pMga->primary.size,
-		   DRM_AGP, DRM_READ_ONLY,
-		   &pMga->primary.handle ) < 0 ) {
-      fprintf( stderr,
-		  "[agp] Could not add primary DMA mapping\n" );
-      return 0;
-   }
-   fprintf( stderr,
- 	       "[agp] Primary DMA handle = 0x%08x\n",
-	       pMga->primary.handle );
-
-   if ( drmMap( ctx->drmFD,
-		pMga->primary.handle,
-		pMga->primary.size,
-		&pMga->primary.map ) < 0 ) {
-      fprintf( stderr,
-		  "[agp] Could not map primary DMA\n" );
-      return 0;
-   }
-   fprintf( stderr,
-	       "[agp] Primary DMA mapped at 0x%08lx\n",
-	       (unsigned long)pMga->primary.map );
-
-   /* DMA buffers
-    */
-   if ( drmAddMap( ctx->drmFD,
-		   pMga->buffers.offset,
-		   pMga->buffers.size,
-		   DRM_AGP, 0,
-		   &pMga->buffers.handle ) < 0 ) {
-      fprintf( stderr,
-		  "[agp] Could not add DMA buffers mapping\n" );
-      return 0;
-   }
-   fprintf( stderr,
- 	       "[agp] DMA buffers handle = 0x%08x\n",
-	       pMga->buffers.handle );
-
-   if ( drmMap( ctx->drmFD,
-		pMga->buffers.handle,
-		pMga->buffers.size,
-		&pMga->buffers.map ) < 0 ) {
-      fprintf( stderr,
-		  "[agp] Could not map DMA buffers\n" );
-      return 0;
-   }
-   fprintf( stderr,
-	       "[agp] DMA buffers mapped at 0x%08lx\n",
-	       (unsigned long)pMga->buffers.map );
-
-   count = drmAddBufs( ctx->drmFD,
-		       MGA_NUM_BUFFERS, MGA_BUFFER_SIZE,
-		       DRM_AGP_BUFFER, pMga->buffers.offset );
-   if ( count <= 0 ) {
-      fprintf( stderr,
-		  "[drm] failure adding %d %d byte DMA buffers\n",
-		  MGA_NUM_BUFFERS, MGA_BUFFER_SIZE );
-      return 0;
-   }
-   fprintf( stderr,
-	       "[drm] Added %d %d byte DMA buffers\n",
-	       count, MGA_BUFFER_SIZE );
-
-   i = mylog2(pMga->agpTextures.size / MGA_NR_TEX_REGIONS);
-   if(i < MGA_LOG_MIN_TEX_REGION_SIZE)
-      i = MGA_LOG_MIN_TEX_REGION_SIZE;
-   pMga->agpTextures.size = (pMga->agpTextures.size >> i) << i;
-
-   if ( drmAddMap( ctx->drmFD,
-                   pMga->agpTextures.offset,
-                   pMga->agpTextures.size,
-                   DRM_AGP, 0,
-                   &pMga->agpTextures.handle ) < 0 ) {
-      fprintf( stderr,
-                  "[agp] Could not add agpTexture mapping\n" );
-      return 0;
-   }
-/* should i map it ? */
-   fprintf( stderr,
-               "[agp] agpTexture handle = 0x%08x\n",
-               pMga->agpTextures.handle );
-   fprintf( stderr,
-               "[agp] agpTexture size: %d kb\n", pMga->agpTextures.size/1024 );
-
-   return 1;
-}
-
-static int MGADRIMapInit( struct DRIDriverContextRec *ctx, MGAPtr pMga )
-{
-   pMga->registers.size = MGAIOMAPSIZE;
-
-   if ( drmAddMap( ctx->drmFD,
-		   (drm_handle_t)pMga->IOAddress,
-		   pMga->registers.size,
-		   DRM_REGISTERS, DRM_READ_ONLY,
-		   &pMga->registers.handle ) < 0 ) {
-      fprintf( stderr,
-		  "[drm] Could not add MMIO registers mapping\n" );
-      return 0;
-   }
-   fprintf( stderr,
-	       "[drm] Registers handle = 0x%08lx\n",
-	       pMga->registers.handle );
-
-   pMga->status.size = SAREA_MAX;
-
-   if ( drmAddMap( ctx->drmFD, 0, pMga->status.size,
-		   DRM_SHM, DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL,
-		   &pMga->status.handle ) < 0 ) {
-      fprintf( stderr,
-		  "[drm] Could not add status page mapping\n" );
-      return 0;
-   }
-   fprintf( stderr,
- 	       "[drm] Status handle = 0x%08x\n",
-	       pMga->status.handle );
-
-   if ( drmMap( ctx->drmFD,
-		pMga->status.handle,
-		pMga->status.size,
-		&pMga->status.map ) < 0 ) {
-      fprintf( stderr,
-		  "[agp] Could not map status page\n" );
-      return 0;
-   }
-   fprintf( stderr,
-	       "[agp] Status page mapped at 0x%08lx\n",
-	       (unsigned long)pMga->status.map );
-
-   return 1;
-}
-
-static int MGADRIKernelInit( struct DRIDriverContextRec *ctx, MGAPtr pMga )
-{
-   drm_mga_init_t init;
-   int ret;
-
-   memset( &init, 0, sizeof(init) );
-
-   init.func = MGA_INIT_DMA;
-   init.sarea_priv_offset = sizeof(drm_sarea_t);
-
-   switch ( pMga->Chipset ) {
-   case PCI_CHIP_MGAG550:
-   case PCI_CHIP_MGAG400:
-      init.chipset = MGA_CARD_TYPE_G400;
-      break;
-   case PCI_CHIP_MGAG200:
-   case PCI_CHIP_MGAG200_PCI:
-      init.chipset = MGA_CARD_TYPE_G200;
-      break;
-   default:
-      return 0;
-   }
-
-   init.sgram = 0; /* FIXME !pMga->HasSDRAM; */
-
-
-   switch (ctx->bpp)
-     {
-     case 16:
-       init.maccess = MGA_MACCESS_PW16;
-       break;
-     case 32:
-       init.maccess = MGA_MACCESS_PW32;
-       break;
-     default:
-       fprintf( stderr, "[mga] invalid bpp (%d)\n", ctx->bpp );
-       return 0;
-     }
-
-
-   init.fb_cpp		= ctx->bpp / 8;
-   init.front_offset	= pMga->frontOffset;
-   init.front_pitch	= pMga->frontPitch / init.fb_cpp;
-   init.back_offset	= pMga->backOffset;
-   init.back_pitch	= pMga->backPitch / init.fb_cpp;
-
-   init.depth_cpp	= ctx->bpp / 8;
-   init.depth_offset	= pMga->depthOffset;
-   init.depth_pitch	= pMga->depthPitch / init.depth_cpp;
-
-   init.texture_offset[0] = pMga->textureOffset;
-   init.texture_size[0] = pMga->textureSize;
-
-   init.fb_offset = ctx->shared.hFrameBuffer;
-   init.mmio_offset = pMga->registers.handle;
-   init.status_offset = pMga->status.handle;
-
-   init.warp_offset = pMga->warp.handle;
-   init.primary_offset = pMga->primary.handle;
-   init.buffers_offset = pMga->buffers.handle;
-
-   init.texture_offset[1] = pMga->agpTextures.handle;
-   init.texture_size[1] = pMga->agpTextures.size;
-
-   ret = drmCommandWrite( ctx->drmFD, DRM_MGA_INIT, &init, sizeof(init));
-   if ( ret < 0 ) {
-      fprintf( stderr,
-		  "[drm] Failed to initialize DMA! (%d)\n", ret );
-      return 0;
-   }
-
-   return 1;
-}
-
-static void MGADRIIrqInit(struct DRIDriverContextRec *ctx, MGAPtr pMga)
-{
-  if (!pMga->irq)
-    {
-      pMga->irq = drmGetInterruptFromBusID(ctx->drmFD,
-                                           ctx->pciBus,
-                                           ctx->pciDevice,
-                                           ctx->pciFunc);
-
-      fprintf(stderr, "[drm] got IRQ %d\n", pMga->irq);
-
-    if((drmCtlInstHandler(ctx->drmFD, pMga->irq)) != 0)
-      {
-        fprintf(stderr,
-                "[drm] failure adding irq handler, "
-                "there is a device already using that irq\n"
-                "[drm] falling back to irq-free operation\n");
-        pMga->irq = 0;
-      }
-    else
-      {
-        pMga->reg_ien = INREG( MGAREG_IEN );
-      }
-    }
-
-  if (pMga->irq)
-    fprintf(stderr,
-            "[drm] dma control initialized, using IRQ %d\n",
-            pMga->irq);
-}
-
-static int MGADRIBuffersInit( struct DRIDriverContextRec *ctx, MGAPtr pMga )
-{
-   pMga->drmBuffers = drmMapBufs( ctx->drmFD );
-   if ( !pMga->drmBuffers )
-     {
-       fprintf( stderr,
-                "[drm] Failed to map DMA buffers list\n" );
-       return 0;
-     }
-   
-   fprintf( stderr,
-            "[drm] Mapped %d DMA buffers\n",
-            pMga->drmBuffers->count );
-
-   return 1;
-}
-
-static int MGAMemoryInit( struct DRIDriverContextRec *ctx, MGAPtr pMga )
-{
-   int        width_bytes = ctx->shared.virtualWidth * ctx->cpp;
-   int        bufferSize  = ((ctx->shared.virtualHeight * width_bytes
-			      + MGA_BUFFER_ALIGN)
-			     & ~MGA_BUFFER_ALIGN);
-   int        depthSize   = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes
-			      + MGA_BUFFER_ALIGN)
-			     & ~MGA_BUFFER_ALIGN);
-   int        l;
-
-   pMga->frontOffset = 0;
-   pMga->frontPitch = ctx->shared.virtualWidth * ctx->cpp;
-
-   fprintf(stderr, 
-	   "Using %d MB AGP aperture\n", pMga->agpSize);
-   fprintf(stderr, 
-	   "Using %d MB for vertex/indirect buffers\n", pMga->buffers.size>>20);
-   fprintf(stderr, 
-	   "Using %d MB for AGP textures\n", pMga->agpTextures.size>>20);
-
-   /* Front, back and depth buffers - everything else texture??
-    */
-   pMga->textureSize = ctx->shared.fbSize - 2 * bufferSize - depthSize;
-
-   if (pMga->textureSize < 0) 
-      return 0;
-
-   l = mylog2( pMga->textureSize / MGA_NR_TEX_REGIONS );
-   if ( l < MGA_LOG_MIN_TEX_REGION_SIZE )
-      l = MGA_LOG_MIN_TEX_REGION_SIZE;
-
-   /* Round the texture size up to the nearest whole number of
-    * texture regions.  Again, be greedy about this, don't
-    * round down.
-    */
-   pMga->logTextureGranularity = l;
-   pMga->textureSize = (pMga->textureSize >> l) << l;
-
-   /* Set a minimum usable local texture heap size.  This will fit
-    * two 256x256x32bpp textures.
-    */
-   if (pMga->textureSize < 512 * 1024) {
-      pMga->textureOffset = 0;
-      pMga->textureSize = 0;
-   }
-
-   /* Reserve space for textures */
-   pMga->textureOffset = ((ctx->shared.fbSize - pMga->textureSize +
-			   MGA_BUFFER_ALIGN) &
-			  ~MGA_BUFFER_ALIGN);
-
-   /* Reserve space for the shared depth
-    * buffer.
-    */
-   pMga->depthOffset = ((pMga->textureOffset - depthSize +
-			 MGA_BUFFER_ALIGN) &
-			~MGA_BUFFER_ALIGN);
-   pMga->depthPitch = ctx->shared.virtualWidth * ctx->cpp;
-
-   pMga->backOffset = ((pMga->depthOffset - bufferSize +
-			MGA_BUFFER_ALIGN) &
-                        ~MGA_BUFFER_ALIGN);
-   pMga->backPitch = ctx->shared.virtualWidth * ctx->cpp;
-
-
-   fprintf(stderr, 
-	   "Will use back buffer at offset 0x%x\n",
-	   pMga->backOffset);
-   fprintf(stderr, 
-	   "Will use depth buffer at offset 0x%x\n",
-	   pMga->depthOffset);
-   fprintf(stderr, 
-	   "Will use %d kb for textures at offset 0x%x\n",
-	   pMga->textureSize/1024, pMga->textureOffset);
-
-   return 1;
-} 
-
-static int MGACheckDRMVersion( struct DRIDriverContextRec *ctx, MGAPtr pMga )
-{
-  drmVersionPtr version;
-
-  /* Check the MGA DRM version */
-  version = drmGetVersion(ctx->drmFD);
-  if ( version ) {
-    if ( version->version_major != 3 ||
-         version->version_minor < 0 ) {
-            /* incompatible drm version */
-      fprintf( stderr,
-               "[dri] MGADRIScreenInit failed because of a version mismatch.\n"
-               "[dri] mga.o kernel module version is %d.%d.%d but version 3.0.x is needed.\n"
-               "[dri] Disabling DRI.\n",
-               version->version_major,
-               version->version_minor,
-               version->version_patchlevel );
-      drmFreeVersion( version );
-      return 0;
-    }
-    drmFreeVersion( version );
-  }
-
-  return 1;
-}
-
-static void print_client_msg( MGADRIPtr pMGADRI )
-{
-  fprintf( stderr, "chipset:                  %d\n", pMGADRI->chipset );
-
-  fprintf( stderr, "width:                    %d\n", pMGADRI->width );
-  fprintf( stderr, "height:                   %d\n", pMGADRI->height );
-  fprintf( stderr, "mem:                      %d\n", pMGADRI->mem );
-  fprintf( stderr, "cpp:                      %d\n", pMGADRI->cpp );
-
-  fprintf( stderr, "agpMode:                  %d\n", pMGADRI->agpMode );
-
-  fprintf( stderr, "frontOffset:              %d\n", pMGADRI->frontOffset );
-  fprintf( stderr, "frontPitch:               %d\n", pMGADRI->frontPitch );
-
-  fprintf( stderr, "backOffset:               %d\n", pMGADRI->backOffset );
-  fprintf( stderr, "backPitch:                %d\n", pMGADRI->backPitch );
-
-  fprintf( stderr, "depthOffset:              %d\n", pMGADRI->depthOffset );
-  fprintf( stderr, "depthPitch:               %d\n", pMGADRI->depthPitch );
-
-  fprintf( stderr, "textureOffset:            %d\n", pMGADRI->textureOffset );
-  fprintf( stderr, "textureSize:              %d\n", pMGADRI->textureSize );
-
-  fprintf( stderr, "logTextureGranularity:    %d\n", pMGADRI->logTextureGranularity );
-  fprintf( stderr, "logAgpTextureGranularity: %d\n", pMGADRI->logAgpTextureGranularity );
-
-  fprintf( stderr, "agpTextureHandle:         %u\n", (unsigned int)pMGADRI->agpTextureOffset );
-  fprintf( stderr, "agpTextureSize:           %u\n", (unsigned int)pMGADRI->agpTextureSize );
-
-#if 0
-   pMGADRI->registers.handle	= pMga->registers.handle;
-   pMGADRI->registers.size	= pMga->registers.size;
-   pMGADRI->status.handle	= pMga->status.handle;
-   pMGADRI->status.size		= pMga->status.size;
-   pMGADRI->primary.handle	= pMga->primary.handle;
-   pMGADRI->primary.size	= pMga->primary.size;
-   pMGADRI->buffers.handle	= pMga->buffers.handle;
-   pMGADRI->buffers.size	= pMga->buffers.size;
-   pMGADRI->sarea_priv_offset = sizeof(drm_sarea_t);
-#endif
-}
-
-static int MGAScreenInit( struct DRIDriverContextRec *ctx, MGAPtr pMga )
-{
-  int       i;
-  int       err;
-  MGADRIPtr pMGADRI;
-
-  usleep(100);
-  /*assert(!ctx->IsClient);*/
-
-   {
-      int  width_bytes = (ctx->shared.virtualWidth * ctx->cpp);
-      int  maxy        = ctx->shared.fbSize / width_bytes;
-
-
-      if (maxy <= ctx->shared.virtualHeight * 3) {
-	 fprintf(stderr, 
-		 "Static buffer allocation failed -- "
-		 "need at least %d kB video memory (have %d kB)\n",
-		 (ctx->shared.virtualWidth * ctx->shared.virtualHeight *
-		  ctx->cpp * 3 + 1023) / 1024,
-		 ctx->shared.fbSize / 1024);
-	 return 0;
-      } 
-   }
-
-   switch(pMga->Chipset) {
-   case PCI_CHIP_MGAG550:
-   case PCI_CHIP_MGAG400:
-   case PCI_CHIP_MGAG200:
-#if 0
-   case PCI_CHIP_MGAG200_PCI:
-#endif
-      break;
-   default:
-      fprintf(stderr, "[drm] Direct rendering only supported with G200/G400/G550 AGP\n");
-      return 0;
-   }
-
-   fprintf( stderr,
-	       "[drm] bpp: %d depth: %d\n",
-            ctx->bpp, ctx->bpp /* FIXME: depth */ );
-
-   if ( (ctx->bpp / 8) != 2 &&
-	(ctx->bpp / 8) != 4 ) {
-      fprintf( stderr,
-		  "[dri] Direct rendering only supported in 16 and 32 bpp modes\n" );
-      return 0;
-   }
-
-   ctx->shared.SAREASize = SAREA_MAX;
-
-
-   /* Note that drmOpen will try to load the kernel module, if needed. */
-   ctx->drmFD = drmOpen("mga", NULL );
-   if (ctx->drmFD < 0) {
-      fprintf(stderr, "[drm] drmOpen failed\n");
-      return 0;
-   }
-
-   if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) {
-      fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
-	      ctx->drmFD, ctx->pciBusID, strerror(-err));
-      return 0;
-   }
-
-     
-   if (drmAddMap( ctx->drmFD,
-		  0,
-		  ctx->shared.SAREASize,
-		  DRM_SHM,
-		  DRM_CONTAINS_LOCK,
-		  &ctx->shared.hSAREA) < 0)
-   {
-      fprintf(stderr, "[drm] drmAddMap failed\n");
-      return 0;
-   }
-   fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n",
-	   ctx->shared.SAREASize, ctx->shared.hSAREA);
-
-   if (drmMap( ctx->drmFD,
-	       ctx->shared.hSAREA,
-	       ctx->shared.SAREASize,
-	       (drmAddressPtr)(&ctx->pSAREA)) < 0)
-   {
-      fprintf(stderr, "[drm] drmMap failed\n");
-      return 0;
-   }
-   memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
-   fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n",
-	   ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
-   
-   /* Need to AddMap the framebuffer and mmio regions here:
-    */
-   if (drmAddMap( ctx->drmFD,
-		  (drm_handle_t)ctx->FBStart,
-		  ctx->FBSize,
-		  DRM_FRAME_BUFFER,
-		  0,
-		  &ctx->shared.hFrameBuffer) < 0)
-   {
-      fprintf(stderr, "[drm] drmAddMap framebuffer failed\n");
-      return 0;
-   }
-   fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n",
-	   ctx->shared.hFrameBuffer);
-
-
-#if 0 /* will be done in MGADRIMapInit */
-   if (drmAddMap(ctx->drmFD, 
-		 ctx->FixedInfo.mmio_start,
-		 ctx->FixedInfo.mmio_len,
-		 DRM_REGISTERS, 
-		 DRM_READ_ONLY, 
-		 &pMga->registers.handle) < 0) {
-      fprintf(stderr, "[drm] drmAddMap mmio failed\n");	
-      return 0;
-   }
-   fprintf(stderr,
-	   "[drm] register handle = 0x%08lx\n", pMga->registers.handle);
-#endif
-
-
-   /* Check the mga DRM version */
-   if (!MGACheckDRMVersion(ctx, pMga)) {
-      return 0;
-   }
-
-   if ( !MGADRIAgpInit( ctx, pMga ) ) {
-      return 0;
-   }
-
-   if ( !MGADRIMapInit( ctx, pMga ) ) {
-      return 0;
-   }
-
-   /* Memory manager setup */
-   if (!MGAMemoryInit(ctx, pMga)) {
-      return 0;
-   }
-
-
-   /* Create a 'server' context so we can grab the lock for
-    * initialization ioctls.
-    */
-   if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) {
-      fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); 
-
-   /* Initialize the kernel data structures */
-   if (!MGADRIKernelInit(ctx, pMga)) {
-      fprintf(stderr, "MGADRIKernelInit failed\n");
-      DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext);
-      return 0;
-   }
-
-   /* Initialize the vertex buffers list */
-   if (!MGADRIBuffersInit(ctx, pMga)) {
-      fprintf(stderr, "MGADRIBuffersInit failed\n");
-      DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext);
-      return 0;
-   }
-
-   /* Initialize IRQ */
-   MGADRIIrqInit(ctx, pMga);
-
-
-   /* Initialize the SAREA private data structure */
-   {
-      drm_mga_sarea_t *pSAREAPriv;
-      pSAREAPriv = (drm_mga_sarea_t *)(((char*)ctx->pSAREA) + 
-					sizeof(drm_sarea_t));
-      memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-   }
-
-   /* Quick hack to clear the front & back buffers.  Could also use
-    * the clear ioctl to do this, but would need to setup hw state
-    * first.
-    */
-   drimemsetio((char *)ctx->FBAddress + pMga->frontOffset,
-	  0,
-	  pMga->frontPitch * ctx->shared.virtualHeight );
-
-   drimemsetio((char *)ctx->FBAddress + pMga->backOffset,
-	  0,
-	  pMga->backPitch * ctx->shared.virtualHeight );
-
-   /* Can release the lock now */
-/*   DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext);*/
-
-   /* This is the struct passed to radeon_dri.so for its initialization */
-   ctx->driverClientMsg = malloc(sizeof(MGADRIRec));
-   ctx->driverClientMsgSize = sizeof(MGADRIRec);
-
-   pMGADRI                    = (MGADRIPtr)ctx->driverClientMsg;
-
-
-   switch(pMga->Chipset) {
-   case PCI_CHIP_MGAG550:
-   case PCI_CHIP_MGAG400:
-      pMGADRI->chipset = MGA_CARD_TYPE_G400;
-      break;
-   case PCI_CHIP_MGAG200:
-   case PCI_CHIP_MGAG200_PCI:
-      pMGADRI->chipset = MGA_CARD_TYPE_G200;
-      break;
-   default:
-      return 0;
-   }
-   pMGADRI->width		= ctx->shared.virtualWidth;
-   pMGADRI->height		= ctx->shared.virtualHeight;
-   pMGADRI->mem			= ctx->shared.fbSize;
-   pMGADRI->cpp			= ctx->bpp / 8;
-
-   pMGADRI->agpMode		= pMga->agpMode;
-
-   pMGADRI->frontOffset		= pMga->frontOffset;
-   pMGADRI->frontPitch		= pMga->frontPitch;
-   pMGADRI->backOffset		= pMga->backOffset;
-   pMGADRI->backPitch		= pMga->backPitch;
-   pMGADRI->depthOffset		= pMga->depthOffset;
-   pMGADRI->depthPitch		= pMga->depthPitch;
-   pMGADRI->textureOffset	= pMga->textureOffset;
-   pMGADRI->textureSize		= pMga->textureSize;
-   pMGADRI->logTextureGranularity = pMga->logTextureGranularity;
-
-   i = mylog2( pMga->agpTextures.size / MGA_NR_TEX_REGIONS );
-   if ( i < MGA_LOG_MIN_TEX_REGION_SIZE )
-      i = MGA_LOG_MIN_TEX_REGION_SIZE;
-
-   pMGADRI->logAgpTextureGranularity = i;
-   pMGADRI->agpTextureOffset = (unsigned int)pMga->agpTextures.handle;
-   pMGADRI->agpTextureSize = (unsigned int)pMga->agpTextures.size;
-
-   pMGADRI->registers.handle	= pMga->registers.handle;
-   pMGADRI->registers.size	= pMga->registers.size;
-   pMGADRI->status.handle	= pMga->status.handle;
-   pMGADRI->status.size		= pMga->status.size;
-   pMGADRI->primary.handle	= pMga->primary.handle;
-   pMGADRI->primary.size	= pMga->primary.size;
-   pMGADRI->buffers.handle	= pMga->buffers.handle;
-   pMGADRI->buffers.size	= pMga->buffers.size;
-   pMGADRI->sarea_priv_offset = sizeof(drm_sarea_t);
-
-   print_client_msg( pMGADRI );
-
-   return 1;
-}
-
-
-/**
- * \brief Validate the fbdev mode.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Saves some registers and returns 1.
- *
- * \sa mgaValidateMode().
- */
-static int mgaValidateMode( const DRIDriverContext *ctx )
-{
-   return 1;
-}
-
-
-/**
- * \brief Examine mode returned by fbdev.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Restores registers that fbdev has clobbered and returns 1.
- *
- * \sa mgaValidateMode().
- */
-static int mgaPostValidateMode( const DRIDriverContext *ctx )
-{
-   return 1;
-}
-
-
-/**
- * \brief Initialize the framebuffer device mode
- *
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Fills in \p info with some default values and some information from \p ctx
- * and then calls MGAScreenInit() for the screen initialization.
- * 
- * Before exiting clears the framebuffer memomry accessing it directly.
- */
-static int mgaInitFBDev( struct DRIDriverContextRec *ctx )
-{
-   MGAPtr pMga = calloc(1, sizeof(*pMga));
-
-   {
-      int  dummy = ctx->shared.virtualWidth;
-
-      switch (ctx->bpp / 8) {
-      case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
-      case 2: dummy = (ctx->shared.virtualWidth +  31) &  ~31; break;
-      case 3:
-      case 4: dummy = (ctx->shared.virtualWidth +  15) &  ~15; break;
-      }
-
-      ctx->shared.virtualWidth = dummy;
-   }
-
-   ctx->driverPrivate = (void *)pMga;
-   
-   pMga->agpMode       = MGA_DEFAULT_AGP_MODE;
-   pMga->agpSize       = MGA_DEFAULT_AGP_SIZE;
-  
-   pMga->Chipset = ctx->chipset;
-
-   pMga->IOAddress = ctx->MMIOStart;
-   pMga->IOBase    = ctx->MMIOAddress;
-
-   pMga->frontPitch = ctx->shared.virtualWidth * ctx->cpp;
-
-   if (!MGAScreenInit( ctx, pMga ))
-      return 0;
-
-   return 1;
-}
-
-
-/**
- * \brief The screen is being closed, so clean up any state and free any
- * resources used by the DRI.
- *
- * \param ctx display handle.
- *
- * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver
- * private data.
- */
-static void mgaHaltFBDev( struct DRIDriverContextRec *ctx )
-{
-    drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
-    drmClose(ctx->drmFD);
-
-    if (ctx->driverPrivate) {
-       free(ctx->driverPrivate);
-       ctx->driverPrivate = NULL;
-    }
-}
-
-
-static int mgaEngineShutdown( const DRIDriverContext *ctx )
-{
-   fprintf(stderr, "%s() is not yet implemented!\n", __FUNCTION__);
-
-   return 1;
-}
-
-static int mgaEngineRestore( const DRIDriverContext *ctx )
-{
-   fprintf(stderr, "%s() is not yet implemented!\n", __FUNCTION__);
-
-   return 1;
-}
-
-/**
- * \brief Exported driver interface for Mini GLX.
- *
- * \sa DRIDriverRec.
- */
-struct DRIDriverRec __driDriver = {
-   mgaValidateMode,
-   mgaPostValidateMode,
-   mgaInitFBDev,
-   mgaHaltFBDev,
-   mgaEngineShutdown,
-   mgaEngineRestore,
-   0
-};
-
-
-
-
-#if 0
-void MGADRICloseScreen( ScreenPtr pScreen )
-{
-   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-   MGAPtr pMga = MGAPTR(pScrn);
-   MGADRIServerPrivatePtr pMga = pMga->DRIServerInfo;
-   drmMGAInit init;
-
-   if ( pMga->drmBuffers ) {
-      drmUnmapBufs( pMga->drmBuffers );
-      pMga->drmBuffers = NULL;
-   }
-
-   if (pMga->irq) {
-      drmCtlUninstHandler(ctx->drmFD);
-      pMga->irq = 0;
-   }
-
-   /* Cleanup DMA */
-   memset( &init, 0, sizeof(drmMGAInit) );
-   init.func = MGA_CLEANUP_DMA;
-   drmCommandWrite( ctx->drmFD, DRM_MGA_INIT, &init, sizeof(drmMGAInit) );
-
-   if ( pMga->status.map ) {
-      drmUnmap( pMga->status.map, pMga->status.size );
-      pMga->status.map = NULL;
-   }
-   if ( pMga->buffers.map ) {
-      drmUnmap( pMga->buffers.map, pMga->buffers.size );
-      pMga->buffers.map = NULL;
-   }
-   if ( pMga->primary.map ) {
-      drmUnmap( pMga->primary.map, pMga->primary.size );
-      pMga->primary.map = NULL;
-   }
-   if ( pMga->warp.map ) {
-      drmUnmap( pMga->warp.map, pMga->warp.size );
-      pMga->warp.map = NULL;
-   }
-
-   if ( pMga->agpTextures.map ) {
-      drmUnmap( pMga->agpTextures.map, pMga->agpTextures.size );
-      pMga->agpTextures.map = NULL;
-   }
-
-   if ( pMga->agp.handle ) {
-      drmAgpUnbind( ctx->drmFD, pMga->agp.handle );
-      drmAgpFree( ctx->drmFD, pMga->agp.handle );
-      pMga->agp.handle = 0;
-      drmAgpRelease( ctx->drmFD );
-   }
-
-   DRICloseScreen( pScreen );
-
-   if ( pMga->pDRIInfo ) {
-      if ( pMga->pDRIpMga->devPrivate ) {
-	 xfree( pMga->pDRIpMga->devPrivate );
-	 pMga->pDRIpMga->devPrivate = 0;
-      }
-      DRIDestroyInfoRec( pMga->pDRIInfo );
-      pMga->pDRIInfo = 0;
-   }
-   if ( pMga->DRIServerInfo ) {
-      xfree( pMga->DRIServerInfo );
-      pMga->DRIServerInfo = 0;
-   }
-   if ( pMga->pVisualConfigs ) {
-      xfree( pMga->pVisualConfigs );
-   }
-   if ( pMga->pVisualConfigsPriv ) {
-      xfree( pMga->pVisualConfigsPriv );
-   }
-}
-#endif
diff --git a/src/mesa/drivers/dri/r128/server/r128_dri.c b/src/mesa/drivers/dri/r128/server/r128_dri.c
deleted file mode 100644
index 6e3db948af..0000000000
--- a/src/mesa/drivers/dri/r128/server/r128_dri.c
+++ /dev/null
@@ -1,1112 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- *                      Precision Insight, Inc., Cedar Park, Texas, and
- *                      VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * Authors:
- *   Kevin E. Martin <martin@valinux.com>
- *   Rickard E. Faith <faith@valinux.com>
- *   Daryll Strauss <daryll@valinux.com>
- *   Gareth Hughes <gareth@valinux.com>
- *
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
-// Fix this to use kernel pci_ids.h when all of these IDs make it into the kernel 
-#include "pci_ids.h"
-
-#include "driver.h"
-#include "drm.h"
-#include "memops.h"
-
-#include "r128.h"
-#include "r128_dri.h"
-#include "r128_macros.h"
-#include "r128_reg.h"
-#include "r128_version.h"
-#include "r128_drm.h"
-
-static size_t r128_drm_page_size;
-
-/* Compute log base 2 of val. */
-static int R128MinBits(int val)
-{
-    int bits;
-
-    if (!val) return 1;
-    for (bits = 0; val; val >>= 1, ++bits);
-    return bits;
-}
-
-/* Initialize the AGP state.  Request memory for use in AGP space, and
-   initialize the Rage 128 registers to point to that memory. */
-static GLboolean R128DRIAgpInit(const DRIDriverContext *ctx)
-{
-    unsigned char *R128MMIO = ctx->MMIOAddress;
-    R128InfoPtr info = ctx->driverPrivate;
-    unsigned long mode;
-    unsigned int  vendor, device;
-    int           ret;
-    unsigned long cntl, chunk;
-    int           s, l;
-    int           flags;
-    unsigned long agpBase;
-
-    if (drmAgpAcquire(ctx->drmFD) < 0) {
-	fprintf(stderr, "[agp] AGP not available\n");
-	return GL_FALSE;
-    }
-
-				/* Modify the mode if the default mode is
-				   not appropriate for this particular
-				   combination of graphics card and AGP
-				   chipset. */
-
-    mode   = drmAgpGetMode(ctx->drmFD);        /* Default mode */
-    vendor = drmAgpVendorId(ctx->drmFD);
-    device = drmAgpDeviceId(ctx->drmFD);
-
-    mode &= ~R128_AGP_MODE_MASK;
-    switch (info->agpMode) {
-    case 4:          mode |= R128_AGP_4X_MODE;
-    case 2:          mode |= R128_AGP_2X_MODE;
-    case 1: default: mode |= R128_AGP_1X_MODE;
-    }
-
-    fprintf(stderr,
-	       "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n",
-	       mode, vendor, device,
-	       0x1002,
-	       info->Chipset);
-
-    if (drmAgpEnable(ctx->drmFD, mode) < 0) {
-	fprintf(stderr, "[agp] AGP not enabled\n");
-	drmAgpRelease(ctx->drmFD);
-	return GL_FALSE;
-    }
-
-    info->agpOffset = 0;
-
-    if ((ret = drmAgpAlloc(ctx->drmFD, info->agpSize*1024*1024, 0, NULL,
-			   &info->agpMemHandle)) < 0) {
-	fprintf(stderr, "[agp] Out of memory (%d)\n", ret);
-	drmAgpRelease(ctx->drmFD);
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[agp] %d kB allocated with handle 0x%08x\n",
-	       info->agpSize*1024, info->agpMemHandle);
-
-    if (drmAgpBind(ctx->drmFD, info->agpMemHandle, info->agpOffset) < 0) {
-	fprintf(stderr, "[agp] Could not bind\n");
-	drmAgpFree(ctx->drmFD, info->agpMemHandle);
-	drmAgpRelease(ctx->drmFD);
-	return GL_FALSE;
-    }
-
-				/* Initialize the CCE ring buffer data */
-    info->ringStart       = info->agpOffset;
-    info->ringMapSize     = info->ringSize*1024*1024 + r128_drm_page_size;
-    info->ringSizeLog2QW  = R128MinBits(info->ringSize*1024*1024/8) - 1;
-
-    info->ringReadOffset  = info->ringStart + info->ringMapSize;
-    info->ringReadMapSize = r128_drm_page_size;
-
-				/* Reserve space for vertex/indirect buffers */
-    info->bufStart        = info->ringReadOffset + info->ringReadMapSize;
-    info->bufMapSize      = info->bufSize*1024*1024;
-
-				/* Reserve the rest for AGP textures */
-    info->agpTexStart     = info->bufStart + info->bufMapSize;
-    s = (info->agpSize*1024*1024 - info->agpTexStart);
-    l = R128MinBits((s-1) / R128_NR_TEX_REGIONS);
-    if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY;
-    info->agpTexMapSize   = (s >> l) << l;
-    info->log2AGPTexGran  = l;
-
-    if (info->CCESecure) flags = DRM_READ_ONLY;
-    else                  flags = 0;
-
-    if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize,
-		  DRM_AGP, flags, &info->ringHandle) < 0) {
-	fprintf(stderr,
-		   "[agp] Could not add ring mapping\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[agp] ring handle = 0x%08x\n", info->ringHandle);
-
-    if (drmMap(ctx->drmFD, info->ringHandle, info->ringMapSize,
-	       (drmAddressPtr)&info->ring) < 0) {
-	fprintf(stderr, "[agp] Could not map ring\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[agp] Ring mapped at 0x%08lx\n",
-	       (unsigned long)info->ring);
-
-    if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize,
-		  DRM_AGP, flags, &info->ringReadPtrHandle) < 0) {
-	fprintf(stderr,
-		   "[agp] Could not add ring read ptr mapping\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
- 	       "[agp] ring read ptr handle = 0x%08x\n",
-	       info->ringReadPtrHandle);
-
-    if (drmMap(ctx->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,
-	       (drmAddressPtr)&info->ringReadPtr) < 0) {
-	fprintf(stderr,
-		   "[agp] Could not map ring read ptr\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[agp] Ring read ptr mapped at 0x%08lx\n",
-	       (unsigned long)info->ringReadPtr);
-
-    if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize,
-		  DRM_AGP, 0, &info->bufHandle) < 0) {
-	fprintf(stderr,
-		   "[agp] Could not add vertex/indirect buffers mapping\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[agp] vertex/indirect buffers handle = 0x%08lx\n",
-	       info->bufHandle);
-
-    if (drmMap(ctx->drmFD, info->bufHandle, info->bufMapSize,
-	       (drmAddressPtr)&info->buf) < 0) {
-	fprintf(stderr,
-		   "[agp] Could not map vertex/indirect buffers\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[agp] Vertex/indirect buffers mapped at 0x%08lx\n",
-	       (unsigned long)info->buf);
-
-    if (drmAddMap(ctx->drmFD, info->agpTexStart, info->agpTexMapSize,
-		  DRM_AGP, 0, &info->agpTexHandle) < 0) {
-	fprintf(stderr,
-		   "[agp] Could not add AGP texture map mapping\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[agp] AGP texture map handle = 0x%08lx\n",
-	       info->agpTexHandle);
-
-    if (drmMap(ctx->drmFD, info->agpTexHandle, info->agpTexMapSize,
-	       (drmAddressPtr)&info->agpTex) < 0) {
-	fprintf(stderr,
-		   "[agp] Could not map AGP texture map\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[agp] AGP Texture map mapped at 0x%08lx\n",
-	       (unsigned long)info->agpTex);
-
-				/* Initialize Rage 128's AGP registers */
-    cntl  = INREG(R128_AGP_CNTL);
-    cntl &= ~R128_AGP_APER_SIZE_MASK;
-    switch (info->agpSize) {
-    case 256: cntl |= R128_AGP_APER_SIZE_256MB; break;
-    case 128: cntl |= R128_AGP_APER_SIZE_128MB; break;
-    case  64: cntl |= R128_AGP_APER_SIZE_64MB;  break;
-    case  32: cntl |= R128_AGP_APER_SIZE_32MB;  break;
-    case  16: cntl |= R128_AGP_APER_SIZE_16MB;  break;
-    case   8: cntl |= R128_AGP_APER_SIZE_8MB;   break;
-    case   4: cntl |= R128_AGP_APER_SIZE_4MB;   break;
-    default:
-	fprintf(stderr,
-		   "[agp] Illegal aperture size %d kB\n",
-		   info->agpSize*1024);
-	return GL_FALSE;
-    }
-    agpBase = drmAgpBase(ctx->drmFD);
-    OUTREG(R128_AGP_BASE, agpBase); 
-    OUTREG(R128_AGP_CNTL, cntl);
-
-				/* Disable Rage 128's PCIGART registers */
-    chunk = INREG(R128_BM_CHUNK_0_VAL);
-    chunk &= ~(R128_BM_PTR_FORCE_TO_PCI |
-	       R128_BM_PM4_RD_FORCE_TO_PCI |
-	       R128_BM_GLOBAL_FORCE_TO_PCI);
-    OUTREG(R128_BM_CHUNK_0_VAL, chunk);
-
-    OUTREG(R128_PCI_GART_PAGE, 1); /* Ensure AGP GART is used (for now) */
-
-    return GL_TRUE;
-}
-
-static GLboolean R128DRIPciInit(const DRIDriverContext *ctx)
-{
-    R128InfoPtr info = ctx->driverPrivate;
-    unsigned char *R128MMIO = ctx->MMIOAddress;
-    uint32_t chunk;
-    int ret;
-    int flags;
-
-    info->agpOffset = 0;
-
-    ret = drmScatterGatherAlloc(ctx->drmFD, info->agpSize*1024*1024,
-				&info->pciMemHandle);
-    if (ret < 0) {
-	fprintf(stderr, "[pci] Out of memory (%d)\n", ret);
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[pci] %d kB allocated with handle 0x%08x\n",
-	       info->agpSize*1024, info->pciMemHandle);
-
-				/* Initialize the CCE ring buffer data */
-    info->ringStart       = info->agpOffset;
-    info->ringMapSize     = info->ringSize*1024*1024 + r128_drm_page_size;
-    info->ringSizeLog2QW  = R128MinBits(info->ringSize*1024*1024/8) - 1;
-
-    info->ringReadOffset  = info->ringStart + info->ringMapSize;
-    info->ringReadMapSize = r128_drm_page_size;
-
-				/* Reserve space for vertex/indirect buffers */
-    info->bufStart        = info->ringReadOffset + info->ringReadMapSize;
-    info->bufMapSize      = info->bufSize*1024*1024;
-
-    flags = DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL;
-
-    if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize,
-		  DRM_SCATTER_GATHER, flags, &info->ringHandle) < 0) {
-	fprintf(stderr,
-		   "[pci] Could not add ring mapping\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[pci] ring handle = 0x%08lx\n", info->ringHandle);
-
-    if (drmMap(ctx->drmFD, info->ringHandle, info->ringMapSize,
-	       (drmAddressPtr)&info->ring) < 0) {
-	fprintf(stderr, "[pci] Could not map ring\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[pci] Ring mapped at 0x%08lx\n",
-	       (unsigned long)info->ring);
-    fprintf(stderr,
-	       "[pci] Ring contents 0x%08lx\n",
-	       *(unsigned long *)info->ring);
-
-    if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize,
-		  DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) {
-	fprintf(stderr,
-		   "[pci] Could not add ring read ptr mapping\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[pci] ring read ptr handle = 0x%08lx\n",
-	       info->ringReadPtrHandle);
-
-    if (drmMap(ctx->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,
-	       (drmAddressPtr)&info->ringReadPtr) < 0) {
-	fprintf(stderr,
-		   "[pci] Could not map ring read ptr\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[pci] Ring read ptr mapped at 0x%08lx\n",
-	       (unsigned long)info->ringReadPtr);
-    fprintf(stderr,
-	       "[pci] Ring read ptr contents 0x%08lx\n",
-	       *(unsigned long *)info->ringReadPtr);
-
-    if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize,
-		  DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) {
-	fprintf(stderr,
-		   "[pci] Could not add vertex/indirect buffers mapping\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[pci] vertex/indirect buffers handle = 0x%08lx\n",
-	       info->bufHandle);
-
-    if (drmMap(ctx->drmFD, info->bufHandle, info->bufMapSize,
-	       (drmAddressPtr)&info->buf) < 0) {
-	fprintf(stderr,
-		   "[pci] Could not map vertex/indirect buffers\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[pci] Vertex/indirect buffers mapped at 0x%08lx\n",
-	       (unsigned long)info->buf);
-    fprintf(stderr,
-	       "[pci] Vertex/indirect buffers contents 0x%08lx\n",
-	       *(unsigned long *)info->buf);
-
-    if (!info->IsPCI) {
-	/* This is really an AGP card, force PCI GART mode */
-        chunk = INREG(R128_BM_CHUNK_0_VAL);
-        chunk |= (R128_BM_PTR_FORCE_TO_PCI |
-		  R128_BM_PM4_RD_FORCE_TO_PCI |
-		  R128_BM_GLOBAL_FORCE_TO_PCI);
-        OUTREG(R128_BM_CHUNK_0_VAL, chunk);
-        OUTREG(R128_PCI_GART_PAGE, 0); /* Ensure PCI GART is used */
-    }
-
-    return GL_TRUE;
-}
-
-/* Add a map for the MMIO registers that will be accessed by any
-   DRI-based clients. */
-static GLboolean R128DRIMapInit(const DRIDriverContext *ctx)
-{
-    R128InfoPtr info = ctx->driverPrivate;
-    int flags;
-
-    if (info->CCESecure) flags = DRM_READ_ONLY;
-    else                 flags = 0;
-
-				/* Map registers */
-    if (drmAddMap(ctx->drmFD, ctx->MMIOStart, ctx->MMIOSize,
-		  DRM_REGISTERS, flags, &info->registerHandle) < 0) {
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[drm] register handle = 0x%08x\n", info->registerHandle);
-
-    return GL_TRUE;
-}
-
-/* Initialize the kernel data structures. */
-static int R128DRIKernelInit(const DRIDriverContext *ctx)
-{
-    R128InfoPtr info = ctx->driverPrivate;
-    drm_r128_init_t drmInfo;
-
-    memset( &drmInfo, 0, sizeof(&drmInfo) );
-
-    drmInfo.func                = R128_INIT_CCE;
-    drmInfo.sarea_priv_offset   = sizeof(drm_sarea_t);
-    drmInfo.is_pci              = info->IsPCI;
-    drmInfo.cce_mode            = info->CCEMode;
-    drmInfo.cce_secure          = info->CCESecure;
-    drmInfo.ring_size           = info->ringSize*1024*1024;
-    drmInfo.usec_timeout        = info->CCEusecTimeout;
-
-    drmInfo.fb_bpp              = ctx->bpp;
-    drmInfo.depth_bpp           = ctx->bpp;
-
-    drmInfo.front_offset        = info->frontOffset;
-    drmInfo.front_pitch         = info->frontPitch;
-
-    drmInfo.back_offset         = info->backOffset;
-    drmInfo.back_pitch          = info->backPitch;
-
-    drmInfo.depth_offset        = info->depthOffset;
-    drmInfo.depth_pitch         = info->depthPitch;
-    drmInfo.span_offset         = info->spanOffset;
-
-    drmInfo.fb_offset           = info->LinearAddr;
-    drmInfo.mmio_offset         = info->registerHandle;
-    drmInfo.ring_offset         = info->ringHandle;
-    drmInfo.ring_rptr_offset    = info->ringReadPtrHandle;
-    drmInfo.buffers_offset      = info->bufHandle;
-    drmInfo.agp_textures_offset = info->agpTexHandle;
-
-    if (drmCommandWrite(ctx->drmFD, DRM_R128_INIT,
-                        &drmInfo, sizeof(drmInfo)) < 0)
-        return GL_FALSE;
-
-    return GL_TRUE;
-}
-
-/* Add a map for the vertex buffers that will be accessed by any
-   DRI-based clients. */
-static GLboolean R128DRIBufInit(const DRIDriverContext *ctx)
-{
-    R128InfoPtr info = ctx->driverPrivate;
-				/* Initialize vertex buffers */
-    if (info->IsPCI) {
-	info->bufNumBufs = drmAddBufs(ctx->drmFD,
-				      info->bufMapSize / R128_BUFFER_SIZE,
-				      R128_BUFFER_SIZE,
-				      DRM_SG_BUFFER,
-				      info->bufStart);
-    } else {
-	info->bufNumBufs = drmAddBufs(ctx->drmFD,
-				      info->bufMapSize / R128_BUFFER_SIZE,
-				      R128_BUFFER_SIZE,
-				      DRM_AGP_BUFFER,
-				      info->bufStart);
-    }
-    if (info->bufNumBufs <= 0) {
-	fprintf(stderr,
-		   "[drm] Could not create vertex/indirect buffers list\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[drm] Added %d %d byte vertex/indirect buffers\n",
-	       info->bufNumBufs, R128_BUFFER_SIZE);
-
-    if (!(info->buffers = drmMapBufs(ctx->drmFD))) {
-	fprintf(stderr,
-		   "[drm] Failed to map vertex/indirect buffers list\n");
-	return GL_FALSE;
-    }
-    fprintf(stderr,
-	       "[drm] Mapped %d vertex/indirect buffers\n",
-	       info->buffers->count);
-
-    return GL_TRUE;
-}
-
-static void R128DRIIrqInit(const DRIDriverContext *ctx)
-{
-   R128InfoPtr info = ctx->driverPrivate;
-   unsigned char *R128MMIO = ctx->MMIOAddress;
-   
-   if (!info->irq) {
-       info->irq = drmGetInterruptFromBusID(
-	   ctx->drmFD,
-	   ctx->pciBus,
-	   ctx->pciDevice,
-	   ctx->pciFunc);
-
-      if((drmCtlInstHandler(ctx->drmFD, info->irq)) != 0) {
-	 fprintf(stderr,
-		    "[drm] failure adding irq handler, "
-		    "there is a device already using that irq\n"
-		    "[drm] falling back to irq-free operation\n");
-	 info->irq = 0;
-      } else {
-          info->gen_int_cntl = INREG( R128_GEN_INT_CNTL );
-      }
-   }
-
-   if (info->irq)
-      fprintf(stderr,
-		 "[drm] dma control initialized, using IRQ %d\n",
-		 info->irq);
-}
-
-static int R128CCEStop(const DRIDriverContext *ctx)
-{
-    R128InfoPtr info = ctx->driverPrivate;
-    drm_r128_cce_stop_t stop;
-    int            ret, i;
-
-    stop.flush = 1;
-    stop.idle  = 1;
-
-    ret = drmCommandWrite( ctx->drmFD, DRM_R128_CCE_STOP,
-                           &stop, sizeof(stop) );
-
-    if ( ret == 0 ) {
-        return 0;
-    } else if ( errno != EBUSY ) {
-        return -errno;
-    }
-
-    stop.flush = 0;
-
-    i = 0;
-    do {
-        ret = drmCommandWrite( ctx->drmFD, DRM_R128_CCE_STOP,
-                               &stop, sizeof(stop) );
-    } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
-
-    if ( ret == 0 ) {
-        return 0;
-    } else if ( errno != EBUSY ) {
-        return -errno;
-    }
-
-    stop.idle = 0;
-
-    if ( drmCommandWrite( ctx->drmFD, DRM_R128_CCE_STOP,
-                          &stop, sizeof(stop) )) {
-        return -errno;
-    } else {
-        return 0;
-    }
-}
-
-/* Initialize the CCE state, and start the CCE (if used by the X server) */
-static void R128DRICCEInit(const DRIDriverContext *ctx)
-{
-   R128InfoPtr info = ctx->driverPrivate;
-
-				/* Turn on bus mastering */
-    info->BusCntl &= ~R128_BUS_MASTER_DIS;
-
-				/* CCEMode is initialized in r128_driver.c */
-    switch (info->CCEMode) {
-    case R128_PM4_NONPM4:                 info->CCEFifoSize = 0;   break;
-    case R128_PM4_192PIO:                 info->CCEFifoSize = 192; break;
-    case R128_PM4_192BM:                  info->CCEFifoSize = 192; break;
-    case R128_PM4_128PIO_64INDBM:         info->CCEFifoSize = 128; break;
-    case R128_PM4_128BM_64INDBM:          info->CCEFifoSize = 128; break;
-    case R128_PM4_64PIO_128INDBM:         info->CCEFifoSize = 64;  break;
-    case R128_PM4_64BM_128INDBM:          info->CCEFifoSize = 64;  break;
-    case R128_PM4_64PIO_64VCBM_64INDBM:   info->CCEFifoSize = 64;  break;
-    case R128_PM4_64BM_64VCBM_64INDBM:    info->CCEFifoSize = 64;  break;
-    case R128_PM4_64PIO_64VCPIO_64INDPIO: info->CCEFifoSize = 64;  break;
-    }
-
-    /* Make sure the CCE is on for the X server */
-    R128CCE_START(ctx, info);
-}
-
-
-static int R128MemoryInit(const DRIDriverContext *ctx)
-{
-   R128InfoPtr info = ctx->driverPrivate;
-   int        width_bytes = ctx->shared.virtualWidth * ctx->cpp;
-   int        cpp         = ctx->cpp;
-   int        bufferSize  = ((ctx->shared.virtualHeight * width_bytes
-			      + R128_BUFFER_ALIGN)
-			     & ~R128_BUFFER_ALIGN);
-   int        depthSize   = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes
-			      + R128_BUFFER_ALIGN)
-			     & ~R128_BUFFER_ALIGN);
-   int        l;
-
-   info->frontOffset = 0;
-   info->frontPitch = ctx->shared.virtualWidth;
-
-   fprintf(stderr, 
-	   "Using %d MB AGP aperture\n", info->agpSize);
-   fprintf(stderr, 
-	   "Using %d MB for the ring buffer\n", info->ringSize);
-   fprintf(stderr, 
-	   "Using %d MB for vertex/indirect buffers\n", info->bufSize);
-   fprintf(stderr, 
-	   "Using %d MB for AGP textures\n", info->agpTexSize);
-
-   /* Front, back and depth buffers - everything else texture??
-    */
-   info->textureSize = ctx->shared.fbSize - 2 * bufferSize - depthSize;
-
-   if (info->textureSize < 0) 
-      return 0;
-
-   l = R128MinBits((info->textureSize-1) / R128_NR_TEX_REGIONS);
-   if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY;
-
-   /* Round the texture size up to the nearest whole number of
-    * texture regions.  Again, be greedy about this, don't
-    * round down.
-    */
-   info->log2TexGran = l;
-   info->textureSize = (info->textureSize >> l) << l;
-
-   /* Set a minimum usable local texture heap size.  This will fit
-    * two 256x256x32bpp textures.
-    */
-   if (info->textureSize < 512 * 1024) {
-      info->textureOffset = 0;
-      info->textureSize = 0;
-   }
-
-   /* Reserve space for textures */
-   info->textureOffset = ((ctx->shared.fbSize - info->textureSize +
-			   R128_BUFFER_ALIGN) &
-			  ~R128_BUFFER_ALIGN);
-
-   /* Reserve space for the shared depth
-    * buffer.
-    */
-   info->depthOffset = ((info->textureOffset - depthSize +
-			 R128_BUFFER_ALIGN) &
-			~R128_BUFFER_ALIGN);
-   info->depthPitch = ctx->shared.virtualWidth;
-
-   info->backOffset = ((info->depthOffset - bufferSize +
-			R128_BUFFER_ALIGN) &
-		       ~R128_BUFFER_ALIGN);
-   info->backPitch = ctx->shared.virtualWidth;
-
-
-   fprintf(stderr, 
-	   "Will use back buffer at offset 0x%x\n",
-	   info->backOffset);
-   fprintf(stderr, 
-	   "Will use depth buffer at offset 0x%x\n",
-	   info->depthOffset);
-   fprintf(stderr, 
-	   "Will use %d kb for textures at offset 0x%x\n",
-	   info->textureSize/1024, info->textureOffset);
-
-   return 1;
-} 
-
-
-/* Initialize the screen-specific data structures for the DRI and the
-   Rage 128.  This is the main entry point to the device-specific
-   initialization code.  It calls device-independent DRI functions to
-   create the DRI data structures and initialize the DRI state. */
-static GLboolean R128DRIScreenInit(DRIDriverContext *ctx)
-{
-    R128InfoPtr info = ctx->driverPrivate;
-    R128DRIPtr    pR128DRI;
-    int           err, major, minor, patch;
-    drmVersionPtr version;
-    drm_r128_sarea_t *pSAREAPriv;
-
-    switch (ctx->bpp) {
-    case 8:
-	/* These modes are not supported (yet). */
-    case 15:
-    case 24:
-	fprintf(stderr,
-		   "[dri] R128DRIScreenInit failed (depth %d not supported).  "
-		   "[dri] Disabling DRI.\n", ctx->bpp);
-	return GL_FALSE;
-
-	/* Only 16 and 32 color depths are supports currently. */
-    case 16:
-    case 32:
-	break;
-    }
-    r128_drm_page_size = getpagesize();
-    
-    info->registerSize = ctx->MMIOSize;
-    ctx->shared.SAREASize = SAREA_MAX;
-
-    /* Note that drmOpen will try to load the kernel module, if needed. */
-    ctx->drmFD = drmOpen("r128", NULL );
-    if (ctx->drmFD < 0) {
-	fprintf(stderr, "[drm] drmOpen failed\n");
-	return 0;
-    }
-    
-    /* Check the r128 DRM version */
-    version = drmGetVersion(ctx->drmFD);
-    if (version) {
-	if (version->version_major != 2 ||
-	    version->version_minor < 2) {
-	    /* incompatible drm version */
-	    fprintf(stderr,
-		"[dri] R128DRIScreenInit failed because of a version mismatch.\n"
-		"[dri] r128.o kernel module version is %d.%d.%d but version 2.2 or greater is needed.\n"
-		"[dri] Disabling the DRI.\n",
-		version->version_major,
-		version->version_minor,
-		version->version_patchlevel);
-	    drmFreeVersion(version);
-	    return GL_FALSE;
-	}
-	info->drmMinor = version->version_minor;
-	drmFreeVersion(version);
-    }
-    
-    if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) {
-	fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
-		ctx->drmFD, ctx->pciBusID, strerror(-err));
-	return 0;
-    }
-    
-   if (drmAddMap( ctx->drmFD,
-		  0,
-		  ctx->shared.SAREASize,
-		  DRM_SHM,
-		  DRM_CONTAINS_LOCK,
-		  &ctx->shared.hSAREA) < 0)
-   {
-      fprintf(stderr, "[drm] drmAddMap failed\n");
-      return 0;
-   }
-   fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n",
-	   ctx->shared.SAREASize, ctx->shared.hSAREA);
-
-   if (drmMap( ctx->drmFD,
-	       ctx->shared.hSAREA,
-	       ctx->shared.SAREASize,
-	       (drmAddressPtr)(&ctx->pSAREA)) < 0)
-   {
-      fprintf(stderr, "[drm] drmMap failed\n");
-      return 0;
-   }
-   memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
-   fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n",
-	   ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
-   
-   /* Need to AddMap the framebuffer and mmio regions here:
-    */
-   if (drmAddMap( ctx->drmFD,
-		  (drm_handle_t)ctx->FBStart,
-		  ctx->FBSize,
-		  DRM_FRAME_BUFFER,
-		  0,
-		  &ctx->shared.hFrameBuffer) < 0)
-   {
-      fprintf(stderr, "[drm] drmAddMap framebuffer failed\n");
-      return 0;
-   }
-
-   fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n",
-	   ctx->shared.hFrameBuffer);
-
-   if (!R128MemoryInit(ctx))
-	return GL_FALSE;
-   
-				/* Initialize AGP */
-    if (!info->IsPCI && !R128DRIAgpInit(ctx)) {
-	info->IsPCI = GL_TRUE;
-	fprintf(stderr,
-		   "[agp] AGP failed to initialize -- falling back to PCI mode.\n");
-	fprintf(stderr,
-		   "[agp] Make sure you have the agpgart kernel module loaded.\n");
-    }
-
-				/* Initialize PCIGART */
-    if (info->IsPCI && !R128DRIPciInit(ctx)) {
-	return GL_FALSE;
-    }
-
-				/* DRIScreenInit doesn't add all the
-				   common mappings.  Add additional
-				   mappings here. */
-    if (!R128DRIMapInit(ctx)) {
-	return GL_FALSE;
-    }
-
-   /* Create a 'server' context so we can grab the lock for
-    * initialization ioctls.
-    */
-   if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) {
-      fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); 
-
-    /* Initialize the kernel data structures */
-    if (!R128DRIKernelInit(ctx)) {
-	return GL_FALSE;
-    }
-
-    /* Initialize the vertex buffers list */
-    if (!R128DRIBufInit(ctx)) {
-	return GL_FALSE;
-    }
-
-    /* Initialize IRQ */
-    R128DRIIrqInit(ctx);
-
-    /* Initialize and start the CCE if required */
-    R128DRICCEInit(ctx);
-
-   /* Quick hack to clear the front & back buffers.  Could also use
-    * the clear ioctl to do this, but would need to setup hw state
-    * first.
-    */
-   drimemsetio((char *)ctx->FBAddress + info->frontOffset,
-	  0,
-	  info->frontPitch * ctx->cpp * ctx->shared.virtualHeight );
-
-   drimemsetio((char *)ctx->FBAddress + info->backOffset,
-	  0,
-	  info->backPitch * ctx->cpp * ctx->shared.virtualHeight );
-    
-    pSAREAPriv = (drm_r128_sarea_t *)(((char*)ctx->pSAREA) + 
-					sizeof(drm_sarea_t));
-    memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-
-   /* This is the struct passed to radeon_dri.so for its initialization */
-   ctx->driverClientMsg = malloc(sizeof(R128DRIRec));
-   ctx->driverClientMsgSize = sizeof(R128DRIRec);
-   
-    pR128DRI                    = (R128DRIPtr)ctx->driverClientMsg;
-    pR128DRI->deviceID          = info->Chipset;
-    pR128DRI->width             = ctx->shared.virtualWidth;
-    pR128DRI->height            = ctx->shared.virtualHeight;
-    pR128DRI->depth             = ctx->bpp;
-    pR128DRI->bpp               = ctx->bpp;
-
-    pR128DRI->IsPCI             = info->IsPCI;
-    pR128DRI->AGPMode           = info->agpMode;
-
-    pR128DRI->frontOffset       = info->frontOffset;
-    pR128DRI->frontPitch        = info->frontPitch;
-    pR128DRI->backOffset        = info->backOffset;
-    pR128DRI->backPitch         = info->backPitch;
-    pR128DRI->depthOffset       = info->depthOffset;
-    pR128DRI->depthPitch        = info->depthPitch;
-    pR128DRI->spanOffset        = info->spanOffset;
-    pR128DRI->textureOffset     = info->textureOffset;
-    pR128DRI->textureSize       = info->textureSize;
-    pR128DRI->log2TexGran       = info->log2TexGran;
-
-    pR128DRI->registerHandle    = info->registerHandle;
-    pR128DRI->registerSize      = info->registerSize;
-
-    pR128DRI->agpTexHandle      = info->agpTexHandle;
-    pR128DRI->agpTexMapSize     = info->agpTexMapSize;
-    pR128DRI->log2AGPTexGran    = info->log2AGPTexGran;
-    pR128DRI->agpTexOffset      = info->agpTexStart;
-    pR128DRI->sarea_priv_offset = sizeof(drm_sarea_t);
-
-    return GL_TRUE;
-}
-
-/* The screen is being closed, so clean up any state and free any
-   resources used by the DRI. */
-void R128DRICloseScreen(const DRIDriverContext *ctx)
-{
-    R128InfoPtr info = ctx->driverPrivate;
-    drm_r128_init_t drmInfo;
-
-    /* Stop the CCE if it is still in use */
-    R128CCE_STOP(ctx, info);
-
-    if (info->irq) {
-	drmCtlUninstHandler(ctx->drmFD);
-	info->irq = 0;
-    }
-
-    /* De-allocate vertex buffers */
-    if (info->buffers) {
-	drmUnmapBufs(info->buffers);
-	info->buffers = NULL;
-    }
-
-    /* De-allocate all kernel resources */
-    memset(&drmInfo, 0, sizeof(drmInfo));
-    drmInfo.func = R128_CLEANUP_CCE;
-    drmCommandWrite(ctx->drmFD, DRM_R128_INIT,
-                    &drmInfo, sizeof(drmInfo));
-
-    /* De-allocate all AGP resources */
-    if (info->agpTex) {
-	drmUnmap(info->agpTex, info->agpTexMapSize);
-	info->agpTex = NULL;
-    }
-    if (info->buf) {
-	drmUnmap(info->buf, info->bufMapSize);
-	info->buf = NULL;
-    }
-    if (info->ringReadPtr) {
-	drmUnmap(info->ringReadPtr, info->ringReadMapSize);
-	info->ringReadPtr = NULL;
-    }
-    if (info->ring) {
-	drmUnmap(info->ring, info->ringMapSize);
-	info->ring = NULL;
-    }
-    if (info->agpMemHandle != DRM_AGP_NO_HANDLE) {
-	drmAgpUnbind(ctx->drmFD, info->agpMemHandle);
-	drmAgpFree(ctx->drmFD, info->agpMemHandle);
-	info->agpMemHandle = 0;
-	drmAgpRelease(ctx->drmFD);
-    }
-    if (info->pciMemHandle) {
-	drmScatterGatherFree(ctx->drmFD, info->pciMemHandle);
-	info->pciMemHandle = 0;
-    }
-}
-
-static GLboolean R128PreInitDRI(const DRIDriverContext *ctx)
-{
-    R128InfoPtr info = ctx->driverPrivate;
-
-    /*info->CCEMode = R128_DEFAULT_CCE_PIO_MODE;*/
-    info->CCEMode = R128_DEFAULT_CCE_BM_MODE;
-    info->CCESecure = GL_TRUE;
-
-    info->agpMode        = R128_DEFAULT_AGP_MODE;
-    info->agpSize        = R128_DEFAULT_AGP_SIZE;
-    info->ringSize       = R128_DEFAULT_RING_SIZE;
-    info->bufSize        = R128_DEFAULT_BUFFER_SIZE;
-    info->agpTexSize     = R128_DEFAULT_AGP_TEX_SIZE;
-
-    info->CCEusecTimeout = R128_DEFAULT_CCE_TIMEOUT;
-
-    return GL_TRUE;
-}
-
-/**
- * \brief Initialize the framebuffer device mode
- *
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Fills in \p info with some default values and some information from \p ctx
- * and then calls R128ScreenInit() for the screen initialization.
- * 
- * Before exiting clears the framebuffer memory accessing it directly.
- */
-static int R128InitFBDev( DRIDriverContext *ctx )
-{
-   R128InfoPtr info = calloc(1, sizeof(*info));
-
-   {
-      int  dummy = ctx->shared.virtualWidth;
-
-      switch (ctx->bpp / 8) {
-      case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
-      case 2: dummy = (ctx->shared.virtualWidth +  31) &  ~31; break;
-      case 3:
-      case 4: dummy = (ctx->shared.virtualWidth +  15) &  ~15; break;
-      }
-
-      ctx->shared.virtualWidth = dummy;
-   }
-
-   ctx->driverPrivate = (void *)info;
-   
-   info->Chipset = ctx->chipset;
-
-   switch (info->Chipset) {
-   case PCI_DEVICE_ID_ATI_RAGE128_LE:
-   case PCI_DEVICE_ID_ATI_RAGE128_RE:
-   case PCI_DEVICE_ID_ATI_RAGE128_RK:
-   case PCI_DEVICE_ID_ATI_RAGE128_PD:
-   case PCI_DEVICE_ID_ATI_RAGE128_PP:
-   case PCI_DEVICE_ID_ATI_RAGE128_PR:
-       /* This is a PCI card */
-       info->IsPCI = GL_TRUE;
-       break;
-   default:
-       /* This is an AGP card */
-       info->IsPCI = GL_FALSE;
-       break;
-   }
-
-   info->frontPitch = ctx->shared.virtualWidth;
-   info->LinearAddr = ctx->FBStart & 0xfc000000;
-   
-   if (!R128PreInitDRI(ctx))
-       return 0;
-
-   if (!R128DRIScreenInit(ctx))
-      return 0;
-
-   return 1;
-}
-
-
-/**
- * \brief The screen is being closed, so clean up any state and free any
- * resources used by the DRI.
- *
- * \param ctx display handle.
- *
- * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver
- * private data.
- */
-static void R128HaltFBDev( DRIDriverContext *ctx )
-{
-    drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
-    drmClose(ctx->drmFD);
-
-    if (ctx->driverPrivate) {
-       free(ctx->driverPrivate);
-       ctx->driverPrivate = 0;
-    }
-}
-
-
-/**
- * \brief Validate the fbdev mode.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Saves some registers and returns 1.
- *
- * \sa R128PostValidateMode().
- */
-static int R128ValidateMode( const DRIDriverContext *ctx )
-{
-   return 1;
-}
-
-
-/**
- * \brief Examine mode returned by fbdev.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Restores registers that fbdev has clobbered and returns 1.
- *
- * \sa R128ValidateMode().
- */
-static int R128PostValidateMode( const DRIDriverContext *ctx )
-{
-   return 1;
-}
-
-
-/**
- * \brief Shutdown the drawing engine.
- *
- * \param ctx display handle
- *
- * Turns off the command processor engine & restores the graphics card
- * to a state that fbdev understands.
- */
-static int R128EngineShutdown( const DRIDriverContext *ctx )
-{
-    return 1;
-}
-
-/**
- * \brief Restore the drawing engine.
- *
- * \param ctx display handle
- *
- * Resets the graphics card and sets initial values for several registers of
- * the card's drawing engine.
- *
- * Turns on the R128 command processor engine (i.e., the ringbuffer).
- */
-static int R128EngineRestore( const DRIDriverContext *ctx )
-{
-   return 1;
-}
-
-
-/**
- * \brief Exported driver interface for Mini GLX.
- *
- * \sa DRIDriverRec.
- */
-const struct DRIDriverRec __driDriver = {
-   R128ValidateMode,
-   R128PostValidateMode,
-   R128InitFBDev,
-   R128HaltFBDev,
-   R128EngineShutdown,
-   R128EngineRestore,  
-   0,
-};
diff --git a/src/mesa/drivers/dri/r200/server/radeon_dri.c b/src/mesa/drivers/dri/r200/server/radeon_dri.c
deleted file mode 120000
index d05847d650..0000000000
--- a/src/mesa/drivers/dri/r200/server/radeon_dri.c
+++ /dev/null
@@ -1 +0,0 @@
-../../radeon/server/radeon_dri.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r300/server/radeon_dri.c b/src/mesa/drivers/dri/r300/server/radeon_dri.c
deleted file mode 120000
index d05847d650..0000000000
--- a/src/mesa/drivers/dri/r300/server/radeon_dri.c
+++ /dev/null
@@ -1 +0,0 @@
-../../radeon/server/radeon_dri.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r600/server/radeon_dri.c b/src/mesa/drivers/dri/r600/server/radeon_dri.c
deleted file mode 120000
index d05847d650..0000000000
--- a/src/mesa/drivers/dri/r600/server/radeon_dri.c
+++ /dev/null
@@ -1 +0,0 @@
-../../radeon/server/radeon_dri.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/radeon/server/radeon_dri.c b/src/mesa/drivers/dri/radeon/server/radeon_dri.c
deleted file mode 100644
index 7ead588dac..0000000000
--- a/src/mesa/drivers/dri/radeon/server/radeon_dri.c
+++ /dev/null
@@ -1,1337 +0,0 @@
-/**
- * \file server/radeon_dri.c
- * \brief File to perform the device-specific initialization tasks typically
- * done in the X server.
- *
- * Here they are converted to run in the client (or perhaps a standalone
- * process), and to work with the frame buffer device rather than the X
- * server infrastructure.
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
-
-#include "driver.h"
-#include "drm.h"
-#include "memops.h"
-
-#include "radeon.h"
-#include "radeon_dri.h"
-#include "radeon_macros.h"
-#include "radeon_reg.h"
-#include "drm_sarea.h"
-
-static size_t radeon_drm_page_size;
-
-static int RadeonSetParam(const DRIDriverContext *ctx, int param, int value)
-{
-   drm_radeon_setparam_t sp;
-
-   memset(&sp, 0, sizeof(sp));
-   sp.param = param;
-   sp.value = value;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_RADEON_SETPARAM, &sp, sizeof(sp))) {
-     return -1;
-   }
-
-   return 0;
-}
-
-/**
- * \brief Wait for free FIFO entries.
- *
- * \param ctx display handle.
- * \param entries number of free entries to wait.
- *
- * It polls the free entries from the chip until it reaches the requested value
- * or a timeout (3000 tries) occurs. Aborts the program if the FIFO times out.
- */
-static void RADEONWaitForFifo( const DRIDriverContext *ctx,
-			       int entries )
-{
-   unsigned char *RADEONMMIO = ctx->MMIOAddress;
-   int i;
-
-   for (i = 0; i < 3000; i++) {
-      int fifo_slots =
-	 INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK;
-      if (fifo_slots >= entries) return;
-   }
-
-   /* There are recoveries possible, but I haven't seen them work
-    * in practice:
-    */
-   fprintf(stderr, "FIFO timed out: %d entries, stat=0x%08x\n",
-	   INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK,
-	   INREG(RADEON_RBBM_STATUS));
-   exit(1);
-}
-
-/**
- * \brief Read a PLL register.
- *
- * \param ctx display handle.
- * \param addr PLL register index.
- *
- * \return value of the PLL register.
- */
-static unsigned int RADEONINPLL( const DRIDriverContext *ctx, int addr)
-{
-    unsigned char *RADEONMMIO = ctx->MMIOAddress;
-    unsigned int data;
-
-    OUTREG8(RADEON_CLOCK_CNTL_INDEX, addr & 0x3f);
-    data = INREG(RADEON_CLOCK_CNTL_DATA);
-
-    return data;
-}
-
-/**
- * \brief Reset graphics card to known state.
- *
- * \param ctx display handle.
- *
- * Resets the values of several Radeon registers.
- */
-static void RADEONEngineReset( const DRIDriverContext *ctx )
-{
-   unsigned char *RADEONMMIO = ctx->MMIOAddress;
-   unsigned int clock_cntl_index;
-   unsigned int mclk_cntl;
-   unsigned int rbbm_soft_reset;
-   unsigned int host_path_cntl;
-   int i;
-
-   OUTREGP(RADEON_RB2D_DSTCACHE_CTLSTAT,
-	   RADEON_RB2D_DC_FLUSH_ALL,
-	   ~RADEON_RB2D_DC_FLUSH_ALL);
-   for (i = 0; i < 512; i++) {
-      if (!(INREG(RADEON_RB2D_DSTCACHE_CTLSTAT) & RADEON_RB2D_DC_BUSY))
-	 break;
-   }
-
-   clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX);
-
-   mclk_cntl = INPLL(ctx, RADEON_MCLK_CNTL);
-   OUTPLL(RADEON_MCLK_CNTL, (mclk_cntl |
-			     RADEON_FORCEON_MCLKA |
-			     RADEON_FORCEON_MCLKB |
-			     RADEON_FORCEON_YCLKA |
-			     RADEON_FORCEON_YCLKB |
-			     RADEON_FORCEON_MC |
-			     RADEON_FORCEON_AIC));
-
-   /* Soft resetting HDP thru RBBM_SOFT_RESET register can cause some
-    * unexpected behaviour on some machines.  Here we use
-    * RADEON_HOST_PATH_CNTL to reset it.
-    */
-   host_path_cntl = INREG(RADEON_HOST_PATH_CNTL);
-   rbbm_soft_reset = INREG(RADEON_RBBM_SOFT_RESET);
-
-   OUTREG(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset |
-				   RADEON_SOFT_RESET_CP |
-				   RADEON_SOFT_RESET_HI |
-				   RADEON_SOFT_RESET_SE |
-				   RADEON_SOFT_RESET_RE |
-				   RADEON_SOFT_RESET_PP |
-				   RADEON_SOFT_RESET_E2 |
-				   RADEON_SOFT_RESET_RB));
-   INREG(RADEON_RBBM_SOFT_RESET);
-   OUTREG(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset & 
-				   (unsigned int) ~(RADEON_SOFT_RESET_CP |
-						    RADEON_SOFT_RESET_HI |
-						    RADEON_SOFT_RESET_SE |
-						    RADEON_SOFT_RESET_RE |
-						    RADEON_SOFT_RESET_PP |
-						    RADEON_SOFT_RESET_E2 |
-						    RADEON_SOFT_RESET_RB)));
-   INREG(RADEON_RBBM_SOFT_RESET);
-
-   OUTREG(RADEON_HOST_PATH_CNTL, host_path_cntl | RADEON_HDP_SOFT_RESET);
-   INREG(RADEON_HOST_PATH_CNTL);
-   OUTREG(RADEON_HOST_PATH_CNTL, host_path_cntl);
-
-   OUTREG(RADEON_RBBM_SOFT_RESET, rbbm_soft_reset);
-
-   OUTREG(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index);
-   OUTPLL(RADEON_MCLK_CNTL, mclk_cntl);
-}
-
-/**
- * \brief Restore the drawing engine.
- *
- * \param ctx display handle
- *
- * Resets the graphics card and sets initial values for several registers of
- * the card's drawing engine.
- *
- * Turns on the radeon command processor engine (i.e., the ringbuffer).
- */
-static int RADEONEngineRestore( const DRIDriverContext *ctx )
-{
-   RADEONInfoPtr info = ctx->driverPrivate;
-   unsigned char *RADEONMMIO = ctx->MMIOAddress;
-   int pitch64, datatype, dp_gui_master_cntl, err;
-
-   fprintf(stderr, "%s\n", __FUNCTION__);
-
-   OUTREG(RADEON_RB3D_CNTL, 0);
-   RADEONEngineReset( ctx );
-
-   switch (ctx->bpp) {
-   case 16: datatype = 4; break;
-   case 32: datatype = 6; break;
-   default: return 0;
-   }
-
-   dp_gui_master_cntl =
-      ((datatype << RADEON_GMC_DST_DATATYPE_SHIFT)
-       | RADEON_GMC_CLR_CMP_CNTL_DIS);
-
-   pitch64 = ((ctx->shared.virtualWidth * (ctx->bpp / 8) + 0x3f)) >> 6;
-
-   RADEONWaitForFifo(ctx, 1);
-   OUTREG(RADEON_DEFAULT_OFFSET, ((INREG(RADEON_DEFAULT_OFFSET) & 0xC0000000)
-				  | (pitch64 << 22)));
-
-   RADEONWaitForFifo(ctx, 1);
-   OUTREG(RADEON_SURFACE_CNTL, RADEON_SURF_TRANSLATION_DIS); 
-
-   RADEONWaitForFifo(ctx, 1);
-   OUTREG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, (RADEON_DEFAULT_SC_RIGHT_MAX
-					   | RADEON_DEFAULT_SC_BOTTOM_MAX));
-
-   RADEONWaitForFifo(ctx, 1);
-   OUTREG(RADEON_DP_GUI_MASTER_CNTL, (dp_gui_master_cntl
-				      | RADEON_GMC_BRUSH_SOLID_COLOR
-				      | RADEON_GMC_SRC_DATATYPE_COLOR));
-
-   RADEONWaitForFifo(ctx, 7);
-   OUTREG(RADEON_DST_LINE_START,    0);
-   OUTREG(RADEON_DST_LINE_END,      0);
-   OUTREG(RADEON_DP_BRUSH_FRGD_CLR, 0xffffffff);
-   OUTREG(RADEON_DP_BRUSH_BKGD_CLR, 0);
-   OUTREG(RADEON_DP_SRC_FRGD_CLR,   0xffffffff);
-   OUTREG(RADEON_DP_SRC_BKGD_CLR,   0);
-   OUTREG(RADEON_DP_WRITE_MASK,     0xffffffff);
-   OUTREG(RADEON_AUX_SC_CNTL,       0);
-
-/*    RADEONWaitForIdleMMIO(ctx); */
-   usleep(100); 
-
-
-   OUTREG(RADEON_GEN_INT_CNTL, info->gen_int_cntl);
-   if (info->colorTiling)
-	   info->crtc_offset_cntl |= RADEON_CRTC_TILE_EN;
-   OUTREG(RADEON_CRTC_OFFSET_CNTL, info->crtc_offset_cntl);
-
-   /* Initialize and start the CP if required */
-   if ((err = drmCommandNone(ctx->drmFD, DRM_RADEON_CP_START)) != 0) {
-      fprintf(stderr, "%s: CP start %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   return 1;
-}
-
-
-/**
- * \brief Shutdown the drawing engine.
- *
- * \param ctx display handle
- *
- * Turns off the command processor engine & restores the graphics card
- * to a state that fbdev understands.
- */
-static int RADEONEngineShutdown( const DRIDriverContext *ctx )
-{
-   drm_radeon_cp_stop_t  stop;
-   int              ret, i;
-
-   stop.flush = 1;
-   stop.idle  = 1;
-
-   ret = drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_STOP, &stop, 
-			 sizeof(drm_radeon_cp_stop_t));
-
-   if (ret == 0) {
-      return 0;
-   } else if (errno != EBUSY) {
-      return -errno;
-   }
-
-   stop.flush = 0;
- 
-   i = 0;
-   do {
-      ret = drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_STOP, &stop, 
-			    sizeof(drm_radeon_cp_stop_t));
-   } while (ret && errno == EBUSY && i++ < 10);
-
-   if (ret == 0) {
-      return 0;
-   } else if (errno != EBUSY) {
-      return -errno;
-   }
-
-   stop.idle = 0;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_STOP,
-		       &stop, sizeof(drm_radeon_cp_stop_t))) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-/**
- * \brief Compute base 2 logarithm.
- *
- * \param val value.
- * 
- * \return base 2 logarithm of \p val.
- */
-static int RADEONMinBits(int val)
-{
-   int  bits;
-
-   if (!val) return 1;
-   for (bits = 0; val; val >>= 1, ++bits);
-   return bits;
-}
-
-/**
- * \brief Initialize the AGP state
- *
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return one on success, or zero on failure.
- * 
- * Acquires and enables the AGP device. Reserves memory in the AGP space for
- * the ring buffer, vertex buffers and textures. Initialize the Radeon
- * registers to point to that memory and add client mappings.
- */
-static int RADEONDRIAgpInit( const DRIDriverContext *ctx, RADEONInfoPtr info)
-{
-   unsigned char *RADEONMMIO = ctx->MMIOAddress;
-   unsigned long  mode;
-   int            ret;
-   int            s, l;
-
-   if (drmAgpAcquire(ctx->drmFD) < 0) {
-      fprintf(stderr, "[gart] AGP not available\n");
-      return 0;
-   }
-    
-   /* Modify the mode if the default mode is not appropriate for this
-    * particular combination of graphics card and AGP chipset.
-    */
-   mode   = drmAgpGetMode(ctx->drmFD);	/* Default mode */
-
-   /* Disable fast write entirely - too many lockups.
-    */
-   mode &= ~RADEON_AGP_MODE_MASK;
-   switch (ctx->agpmode) {
-   case 4:          mode |= RADEON_AGP_4X_MODE;
-   case 2:          mode |= RADEON_AGP_2X_MODE;
-   case 1: default: mode |= RADEON_AGP_1X_MODE;
-   }
-
-   if (drmAgpEnable(ctx->drmFD, mode) < 0) {
-      fprintf(stderr, "[gart] AGP not enabled\n");
-      drmAgpRelease(ctx->drmFD);
-      return 0;
-   }
-   else
-     fprintf(stderr, "[gart] AGP enabled at %dx\n", ctx->agpmode);
-
-   /* Workaround for some hardware bugs */
-   if (info->ChipFamily < CHIP_FAMILY_R200)
-      OUTREG(RADEON_AGP_CNTL, INREG(RADEON_AGP_CNTL) | 0x000e0000);
-
-   info->gartOffset = 0;
-
-   if ((ret = drmAgpAlloc(ctx->drmFD, info->gartSize*1024*1024, 0, NULL,
-			  &info->gartMemHandle)) < 0) {
-      fprintf(stderr, "[gart] Out of memory (%d)\n", ret);
-      drmAgpRelease(ctx->drmFD);
-      return 0;
-   }
-   fprintf(stderr,
-	   "[gart] %d kB allocated with handle 0x%08x\n",
-	   info->gartSize*1024, (unsigned)info->gartMemHandle);
-    
-   if (drmAgpBind(ctx->drmFD,
-		  info->gartMemHandle, info->gartOffset) < 0) {
-      fprintf(stderr, "[gart] Could not bind\n");
-      drmAgpFree(ctx->drmFD, info->gartMemHandle);
-      drmAgpRelease(ctx->drmFD);
-      return 0;
-   }
-
-   /* Initialize the CP ring buffer data */
-   info->ringStart       = info->gartOffset;
-   info->ringMapSize     = info->ringSize*1024*1024 + radeon_drm_page_size;
-
-   info->ringReadOffset  = info->ringStart + info->ringMapSize;
-   info->ringReadMapSize = radeon_drm_page_size;
-
-   /* Reserve space for vertex/indirect buffers */
-   info->bufStart        = info->ringReadOffset + info->ringReadMapSize;
-   info->bufMapSize      = info->bufSize*1024*1024;
-
-   /* Reserve the rest for AGP textures */
-   info->gartTexStart     = info->bufStart + info->bufMapSize;
-   s = (info->gartSize*1024*1024 - info->gartTexStart);
-   l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS);
-   if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY;
-   info->gartTexMapSize   = (s >> l) << l;
-   info->log2GARTTexGran  = l;
-
-   if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize,
-		 DRM_AGP, DRM_READ_ONLY, &info->ringHandle) < 0) {
-      fprintf(stderr, "[gart] Could not add ring mapping\n");
-      return 0;
-   }
-   fprintf(stderr, "[gart] ring handle = 0x%08x\n", info->ringHandle);
-    
-
-   if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize,
-		 DRM_AGP, DRM_READ_ONLY, &info->ringReadPtrHandle) < 0) {
-      fprintf(stderr,
-	      "[gart] Could not add ring read ptr mapping\n");
-      return 0;
-   }
-    
-   fprintf(stderr,
- 	   "[gart] ring read ptr handle = 0x%08lx\n",
-	   info->ringReadPtrHandle);
-    
-   if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize,
-		 DRM_AGP, 0, &info->bufHandle) < 0) {
-      fprintf(stderr,
-	      "[gart] Could not add vertex/indirect buffers mapping\n");
-      return 0;
-   }
-   fprintf(stderr,
- 	   "[gart] vertex/indirect buffers handle = 0x%08x\n",
-	   info->bufHandle);
-
-   if (drmAddMap(ctx->drmFD, info->gartTexStart, info->gartTexMapSize,
-		 DRM_AGP, 0, &info->gartTexHandle) < 0) {
-      fprintf(stderr,
-	      "[gart] Could not add AGP texture map mapping\n");
-      return 0;
-   }
-   fprintf(stderr,
- 	   "[gart] AGP texture map handle = 0x%08lx\n",
-	   info->gartTexHandle);
-
-   /* Initialize Radeon's AGP registers */
-   /* Ring buffer is at AGP offset 0 */
-   OUTREG(RADEON_AGP_BASE, info->ringHandle);
-
-   return 1;
-}
-
-/* Initialize the PCI GART state.  Request memory for use in PCI space,
- * and initialize the Radeon registers to point to that memory.
- */
-static int RADEONDRIPciInit(const DRIDriverContext *ctx, RADEONInfoPtr info)
-{
-    int  ret;
-    int  flags = DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL;
-    int            s, l;
-
-    ret = drmScatterGatherAlloc(ctx->drmFD, info->gartSize*1024*1024,
-				&info->gartMemHandle);
-    if (ret < 0) {
-	fprintf(stderr, "[pci] Out of memory (%d)\n", ret);
-	return 0;
-    }
-    fprintf(stderr,
-	       "[pci] %d kB allocated with handle 0x%08lx\n",
-	       info->gartSize*1024, info->gartMemHandle);
-
-   info->gartOffset = 0;
-   
-   /* Initialize the CP ring buffer data */
-   info->ringStart       = info->gartOffset;
-   info->ringMapSize     = info->ringSize*1024*1024 + radeon_drm_page_size;
-
-   info->ringReadOffset  = info->ringStart + info->ringMapSize;
-   info->ringReadMapSize = radeon_drm_page_size;
-
-   /* Reserve space for vertex/indirect buffers */
-   info->bufStart        = info->ringReadOffset + info->ringReadMapSize;
-   info->bufMapSize      = info->bufSize*1024*1024;
-
-   /* Reserve the rest for AGP textures */
-   info->gartTexStart     = info->bufStart + info->bufMapSize;
-   s = (info->gartSize*1024*1024 - info->gartTexStart);
-   l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS);
-   if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY;
-   info->gartTexMapSize   = (s >> l) << l;
-   info->log2GARTTexGran  = l;
-
-    if (drmAddMap(ctx->drmFD, info->ringStart, info->ringMapSize,
-		  DRM_SCATTER_GATHER, flags, &info->ringHandle) < 0) {
-	fprintf(stderr,
-		   "[pci] Could not add ring mapping\n");
-	return 0;
-    }
-    fprintf(stderr,
-	       "[pci] ring handle = 0x%08x\n", info->ringHandle);
-
-    if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize,
-		  DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) {
-	fprintf(stderr,
-		   "[pci] Could not add ring read ptr mapping\n");
-	return 0;
-    }
-    fprintf(stderr,
- 	       "[pci] ring read ptr handle = 0x%08lx\n",
-	       info->ringReadPtrHandle);
-
-    if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize,
-		  DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) {
-	fprintf(stderr,
-		   "[pci] Could not add vertex/indirect buffers mapping\n");
-	return 0;
-    }
-    fprintf(stderr,
- 	       "[pci] vertex/indirect buffers handle = 0x%08lx\n",
-	       info->bufHandle);
-
-    if (drmAddMap(ctx->drmFD, info->gartTexStart, info->gartTexMapSize,
-		  DRM_SCATTER_GATHER, 0, &info->gartTexHandle) < 0) {
-	fprintf(stderr,
-		   "[pci] Could not add GART texture map mapping\n");
-	return 0;
-    }
-    fprintf(stderr,
- 	       "[pci] GART texture map handle = 0x%08x\n",
-	       info->gartTexHandle);
-
-    return 1;
-}
-
-
-/**
- * \brief Initialize the kernel data structures and enable the CP engine.
- *
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return non-zero on success, or zero on failure.
- *
- * This function is a wrapper around the DRM_RADEON_CP_INIT command, passing
- * all the parameters in a drm_radeon_init_t structure.
- */
-static int RADEONDRIKernelInit( const DRIDriverContext *ctx,
-			       RADEONInfoPtr info)
-{
-   int cpp = ctx->bpp / 8;
-   drm_radeon_init_t  drmInfo;
-   int ret;
-
-   memset(&drmInfo, 0, sizeof(drm_radeon_init_t));
-
-   if ( (info->ChipFamily == CHIP_FAMILY_R200) ||
-	(info->ChipFamily == CHIP_FAMILY_RV250) ||
-	(info->ChipFamily == CHIP_FAMILY_M9) ||
-	(info->ChipFamily == CHIP_FAMILY_RV280) )
-      drmInfo.func             = RADEON_INIT_R200_CP;
-   else
-      drmInfo.func             = RADEON_INIT_CP;
-
-   /* This is the struct passed to the kernel module for its initialization */
-   drmInfo.sarea_priv_offset   = sizeof(drm_sarea_t);
-   drmInfo.is_pci              = ctx->isPCI;
-   drmInfo.cp_mode             = RADEON_DEFAULT_CP_BM_MODE;
-   drmInfo.gart_size            = info->gartSize*1024*1024;
-   drmInfo.ring_size           = info->ringSize*1024*1024;
-   drmInfo.usec_timeout        = 1000;
-   drmInfo.fb_bpp              = ctx->bpp;
-   drmInfo.depth_bpp           = ctx->bpp;
-   drmInfo.front_offset        = info->frontOffset;
-   drmInfo.front_pitch         = info->frontPitch * cpp;
-   drmInfo.back_offset         = info->backOffset;
-   drmInfo.back_pitch          = info->backPitch * cpp;
-   drmInfo.depth_offset        = info->depthOffset;
-   drmInfo.depth_pitch         = info->depthPitch * cpp;
-   drmInfo.fb_offset           = info->LinearAddr;
-   drmInfo.mmio_offset         = info->registerHandle;
-   drmInfo.ring_offset         = info->ringHandle;
-   drmInfo.ring_rptr_offset    = info->ringReadPtrHandle;
-   drmInfo.buffers_offset      = info->bufHandle;
-   drmInfo.gart_textures_offset = info->gartTexHandle;
-
-   ret = drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_INIT, &drmInfo, 
-			 sizeof(drm_radeon_init_t));
-
-   return ret >= 0;
-}
-
-
-/**
- * \brief Initialize the AGP heap.
- *
- * \param ctx display handle.
- * \param info driver private data.
- *
- * This function is a wrapper around the DRM_RADEON_INIT_HEAP command, passing
- * all the parameters in a drm_radeon_mem_init_heap structure.
- */
-static void RADEONDRIAgpHeapInit(const DRIDriverContext *ctx,
-				 RADEONInfoPtr info)
-{
-   drm_radeon_mem_init_heap_t drmHeap;
-
-   /* Start up the simple memory manager for gart space */
-   drmHeap.region = RADEON_MEM_REGION_GART;
-   drmHeap.start  = 0;
-   drmHeap.size   = info->gartTexMapSize;
-    
-   if (drmCommandWrite(ctx->drmFD, DRM_RADEON_INIT_HEAP,
-		       &drmHeap, sizeof(drmHeap))) {
-      fprintf(stderr,
-	      "[drm] Failed to initialized gart heap manager\n");
-   } else {
-      fprintf(stderr,
-	      "[drm] Initialized kernel gart heap manager, %d\n",
-	      info->gartTexMapSize);
-   }
-}
-
-/**
- * \brief Add a map for the vertex buffers that will be accessed by any
- * DRI-based clients.
- * 
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return one on success, or zero on failure.
- *
- * Calls drmAddBufs() with the previously allocated vertex buffers.
- */
-static int RADEONDRIBufInit( const DRIDriverContext *ctx, RADEONInfoPtr info )
-{
-   /* Initialize vertex buffers */
-   info->bufNumBufs = drmAddBufs(ctx->drmFD,
-				 info->bufMapSize / RADEON_BUFFER_SIZE,
-				 RADEON_BUFFER_SIZE,
-				 ctx->isPCI ? DRM_SG_BUFFER : DRM_AGP_BUFFER,
-				 info->bufStart);
-
-   if (info->bufNumBufs <= 0) {
-      fprintf(stderr,
-	      "[drm] Could not create vertex/indirect buffers list\n");
-      return 0;
-   }
-   fprintf(stderr,
-	   "[drm] Added %d %d byte vertex/indirect buffers\n",
-	   info->bufNumBufs, RADEON_BUFFER_SIZE);
-   
-   return 1;
-}
-
-/**
- * \brief Install an IRQ handler.
- * 
- * \param ctx display handle.
- * \param info driver private data.
- *
- * Attempts to install an IRQ handler via drmCtlInstHandler(), falling back to
- * IRQ-free operation on failure.
- */
-static void RADEONDRIIrqInit(const DRIDriverContext *ctx,
-			     RADEONInfoPtr info)
-{
-   if (!info->irq) {
-      info->irq = drmGetInterruptFromBusID(ctx->drmFD,
-					   ctx->pciBus,
-					   ctx->pciDevice,
-					   ctx->pciFunc);
-
-      if ((drmCtlInstHandler(ctx->drmFD, info->irq)) != 0) {
-	 fprintf(stderr,
-		 "[drm] failure adding irq handler, "
-		 "there is a device already using that irq\n"
-		 "[drm] falling back to irq-free operation\n");
-	 info->irq = 0;
-      }
-   }
-
-   if (info->irq)
-      fprintf(stderr,
-	      "[drm] dma control initialized, using IRQ %d\n",
-	      info->irq);
-}
-
-static int RADEONCheckDRMVersion( const DRIDriverContext *ctx,
-				  RADEONInfoPtr info )
-{
-   drmVersionPtr  version;
-
-   version = drmGetVersion(ctx->drmFD);
-   if (version) {
-      int req_minor, req_patch;
-
-      /* Need 1.8.x for proper cleanup-on-client-exit behaviour.
-       */
-      req_minor = 8;
-      req_patch = 0;	
-
-      if (version->version_major != 1 ||
-	  version->version_minor < req_minor ||
-	  (version->version_minor == req_minor && 
-	   version->version_patchlevel < req_patch)) {
-	 /* Incompatible drm version */
-	 fprintf(stderr,
-		 "[dri] RADEONDRIScreenInit failed because of a version "
-		 "mismatch.\n"
-		 "[dri] radeon.o kernel module version is %d.%d.%d "
-		 "but version 1.%d.%d or newer is needed.\n"
-		 "[dri] Disabling DRI.\n",
-		 version->version_major,
-		 version->version_minor,
-		 version->version_patchlevel,
-		 req_minor,
-		 req_patch);
-	 drmFreeVersion(version);
-	 return 0;
-      }
-
-      info->drmMinor = version->version_minor;
-      drmFreeVersion(version);
-   }
-
-   return 1;
-}
-
-static int RADEONMemoryInit( const DRIDriverContext *ctx, RADEONInfoPtr info )
-{
-   int        width_bytes = ctx->shared.virtualWidth * ctx->cpp;
-   int        cpp         = ctx->cpp;
-   int        bufferSize  = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes			     + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN);
-   int        depthSize   = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes
-			     + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN);
-   int        l;
-
-   info->frontOffset = 0;
-   info->frontPitch = ctx->shared.virtualWidth;
-
-   fprintf(stderr, 
-	   "Using %d MB AGP aperture\n", info->gartSize);
-   fprintf(stderr, 
-	   "Using %d MB for the ring buffer\n", info->ringSize);
-   fprintf(stderr, 
-	   "Using %d MB for vertex/indirect buffers\n", info->bufSize);
-   fprintf(stderr, 
-	   "Using %d MB for AGP textures\n", info->gartTexSize);
-
-   /* Front, back and depth buffers - everything else texture??
-    */
-   info->textureSize = ctx->shared.fbSize - 2 * bufferSize - depthSize;
-
-   if (ctx->colorTiling==1)
-   {
-	info->textureSize = ctx->shared.fbSize - ((ctx->shared.fbSize - info->textureSize + width_bytes * 16 - 1) / (width_bytes * 16)) * (width_bytes*16);
-   }
-
-   if (info->textureSize < 0) 
-      return 0;
-
-   l = RADEONMinBits((info->textureSize-1) / RADEON_NR_TEX_REGIONS);
-   if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY;
-
-   /* Round the texture size up to the nearest whole number of
-    * texture regions.  Again, be greedy about this, don't
-    * round down.
-    */
-   info->log2TexGran = l;
-   info->textureSize = (info->textureSize >> l) << l;
-
-   /* Set a minimum usable local texture heap size.  This will fit
-    * two 256x256x32bpp textures.
-    */
-   if (info->textureSize < 512 * 1024) {
-      info->textureOffset = 0;
-      info->textureSize = 0;
-   }
-
-   /* Reserve space for textures */
-   if (ctx->colorTiling==1)
-   {
-      info->textureOffset = ((ctx->shared.fbSize - info->textureSize) / 
-			(width_bytes * 16)) * (width_bytes*16);
-   }
-   else
-   {
-      info->textureOffset = ((ctx->shared.fbSize - info->textureSize +
-   	 		   RADEON_BUFFER_ALIGN) &
-			  ~RADEON_BUFFER_ALIGN);
-   }
-   /* Reserve space for the shared depth
-    * buffer.
-    */
-   info->depthOffset = ((info->textureOffset - depthSize +
-			 RADEON_BUFFER_ALIGN) &
-			~RADEON_BUFFER_ALIGN);
-   info->depthPitch = ctx->shared.virtualWidth;
-
-   info->backOffset = ((info->depthOffset - bufferSize +
-			RADEON_BUFFER_ALIGN) &
-		       ~RADEON_BUFFER_ALIGN);
-   info->backPitch = ctx->shared.virtualWidth;
-
-
-   fprintf(stderr, 
-	   "Will use back buffer at offset 0x%x\n",
-	   info->backOffset);
-   fprintf(stderr, 
-	   "Will use depth buffer at offset 0x%x\n",
-	   info->depthOffset);
-   fprintf(stderr, 
-	   "Will use %d kb for textures at offset 0x%x\n",
-	   info->textureSize/1024, info->textureOffset);
-
-   info->frontPitchOffset = (((info->frontPitch * cpp / 64) << 22) |
-			     (info->frontOffset >> 10));
-
-   info->backPitchOffset = (((info->backPitch * cpp / 64) << 22) |
-			    (info->backOffset >> 10));
-
-   info->depthPitchOffset = (((info->depthPitch * cpp / 64) << 22) |
-			     (info->depthOffset >> 10));
-
-   return 1;
-}
-
-static int RADEONColorTilingInit( const DRIDriverContext *ctx, RADEONInfoPtr info )
-{
-   int        width_bytes = ctx->shared.virtualWidth * ctx->cpp;
-   int        bufferSize  = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes			     + RADEON_BUFFER_ALIGN)
-			     & ~RADEON_BUFFER_ALIGN);
-   /* Setup color tiling */
-   if (info->drmMinor<14)
-      info->colorTiling=0;
-
-   if (info->colorTiling)
-   {
-
-      int colorTilingFlag;
-      drm_radeon_surface_alloc_t front,back;
-
-      RadeonSetParam(ctx, RADEON_SETPARAM_SWITCH_TILING, info->colorTiling ? 1 : 0);
-      
-      /* Setup the surfaces */
-      if (info->ChipFamily < CHIP_FAMILY_R200)
-         colorTilingFlag=RADEON_SURF_TILE_COLOR_MACRO;
-      else
-         colorTilingFlag=R200_SURF_TILE_COLOR_MACRO;
-
-      front.address = info->frontOffset;
-      front.size = bufferSize;
-      front.flags = (width_bytes) | colorTilingFlag;
-      drmCommandWrite(ctx->drmFD, DRM_RADEON_SURF_ALLOC, &front,sizeof(front)); 
- 
-      back.address = info->backOffset;
-      back.size = bufferSize;
-      back.flags = (width_bytes) | colorTilingFlag;
-      drmCommandWrite(ctx->drmFD, DRM_RADEON_SURF_ALLOC, &back,sizeof(back)); 
-
-   }
-   return 1;
-} 
-
-
-
-/**
- * Called at the start of each server generation.
- *
- * \param ctx display handle.
- * \param info driver private data.
- *
- * \return non-zero on success, or zero on failure.
- *
- * Performs static frame buffer allocation. Opens the DRM device and add maps
- * to the SAREA, framebuffer and MMIO regions. Fills in \p info with more
- * information. Creates a \e server context to grab the lock for the
- * initialization ioctls and calls the other initilization functions in this
- * file. Starts the CP engine via the DRM_RADEON_CP_START command.
- *
- * Setups a RADEONDRIRec structure to be passed to radeon_dri.so for its
- * initialization.
- */
-static int RADEONScreenInit( DRIDriverContext *ctx, RADEONInfoPtr info )
-{
-   RADEONDRIPtr   pRADEONDRI;
-   int err;
-
-   usleep(100);
-   /*assert(!ctx->IsClient);*/
-
-   {
-      int  width_bytes = (ctx->shared.virtualWidth * ctx->cpp);
-      int  maxy        = ctx->shared.fbSize / width_bytes;
-
-
-      if (maxy <= ctx->shared.virtualHeight * 3) {
-	 fprintf(stderr, 
-		 "Static buffer allocation failed -- "
-		 "need at least %d kB video memory (have %d kB)\n",
-		 (ctx->shared.virtualWidth * ctx->shared.virtualHeight *
-		  ctx->cpp * 3 + 1023) / 1024,
-		 ctx->shared.fbSize / 1024);
-	 return 0;
-      } 
-   }
-
-
-   if (info->ChipFamily >= CHIP_FAMILY_R300) {
-      fprintf(stderr, 
-	      "Direct rendering not yet supported on "
-	      "Radeon 9700 and newer cards\n");
-      return 0;
-   }
-   
-   radeon_drm_page_size = getpagesize();   
-
-   info->registerSize = ctx->MMIOSize;
-   ctx->shared.SAREASize = SAREA_MAX;
-
-   /* Note that drmOpen will try to load the kernel module, if needed. */
-   ctx->drmFD = drmOpen("radeon", NULL );
-   if (ctx->drmFD < 0) {
-      fprintf(stderr, "[drm] drmOpen failed\n");
-      return 0;
-   }
-
-   if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) {
-      fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
-	      ctx->drmFD, ctx->pciBusID, strerror(-err));
-      return 0;
-   }
-
-   if (drmAddMap( ctx->drmFD,
-		  0,
-		  ctx->shared.SAREASize,
-		  DRM_SHM,
-		  DRM_CONTAINS_LOCK,
-		  &ctx->shared.hSAREA) < 0)
-   {
-      fprintf(stderr, "[drm] drmAddMap failed\n");
-      return 0;
-   }
-   fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n",
-	   ctx->shared.SAREASize, ctx->shared.hSAREA);
-
-   if (drmMap( ctx->drmFD,
-	       ctx->shared.hSAREA,
-	       ctx->shared.SAREASize,
-	       (drmAddressPtr)(&ctx->pSAREA)) < 0)
-   {
-      fprintf(stderr, "[drm] drmMap failed\n");
-      return 0;
-   }
-   memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
-   fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n",
-	   ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
-   
-   /* Need to AddMap the framebuffer and mmio regions here:
-    */
-   if (drmAddMap( ctx->drmFD,
-		  (drm_handle_t)ctx->FBStart,
-		  ctx->FBSize,
-		  DRM_FRAME_BUFFER,
-#ifndef _EMBEDDED
-		  0,
-#else
-		  DRM_READ_ONLY,
-#endif
-		  &ctx->shared.hFrameBuffer) < 0)
-   {
-      fprintf(stderr, "[drm] drmAddMap framebuffer failed\n");
-      return 0;
-   }
-
-   fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n",
-	   ctx->shared.hFrameBuffer);
-
-
-
-   if (drmAddMap(ctx->drmFD, 
-		 ctx->MMIOStart,
-		 ctx->MMIOSize,
-		 DRM_REGISTERS, 
-		 DRM_READ_ONLY, 
-		 &info->registerHandle) < 0) {
-      fprintf(stderr, "[drm] drmAddMap mmio failed\n");	
-      return 0;
-   }
-   fprintf(stderr,
-	   "[drm] register handle = 0x%08lx\n", info->registerHandle);
-
-   /* Check the radeon DRM version */
-   if (!RADEONCheckDRMVersion(ctx, info)) {
-      return 0;
-   }
-
-   if (ctx->isPCI) {
-      /* Initialize PCI */
-      if (!RADEONDRIPciInit(ctx, info))
-         return 0;
-   }
-   else {
-      /* Initialize AGP */
-      if (!RADEONDRIAgpInit(ctx, info))
-         return 0;
-   }
-
-   /* Memory manager setup */
-   if (!RADEONMemoryInit(ctx, info)) {
-      return 0;
-   }
-
-   /* Create a 'server' context so we can grab the lock for
-    * initialization ioctls.
-    */
-   if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) {
-      fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); 
-
-   /* Initialize the kernel data structures */
-   if (!RADEONDRIKernelInit(ctx, info)) {
-      fprintf(stderr, "RADEONDRIKernelInit failed\n");
-      DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext);
-      return 0;
-   }
-
-   /* Initialize the vertex buffers list */
-   if (!RADEONDRIBufInit(ctx, info)) {
-      fprintf(stderr, "RADEONDRIBufInit failed\n");
-      DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext);
-      return 0;
-   }
-
-   RADEONColorTilingInit(ctx, info);
-
-   /* Initialize IRQ */
-   RADEONDRIIrqInit(ctx, info);
-
-   /* Initialize kernel gart memory manager */
-   RADEONDRIAgpHeapInit(ctx, info);
-
-   fprintf(stderr,"color tiling %sabled\n", info->colorTiling?"en":"dis");
-   fprintf(stderr,"page flipping %sabled\n", info->page_flip_enable?"en":"dis");
-   /* Initialize the SAREA private data structure */
-   {
-      drm_radeon_sarea_t *pSAREAPriv;
-      pSAREAPriv = (drm_radeon_sarea_t *)(((char*)ctx->pSAREA) + 
-					sizeof(drm_sarea_t));
-      memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-      pSAREAPriv->pfState = info->page_flip_enable;
-   }
-
-
-   /* Quick hack to clear the front & back buffers.  Could also use
-    * the clear ioctl to do this, but would need to setup hw state
-    * first.
-    */
-   drimemsetio((char *)ctx->FBAddress + info->frontOffset,
-	  0,
-	  info->frontPitch * ctx->cpp * ctx->shared.virtualHeight );
-
-   drimemsetio((char *)ctx->FBAddress + info->backOffset,
-	  0,
-	  info->backPitch * ctx->cpp * ctx->shared.virtualHeight );
-
-   /* This is the struct passed to radeon_dri.so for its initialization */
-   ctx->driverClientMsg = malloc(sizeof(RADEONDRIRec));
-   ctx->driverClientMsgSize = sizeof(RADEONDRIRec);
-   pRADEONDRI                    = (RADEONDRIPtr)ctx->driverClientMsg;
-   pRADEONDRI->deviceID          = info->Chipset;
-   pRADEONDRI->width             = ctx->shared.virtualWidth;
-   pRADEONDRI->height            = ctx->shared.virtualHeight;
-   pRADEONDRI->depth             = ctx->bpp; /* XXX: depth */
-   pRADEONDRI->bpp               = ctx->bpp;
-   pRADEONDRI->IsPCI             = ctx->isPCI;
-   pRADEONDRI->AGPMode           = ctx->agpmode;
-   pRADEONDRI->frontOffset       = info->frontOffset;
-   pRADEONDRI->frontPitch        = info->frontPitch;
-   pRADEONDRI->backOffset        = info->backOffset;
-   pRADEONDRI->backPitch         = info->backPitch;
-   pRADEONDRI->depthOffset       = info->depthOffset;
-   pRADEONDRI->depthPitch        = info->depthPitch;
-   pRADEONDRI->textureOffset     = info->textureOffset;
-   pRADEONDRI->textureSize       = info->textureSize;
-   pRADEONDRI->log2TexGran       = info->log2TexGran;
-   pRADEONDRI->registerHandle    = info->registerHandle;
-   pRADEONDRI->registerSize      = info->registerSize; 
-   pRADEONDRI->statusHandle      = info->ringReadPtrHandle;
-   pRADEONDRI->statusSize        = info->ringReadMapSize;
-   pRADEONDRI->gartTexHandle      = info->gartTexHandle;
-   pRADEONDRI->gartTexMapSize     = info->gartTexMapSize;
-   pRADEONDRI->log2GARTTexGran    = info->log2GARTTexGran;
-   pRADEONDRI->gartTexOffset      = info->gartTexStart;
-   pRADEONDRI->sarea_priv_offset = sizeof(drm_sarea_t);
-
-   /* Don't release the lock now - let the VT switch handler do it. */
-
-   return 1;
-}
-
-
-/**
- * \brief Get Radeon chip family from chipset number.
- * 
- * \param info driver private data.
- *
- * \return non-zero on success, or zero on failure.
- *
- * Called by radeonInitFBDev() to set RADEONInfoRec::ChipFamily
- * according to the value of RADEONInfoRec::Chipset.  Fails if the
- * chipset is unrecognized or not appropriate for this driver (i.e., not
- * an r100 style radeon)
- */
-static int get_chipfamily_from_chipset( RADEONInfoPtr info )
-{
-    switch (info->Chipset) {
-    case PCI_CHIP_RADEON_LY:
-    case PCI_CHIP_RADEON_LZ:
-	info->ChipFamily = CHIP_FAMILY_M6;
-	break;
-
-    case PCI_CHIP_RADEON_QY:
-    case PCI_CHIP_RADEON_QZ:
-	info->ChipFamily = CHIP_FAMILY_VE;
-	break;
-
-    case PCI_CHIP_R200_QL:
-    case PCI_CHIP_R200_QN:
-    case PCI_CHIP_R200_QO:
-    case PCI_CHIP_R200_Ql:
-    case PCI_CHIP_R200_BB:
-	info->ChipFamily = CHIP_FAMILY_R200;
-	break;
-
-    case PCI_CHIP_RV200_QW: /* RV200 desktop */
-    case PCI_CHIP_RV200_QX:
-	info->ChipFamily = CHIP_FAMILY_RV200;
-	break;
-
-    case PCI_CHIP_RADEON_LW:
-    case PCI_CHIP_RADEON_LX:
-	info->ChipFamily = CHIP_FAMILY_M7;
-	break;
-
-    case PCI_CHIP_RV250_Id:
-    case PCI_CHIP_RV250_Ie:
-    case PCI_CHIP_RV250_If:
-    case PCI_CHIP_RV250_Ig:
-	info->ChipFamily = CHIP_FAMILY_RV250;
-	break;
-
-    case PCI_CHIP_RV250_Ld:
-    case PCI_CHIP_RV250_Le:
-    case PCI_CHIP_RV250_Lf:
-    case PCI_CHIP_RV250_Lg:
-	info->ChipFamily = CHIP_FAMILY_M9;
-	break;
-
-    case PCI_CHIP_RV280_Y_:
-    case PCI_CHIP_RV280_Ya:
-    case PCI_CHIP_RV280_Yb:
-    case PCI_CHIP_RV280_Yc:
-	info->ChipFamily = CHIP_FAMILY_RV280;
-        break;
-
-    case PCI_CHIP_R300_ND:
-    case PCI_CHIP_R300_NE:
-    case PCI_CHIP_R300_NF:
-    case PCI_CHIP_R300_NG:
-	info->ChipFamily = CHIP_FAMILY_R300;
-        break;
-
-    default:
-	/* Original Radeon/7200 */
-	info->ChipFamily = CHIP_FAMILY_RADEON;
-    }
-
-    return 1;
-}
-
-
-/**
- * \brief Validate the fbdev mode.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Saves some registers and returns 1.
- *
- * \sa radeonValidateMode().
- */
-static int radeonValidateMode( const DRIDriverContext *ctx )
-{
-   unsigned char *RADEONMMIO = ctx->MMIOAddress;
-   RADEONInfoPtr info = ctx->driverPrivate;
-
-   info->gen_int_cntl = INREG(RADEON_GEN_INT_CNTL);
-   info->crtc_offset_cntl = INREG(RADEON_CRTC_OFFSET_CNTL);
-
-   if (info->colorTiling)
-	   info->crtc_offset_cntl |= RADEON_CRTC_TILE_EN;
-   return 1;
-}
-
-
-/**
- * \brief Examine mode returned by fbdev.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Restores registers that fbdev has clobbered and returns 1.
- *
- * \sa radeonValidateMode().
- */
-static int radeonPostValidateMode( const DRIDriverContext *ctx )
-{
-   unsigned char *RADEONMMIO = ctx->MMIOAddress;
-   RADEONInfoPtr info = ctx->driverPrivate;
-
-   RADEONColorTilingInit( ctx, info);
-   OUTREG(RADEON_GEN_INT_CNTL, info->gen_int_cntl);
-   if (info->colorTiling)
-	   info->crtc_offset_cntl |= RADEON_CRTC_TILE_EN;
-   OUTREG(RADEON_CRTC_OFFSET_CNTL, info->crtc_offset_cntl);
-   
-   return 1;
-}
-
-
-/**
- * \brief Initialize the framebuffer device mode
- *
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Fills in \p info with some default values and some information from \p ctx
- * and then calls RADEONScreenInit() for the screen initialization.
- * 
- * Before exiting clears the framebuffer memory accessing it directly.
- */
-static int radeonInitFBDev( DRIDriverContext *ctx )
-{
-   RADEONInfoPtr info = calloc(1, sizeof(*info));
-
-   {
-      int  dummy = ctx->shared.virtualWidth;
-
-      if (ctx->colorTiling==1)
-      {
-         switch (ctx->bpp / 8) {
-         case 1: dummy = (ctx->shared.virtualWidth + 255) & ~255; break;
-         case 2: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
-         case 3:
-         case 4: dummy = (ctx->shared.virtualWidth +  63) &  ~63; break;
-         }
-      } else {
-	 switch (ctx->bpp / 8) {
-         case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
-         case 2: dummy = (ctx->shared.virtualWidth +  31) &  ~31; break;
-         case 3:
-         case 4: dummy = (ctx->shared.virtualWidth +  15) &  ~15; break;
-         }
-      }
-
-      ctx->shared.virtualWidth = dummy;
-      ctx->shared.Width = dummy;
-   }
-
-   fprintf(stderr,"shared virtual width is %d\n", ctx->shared.virtualWidth);
-   ctx->driverPrivate = (void *)info;
-   
-   info->gartFastWrite  = RADEON_DEFAULT_AGP_FAST_WRITE;
-   info->gartSize       = RADEON_DEFAULT_AGP_SIZE;
-   info->gartTexSize    = RADEON_DEFAULT_AGP_TEX_SIZE;
-   info->bufSize       = RADEON_DEFAULT_BUFFER_SIZE;
-   info->ringSize      = RADEON_DEFAULT_RING_SIZE;
-   info->page_flip_enable = RADEON_DEFAULT_PAGE_FLIP;
-   info->colorTiling = ctx->colorTiling;
-  
-   info->Chipset = ctx->chipset;
-
-   if (!get_chipfamily_from_chipset( info )) {
-      fprintf(stderr, "Unknown or non-radeon chipset -- cannot continue\n");
-      fprintf(stderr, "==> Verify PCI BusID is correct in miniglx.conf\n");
-      return 0;
-   }
-
-   info->frontPitch = ctx->shared.virtualWidth;
-   info->LinearAddr = ctx->FBStart & 0xfc000000;
-    
-
-   if (!RADEONScreenInit( ctx, info ))
-      return 0;
-
-
-   return 1;
-}
-
-
-/**
- * \brief The screen is being closed, so clean up any state and free any
- * resources used by the DRI.
- *
- * \param ctx display handle.
- *
- * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver
- * private data.
- */
-static void radeonHaltFBDev( DRIDriverContext *ctx )
-{
-    drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
-    drmClose(ctx->drmFD);
-
-    if (ctx->driverPrivate) {
-       free(ctx->driverPrivate);
-       ctx->driverPrivate = 0;
-    }
-}
-
-
-extern void radeonNotifyFocus( int );
-
-/**
- * \brief Exported driver interface for Mini GLX.
- *
- * \sa DRIDriverRec.
- */
-const struct DRIDriverRec __driDriver = {
-   radeonValidateMode,
-   radeonPostValidateMode,
-   radeonInitFBDev,
-   radeonHaltFBDev,
-   RADEONEngineShutdown,
-   RADEONEngineRestore,  
-#ifndef _EMBEDDED
-   0,
-#else
-   radeonNotifyFocus, 
-#endif
-};
diff --git a/src/mesa/drivers/dri/tdfx/server/tdfx_dri.c b/src/mesa/drivers/dri/tdfx/server/tdfx_dri.c
deleted file mode 100644
index 63fe875f59..0000000000
--- a/src/mesa/drivers/dri/tdfx/server/tdfx_dri.c
+++ /dev/null
@@ -1,471 +0,0 @@
-/*
- * Mesa 3-D graphics library
- * Version:  5.1
- *
- * Copyright (C) 1999-2003  Brian Paul   All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
- * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/* Authors:
- *    Keith Whitwell
- *    Daniel Borca
- */
-
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
- 
-#include "driver.h"
-#include "drm.h"
-#include "imports.h"
-
-#include "dri_util.h"
-
-#include "tdfx_context.h"
-#include "tdfx_dri.h"
-#include "xf86drm.h"
-
-
-#define TILE_WIDTH 128
-#define TILE_HEIGHT 32
-
-#define CMDFIFO_PAGES 64
-
-
-static int
-calcBufferStride (int xres, int tiled, int cpp)
-{
-  int strideInTiles;
-
-  if (tiled) {
-    /* Calculate tile width stuff */
-    strideInTiles = (xres+TILE_WIDTH-1)/TILE_WIDTH;
-
-    return strideInTiles*cpp*TILE_WIDTH;
-  } else {
-    return xres*cpp;
-  }
-} /* calcBufferStride */
-
-
-static int
-calcBufferHeightInTiles (int yres)
-{
-  int heightInTiles;            /* Height of buffer in tiles */
-
-  /* Calculate tile height stuff */
-  heightInTiles = yres >> 5;
-
-  if (yres & (TILE_HEIGHT - 1))
-    heightInTiles++;
-
-  return heightInTiles;
-
-} /* calcBufferHeightInTiles */
-
-
-static int
-calcBufferSize (int xres, int yres, int tiled, int cpp)
-{
-  int stride, height, bufSize;
-
-  if (tiled) {
-    stride = calcBufferStride(xres, tiled, cpp);
-    height = TILE_HEIGHT * calcBufferHeightInTiles(yres);
-  } else {
-    stride = xres*cpp;
-    height = yres;
-  }
-
-  bufSize = stride * height;
-
-  return bufSize;
-} /* calcBufferSize */
-
-
-static void allocateMemory (const DRIDriverContext *ctx, TDFXDRIPtr pTDFX)
-{
-  int memRemaining, fifoSize, screenSizeInTiles;
-  int fbSize;
-  char *str;
-  int pixmapCacheLinesMin;
-  int cursorOffset, cursorSize;
-
-  pTDFX->stride = calcBufferStride(pTDFX->width, !0, pTDFX->cpp);
-
-  /* enough to do DVD */
-  pixmapCacheLinesMin = ((720*480*pTDFX->cpp) + 
-					pTDFX->stride - 1)/pTDFX->stride;
-
-  if (pTDFX->deviceID > PCI_CHIP_VOODOO3) {
-  	if ((pixmapCacheLinesMin + pTDFX->height) > 4095)
-		pixmapCacheLinesMin = 4095 - pTDFX->height;
-  } else {
-  	if ((pixmapCacheLinesMin + pTDFX->height) > 2047)
-		pixmapCacheLinesMin = 2047 - pTDFX->height;
-  }
-
-  if (pTDFX->cpp!=3) {
-    screenSizeInTiles=calcBufferSize(pTDFX->width, pTDFX->height,
-				     !0, pTDFX->cpp);
-  }
-  else {
-    /* cpp==3 needs to bump up to 4 */
-    screenSizeInTiles=calcBufferSize(pTDFX->width, pTDFX->height,
-				     !0, 4);
-  }
-
-  /*
-   * Layout is:
-   *    cursor, fifo, fb, tex, bb, db
-   */
-
-  fbSize = (pTDFX->height + pixmapCacheLinesMin) * pTDFX->stride;
-
-  memRemaining=(pTDFX->mem - 1) &~ 0xFFF;
-  /* Note that a page is 4096 bytes, and a  */
-  /* tile is 32 x 128 = 4096 bytes.  So,    */
-  /* page and tile boundaries are the same  */
-  /* Place the depth offset first, forcing  */
-  /* it to be on an *odd* page boundary.    */
-  pTDFX->depthOffset = (memRemaining - screenSizeInTiles) &~ 0xFFF;
-  if ((pTDFX->depthOffset & (0x1 << 12)) == 0) {
-      pTDFX->depthOffset -= (0x1 << 12);
-  }
-  /* Now, place the back buffer, forcing it */
-  /* to be on an *even* page boundary.      */
-  pTDFX->backOffset = (pTDFX->depthOffset - screenSizeInTiles) &~ 0xFFF;
-  if (pTDFX->backOffset & (0x1 << 12)) {
-      pTDFX->backOffset -= (0x1 << 12);
-  }
-  /* Give the cmd fifo at least             */
-  /* CMDFIFO_PAGES pages, but no more than  */
-  /* 64. NOTE: Don't go higher than 64, as  */
-  /* there is suspect code in Glide3 !      */
-  fifoSize = ((64 <= CMDFIFO_PAGES) ? 64 : CMDFIFO_PAGES) << 12;
-
-  /* We give 4096 bytes to the cursor  */
-  cursorSize = 0/*4096*/;
-  cursorOffset = 0;
-
-  pTDFX->fifoOffset = cursorOffset + cursorSize;
-  pTDFX->fifoSize = fifoSize;
-  /* Now, place the front buffer, forcing   */
-  /* it to be on a page boundary too, just  */
-  /* for giggles.                           */
-  pTDFX->fbOffset = pTDFX->fifoOffset + pTDFX->fifoSize;
-  pTDFX->textureOffset = pTDFX->fbOffset + fbSize;
-  if (pTDFX->depthOffset <= pTDFX->textureOffset ||
-	pTDFX->backOffset <= pTDFX->textureOffset) {
-    /*
-     * pTDFX->textureSize < 0 means that the DRI is disabled.  pTDFX->backOffset
-     * is used to calculate the maximum amount of memory available for
-     * 2D offscreen use.  With DRI disabled, set this to the top of memory.
-     */
-
-    pTDFX->textureSize = -1;
-    pTDFX->backOffset = pTDFX->mem;
-    pTDFX->depthOffset = -1;
-    fprintf(stderr, 
-        "Not enough video memory available for textures and depth buffer\n"
-	"\tand/or back buffer.  Disabling DRI.  To use DRI try lower\n"
-	"\tresolution modes and/or a smaller virtual screen size\n");
-  } else {
-    pTDFX->textureSize = pTDFX->backOffset - pTDFX->textureOffset;
-  }
-}
-
-
-static int createScreen (DRIDriverContext *ctx, TDFXDRIPtr pTDFX)
-{
-   int err;
-   
-   {
-      int  width_bytes = (ctx->shared.virtualWidth * ctx->cpp);
-      int  maxy        = ctx->shared.fbSize / width_bytes;
-
-
-      if (maxy <= ctx->shared.virtualHeight * 3) {
-	 fprintf(stderr, 
-		 "Static buffer allocation failed -- "
-		 "need at least %d kB video memory (have %d kB)\n",
-		 (ctx->shared.virtualWidth * ctx->shared.virtualHeight *
-		  ctx->cpp * 3 + 1023) / 1024,
-		 ctx->shared.fbSize / 1024);
-	 return 0;
-      } 
-   }
-
-   ctx->shared.SAREASize = SAREA_MAX;
-   pTDFX->regsSize = ctx->MMIOSize;
-
-   /* Note that drmOpen will try to load the kernel module, if needed. */
-   ctx->drmFD = drmOpen("tdfx", NULL );
-   if (ctx->drmFD < 0) {
-      fprintf(stderr, "[drm] drmOpen failed\n");
-      return 0;
-   }
-
-   if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) {
-      fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
-	      ctx->drmFD, ctx->pciBusID, strerror(-err));
-      return 0;
-   }
-
-   if (drmAddMap( ctx->drmFD,
-		  0,
-		  ctx->shared.SAREASize,
-		  DRM_SHM,
-		  DRM_CONTAINS_LOCK,
-		  &ctx->shared.hSAREA) < 0)
-   {
-      fprintf(stderr, "[drm] drmAddMap failed\n");
-      return 0;
-   }
-   fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n",
-	   ctx->shared.SAREASize, ctx->shared.hSAREA);
-
-   if (drmMap( ctx->drmFD,
-	       ctx->shared.hSAREA,
-	       ctx->shared.SAREASize,
-	       (drmAddressPtr)(&ctx->pSAREA)) < 0)
-   {
-      fprintf(stderr, "[drm] drmMap failed\n");
-      return 0;
-   }
-   memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
-   fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n",
-	   ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
-   
-   /* Need to AddMap the framebuffer and mmio regions here:
-    */
-   if (drmAddMap( ctx->drmFD,
-		  (drm_handle_t)ctx->FBStart,
-		  ctx->FBSize,
-		  DRM_FRAME_BUFFER,
-#ifndef _EMBEDDED
-		  0,
-#else
-		  DRM_READ_ONLY,
-#endif
-		  &ctx->shared.hFrameBuffer) < 0)
-   {
-      fprintf(stderr, "[drm] drmAddMap framebuffer failed\n");
-      return 0;
-   }
-
-   fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n",
-	   ctx->shared.hFrameBuffer);
-
-
-   if (drmAddMap(ctx->drmFD, 
-		 ctx->MMIOStart,
-		 ctx->MMIOSize,
-		 DRM_REGISTERS, 
-		 DRM_READ_ONLY, 
-		 &pTDFX->regs) < 0) {
-      fprintf(stderr, "[drm] drmAddMap mmio failed\n");	
-      return 0;
-   }
-   fprintf(stderr,
-	   "[drm] register handle = 0x%08lx\n", pTDFX->regs);
-
-
-   /* Create a 'server' context so we can grab the lock for
-    * initialization ioctls.
-    */
-   if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) {
-      fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); 
-
-   /* Initialize the kernel data structures */
-
-   /* Initialize kernel gart memory manager */
-   allocateMemory(ctx, pTDFX);
-
-   /* Initialize the SAREA private data structure */
-
-
-   /* Quick hack to clear the front & back buffers.  Could also use
-    * the clear ioctl to do this, but would need to setup hw state
-    * first.
-    */
-
-
-   /* This is the struct passed to tdfx_dri.so for its initialization */
-   ctx->driverClientMsg = malloc(sizeof(TDFXDRIRec));
-   ctx->driverClientMsgSize = sizeof(TDFXDRIRec);
-   memcpy(ctx->driverClientMsg, pTDFX, ctx->driverClientMsgSize);
-   pTDFX = (TDFXDRIPtr)ctx->driverClientMsg;
-
-   /* Don't release the lock now - let the VT switch handler do it. */
-
-   return 1;
-}
-
-
-/**
- * \brief Validate the fbdev mode.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Saves some registers and returns 1.
- *
- * \sa tdfxValidateMode().
- */
-static int tdfxValidateMode( const DRIDriverContext *ctx )
-{
-   return 1;
-}
-
-
-/**
- * \brief Examine mode returned by fbdev.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Restores registers that fbdev has clobbered and returns 1.
- *
- * \sa tdfxValidateMode().
- */
-static int tdfxPostValidateMode( const DRIDriverContext *ctx )
-{
-   return 1;
-}
-
-
-/**
- * \brief Initialize the framebuffer device mode
- *
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Before exiting clears the framebuffer memory accessing it directly.
- */
-static int tdfxInitFBDev( DRIDriverContext *ctx )
-{
-   TDFXDRIPtr pTDFX = calloc(1, sizeof(TDFXDRIRec));
-
-   {
-      int  dummy = ctx->shared.virtualWidth;
-
-      switch (ctx->bpp / 8) {
-      case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
-      case 2: dummy = (ctx->shared.virtualWidth +  31) &  ~31; break;
-      case 3:
-      case 4: dummy = (ctx->shared.virtualWidth +  15) &  ~15; break;
-      }
-
-      ctx->shared.virtualWidth = dummy;
-   }
-
-   ctx->driverPrivate = (void *)pTDFX;
-
-   pTDFX->deviceID = ctx->chipset;
-   pTDFX->width    = ctx->shared.virtualWidth;
-   pTDFX->height   = ctx->shared.virtualHeight;
-   pTDFX->cpp      = ctx->cpp;
-   pTDFX->mem      = ctx->FBSize; /* ->shared.fbSize? mem probe? */
-   pTDFX->sarea_priv_offset = sizeof(drm_sarea_t);
-
-   if (!createScreen(ctx, pTDFX))
-      return 0;
-
-   return 1;
-}
-
-
-/**
- * \brief The screen is being closed, so clean up any state and free any
- * resources used by the DRI.
- *
- * \param ctx display handle.
- *
- * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver
- * private data.
- */
-static void tdfxHaltFBDev( DRIDriverContext *ctx )
-{
-    drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
-    drmClose(ctx->drmFD);
-
-    if (ctx->driverPrivate) {
-       free(ctx->driverPrivate);
-       ctx->driverPrivate = 0;
-    }
-}
-
-
-/**
- * \brief Shutdown the drawing engine.
- *
- * \param ctx display handle
- *
- * Turns off the 3D engine & restores the graphics card
- * to a state that fbdev understands.
- */
-static int tdfxEngineShutdown( const DRIDriverContext *ctx )
-{
-   fprintf(stderr, "%s: not implemented\n", __FUNCTION__);
-   return 1;
-}
-
-
-/**
- * \brief Restore the drawing engine.
- *
- * \param ctx display handle
- *
- * Resets the graphics card and sets initial values for several registers of
- * the card's drawing engine.
- *
- * Turns on 3dfx
- */
-static int tdfxEngineRestore( const DRIDriverContext *ctx )
-{
-   fprintf(stderr, "%s: not implemented\n", __FUNCTION__);
-   return 1;
-}
-
-
-/**
- * \brief Exported driver interface for Mini GLX.
- *
- * \sa DRIDriverRec.
- */
-struct DRIDriverRec __driDriver = {
-   tdfxValidateMode,
-   tdfxPostValidateMode,
-   tdfxInitFBDev,
-   tdfxHaltFBDev,
-   tdfxEngineShutdown,
-   tdfxEngineRestore,
-   0
-};
diff --git a/src/mesa/drivers/dri/unichrome/server/via_dri.c b/src/mesa/drivers/dri/unichrome/server/via_dri.c
deleted file mode 100644
index 74034485e2..0000000000
--- a/src/mesa/drivers/dri/unichrome/server/via_dri.c
+++ /dev/null
@@ -1,1251 +0,0 @@
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
- 
-#include "driver.h"
-#include "drm.h"
-#include "imports.h"
-
-#include "dri_util.h"
-
-#include "via_context.h"
-#include "via_dri.h"
-#include "via_driver.h"
-#include "xf86drm.h"
-
-static void VIAEnableMMIO(DRIDriverContext * ctx);
-static void VIADisableMMIO(DRIDriverContext * ctx);
-static void VIADisableExtendedFIFO(DRIDriverContext *ctx);
-static void VIAEnableExtendedFIFO(DRIDriverContext *ctx);
-static void VIAInitialize2DEngine(DRIDriverContext *ctx);
-static void VIAInitialize3DEngine(DRIDriverContext *ctx);
-
-static int VIADRIScreenInit(DRIDriverContext * ctx);
-static void VIADRICloseScreen(DRIDriverContext * ctx);
-static int VIADRIFinishScreenInit(DRIDriverContext * ctx);
-
-/* _SOLO : missing macros normally defined by X code */
-#define xf86DrvMsg(a, b, ...) fprintf(stderr, __VA_ARGS__)
-#define MMIO_IN8(base, addr) ((*(((volatile uint8_t*)base)+(addr)))+0)
-#define MMIO_OUT8(base, addr, val) ((*(((volatile uint8_t*)base)+(addr)))=((uint8_t)val))
-#define MMIO_OUT16(base, addr, val) ((*(volatile uint16_t*)(((uint8_t*)base)+(addr)))=((uint16_t)val))
-
-#define VIDEO	0 
-#define AGP		1
-#define AGP_PAGE_SIZE 4096
-#define AGP_PAGES 8192
-#define AGP_SIZE (AGP_PAGE_SIZE * AGP_PAGES)
-#define AGP_CMDBUF_PAGES 512
-#define AGP_CMDBUF_SIZE (AGP_PAGE_SIZE * AGP_CMDBUF_PAGES)
-
-static char VIAKernelDriverName[] = "via";
-static char VIAClientDriverName[] = "unichrome";
-
-static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia);
-static int VIADRIPciInit(DRIDriverContext * ctx, VIAPtr pVia);
-static int VIADRIFBInit(DRIDriverContext * ctx, VIAPtr pVia);
-static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia);
-static int VIADRIMapInit(DRIDriverContext * ctx, VIAPtr pVia);
-
-static void VIADRIIrqInit( DRIDriverContext *ctx )
-{
-    VIAPtr pVia = VIAPTR(ctx);
-    VIADRIPtr pVIADRI = pVia->devPrivate;
-
-    pVIADRI->irqEnabled = drmGetInterruptFromBusID(pVia->drmFD,
-					   ctx->pciBus,
-					   ctx->pciDevice,
-					   ctx->pciFunc);
-
-    if ((drmCtlInstHandler(pVia->drmFD, pVIADRI->irqEnabled))) {
-	xf86DrvMsg(pScreen->myNum, X_WARNING,
-		   "[drm] Failure adding irq handler. "
-		   "Falling back to irq-free operation.\n");
-	pVIADRI->irqEnabled = 0;
-    }
-
-    if (pVIADRI->irqEnabled)
-	xf86DrvMsg(pScreen->myNum, X_INFO,
-		   "[drm] Irq handler installed, using IRQ %d.\n",
-		   pVIADRI->irqEnabled);
-}
-
-static void VIADRIIrqExit( DRIDriverContext *ctx ) {
-    VIAPtr pVia = VIAPTR(ctx);
-    VIADRIPtr pVIADRI = pVia->devPrivate;
-
-    if (pVIADRI->irqEnabled) {
-	if (drmCtlUninstHandler(pVia->drmFD)) {
-	    xf86DrvMsg(pScreen-myNum, X_INFO,"[drm] Irq handler uninstalled.\n");
-	} else {
-	    xf86DrvMsg(pScreen->myNum, X_ERROR,
-		       "[drm] Could not uninstall irq handler.\n");
-	}
-    }
-}
-	    
-static void VIADRIRingBufferCleanup(DRIDriverContext *ctx)
-{
-    VIAPtr pVia = VIAPTR(ctx);
-    VIADRIPtr pVIADRI = pVia->devPrivate;
-    drm_via_dma_init_t ringBufInit;
-
-    if (pVIADRI->ringBufActive) {
-	xf86DrvMsg(pScreen->myNum, X_INFO, 
-		   "[drm] Cleaning up DMA ring-buffer.\n");
-	ringBufInit.func = VIA_CLEANUP_DMA;
-	if (drmCommandWrite(pVia->drmFD, DRM_VIA_DMA_INIT, &ringBufInit,
-			    sizeof(ringBufInit))) {
-	    xf86DrvMsg(pScreen->myNum, X_WARNING, 
-		       "[drm] Failed to clean up DMA ring-buffer: %d\n", errno);
-	}
-	pVIADRI->ringBufActive = 0;
-    }
-}
-
-static int VIADRIRingBufferInit(DRIDriverContext *ctx)
-{
-    VIAPtr pVia = VIAPTR(ctx);
-    VIADRIPtr pVIADRI = pVia->devPrivate;
-    drm_via_dma_init_t ringBufInit;
-    drmVersionPtr drmVer;
-
-    pVIADRI->ringBufActive = 0;
-
-    if (NULL == (drmVer = drmGetVersion(pVia->drmFD))) {
-	return GL_FALSE;
-    }
-
-    if (((drmVer->version_major <= 1) && (drmVer->version_minor <= 3))) {
-	return GL_FALSE;
-    } 
-
-    /*
-     * Info frome code-snippet on DRI-DEVEL list; Erdi Chen.
-     */
-
-    switch (pVia->ChipId) {
-    case PCI_CHIP_VT3259:
-    	ringBufInit.reg_pause_addr = 0x40c;
-	break;
-    default:
-    	ringBufInit.reg_pause_addr = 0x418;
-	break;
-    }
-   
-    ringBufInit.offset = pVia->agpSize;
-    ringBufInit.size = AGP_CMDBUF_SIZE;
-    ringBufInit.func = VIA_INIT_DMA;
-    if (drmCommandWrite(pVia->drmFD, DRM_VIA_DMA_INIT, &ringBufInit,
-			sizeof(ringBufInit))) {
-	xf86DrvMsg(pScreen->myNum, X_ERROR, 
-		   "[drm] Failed to initialize DMA ring-buffer: %d\n", errno);
-	return GL_FALSE;
-    }
-    xf86DrvMsg(pScreen->myNum, X_INFO, 
-	       "[drm] Initialized AGP ring-buffer, size 0x%lx at AGP offset 0x%lx.\n",
-	       ringBufInit.size, ringBufInit.offset);
-   
-    pVIADRI->ringBufActive = 1;
-    return GL_TRUE;
-}	    
-
-static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia)
-{
-    unsigned long  agp_phys;
-    drmAddress agpaddr;
-    VIADRIPtr pVIADRI;
-    pVIADRI = pVia->devPrivate;
-    pVia->agpSize = 0;
-
-    if (drmAgpAcquire(pVia->drmFD) < 0) {
-        xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpAcquire failed %d\n", errno);
-        return GL_FALSE;
-    }
-
-    if (drmAgpEnable(pVia->drmFD, drmAgpGetMode(pVia->drmFD)&~0x0) < 0) {
-         xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpEnable failed\n");
-        return GL_FALSE;
-    }
-    
-    xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] drmAgpEnabled succeeded\n");
-
-    if (drmAgpAlloc(pVia->drmFD, AGP_SIZE, 0, &agp_phys, &pVia->agpHandle) < 0) {
-        xf86DrvMsg(pScreen->myNum, X_ERROR,
-                 "[drm] drmAgpAlloc failed\n");
-        drmAgpRelease(pVia->drmFD);
-        return GL_FALSE;
-    }
-   
-    if (drmAgpBind(pVia->drmFD, pVia->agpHandle, 0) < 0) {
-        xf86DrvMsg(pScreen->myNum, X_ERROR,
-                 "[drm] drmAgpBind failed\n");
-        drmAgpFree(pVia->drmFD, pVia->agpHandle);
-        drmAgpRelease(pVia->drmFD);
-
-        return GL_FALSE;
-    }
-
-    /*
-     * Place the ring-buffer last in the AGP region, and restrict the
-     * public map not to include the buffer for security reasons.
-     */
-
-    pVia->agpSize = AGP_SIZE - AGP_CMDBUF_SIZE;
-    pVia->agpAddr = drmAgpBase(pVia->drmFD);
-    xf86DrvMsg(pScreen->myNum, X_INFO,
-                 "[drm] agpAddr = 0x%08lx\n",pVia->agpAddr);
-		 
-    pVIADRI->agp.size = pVia->agpSize;
-    if (drmAddMap(pVia->drmFD, (drm_handle_t)0,
-                 pVIADRI->agp.size, DRM_AGP, 0, 
-                 &pVIADRI->agp.handle) < 0) {
-	xf86DrvMsg(pScreen->myNum, X_ERROR,
-	    "[drm] Failed to map public agp area\n");
-        pVIADRI->agp.size = 0;
-        return GL_FALSE;
-    }  
-    /* Map AGP from kernel to Xserver - Not really needed */
-    drmMap(pVia->drmFD, pVIADRI->agp.handle,pVIADRI->agp.size, &agpaddr);
-
-    xf86DrvMsg(pScreen->myNum, X_INFO, 
-                "[drm] agpAddr = 0x%08lx\n", pVia->agpAddr);
-    xf86DrvMsg(pScreen->myNum, X_INFO, 
-                "[drm] agpSize = 0x%08lx\n", pVia->agpSize);
-    xf86DrvMsg(pScreen->myNum, X_INFO, 
-                "[drm] agp physical addr = 0x%08lx\n", agp_phys);
-
-    {
-	drm_via_agp_t agp;
-	agp.offset = 0;
-	agp.size = AGP_SIZE-AGP_CMDBUF_SIZE;
-	if (drmCommandWrite(pVia->drmFD, DRM_VIA_AGP_INIT, &agp,
-			    sizeof(drm_via_agp_t)) < 0) {
-	    drmUnmap(&agpaddr,pVia->agpSize);
-	    drmRmMap(pVia->drmFD,pVIADRI->agp.handle);
-	    drmAgpUnbind(pVia->drmFD, pVia->agpHandle);
-	    drmAgpFree(pVia->drmFD, pVia->agpHandle);
-	    drmAgpRelease(pVia->drmFD);
-	    return GL_FALSE;
-	}
-    }
-
-    return GL_TRUE;
-}
-
-static int VIADRIFBInit(DRIDriverContext * ctx, VIAPtr pVia)
-{   
-    int FBSize = pVia->FBFreeEnd-pVia->FBFreeStart;
-    int FBOffset = pVia->FBFreeStart; 
-    VIADRIPtr pVIADRI = pVia->devPrivate;
-    pVIADRI->fbOffset = FBOffset;
-    pVIADRI->fbSize = pVia->videoRambytes;
-
-    {
-	drm_via_fb_t fb;
-	fb.offset = FBOffset;
-	fb.size = FBSize;
-	
-	if (drmCommandWrite(pVia->drmFD, DRM_VIA_FB_INIT, &fb,
-			    sizeof(drm_via_fb_t)) < 0) {
-	    xf86DrvMsg(pScreen->myNum, X_ERROR,
-		       "[drm] failed to init frame buffer area\n");
-	    return GL_FALSE;
-	} else {
-	    xf86DrvMsg(pScreen->myNum, X_INFO,
-		       "[drm] FBFreeStart= 0x%08x FBFreeEnd= 0x%08x "
-		       "FBSize= 0x%08x\n",
-		       pVia->FBFreeStart, pVia->FBFreeEnd, FBSize);
-	    return GL_TRUE;	
-	}   
-    }
-}
-
-static int VIADRIPciInit(DRIDriverContext * ctx, VIAPtr pVia)
-{
-    return GL_TRUE;	
-}
-
-static int VIADRIScreenInit(DRIDriverContext * ctx)
-{
-    VIAPtr pVia = VIAPTR(ctx);
-    VIADRIPtr pVIADRI;
-    int err;
-
-#if 0
-    ctx->shared.SAREASize = ((sizeof(drm_sarea_t) + 0xfff) & 0x1000);
-#else
-    if (sizeof(drm_sarea_t)+sizeof(drm_via_sarea_t) > SAREA_MAX) {
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-			"Data does not fit in SAREA\n");
-	return GL_FALSE;
-    }
-    ctx->shared.SAREASize = SAREA_MAX;
-#endif
-
-    ctx->drmFD = drmOpen(VIAKernelDriverName, NULL);
-    if (ctx->drmFD < 0) {
-        fprintf(stderr, "[drm] drmOpen failed\n");
-        return 0;
-    }
-    pVia->drmFD = ctx->drmFD;
-
-    err = drmSetBusid(ctx->drmFD, ctx->pciBusID);
-    if (err < 0) {
-        fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
-                ctx->drmFD, ctx->pciBusID, strerror(-err));
-        return 0;
-    }
-
-    err = drmAddMap(ctx->drmFD, 0, ctx->shared.SAREASize, DRM_SHM,
-                  DRM_CONTAINS_LOCK, &ctx->shared.hSAREA);
-    if (err < 0) {
-        fprintf(stderr, "[drm] drmAddMap failed\n");
-        return 0;
-    }
-    fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n",
-            ctx->shared.SAREASize, ctx->shared.hSAREA);
-
-    if (drmMap(ctx->drmFD,
-               ctx->shared.hSAREA,
-               ctx->shared.SAREASize,
-               (drmAddressPtr)(&ctx->pSAREA)) < 0)
-    {
-        fprintf(stderr, "[drm] drmMap failed\n");
-        return 0;
-    }
-    memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
-    fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n",
-            ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
-
-    /* Need to AddMap the framebuffer and mmio regions here:
-     */
-    if (drmAddMap(ctx->drmFD,
-                  (drm_handle_t)ctx->FBStart,
-                  ctx->FBSize,
-                  DRM_FRAME_BUFFER,
-#ifndef _EMBEDDED
-                   0,
-#else
-                   DRM_READ_ONLY,
-#endif
-                   &ctx->shared.hFrameBuffer) < 0)
-    {
-        fprintf(stderr, "[drm] drmAddMap framebuffer failed\n");
-        return 0;
-    }
-
-    fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n",
-            ctx->shared.hFrameBuffer);
-
-    pVIADRI = (VIADRIPtr) CALLOC(sizeof(VIADRIRec));
-    if (!pVIADRI) {
-        drmClose(ctx->drmFD);
-        return GL_FALSE;
-    }
-    pVia->devPrivate = pVIADRI;
-    ctx->driverClientMsg = pVIADRI;
-    ctx->driverClientMsgSize = sizeof(*pVIADRI);
-
-    /* DRIScreenInit doesn't add all the common mappings.  Add additional mappings here. */
-    if (!VIADRIMapInit(ctx, pVia)) {
-	VIADRICloseScreen(ctx);
-	return GL_FALSE;
-    }
-
-    pVIADRI->regs.size = VIA_MMIO_REGSIZE;
-    pVIADRI->regs.handle = pVia->registerHandle;
-    xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] mmio Registers = 0x%08lx\n",
-	pVIADRI->regs.handle);
-
-    if (drmMap(pVia->drmFD,
-               pVIADRI->regs.handle,
-               pVIADRI->regs.size,
-               (drmAddress *)&pVia->MapBase) != 0)
-    {
-        VIADRICloseScreen(ctx);
-        return GL_FALSE;
-    }
-
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] mmio mapped.\n" );
-
-    VIAEnableMMIO(ctx);
-
-    /* Get video memory clock. */
-    VGAOUT8(0x3D4, 0x3D);
-    pVia->MemClk = (VGAIN8(0x3D5) & 0xF0) >> 4;
-    xf86DrvMsg(0, X_INFO, "[dri] MemClk (0x%x)\n", pVia->MemClk);
-
-    /* 3D rendering has noise if not enabled. */
-    VIAEnableExtendedFIFO(ctx);
-
-    VIAInitialize2DEngine(ctx);
-
-    /* Must disable MMIO or 3D won't work. */
-    VIADisableMMIO(ctx);
-
-    VIAInitialize3DEngine(ctx);
-
-    pVia->IsPCI = !VIADRIAgpInit(ctx, pVia);
-
-    if (pVia->IsPCI) {
-        VIADRIPciInit(ctx, pVia);
-	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use pci.\n" );
-    }
-    else
-        xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] use agp.\n" );
-
-    if (!(VIADRIFBInit(ctx, pVia))) {
-	VIADRICloseScreen(ctx);
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] frame buffer initialize fail .\n" );
-        return GL_FALSE;
-    }
-    
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] frame buffer initialized.\n" );
- 
-    return VIADRIFinishScreenInit(ctx);
-}
-
-static void
-VIADRICloseScreen(DRIDriverContext * ctx)
-{
-    VIAPtr pVia = VIAPTR(ctx);
-    VIADRIPtr pVIADRI=(VIADRIPtr)pVia->devPrivate;
-
-    VIADRIRingBufferCleanup(ctx);
-
-    if (pVia->MapBase) {
-	xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Unmapping MMIO registers\n");
-        drmUnmap(pVia->MapBase, pVIADRI->regs.size);
-    }
-
-    if (pVia->agpSize) {
-	xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Freeing agp memory\n");
-        drmAgpFree(pVia->drmFD, pVia->agpHandle);
-	xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Releasing agp module\n");
-    	drmAgpRelease(pVia->drmFD);
-    }
-
-#if 0
-    if (pVia->DRIIrqEnable) 
-#endif
-        VIADRIIrqExit(ctx);
-}
-
-static int
-VIADRIFinishScreenInit(DRIDriverContext * ctx)
-{
-    VIAPtr pVia = VIAPTR(ctx);
-    VIADRIPtr pVIADRI;
-    int err;
-
-    err = drmCreateContext(ctx->drmFD, &ctx->serverContext);
-    if (err != 0) {
-        fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
-        return GL_FALSE;
-    }
-
-    DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0);
-
-
-    if (!VIADRIKernelInit(ctx, pVia)) {
-	VIADRICloseScreen(ctx);
-	return GL_FALSE;
-    }
-    xf86DrvMsg(pScreen->myNum, X_INFO, "[dri] kernel data initialized.\n");
-
-    /* set SAREA value */
-    {
-	drm_via_sarea_t *saPriv;
-
-	saPriv=(drm_via_sarea_t*)(((char*)ctx->pSAREA) +
-                               sizeof(drm_sarea_t));
-	assert(saPriv);
-	memset(saPriv, 0, sizeof(*saPriv));
-	saPriv->ctxOwner = -1;
-    }
-    pVIADRI=(VIADRIPtr)pVia->devPrivate;
-    pVIADRI->deviceID=pVia->Chipset;  
-    pVIADRI->width=ctx->shared.virtualWidth;
-    pVIADRI->height=ctx->shared.virtualHeight;
-    pVIADRI->mem=ctx->shared.fbSize;
-    pVIADRI->bytesPerPixel= (ctx->bpp+7) / 8; 
-    pVIADRI->sarea_priv_offset = sizeof(drm_sarea_t);
-    /* TODO */
-    pVIADRI->scrnX=pVIADRI->width;
-    pVIADRI->scrnY=pVIADRI->height;
-
-    /* Initialize IRQ */
-#if 0
-    if (pVia->DRIIrqEnable) 
-#endif
-	VIADRIIrqInit(ctx);
-    
-    pVIADRI->ringBufActive = 0;
-    VIADRIRingBufferInit(ctx);
-
-    return GL_TRUE;
-}
-
-/* Initialize the kernel data structures. */
-static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia)
-{
-    drm_via_init_t drmInfo;
-    memset(&drmInfo, 0, sizeof(drm_via_init_t));
-    drmInfo.sarea_priv_offset   = sizeof(drm_sarea_t);
-    drmInfo.func = VIA_INIT_MAP;
-    drmInfo.fb_offset           = pVia->FrameBufferBase;
-    drmInfo.mmio_offset         = pVia->registerHandle;
-    if (pVia->IsPCI)
-	drmInfo.agpAddr = (uint32_t)NULL;
-    else
-	drmInfo.agpAddr = (uint32_t)pVia->agpAddr;
-
-    if ((drmCommandWrite(pVia->drmFD, DRM_VIA_MAP_INIT,&drmInfo,
-			     sizeof(drm_via_init_t))) < 0)
-	    return GL_FALSE;
-
-    return GL_TRUE;
-}
-/* Add a map for the MMIO registers */
-static int VIADRIMapInit(DRIDriverContext * ctx, VIAPtr pVia)
-{
-    int flags = 0;
-
-    if (drmAddMap(pVia->drmFD, pVia->MmioBase, VIA_MMIO_REGSIZE,
-		  DRM_REGISTERS, flags, &pVia->registerHandle) < 0) {
-	return GL_FALSE;
-    }
-
-    xf86DrvMsg(pScreen->myNum, X_INFO,
-	"[drm] register handle = 0x%08lx\n", pVia->registerHandle);
-
-    return GL_TRUE;
-}
-
-static int viaValidateMode(const DRIDriverContext *ctx)
-{
-    VIAPtr pVia = VIAPTR(ctx);
-
-    return 1;
-}
-
-static int viaPostValidateMode(const DRIDriverContext *ctx)
-{
-    VIAPtr pVia = VIAPTR(ctx);
-
-    return 1;
-}
-
-static void VIAEnableMMIO(DRIDriverContext * ctx)
-{
-    /*vgaHWPtr hwp = VGAHWPTR(ctx);*/
-    VIAPtr pVia = VIAPTR(ctx);
-    unsigned char val;
-
-#if 0
-    if (xf86IsPrimaryPci(pVia->PciInfo)) {
-        /* If we are primary card, we still use std vga port. If we use
-         * MMIO, system will hang in vgaHWSave when our card used in
-         * PLE and KLE (integrated Trident MVP4)
-         */
-        vgaHWSetStdFuncs(hwp);
-    }
-    else {
-        vgaHWSetMmioFuncs(hwp, pVia->MapBase, 0x8000);
-    }
-#endif
-
-    val = VGAIN8(0x3c3);
-    VGAOUT8(0x3c3, val | 0x01);
-    val = VGAIN8(0x3cc);
-    VGAOUT8(0x3c2, val | 0x01);
-
-    /* Unlock Extended IO Space */
-    VGAOUT8(0x3c4, 0x10);
-    VGAOUT8(0x3c5, 0x01);
-
-    /* Enable MMIO */
-    if(!pVia->IsSecondary) {
-	VGAOUT8(0x3c4, 0x1a);
-	val = VGAIN8(0x3c5);
-#ifdef DEBUG
-	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "primary val = %x\n", val);
-#endif
-	VGAOUT8(0x3c5, val | 0x68);
-    }
-    else {
-	VGAOUT8(0x3c4, 0x1a);
-	val = VGAIN8(0x3c5);
-#ifdef DEBUG
-	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "secondary val = %x\n", val);
-#endif
-	VGAOUT8(0x3c5, val | 0x38);
-    }
-
-    /* Unlock CRTC registers */
-    VGAOUT8(0x3d4, 0x47);
-    VGAOUT8(0x3d5, 0x00);
-
-    return;
-}
-
-static void VIADisableMMIO(DRIDriverContext * ctx)
-{
-    VIAPtr pVia = VIAPTR(ctx);
-    unsigned char val;
-
-    VGAOUT8(0x3c4, 0x1a);
-    val = VGAIN8(0x3c5);
-    VGAOUT8(0x3c5, val & 0x97);
-
-    return;
-}
-
-static void VIADisableExtendedFIFO(DRIDriverContext *ctx)
-{
-    VIAPtr  pVia = VIAPTR(ctx);
-    uint32_t  dwGE230, dwGE298;
-
-    /* Cause of exit XWindow will dump back register value, others chipset no
-     * need to set extended fifo value */
-    if (pVia->Chipset == VIA_CLE266 && pVia->ChipRev < 15 &&
-        (ctx->shared.virtualWidth > 1024 || pVia->HasSecondary)) {
-        /* Turn off Extend FIFO */
-        /* 0x298[29] */
-        dwGE298 = VIAGETREG(0x298);
-        VIASETREG(0x298, dwGE298 | 0x20000000);
-        /* 0x230[21] */
-        dwGE230 = VIAGETREG(0x230);
-        VIASETREG(0x230, dwGE230 & ~0x00200000);
-        /* 0x298[29] */
-        dwGE298 = VIAGETREG(0x298);
-        VIASETREG(0x298, dwGE298 & ~0x20000000);
-    }
-}
-
-static void VIAEnableExtendedFIFO(DRIDriverContext *ctx)
-{
-    VIAPtr  pVia = VIAPTR(ctx);
-    uint8_t   bRegTemp;
-    uint32_t  dwGE230, dwGE298;
-
-    switch (pVia->Chipset) {
-    case VIA_CLE266:
-        if (pVia->ChipRev > 14) {  /* For 3123Cx */
-            if (pVia->HasSecondary) {  /* SAMM or DuoView case */
-                if (ctx->shared.virtualWidth >= 1024)
-    	        {
-    	            /* 3c5.16[0:5] */
-        	        VGAOUT8(0x3C4, 0x16);
-            	    bRegTemp = VGAIN8(0x3C5);
-    	            bRegTemp &= ~0x3F;
-        	        bRegTemp |= 0x1C;
-            	    VGAOUT8(0x3C5, bRegTemp);
-        	        /* 3c5.17[0:6] */
-            	    VGAOUT8(0x3C4, 0x17);
-                	bRegTemp = VGAIN8(0x3C5);
-    	            bRegTemp &= ~0x7F;
-        	        bRegTemp |= 0x3F;
-            	    VGAOUT8(0x3C5, bRegTemp);
-            	    pVia->EnableExtendedFIFO = GL_TRUE;
-    	        }
-            }
-            else   /* Single view or Simultaneoue case */
-            {
-                if (ctx->shared.virtualWidth > 1024)
-    	        {
-    	            /* 3c5.16[0:5] */
-        	        VGAOUT8(0x3C4, 0x16);
-            	    bRegTemp = VGAIN8(0x3C5);
-    	            bRegTemp &= ~0x3F;
-        	        bRegTemp |= 0x17;
-            	    VGAOUT8(0x3C5, bRegTemp);
-        	        /* 3c5.17[0:6] */
-            	    VGAOUT8(0x3C4, 0x17);
-                	bRegTemp = VGAIN8(0x3C5);
-    	            bRegTemp &= ~0x7F;
-        	        bRegTemp |= 0x2F;
-            	    VGAOUT8(0x3C5, bRegTemp);
-            	    pVia->EnableExtendedFIFO = GL_TRUE;
-    	        }
-            }
-            /* 3c5.18[0:5] */
-            VGAOUT8(0x3C4, 0x18);
-            bRegTemp = VGAIN8(0x3C5);
-            bRegTemp &= ~0x3F;
-            bRegTemp |= 0x17;
-            bRegTemp |= 0x40;  /* force the preq always higher than treq */
-            VGAOUT8(0x3C5, bRegTemp);
-        }
-        else {      /* for 3123Ax */
-            if (ctx->shared.virtualWidth > 1024 || pVia->HasSecondary) {
-                /* Turn on Extend FIFO */
-                /* 0x298[29] */
-                dwGE298 = VIAGETREG(0x298);
-                VIASETREG(0x298, dwGE298 | 0x20000000);
-                /* 0x230[21] */
-                dwGE230 = VIAGETREG(0x230);
-                VIASETREG(0x230, dwGE230 | 0x00200000);
-                /* 0x298[29] */
-                dwGE298 = VIAGETREG(0x298);
-                VIASETREG(0x298, dwGE298 & ~0x20000000);
-
-                /* 3c5.16[0:5] */
-                VGAOUT8(0x3C4, 0x16);
-                bRegTemp = VGAIN8(0x3C5);
-                bRegTemp &= ~0x3F;
-                bRegTemp |= 0x17;
-                /* bRegTemp |= 0x10; */
-                VGAOUT8(0x3C5, bRegTemp);
-                /* 3c5.17[0:6] */
-                VGAOUT8(0x3C4, 0x17);
-                bRegTemp = VGAIN8(0x3C5);
-                bRegTemp &= ~0x7F;
-                bRegTemp |= 0x2F;
-                /*bRegTemp |= 0x1F;*/
-                VGAOUT8(0x3C5, bRegTemp);
-                /* 3c5.18[0:5] */
-                VGAOUT8(0x3C4, 0x18);
-                bRegTemp = VGAIN8(0x3C5);
-                bRegTemp &= ~0x3F;
-                bRegTemp |= 0x17;
-                bRegTemp |= 0x40;  /* force the preq always higher than treq */
-                VGAOUT8(0x3C5, bRegTemp);
-          	    pVia->EnableExtendedFIFO = GL_TRUE;
-            }
-        }
-        break;
-    case VIA_KM400:
-        if (pVia->HasSecondary) {  /* SAMM or DuoView case */
-            if ((ctx->shared.virtualWidth >= 1600) &&
-                (pVia->MemClk <= VIA_MEM_DDR200)) {
-        	    /* enable CRT extendded FIFO */
-            	VGAOUT8(0x3C4, 0x17);
-                VGAOUT8(0x3C5, 0x1C);
-    	        /* revise second display queue depth and read threshold */
-        	    VGAOUT8(0x3C4, 0x16);
-            	bRegTemp = VGAIN8(0x3C5);
-    	        bRegTemp &= ~0x3F;
-    	        bRegTemp = (bRegTemp) | (0x09);
-                VGAOUT8(0x3C5, bRegTemp);
-            }
-            else {
-                /* enable CRT extendded FIFO */
-                VGAOUT8(0x3C4, 0x17);
-                VGAOUT8(0x3C5,0x3F);
-                /* revise second display queue depth and read threshold */
-                VGAOUT8(0x3C4, 0x16);
-                bRegTemp = VGAIN8(0x3C5);
-                bRegTemp &= ~0x3F;
-                bRegTemp = (bRegTemp) | (0x1C);
-                VGAOUT8(0x3C5, bRegTemp);
-            }
-            /* 3c5.18[0:5] */
-            VGAOUT8(0x3C4, 0x18);
-            bRegTemp = VGAIN8(0x3C5);
-            bRegTemp &= ~0x3F;
-            bRegTemp |= 0x17;
-            bRegTemp |= 0x40;  /* force the preq always higher than treq */
-            VGAOUT8(0x3C5, bRegTemp);
-       	    pVia->EnableExtendedFIFO = GL_TRUE;
-        }
-        else {
-            if ( (ctx->shared.virtualWidth > 1024) && (ctx->shared.virtualWidth <= 1280) )
-            {
-                /* enable CRT extendded FIFO */
-                VGAOUT8(0x3C4, 0x17);
-                VGAOUT8(0x3C5, 0x3F);
-                /* revise second display queue depth and read threshold */
-                VGAOUT8(0x3C4, 0x16);
-                bRegTemp = VGAIN8(0x3C5);
-                bRegTemp &= ~0x3F;
-                bRegTemp = (bRegTemp) | (0x17);
-                VGAOUT8(0x3C5, bRegTemp);
-           	    pVia->EnableExtendedFIFO = GL_TRUE;
-            }
-            else if ((ctx->shared.virtualWidth > 1280))
-            {
-                /* enable CRT extendded FIFO */
-                VGAOUT8(0x3C4, 0x17);
-                VGAOUT8(0x3C5, 0x3F);
-                /* revise second display queue depth and read threshold */
-                VGAOUT8(0x3C4, 0x16);
-                bRegTemp = VGAIN8(0x3C5);
-                bRegTemp &= ~0x3F;
-                bRegTemp = (bRegTemp) | (0x1C);
-                VGAOUT8(0x3C5, bRegTemp);
-           	    pVia->EnableExtendedFIFO = GL_TRUE;
-            }
-            else
-            {
-                /* enable CRT extendded FIFO */
-                VGAOUT8(0x3C4, 0x17);
-                VGAOUT8(0x3C5, 0x3F);
-                /* revise second display queue depth and read threshold */
-                VGAOUT8(0x3C4, 0x16);
-                bRegTemp = VGAIN8(0x3C5);
-                bRegTemp &= ~0x3F;
-                bRegTemp = (bRegTemp) | (0x10);
-                VGAOUT8(0x3C5, bRegTemp);
-            }
-            /* 3c5.18[0:5] */
-            VGAOUT8(0x3C4, 0x18);
-            bRegTemp = VGAIN8(0x3C5);
-            bRegTemp &= ~0x3F;
-            bRegTemp |= 0x17;
-            bRegTemp |= 0x40;  /* force the preq always higher than treq */
-            VGAOUT8(0x3C5, bRegTemp);
-        }
-        break;
-    case VIA_K8M800:
-        /*=* R1 Display FIFO depth (384 /8 -1 -> 0xbf) SR17[7:0] (8bits) *=*/
-        VGAOUT8(0x3c4, 0x17);
-        VGAOUT8(0x3c5, 0xbf);
-
-        /*=* R2 Display fetch datum threshold value (328/4 -> 0x52)
-             SR16[5:0], SR16[7] (7bits) *=*/
-        VGAOUT8(0x3c4, 0x16);
-        bRegTemp = VGAIN8(0x3c5) & ~0xBF;
-        bRegTemp |= (0x52 & 0x3F);
-        bRegTemp |= ((0x52 & 0x40) << 1);
-        VGAOUT8(0x3c5, bRegTemp);
-
-        /*=* R3 Switch to the highest agent threshold value (74 -> 0x4a)
-             SR18[5:0], SR18[7] (7bits) *=*/
-        VGAOUT8(0x3c4, 0x18);
-        bRegTemp = VGAIN8(0x3c5) & ~0xBF;
-        bRegTemp |= (0x4a & 0x3F);
-        bRegTemp |= ((0x4a & 0x40) << 1);
-        VGAOUT8(0x3c5, bRegTemp);
-#if 0
-        /*=* R4 Fetch Number for a scan line (unit: 8 bytes)
-             SR1C[7:0], SR1D[1:0] (10bits) *=*/
-        wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4;
-        VGAOUT8(0x3c4, 0x1c);
-        VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF));
-        VGAOUT8(0x3c4, 0x1d);
-        bRegTemp = VGAIN8(0x3c5) & ~0x03;
-        VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8));
-#endif
-        if (ctx->shared.virtualWidth >= 1400 && ctx->bpp == 32)
-        {
-            /*=* Max. length for a request SR22[4:0] (64/4 -> 0x10) *=*/
-            VGAOUT8(0x3c4, 0x22);
-            bRegTemp = VGAIN8(0x3c5) & ~0x1F;
-            VGAOUT8(0x3c5, bRegTemp | 0x10);
-        }
-        else
-        {
-            /*=* Max. length for a request SR22[4:0]
-                 (128/4 -> over flow 0x0) *=*/
-            VGAOUT8(0x3c4, 0x22);
-            bRegTemp = VGAIN8(0x3c5) & ~0x1F;
-            VGAOUT8(0x3c5, bRegTemp);
-        }
-        break;
-    case VIA_PM800:
-        /*=* R1 Display FIFO depth (96-1 -> 0x5f) SR17[7:0] (8bits) *=*/
-        VGAOUT8(0x3c4, 0x17);
-        VGAOUT8(0x3c5, 0x5f);
-
-        /*=* R2 Display fetch datum threshold value (32 -> 0x20)
-             SR16[5:0], SR16[7] (7bits) *=*/
-        VGAOUT8(0x3c4, 0x16);
-        bRegTemp = VGAIN8(0x3c5) & ~0xBF;
-        bRegTemp |= (0x20 & 0x3F);
-        bRegTemp |= ((0x20 & 0x40) << 1);
-        VGAOUT8(0x3c5, bRegTemp);
-
-        /*=* R3 Switch to the highest agent threshold value (16 -> 0x10)
-             SR18[5:0], SR18[7] (7bits) *=*/
-        VGAOUT8(0x3c4, 0x18);
-        bRegTemp = VGAIN8(0x3c5) & ~0xBF;
-        bRegTemp |= (0x10 & 0x3F);
-        bRegTemp |= ((0x10 & 0x40) << 1);
-        VGAOUT8(0x3c5, bRegTemp);
-#if 0
-        /*=* R4 Fetch Number for a scan line (unit: 8 bytes)
-             SR1C[7:0], SR1D[1:0] (10bits) *=*/
-        wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4;
-        VGAOUT8(0x3c4, 0x1c);
-        VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF));
-        VGAOUT8(0x3c4, 0x1d);
-        bRegTemp = VGAIN8(0x3c5) & ~0x03;
-        VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8));
-#endif
-        if (ctx->shared.virtualWidth >= 1400 && ctx->bpp == 32)
-        {
-            /*=* Max. length for a request SR22[4:0] (64/4 -> 0x10) *=*/
-            VGAOUT8(0x3c4, 0x22);
-            bRegTemp = VGAIN8(0x3c5) & ~0x1F;
-            VGAOUT8(0x3c5, bRegTemp | 0x10);
-        }
-        else
-        {
-            /*=* Max. length for a request SR22[4:0] (0x1F) *=*/
-            VGAOUT8(0x3c4, 0x22);
-            bRegTemp = VGAIN8(0x3c5) & ~0x1F;
-            VGAOUT8(0x3c5, bRegTemp | 0x1F);
-        }
-        break;
-    default:
-        break;
-    }
-}
-
-static void VIAInitialize2DEngine(DRIDriverContext *ctx)
-{
-    VIAPtr  pVia = VIAPTR(ctx);
-    uint32_t  dwVQStartAddr, dwVQEndAddr;
-    uint32_t  dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH;
-    uint32_t  dwGEMode;
-
-    /* init 2D engine regs to reset 2D engine */
-    VIASETREG(0x04, 0x0);
-    VIASETREG(0x08, 0x0);
-    VIASETREG(0x0c, 0x0);
-    VIASETREG(0x10, 0x0);
-    VIASETREG(0x14, 0x0);
-    VIASETREG(0x18, 0x0);
-    VIASETREG(0x1c, 0x0);
-    VIASETREG(0x20, 0x0);
-    VIASETREG(0x24, 0x0);
-    VIASETREG(0x28, 0x0);
-    VIASETREG(0x2c, 0x0);
-    VIASETREG(0x30, 0x0);
-    VIASETREG(0x34, 0x0);
-    VIASETREG(0x38, 0x0);
-    VIASETREG(0x3c, 0x0);
-    VIASETREG(0x40, 0x0);
-
-    VIADisableMMIO(ctx);
-
-    /* Init AGP and VQ regs */
-    VIASETREG(0x43c, 0x00100000);
-    VIASETREG(0x440, 0x00000000);
-    VIASETREG(0x440, 0x00333004);
-    VIASETREG(0x440, 0x60000000);
-    VIASETREG(0x440, 0x61000000);
-    VIASETREG(0x440, 0x62000000);
-    VIASETREG(0x440, 0x63000000);
-    VIASETREG(0x440, 0x64000000);
-    VIASETREG(0x440, 0x7D000000);
-
-    VIASETREG(0x43c, 0xfe020000);
-    VIASETREG(0x440, 0x00000000);
-
-    if (pVia->VQStart != 0) {
-        /* Enable VQ */
-        dwVQStartAddr = pVia->VQStart;
-        dwVQEndAddr = pVia->VQEnd;
-        dwVQStartL = 0x50000000 | (dwVQStartAddr & 0xFFFFFF);
-        dwVQEndL = 0x51000000 | (dwVQEndAddr & 0xFFFFFF);
-        dwVQStartEndH = 0x52000000 | ((dwVQStartAddr & 0xFF000000) >> 24) |
-                        ((dwVQEndAddr & 0xFF000000) >> 16);
-        dwVQLen = 0x53000000 | (VIA_VQ_SIZE >> 3);
-
-        VIASETREG(0x43c, 0x00fe0000);
-        VIASETREG(0x440, 0x080003fe);
-        VIASETREG(0x440, 0x0a00027c);
-        VIASETREG(0x440, 0x0b000260);
-        VIASETREG(0x440, 0x0c000274);
-        VIASETREG(0x440, 0x0d000264);
-        VIASETREG(0x440, 0x0e000000);
-        VIASETREG(0x440, 0x0f000020);
-        VIASETREG(0x440, 0x1000027e);
-        VIASETREG(0x440, 0x110002fe);
-        VIASETREG(0x440, 0x200f0060);
-
-        VIASETREG(0x440, 0x00000006);
-        VIASETREG(0x440, 0x40008c0f);
-        VIASETREG(0x440, 0x44000000);
-        VIASETREG(0x440, 0x45080c04);
-        VIASETREG(0x440, 0x46800408);
-
-        VIASETREG(0x440, dwVQStartEndH);
-        VIASETREG(0x440, dwVQStartL);
-        VIASETREG(0x440, dwVQEndL);
-        VIASETREG(0x440, dwVQLen);
-    }
-    else {
-        /* Diable VQ */
-        VIASETREG(0x43c, 0x00fe0000);
-        VIASETREG(0x440, 0x00000004);
-        VIASETREG(0x440, 0x40008c0f);
-        VIASETREG(0x440, 0x44000000);
-        VIASETREG(0x440, 0x45080c04);
-        VIASETREG(0x440, 0x46800408);
-    }
-
-    dwGEMode = 0;
-
-    switch (ctx->bpp) {
-    case 16:
-        dwGEMode |= VIA_GEM_16bpp;
-        break;
-    case 32:
-        dwGEMode |= VIA_GEM_32bpp;
-        break;
-    default:
-        dwGEMode |= VIA_GEM_8bpp;
-        break;
-    }
-
-#if 0
-    switch (ctx->shared.virtualWidth) {
-    case 800:
-        dwGEMode |= VIA_GEM_800;
-        break;
-    case 1024:
-        dwGEMode |= VIA_GEM_1024;
-        break;
-    case 1280:
-        dwGEMode |= VIA_GEM_1280;
-        break;
-    case 1600:
-        dwGEMode |= VIA_GEM_1600;
-        break;
-    case 2048:
-        dwGEMode |= VIA_GEM_2048;
-        break;
-    default:
-        dwGEMode |= VIA_GEM_640;
-        break;
-    }
-#endif
-    
-    VIAEnableMMIO(ctx);
-
-    /* Set BPP and Pitch */
-    VIASETREG(VIA_REG_GEMODE, dwGEMode);
-
-    /* Set Src and Dst base address and pitch, pitch is qword */
-    VIASETREG(VIA_REG_SRCBASE, 0x0);
-    VIASETREG(VIA_REG_DSTBASE, 0x0);
-    VIASETREG(VIA_REG_PITCH, VIA_PITCH_ENABLE |
-              ((ctx->shared.virtualWidth * ctx->bpp >> 3) >> 3) |
-              (((ctx->shared.virtualWidth * ctx->bpp >> 3) >> 3) << 16));
-}
-
-static int b3DRegsInitialized = 0;
-
-static void VIAInitialize3DEngine(DRIDriverContext *ctx)
-{
-    VIAPtr  pVia = VIAPTR(ctx);
-    int i;
-
-    if (!b3DRegsInitialized)
-    {
-
-        VIASETREG(0x43C, 0x00010000);
-
-        for (i = 0; i <= 0x7D; i++)
-        {
-            VIASETREG(0x440, (uint32_t) i << 24);
-        }
-
-        VIASETREG(0x43C, 0x00020000);
-
-        for (i = 0; i <= 0x94; i++)
-        {
-            VIASETREG(0x440, (uint32_t) i << 24);
-        }
-
-        VIASETREG(0x440, 0x82400000);
-
-        VIASETREG(0x43C, 0x01020000);
-
-
-        for (i = 0; i <= 0x94; i++)
-        {
-            VIASETREG(0x440, (uint32_t) i << 24);
-        }
-
-        VIASETREG(0x440, 0x82400000);
-        VIASETREG(0x43C, 0xfe020000);
-
-        for (i = 0; i <= 0x03; i++)
-        {
-            VIASETREG(0x440, (uint32_t) i << 24);
-        }
-
-        VIASETREG(0x43C, 0x00030000);
-
-        for (i = 0; i <= 0xff; i++)
-        {
-            VIASETREG(0x440, 0);
-        }
-        VIASETREG(0x43C, 0x00100000);
-        VIASETREG(0x440, 0x00333004);
-        VIASETREG(0x440, 0x10000002);
-        VIASETREG(0x440, 0x60000000);
-        VIASETREG(0x440, 0x61000000);
-        VIASETREG(0x440, 0x62000000);
-        VIASETREG(0x440, 0x63000000);
-        VIASETREG(0x440, 0x64000000);
-
-        VIASETREG(0x43C, 0x00fe0000);
-
-        if (pVia->ChipRev >= 3 )
-            VIASETREG(0x440,0x40008c0f);
-        else
-            VIASETREG(0x440,0x4000800f);
-
-        VIASETREG(0x440,0x44000000);
-        VIASETREG(0x440,0x45080C04);
-        VIASETREG(0x440,0x46800408);
-        VIASETREG(0x440,0x50000000);
-        VIASETREG(0x440,0x51000000);
-        VIASETREG(0x440,0x52000000);
-        VIASETREG(0x440,0x53000000);
-
-        b3DRegsInitialized = 1;
-        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-                   "3D Engine has been initialized.\n");
-    }
-
-    VIASETREG(0x43C,0x00fe0000);
-    VIASETREG(0x440,0x08000001);
-    VIASETREG(0x440,0x0A000183);
-    VIASETREG(0x440,0x0B00019F);
-    VIASETREG(0x440,0x0C00018B);
-    VIASETREG(0x440,0x0D00019B);
-    VIASETREG(0x440,0x0E000000);
-    VIASETREG(0x440,0x0F000000);
-    VIASETREG(0x440,0x10000000);
-    VIASETREG(0x440,0x11000000);
-    VIASETREG(0x440,0x20000000);
-}
-
-static int
-WaitIdleCLE266(VIAPtr pVia)
-{
-    int loop = 0;
-
-    /*mem_barrier();*/
-
-    while (!(VIAGETREG(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && (loop++ < MAXLOOP))
-        ;
-
-    while ((VIAGETREG(VIA_REG_STATUS) &
-          (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY)) &&
-          (loop++ < MAXLOOP))
-        ;
-
-    return loop >= MAXLOOP;
-}
-
-static int viaInitFBDev(DRIDriverContext *ctx)
-{
-    VIAPtr pVia = CALLOC(sizeof(*pVia));
-
-    ctx->driverPrivate = (void *)pVia;
-
-    switch (ctx->chipset) {
-    case PCI_CHIP_CLE3122:
-    case PCI_CHIP_CLE3022:
-        pVia->Chipset = VIA_CLE266;
-        break;
-    case PCI_CHIP_VT7205:
-    case PCI_CHIP_VT3205:
-        pVia->Chipset = VIA_KM400;
-        break;
-    case PCI_CHIP_VT3204:
-    case PCI_CHIP_VT3344:
-        pVia->Chipset = VIA_K8M800;
-        break;
-    case PCI_CHIP_VT3259:
-        pVia->Chipset = VIA_PM800;
-        break;
-    default:
-        xf86DrvMsg(0, X_ERROR, "VIA: Unknown device ID (0x%x)\n", ctx->chipset);
-    }
-
-    /* _SOLO TODO XXX need to read ChipRev too */
-    pVia->ChipRev = 0;
-
-    pVia->videoRambytes = ctx->shared.fbSize;
-    pVia->MmioBase = ctx->MMIOStart;
-    pVia->FrameBufferBase = ctx->FBStart & 0xfc000000;
-
-    pVia->FBFreeStart = ctx->shared.virtualWidth * ctx->cpp *
-        ctx->shared.virtualHeight;
-
-#if 1
-    /* Alloc a second framebuffer for the second head */
-    pVia->FBFreeStart += ctx->shared.virtualWidth * ctx->cpp *
-	ctx->shared.virtualHeight;
-#endif
-
-    pVia->VQStart = pVia->FBFreeStart;
-    pVia->VQEnd = pVia->FBFreeStart + VIA_VQ_SIZE - 1;
-
-    pVia->FBFreeStart += VIA_VQ_SIZE;
-
-    pVia->FBFreeEnd = pVia->videoRambytes;
-
-    if (!VIADRIScreenInit(ctx))
-        return 0;
-
-    return 1;
-}
-
-static void viaHaltFBDev(DRIDriverContext *ctx)
-{
-    drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
-    drmClose(ctx->drmFD);
-
-    if (ctx->driverPrivate) {
-        free(ctx->driverPrivate);
-        ctx->driverPrivate = 0;
-    }
-}
-
-static int viaEngineShutdown(const DRIDriverContext *ctx)
-{
-    return 1;
-}
-
-static int viaEngineRestore(const DRIDriverContext *ctx)
-{
-    return 1;
-}
-
-const struct DRIDriverRec __driDriver =
-{
-    viaValidateMode,
-    viaPostValidateMode,
-    viaInitFBDev,
-    viaHaltFBDev,
-    viaEngineShutdown,
-    viaEngineRestore,  
-    0,
-};
-
-- 
cgit v1.2.3


From 9543f7f05f416ef6c1ac160e12e2d7ceed3b32ae Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 6 Feb 2010 19:37:23 +0100
Subject: radeon: fallback to software in glCopyTexImage if blit isn't
 available

---
 src/mesa/drivers/dri/radeon/radeon_tex_copy.c | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index 89fe9915a7..a4bb03d5d3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -53,6 +53,10 @@ do_copy_texsubimage(GLcontext *ctx,
     unsigned src_width;
     unsigned dst_width;
 
+    if (!radeon->vtbl.blit) {
+        return GL_FALSE;
+    }
+
     if (_mesa_get_format_bits(timg->base.TexFormat, GL_DEPTH_BITS) > 0) {
         rrb = radeon_get_depthbuffer(radeon);
     } else {
-- 
cgit v1.2.3


From 78eb4a2ea569a7bd624bbf83ece5c9acef82a8de Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 16 Jan 2010 15:11:37 +0100
Subject: radeon: no need to emit full state twice after flush

---
 src/mesa/drivers/dri/radeon/radeon_common.c | 5 -----
 1 file changed, 5 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index 79f3ff7da6..13f1f0611b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -1325,11 +1325,6 @@ void rcommonBeginBatch(radeonContextPtr rmesa, int n,
 		       const char *function,
 		       int line)
 {
-	if (!rmesa->cmdbuf.cs->cdw && dostate) {
-		radeon_print(RADEON_STATE, RADEON_NORMAL,
-				"Reemit state after flush (from %s)\n", function);
-		radeonEmitState(rmesa);
-	}
 	radeon_cs_begin(rmesa->cmdbuf.cs, n, file, function, line);
 
     radeon_print(RADEON_CS, RADEON_VERBOSE, "BEGIN_BATCH(%d) at %d, from %s:%i\n",
-- 
cgit v1.2.3


From 88a99bb305186fd0eaaae9bd0dbfa4c45f14cac7 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 16 Jan 2010 18:38:17 +0100
Subject: radeon: added tiling functions

---
 src/mesa/drivers/dri/r200/Makefile        |   3 +-
 src/mesa/drivers/dri/r200/radeon_tile.c   |   1 +
 src/mesa/drivers/dri/r200/radeon_tile.h   |   1 +
 src/mesa/drivers/dri/r300/Makefile        |   3 +-
 src/mesa/drivers/dri/r300/radeon_tile.c   |   1 +
 src/mesa/drivers/dri/r300/radeon_tile.h   |   1 +
 src/mesa/drivers/dri/r600/Makefile        |   3 +-
 src/mesa/drivers/dri/r600/radeon_tile.c   |   1 +
 src/mesa/drivers/dri/r600/radeon_tile.h   |   1 +
 src/mesa/drivers/dri/radeon/Makefile      |   3 +-
 src/mesa/drivers/dri/radeon/radeon_tile.c | 246 ++++++++++++++++++++++++++++++
 src/mesa/drivers/dri/radeon/radeon_tile.h |  32 ++++
 12 files changed, 292 insertions(+), 4 deletions(-)
 create mode 120000 src/mesa/drivers/dri/r200/radeon_tile.c
 create mode 120000 src/mesa/drivers/dri/r200/radeon_tile.h
 create mode 120000 src/mesa/drivers/dri/r300/radeon_tile.c
 create mode 120000 src/mesa/drivers/dri/r300/radeon_tile.h
 create mode 120000 src/mesa/drivers/dri/r600/radeon_tile.c
 create mode 120000 src/mesa/drivers/dri/r600/radeon_tile.h
 create mode 100644 src/mesa/drivers/dri/radeon/radeon_tile.c
 create mode 100644 src/mesa/drivers/dri/radeon/radeon_tile.h

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile
index 2e86e8b941..d91e5482e9 100644
--- a/src/mesa/drivers/dri/r200/Makefile
+++ b/src/mesa/drivers/dri/r200/Makefile
@@ -24,7 +24,8 @@ RADEON_COMMON_SOURCES = \
 	radeon_queryobj.c \
 	radeon_span.c \
 	radeon_texture.c \
-	radeon_tex_copy.c
+	radeon_tex_copy.c \
+	radeon_tile.c
 
 DRIVER_SOURCES = r200_context.c \
 		 r200_ioctl.c \
diff --git a/src/mesa/drivers/dri/r200/radeon_tile.c b/src/mesa/drivers/dri/r200/radeon_tile.c
new file mode 120000
index 0000000000..d4bfe27da6
--- /dev/null
+++ b/src/mesa/drivers/dri/r200/radeon_tile.c
@@ -0,0 +1 @@
+../radeon/radeon_tile.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r200/radeon_tile.h b/src/mesa/drivers/dri/r200/radeon_tile.h
new file mode 120000
index 0000000000..31074c581e
--- /dev/null
+++ b/src/mesa/drivers/dri/r200/radeon_tile.h
@@ -0,0 +1 @@
+../radeon/radeon_tile.h
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile
index 08934fc996..730d801bb0 100644
--- a/src/mesa/drivers/dri/r300/Makefile
+++ b/src/mesa/drivers/dri/r300/Makefile
@@ -34,7 +34,8 @@ RADEON_COMMON_SOURCES = \
 	radeon_span.c \
 	radeon_queryobj.c \
 	radeon_texture.c \
-	radeon_tex_copy.c
+	radeon_tex_copy.c \
+	radeon_tile.c
 
 DRIVER_SOURCES = \
 		 radeon_screen.c \
diff --git a/src/mesa/drivers/dri/r300/radeon_tile.c b/src/mesa/drivers/dri/r300/radeon_tile.c
new file mode 120000
index 0000000000..d4bfe27da6
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_tile.c
@@ -0,0 +1 @@
+../radeon/radeon_tile.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r300/radeon_tile.h b/src/mesa/drivers/dri/r300/radeon_tile.h
new file mode 120000
index 0000000000..31074c581e
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_tile.h
@@ -0,0 +1 @@
+../radeon/radeon_tile.h
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r600/Makefile b/src/mesa/drivers/dri/r600/Makefile
index 2478b12658..b6d1c5f459 100644
--- a/src/mesa/drivers/dri/r600/Makefile
+++ b/src/mesa/drivers/dri/r600/Makefile
@@ -34,7 +34,8 @@ RADEON_COMMON_SOURCES = \
 	radeon_span.c \
 	radeon_texture.c \
 	radeon_queryobj.c \
-	radeon_tex_copy.c
+	radeon_tex_copy.c \
+	radeon_tile.c
 
 DRIVER_SOURCES = \
 		 radeon_screen.c \
diff --git a/src/mesa/drivers/dri/r600/radeon_tile.c b/src/mesa/drivers/dri/r600/radeon_tile.c
new file mode 120000
index 0000000000..d4bfe27da6
--- /dev/null
+++ b/src/mesa/drivers/dri/r600/radeon_tile.c
@@ -0,0 +1 @@
+../radeon/radeon_tile.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r600/radeon_tile.h b/src/mesa/drivers/dri/r600/radeon_tile.h
new file mode 120000
index 0000000000..31074c581e
--- /dev/null
+++ b/src/mesa/drivers/dri/r600/radeon_tile.h
@@ -0,0 +1 @@
+../radeon/radeon_tile.h
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/radeon/Makefile b/src/mesa/drivers/dri/radeon/Makefile
index fc6d1c8e89..f7e8059c4f 100644
--- a/src/mesa/drivers/dri/radeon/Makefile
+++ b/src/mesa/drivers/dri/radeon/Makefile
@@ -25,7 +25,8 @@ RADEON_COMMON_SOURCES = \
 	radeon_queryobj.c \
 	radeon_span.c \
 	radeon_texture.c \
-	radeon_tex_copy.c
+	radeon_tex_copy.c \
+	radeon_tile.c
 
 DRIVER_SOURCES = \
 	radeon_context.c \
diff --git a/src/mesa/drivers/dri/radeon/radeon_tile.c b/src/mesa/drivers/dri/radeon/radeon_tile.c
new file mode 100644
index 0000000000..56f2fc46d9
--- /dev/null
+++ b/src/mesa/drivers/dri/radeon/radeon_tile.c
@@ -0,0 +1,246 @@
+/*
+ * Copyright (C) 2010 Maciej Cencora <m.cencora@gmail.com>
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "radeon_tile.h"
+
+#include <stdint.h>
+#include <string.h>
+
+#include <main/macros.h>
+
+#define MICRO_TILE_SIZE 32
+
+static void micro_tile_8_x_4_8bit(const void * const src, unsigned src_pitch,
+                                  void * const dst, unsigned dst_pitch,
+                                  unsigned width, unsigned height)
+{
+    unsigned row; /* current source row */
+    unsigned col; /* current source column */
+    unsigned k; /* number of processed tiles */
+    const unsigned tile_width = 8, tile_height = 4;
+    const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width;
+
+    k = 0;
+    for (row = 0; row < height; row += tile_height)
+    {
+        for (col = 0; col < width; col += tile_width, ++k)
+        {
+            uint8_t *src2 = (uint8_t *)src + src_pitch * row + col;
+            uint8_t *dst2 = (uint8_t *)dst + row * dst_pitch +
+                             (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint8_t);
+            unsigned j;
+
+            for (j = 0; j < MIN2(tile_height, height - row); ++j)
+            {
+                unsigned columns = MIN2(tile_width, width - col);
+                memcpy(dst2, src2, columns * sizeof(uint8_t));
+                dst2 += tile_width;
+                src2 += src_pitch;
+            }
+        }
+    }
+}
+
+static void micro_tile_4_x_4_16bit(const void * const src, unsigned src_pitch,
+                                   void * const dst, unsigned dst_pitch,
+                                   unsigned width, unsigned height)
+{
+    unsigned row; /* current source row */
+    unsigned col; /* current source column */
+    unsigned k; /* number of processed tiles */
+    const unsigned tile_width = 4, tile_height = 4;
+    const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width;
+
+    k = 0;
+    for (row = 0; row < height; row += tile_height)
+    {
+        for (col = 0; col < width; col += tile_width, ++k)
+        {
+            uint16_t *src2 = (uint16_t *)src + src_pitch * row + col;
+            uint16_t *dst2 = (uint16_t *)dst + row * dst_pitch +
+                             (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint16_t);
+            unsigned j;
+
+            for (j = 0; j < MIN2(tile_height, height - row); ++j)
+            {
+                unsigned columns = MIN2(tile_width, width - col);
+                memcpy(dst2, src2, columns * sizeof(uint16_t));
+                dst2 += tile_width;
+                src2 += src_pitch;
+            }
+        }
+    }
+}
+
+static void micro_tile_8_x_2_16bit(const void * const src, unsigned src_pitch,
+                                   void * const dst, unsigned dst_pitch,
+                                   unsigned width, unsigned height)
+{
+    unsigned row; /* current source row */
+    unsigned col; /* current source column */
+    unsigned k; /* number of processed tiles */
+    const unsigned tile_width = 8, tile_height = 2;
+    const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width;
+
+    k = 0;
+    for (row = 0; row < height; row += tile_height)
+    {
+        for (col = 0; col < width; col += tile_width, ++k)
+        {
+            uint16_t *src2 = (uint16_t *)src + src_pitch * row + col;
+            uint16_t *dst2 = (uint16_t *)dst + row * dst_pitch +
+                             (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint16_t);
+            unsigned j;
+
+            for (j = 0; j < MIN2(tile_height, height - row); ++j)
+            {
+                unsigned columns = MIN2(tile_width, width - col);
+                memcpy(dst2, src2, columns * sizeof(uint16_t));
+                dst2 += tile_width;
+                src2 += src_pitch;
+            }
+        }
+    }
+}
+
+static void micro_tile_4_x_2_32bit(const void * const src, unsigned src_pitch,
+                                   void * const dst, unsigned dst_pitch,
+                                   unsigned width, unsigned height)
+{
+    unsigned row; /* current source row */
+    unsigned col; /* current source column */
+    unsigned k; /* number of processed tiles */
+    const unsigned tile_width = 4, tile_height = 2;
+    const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width;
+
+    k = 0;
+    for (row = 0; row < height; row += tile_height)
+    {
+        for (col = 0; col < width; col += tile_width, ++k)
+        {
+            uint32_t *src2 = (uint32_t *)src + src_pitch * row + col;
+            uint32_t *dst2 = (uint32_t *)dst + row * dst_pitch +
+                             (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint32_t);
+            unsigned j;
+
+            for (j = 0; j < MIN2(tile_height, height - row); ++j)
+            {
+                unsigned columns = MIN2(tile_width, width - col);
+                memcpy(dst2, src2, columns * sizeof(uint32_t));
+                dst2 += tile_width;
+                src2 += src_pitch;
+            }
+        }
+    }
+}
+
+static void micro_tile_2_x_2_64bit(const void * const src, unsigned src_pitch,
+                                   void * const dst, unsigned dst_pitch,
+                                   unsigned width, unsigned height)
+{
+    unsigned row; /* current source row */
+    unsigned col; /* current source column */
+    unsigned k; /* number of processed tiles */
+    const unsigned tile_width = 2, tile_height = 2;
+    const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width;
+
+    k = 0;
+    for (row = 0; row < height; row += tile_height)
+    {
+        for (col = 0; col < width; col += tile_width, ++k)
+        {
+            uint64_t *src2 = (uint64_t *)src + src_pitch * row + col;
+            uint64_t *dst2 = (uint64_t *)dst + row * dst_pitch +
+                             (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint64_t);
+            unsigned j;
+
+            for (j = 0; j < MIN2(tile_height, height - row); ++j)
+            {
+                unsigned columns = MIN2(tile_width, width - col);
+                memcpy(dst2, src2, columns * sizeof(uint64_t));
+                dst2 += tile_width;
+                src2 += src_pitch;
+            }
+        }
+    }
+}
+
+static void micro_tile_1_x_1_128bit(const void * src, unsigned src_pitch,
+                                    void * dst, unsigned dst_pitch,
+                                    unsigned width, unsigned height)
+{
+    unsigned i, j;
+    const unsigned elem_size = 16; /* sizeof(uint128_t) */
+
+    for (j = 0; j < height; ++j)
+    {
+        for (i = 0; i < width; ++i)
+        {
+            memcpy(dst, src, width * elem_size);
+            dst += dst_pitch * elem_size;
+            src += src_pitch * elem_size;
+        }
+    }
+}
+
+void tile_image(const void * src, unsigned src_pitch,
+                void *dst, unsigned dst_pitch,
+                gl_format format, unsigned width, unsigned height)
+{
+    assert(src_pitch >= width);
+    assert(dst_pitch >= width);
+    assert(dst_pitch * _mesa_get_format_bytes(format) % MICRO_TILE_SIZE == 0);
+
+    switch (_mesa_get_format_bytes(format))
+    {
+        case 16:
+            micro_tile_1_x_1_128bit(src, src_pitch, dst, dst_pitch, width, height);
+            break;
+        case 8:
+            micro_tile_2_x_2_64bit(src, src_pitch, dst, dst_pitch, width, height);
+            break;
+        case 4:
+            micro_tile_4_x_2_32bit(src, src_pitch, dst, dst_pitch, width, height);
+            break;
+        case 2:
+            if (_mesa_get_format_bits(format, GL_DEPTH_BITS))
+            {
+                micro_tile_4_x_4_16bit(src, src_pitch, dst, dst_pitch, width, height);
+            }
+            else
+            {
+                micro_tile_8_x_2_16bit(src, src_pitch, dst, dst_pitch, width, height);
+            }
+            break;
+        case 1:
+            micro_tile_8_x_4_8bit(src, src_pitch, dst, dst_pitch, width, height);
+            break;
+        default:
+            assert(0);
+            break;
+    }
+}
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/radeon/radeon_tile.h b/src/mesa/drivers/dri/radeon/radeon_tile.h
new file mode 100644
index 0000000000..4985e55204
--- /dev/null
+++ b/src/mesa/drivers/dri/radeon/radeon_tile.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2010 Maciej Cencora <m.cencora@gmail.com>
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include <main/formats.h>
+
+void tile_image(const void * src, unsigned src_pitch,
+                void *dst, unsigned dst_pitch,
+                gl_format format, unsigned width, unsigned height);
-- 
cgit v1.2.3


From 65faa27aa639e7352708a30105db3318f22f5f93 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 16 Jan 2010 23:11:10 +0100
Subject: radeon: add tile size getter

---
 src/mesa/drivers/dri/radeon/radeon_tile.c | 40 ++++++++++++++++++++++++++++++-
 src/mesa/drivers/dri/radeon/radeon_tile.h |  2 ++
 2 files changed, 41 insertions(+), 1 deletion(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_tile.c b/src/mesa/drivers/dri/radeon/radeon_tile.c
index 56f2fc46d9..b998baf0a2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tile.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tile.c
@@ -243,4 +243,42 @@ void tile_image(const void * src, unsigned src_pitch,
             assert(0);
             break;
     }
-}
\ No newline at end of file
+}
+
+void get_tile_size(gl_format format, unsigned *block_width, unsigned *block_height)
+{
+    switch (_mesa_get_format_bytes(format))
+    {
+        case 16:
+            *block_width = 1;
+            *block_height = 1;
+            break;
+        case 8:
+            *block_width = 2;
+            *block_height = 2;
+            break;
+        case 4:
+            *block_width = 4;
+            *block_height = 2;
+            break;
+        case 2:
+            if (_mesa_get_format_bits(format, GL_DEPTH_BITS))
+            {
+                *block_width = 4;
+                *block_height = 4;
+            }
+            else
+            {
+                *block_width = 8;
+                *block_height = 2;
+            }
+            break;
+        case 1:
+            *block_width = 8;
+            *block_height = 4;
+            break;
+        default:
+            assert(0);
+            break;
+    }
+}
diff --git a/src/mesa/drivers/dri/radeon/radeon_tile.h b/src/mesa/drivers/dri/radeon/radeon_tile.h
index 4985e55204..06850b361d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tile.h
+++ b/src/mesa/drivers/dri/radeon/radeon_tile.h
@@ -30,3 +30,5 @@
 void tile_image(const void * src, unsigned src_pitch,
                 void *dst, unsigned dst_pitch,
                 gl_format format, unsigned width, unsigned height);
+
+void get_tile_size(gl_format format, unsigned *block_width, unsigned *block_height);
-- 
cgit v1.2.3


From 5fefca5dbae9a5b00a3d624da0b5e582c00ad280 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 6 Feb 2010 13:46:17 +0100
Subject: radeon: add software untiling functions

---
 src/mesa/drivers/dri/radeon/radeon_tile.c | 221 ++++++++++++++++++++++++++++++
 src/mesa/drivers/dri/radeon/radeon_tile.h |   4 +
 2 files changed, 225 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_tile.c b/src/mesa/drivers/dri/radeon/radeon_tile.c
index b998baf0a2..1e4729a0b5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tile.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tile.c
@@ -245,6 +245,227 @@ void tile_image(const void * src, unsigned src_pitch,
     }
 }
 
+static void micro_untile_8_x_4_8bit(const void * const src, unsigned src_pitch,
+                                    void * const dst, unsigned dst_pitch,
+                                    unsigned width, unsigned height)
+{
+    unsigned row; /* current destination row */
+    unsigned col; /* current destination column */
+    unsigned k; /* current tile number */
+    const unsigned tile_width = 8, tile_height = 4;
+    const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width;
+
+    assert(src_pitch % tile_width == 0);
+
+    k = 0;
+    for (row = 0; row < height; row += tile_height)
+    {
+        for (col = 0; col < width; col += tile_width, ++k)
+        {
+            uint8_t *src2 = (uint8_t *)src + row * src_pitch +
+                             (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint8_t);
+            uint8_t *dst2 = (uint8_t *)dst + dst_pitch * row + col;
+            unsigned j;
+
+            for (j = 0; j < MIN2(tile_height, height - row); ++j)
+            {
+                unsigned columns = MIN2(tile_width, width - col);
+                memcpy(dst2, src2, columns * sizeof(uint8_t));
+                dst2 += dst_pitch;
+                src2 += tile_width;
+            }
+        }
+    }
+}
+
+static void micro_untile_8_x_2_16bit(const void * const src, unsigned src_pitch,
+                                     void * const dst, unsigned dst_pitch,
+                                     unsigned width, unsigned height)
+{
+    unsigned row; /* current destination row */
+    unsigned col; /* current destination column */
+    unsigned k; /* current tile number */
+    const unsigned tile_width = 8, tile_height = 2;
+    const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width;
+
+    assert(src_pitch % tile_width == 0);
+
+    k = 0;
+    for (row = 0; row < height; row += tile_height)
+    {
+        for (col = 0; col < width; col += tile_width, ++k)
+        {
+            uint16_t *src2 = (uint16_t *)src + row * src_pitch +
+                             (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint16_t);
+            uint16_t *dst2 = (uint16_t *)dst + dst_pitch * row + col;
+            unsigned j;
+
+            for (j = 0; j < MIN2(tile_height, height - row); ++j)
+            {
+                unsigned columns = MIN2(tile_width, width - col);
+                memcpy(dst2, src2, columns * sizeof(uint16_t));
+                dst2 += dst_pitch;
+                src2 += tile_width;
+            }
+        }
+    }
+}
+
+static void micro_untile_4_x_4_16bit(const void * const src, unsigned src_pitch,
+                                     void * const dst, unsigned dst_pitch,
+                                     unsigned width, unsigned height)
+{
+    unsigned row; /* current destination row */
+    unsigned col; /* current destination column */
+    unsigned k; /* current tile number */
+    const unsigned tile_width = 4, tile_height = 4;
+    const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width;
+
+    assert(src_pitch % tile_width == 0);
+
+    k = 0;
+    for (row = 0; row < height; row += tile_height)
+    {
+        for (col = 0; col < width; col += tile_width, ++k)
+        {
+            uint16_t *src2 = (uint16_t *)src + row * src_pitch +
+                             (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint16_t);
+            uint16_t *dst2 = (uint16_t *)dst + dst_pitch * row + col;
+            unsigned j;
+
+            for (j = 0; j < MIN2(tile_height, height - row); ++j)
+            {
+                unsigned columns = MIN2(tile_width, width - col);
+                memcpy(dst2, src2, columns * sizeof(uint16_t));
+                dst2 += dst_pitch;
+                src2 += tile_width;
+            }
+        }
+    }
+}
+
+static void micro_untile_4_x_2_32bit(const void * const src, unsigned src_pitch,
+                                     void * const dst, unsigned dst_pitch,
+                                     unsigned width, unsigned height)
+{
+    unsigned row; /* current destination row */
+    unsigned col; /* current destination column */
+    unsigned k; /* current tile number */
+    const unsigned tile_width = 4, tile_height = 2;
+    const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width;
+
+    assert(src_pitch % tile_width == 0);
+
+    k = 0;
+    for (row = 0; row < height; row += tile_height)
+    {
+        for (col = 0; col < width; col += tile_width, ++k)
+        {
+            uint32_t *src2 = (uint32_t *)src + row * src_pitch +
+                             (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint32_t);
+            uint32_t *dst2 = (uint32_t *)dst + dst_pitch * row + col;
+            unsigned j;
+
+            for (j = 0; j < MIN2(tile_height, height - row); ++j)
+            {
+                unsigned columns = MIN2(tile_width, width - col);
+                memcpy(dst2, src2, columns * sizeof(uint32_t));
+                dst2 += dst_pitch;
+                src2 += tile_width;
+            }
+        }
+    }
+}
+
+static void micro_untile_2_x_2_64bit(const void * const src, unsigned src_pitch,
+                                     void * const dst, unsigned dst_pitch,
+                                     unsigned width, unsigned height)
+{
+    unsigned row; /* current destination row */
+    unsigned col; /* current destination column */
+    unsigned k; /* current tile number */
+    const unsigned tile_width = 2, tile_height = 2;
+    const unsigned tiles_in_row = (width + (tile_width - 1)) / tile_width;
+
+    assert(src_pitch % tile_width == 0);
+
+    k = 0;
+    for (row = 0; row < height; row += tile_height)
+    {
+        for (col = 0; col < width; col += tile_width, ++k)
+        {
+            uint64_t *src2 = (uint64_t *)src + row * src_pitch +
+                             (k % tiles_in_row) * MICRO_TILE_SIZE / sizeof(uint64_t);
+            uint64_t *dst2 = (uint64_t *)dst + dst_pitch * row + col;
+            unsigned j;
+
+            for (j = 0; j < MIN2(tile_height, height - row); ++j)
+            {
+                unsigned columns = MIN2(tile_width, width - col);
+                memcpy(dst2, src2, columns * sizeof(uint64_t));
+                dst2 += dst_pitch;
+                src2 += tile_width;
+            }
+        }
+    }
+}
+
+static void micro_untile_1_x_1_128bit(const void * src, unsigned src_pitch,
+                                      void * dst, unsigned dst_pitch,
+                                      unsigned width, unsigned height)
+{
+    unsigned i, j;
+    const unsigned elem_size = 16; /* sizeof(uint128_t) */
+
+    for (j = 0; j < height; ++j)
+    {
+        for (i = 0; i < width; ++i)
+        {
+            memcpy(dst, src, width * elem_size);
+            dst += dst_pitch * elem_size;
+            src += src_pitch * elem_size;
+        }
+    }
+}
+
+void untile_image(const void * src, unsigned src_pitch,
+                  void *dst, unsigned dst_pitch,
+                  gl_format format, unsigned width, unsigned height)
+{
+    assert(src_pitch >= width);
+    assert(dst_pitch >= width);
+    assert(src_pitch * _mesa_get_format_bytes(format) % MICRO_TILE_SIZE == 0);
+
+    switch (_mesa_get_format_bytes(format))
+    {
+        case 16:
+            micro_untile_1_x_1_128bit(src, src_pitch, dst, dst_pitch, width, height);
+            break;
+        case 8:
+            micro_untile_2_x_2_64bit(src, src_pitch, dst, dst_pitch, width, height);
+            break;
+        case 4:
+            micro_untile_4_x_2_32bit(src, src_pitch, dst, dst_pitch, width, height);
+            break;
+        case 2:
+            if (_mesa_get_format_bits(format, GL_DEPTH_BITS))
+            {
+                micro_untile_4_x_4_16bit(src, src_pitch, dst, dst_pitch, width, height);
+            }
+            else
+            {
+                micro_untile_8_x_2_16bit(src, src_pitch, dst, dst_pitch, width, height);
+            }
+            break;
+        case 1:
+            micro_untile_8_x_4_8bit(src, src_pitch, dst, dst_pitch, width, height);
+            break;
+        default:
+            assert(0);
+            break;
+    }
+}
+
 void get_tile_size(gl_format format, unsigned *block_width, unsigned *block_height)
 {
     switch (_mesa_get_format_bytes(format))
diff --git a/src/mesa/drivers/dri/radeon/radeon_tile.h b/src/mesa/drivers/dri/radeon/radeon_tile.h
index 06850b361d..31d9c5611c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tile.h
+++ b/src/mesa/drivers/dri/radeon/radeon_tile.h
@@ -31,4 +31,8 @@ void tile_image(const void * src, unsigned src_pitch,
                 void *dst, unsigned dst_pitch,
                 gl_format format, unsigned width, unsigned height);
 
+void untile_image(const void * src, unsigned src_pitch,
+                  void *dst, unsigned dst_pitch,
+                  gl_format format, unsigned width, unsigned height);
+
 void get_tile_size(gl_format format, unsigned *block_width, unsigned *block_height);
-- 
cgit v1.2.3


From 8014b5f06853a5926ee772af232abdc9cd4e90c4 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 6 Feb 2010 18:38:01 +0100
Subject: radeon: add some debugging info to sw tiling/untiling functions

---
 src/mesa/drivers/dri/radeon/radeon_tile.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_tile.c b/src/mesa/drivers/dri/radeon/radeon_tile.c
index 1e4729a0b5..935fa45e04 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tile.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tile.c
@@ -30,7 +30,8 @@
 #include <stdint.h>
 #include <string.h>
 
-#include <main/macros.h>
+#include "main/macros.h"
+#include "radeon_debug.h"
 
 #define MICRO_TILE_SIZE 32
 
@@ -215,6 +216,10 @@ void tile_image(const void * src, unsigned src_pitch,
     assert(dst_pitch >= width);
     assert(dst_pitch * _mesa_get_format_bytes(format) % MICRO_TILE_SIZE == 0);
 
+    radeon_print(RADEON_TEXTURE, RADEON_TRACE,
+                 "Software tiling: src_pitch %d, dst_pitch %d, width %d, height %d, bpp %d\n",
+                 src_pitch, dst_pitch, width, height, _mesa_get_format_bytes(format));
+
     switch (_mesa_get_format_bytes(format))
     {
         case 16:
@@ -436,6 +441,10 @@ void untile_image(const void * src, unsigned src_pitch,
     assert(dst_pitch >= width);
     assert(src_pitch * _mesa_get_format_bytes(format) % MICRO_TILE_SIZE == 0);
 
+    radeon_print(RADEON_TEXTURE, RADEON_TRACE,
+                 "Software untiling: src_pitch %d, dst_pitch %d, width %d, height %d, bpp %d\n",
+                 src_pitch, dst_pitch, width, height, _mesa_get_format_bytes(format));
+
     switch (_mesa_get_format_bytes(format))
     {
         case 16:
-- 
cgit v1.2.3


From b078a613bedb76242af177bee12520203bd63d50 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 9 Jan 2010 20:36:47 +0100
Subject: radeon: add texture helper function

---
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 26 ++++++++++++++++++++++++
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h |  3 +++
 2 files changed, 29 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index cd843d965e..117d695ce7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -81,6 +81,32 @@ static unsigned get_compressed_image_size(
 	return rowStride * ((height + blockHeight - 1) / blockHeight);
 }
 
+static unsigned is_pot(unsigned value)
+{
+	unsigned m;
+
+	for (m = 1; m < value; m *= 2) {}
+
+	return value == m;
+}
+
+unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width)
+{
+	if (_mesa_is_format_compressed(format)) {
+		return get_aligned_compressed_row_stride(format, width, rmesa->texture_compressed_row_align);
+	} else {
+		unsigned row_align;
+
+		if (is_pot(width)) {
+			row_align = rmesa->texture_row_align - 1;
+		} else {
+			row_align = rmesa->texture_rect_row_align - 1;
+		}
+
+		return (_mesa_format_row_stride(format, width) + row_align) & ~row_align;
+	}
+}
+
 /**
  * Compute sizes and fill in offset and blit information for the given
  * image (determined by \p face and \p level).
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
index c911688c1a..424bf5181a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
@@ -89,4 +89,7 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t);
 GLuint radeon_miptree_image_offset(radeon_mipmap_tree *mt,
 				   GLuint face, GLuint level);
 uint32_t get_base_teximage_offset(radeonTexObj *texObj);
+
+unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width);
+
 #endif /* __RADEON_MIPMAP_TREE_H_ */
-- 
cgit v1.2.3


From 0d3835475fcb803a295dc738d90b83788bdc9472 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 16 Jan 2010 23:11:36 +0100
Subject: radeon: minor refactoring of mipmap code

---
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 50 +++++++++++-------------
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h |  6 +++
 2 files changed, 29 insertions(+), 27 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index 117d695ce7..8c1f96ede0 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -36,6 +36,7 @@
 #include "main/texobj.h"
 #include "main/enums.h"
 #include "radeon_texture.h"
+#include "radeon_tile.h"
 
 static unsigned get_aligned_compressed_row_stride(
 		gl_format format,
@@ -69,16 +70,30 @@ static unsigned get_aligned_compressed_row_stride(
 	return stride;
 }
 
-static unsigned get_compressed_image_size(
+unsigned get_texture_image_size(
 		gl_format format,
 		unsigned rowStride,
-		unsigned height)
+		unsigned height,
+		unsigned depth,
+		unsigned tiling)
 {
-	unsigned blockWidth, blockHeight;
+	if (_mesa_is_format_compressed(format)) {
+		unsigned blockWidth, blockHeight;
 
-	_mesa_get_format_block_size(format, &blockWidth, &blockHeight);
+		_mesa_get_format_block_size(format, &blockWidth, &blockHeight);
+
+		return rowStride * ((height + blockHeight - 1) / blockHeight) * depth;
+	} else if (tiling) {
+		/* Need to align height to tile height */
+		unsigned tileWidth, tileHeight;
+
+		get_tile_size(format, &tileWidth, &tileHeight);
+		tileHeight--;
 
-	return rowStride * ((height + blockHeight - 1) / blockHeight);
+		height = (height + tileHeight) & ~tileHeight;
+	}
+
+	return rowStride * height * depth;
 }
 
 static unsigned is_pot(unsigned value)
@@ -118,34 +133,15 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree
 	GLuint face, GLuint level, GLuint* curOffset)
 {
 	radeon_mipmap_level *lvl = &mt->levels[level];
-	uint32_t row_align;
 	GLuint height;
 
 	height = _mesa_next_pow_two_32(lvl->height);
 
-	/* Find image size in bytes */
-	if (_mesa_is_format_compressed(mt->mesaFormat)) {
-		lvl->rowstride = get_aligned_compressed_row_stride(mt->mesaFormat, lvl->width, rmesa->texture_compressed_row_align);
-		lvl->size = get_compressed_image_size(mt->mesaFormat, lvl->rowstride, height);
-	} else if (mt->target == GL_TEXTURE_RECTANGLE_NV) {
-		row_align = rmesa->texture_rect_row_align - 1;
-		lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
-		lvl->size = lvl->rowstride * height;
-	} else if (mt->tilebits & RADEON_TXO_MICRO_TILE) {
-		/* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned,
-		 * though the actual offset may be different (if texture is less than
-		 * 32 bytes width) to the untiled case */
-		lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) * 2 + 31) & ~31;
-		lvl->size = lvl->rowstride * ((height + 1) / 2) * lvl->depth;
-	} else {
-		row_align = rmesa->texture_row_align - 1;
-		lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
-		lvl->size = lvl->rowstride * height * lvl->depth;
-	}
+	lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width);
+	lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, lvl->height, lvl->depth, mt->tilebits);
+
 	assert(lvl->size > 0);
 
-	/* All images are aligned to a 32-byte offset */
-	*curOffset = (*curOffset + 0x1f) & ~0x1f;
 	lvl->faces[face].offset = *curOffset;
 	*curOffset += lvl->size;
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
index 424bf5181a..69103e68de 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
@@ -92,4 +92,10 @@ uint32_t get_base_teximage_offset(radeonTexObj *texObj);
 
 unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width);
 
+unsigned get_texture_image_size(
+		gl_format format,
+		unsigned rowStride,
+		unsigned height,
+		unsigned depth,
+		unsigned tiling);
 #endif /* __RADEON_MIPMAP_TREE_H_ */
-- 
cgit v1.2.3


From d0ca5c3100dfe7ee634e3b455002e11e88822ea7 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sun, 7 Mar 2010 12:09:43 +0100
Subject: radeon: properly calculate rowstride for tiled images

---
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 14 +++++++++-----
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h |  2 +-
 src/mesa/drivers/dri/radeon/radeon_texture.c     |  4 ++--
 src/mesa/drivers/dri/radeon/radeon_tile.c        |  2 --
 4 files changed, 12 insertions(+), 10 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index 8c1f96ede0..ee91f30be5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -105,17 +105,21 @@ static unsigned is_pot(unsigned value)
 	return value == m;
 }
 
-unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width)
+unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width, unsigned tiling)
 {
 	if (_mesa_is_format_compressed(format)) {
 		return get_aligned_compressed_row_stride(format, width, rmesa->texture_compressed_row_align);
 	} else {
 		unsigned row_align;
 
-		if (is_pot(width)) {
-			row_align = rmesa->texture_row_align - 1;
-		} else {
+		if (!is_pot(width)) {
 			row_align = rmesa->texture_rect_row_align - 1;
+		} else if (tiling) {
+			unsigned tileWidth, tileHeight;
+			get_tile_size(format, &tileWidth, &tileHeight);
+			row_align = tileWidth * _mesa_get_format_bytes(format) - 1;
+		} else {
+			row_align = rmesa->texture_row_align - 1;
 		}
 
 		return (_mesa_format_row_stride(format, width) + row_align) & ~row_align;
@@ -137,7 +141,7 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree
 
 	height = _mesa_next_pow_two_32(lvl->height);
 
-	lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width);
+	lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width, mt->tilebits);
 	lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, lvl->height, lvl->depth, mt->tilebits);
 
 	assert(lvl->size > 0);
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
index 69103e68de..088f970172 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
@@ -90,7 +90,7 @@ GLuint radeon_miptree_image_offset(radeon_mipmap_tree *mt,
 				   GLuint face, GLuint level);
 uint32_t get_base_teximage_offset(radeonTexObj *texObj);
 
-unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width);
+unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width, unsigned tiling);
 
 unsigned get_texture_image_size(
 		gl_format format,
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index ff37fd3e86..62dec2d4e0 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -664,6 +664,7 @@ static void radeon_store_teximage(GLcontext* ctx, int dims,
 		struct gl_texture_image *texImage,
 		int compressed)
 {
+	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 	radeonTexObj *t = radeon_tex_obj(texObj);
 	radeon_texture_image* image = get_radeon_texture_image(texImage);
 
@@ -678,8 +679,7 @@ static void radeon_store_teximage(GLcontext* ctx, int dims,
 		dstRowStride = image->mt->levels[image->mtlevel].rowstride;
 	} else if (t->bo) {
 		/* TFP case */
-		/* TODO */
-		assert(0);
+		dstRowStride = get_texture_image_row_stride(rmesa, texImage->TexFormat, width, 0);
 	} else {
 		dstRowStride = _mesa_format_row_stride(texImage->TexFormat, texImage->Width);
 	}
diff --git a/src/mesa/drivers/dri/radeon/radeon_tile.c b/src/mesa/drivers/dri/radeon/radeon_tile.c
index 935fa45e04..403da11010 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tile.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tile.c
@@ -214,7 +214,6 @@ void tile_image(const void * src, unsigned src_pitch,
 {
     assert(src_pitch >= width);
     assert(dst_pitch >= width);
-    assert(dst_pitch * _mesa_get_format_bytes(format) % MICRO_TILE_SIZE == 0);
 
     radeon_print(RADEON_TEXTURE, RADEON_TRACE,
                  "Software tiling: src_pitch %d, dst_pitch %d, width %d, height %d, bpp %d\n",
@@ -439,7 +438,6 @@ void untile_image(const void * src, unsigned src_pitch,
 {
     assert(src_pitch >= width);
     assert(dst_pitch >= width);
-    assert(src_pitch * _mesa_get_format_bytes(format) % MICRO_TILE_SIZE == 0);
 
     radeon_print(RADEON_TEXTURE, RADEON_TRACE,
                  "Software untiling: src_pitch %d, dst_pitch %d, width %d, height %d, bpp %d\n",
-- 
cgit v1.2.3


From 2b801066a1fcd8a83a367f70736d6adf2043f979 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sun, 7 Mar 2010 12:15:25 +0100
Subject: radeon: Some possible improvements that I spoted in
 radeon_tiled_texture branch.

---
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index ee91f30be5..c6cc417dd6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -96,15 +96,6 @@ unsigned get_texture_image_size(
 	return rowStride * height * depth;
 }
 
-static unsigned is_pot(unsigned value)
-{
-	unsigned m;
-
-	for (m = 1; m < value; m *= 2) {}
-
-	return value == m;
-}
-
 unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width, unsigned tiling)
 {
 	if (_mesa_is_format_compressed(format)) {
@@ -112,7 +103,7 @@ unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format,
 	} else {
 		unsigned row_align;
 
-		if (!is_pot(width)) {
+		if (!_mesa_is_pow_two(width)) {
 			row_align = rmesa->texture_rect_row_align - 1;
 		} else if (tiling) {
 			unsigned tileWidth, tileHeight;
-- 
cgit v1.2.3


From ccbe3f0314c8278c55e1046a619969ae539564de Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sun, 17 Jan 2010 12:47:46 +0100
Subject: radeon: move glGetTexImage handlers to seperate file

---
 src/mesa/drivers/dri/r200/Makefile                |  1 +
 src/mesa/drivers/dri/r200/radeon_tex_getimage.c   |  1 +
 src/mesa/drivers/dri/r300/Makefile                |  1 +
 src/mesa/drivers/dri/r300/radeon_tex_getimage.c   |  1 +
 src/mesa/drivers/dri/r600/Makefile                |  1 +
 src/mesa/drivers/dri/r600/radeon_tex_getimage.c   |  1 +
 src/mesa/drivers/dri/radeon/Makefile              |  1 +
 src/mesa/drivers/dri/radeon/radeon_tex_getimage.c | 95 +++++++++++++++++++++++
 src/mesa/drivers/dri/radeon/radeon_texture.c      | 60 --------------
 9 files changed, 102 insertions(+), 60 deletions(-)
 create mode 120000 src/mesa/drivers/dri/r200/radeon_tex_getimage.c
 create mode 120000 src/mesa/drivers/dri/r300/radeon_tex_getimage.c
 create mode 120000 src/mesa/drivers/dri/r600/radeon_tex_getimage.c
 create mode 100644 src/mesa/drivers/dri/radeon/radeon_tex_getimage.c

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile
index d91e5482e9..3f87100570 100644
--- a/src/mesa/drivers/dri/r200/Makefile
+++ b/src/mesa/drivers/dri/r200/Makefile
@@ -25,6 +25,7 @@ RADEON_COMMON_SOURCES = \
 	radeon_span.c \
 	radeon_texture.c \
 	radeon_tex_copy.c \
+	radeon_tex_getimage.c \
 	radeon_tile.c
 
 DRIVER_SOURCES = r200_context.c \
diff --git a/src/mesa/drivers/dri/r200/radeon_tex_getimage.c b/src/mesa/drivers/dri/r200/radeon_tex_getimage.c
new file mode 120000
index 0000000000..d9836d7326
--- /dev/null
+++ b/src/mesa/drivers/dri/r200/radeon_tex_getimage.c
@@ -0,0 +1 @@
+../radeon/radeon_tex_getimage.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile
index 730d801bb0..4257a32b89 100644
--- a/src/mesa/drivers/dri/r300/Makefile
+++ b/src/mesa/drivers/dri/r300/Makefile
@@ -35,6 +35,7 @@ RADEON_COMMON_SOURCES = \
 	radeon_queryobj.c \
 	radeon_texture.c \
 	radeon_tex_copy.c \
+	radeon_tex_getimage.c \
 	radeon_tile.c
 
 DRIVER_SOURCES = \
diff --git a/src/mesa/drivers/dri/r300/radeon_tex_getimage.c b/src/mesa/drivers/dri/r300/radeon_tex_getimage.c
new file mode 120000
index 0000000000..d9836d7326
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_tex_getimage.c
@@ -0,0 +1 @@
+../radeon/radeon_tex_getimage.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r600/Makefile b/src/mesa/drivers/dri/r600/Makefile
index b6d1c5f459..f76859d11e 100644
--- a/src/mesa/drivers/dri/r600/Makefile
+++ b/src/mesa/drivers/dri/r600/Makefile
@@ -35,6 +35,7 @@ RADEON_COMMON_SOURCES = \
 	radeon_texture.c \
 	radeon_queryobj.c \
 	radeon_tex_copy.c \
+	radeon_tex_getimage.c \
 	radeon_tile.c
 
 DRIVER_SOURCES = \
diff --git a/src/mesa/drivers/dri/r600/radeon_tex_getimage.c b/src/mesa/drivers/dri/r600/radeon_tex_getimage.c
new file mode 120000
index 0000000000..d9836d7326
--- /dev/null
+++ b/src/mesa/drivers/dri/r600/radeon_tex_getimage.c
@@ -0,0 +1 @@
+../radeon/radeon_tex_getimage.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/radeon/Makefile b/src/mesa/drivers/dri/radeon/Makefile
index f7e8059c4f..6904ebbee3 100644
--- a/src/mesa/drivers/dri/radeon/Makefile
+++ b/src/mesa/drivers/dri/radeon/Makefile
@@ -26,6 +26,7 @@ RADEON_COMMON_SOURCES = \
 	radeon_span.c \
 	radeon_texture.c \
 	radeon_tex_copy.c \
+	radeon_tex_getimage.c \
 	radeon_tile.c
 
 DRIVER_SOURCES = \
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_getimage.c b/src/mesa/drivers/dri/radeon/radeon_tex_getimage.c
new file mode 100644
index 0000000000..7bf6dcc2e3
--- /dev/null
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_getimage.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2009 Maciej Cencora.
+ * Copyright (C) 2008 Nicolai Haehnle.
+ * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
+ *
+ * The Weather Channel (TM) funded Tungsten Graphics to develop the
+ * initial release of the Radeon 8500 driver under the XFree86 license.
+ * This notice must be preserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "radeon_common_context.h"
+#include "radeon_texture.h"
+#include "radeon_mipmap_tree.h"
+
+#include "main/texgetimage.h"
+
+/**
+ * Need to map texture image into memory before copying image data,
+ * then unmap it.
+ */
+static void
+radeon_get_tex_image(GLcontext * ctx, GLenum target, GLint level,
+             GLenum format, GLenum type, GLvoid * pixels,
+             struct gl_texture_object *texObj,
+             struct gl_texture_image *texImage, int compressed)
+{
+    radeon_texture_image *image = get_radeon_texture_image(texImage);
+
+    radeon_print(RADEON_TEXTURE, RADEON_NORMAL,
+                 "%s(%p, tex %p, image %p) compressed %d.\n",
+                 __func__, ctx, texObj, image, compressed);
+
+    if (image->mt) {
+        /* Map the texture image read-only */
+        radeon_teximage_map(image, GL_FALSE);
+    } else {
+        /* Image hasn't been uploaded to a miptree yet */
+        assert(image->base.Data);
+    }
+
+    if (compressed) {
+        /* FIXME: this can't work for small textures (mips) which
+                 use different hw stride */
+        _mesa_get_compressed_teximage(ctx, target, level, pixels,
+                          texObj, texImage);
+    } else {
+        _mesa_get_teximage(ctx, target, level, format, type, pixels,
+                   texObj, texImage);
+    }
+
+    if (image->mt) {
+        radeon_teximage_unmap(image);
+    }
+}
+
+void
+radeonGetTexImage(GLcontext * ctx, GLenum target, GLint level,
+          GLenum format, GLenum type, GLvoid * pixels,
+          struct gl_texture_object *texObj,
+          struct gl_texture_image *texImage)
+{
+    radeon_get_tex_image(ctx, target, level, format, type, pixels,
+                 texObj, texImage, 0);
+}
+
+void
+radeonGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level,
+                GLvoid *pixels,
+                struct gl_texture_object *texObj,
+                struct gl_texture_image *texImage)
+{
+    radeon_get_tex_image(ctx, target, level, 0, 0, pixels,
+                 texObj, texImage, 1);
+}
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 62dec2d4e0..6a8e70d47e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -39,7 +39,6 @@
 #include "main/texstore.h"
 #include "main/teximage.h"
 #include "main/texobj.h"
-#include "main/texgetimage.h"
 
 #include "xmlpool.h"		/* for symbolic values of enum-type options */
 
@@ -998,62 +997,3 @@ void radeonTexSubImage3D(GLcontext * ctx, GLenum target, GLint level,
 	radeon_texsubimage(ctx, 3, target, level, xoffset, yoffset, zoffset, width, height, depth, 0,
 		format, type, pixels, packing, texObj, texImage, 0);
 }
-
-/**
- * Need to map texture image into memory before copying image data,
- * then unmap it.
- */
-static void
-radeon_get_tex_image(GLcontext * ctx, GLenum target, GLint level,
-		     GLenum format, GLenum type, GLvoid * pixels,
-		     struct gl_texture_object *texObj,
-		     struct gl_texture_image *texImage, int compressed)
-{
-	radeon_texture_image *image = get_radeon_texture_image(texImage);
-
-	radeon_print(RADEON_TEXTURE, RADEON_NORMAL,
-			"%s(%p, tex %p, image %p) compressed %d.\n",
-			__func__, ctx, texObj, image, compressed);
-
-	if (image->mt) {
-		/* Map the texture image read-only */
-		radeon_teximage_map(image, GL_FALSE);
-	} else {
-		/* Image hasn't been uploaded to a miptree yet */
-		assert(image->base.Data);
-	}
-
-	if (compressed) {
-		/* FIXME: this can't work for small textures (mips) which
-		         use different hw stride */
-		_mesa_get_compressed_teximage(ctx, target, level, pixels,
-					      texObj, texImage);
-	} else {
-		_mesa_get_teximage(ctx, target, level, format, type, pixels,
-				   texObj, texImage);
-	}
-     
-	if (image->mt) {
-		radeon_teximage_unmap(image);
-	}
-}
-
-void
-radeonGetTexImage(GLcontext * ctx, GLenum target, GLint level,
-		  GLenum format, GLenum type, GLvoid * pixels,
-		  struct gl_texture_object *texObj,
-		  struct gl_texture_image *texImage)
-{
-	radeon_get_tex_image(ctx, target, level, format, type, pixels,
-			     texObj, texImage, 0);
-}
-
-void
-radeonGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level,
-			    GLvoid *pixels,
-			    struct gl_texture_object *texObj,
-			    struct gl_texture_image *texImage)
-{
-	radeon_get_tex_image(ctx, target, level, 0, 0, pixels,
-			     texObj, texImage, 1);
-}
-- 
cgit v1.2.3


From ba196a8318af6217fece3777ea038539fea4b415 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sun, 7 Mar 2010 15:00:29 +0100
Subject: radeon: handle compressed sRGB texture formats

---
 src/mesa/drivers/dri/radeon/radeon_texture.c | 9 +++++++++
 1 file changed, 9 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 6a8e70d47e..3ccc711253 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -558,6 +558,15 @@ gl_format radeonChooseTextureFormat(GLcontext * ctx,
 	case GL_COMPRESSED_SLUMINANCE_ALPHA:
 		return MESA_FORMAT_SLA8;
 
+	case GL_COMPRESSED_SRGB_S3TC_DXT1_EXT:
+		return MESA_FORMAT_SRGB_DXT1;
+	case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT:
+		return MESA_FORMAT_SRGBA_DXT1;
+	case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT:
+		return MESA_FORMAT_SRGBA_DXT3;
+	case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT:
+		return MESA_FORMAT_SRGBA_DXT5;
+
 	default:
 		_mesa_problem(ctx,
 			      "unexpected internalFormat 0x%x in %s",
-- 
cgit v1.2.3


From 7959274858fe66a90e6f97fed81141c39cb6702b Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Mon, 8 Mar 2010 10:04:02 -0500
Subject: radeon/r200/r600: reset bos when validating buffers during blit

---
 src/mesa/drivers/dri/r200/r200_blit.c     | 3 +++
 src/mesa/drivers/dri/r600/r600_blit.c     | 2 ++
 src/mesa/drivers/dri/radeon/radeon_blit.c | 3 +++
 3 files changed, 8 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c
index b56327dad5..2c8b3aafe5 100644
--- a/src/mesa/drivers/dri/r200/r200_blit.c
+++ b/src/mesa/drivers/dri/r200/r200_blit.c
@@ -211,6 +211,9 @@ static GLboolean validate_buffers(struct r200_context *r200,
                                   struct radeon_bo *dst_bo)
 {
     int ret;
+
+    radeon_cs_space_reset_bos(r200->radeon.cmdbuf.cs);
+
     ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
                                         src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
     if (ret)
diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c
index 9d17463cae..fb84825761 100644
--- a/src/mesa/drivers/dri/r600/r600_blit.c
+++ b/src/mesa/drivers/dri/r600/r600_blit.c
@@ -1533,6 +1533,8 @@ static GLboolean validate_buffers(context_t *rmesa,
 {
     int ret;
 
+    radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
+
     ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
 					src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
     if (ret)
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index e188a122d5..8c3c2e4766 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -204,6 +204,9 @@ static GLboolean validate_buffers(struct r100_context *r100,
                                   struct radeon_bo *dst_bo)
 {
     int ret;
+
+    radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs);
+
     ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
                                         src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
     if (ret)
-- 
cgit v1.2.3


From 39ab5ae30c303dd561252cb592d4de35814b6a70 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Mon, 8 Mar 2010 10:13:49 -0500
Subject: radeon/r200/r600: allow src and dst BOs to be placed in GTT during
 blit

---
 src/mesa/drivers/dri/r200/r200_blit.c     | 10 ++--------
 src/mesa/drivers/dri/r600/r600_blit.c     | 10 ++--------
 src/mesa/drivers/dri/radeon/radeon_blit.c | 10 ++--------
 3 files changed, 6 insertions(+), 24 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c
index 2c8b3aafe5..3075760093 100644
--- a/src/mesa/drivers/dri/r200/r200_blit.c
+++ b/src/mesa/drivers/dri/r200/r200_blit.c
@@ -215,18 +215,12 @@ static GLboolean validate_buffers(struct r200_context *r200,
     radeon_cs_space_reset_bos(r200->radeon.cmdbuf.cs);
 
     ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
-                                        src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+                                        src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
     if (ret)
         return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
-                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
-    if (ret)
-        return GL_FALSE;
-
-    ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
-                                        first_elem(&r200->radeon.dma.reserved)->bo,
-                                        RADEON_GEM_DOMAIN_GTT, 0);
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
     if (ret)
         return GL_FALSE;
 
diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c
index fb84825761..244fdc4ffb 100644
--- a/src/mesa/drivers/dri/r600/r600_blit.c
+++ b/src/mesa/drivers/dri/r600/r600_blit.c
@@ -1536,12 +1536,12 @@ static GLboolean validate_buffers(context_t *rmesa,
     radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
 
     ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
-					src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+					src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
     if (ret)
         return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
-                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
     if (ret)
         return GL_FALSE;
 
@@ -1551,12 +1551,6 @@ static GLboolean validate_buffers(context_t *rmesa,
     if (ret)
         return GL_FALSE;
 
-    ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
-                                        first_elem(&rmesa->radeon.dma.reserved)->bo,
-                                        RADEON_GEM_DOMAIN_GTT, 0);
-    if (ret)
-        return GL_FALSE;
-
     return GL_TRUE;
 }
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index 8c3c2e4766..e1e1f21550 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -208,18 +208,12 @@ static GLboolean validate_buffers(struct r100_context *r100,
     radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs);
 
     ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
-                                        src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+                                        src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
     if (ret)
         return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
-                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
-    if (ret)
-        return GL_FALSE;
-
-    ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
-                                        first_elem(&r100->radeon.dma.reserved)->bo,
-                                        RADEON_GEM_DOMAIN_GTT, 0);
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
     if (ret)
         return GL_FALSE;
 
-- 
cgit v1.2.3


From 8ccd83ab921380953a0e5cebd941444f85c23ed1 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 6 Feb 2010 19:37:23 +0100
Subject: radeon: fallback to software in glCopyTexImage if blit isn't
 available

---
 src/mesa/drivers/dri/radeon/radeon_tex_copy.c | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index 89fe9915a7..a4bb03d5d3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -53,6 +53,10 @@ do_copy_texsubimage(GLcontext *ctx,
     unsigned src_width;
     unsigned dst_width;
 
+    if (!radeon->vtbl.blit) {
+        return GL_FALSE;
+    }
+
     if (_mesa_get_format_bits(timg->base.TexFormat, GL_DEPTH_BITS) > 0) {
         rrb = radeon_get_depthbuffer(radeon);
     } else {
-- 
cgit v1.2.3


From 29e02c7e720a18b59317c4ad97d8ffc149228c69 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 16 Jan 2010 15:11:37 +0100
Subject: radeon: no need to emit full state twice after flush

---
 src/mesa/drivers/dri/radeon/radeon_common.c | 5 -----
 1 file changed, 5 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index 79f3ff7da6..13f1f0611b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -1325,11 +1325,6 @@ void rcommonBeginBatch(radeonContextPtr rmesa, int n,
 		       const char *function,
 		       int line)
 {
-	if (!rmesa->cmdbuf.cs->cdw && dostate) {
-		radeon_print(RADEON_STATE, RADEON_NORMAL,
-				"Reemit state after flush (from %s)\n", function);
-		radeonEmitState(rmesa);
-	}
 	radeon_cs_begin(rmesa->cmdbuf.cs, n, file, function, line);
 
     radeon_print(RADEON_CS, RADEON_VERBOSE, "BEGIN_BATCH(%d) at %d, from %s:%i\n",
-- 
cgit v1.2.3


From d7ad1b8b0788536f6fcd261fbe0db7a10b84ac0a Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Mon, 8 Mar 2010 10:04:02 -0500
Subject: radeon/r200/r600: reset bos when validating buffers during blit

---
 src/mesa/drivers/dri/r200/r200_blit.c     | 3 +++
 src/mesa/drivers/dri/r600/r600_blit.c     | 2 ++
 src/mesa/drivers/dri/radeon/radeon_blit.c | 3 +++
 3 files changed, 8 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c
index b56327dad5..2c8b3aafe5 100644
--- a/src/mesa/drivers/dri/r200/r200_blit.c
+++ b/src/mesa/drivers/dri/r200/r200_blit.c
@@ -211,6 +211,9 @@ static GLboolean validate_buffers(struct r200_context *r200,
                                   struct radeon_bo *dst_bo)
 {
     int ret;
+
+    radeon_cs_space_reset_bos(r200->radeon.cmdbuf.cs);
+
     ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
                                         src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
     if (ret)
diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c
index 9d17463cae..fb84825761 100644
--- a/src/mesa/drivers/dri/r600/r600_blit.c
+++ b/src/mesa/drivers/dri/r600/r600_blit.c
@@ -1533,6 +1533,8 @@ static GLboolean validate_buffers(context_t *rmesa,
 {
     int ret;
 
+    radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
+
     ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
 					src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
     if (ret)
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index e188a122d5..8c3c2e4766 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -204,6 +204,9 @@ static GLboolean validate_buffers(struct r100_context *r100,
                                   struct radeon_bo *dst_bo)
 {
     int ret;
+
+    radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs);
+
     ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
                                         src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
     if (ret)
-- 
cgit v1.2.3


From 9458c2061ba5d8857217d9a7504b42ea17022897 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Mon, 8 Mar 2010 10:13:49 -0500
Subject: radeon/r200/r600: allow src and dst BOs to be placed in GTT during
 blit

---
 src/mesa/drivers/dri/r200/r200_blit.c     | 10 ++--------
 src/mesa/drivers/dri/r600/r600_blit.c     | 10 ++--------
 src/mesa/drivers/dri/radeon/radeon_blit.c | 10 ++--------
 3 files changed, 6 insertions(+), 24 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c
index 2c8b3aafe5..3075760093 100644
--- a/src/mesa/drivers/dri/r200/r200_blit.c
+++ b/src/mesa/drivers/dri/r200/r200_blit.c
@@ -215,18 +215,12 @@ static GLboolean validate_buffers(struct r200_context *r200,
     radeon_cs_space_reset_bos(r200->radeon.cmdbuf.cs);
 
     ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
-                                        src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+                                        src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
     if (ret)
         return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
-                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
-    if (ret)
-        return GL_FALSE;
-
-    ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
-                                        first_elem(&r200->radeon.dma.reserved)->bo,
-                                        RADEON_GEM_DOMAIN_GTT, 0);
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
     if (ret)
         return GL_FALSE;
 
diff --git a/src/mesa/drivers/dri/r600/r600_blit.c b/src/mesa/drivers/dri/r600/r600_blit.c
index fb84825761..244fdc4ffb 100644
--- a/src/mesa/drivers/dri/r600/r600_blit.c
+++ b/src/mesa/drivers/dri/r600/r600_blit.c
@@ -1536,12 +1536,12 @@ static GLboolean validate_buffers(context_t *rmesa,
     radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
 
     ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
-					src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+					src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
     if (ret)
         return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
-                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
     if (ret)
         return GL_FALSE;
 
@@ -1551,12 +1551,6 @@ static GLboolean validate_buffers(context_t *rmesa,
     if (ret)
         return GL_FALSE;
 
-    ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
-                                        first_elem(&rmesa->radeon.dma.reserved)->bo,
-                                        RADEON_GEM_DOMAIN_GTT, 0);
-    if (ret)
-        return GL_FALSE;
-
     return GL_TRUE;
 }
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index 8c3c2e4766..e1e1f21550 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -208,18 +208,12 @@ static GLboolean validate_buffers(struct r100_context *r100,
     radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs);
 
     ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
-                                        src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+                                        src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
     if (ret)
         return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
-                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
-    if (ret)
-        return GL_FALSE;
-
-    ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
-                                        first_elem(&r100->radeon.dma.reserved)->bo,
-                                        RADEON_GEM_DOMAIN_GTT, 0);
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
     if (ret)
         return GL_FALSE;
 
-- 
cgit v1.2.3


From ffd625d4aaf145eb28fc76617e95ffc3fdfd54cc Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Mon, 8 Mar 2010 17:38:39 -0500
Subject: radeon: don't attempt to use alternate blit formats for depth buffers

noticed by fredrikh on IRC.
---
 src/mesa/drivers/dri/radeon/radeon_tex_copy.c | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index a4bb03d5d3..5cfad6fc3c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -93,6 +93,10 @@ do_copy_texsubimage(GLcontext *ctx,
     src_bpp = _mesa_get_format_bytes(src_mesaformat);
     dst_bpp = _mesa_get_format_bytes(dst_mesaformat);
     if (!radeon->vtbl.check_blit(dst_mesaformat)) {
+	    /* depth formats tend to be special */
+	    if (_mesa_get_format_bits(dst_mesaformat, GL_DEPTH_BITS) > 0)
+		    return GL_FALSE;
+
 	    if (src_bpp != dst_bpp)
 		    return GL_FALSE;
 
-- 
cgit v1.2.3


From ac2b7835d5e61629f0a1f8b6c35eb1efa2ffbfa2 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Tue, 9 Mar 2010 21:41:00 +0100
Subject: radeon: add hw accelerated glReadPixel support (not enabled yet)

---
 src/mesa/drivers/dri/r200/Makefile              |   1 +
 src/mesa/drivers/dri/r200/radeon_pixel_read.c   |   1 +
 src/mesa/drivers/dri/r300/Makefile              |   3 +-
 src/mesa/drivers/dri/r300/radeon_pixel_read.c   |   1 +
 src/mesa/drivers/dri/r600/Makefile              |   3 +-
 src/mesa/drivers/dri/r600/radeon_pixel_read.c   |   1 +
 src/mesa/drivers/dri/radeon/Makefile            |   1 +
 src/mesa/drivers/dri/radeon/radeon_common.h     |   6 +
 src/mesa/drivers/dri/radeon/radeon_pixel_read.c | 188 ++++++++++++++++++++++++
 9 files changed, 203 insertions(+), 2 deletions(-)
 create mode 120000 src/mesa/drivers/dri/r200/radeon_pixel_read.c
 create mode 120000 src/mesa/drivers/dri/r300/radeon_pixel_read.c
 create mode 120000 src/mesa/drivers/dri/r600/radeon_pixel_read.c
 create mode 100644 src/mesa/drivers/dri/radeon/radeon_pixel_read.c

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile
index 3f87100570..9ea81fd505 100644
--- a/src/mesa/drivers/dri/r200/Makefile
+++ b/src/mesa/drivers/dri/r200/Makefile
@@ -21,6 +21,7 @@ RADEON_COMMON_SOURCES = \
 	radeon_fbo.c \
 	radeon_lock.c \
 	radeon_mipmap_tree.c \
+	radeon_pixel_read.c \
 	radeon_queryobj.c \
 	radeon_span.c \
 	radeon_texture.c \
diff --git a/src/mesa/drivers/dri/r200/radeon_pixel_read.c b/src/mesa/drivers/dri/r200/radeon_pixel_read.c
new file mode 120000
index 0000000000..3b03803126
--- /dev/null
+++ b/src/mesa/drivers/dri/r200/radeon_pixel_read.c
@@ -0,0 +1 @@
+../radeon/radeon_pixel_read.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile
index 4257a32b89..2245998c95 100644
--- a/src/mesa/drivers/dri/r300/Makefile
+++ b/src/mesa/drivers/dri/r300/Makefile
@@ -31,8 +31,9 @@ RADEON_COMMON_SOURCES = \
 	radeon_fbo.c \
 	radeon_lock.c \
 	radeon_mipmap_tree.c \
-	radeon_span.c \
+	radeon_pixel_read.c \
 	radeon_queryobj.c \
+	radeon_span.c \
 	radeon_texture.c \
 	radeon_tex_copy.c \
 	radeon_tex_getimage.c \
diff --git a/src/mesa/drivers/dri/r300/radeon_pixel_read.c b/src/mesa/drivers/dri/r300/radeon_pixel_read.c
new file mode 120000
index 0000000000..3b03803126
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_pixel_read.c
@@ -0,0 +1 @@
+../radeon/radeon_pixel_read.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/r600/Makefile b/src/mesa/drivers/dri/r600/Makefile
index f76859d11e..17915621ee 100644
--- a/src/mesa/drivers/dri/r600/Makefile
+++ b/src/mesa/drivers/dri/r600/Makefile
@@ -31,9 +31,10 @@ RADEON_COMMON_SOURCES = \
 	radeon_fbo.c \
 	radeon_lock.c \
 	radeon_mipmap_tree.c \
+	radeon_pixel_read.c \
+	radeon_queryobj.c \
 	radeon_span.c \
 	radeon_texture.c \
-	radeon_queryobj.c \
 	radeon_tex_copy.c \
 	radeon_tex_getimage.c \
 	radeon_tile.c
diff --git a/src/mesa/drivers/dri/r600/radeon_pixel_read.c b/src/mesa/drivers/dri/r600/radeon_pixel_read.c
new file mode 120000
index 0000000000..3b03803126
--- /dev/null
+++ b/src/mesa/drivers/dri/r600/radeon_pixel_read.c
@@ -0,0 +1 @@
+../radeon/radeon_pixel_read.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/radeon/Makefile b/src/mesa/drivers/dri/radeon/Makefile
index 6904ebbee3..19df62742e 100644
--- a/src/mesa/drivers/dri/radeon/Makefile
+++ b/src/mesa/drivers/dri/radeon/Makefile
@@ -22,6 +22,7 @@ RADEON_COMMON_SOURCES = \
 	radeon_fbo.c \
 	radeon_lock.c \
 	radeon_mipmap_tree.c \
+	radeon_pixel_read.c \
 	radeon_queryobj.c \
 	radeon_span.c \
 	radeon_texture.c \
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h
index cd01c9984e..35b3f08fff 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common.h
@@ -44,6 +44,12 @@ radeon_renderbuffer_set_bo(struct radeon_renderbuffer *rb,
 struct radeon_renderbuffer *
 radeon_create_renderbuffer(gl_format format, __DRIdrawable *driDrawPriv);
 
+void
+radeonReadPixels(GLcontext * ctx,
+				GLint x, GLint y, GLsizei width, GLsizei height,
+				GLenum format, GLenum type,
+				const struct gl_pixelstore_attrib *pack, GLvoid * pixels);
+
 void radeon_check_front_buffer_rendering(GLcontext *ctx);
 static inline struct radeon_renderbuffer *radeon_renderbuffer(struct gl_renderbuffer *rb)
 {
diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
new file mode 100644
index 0000000000..27841938e6
--- /dev/null
+++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
@@ -0,0 +1,188 @@
+/*
+ * Copyright (C) 2010 Maciej Cencora <m.cencora@gmail.com>
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "stdint.h"
+#include "main/bufferobj.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/state.h"
+#include "swrast/swrast.h"
+
+#include "radeon_common_context.h"
+#include "radeon_debug.h"
+#include "radeon_mipmap_tree.h"
+
+static gl_format gl_format_and_type_to_mesa_format(GLenum format, GLenum type)
+{
+    switch (format)
+    {
+        case GL_RGB:
+            switch (type) {
+                case GL_UNSIGNED_SHORT_5_6_5:
+                    return MESA_FORMAT_RGB565;
+                case GL_UNSIGNED_SHORT_5_6_5_REV:
+                    return MESA_FORMAT_RGB565_REV;
+            }
+            break;
+        case GL_RGBA:
+            switch (type) {
+                case GL_UNSIGNED_BYTE:
+                    return MESA_FORMAT_RGBA8888_REV;
+                case GL_FLOAT:
+                    return MESA_FORMAT_RGBA_FLOAT32;
+                case GL_UNSIGNED_SHORT_4_4_4_4:
+                    return MESA_FORMAT_ARGB4444;
+                case GL_UNSIGNED_SHORT_4_4_4_4_REV:
+                    return MESA_FORMAT_ARGB4444;
+                case GL_UNSIGNED_SHORT_5_5_5_1:
+                    return MESA_FORMAT_RGBA5551;
+                case GL_UNSIGNED_SHORT_1_5_5_5_REV:
+                    return MESA_FORMAT_ARGB1555_REV;
+                case GL_UNSIGNED_INT_8_8_8_8:
+                    return MESA_FORMAT_ARGB8888;
+                case GL_UNSIGNED_INT_8_8_8_8_REV:
+                    return MESA_FORMAT_ARGB8888_REV;
+            }
+            break;
+    }
+
+    return MESA_FORMAT_NONE;
+}
+
+static GLboolean
+do_blit_readpixels(GLcontext * ctx,
+                   GLint x, GLint y, GLsizei width, GLsizei height,
+                   GLenum format, GLenum type,
+                   const struct gl_pixelstore_attrib *pack, GLvoid * pixels)
+{
+    radeonContextPtr radeon = RADEON_CONTEXT(ctx);
+    const struct radeon_renderbuffer *rrb = radeon_renderbuffer(ctx->ReadBuffer->_ColorReadBuffer);
+    const gl_format dst_format = gl_format_and_type_to_mesa_format(format, type);
+    unsigned dst_rowstride, dst_imagesize, aligned_rowstride, flip_y;
+    struct radeon_bo *dst_buffer;
+    GLint dst_x = 0, dst_y = 0;
+
+    /* It's not worth if number of pixels to copy is really small */
+    if (width * height < 100) {
+        return GL_FALSE;
+    }
+
+    if (dst_format == MESA_FORMAT_NONE ||
+        !radeon->vtbl.check_blit(dst_format) || !radeon->vtbl.blit) {
+        return GL_FALSE;
+    }
+
+    if (ctx->_ImageTransferState) {
+        return GL_FALSE;
+    }
+
+    if (pack->SwapBytes || pack->LsbFirst) {
+        return GL_FALSE;
+    }
+
+    if (pack->RowLength > 0) {
+        dst_rowstride = pack->RowLength;
+    } else {
+        dst_rowstride = width;
+    }
+
+    if (!_mesa_clip_copytexsubimage(ctx, &dst_x, &dst_y, &x, &y, &width, &height)) {
+        return GL_TRUE;
+    }
+    assert(x >= 0 && y >= 0);
+
+    aligned_rowstride = get_texture_image_row_stride(radeon, dst_format, dst_rowstride, 0);
+    dst_imagesize = get_texture_image_size(dst_format,
+                                           aligned_rowstride,
+                                           height, 1, 0);
+    dst_buffer = radeon_bo_open(radeon->radeonScreen->bom, 0, dst_imagesize, 1024, RADEON_GEM_DOMAIN_GTT, 0);
+
+    /* Disable source Y flipping for FBOs */
+    flip_y = (ctx->ReadBuffer->Name == 0);
+    if (pack->Invert) {
+        y = rrb->base.Height - height - y;
+        flip_y = !flip_y;
+    }
+
+    if (radeon->vtbl.blit(ctx,
+                          rrb->bo,
+                          rrb->draw_offset,
+                          rrb->base.Format,
+                          rrb->pitch / rrb->cpp,
+                          rrb->base.Width,
+                          rrb->base.Height,
+                          x,
+                          y,
+                          dst_buffer,
+                          0, /* dst_offset */
+                          dst_format,
+                          aligned_rowstride / _mesa_get_format_bytes(dst_format),
+                          width,
+                          height,
+                          0, /* dst_x */
+                          0, /* dst_y */
+                          width,
+                          height,
+                          flip_y))
+    {
+        radeon_bo_map(dst_buffer, 0);
+        dst_rowstride *= _mesa_get_format_bytes(dst_format);
+        copy_rows(pixels, dst_rowstride, dst_buffer->ptr,
+                  aligned_rowstride, height, dst_rowstride);
+        radeon_bo_unmap(dst_buffer);
+        radeon_bo_unref(dst_buffer);
+        return GL_TRUE;
+    } else {
+        radeon_bo_unref(dst_buffer);
+        return GL_FALSE;
+    }
+}
+
+void
+radeonReadPixels(GLcontext * ctx,
+                 GLint x, GLint y, GLsizei width, GLsizei height,
+                 GLenum format, GLenum type,
+                 const struct gl_pixelstore_attrib *pack, GLvoid * pixels)
+{
+    if (do_blit_readpixels(ctx, x, y, width, height, format, type, pack, pixels))
+        return;
+
+    /* Update Mesa state before calling down into _swrast_ReadPixels, as
+     * the spans code requires the computed buffer states to be up to date,
+     * but _swrast_ReadPixels only updates Mesa state after setting up
+     * the spans code.
+     */
+
+    radeon_print(RADEON_FALLBACKS, RADEON_NORMAL,
+                 "Falling back to sw for ReadPixels (format %s, type %s)\n",
+                 _mesa_lookup_enum_by_nr(format), _mesa_lookup_enum_by_nr(type));
+
+    if (ctx->NewState)
+        _mesa_update_state(ctx);
+
+    _swrast_ReadPixels(ctx, x, y, width, height, format, type, pack, pixels);
+}
-- 
cgit v1.2.3


From a17563c7ddfa58fe7f09d22a62a10f3488ef3147 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sun, 7 Mar 2010 14:34:21 +0100
Subject: radeon/r200/r300/r600: add is_format_renderable function

---
 src/mesa/drivers/dri/r200/r200_context.c           |  1 +
 src/mesa/drivers/dri/r300/r300_context.c           |  6 ++++
 src/mesa/drivers/dri/r300/r300_tex.c               | 39 ++++++++++++++++++++++
 src/mesa/drivers/dri/r300/r300_tex.h               |  3 ++
 src/mesa/drivers/dri/r600/r600_context.c           |  1 +
 .../drivers/dri/radeon/radeon_common_context.h     |  1 +
 src/mesa/drivers/dri/radeon/radeon_context.c       |  1 +
 src/mesa/drivers/dri/radeon/radeon_texture.c       | 16 +++++++++
 src/mesa/drivers/dri/radeon/radeon_texture.h       |  2 ++
 9 files changed, 70 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index dad2580e08..4f1a56658c 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -266,6 +266,7 @@ static void r200_init_vtbl(radeonContextPtr radeon)
    radeon->vtbl.emit_query_finish = r200_emit_query_finish;
    radeon->vtbl.check_blit = r200_check_blit;
    radeon->vtbl.blit = r200_blit;
+   radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
 }
 
 
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index ff35cd5275..364e0ba6b6 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -321,6 +321,12 @@ static void r300_init_vtbl(radeonContextPtr radeon)
 
 	radeon->vtbl.check_blit = r300_check_blit;
 	radeon->vtbl.blit = r300_blit;
+
+	if (radeon->radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
+		radeon->vtbl.is_format_renderable = r500IsFormatRenderable;
+	} else {
+		radeon->vtbl.is_format_renderable = r300IsFormatRenderable;
+	}
 }
 
 static void r300InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
diff --git a/src/mesa/drivers/dri/r300/r300_tex.c b/src/mesa/drivers/dri/r300/r300_tex.c
index 8dd8507395..baef206bc2 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.c
+++ b/src/mesa/drivers/dri/r300/r300_tex.c
@@ -308,6 +308,45 @@ static struct gl_texture_object *r300NewTextureObject(GLcontext * ctx,
 	return &t->base;
 }
 
+unsigned r300IsFormatRenderable(gl_format mesa_format)
+{
+	switch (mesa_format)
+	{
+		case MESA_FORMAT_RGB565:
+		case MESA_FORMAT_RGBA5551:
+		case MESA_FORMAT_RGBA8888:
+		case MESA_FORMAT_RGB565_REV:
+		case MESA_FORMAT_RGBA8888_REV:
+		case MESA_FORMAT_ARGB4444:
+		case MESA_FORMAT_ARGB1555:
+		case MESA_FORMAT_XRGB8888:
+		case MESA_FORMAT_ARGB8888:
+		case MESA_FORMAT_ARGB4444_REV:
+		case MESA_FORMAT_ARGB1555_REV:
+		case MESA_FORMAT_XRGB8888_REV:
+		case MESA_FORMAT_ARGB8888_REV:
+		case MESA_FORMAT_SRGBA8:
+		case MESA_FORMAT_SARGB8:
+		case MESA_FORMAT_SL8:
+		case MESA_FORMAT_A8:
+		case MESA_FORMAT_L8:
+		case MESA_FORMAT_I8:
+		case MESA_FORMAT_Z16:
+			return 1;
+		default:
+			return 0;
+	}
+}
+
+unsigned r500IsFormatRenderable(gl_format mesa_format)
+{
+	if (mesa_format == MESA_FORMAT_S8_Z24) {
+		return 1;
+	} else {
+		return r300IsFormatRenderable(mesa_format);
+	}
+}
+
 void r300InitTextureFuncs(radeonContextPtr radeon, struct dd_function_table *functions)
 {
 	/* Note: we only plug in the functions we implement in the driver
diff --git a/src/mesa/drivers/dri/r300/r300_tex.h b/src/mesa/drivers/dri/r300/r300_tex.h
index 9694e703b8..aca44cd766 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.h
+++ b/src/mesa/drivers/dri/r300/r300_tex.h
@@ -53,4 +53,7 @@ extern void r300InitTextureFuncs(radeonContextPtr radeon, struct dd_function_tab
 
 int32_t r300TranslateTexFormat(gl_format mesaFormat);
 
+unsigned r300IsFormatRenderable(gl_format mesaFormat);
+unsigned r500IsFormatRenderable(gl_format mesaFormat);
+
 #endif				/* __r300_TEX_H__ */
diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c
index 134e97e7c3..76d5027649 100644
--- a/src/mesa/drivers/dri/r600/r600_context.c
+++ b/src/mesa/drivers/dri/r600/r600_context.c
@@ -239,6 +239,7 @@ static void r600_init_vtbl(radeonContextPtr radeon)
 	radeon->vtbl.emit_query_finish = r600_emit_query_finish;
 	radeon->vtbl.check_blit = r600_check_blit;
 	radeon->vtbl.blit = r600_blit;
+	radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
 }
 
 static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index d1a24e265f..5156c5d0d0 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -539,6 +539,7 @@ struct radeon_context {
                         unsigned reg_width,
                         unsigned reg_height,
                         unsigned flip_y);
+	   unsigned (*is_format_renderable)(gl_format mesa_format);
    } vtbl;
 };
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c
index 878a453bd5..56aba16e9e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -200,6 +200,7 @@ static void r100_init_vtbl(radeonContextPtr radeon)
    radeon->vtbl.emit_query_finish = r100_emit_query_finish;
    radeon->vtbl.check_blit = r100_check_blit;
    radeon->vtbl.blit = r100_blit;
+   radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
 }
 
 /* Create the device specific context.
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 3ccc711253..2b655fbd95 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -1006,3 +1006,19 @@ void radeonTexSubImage3D(GLcontext * ctx, GLenum target, GLint level,
 	radeon_texsubimage(ctx, 3, target, level, xoffset, yoffset, zoffset, width, height, depth, 0,
 		format, type, pixels, packing, texObj, texImage, 0);
 }
+
+unsigned radeonIsFormatRenderable(gl_format mesa_format)
+{
+	if (mesa_format == _dri_texformat_argb8888 || mesa_format == _dri_texformat_rgb565 ||
+		mesa_format == _dri_texformat_argb1555 || mesa_format == _dri_texformat_argb4444)
+		return 1;
+
+	switch (mesa_format)
+	{
+		case MESA_FORMAT_Z16:
+		case MESA_FORMAT_S8_Z24:
+			return 1;
+		default:
+			return 0;
+	}
+}
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.h b/src/mesa/drivers/dri/radeon/radeon_texture.h
index f09dd65214..4ce639ea34 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.h
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.h
@@ -135,4 +135,6 @@ void radeonCopyTexSubImage2D(GLcontext *ctx, GLenum target, GLint level,
 			GLint x, GLint y,
 			GLsizei width, GLsizei height);
 
+unsigned radeonIsFormatRenderable(gl_format mesa_format);
+
 #endif
-- 
cgit v1.2.3


From b70dcabafce0c1a8a9fbbd84ff196e46b0782ca7 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sun, 7 Mar 2010 22:01:56 +0100
Subject: radeon: mark framebuffer as incomplete if renderbuffer format isn't
 supported by hw

---
 src/mesa/drivers/dri/radeon/radeon_fbo.c         | 126 +++++++++++------------
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c |   3 -
 2 files changed, 62 insertions(+), 67 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 46664a1755..6398605835 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -409,82 +409,51 @@ radeon_framebuffer_renderbuffer(GLcontext * ctx,
    radeon_draw_buffer(ctx, fb);
 }
 
-
-/* TODO: According to EXT_fbo spec internal format of texture image
- * once set during glTexImage call, should be preserved when
- * attaching image to renderbuffer. When HW doesn't support
- * rendering to format of attached image, set framebuffer
- * completeness accordingly in radeon_validate_framebuffer (issue #79).
- */
 static GLboolean
 radeon_update_wrapper(GLcontext *ctx, struct radeon_renderbuffer *rrb, 
 		     struct gl_texture_image *texImage)
 {
-	int retry = 0;
-	gl_format texFormat;
-
 	radeon_print(RADEON_TEXTURE, RADEON_TRACE,
-		"%s(%p, rrb %p, texImage %p) \n",
-		__func__, ctx, rrb, texImage);
-
-restart:
-	if (texImage->TexFormat == _dri_texformat_argb8888) {
-		rrb->base.DataType = GL_UNSIGNED_BYTE;
-		DBG("Render to RGBA8 texture OK\n");
+		"%s(%p, rrb %p, texImage %p, texFormat %s) \n",
+		__func__, ctx, rrb, texImage, _mesa_get_format_name(texImage->TexFormat));
+
+	switch (texImage->TexFormat) {
+		case MESA_FORMAT_RGBA8888:
+		case MESA_FORMAT_RGBA8888_REV:
+		case MESA_FORMAT_ARGB8888:
+		case MESA_FORMAT_ARGB8888_REV:
+		case MESA_FORMAT_XRGB8888:
+		case MESA_FORMAT_XRGB8888_REV:
+		case MESA_FORMAT_RGB565:
+		case MESA_FORMAT_RGB565_REV:
+		case MESA_FORMAT_RGBA5551:
+		case MESA_FORMAT_ARGB1555:
+		case MESA_FORMAT_ARGB1555_REV:
+		case MESA_FORMAT_ARGB4444:
+		case MESA_FORMAT_ARGB4444_REV:
+			rrb->base.DataType = GL_UNSIGNED_BYTE;
+			break;
+		case MESA_FORMAT_Z16:
+			rrb->base.DataType = GL_UNSIGNED_SHORT;
+			break;
+		case MESA_FORMAT_X8_Z24:
+			rrb->base.DataType = GL_UNSIGNED_INT;
+			break;
+		case MESA_FORMAT_S8_Z24:
+			rrb->base.DataType = GL_UNSIGNED_INT_24_8_EXT;
+			break;
 	}
-	else if (texImage->TexFormat == _dri_texformat_rgb565) {
-		rrb->base.DataType = GL_UNSIGNED_BYTE;
-		DBG("Render to RGB5 texture OK\n");
-	}
-	else if (texImage->TexFormat == _dri_texformat_argb1555) {
-		rrb->base.DataType = GL_UNSIGNED_BYTE;
-		DBG("Render to ARGB1555 texture OK\n");
-	}
-	else if (texImage->TexFormat == _dri_texformat_argb4444) {
-		rrb->base.DataType = GL_UNSIGNED_BYTE;
-		DBG("Render to ARGB4444 texture OK\n");
-	}
-	else if (texImage->TexFormat == MESA_FORMAT_Z16) {
-		rrb->base.DataType = GL_UNSIGNED_SHORT;
-		DBG("Render to DEPTH16 texture OK\n");
-	}
-	else if (texImage->TexFormat == MESA_FORMAT_S8_Z24) {
-		rrb->base.DataType = GL_UNSIGNED_INT_24_8_EXT;
-		DBG("Render to DEPTH_STENCIL texture OK\n");
-	}
-	else {
-		/* try redoing the FBO */
-		if (retry == 1) {
-			DBG("Render to texture BAD FORMAT %d\n",
-			    texImage->TexFormat);
-			return GL_FALSE;
-		}
-                /* XXX why is the tex format being set here?
-                 * I think this can be removed.
-                 */
-		texImage->TexFormat = radeonChooseTextureFormat(ctx, texImage->InternalFormat, 0,
-								_mesa_get_format_datatype(texImage->TexFormat),
-								1);
-
-		retry++;
-		goto restart;
-	}
-	
-	texFormat = texImage->TexFormat;
-
-	rrb->base.Format = texFormat;
-
-        rrb->cpp = _mesa_get_format_bytes(texFormat);
+		
+	rrb->cpp = _mesa_get_format_bytes(texImage->TexFormat);
 	rrb->pitch = texImage->Width * rrb->cpp;
+	rrb->base.Format = texImage->TexFormat;
 	rrb->base.InternalFormat = texImage->InternalFormat;
-        rrb->base._BaseFormat = _mesa_base_fbo_format(ctx, rrb->base.InternalFormat);
-
+	rrb->base._BaseFormat = _mesa_base_fbo_format(ctx, rrb->base.InternalFormat);
 	rrb->base.Width = texImage->Width;
 	rrb->base.Height = texImage->Height;
-	
 	rrb->base.Delete = radeon_delete_renderbuffer;
 	rrb->base.AllocStorage = radeon_nop_alloc_storage;
-	
+
 	return GL_TRUE;
 }
 
@@ -607,6 +576,35 @@ radeon_finish_render_texture(GLcontext * ctx,
 static void
 radeon_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb)
 {
+	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
+	gl_format mesa_format;
+	int i;
+
+	for (i = -2; i < (GLint) ctx->Const.MaxColorAttachments; i++) {
+		struct gl_renderbuffer_attachment *att;
+		if (i == -2) {
+			att = &fb->Attachment[BUFFER_DEPTH];
+		} else if (i == -1) {
+			att = &fb->Attachment[BUFFER_STENCIL];
+		} else {
+			att = &fb->Attachment[BUFFER_COLOR0 + i];
+		}
+
+		if (att->Type == GL_TEXTURE) {
+			mesa_format = att->Texture->Image[att->CubeMapFace][att->TextureLevel]->TexFormat;
+		} else {
+			/* All renderbuffer formats are renderable, but not sampable */
+			continue;
+		}
+
+		if (!radeon->vtbl.is_format_renderable(mesa_format)){
+			fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED;
+			radeon_print(RADEON_TEXTURE, RADEON_TRACE,
+						"%s: HW doesn't support format %s as output format of attachment %d\n",
+						__FUNCTION__, _mesa_get_format_name(mesa_format), i);
+			return;
+		}
+	}
 }
 
 void radeon_fbo_init(struct radeon_context *radeon)
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index c6cc417dd6..78c5f5dd57 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -468,12 +468,9 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt,
 
 		radeon_mipmap_level *srclvl = &image->mt->levels[image->mtlevel];
 
-		/* TODO: bring back these assertions once the FBOs are fixed */
-#if 0
 		assert(image->mtlevel == level);
 		assert(srclvl->size == dstlvl->size);
 		assert(srclvl->rowstride == dstlvl->rowstride);
-#endif
 
 		radeon_bo_map(image->mt->bo, GL_FALSE);
 
-- 
cgit v1.2.3


From e167403e5809c447870644bd9ea09fad369706cf Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Tue, 9 Mar 2010 19:44:23 -0500
Subject: radeon/r200/r600: enable HW accelerated gl(Read/Copy/Draw)Pixels

---
 src/mesa/drivers/dri/r200/Makefile         |   1 -
 src/mesa/drivers/dri/r200/r200_context.c   |   2 -
 src/mesa/drivers/dri/r200/r200_pixel.c     | 494 -----------------------------
 src/mesa/drivers/dri/r200/r200_pixel.h     |  39 ---
 src/mesa/drivers/dri/r200/r200_state.c     |   4 +
 src/mesa/drivers/dri/r600/r700_state.c     |   9 +-
 src/mesa/drivers/dri/radeon/radeon_state.c |   4 +
 7 files changed, 15 insertions(+), 538 deletions(-)
 delete mode 100644 src/mesa/drivers/dri/r200/r200_pixel.c
 delete mode 100644 src/mesa/drivers/dri/r200/r200_pixel.h

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile
index 9ea81fd505..c9c1346c3a 100644
--- a/src/mesa/drivers/dri/r200/Makefile
+++ b/src/mesa/drivers/dri/r200/Makefile
@@ -34,7 +34,6 @@ DRIVER_SOURCES = r200_context.c \
 		 r200_state.c \
 		 r200_state_init.c \
 		 r200_cmdbuf.c \
-		 r200_pixel.c \
 		 r200_tex.c \
 		 r200_texstate.c \
 		 r200_tcl.c \
diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index 4f1a56658c..5739443bdf 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -51,7 +51,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r200_context.h"
 #include "r200_ioctl.h"
 #include "r200_state.h"
-#include "r200_pixel.h"
 #include "r200_tex.h"
 #include "r200_swtcl.h"
 #include "r200_tcl.h"
@@ -474,7 +473,6 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
    /* XXX these should really go right after _mesa_init_driver_functions() */
    radeon_fbo_init(&rmesa->radeon);
    radeonInitSpanFuncs( ctx );
-   r200InitPixelFuncs( ctx );
    r200InitTnlFuncs( ctx );
    r200InitState( rmesa );
    r200InitSwtcl( ctx );
diff --git a/src/mesa/drivers/dri/r200/r200_pixel.c b/src/mesa/drivers/dri/r200/r200_pixel.c
deleted file mode 100644
index bfb7e2a2ed..0000000000
--- a/src/mesa/drivers/dri/r200/r200_pixel.c
+++ /dev/null
@@ -1,494 +0,0 @@
-/*
-Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
-
-The Weather Channel (TM) funded Tungsten Graphics to develop the
-initial release of the Radeon 8500 driver under the XFree86 license.
-This notice must be preserved.
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial
-portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-/*
- * Authors:
- *   Keith Whitwell <keith@tungstengraphics.com>
- */
-
-#include "main/glheader.h"
-#include "main/enums.h"
-#include "main/mtypes.h"
-#include "main/macros.h"
-#include "swrast/swrast.h"
-
-#include "r200_context.h"
-#include "r200_ioctl.h"
-#include "r200_pixel.h"
-#include "r200_swtcl.h"
-
-#include "drirenderbuffer.h"
-
-
-static GLboolean
-check_color( const GLcontext *ctx, GLenum type, GLenum format,
-	     const struct gl_pixelstore_attrib *packing,
-	     const void *pixels, GLint sz, GLint pitch )
-{
-   r200ContextPtr rmesa = R200_CONTEXT(ctx);
-   GLuint cpp = rmesa->radeon.radeonScreen->cpp;
-
-   if (R200_DEBUG & RADEON_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   if (	(pitch & 63) ||
-	ctx->_ImageTransferState ||
-	packing->SwapBytes ||
-	packing->LsbFirst) {
-      if (R200_DEBUG & RADEON_PIXEL)
-	 fprintf(stderr, "%s: failed 1\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   if ( type == GL_UNSIGNED_INT_8_8_8_8_REV &&
-	cpp == 4 &&
-	format == GL_BGRA ) {
-      if (R200_DEBUG & RADEON_PIXEL)
-	 fprintf(stderr, "%s: passed 2\n", __FUNCTION__);
-      return GL_TRUE;
-   }
-
-   if (R200_DEBUG & RADEON_PIXEL)
-      fprintf(stderr, "%s: failed\n", __FUNCTION__);
-
-   return GL_FALSE;
-}
-
-static GLboolean
-check_color_per_fragment_ops( const GLcontext *ctx )
-{
-   int result;
-   result = (!(     ctx->Color.AlphaEnabled ||
-		    ctx->Depth.Test ||
-		    ctx->Fog.Enabled ||
-		    ctx->Scissor.Enabled ||
-		    ctx->Stencil._Enabled ||
-		    !ctx->Color.ColorMask[0][0] ||
-		    !ctx->Color.ColorMask[0][1] ||
-		    !ctx->Color.ColorMask[0][2] ||
-		    !ctx->Color.ColorMask[0][3] ||
-		    ctx->Color.ColorLogicOpEnabled ||
-		    ctx->Texture._EnabledUnits
-           ) &&
-	   ctx->Current.RasterPosValid);
-
-   return result;
-}
-
-
-#if 0
-static GLboolean
-clip_pixelrect( const GLcontext *ctx,
-		const GLframebuffer *buffer,
-		GLint *x, GLint *y,
-		GLsizei *width, GLsizei *height,
-		GLint *size )
-{
-   r200ContextPtr rmesa = R200_CONTEXT(ctx);
-
-   /* left clipping */
-   if (*x < buffer->_Xmin) {
-      *width -= (buffer->_Xmin - *x);
-      *x = buffer->_Xmin;
-   }
-
-   /* right clipping */
-   if (*x + *width > buffer->_Xmax)
-      *width -= (*x + *width - buffer->_Xmax - 1);
-
-   if (*width <= 0)
-      return GL_FALSE;
-
-   /* bottom clipping */
-   if (*y < buffer->_Ymin) {
-      *height -= (buffer->_Ymin - *y);
-      *y = buffer->_Ymin;
-   }
-
-   /* top clipping */
-   if (*y + *height > buffer->_Ymax)
-      *height -= (*y + *height - buffer->_Ymax - 1);
-
-   if (*height <= 0)
-      return GL_FALSE;
-
-   *size = ((*y + *height - 1) * rmesa->radeon.radeonScreen->frontPitch +
-	    (*x + *width - 1) * rmesa->radeon.radeonScreen->cpp);
-
-   return GL_TRUE;
-}
-#endif
-
-static GLboolean
-r200TryReadPixels( GLcontext *ctx,
-		  GLint x, GLint y, GLsizei width, GLsizei height,
-		  GLenum format, GLenum type,
-		  const struct gl_pixelstore_attrib *pack,
-		  GLvoid *pixels )
-{
-   return GL_FALSE;
-#if 0
-   r200ContextPtr rmesa = R200_CONTEXT(ctx);
-   GLint pitch = pack->RowLength ? pack->RowLength : width;
-   GLint blit_format;
-   GLuint cpp = rmesa->radeon.radeonScreen->cpp;
-   GLint size = width * height * cpp;
-
-   if (R200_DEBUG & RADEON_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   /* Only accelerate reading to GART buffers.
-    */
-   if ( !r200IsGartMemory(rmesa, pixels,
-			 pitch * height * rmesa->radeon.radeonScreen->cpp ) ) {
-      if (R200_DEBUG & RADEON_PIXEL)
-	 fprintf(stderr, "%s: dest not GART\n", __FUNCTION__);
-   }
-
-   /* Need GL_PACK_INVERT_MESA to cope with upsidedown results from
-    * blitter:
-    */
-   if (!pack->Invert) {
-      if (R200_DEBUG & RADEON_PIXEL)
-	 fprintf(stderr, "%s: MESA_PACK_INVERT not set\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   if (!check_color(ctx, type, format, pack, pixels, size, pitch))
-      return GL_FALSE;
-
-   switch ( rmesa->radeon.radeonScreen->cpp ) {
-   case 4:
-      blit_format = R200_CP_COLOR_FORMAT_ARGB8888;
-      break;
-   default:
-      return GL_FALSE;
-   }
-
-
-   /* Although the blits go on the command buffer, need to do this and
-    * fire with lock held to guarentee cliprects and drawOffset are
-    * correct.
-    *
-    * This is an unusual situation however, as the code which flushes
-    * a full command buffer expects to be called unlocked.  As a
-    * workaround, immediately flush the buffer on aquiring the lock.
-    */
-   LOCK_HARDWARE( &rmesa->radeon );
-
-   if (rmesa->store.cmd_used)
-      rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
-
-   if (!clip_pixelrect(ctx, ctx->ReadBuffer, &x, &y, &width, &height,
-		       &size)) {
-      UNLOCK_HARDWARE( &rmesa->radeon );
-      if (R200_DEBUG & RADEON_PIXEL)
-	 fprintf(stderr, "%s totally clipped -- nothing to do\n",
-		 __FUNCTION__);
-      return GL_TRUE;
-   }
-
-   {
-      __DRIdrawable *dPriv = rmesa->radeon.dri.drawable;
-      driRenderbuffer *drb = (driRenderbuffer *) ctx->ReadBuffer->_ColorReadBuffer;
-      int nbox = dPriv->numClipRects;
-      int src_offset = drb->offset
-		     + rmesa->radeon.radeonScreen->fbLocation;
-      int src_pitch = drb->pitch * drb->cpp;
-      int dst_offset = r200GartOffsetFromVirtual( rmesa, pixels );
-      int dst_pitch = pitch * rmesa->radeon.radeonScreen->cpp;
-      drm_clip_rect_t *box = dPriv->pClipRects;
-      int i;
-
-      r200EmitWait( rmesa, RADEON_WAIT_3D );
-
-      y = dPriv->h - y - height;
-      x += dPriv->x;
-      y += dPriv->y;
-
-
-      if (R200_DEBUG & RADEON_PIXEL)
-	 fprintf(stderr, "readpixel blit src_pitch %d dst_pitch %d\n",
-		 src_pitch, dst_pitch);
-
-      for (i = 0 ; i < nbox ; i++)
-      {
-	 GLint bx = box[i].x1;
-	 GLint by = box[i].y1;
-	 GLint bw = box[i].x2 - bx;
-	 GLint bh = box[i].y2 - by;
-
-	 if (bx < x) bw -= x - bx, bx = x;
-	 if (by < y) bh -= y - by, by = y;
-	 if (bx + bw > x + width) bw = x + width - bx;
-	 if (by + bh > y + height) bh = y + height - by;
-	 if (bw <= 0) continue;
-	 if (bh <= 0) continue;
-
-	 r200EmitBlit( rmesa,
-		       blit_format,
-		       src_pitch, src_offset,
-		       dst_pitch, dst_offset,
-		       bx, by,
-		       bx - x, by - y,
-		       bw, bh );
-      }
-
-      rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
-   }
-   UNLOCK_HARDWARE( &rmesa->radeon );
-
-   radeonFinish( ctx ); /* required by GL */
-#endif
-   return GL_TRUE;
-}
-
-static void
-r200ReadPixels( GLcontext *ctx,
-		 GLint x, GLint y, GLsizei width, GLsizei height,
-		 GLenum format, GLenum type,
-		 const struct gl_pixelstore_attrib *pack,
-		 GLvoid *pixels )
-{
-   if (R200_DEBUG & RADEON_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   if (!r200TryReadPixels( ctx, x, y, width, height, format, type, pack,
-			   pixels))
-      _swrast_ReadPixels( ctx, x, y, width, height, format, type, pack,
-			  pixels);
-}
-
-
-
-
-static void do_draw_pix( GLcontext *ctx,
-			 GLint x, GLint y, GLsizei width, GLsizei height,
-			 GLint pitch,
-			 const void *pixels,
-			 GLuint planemask)
-{
-   if (R200_DEBUG & RADEON_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-#if 0
-   r200ContextPtr rmesa = R200_CONTEXT(ctx);
-   __DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon);
-   drm_clip_rect_t *box = dPriv->pClipRects;
-   struct gl_renderbuffer *rb = ctx->ReadBuffer->_ColorDrawBuffers[0];
-   driRenderbuffer *drb = (driRenderbuffer *) rb;
-   int nbox = dPriv->numClipRects;
-   int i;
-   int blit_format;
-   int size;
-   int src_offset = r200GartOffsetFromVirtual( rmesa, pixels );
-   int src_pitch = pitch * rmesa->radeon.radeonScreen->cpp;
-
-   switch ( rmesa->radeon.radeonScreen->cpp ) {
-   case 2:
-      blit_format = R200_CP_COLOR_FORMAT_RGB565;
-      break;
-   case 4:
-      blit_format = R200_CP_COLOR_FORMAT_ARGB8888;
-      break;
-   default:
-      return;
-   }
-
-
-   LOCK_HARDWARE( &rmesa->radeon );
-
-   if (rmesa->store.cmd_used)
-      rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
-
-   y -= height;			/* cope with pixel zoom */
-
-   if (!clip_pixelrect(ctx, ctx->DrawBuffer,
-		       &x, &y, &width, &height,
-		       &size)) {
-      UNLOCK_HARDWARE( &rmesa->radeon );
-      return;
-   }
-
-   y = dPriv->h - y - height; 	/* convert from gl to hardware coords */
-   x += dPriv->x;
-   y += dPriv->y;
-
-
-   r200EmitWait( rmesa, RADEON_WAIT_3D );
-
-   for (i = 0 ; i < nbox ; i++ )
-   {
-      GLint bx = box[i].x1;
-      GLint by = box[i].y1;
-      GLint bw = box[i].x2 - bx;
-      GLint bh = box[i].y2 - by;
-
-      if (bx < x) bw -= x - bx, bx = x;
-      if (by < y) bh -= y - by, by = y;
-      if (bx + bw > x + width) bw = x + width - bx;
-      if (by + bh > y + height) bh = y + height - by;
-      if (bw <= 0) continue;
-      if (bh <= 0) continue;
-
-      r200EmitBlit( rmesa,
-		    blit_format,
-		    src_pitch, src_offset,
-		    drb->pitch * drb->cpp,
-		    drb->offset + rmesa->radeon.radeonScreen->fbLocation,
-		    bx - x, by - y,
-		    bx, by,
-		    bw, bh );
-   }
-
-   rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
-   radeonWaitForIdleLocked( &rmesa->radeon ); /* required by GL */
-   UNLOCK_HARDWARE( &rmesa->radeon );
-#endif
-}
-
-
-
-
-static GLboolean
-r200TryDrawPixels( GLcontext *ctx,
-		  GLint x, GLint y, GLsizei width, GLsizei height,
-		  GLenum format, GLenum type,
-		  const struct gl_pixelstore_attrib *unpack,
-		  const GLvoid *pixels )
-{
-   r200ContextPtr rmesa = R200_CONTEXT(ctx);
-   GLint pitch = unpack->RowLength ? unpack->RowLength : width;
-   GLuint planemask;
-   GLuint cpp = rmesa->radeon.radeonScreen->cpp;
-   GLint size = height * pitch * cpp;
-
-   if (R200_DEBUG & RADEON_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   /* check that we're drawing to exactly one color buffer */
-   if (ctx->DrawBuffer->_NumColorDrawBuffers != 1)
-     return GL_FALSE;
-
-   switch (format) {
-   case GL_RGB:
-   case GL_RGBA:
-   case GL_BGRA:
-      planemask = radeonPackColor(cpp,
-				ctx->Color.ColorMask[0][RCOMP],
-				ctx->Color.ColorMask[0][GCOMP],
-				ctx->Color.ColorMask[0][BCOMP],
-				ctx->Color.ColorMask[0][ACOMP]);
-
-      if (cpp == 2)
-	 planemask |= planemask << 16;
-
-      if (planemask != ~0)
-	 return GL_FALSE;	/* fix me -- should be possible */
-
-      /* Can't do conversions on GART reads/draws.
-       */
-      if ( !r200IsGartMemory( rmesa, pixels, size ) ) {
-	 if (R200_DEBUG & RADEON_PIXEL)
-	    fprintf(stderr, "%s: not GART memory\n", __FUNCTION__);
-	 return GL_FALSE;
-      }
-
-      if (!check_color(ctx, type, format, unpack, pixels, size, pitch)) {
-	 return GL_FALSE;
-      }
-      if (!check_color_per_fragment_ops(ctx)) {
-	 return GL_FALSE;
-      }
-
-      if (ctx->Pixel.ZoomX != 1.0F ||
-	  ctx->Pixel.ZoomY != -1.0F)
-	 return GL_FALSE;
-      break;
-
-   default:
-      return GL_FALSE;
-   }
-
-   if (0)// r200IsGartMemory(rmesa, pixels, size) )
-   {
-      do_draw_pix( ctx, x, y, width, height, pitch, pixels, planemask );
-      return GL_TRUE;
-   }
-   else if (0)
-   {
-      /* Pixels is in regular memory -- get dma buffers and perform
-       * upload through them.
-       */
-   }
-   else
-      return GL_FALSE;
-}
-
-static void
-r200DrawPixels( GLcontext *ctx,
-		 GLint x, GLint y, GLsizei width, GLsizei height,
-		 GLenum format, GLenum type,
-		 const struct gl_pixelstore_attrib *unpack,
-		 const GLvoid *pixels )
-{
-   if (R200_DEBUG & RADEON_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   if (!r200TryDrawPixels( ctx, x, y, width, height, format, type,
-			  unpack, pixels ))
-      _swrast_DrawPixels( ctx, x, y, width, height, format, type,
-			  unpack, pixels );
-}
-
-
-static void
-r200Bitmap( GLcontext *ctx, GLint px, GLint py,
-		  GLsizei width, GLsizei height,
-		  const struct gl_pixelstore_attrib *unpack,
-		  const GLubyte *bitmap )
-{
-   r200ContextPtr rmesa = R200_CONTEXT(ctx);
-
-   if (rmesa->radeon.Fallback)
-      _swrast_Bitmap( ctx, px, py, width, height, unpack, bitmap );
-   else
-      r200PointsBitmap( ctx, px, py, width, height, unpack, bitmap );
-}
-
-
-
-void r200InitPixelFuncs( GLcontext *ctx )
-{
-   if (!getenv("R200_NO_BLITS")) {
-      ctx->Driver.ReadPixels = r200ReadPixels;
-      ctx->Driver.DrawPixels = r200DrawPixels;
-      if (getenv("R200_HW_BITMAP"))
-	 ctx->Driver.Bitmap = r200Bitmap;
-   }
-}
diff --git a/src/mesa/drivers/dri/r200/r200_pixel.h b/src/mesa/drivers/dri/r200/r200_pixel.h
deleted file mode 100644
index e62aa05d74..0000000000
--- a/src/mesa/drivers/dri/r200/r200_pixel.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
-Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
-
-The Weather Channel (TM) funded Tungsten Graphics to develop the
-initial release of the Radeon 8500 driver under the XFree86 license.
-This notice must be preserved.
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial
-portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-/*
- * Authors:
- *   Keith Whitwell <keith@tungstengraphics.com>
- */
-
-#ifndef __R200_PIXEL_H__
-#define __R200_PIXEL_H__
-
-extern void r200InitPixelFuncs( GLcontext *ctx );
-
-#endif
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index 050e5aa877..71f764aaae 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -46,6 +46,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "tnl/tnl.h"
 #include "tnl/t_pipeline.h"
 #include "swrast_setup/swrast_setup.h"
+#include "drivers/common/meta.h"
 
 #include "radeon_common.h"
 #include "radeon_mipmap_tree.h"
@@ -2494,6 +2495,9 @@ void r200InitStateFuncs( struct dd_function_table *functions )
 
    functions->DrawBuffer		= radeonDrawBuffer;
    functions->ReadBuffer		= radeonReadBuffer;
+   functions->CopyPixels                = _mesa_meta_CopyPixels;
+   functions->DrawPixels                = _mesa_meta_DrawPixels;
+   functions->ReadPixels                = radeonReadPixels;
 
    functions->AlphaFunc			= r200AlphaFunc;
    functions->BlendColor		= r200BlendColor;
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 6f156b5409..8797f8059a 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -39,6 +39,7 @@
 #include "swrast_setup/swrast_setup.h"
 #include "main/api_arrayelt.h"
 #include "main/framebuffer.h"
+#include "drivers/common/meta.h"
 
 #include "shader/prog_parameter.h"
 #include "shader/prog_statevars.h"
@@ -1857,8 +1858,12 @@ void r700InitStateFuncs(struct dd_function_table *functions) //-----------------
 
 	functions->Scissor = radeonScissor;
 
-	functions->DrawBuffer		= radeonDrawBuffer;
-	functions->ReadBuffer		= radeonReadBuffer;
+	functions->DrawBuffer = radeonDrawBuffer;
+	functions->ReadBuffer = radeonReadBuffer;
+
+	functions->CopyPixels = _mesa_meta_CopyPixels;
+	functions->DrawPixels = _mesa_meta_DrawPixels;
+	functions->ReadPixels = radeonReadPixels;
 
 }
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 0ce97e8697..ec5612fdd7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -45,6 +45,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "tnl/tnl.h"
 #include "tnl/t_pipeline.h"
 #include "swrast_setup/swrast_setup.h"
+#include "drivers/common/meta.h"
 
 #include "radeon_context.h"
 #include "radeon_mipmap_tree.h"
@@ -2248,6 +2249,9 @@ void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 )
 
    ctx->Driver.DrawBuffer		= radeonDrawBuffer;
    ctx->Driver.ReadBuffer		= radeonReadBuffer;
+   ctx->Driver.CopyPixels               = _mesa_meta_CopyPixels;
+   ctx->Driver.DrawPixels               = _mesa_meta_DrawPixels;
+   ctx->Driver.ReadPixels               = radeonReadPixels;
 
    ctx->Driver.AlphaFunc		= radeonAlphaFunc;
    ctx->Driver.BlendEquationSeparate	= radeonBlendEquationSeparate;
-- 
cgit v1.2.3


From cc1464cce9613c7f48b630bddf5a6b9fa0d082da Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Wed, 10 Mar 2010 04:19:42 -0500
Subject: r100: add additional blit formats

---
 src/mesa/drivers/dri/radeon/radeon_blit.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index e1e1f21550..143822361e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -48,6 +48,8 @@ unsigned r100_check_blit(gl_format mesa_format)
     case MESA_FORMAT_ARGB4444:
     case MESA_FORMAT_ARGB1555:
     case MESA_FORMAT_A8:
+    case MESA_FORMAT_L8:
+    case MESA_FORMAT_I8:
 	    break;
     default:
 	    return 0;
@@ -103,6 +105,9 @@ static void inline emit_tx_setup(struct r100_context *r100,
     case MESA_FORMAT_ARGB8888:
 	    txformat |= RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP;
 	    break;
+    case MESA_FORMAT_RGBA8888:
+            txformat |= RADEON_TXFORMAT_RGBA8888 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+            break;
     case MESA_FORMAT_XRGB8888:
 	    txformat |= RADEON_TXFORMAT_ARGB8888;
 	    break;
@@ -116,8 +121,15 @@ static void inline emit_tx_setup(struct r100_context *r100,
 	    txformat |= RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP;
 	    break;
     case MESA_FORMAT_A8:
+    case MESA_FORMAT_I8:
 	    txformat |= RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP;
 	    break;
+    case MESA_FORMAT_L8:
+            txformat |= RADEON_TXFORMAT_I8;
+            break;
+    case MESA_FORMAT_AL88:
+            txformat |= RADEON_TXFORMAT_AI88 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+            break;
     default:
 	    break;
     }
@@ -177,6 +189,8 @@ static inline void emit_cb_setup(struct r100_context *r100,
 	    dst_format = RADEON_COLOR_FORMAT_ARGB1555;
 	    break;
     case MESA_FORMAT_A8:
+    case MESA_FORMAT_L8:
+    case MESA_FORMAT_I8:
 	    dst_format = RADEON_COLOR_FORMAT_RGB8;
 	    break;
     default:
-- 
cgit v1.2.3


From a68e8a4eaadfe2a1e4999d5e378c7d9fa99dc656 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Wed, 10 Mar 2010 20:53:21 +0100
Subject: radeon: fix glCopyTex(Sub)Image if user FBO is bound

Fixes piglit/fbo-blit and wine d3d9 unit test.
---
 src/mesa/drivers/dri/radeon/radeon_tex_copy.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index 5cfad6fc3c..e57d77e7ef 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -52,15 +52,18 @@ do_copy_texsubimage(GLcontext *ctx,
     gl_format dst_mesaformat;
     unsigned src_width;
     unsigned dst_width;
+    unsigned flip_y;
 
     if (!radeon->vtbl.blit) {
         return GL_FALSE;
     }
 
     if (_mesa_get_format_bits(timg->base.TexFormat, GL_DEPTH_BITS) > 0) {
-        rrb = radeon_get_depthbuffer(radeon);
+        rrb = radeon_renderbuffer(ctx->ReadBuffer->_DepthBuffer);
+        flip_y = ctx->ReadBuffer->Attachment[BUFFER_DEPTH].Type == GL_NONE;
     } else {
-        rrb = radeon_get_colorbuffer(radeon);
+        rrb = radeon_renderbuffer(ctx->ReadBuffer->_ColorReadBuffer);
+        flip_y = ctx->ReadBuffer->Attachment[BUFFER_COLOR0].Type == GL_NONE;
     }
 
     if (!timg->mt) {
@@ -124,7 +127,7 @@ do_copy_texsubimage(GLcontext *ctx,
                              timg->mt->bo, dst_offset, dst_mesaformat,
                              timg->mt->levels[level].rowstride / dst_bpp,
                              dst_width, timg->base.Height,
-                             dstx, dsty, width, height, 1);
+                             dstx, dsty, width, height, flip_y);
 }
 
 void
-- 
cgit v1.2.3


From 3198cd4a65b135005515c6dd35d006330ce31c94 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Wed, 10 Mar 2010 22:31:53 +0100
Subject: radeon: fallback to sw ReadPixels if color logicop is enabled

Fixes glean/logicOp (regressed after introducing hw accelerated support for ReadPixels)
---
 src/mesa/drivers/dri/radeon/radeon_pixel_read.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
index 27841938e6..b180c1d9a5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
+++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
@@ -96,7 +96,7 @@ do_blit_readpixels(GLcontext * ctx,
         return GL_FALSE;
     }
 
-    if (ctx->_ImageTransferState) {
+    if (ctx->_ImageTransferState || ctx->Color._LogicOpEnabled) {
         return GL_FALSE;
     }
 
-- 
cgit v1.2.3


From 39c2d3ecd9432262bb157da3bb6103f84a4375e5 Mon Sep 17 00:00:00 2001
From: Vinson Lee <vlee@vmware.com>
Date: Thu, 11 Mar 2010 21:55:44 -0800
Subject: radeon: Fix memory leaks from early return.

---
 src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index cd843d965e..e0e271b771 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -539,6 +539,8 @@ static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj,
 	}
 
 	if (mtCount == 0) {
+		free(mtSizes);
+		free(mts);
 		return NULL;
 	}
 
-- 
cgit v1.2.3


From fab1f07d6ad01463897ae792f4b33738afb07369 Mon Sep 17 00:00:00 2001
From: Jeff Smith <whydoubt@yahoo.com>
Date: Fri, 13 Jun 2008 09:50:43 -0500
Subject: Grammar and spelling fixes

Signed-off-by: Jeff Smith <whydoubt@yahoo.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
---
 docs/README.3DFX                                      | 2 +-
 docs/egl.html                                         | 2 +-
 progs/objviewer/glm.c                                 | 2 +-
 progs/objviewer/glm.h                                 | 2 +-
 progs/tests/vao-01.c                                  | 2 +-
 progs/tests/vao-02.c                                  | 2 +-
 src/gallium/auxiliary/os/os_time.h                    | 2 +-
 src/gallium/drivers/cell/ppu/cell_gen_fragment.c      | 2 +-
 src/gallium/drivers/cell/ppu/cell_spu.c               | 2 +-
 src/gallium/drivers/nv40/nv40_vertprog.c              | 2 +-
 src/gallium/drivers/r300/r300_reg.h                   | 4 ++--
 src/gallium/state_trackers/wgl/stw_framebuffer.h      | 2 +-
 src/glu/sgi/libnurbs/nurbtess/partitionY.h            | 2 +-
 src/glu/sgi/libtess/normal.c                          | 2 +-
 src/mesa/drivers/dri/common/dri_util.c                | 2 +-
 src/mesa/drivers/dri/r128/r128_tex.c                  | 2 +-
 src/mesa/drivers/dri/r200/r200_reg.h                  | 2 +-
 src/mesa/drivers/dri/r300/r300_reg.h                  | 4 ++--
 src/mesa/drivers/dri/radeon/radeon_state.c            | 2 +-
 src/mesa/drivers/x11/xmesa.h                          | 2 +-
 src/mesa/drivers/x11/xmesaP.h                         | 2 +-
 src/mesa/main/dd.h                                    | 2 +-
 src/mesa/main/texcompress_fxt1.c                      | 2 +-
 src/mesa/math/m_debug_util.h                          | 2 +-
 src/mesa/math/m_matrix.c                              | 2 +-
 src/mesa/shader/prog_instruction.h                    | 4 ++--
 src/mesa/shader/program_parser.h                      | 2 +-
 src/mesa/shader/slang/library/slang_common_builtin.gc | 2 +-
 src/mesa/swrast/s_depth.c                             | 2 +-
 src/mesa/vbo/vbo_save_loopback.c                      | 2 +-
 30 files changed, 33 insertions(+), 33 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/docs/README.3DFX b/docs/README.3DFX
index 037e8fa7cc..7feda6f33f 100644
--- a/docs/README.3DFX
+++ b/docs/README.3DFX
@@ -644,7 +644,7 @@ Hints and Special Features:
 
 	- The Voodoo driver supports the GL_EXT_paletted_texture. it works
 	  only with GL_COLOR_INDEX8_EXT, GL_RGBA palettes and the alpha value
-	  is ignored because this is a limitation of the the current Glide
+	  is ignored because this is a limitation of the current Glide
 	  version and of the Voodoo hardware. See Mesa-3.1/3Dfx/demos/paltex.c for
 	  a demo of this extension.
 
diff --git a/docs/egl.html b/docs/egl.html
index 82cc06600b..55907f6cfa 100644
--- a/docs/egl.html
+++ b/docs/egl.html
@@ -28,7 +28,7 @@ cards.</p>
 
 <ol>
 <li>
-<p>Run <code>configure</code> with the desired state trackers and and enable
+<p>Run <code>configure</code> with the desired state trackers and enable
 the Gallium driver for your hardware.  For example</p>
 
 <pre>
diff --git a/progs/objviewer/glm.c b/progs/objviewer/glm.c
index 7c964e489d..77e62bfab1 100644
--- a/progs/objviewer/glm.c
+++ b/progs/objviewer/glm.c
@@ -1041,7 +1041,7 @@ glmFacetNormals(GLMmodel* model)
 
 /* glmVertexNormals: Generates smooth vertex normals for a model.
  * First builds a list of all the triangles each vertex is in.  Then
- * loops through each vertex in the the list averaging all the facet
+ * loops through each vertex in the list averaging all the facet
  * normals of the triangles each vertex is in.  Finally, sets the
  * normal index in the triangle for the vertex to the generated smooth
  * normal.  If the dot product of a facet normal and the facet normal
diff --git a/progs/objviewer/glm.h b/progs/objviewer/glm.h
index 8740b3684d..1a5646fa4c 100644
--- a/progs/objviewer/glm.h
+++ b/progs/objviewer/glm.h
@@ -153,7 +153,7 @@ glmFacetNormals(GLMmodel* model);
 
 /* glmVertexNormals: Generates smooth vertex normals for a model.
  * First builds a list of all the triangles each vertex is in.  Then
- * loops through each vertex in the the list averaging all the facet
+ * loops through each vertex in the list averaging all the facet
  * normals of the triangles each vertex is in.  Finally, sets the
  * normal index in the triangle for the vertex to the generated smooth
  * normal.  If the dot product of a facet normal and the facet normal
diff --git a/progs/tests/vao-01.c b/progs/tests/vao-01.c
index e4a89cb19d..ee528d2243 100644
--- a/progs/tests/vao-01.c
+++ b/progs/tests/vao-01.c
@@ -30,7 +30,7 @@
  * it (via \c glPopClientAttrib).  After popping, the state of the VAO is
  * examined.
  * 
- * According the the APPLE_vertex_array_object spec, the contents of the VAO
+ * According to the APPLE_vertex_array_object spec, the contents of the VAO
  * should be restored to the values that they had when pushed.
  * 
  * \author Ian Romanick <idr@us.ibm.com>
diff --git a/progs/tests/vao-02.c b/progs/tests/vao-02.c
index 9f7f5c2779..c23b4ab05a 100644
--- a/progs/tests/vao-02.c
+++ b/progs/tests/vao-02.c
@@ -30,7 +30,7 @@
  * it (via \c glPopClientAttrib).  After popping, the state of the VAO is
  * examined.
  * 
- * According the the APPLE_vertex_array_object spec, the contents of the VAO
+ * According to the APPLE_vertex_array_object spec, the contents of the VAO
  * should be restored to the values that they had when pushed.
  * 
  * \author Ian Romanick <idr@us.ibm.com>
diff --git a/src/gallium/auxiliary/os/os_time.h b/src/gallium/auxiliary/os/os_time.h
index 5b55c1b374..7e0f67a76b 100644
--- a/src/gallium/auxiliary/os/os_time.h
+++ b/src/gallium/auxiliary/os/os_time.h
@@ -71,7 +71,7 @@ os_time_sleep(int64_t usecs);
 /*
  * Helper function for detecting time outs, taking in account overflow.
  *
- * Returns true the the current time has elapsed beyond the specified interval.
+ * Returns true if the current time has elapsed beyond the specified interval.
  */
 static INLINE boolean
 os_time_timeout(int64_t start,
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
index 576d514741..c54576b3c3 100644
--- a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
+++ b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
@@ -1352,7 +1352,7 @@ gen_stencil_values(struct spe_function *f,
     */
    ASSERT(fbS_reg != newS_reg);
 
-   /* The code also assumes the the stencil_max_value is of the form 
+   /* The code also assumes that the stencil_max_value is of the form
     * 2^n-1 and can therefore be used as a mask for the valid bits in 
     * addition to a maximum.  Make sure this is the case as well.
     * The clever math below exploits the fact that incrementing a 
diff --git a/src/gallium/drivers/cell/ppu/cell_spu.c b/src/gallium/drivers/cell/ppu/cell_spu.c
index 28e5e6d706..39284f3a5d 100644
--- a/src/gallium/drivers/cell/ppu/cell_spu.c
+++ b/src/gallium/drivers/cell/ppu/cell_spu.c
@@ -135,7 +135,7 @@ cell_thread_function(void *arg)
 
 /**
  * Create the SPU threads.  This is done once during driver initialization.
- * This involves setting the the "init" message which is sent to each SPU.
+ * This involves setting the "init" message which is sent to each SPU.
  * The init message specifies an SPU id, total number of SPUs, location
  * and number of batch buffers, etc.
  */
diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c
index b289eef0fc..c93c5d127c 100644
--- a/src/gallium/drivers/nv40/nv40_vertprog.c
+++ b/src/gallium/drivers/nv40/nv40_vertprog.c
@@ -742,7 +742,7 @@ nv40_vertprog_translate(struct nv40_context *nv40,
 	}
 
 	/* Redirect post-transform vertex position to a temp if user clip
-	 * planes are enabled.  We need to append code the the vtxprog
+	 * planes are enabled.  We need to append code to the vtxprog
 	 * to handle clip planes later.
 	 */
 	if (vp->ucp.nr)  {
diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h
index a249e8b36b..c67cc86871 100644
--- a/src/gallium/drivers/r300/r300_reg.h
+++ b/src/gallium/drivers/r300/r300_reg.h
@@ -540,7 +540,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_PVS_FIRST_INST(x)            ((x) << 0)
 #       define R300_PVS_XYZW_VALID_INST(x)       ((x) << 10)
 #       define R300_PVS_LAST_INST(x)             ((x) << 20)
-/* Addresses are relative the the vertex program parameters area. */
+/* Addresses are relative to the vertex program parameters area. */
 #define R300_VAP_PVS_CONST_CNTL             0x22D4
 #       define R300_PVS_CONST_BASE_OFFSET_SHIFT  0
 #       define R300_PVS_MAX_CONST_ADDR_SHIFT     16
@@ -1857,7 +1857,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * The destination register index is in FPI1 (color) and FPI3 (alpha)
  * together with enable bits.
  * There are separate enable bits for writing into temporary registers
- * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
+ * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_*
  * /DSTA_OUTPUT). You can write to both at once, or not write at all (the
  * same index must be used for both).
  *
diff --git a/src/gallium/state_trackers/wgl/stw_framebuffer.h b/src/gallium/state_trackers/wgl/stw_framebuffer.h
index 08cc4973bc..e61e9bf9c2 100644
--- a/src/gallium/state_trackers/wgl/stw_framebuffer.h
+++ b/src/gallium/state_trackers/wgl/stw_framebuffer.h
@@ -45,7 +45,7 @@ struct stw_framebuffer
    /**
     * This mutex has two purposes:
     * - protect the access to the mutable data members below
-    * - prevent the the framebuffer from being deleted while being accessed.
+    * - prevent the framebuffer from being deleted while being accessed.
     * 
     * It is OK to lock this mutex while holding the stw_device::fb_mutex lock, 
     * but the opposite must never happen.
diff --git a/src/glu/sgi/libnurbs/nurbtess/partitionY.h b/src/glu/sgi/libnurbs/nurbtess/partitionY.h
index 8dda409de1..5570c183d7 100644
--- a/src/glu/sgi/libnurbs/nurbtess/partitionY.h
+++ b/src/glu/sgi/libnurbs/nurbtess/partitionY.h
@@ -39,7 +39,7 @@
  *or both at or below v. In addition, at least one of the ajacent verteces is
  *strictly below or above v. 
  * A vertex is a relex vertex if the internals angle is strictly greater than 
- *180. In other words, if the the signed area is negative:
+ *180. In other words, if the signed area is negative:
  *(x1, y1), (x2, y2), (x3, y3) are the three vertices along a polygon, the 
  *order is such that left hand side is inside the polygon. Then (x2,y2) is
  *reflex if: 
diff --git a/src/glu/sgi/libtess/normal.c b/src/glu/sgi/libtess/normal.c
index 0a2494be34..7ab83167bb 100644
--- a/src/glu/sgi/libtess/normal.c
+++ b/src/glu/sgi/libtess/normal.c
@@ -142,7 +142,7 @@ static void CheckOrientation( GLUtesselator *tess )
   GLUhalfEdge *e;
 
   /* When we compute the normal automatically, we choose the orientation
-   * so that the the sum of the signed areas of all contours is non-negative.
+   * so that the sum of the signed areas of all contours is non-negative.
    */
   area = 0;
   for( f = fHead->next; f != fHead; f = f->next ) {
diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c
index 890ae51339..75c98825b7 100644
--- a/src/mesa/drivers/dri/common/dri_util.c
+++ b/src/mesa/drivers/dri/common/dri_util.c
@@ -698,7 +698,7 @@ setupLoaderExtensions(__DRIscreen *psp,
  * \param drm_version Version of the kernel DRM.
  * \param frame_buffer Data describing the location and layout of the
  *                     framebuffer.
- * \param pSAREA       Pointer the the SAREA.
+ * \param pSAREA       Pointer to the SAREA.
  * \param fd           Device handle for the DRM.
  * \param extensions   ??
  * \param driver_modes  Returns modes suppoted by the driver
diff --git a/src/mesa/drivers/dri/r128/r128_tex.c b/src/mesa/drivers/dri/r128/r128_tex.c
index 24fbf8f519..4ec4be9a47 100644
--- a/src/mesa/drivers/dri/r128/r128_tex.c
+++ b/src/mesa/drivers/dri/r128/r128_tex.c
@@ -468,7 +468,7 @@ static void r128TexEnv( GLcontext *ctx, GLenum target,
 	  * certain point.  It is better than completely ignoring the LOD
 	  * bias.  Unfortunately there isn't much range in the bias, the
 	  * spec mentions strides that vary between 0.5 and 2.0 but these
-	  * numbers don't seem to relate the the GL LOD bias value at all.
+	  * numbers don't seem to relate to the GL LOD bias value at all.
 	  */
 	 if ( param[0] >= 1.0 ) {
 	    bias = -128;
diff --git a/src/mesa/drivers/dri/r200/r200_reg.h b/src/mesa/drivers/dri/r200/r200_reg.h
index 59115212ce..b3a4940a7a 100644
--- a/src/mesa/drivers/dri/r200/r200_reg.h
+++ b/src/mesa/drivers/dri/r200/r200_reg.h
@@ -690,7 +690,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R200_PVS_CNTL_1_PROGRAM_START_SHIFT   0
 #       define R200_PVS_CNTL_1_POS_END_SHIFT         10
 #       define R200_PVS_CNTL_1_PROGRAM_END_SHIFT     20
-/* Addresses are relative the the vertex program parameters area. */
+/* Addresses are relative to the vertex program parameters area. */
 #define R200_VAP_PVS_CNTL_2                 0x22d4
 #       define R200_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
 #       define R200_PVS_CNTL_2_PARAM_COUNT_SHIFT  16
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h
index d18ebab8ff..ac93563ed9 100644
--- a/src/mesa/drivers/dri/r300/r300_reg.h
+++ b/src/mesa/drivers/dri/r300/r300_reg.h
@@ -482,7 +482,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_PVS_FIRST_INST_SHIFT         0
 #       define R300_PVS_XYZW_VALID_INST_SHIFT    10
 #       define R300_PVS_LAST_INST_SHIFT          20
-/* Addresses are relative the the vertex program parameters area. */
+/* Addresses are relative to the vertex program parameters area. */
 #define R300_VAP_PVS_CONST_CNTL             0x22D4
 #       define R300_PVS_CONST_BASE_OFFSET_SHIFT  0
 #       define R300_PVS_MAX_CONST_ADDR_SHIFT     16
@@ -1760,7 +1760,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * The destination register index is in FPI1 (color) and FPI3 (alpha)
  * together with enable bits.
  * There are separate enable bits for writing into temporary registers
- * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
+ * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_*
  * /DSTA_OUTPUT). You can write to both at once, or not write at all (the
  * same index must be used for both).
  *
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 0ce97e8697..583751d64d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -1900,7 +1900,7 @@ void radeonUploadTexMatrix( r100ContextPtr rmesa,
    So: if we need the q coord in the end (solely determined by the texture
    target, i.e. 2d / 1d / texrect targets) we swap the third and 4th row.
    Additionally, if we don't have texgen but 4 tex coords submitted, we swap
-   column 3 and 4 (for the 2d / 1d / texrect targets) since the the q coord
+   column 3 and 4 (for the 2d / 1d / texrect targets) since the q coord
    will get submitted in the "wrong", i.e. 3rd, slot.
    If an app submits 3 coords for 2d targets, we assume it is saving on vertex
    size and using the texture matrix to swap the r and q coords around (ut2k3
diff --git a/src/mesa/drivers/x11/xmesa.h b/src/mesa/drivers/x11/xmesa.h
index 98139af833..f63626a970 100644
--- a/src/mesa/drivers/x11/xmesa.h
+++ b/src/mesa/drivers/x11/xmesa.h
@@ -287,7 +287,7 @@ extern void XMesaCopySubBuffer( XMesaBuffer b,
 
 
 /*
- * Return a pointer to the the Pixmap or XImage being used as the back
+ * Return a pointer to the Pixmap or XImage being used as the back
  * color buffer of an XMesaBuffer.  This function is a way to get "under
  * the hood" of X/Mesa so one can manipulate the back buffer directly.
  * Input:  b - the XMesaBuffer
diff --git a/src/mesa/drivers/x11/xmesaP.h b/src/mesa/drivers/x11/xmesaP.h
index 3ffd7661e3..e0a6908228 100644
--- a/src/mesa/drivers/x11/xmesaP.h
+++ b/src/mesa/drivers/x11/xmesaP.h
@@ -431,7 +431,7 @@ extern const int xmesa_kernel8[DITH_DY * DITH_DX];
  * If pixelformat==PF_HPCR:
  *
  *      HP Color Recovery dithering               (ad@lms.be 30/08/95)
- *      HP has on it's 8-bit 700-series computers, a feature called
+ *      HP has on its 8-bit 700-series computers, a feature called
  *      'Color Recovery'.  This allows near 24-bit output (so they say).
  *      It is enabled by selecting the 8-bit  TrueColor  visual AND
  *      corresponding  colormap (see tkInitWindow) AND doing some special
diff --git a/src/mesa/main/dd.h b/src/mesa/main/dd.h
index 197de09b22..7c02faaa53 100644
--- a/src/mesa/main/dd.h
+++ b/src/mesa/main/dd.h
@@ -1072,7 +1072,7 @@ struct dd_function_table {
  * These are the initial values to be installed into dispatch by
  * mesa.  If the T&L driver wants to modify the dispatch table
  * while installed, it must do so itself.  It would be possible for
- * the vertexformat to install it's own initial values for these
+ * the vertexformat to install its own initial values for these
  * functions, but this way there is an obvious list of what is
  * expected of the driver.
  *
diff --git a/src/mesa/main/texcompress_fxt1.c b/src/mesa/main/texcompress_fxt1.c
index 149853f7ac..04acf05e52 100644
--- a/src/mesa/main/texcompress_fxt1.c
+++ b/src/mesa/main/texcompress_fxt1.c
@@ -476,7 +476,7 @@ fxt1_lloyd (GLfloat vec[][MAX_COMP], GLint nv,
     *     for each sample color
     *         sort to nearest vector.
     *
-    *     replace each vector with the centroid of it's matching colors.
+    *     replace each vector with the centroid of its matching colors.
     *
     *     repeat until RMS doesn't improve.
     *
diff --git a/src/mesa/math/m_debug_util.h b/src/mesa/math/m_debug_util.h
index 2e67db8e55..ed11c849ec 100644
--- a/src/mesa/math/m_debug_util.h
+++ b/src/mesa/math/m_debug_util.h
@@ -61,7 +61,7 @@ extern long counter_overhead;
  */
 extern char *mesa_profile;
 
-/* Modify the the number of tests if you like.
+/* Modify the number of tests if you like.
  * We take the minimum of all results, because every error should be
  * positive (time used by other processes, task switches etc).
  * It is assumed that all calculations are done in the cache.
diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c
index ef8a40fbec..4b33d0bbb3 100644
--- a/src/mesa/math/m_matrix.c
+++ b/src/mesa/math/m_matrix.c
@@ -889,7 +889,7 @@ _math_matrix_rotate( GLmatrix *mat,
        *  Y-axis to bring the axis vector parallel with the X-axis.  The
        *  rotation about the X-axis is then performed.  Ry and Rz are
        *  simply the respective inverse transforms to bring the arbitrary
-       *  axis back to it's original orientation.  The first transforms
+       *  axis back to its original orientation.  The first transforms
        *  Rz' and Ry' are considered inverses, since the data from the
        *  arbitrary axis gives you info on how to get to it, not how
        *  to get away from it, and an inverse must be applied.
diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h
index 224350caac..28c797a4ba 100644
--- a/src/mesa/shader/prog_instruction.h
+++ b/src/mesa/shader/prog_instruction.h
@@ -97,8 +97,8 @@
 #define COND_EQ  2  /**< equal to zero */
 #define COND_LT  3  /**< less than zero */
 #define COND_UN  4  /**< unordered (NaN) */
-#define COND_GE  5  /**< greater then or equal to zero */
-#define COND_LE  6  /**< less then or equal to zero */
+#define COND_GE  5  /**< greater than or equal to zero */
+#define COND_LE  6  /**< less than or equal to zero */
 #define COND_NE  7  /**< not equal to zero */
 #define COND_TR  8  /**< always true */
 #define COND_FL  9  /**< always false */
diff --git a/src/mesa/shader/program_parser.h b/src/mesa/shader/program_parser.h
index 730466c30f..be952d4b9c 100644
--- a/src/mesa/shader/program_parser.h
+++ b/src/mesa/shader/program_parser.h
@@ -62,7 +62,7 @@ struct asm_symbol {
     */
    unsigned param_binding_swizzle;
 
-   /* This is how many entries in the the program_parameter_list we take up
+   /* This is how many entries in the program_parameter_list we take up
     * with our state tokens or constants. Note that this is _not_ the same as
     * the number of param registers we eventually use.
     */
diff --git a/src/mesa/shader/slang/library/slang_common_builtin.gc b/src/mesa/shader/slang/library/slang_common_builtin.gc
index 8b7771c284..a25ca55bc4 100644
--- a/src/mesa/shader/slang/library/slang_common_builtin.gc
+++ b/src/mesa/shader/slang/library/slang_common_builtin.gc
@@ -695,7 +695,7 @@ vec3 normalize(const vec3 v)
 {
 //   const float s = inversesqrt(dot(v, v));
 //   __retVal = v * s;
-// XXX note, we _could_ use __retVal.w instead of tmp and and save a
+// XXX note, we _could_ use __retVal.w instead of tmp and save a
 // register, but that's actually a compilation error because v is a vec3
 // and the .w suffix is illegal.  Oh well.
    float tmp;
diff --git a/src/mesa/swrast/s_depth.c b/src/mesa/swrast/s_depth.c
index 3e36cf9a7e..ed637cac12 100644
--- a/src/mesa/swrast/s_depth.c
+++ b/src/mesa/swrast/s_depth.c
@@ -526,7 +526,7 @@ _swrast_depth_clamp_span( GLcontext *ctx, SWspan *span )
 
    /* Convert floating point values in [0,1] to device Z coordinates in
     * [0, DepthMax].
-    * ex: If the the Z buffer has 24 bits, DepthMax = 0xffffff.
+    * ex: If the Z buffer has 24 bits, DepthMax = 0xffffff.
     * 
     * XXX this all falls apart if we have 31 or more bits of Z because
     * the triangle rasterization code produces unsigned Z values.  Negative
diff --git a/src/mesa/vbo/vbo_save_loopback.c b/src/mesa/vbo/vbo_save_loopback.c
index f253c854d2..3f581ea02d 100644
--- a/src/mesa/vbo/vbo_save_loopback.c
+++ b/src/mesa/vbo/vbo_save_loopback.c
@@ -78,7 +78,7 @@ struct loopback_attr {
 };
 
 /* Don't emit ends and begins on wrapped primitives.  Don't replay
- * wrapped vertices.  If we get here, it's probably because the the
+ * wrapped vertices.  If we get here, it's probably because the
  * precalculated wrapping is wrong.
  */
 static void loopback_prim( GLcontext *ctx,
-- 
cgit v1.2.3


From d1ca1599f0319f5c99852ce24420aa592e806db0 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Fri, 12 Mar 2010 11:16:50 -0500
Subject: r100/r200/r300/r300: only enable accelerated pixel ops with kms

fixes fdo bug 27043
---
 src/mesa/drivers/dri/r200/r200_context.c   |  2 +-
 src/mesa/drivers/dri/r200/r200_state.c     | 11 +++++++----
 src/mesa/drivers/dri/r200/r200_state.h     |  2 +-
 src/mesa/drivers/dri/r300/r300_context.c   |  2 +-
 src/mesa/drivers/dri/r300/r300_state.c     | 10 ++++++----
 src/mesa/drivers/dri/r300/r300_state.h     |  2 +-
 src/mesa/drivers/dri/r600/r600_context.c   |  2 +-
 src/mesa/drivers/dri/r600/r700_state.c     | 11 ++++++-----
 src/mesa/drivers/dri/r600/r700_state.h     |  2 +-
 src/mesa/drivers/dri/radeon/radeon_state.c |  8 +++++---
 10 files changed, 30 insertions(+), 22 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index 5739443bdf..36a29350cc 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -324,7 +324,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
    _mesa_init_driver_functions(&functions);
    r200InitDriverFuncs(&functions);
    r200InitIoctlFuncs(&functions);
-   r200InitStateFuncs(&functions);
+   r200InitStateFuncs(&rmesa->radeon, &functions);
    r200InitTextureFuncs(&rmesa->radeon, &functions);
    r200InitShaderFuncs(&functions);
    radeonInitQueryObjFunctions(&functions);
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index 71f764aaae..9c2ac05ad6 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -2488,16 +2488,19 @@ static void r200PolygonStipple( GLcontext *ctx, const GLubyte *mask )
 }
 /* Initialize the driver's state functions.
  */
-void r200InitStateFuncs( struct dd_function_table *functions )
+void r200InitStateFuncs( radeonContextPtr radeon, struct dd_function_table *functions )
 {
    functions->UpdateState		= r200InvalidateState;
    functions->LightingSpaceChange	= r200LightingSpaceChange;
 
    functions->DrawBuffer		= radeonDrawBuffer;
    functions->ReadBuffer		= radeonReadBuffer;
-   functions->CopyPixels                = _mesa_meta_CopyPixels;
-   functions->DrawPixels                = _mesa_meta_DrawPixels;
-   functions->ReadPixels                = radeonReadPixels;
+
+   if (radeon->radeonScreen->kernel_mm) {
+	   functions->CopyPixels                = _mesa_meta_CopyPixels;
+	   functions->DrawPixels                = _mesa_meta_DrawPixels;
+	   functions->ReadPixels                = radeonReadPixels;
+   }
 
    functions->AlphaFunc			= r200AlphaFunc;
    functions->BlendColor		= r200BlendColor;
diff --git a/src/mesa/drivers/dri/r200/r200_state.h b/src/mesa/drivers/dri/r200/r200_state.h
index 7b9b0c106a..327ba837e2 100644
--- a/src/mesa/drivers/dri/r200/r200_state.h
+++ b/src/mesa/drivers/dri/r200/r200_state.h
@@ -38,7 +38,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r200_context.h"
 
 extern void r200InitState( r200ContextPtr rmesa );
-extern void r200InitStateFuncs( struct dd_function_table *functions );
+extern void r200InitStateFuncs( radeonContextPtr radeon, struct dd_function_table *functions );
 extern void r200InitTnlFuncs( GLcontext *ctx );
 
 extern void r200UpdateMaterial( GLcontext *ctx );
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 364e0ba6b6..cfeb5407e9 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -500,7 +500,7 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 
 	_mesa_init_driver_functions(&functions);
 	r300InitIoctlFuncs(&functions);
-	r300InitStateFuncs(&functions);
+	r300InitStateFuncs(&r300->radeon, &functions);
 	r300InitTextureFuncs(&r300->radeon, &functions);
 	r300InitShaderFuncs(&functions);
 	radeonInitQueryObjFunctions(&functions);
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index e75c88e101..749a2464e7 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -2354,7 +2354,7 @@ static void r300RenderMode(GLcontext * ctx, GLenum mode)
 /**
  * Initialize driver's state callback functions
  */
-void r300InitStateFuncs(struct dd_function_table *functions)
+void r300InitStateFuncs(radeonContextPtr radeon, struct dd_function_table *functions)
 {
 
 	functions->UpdateState = r300InvalidateState;
@@ -2396,9 +2396,11 @@ void r300InitStateFuncs(struct dd_function_table *functions)
 	functions->DrawBuffer = radeonDrawBuffer;
 	functions->ReadBuffer = radeonReadBuffer;
 
-	functions->CopyPixels = _mesa_meta_CopyPixels;
-	functions->DrawPixels = _mesa_meta_DrawPixels;
-	functions->ReadPixels = radeonReadPixels;
+	if (radeon->radeonScreen->kernel_mm) {
+		functions->CopyPixels = _mesa_meta_CopyPixels;
+		functions->DrawPixels = _mesa_meta_DrawPixels;
+		functions->ReadPixels = radeonReadPixels;
+	}
 }
 
 void r300InitShaderFunctions(r300ContextPtr r300)
diff --git a/src/mesa/drivers/dri/r300/r300_state.h b/src/mesa/drivers/dri/r300/r300_state.h
index d46bf9f179..e70f84f4e4 100644
--- a/src/mesa/drivers/dri/r300/r300_state.h
+++ b/src/mesa/drivers/dri/r300/r300_state.h
@@ -55,7 +55,7 @@ void r300UpdateDrawBuffer (GLcontext * ctx);
 void r300UpdateShaders (r300ContextPtr rmesa);
 void r300UpdateShaderStates (r300ContextPtr rmesa);
 void r300InitState (r300ContextPtr r300);
-void r300InitStateFuncs (struct dd_function_table *functions);
+void r300InitStateFuncs (radeonContextPtr radeon, struct dd_function_table *functions);
 void r300VapCntl(r300ContextPtr rmesa, GLuint input_count, GLuint output_count, GLuint temp_count);
 void r300SetupVAP(GLcontext *ctx, GLuint InputsRead, GLuint OutputsWritten);
 
diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c
index 76d5027649..fddac2f9bd 100644
--- a/src/mesa/drivers/dri/r600/r600_context.c
+++ b/src/mesa/drivers/dri/r600/r600_context.c
@@ -384,7 +384,7 @@ GLboolean r600CreateContext(const __GLcontextModes * glVisual,
 	 */
 	_mesa_init_driver_functions(&functions);
 
-	r700InitStateFuncs(&functions);
+	r700InitStateFuncs(&r600->radeon, &functions);
 	r600InitTextureFuncs(&r600->radeon, &functions);
 	r700InitShaderFuncs(&functions);
 	radeonInitQueryObjFunctions(&functions);
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 8797f8059a..2953ffd028 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -1817,7 +1817,7 @@ void r700InitState(GLcontext * ctx) //-------------------
 
 }
 
-void r700InitStateFuncs(struct dd_function_table *functions) //-----------------
+void r700InitStateFuncs(radeonContextPtr radeon, struct dd_function_table *functions)
 {
 	functions->UpdateState = r700InvalidateState;
 	functions->AlphaFunc = r700AlphaFunc;
@@ -1861,9 +1861,10 @@ void r700InitStateFuncs(struct dd_function_table *functions) //-----------------
 	functions->DrawBuffer = radeonDrawBuffer;
 	functions->ReadBuffer = radeonReadBuffer;
 
-	functions->CopyPixels = _mesa_meta_CopyPixels;
-	functions->DrawPixels = _mesa_meta_DrawPixels;
-	functions->ReadPixels = radeonReadPixels;
-
+	if (radeon->radeonScreen->kernel_mm) {
+		functions->CopyPixels = _mesa_meta_CopyPixels;
+		functions->DrawPixels = _mesa_meta_DrawPixels;
+		functions->ReadPixels = radeonReadPixels;
+	}
 }
 
diff --git a/src/mesa/drivers/dri/r600/r700_state.h b/src/mesa/drivers/dri/r600/r700_state.h
index 60c6a7f23c..56885e0b15 100644
--- a/src/mesa/drivers/dri/r600/r700_state.h
+++ b/src/mesa/drivers/dri/r600/r700_state.h
@@ -40,7 +40,7 @@ extern void r700UpdateShaderStates(GLcontext * ctx);
 extern void r700UpdateViewportOffset(GLcontext * ctx);
 
 extern void r700InitState (GLcontext * ctx);
-extern void r700InitStateFuncs (struct dd_function_table *functions);
+extern void r700InitStateFuncs (radeonContextPtr radeon, struct dd_function_table *functions);
 
 extern void r700SetScissor(context_t *context);
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index ec5612fdd7..ebae0792aa 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -2249,9 +2249,11 @@ void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 )
 
    ctx->Driver.DrawBuffer		= radeonDrawBuffer;
    ctx->Driver.ReadBuffer		= radeonReadBuffer;
-   ctx->Driver.CopyPixels               = _mesa_meta_CopyPixels;
-   ctx->Driver.DrawPixels               = _mesa_meta_DrawPixels;
-   ctx->Driver.ReadPixels               = radeonReadPixels;
+   if (dri2) {
+	   ctx->Driver.CopyPixels               = _mesa_meta_CopyPixels;
+	   ctx->Driver.DrawPixels               = _mesa_meta_DrawPixels;
+	   ctx->Driver.ReadPixels               = radeonReadPixels;
+   }
 
    ctx->Driver.AlphaFunc		= radeonAlphaFunc;
    ctx->Driver.BlendEquationSeparate	= radeonBlendEquationSeparate;
-- 
cgit v1.2.3


From 1a8a230a61289392e8300901dfabd7911799cbc3 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 13 Mar 2010 16:46:19 +0100
Subject: radeon: fix glCopyTex(Sub)Image

Fallback to swrast for software renderbuffers
---
 src/mesa/drivers/dri/radeon/radeon_tex_copy.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index e57d77e7ef..fb6f2e56af 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -59,18 +59,27 @@ do_copy_texsubimage(GLcontext *ctx,
     }
 
     if (_mesa_get_format_bits(timg->base.TexFormat, GL_DEPTH_BITS) > 0) {
-        rrb = radeon_renderbuffer(ctx->ReadBuffer->_DepthBuffer);
+        if (ctx->ReadBuffer->_DepthBuffer && ctx->ReadBuffer->_DepthBuffer->Wrapped) {
+            rrb = radeon_renderbuffer(ctx->ReadBuffer->_DepthBuffer->Wrapped);
+        } else {
+            rrb = radeon_renderbuffer(ctx->ReadBuffer->_DepthBuffer);
+        }
         flip_y = ctx->ReadBuffer->Attachment[BUFFER_DEPTH].Type == GL_NONE;
     } else {
         rrb = radeon_renderbuffer(ctx->ReadBuffer->_ColorReadBuffer);
         flip_y = ctx->ReadBuffer->Attachment[BUFFER_COLOR0].Type == GL_NONE;
     }
 
+    // This is software renderbuffer, fallback to swrast
+    if (!rrb) {
+        return GL_FALSE;
+    }
+
     if (!timg->mt) {
         radeon_validate_texture_miptree(ctx, &tobj->base);
     }
 
-    assert(rrb && rrb->bo);
+    assert(rrb->bo);
     assert(timg->mt);
     assert(timg->mt->bo);
     assert(timg->base.Width >= dstx + width);
-- 
cgit v1.2.3


From aba40bd4345e36fb56817673369b275f0e9a9c43 Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 13 Mar 2010 17:27:51 +0100
Subject: radeon: fix gl format to mesa format mapping and add GL_BGRA formats

---
 src/mesa/drivers/dri/radeon/radeon_pixel_read.c | 25 ++++++++++++++++++-------
 1 file changed, 18 insertions(+), 7 deletions(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
index b180c1d9a5..dadb8002c7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
+++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
@@ -50,22 +50,33 @@ static gl_format gl_format_and_type_to_mesa_format(GLenum format, GLenum type)
             break;
         case GL_RGBA:
             switch (type) {
-                case GL_UNSIGNED_BYTE:
-                    return MESA_FORMAT_RGBA8888_REV;
                 case GL_FLOAT:
                     return MESA_FORMAT_RGBA_FLOAT32;
+                case GL_UNSIGNED_SHORT_5_5_5_1:
+                    return MESA_FORMAT_RGBA5551;
+                case GL_UNSIGNED_INT_8_8_8_8:
+                    return MESA_FORMAT_RGBA8888;
+                case GL_UNSIGNED_BYTE:
+                case GL_UNSIGNED_INT_8_8_8_8_REV:
+                    return MESA_FORMAT_RGBA8888_REV;
+            }
+            break;
+        case GL_BGRA:
+            switch (type) {
                 case GL_UNSIGNED_SHORT_4_4_4_4:
-                    return MESA_FORMAT_ARGB4444;
+                    return MESA_FORMAT_ARGB4444_REV;
                 case GL_UNSIGNED_SHORT_4_4_4_4_REV:
                     return MESA_FORMAT_ARGB4444;
                 case GL_UNSIGNED_SHORT_5_5_5_1:
-                    return MESA_FORMAT_RGBA5551;
-                case GL_UNSIGNED_SHORT_1_5_5_5_REV:
                     return MESA_FORMAT_ARGB1555_REV;
+                case GL_UNSIGNED_SHORT_1_5_5_5_REV:
+                    return MESA_FORMAT_ARGB1555;
                 case GL_UNSIGNED_INT_8_8_8_8:
-                    return MESA_FORMAT_ARGB8888;
-                case GL_UNSIGNED_INT_8_8_8_8_REV:
                     return MESA_FORMAT_ARGB8888_REV;
+                case GL_UNSIGNED_BYTE:
+                case GL_UNSIGNED_INT_8_8_8_8_REV:
+                    return MESA_FORMAT_ARGB8888;
+
             }
             break;
     }
-- 
cgit v1.2.3


From abc847c20da92e52f29da40c6dd014f5caf46d8b Mon Sep 17 00:00:00 2001
From: Maciej Cencora <m.cencora@gmail.com>
Date: Sat, 13 Mar 2010 17:33:48 +0100
Subject: radeon: add some debuging info for glCopyTex(Sub)Image

---
 src/mesa/drivers/dri/radeon/radeon_tex_copy.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

(limited to 'src/mesa/drivers/dri/radeon')

diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index fb6f2e56af..29fd31ac23 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -28,6 +28,7 @@
 #include "radeon_common.h"
 #include "radeon_texture.h"
 
+#include "main/enums.h"
 #include "main/image.h"
 #include "main/teximage.h"
 #include "main/texstate.h"
@@ -183,6 +184,10 @@ radeonCopyTexImage2D(GLcontext *ctx, GLenum target, GLint level,
     return;
 
 fail:
+    radeon_print(RADEON_FALLBACKS, RADEON_NORMAL,
+                 "Falling back to sw for glCopyTexImage2D (internalFormat %s, border %d)\n",
+                 _mesa_lookup_enum_by_nr(internalFormat), border);
+
     _mesa_meta_CopyTexImage2D(ctx, target, level, internalFormat, x, y,
                               width, height, border);
 }
@@ -201,7 +206,8 @@ radeonCopyTexSubImage2D(GLcontext *ctx, GLenum target, GLint level,
                              radeon_tex_obj(texObj), (radeon_texture_image *)texImage,
                              xoffset, yoffset, x, y, width, height)) {
 
-       //DEBUG_FALLBACKS
+        radeon_print(RADEON_FALLBACKS, RADEON_NORMAL,
+                     "Falling back to sw for glCopyTexSubImage2D\n");
 
         _mesa_meta_CopyTexSubImage2D(ctx, target, level,
                                      xoffset, yoffset, x, y, width, height);
-- 
cgit v1.2.3