From 3b43c28195ffce79822728b546a707ee14a03320 Mon Sep 17 00:00:00 2001 From: Jerome Glisse Date: Sun, 9 Nov 2008 19:00:28 +0100 Subject: r300: cs + DRI2 support If DRI2 is enabled then switch cmd assembly to directly build hw packet. --- src/mesa/drivers/dri/radeon/radeon_bo_legacy.c | 22 ++-- src/mesa/drivers/dri/radeon/radeon_buffer.h | 3 +- src/mesa/drivers/dri/radeon/radeon_cs_legacy.c | 40 ++++-- src/mesa/drivers/dri/radeon/radeon_cs_legacy.h | 1 + src/mesa/drivers/dri/radeon/radeon_screen.c | 174 +++++++++++++++++++++---- 5 files changed, 192 insertions(+), 48 deletions(-) (limited to 'src/mesa/drivers/dri/radeon') diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c index 580ff374c7..d57b19de8d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c +++ b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c @@ -233,6 +233,7 @@ static void legacy_track_pending(struct bo_manager_legacy *boml) static struct bo_legacy *bo_allocate(struct bo_manager_legacy *boml, uint32_t size, uint32_t alignment, + uint32_t domains, uint32_t flags) { struct bo_legacy *bo_legacy; @@ -245,6 +246,7 @@ static struct bo_legacy *bo_allocate(struct bo_manager_legacy *boml, bo_legacy->base.handle = 0; bo_legacy->base.size = size; bo_legacy->base.alignment = alignment; + bo_legacy->base.domains = domains; bo_legacy->base.flags = flags; bo_legacy->base.ptr = NULL; bo_legacy->map_count = 0; @@ -337,7 +339,7 @@ static void bo_free(struct bo_legacy *bo_legacy) } if (!bo_legacy->static_bo) { legacy_free_handle(boml, bo_legacy->base.handle); - if (bo_legacy->base.flags & RADEON_GEM_DOMAIN_GTT) { + if (bo_legacy->base.domains & RADEON_GEM_DOMAIN_GTT) { /* dma buffers */ bo_dma_free(&bo_legacy->base); } else { @@ -353,6 +355,7 @@ static struct radeon_bo *bo_open(struct radeon_bo_manager *bom, uint32_t handle, uint32_t size, uint32_t alignment, + uint32_t domains, uint32_t flags) { struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bom; @@ -371,14 +374,14 @@ static struct radeon_bo *bo_open(struct radeon_bo_manager *bom, return NULL; } - bo_legacy = bo_allocate(boml, size, alignment, flags); + bo_legacy = bo_allocate(boml, size, alignment, domains, flags); bo_legacy->static_bo = 0; r = legacy_new_handle(boml, &bo_legacy->base.handle); if (r) { bo_free(bo_legacy); return NULL; } - if (bo_legacy->base.flags & RADEON_GEM_DOMAIN_GTT) { + if (bo_legacy->base.domains & RADEON_GEM_DOMAIN_GTT) { legacy_track_pending(boml); /* dma buffers */ r = bo_dma_alloc(&(bo_legacy->base)); @@ -555,7 +558,7 @@ int radeon_bo_legacy_validate(struct radeon_bo *bo, *eoffset = bo_legacy->offset + bo->size; return 0; } - if (!(bo->flags & RADEON_GEM_DOMAIN_GTT)) { + if (!(bo->domains & RADEON_GEM_DOMAIN_GTT)) { r = bo_vram_validate(bo, soffset, eoffset); if (r) { return r; @@ -650,7 +653,7 @@ struct radeon_bo_manager *radeon_bo_manager_legacy(struct radeon_screen *scrn) /* biggest framebuffer size */ size = 4096*4096*4; /* allocate front */ - bo = bo_allocate(bom, size, 0, 0); + bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0); if (bo == NULL) { radeon_bo_manager_legacy_shutdown((struct radeon_bo_manager*)bom); return NULL; @@ -666,7 +669,7 @@ struct radeon_bo_manager *radeon_bo_manager_legacy(struct radeon_screen *scrn) bom->nhandle = bo->base.handle + 1; } /* allocate back */ - bo = bo_allocate(bom, size, 0, 0); + bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0); if (bo == NULL) { radeon_bo_manager_legacy_shutdown((struct radeon_bo_manager*)bom); return NULL; @@ -682,14 +685,15 @@ struct radeon_bo_manager *radeon_bo_manager_legacy(struct radeon_screen *scrn) bom->nhandle = bo->base.handle + 1; } /* allocate depth */ - bo = bo_allocate(bom, size, 0, 0); + bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0); if (bo == NULL) { radeon_bo_manager_legacy_shutdown((struct radeon_bo_manager*)bom); return NULL; } bo->base.flags = 0; if (scrn->sarea->tiling_enabled) { - bo->base.flags = RADEON_BO_FLAGS_MACRO_TILE; + bo->base.flags |= RADEON_BO_FLAGS_MACRO_TILE; + bo->base.flags |= RADEON_BO_FLAGS_MICRO_TILE; } bo->static_bo = 1; bo->offset = bom->screen->depthOffset + bom->fb_location; @@ -711,7 +715,7 @@ unsigned radeon_bo_legacy_relocs_size(struct radeon_bo *bo) { struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; - if (bo_legacy->static_bo || (bo->flags & RADEON_GEM_DOMAIN_GTT)) { + if (bo_legacy->static_bo || (bo->domains & RADEON_GEM_DOMAIN_GTT)) { return 0; } return bo->size; diff --git a/src/mesa/drivers/dri/radeon/radeon_buffer.h b/src/mesa/drivers/dri/radeon/radeon_buffer.h index d41558f2e0..d32809ef1a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_buffer.h +++ b/src/mesa/drivers/dri/radeon/radeon_buffer.h @@ -39,7 +39,8 @@ struct radeon_renderbuffer unsigned int height; /* boo Xorg 6.8.2 compat */ - int depthHasSurface; + int has_surface; + __DRIdrawablePrivate *dPriv; }; diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c index a2a8423e6a..8de928692a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c +++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c @@ -270,22 +270,30 @@ static int cs_emit(struct radeon_cs *cs) int r; /* please flush pipe do all pending work */ - cs_write_dword(cs, cmdpacket0(R300_SC_SCREENDOOR, 1)); + cs_write_dword(cs, cmdpacket0(csm->ctx->radeonScreen, + R300_SC_SCREENDOOR, 1)); cs_write_dword(cs, 0x0); - cs_write_dword(cs, cmdpacket0(R300_SC_SCREENDOOR, 1)); + cs_write_dword(cs, cmdpacket0(csm->ctx->radeonScreen, + R300_SC_SCREENDOOR, 1)); cs_write_dword(cs, 0x00FFFFFF); - cs_write_dword(cs, cmdpacket0(R300_SC_HYPERZ, 1)); + cs_write_dword(cs, cmdpacket0(csm->ctx->radeonScreen, + R300_SC_HYPERZ, 1)); cs_write_dword(cs, 0x0); - cs_write_dword(cs, cmdpacket0(R300_US_CONFIG, 1)); + cs_write_dword(cs, cmdpacket0(csm->ctx->radeonScreen, + R300_US_CONFIG, 1)); cs_write_dword(cs, 0x0); - cs_write_dword(cs, cmdpacket0(R300_ZB_CNTL, 1)); + cs_write_dword(cs, cmdpacket0(csm->ctx->radeonScreen, + R300_ZB_CNTL, 1)); cs_write_dword(cs, 0x0); - cs_write_dword(cs, cmdwait(R300_WAIT_3D)); - cs_write_dword(cs, cmdpacket0(R300_RB3D_DSTCACHE_CTLSTAT, 1)); + cs_write_dword(cs, cmdwait(csm->ctx->radeonScreen, R300_WAIT_3D)); + cs_write_dword(cs, cmdpacket0(csm->ctx->radeonScreen, + R300_RB3D_DSTCACHE_CTLSTAT, 1)); cs_write_dword(cs, R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D); - cs_write_dword(cs, cmdpacket0(R300_ZB_ZCACHE_CTLSTAT, 1)); + cs_write_dword(cs, cmdpacket0(csm->ctx->radeonScreen, + R300_ZB_ZCACHE_CTLSTAT, 1)); cs_write_dword(cs, R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE); - cs_write_dword(cs, cmdwait(R300_WAIT_3D | R300_WAIT_3D_CLEAN)); + cs_write_dword(cs, cmdwait(csm->ctx->radeonScreen, + R300_WAIT_3D | R300_WAIT_3D_CLEAN)); /* append buffer age */ age.scratch.cmd_type = R300_CMD_SCRATCH; @@ -318,8 +326,15 @@ static int cs_emit(struct radeon_cs *cs) } r = drmCommandWrite(cs->csm->fd, DRM_RADEON_CMDBUF, &cmd, sizeof(cmd)); + if (r) { + return r; + } cs_set_age(cs); - return r; + for (int i = 0; i < cs->cdw; i++) { + fprintf(stderr, "pkt[%04d]=0x%08X\n", i, cs->packets[i]); + } + exit(0); + return 0; } static int cs_destroy(struct radeon_cs *cs) @@ -374,3 +389,8 @@ struct radeon_cs_manager *radeon_cs_manager_legacy(struct radeon_context *ctx) csm->pending_age = 1; return (struct radeon_cs_manager*)csm; } + +void radeon_cs_manager_legacy_shutdown(struct radeon_cs_manager *csm) +{ + free(csm); +} diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h index 6ab384e978..cf0f20ec30 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h +++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h @@ -36,5 +36,6 @@ #include "radeon_context.h" struct radeon_cs_manager *radeon_cs_manager_legacy(struct radeon_context *ctx); +void radeon_cs_manager_legacy_shutdown(struct radeon_cs_manager *csm); #endif diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 861310de65..4f76fcf410 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -72,6 +72,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include "xmlpool.h" #include "radeon_bo_legacy.h" +#include "radeon_bo_gem.h" #if !RADEON_COMMON /* R100 */ PUBLIC const char __driConfigOptions[] = @@ -972,30 +973,100 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv ) return screen; } -/* Destroy the device specific screen private data struct. - */ -static void -radeonDestroyScreen( __DRIscreenPrivate *sPriv ) +static radeonScreenPtr +radeonCreateScreen2(__DRIscreenPrivate *sPriv) { - radeonScreenPtr screen = (radeonScreenPtr)sPriv->private; + radeonScreenPtr screen; + int i; + + /* Allocate the private area */ + screen = (radeonScreenPtr) CALLOC( sizeof(*screen) ); + if ( !screen ) { + __driUtilMessage("%s: Could not allocate memory for screen structure", + __FUNCTION__); + fprintf(stderr, "leaving here\n"); + return NULL; + } + +#if DO_DEBUG && RADEON_COMMON && defined(RADEON_COMMON_FOR_R300) + RADEON_DEBUG = driParseDebugString(getenv("RADEON_DEBUG"), debug_control); +#endif + + /* parse information in __driConfigOptions */ + driParseOptionInfo (&screen->optionCache, + __driConfigOptions, __driNConfigOptions); + + screen->chip_flags = 0; + /* FIXME: do either an ioctl (bad) or a sysfs file for driver to + * information about which chipset is their */ + screen->chip_family = CHIP_FAMILY_RV350; + screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CLASS_R300; - if (!screen) - return; + i = 0; + screen->extensions[i++] = &driCopySubBufferExtension.base; + screen->extensions[i++] = &driFrameTrackingExtension.base; + screen->extensions[i++] = &driReadDrawableExtension; + + if ( screen->irq != 0 ) { + screen->extensions[i++] = &driSwapControlExtension.base; + screen->extensions[i++] = &driMediaStreamCounterExtension.base; + } + +#if !RADEON_COMMON + screen->extensions[i++] = &radeonTexOffsetExtension.base; +#endif - radeon_bo_manager_legacy_shutdown(screen->bom); +#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200) + if (IS_R200_CLASS(screen)) + screen->extensions[i++] = &r200AllocateExtension.base; + + screen->extensions[i++] = &r200texOffsetExtension.base; +#endif + +#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300) + //screen->extensions[i++] = &r300texOffsetExtension.base; +#endif + + screen->extensions[i++] = NULL; + sPriv->extensions = screen->extensions; - if ( screen->gartTextures.map ) { - drmUnmap( screen->gartTextures.map, screen->gartTextures.size ); + screen->driScreen = sPriv; + screen->bom = radeon_bo_manager_gem(sPriv->fd); + if (screen->bom == NULL) { + free(screen); + return NULL; } - drmUnmapBufs( screen->buffers ); - drmUnmap( screen->status.map, screen->status.size ); - drmUnmap( screen->mmio.map, screen->mmio.size ); + return screen; +} - /* free all option information */ - driDestroyOptionInfo (&screen->optionCache); +/* Destroy the device specific screen private data struct. + */ +static void +radeonDestroyScreen( __DRIscreenPrivate *sPriv ) +{ + radeonScreenPtr screen = (radeonScreenPtr)sPriv->private; + + if (!screen) + return; + + if (sPriv->dri2.enabled) { + radeon_bo_manager_gem_shutdown(screen->bom); + } else { + radeon_bo_manager_legacy_shutdown(screen->bom); + + if ( screen->gartTextures.map ) { + drmUnmap( screen->gartTextures.map, screen->gartTextures.size ); + } + drmUnmapBufs( screen->buffers ); + drmUnmap( screen->status.map, screen->status.size ); + drmUnmap( screen->mmio.map, screen->mmio.size ); + } + + /* free all option information */ + driDestroyOptionInfo (&screen->optionCache); - FREE( screen ); - sPriv->private = NULL; + FREE( screen ); + sPriv->private = NULL; } @@ -1004,13 +1075,17 @@ radeonDestroyScreen( __DRIscreenPrivate *sPriv ) static GLboolean radeonInitDriver( __DRIscreenPrivate *sPriv ) { - sPriv->private = (void *) radeonCreateScreen( sPriv ); - if ( !sPriv->private ) { - radeonDestroyScreen( sPriv ); - return GL_FALSE; - } + if (sPriv->dri2.enabled) { + sPriv->private = (void *) radeonCreateScreen2( sPriv ); + } else { + sPriv->private = (void *) radeonCreateScreen( sPriv ); + } + if ( !sPriv->private ) { + radeonDestroyScreen( sPriv ); + return GL_FALSE; + } - return GL_TRUE; + return GL_TRUE; } #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300) @@ -1130,6 +1205,7 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, struct radeon_renderbuffer *front = radeon_create_renderbuffer(rgbFormat, driDrawPriv); _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &front->base); + front->has_surface = 1; } /* back color renderbuffer */ @@ -1137,6 +1213,7 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, struct radeon_renderbuffer *back = radeon_create_renderbuffer(rgbFormat, driDrawPriv); _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &back->base); + back->has_surface = 1; } /* depth renderbuffer */ @@ -1144,7 +1221,7 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, struct radeon_renderbuffer *depth = radeon_create_renderbuffer(depthFormat, driDrawPriv); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth->base); - depth->depthHasSurface = screen->depthHasSurface; + depth->has_surface = screen->depthHasSurface; } /* stencil renderbuffer */ @@ -1152,7 +1229,7 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, struct radeon_renderbuffer *stencil = radeon_create_renderbuffer(GL_STENCIL_INDEX8_EXT, driDrawPriv); _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &stencil->base); - stencil->depthHasSurface = screen->depthHasSurface; + stencil->has_surface = screen->depthHasSurface; } _mesa_add_soft_renderbuffers(fb, @@ -1227,7 +1304,7 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, driDrawPriv); radeonSetSpanFunctions(depthRb, mesaVis); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base); - depthRb->depthHasSurface = screen->depthHasSurface; + depthRb->has_surface = screen->depthHasSurface; } else if (mesaVis->depthBits == 24) { driRenderbuffer *depthRb @@ -1238,7 +1315,7 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, driDrawPriv); radeonSetSpanFunctions(depthRb, mesaVis); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base); - depthRb->depthHasSurface = screen->depthHasSurface; + depthRb->has_surface = screen->depthHasSurface; } /* stencil renderbuffer */ @@ -1251,7 +1328,7 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, driDrawPriv); radeonSetSpanFunctions(stencilRb, mesaVis); _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &stencilRb->Base); - stencilRb->depthHasSurface = screen->depthHasSurface; + stencilRb->has_surface = screen->depthHasSurface; } _mesa_add_soft_renderbuffers(fb, @@ -1369,6 +1446,45 @@ radeonInitScreen(__DRIscreenPrivate *psp) (dri_priv->bpp == 16) ? 0 : 8, 1); } +/** + * This is the driver specific part of the createNewScreen entry point. + * Called when using DRI2. + * + * \return the __GLcontextModes supported by this driver + */ +static const +__DRIconfig **radeonInitScreen2(__DRIscreenPrivate *psp) +{ + fprintf(stderr, "DRI2 initialization\n"); + + /* Calling driInitExtensions here, with a NULL context pointer, + * does not actually enable the extensions. It just makes sure + * that all the dispatch offsets for all the extensions that + * *might* be enables are known. This is needed because the + * dispatch offsets need to be known when _mesa_context_create + * is called, but we can't enable the extensions until we have a + * context pointer. + * + * Hello chicken. Hello egg. How are you two today? + */ + driInitExtensions( NULL, card_extensions, GL_FALSE ); +#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200) + driInitExtensions( NULL, blend_extensions, GL_FALSE ); + driInitSingleExtension( NULL, ARB_vp_extension ); + driInitSingleExtension( NULL, NV_vp_extension ); + driInitSingleExtension( NULL, ATI_fs_extension ); + driInitExtensions( NULL, point_extensions, GL_FALSE ); +#endif + + if (!radeonInitDriver(psp)) { + return NULL; + } + + fprintf(stderr, "DRI2 initialized\n"); + + /* for now fill in all modes */ + return radeonFillInModes( psp, 24, 24, 8, 1); +} /** * Get information about previous buffer swaps. @@ -1417,6 +1533,8 @@ const struct __DriverAPIRec driDriverAPI = { .WaitForSBC = NULL, .SwapBuffersMSC = NULL, .CopySubBuffer = radeonCopySubBuffer, + /* DRI2 */ + .InitScreen2 = radeonInitScreen2, }; #else const struct __DriverAPIRec driDriverAPI = { -- cgit v1.2.3